Power supply device and image forming device
Patent Information
- Application Number
- PCT/JP2024/028744
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-25
- Filing Date
- 2024-08-09
- Publication Date
- 2025-04-03
AI Technical Summary
Existing power supply equipment requires the use of high-value electronic components when generating the maximum output voltage, resulting in higher equipment costs.
By controlling the voltage converter using a microprocessor, a pulse signal of the target output voltage is generated and the driving voltage is adjusted through a feedback mechanism to achieve efficient output voltage control.
The manufacturing cost of power supply equipment is reduced, while improving the accuracy and efficiency of output voltage.
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Figure JP2024028744_03042025_PF_FP_ABST
Abstract
Description
Power supply device and image forming apparatus
[0001] The present invention relates to a power supply device and an image forming apparatus equipped with the same.
[0002] An image forming apparatus employing an electrophotographic method requires a high-voltage power supply that generates multiple high voltages (e.g., charging voltage, developing voltage, and transfer voltage). The high-voltage power supply generates the high voltages using an electromagnetic transformer or a piezoelectric transformer. The piezoelectric transformer contributes to miniaturization of the high-voltage power supply. JP-A-2003-125662 proposes using a general-purpose microcomputer to control the piezoelectric transformer. JP-A-2003-125662 proposes that the drive frequency of the piezoelectric transformer is fixed, and the input voltage is controlled to increase the resolution of the output voltage.
[0003] Patent No. 5864383
[0004] However, in order to obtain the maximum output voltage required for a power supply device, expensive electronic components with high rated voltages and currents are required, making the power supply device expensive. Therefore, the present invention reduces the manufacturing costs of power supply devices.
[0005] The present invention provides, for example, a power supply device that generates a predetermined output voltage, comprising: control means that outputs a first pulse signal having a duty ratio corresponding to a target output voltage that is a target for the predetermined output voltage, and a second pulse signal of a predetermined frequency; generation means that generates a drive voltage based on the first pulse signal and feedback information about the output voltage from the power supply device so that the output voltage approaches the target output voltage; drive means that switches the drive voltage in response to the second pulse signal to generate a switching voltage; a piezoelectric transformer that steps up the switching voltage to generate an AC voltage; rectification means that rectifies the AC voltage to generate the output voltage; feedback means that generates the feedback information for feeding back the output voltage to the drive voltage; and detection means that detects the drive voltage and outputs voltage information indicating the drive voltage to the control means, wherein the control means is configured to specify a frequency at which the drive voltage is lowest by sweeping the frequency of the second pulse signal to change the drive voltage, or to read out the pre-specified frequency from storage means and generate the second pulse signal of that frequency.
[0006] According to the present invention, it is possible to reduce the manufacturing costs of the power supply device.
[0007] Other features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings, in which the same or similar elements are designated by the same reference numerals.
[0008] The accompanying drawings are incorporated into and constitute a part of the specification, illustrate embodiments of the present invention, and together with the description are used to explain the principles of the present invention: A diagram illustrating an image forming apparatus A block diagram showing a controller involved in image formation A diagram illustrating the characteristics of a piezoelectric transformer A circuit diagram showing a power supply A diagram illustrating the relationship between drive frequency and output voltage or drive voltage A diagram illustrating the relationship between drive frequency and output voltage or drive voltage A diagram illustrating various waveforms in Example 1 A diagram illustrating various waveforms in Example 1 A diagram illustrating various waveforms in Example 1 A diagram illustrating various waveforms in Example 1 A diagram illustrating drive frequency and various measurement results in Example 1 A diagram illustrating drive frequency and various measurement results in Example 1 A diagram illustrating drive frequency and various measurement results in Example 1 A flowchart showing a control method in Example 2
[0009] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.
[0010] <Embodiment 1> (1) Image Forming Apparatus As shown in FIG. 1, the image forming apparatus 100 is a copying machine, multifunction machine, facsimile machine, printer, or the like that utilizes an electrophotographic system. The image forming apparatus 100 is a so-called tandem-type printer having multiple image forming stations 10a to 10d. The image forming station 10a forms a yellow toner image. The image forming station 10b forms a magenta toner image. The image forming station 10c forms a cyan toner image. The image forming station 10d forms a black toner image. As such, the letters a, b, c, and d at the end of the reference numerals correspond to the toner colors yellow (Y), magenta (M), cyan (C), and black (Bk), respectively. When matters common to all four colors are described, the letters a, b, c, and d are omitted from the reference numerals. Note that this embodiment can also be applied to image forming apparatuses that form monochrome images.
[0011] The image forming station 10 includes a photosensitive drum 1, a charging roller 2, a developing unit 3, and a drum cleaner 4. The photosensitive drum 1 is an image carrier that rotates counterclockwise at a predetermined peripheral speed (process speed) and carries an electrostatic latent image and a toner image (developer image). The charging roller 2 receives a charging voltage from a charging power source 21 to uniformly charge the surface of the photosensitive drum 1. As an example, the surface of the photosensitive drum 1 is assumed to be negatively charged. The exposure unit 5 exposes the surface of the photosensitive drum 1 to light according to image data to form an electrostatic latent image. The developing unit 3 develops the electrostatic latent image using toner contained in a storage container to form a toner image. The toner is also negatively charged. A developing voltage is applied from a developing power source 22 to the developing sleeve (developing roller) of the developing unit 3. A primary transfer voltage is applied from a primary transfer power source 23 to a primary transfer member 6, which transfers the toner image from the photosensitive drum 1 to a transfer / conveyor belt 7. The drum cleaner 4 is a member for collecting toner remaining on the photosensitive drum 1. The drum cleaner 4 includes, for example, a cleaning blade that is a cleaning member that contacts the photosensitive drum 1, and a waste toner box that stores the toner collected by the cleaning blade.
[0012] The transfer / transport belt 7 is an endless belt that is stretched around tension rollers 71, 72, and 73 that serve as support members. The transfer / transport belt 7 may also be called an intermediate transfer belt. The transfer / transport belt 7 is driven to rotate while contacting the photosensitive drums 1a to 1d. The yellow toner image formed on the photosensitive drum 1a is transferred onto the transfer / transport belt 7 as it passes through the contact area between the photosensitive drum 1a and the transfer / transport belt 7 (hereinafter referred to as the primary transfer nip). Similarly, a magenta toner image, a cyan toner image, and a black toner image are transferred in order onto the transfer / transport belt 7, forming a full-color image.
[0013] The feed roller 9 feeds the sheets P one by one from the plurality of sheets P stored in the sheet cassette 11. The four-color toner image on the transfer / conveyor belt 7 is transferred to the surface of the sheet P (secondary transfer) as the sheet passes through a secondary transfer nip formed by the transfer / conveyor belt 7 and the secondary transfer roller 8. The secondary transfer roller 8 is rotated in accordance with the rotation of the transfer / conveyor belt 7. A secondary transfer voltage (e.g., 1800 V to 2300 V) is applied to the secondary transfer roller 8 from a secondary transfer power supply 24.
[0014] Toner remaining on the transfer / transport belt 7 after the secondary transfer (residual toner) is charged by the cleaning brush 13. As a result, the residual toner is transferred back from the transfer / transport belt 7 to the photosensitive drum 1a, and then cleaned and removed by the drum cleaner 4a.
[0015] Thereafter, the sheet P bearing the four-color toner image is conveyed to the fixing device 12. The fixing device 12 applies heat and pressure to the toner image and the sheet P, melting and mixing the four color toners. This fixes the toner image onto the sheet P. Thereafter, the sheet P is discharged outside the image forming apparatus 100.
[0016] (2) Overall Control of the Image Forming Apparatus FIG. 2 shows a controller 200 that controls the image forming apparatus 100. The controller 200 includes a CPU 201. The CPU 201 incorporates a ROM 203 and a RAM 204. CPU stands for central processing unit. ROM stands for read-only memory. RAM stands for random access memory. The CPU 201 comprehensively controls the exposure control unit 205, charging control unit 206, development control unit 207, primary transfer control unit 208, and secondary transfer control unit 209 in accordance with a control program stored in the ROM 203. The ROM 203 may store an environmental table and various tables for transfer control. The CPU 201 identifies the temperature and humidity by comparing the detection results of the environmental sensor 210 with the environmental table. The CPU 201 may adjust the charging voltage, development voltage, primary transfer voltage, and secondary transfer voltage by referencing the control table based on the temperature and humidity. The RAM 204 temporarily stores control data and is used as a work area for arithmetic processing associated with control.
[0017] The charging control unit 206 controls the charging voltage output from the charging power supply 21. The development control unit 207 controls the development voltage output from the development power supply 22. The primary transfer control unit 208 controls the primary transfer voltage output from the primary transfer power supply 23 based on a current value detected by a current detection circuit (not shown). The secondary transfer control unit 209 controls the secondary transfer voltage output from the secondary transfer power supply 24 based on a current value detected by a current detection circuit (not shown).
[0018] An external device 215 is a host computer that transmits image information and a print command. A video controller 216 receives the image information and the print command from the external device 215, generates an image signal, and transmits it to the controller 200. In response to the image signal, the controller 200 controls an exposure control unit 205, a charging control unit 206, a development control unit 207, a primary transfer control unit 208, and a secondary transfer control unit 209 to cause the image forming apparatus 100 to form an image.
[0019] The ROM 203 and the RAM 204 may be provided outside the CPU 201. An NVRAM 202 may be connected to the CPU 201 as a non-volatile memory.
[0020] (3) Power Supply Device (3-1) Characteristics of Piezoelectric Transformer The charging power supply 21, developing power supply 22, primary transfer power supply 23, and secondary transfer power supply 24 are all called high-voltage power supplies because they output high voltages. Since the power supply circuits of the charging power supply 21, developing power supply 22, primary transfer power supply 23, and secondary transfer power supply 24 are almost the same, the charging power supply 21 will be described below as a representative. In other words, the description of the charging power supply 21 can also be applied to the developing power supply 22, primary transfer power supply 23, and secondary transfer power supply 24.
[0021] The charging power supply 21 generates a charging voltage that affects the amount of toner carried. Therefore, the accuracy of the output voltage of the charging power supply 21 directly affects the density of the image. Therefore, the charging power supply 21 is required to have high output voltage accuracy.
[0022] FIG. 3 shows the characteristics of the output voltage of a piezoelectric transformer versus the drive frequency. The horizontal axis represents the drive frequency, and the vertical axis represents the output voltage. Generally, the output voltage of a piezoelectric transformer varies with the resonant frequency f as shown in FIG. 0 A method of controlling a piezoelectric transformer that utilizes this characteristic is frequency control, which controls the drive frequency of the piezoelectric transformer. 1 From V 2 When the driving frequency is increased to f 1 From f 2 (f 1 >f 2 However, to achieve high resolution for the output voltage, it is necessary to continuously control the drive frequency, which generally requires expensive electronic components such as a dedicated analog IC.
[0023] In contrast, by using a general-purpose microcomputer to control the piezoelectric transformer, as in this embodiment, it is possible to reduce the cost of the power supply device. However, there is a limit to the resolution of the switching frequency of the general-purpose microcomputer. As a result, it may be impossible to achieve the desired output voltage accuracy. In particular, high output voltage accuracy is required for the charging power supply 21. Therefore, input voltage control is performed to increase the output voltage resolution. Input voltage control is a method of controlling the output voltage by adjusting the voltage input to the piezoelectric transformer while maintaining the driving frequency of the piezoelectric transformer constant. Details of the circuit operation in this case will be described later.
[0024] (3-2) Circuit Diagram Fig. 4 is a circuit diagram of a power supply device 400, which is one of the charging power supply 21, developing power supply 22, primary transfer power supply 23, and secondary transfer power supply 24. The power supply device 400 generates a predetermined output voltage. As shown in Fig. 4, an IC 401 monitors an input voltage (drive voltage Vdrv) input to a drive circuit 402 that drives a piezoelectric transformer 407, and calculates the resonant frequency f of the piezoelectric transformer 407 based on the monitoring result. 0 The IC 401 may be mounted in any one of the charging control unit 206, the development control unit 207, the primary transfer control unit 208, and the secondary transfer control unit 209.
[0025] The IC 401 is a general-purpose microcomputer that controls the output of the power supply device 400. The IC 401 functions as a control unit that outputs a first pulse signal with a duty cycle corresponding to a target output voltage, which is a predetermined output voltage target, and a second pulse signal with a predetermined frequency. The IC 401 has at least output ports 411 and 412 and an input port 413. The output port 411 outputs a pulse-width modulation signal (hereinafter referred to as a "PWM signal") as a control signal. The output port 412 outputs a pulse-frequency modulation signal (hereinafter referred to as a "PFM signal") as a pulse signal to the drive circuit 402. Here, the pulse signal is assumed to be a PFM signal, but this is merely an example. The pulse signal may be any signal with a variable frequency. The input port 413 is an input port having an analog-to-digital conversion circuit (ADC). Therefore, the input port 413 functions as an AD converter that performs analog-to-digital conversion of the output of the voltage divider circuit to generate voltage information.
[0026] The drive circuit 402 functions as a drive unit that switches a drive voltage in response to the second pulse signal to generate a switching voltage. The drive circuit 402 is composed of a field-effect transistor FET1, an inductor L1, and a capacitor C6. The gate of the field-effect transistor FET1 is connected to an output port 412. The source of the field-effect transistor FET1 is connected to the frame ground, one input electrode of the piezoelectric transformer 407, and one end of the capacitor C6. The drain of the field-effect transistor FET1 is connected to one end of the inductor L1, the other input electrode of the piezoelectric transformer 407, and the other end of the capacitor C6. The other end of the inductor L1 is connected to the capacitor C20, one end of the resistor R21, and the emitter of the transistor Tr1.
[0027] The drive circuit 402 is a circuit that drives the piezoelectric transformer 407 based on the frequency of the PFM signal input from the IC 401, thereby causing the piezoelectric transformer 407 to output a predetermined AC voltage. The piezoelectric transformer 407 is an element that increases or boosts the AC voltage generated by the field effect transistor FET1 of the drive circuit 402. The piezoelectric transformer 407 boosts the switching voltage to generate the AC voltage.
[0028] The output electrode of the piezoelectric transformer 407 is connected to a rectifying and smoothing circuit 403. The rectifying and smoothing circuit 403 functions as a rectifying means for rectifying an AC voltage to generate an output voltage. The rectifying and smoothing circuit 403 is connected between the load of the power supply device and the output electrode of the piezoelectric transformer, and rectifies and smoothes the AC voltage generated at the output electrode of the piezoelectric transformer to generate an output voltage. The rectifying and smoothing circuit 403 includes diodes D8 and D9 and a capacitor C10. The anode of diode D8 and the cathode of diode D9 are connected to the output electrode of the piezoelectric transformer 407. The cathode of diode D8 is connected to the frame ground and one end of capacitor C10. The anode of diode D9 is connected to the load 410 and the other end of capacitor C10. The AC voltage generated at the output electrode of the piezoelectric transformer 407 is rectified by diodes D8 and D9 and smoothed by capacitor C10. This generates a negative-polarity DC high voltage (output voltage Vout). The load 410 is the charging roller 2 , the developing roller of the developing unit 3 , the primary transfer member 6 , or the secondary transfer roller 8 .
[0029] The output voltage Vout is divided by a voltage divider circuit formed by resistors R11, R12, and R13. This generates a feedback voltage Vfd that correlates with the output voltage Vout. The resistors R11, R12, and R13 function as feedback means that generate feedback information for feeding back the output voltage to the drive voltage. The feedback voltage Vfd is input to a voltage adjustment circuit 404. The voltage adjustment circuit 404 functions as generation means that generates a drive voltage based on the first pulse signal and feedback information about the output voltage from the power supply device so that the output voltage approaches a target output voltage.
[0030] The voltage adjustment circuit 404 generates a drive voltage Vdrv from the feedback voltage Vfd, the PWM signal, and the +24V power supply voltage. The voltage adjustment circuit 404 is composed of an operational amplifier OP1, resistors R15 and R16, capacitors C17 and C18, and a transistor Tr1. One end of the resistor R15 receives the feedback voltage. The other end of the resistor R15 is connected to the non-inverting input terminal of the operational amplifier OP1. The resistor R15 functions as a protective resistor. One end of the resistor R16 is connected to the output port 411. The other end of the resistor R16 is connected to the inverting input terminal of the operational amplifier OP1, one end of the capacitor C18, and one end of the capacitor C17. The other end of the capacitor C18 is connected to the output terminal of the operational amplifier OP1 and the base of the transistor Tr1. The other end of the capacitor C17 is connected to the frame ground. Resistor R16 and capacitor C17 form a type of low-pass filter that rectifies and smoothes the PWM signal to generate a DC voltage. This DC voltage is proportional to the target value of the output voltage Vout (target output voltage Vtar). This DC voltage may also be referred to as a "control voltage." IC401 changes the value of the control voltage by varying the duty ratio of the PWM signal. As an example, the control signal of power supply 400 is assumed to be a PWM signal, but any signal with a variable duty ratio can be used. The control voltage is assumed to be a DC voltage generated by rectifying and smoothing the PWM signal. However, this is merely an example. The control signal output from output port 411 of IC401 can be any DC voltage with a variable voltage value. Capacitor C18 is connected as an element that adjusts the responsiveness of operational amplifier OP1.
[0031] A power supply voltage of +24 V is applied to the collector of the transistor Tr1. A drive voltage Vdrv to the drive circuit 402 is generated at the emitter of the transistor Tr1.
[0032] Vdrv = +24 - Vce (Eq. 1), where Vce is the collector-emitter voltage of transistor Tr1. The collector-emitter voltage Vce of transistor Tr1 is controlled by operational amplifier OP1 so that the control voltage input to the inverting input terminal of operational amplifier OP1 is equal to the feedback voltage input to the non-inverting input terminal of operational amplifier OP1. Capacitor C20 is connected to stabilize the generated drive voltage Vdrv. The other end of capacitor C20 is connected to frame ground. The generated drive voltage Vdrv is divided by a voltage divider formed by resistors R21 and R22 and input to input port 413 of IC401. One end of resistor R21 is connected to the emitter of transistor Tr1, the other end of inductor L1, and one end of capacitor C20. The other end of resistor R21 is connected to one end of resistor R22 and input port 413. The other end of the resistor R22 is connected to the frame ground. The resistors R21 and R22 function as a detection means that detects the drive voltage and outputs voltage information indicating the drive voltage to the control means.
[0033] In order to control the output voltage Vout to the target output voltage Vtar, a control voltage corresponding to the target output voltage Vtar is input to the inverting input terminal of the operational amplifier OP1. Specifically, the IC401 outputs a PWM signal having a duty ratio corresponding to the target output voltage Vtar from the output port 411. For example, the IC401 may have an internal memory that stores a control table that converts the voltage value of the target output voltage Vtar into a duty ratio. The IC401 may determine the duty ratio corresponding to the target output voltage Vtar set by the CPU 201 by referring to the control table. Note that the process of determining the duty ratio may be executed by the CPU 201. However, the calculation process executed by the IC401 may also be executed by the CPU 201.
[0034] The IC 401 drives the piezoelectric transformer 407 by outputting a PFM signal having a certain frequency. The voltage adjustment circuit 404 adjusts the drive voltage Vfrv so that the output voltage Vout matches the target output voltage Vtar. However, the power supply device 400 can output the target output voltage Vtar only when the frequency of the PFM signal is within a certain frequency range. In this embodiment, the frequency of the PFM signal is set to the resonant frequency f of the piezoelectric transformer 407. 0 In other words, the resonant frequency f 0 Includes:
[0035] FIG. 5A shows the relationship between the output voltage Vout and the drive frequency of the piezoelectric transformer 407. The horizontal axis represents the drive frequency. The vertical axis represents the output voltage Vout. FIG. 5B shows the relationship between the drive voltage Vdrv and the drive frequency of the piezoelectric transformer 407. The horizontal axis represents the drive frequency. The vertical axis represents the drive voltage Vdrv. Here, the target output voltage Vtar is assumed to be −1200 V.
[0036] In this example, when the frequency of the PFM signal (drive frequency f) is higher than 170 kHz, even though the drive voltage Vdrv is controlled to its maximum value, the output voltage Vout does not reach −1200 V. On the other hand, when the frequency of the PFM signal is set to 170 kHz or lower, the voltage adjustment circuit 404 adjusts the drive voltage Vdrv, allowing the output voltage Vout to reach −1200 V.
[0037] In this way, whether the output voltage Vout can reach the target output voltage Vtar depends on the combination of the drive voltage Vdrv and the drive frequency f of the piezoelectric transformer 407. Note that the frequency of the PFM signal when the voltage input to the input port 413 of the IC 401 is lowest is the resonant frequency f of the piezoelectric transformer 407. 0 In this example, the resonant frequency f 0 The resonant frequency f is 165 kHz. 0 When the piezoelectric transformer 407 is driven at this frequency, the energy conversion efficiency of the piezoelectric transformer 407 is maximized. Even if the same target output voltage Vtar (=-1200 V) is set, if the drive frequency f is greater than the resonant frequency f 0When the driving frequency f is outside the resonant frequency f (e.g. 170 kHz), 0 (=165 kHz), the operation of the driver circuit 402 is different.
[0038] 6A to 6E show various waveforms when the common target output voltage Vtar (=-1200V) is used but the drive frequency f is different. Fig. 6A shows the waveform of the voltage Vgs of the PFM signal input between the gate and source of the field-effect transistor FET1. The horizontal axis represents time, and the vertical axis represents voltage.
[0039] FIG. 6B shows the relationship between the driving frequency f and the resonant frequency f 0 6B shows the drain-source voltage Vds of the field-effect transistor FET1 when the drive frequency f is 170 kHz, which is outside the resonant frequency f. The horizontal axis represents time, and the vertical axis represents voltage. According to FIG. 6B, the maximum value of the drain-source voltage Vds is 74 V. FIG. 6C shows the drain-source voltage Vds when the drive frequency f is 170 kHz, which is outside the resonant frequency f. 0 1 shows the current IL flowing through the inductor L1 when the frequency is 170 kHz, which is outside the specified range. The horizontal axis represents time. The vertical axis represents current. The maximum value of the current IL is 127 mA. The temperature increase of the piezoelectric transformer 407 at this time is Δ20°C.
[0040] FIG. 6D shows that the driving frequency f is 0 6D shows the drain-source voltage Vds of the field-effect transistor FET1 when the drive frequency f is 165 kHz. The horizontal axis represents time, and the vertical axis represents voltage. According to FIG. 6D, the maximum value of the drain-source voltage Vds is 35 V. FIG. 6E shows the maximum value of the drain-source voltage Vds when the drive frequency f is 165 kHz. 0 1 shows the current IL flowing through the inductor L1 when the horizontal axis represents time and the vertical axis represents current. The maximum value of the current IL is 68 mA. The temperature increase of the piezoelectric transformer 407 at this time is Δ5°C.
[0041] 7A shows the relationship between the drive frequency f and the drain-source voltage Vds of the field effect transistor FET1 of the drive circuit 402. According to this, when the drive frequency f is the resonant frequency f 07B shows the relationship between the drive frequency f and the current flowing through the inductor L1. According to this, when the drive frequency f is equal to the resonant frequency f 0 7C shows the temperature of the piezoelectric transformer 407. According to this, when the drive frequency f is equal to the resonant frequency f 0 When , the temperature is at a minimum.
[0042] 7A and 7B, the drive frequency f is the resonant frequency f 0 When the drive frequency f coincides with the resonant frequency f of the piezoelectric transformer 407, the drain-source voltage Vds, the current IL flowing through the inductor L1, and the temperature of the piezoelectric transformer 407 all reach their minimum values. 0 If these values match, it becomes easier to use electronic components with low rated voltages and currents as the field-effect transistor FET1 and the inductor L1. Electronic components with low rated voltages and currents are generally inexpensive, which makes it possible to reduce the manufacturing cost of the power supply device 400.
[0043] The resonant frequency f of the piezoelectric transformer 407 is 0 Therefore, the resonant frequency f 0 It is necessary to specify the frequency f of the PFM signal. According to this embodiment, a voltage generated by dividing the drive voltage Vdrv is input to the input port 413. This allows the IC 401 to monitor the drive voltage Vdrv. In other words, the IC 401 can monitor the drive voltage Vdrv while outputting a PWM signal with a duty ratio corresponding to a certain target output voltage Vtar, and at the same time, changing the frequency of the PFM signal. As shown in FIG. 5B, the frequency of the PFM signal (drive frequency f) when the drive voltage Vdrv is at its smallest is the resonant frequency f of the piezoelectric transformer 407. 0 Therefore, the IC 401 can detect the resonance frequency f by monitoring the drive voltage Vdrv. 0 can be identified.
[0044] When the image forming apparatus 100 or the power supply device 400 leaves the factory, they undergo a shipping inspection. During this inspection, the IC 401 outputs a PWM signal corresponding to a specific target output voltage Vtar (e.g., −1200 V) and monitors the drive voltage Vtar while sweeping the frequency of the PFM signal. When the power supply device 400 is a charging power supply 21, the target output voltage Vtar is set to the charging voltage (e.g., −1200 V), but this is merely an example. The target output voltage Vtar may be set to another voltage value as long as the voltage of each element constituting the power supply device 400 is equal to or less than the rated voltage and the current of each element is equal to or less than the rated current. At this time, an inspection tool is connected to the controller 200, and the frequency of the PFM signal (drive frequency f) at which the drive voltage Vdrv is smallest is stored in the NVRAM 202. When the image forming apparatus 100 is started by a user, the CPU 201 reads this frequency from the NVRAM 202 and sets it in the power supply device 400. The IC 401 of the power supply device 400 outputs a PFM signal at a frequency set by the CPU 201 .
[0045] According to this embodiment, the drain-source voltage Vds of the field-effect transistor FET1 of the drive circuit 402 and the current IL flowing through the inductor L1 are both reduced. Therefore, electronic components with low rated voltages and rated currents can be used for the field-effect transistor FET1 and the inductor L1. In other words, less expensive electronic components can be used. As a result, the manufacturing costs of the power supply device 400 and the image forming apparatus 100 are reduced.
[0046] Instead of using electronic components with lower rated voltages and currents, the maximum output voltage of the power supply device 400 may be increased. Generally, the higher the output voltage Vout, the greater the drain-source voltage Vds and the current IL flowing through the inductor L1. Therefore, the rated voltage and rated current of the electronic components may become the governing factors, limiting the maximum output voltage. In this case, driving the piezoelectric transformer 407 at the resonant frequency f0 increases the margin for the rated voltage and rated current. Therefore, it is also possible to increase the maximum output voltage of the power supply device 400.
[0047] According to the first embodiment, the IC 401 may be configured to sweep the frequency of the second pulse signal to change the drive voltage and thereby identify a frequency at which the drive voltage is lowest, or to read the pre-identified frequency from a storage means and generate a second pulse signal of the pre-identified frequency. The IC 401 executes a specification process to identify a frequency at which the drive voltage is lowest prior to starting to supply an output voltage to the load. A first target output voltage set as the target output voltage in the specification process may be lower than a second target output voltage corresponding to the output voltage output to the load. The first target output voltage may be equal to or less than half of the second target output voltage. Upon completion of the specification process, the IC 401 switches the target output voltage from the first target output voltage to a second target output voltage. The first target output voltage set as the target output voltage in the specification process may be equal to the second target output voltage corresponding to the output voltage output to the load. The NVRAM 202 is an example of a non-volatile memory (storage means) that stores a pre-identified frequency acquired when the power supply device is shipped from a factory. OP1 is an example of an operational amplifier having a non-inverting input terminal connected to the other end of the protective resistor, an inverting input terminal connected to a conversion circuit that converts the first pulse signal into a DC voltage and outputs it, and an output terminal that outputs an adjusted voltage corresponding to the difference between feedback information input to the non-inverting input terminal via the protective resistor and the DC voltage input to the inverting input terminal. Resistor R15 is an example of a protective resistor having one end connected to feedback means. Capacitor C18 is an example of a capacitor having one end connected to the output terminal of the operational amplifier and the other end connected to the inverting input terminal. Transistor Tr1 is an example of a transistor having a collector connected to a power supply voltage, a base connected to the output terminal of the operational amplifier, and an emitter that outputs a drive voltage.
[0048] <Example 2> In Example 1, the resonant frequency f 0 was measured at the time of shipping from the factory and stored in the NVRAM 202. On the other hand, in Example 2, the resonant frequency f 0 The resonant frequency f of the piezoelectric transformer 407 is 0In this case, the resonance frequency f may vary depending on the environment in which the image forming apparatus 100 is installed. 0 In the second embodiment, even in such a case, the resonant frequency f 0 The description of the first embodiment is used for technical matters common to the first embodiment among the technical matters of the second embodiment.
[0049] In the second embodiment, a first target output voltage Vtar1 and a second target output voltage Vtar2 are used as the target output voltage Vtar. The first target output voltage Vtar1 is determined based on the resonant frequency f 0 The first target output voltage Vtar1 is set to detect the resonant frequency f 0 When searching for the first target output voltage Vtar1, the second target output voltage Vtar2 is set so that the voltage applied to each element constituting the power supply device 400 is equal to or less than the rated voltage, and the current flowing through each element is equal to or less than the rated current. The second target output voltage Vtar2 is the target output voltage that the power supply device 400 ultimately wants to output. In other words, the second target output voltage Vtar2 is the voltage required by the load 410 (e.g., charging voltage, developing voltage, primary transfer voltage, secondary transfer voltage). As long as no problems arise with the rated voltage and rated current of each element, the first target output voltage Vtar1 and the second target output voltage Vtar2 may be equal.
[0050] 8 is a flowchart showing a method for controlling the output voltage in the second embodiment. This control method is executed by the CPU 201 working in cooperation with the IC 401, but may also be executed by the IC 401 alone. In the latter case, the IC 401 has an arithmetic circuit such as the CPU 201 and a memory such as the RAM 204. This control method can be executed, for example, when the image forming apparatus 100 receives an instruction from a user to form an image.
[0051] In S801, the CPU 201 sets a first target output voltage Vtar1 in the IC 401. In this embodiment, the first target output voltage Vtar is set so that the voltage applied to each element constituting the power supply device 400 is equal to or less than the rated voltage and the current flowing through each element is equal to or less than the rated current. The first target output voltage Vtar1 may be stored in the ROM 203. If the second target output voltage Vtar2 is −1200 V, the first target output voltage Vtar1 can be set to −600 V. The IC 401 determines a duty ratio corresponding to −600 V and outputs a PWM signal of the determined duty ratio from the output port 411.
[0052] In S802, the CPU 201 instructs the IC 401 to output a PFM signal at a predetermined sweep start frequency f1. 1 is the resonance frequency f of the piezoelectric transformer 407 0 Even if there is a variation in the resonant frequency f 0 For example, the sweep start frequency f 1 is the nominal resonant frequency f 0 The sweep start frequency f is set to be equal to or greater than the sum of the maximum variation of the sweep start frequency f 1 may be stored in the ROM 203.
[0053] In S803, the CPU 201 waits for the output voltage Vout to stabilize. For example, the CPU 201 may count a predetermined waiting time using a timer or counter circuit. Alternatively, the CPU 201 may have the IC 401 monitor the drive voltage Vdrv and wait until the amount of fluctuation in the drive voltage Vdrv becomes sufficiently small. This is because when the output voltage Vout stabilizes, the drive voltage Vdrv also stabilizes.
[0054] In step S804, the CPU 201 detects the drive voltage Vdrv from the voltage input to the input port 413 of the IC 401, and stores the detection result as a variable V f Store in the number V f is stored in the RAM 204.
[0055] In S805, the CPU 201 commands the IC 401 to lower the frequency of the PFM signal (drive frequency f) by one step (frequency df). The IC 401 can change the frequency one step at a time, and here, one step may correspond to the resolution of the settable frequency. The IC 401 outputs a PFM signal having a frequency that is one step lower from the output port 412.
[0056] In S806, the CPU 201 waits for the output voltage Vout to stabilize. The method for determining whether the output voltage Vout has stabilized is as described in S803.
[0057] In step S807, the CPU 201 detects the drive voltage Vdrv from the voltage input to the input port 413 of the IC 401, and stores the detection result as a variable V f-1 Store in variable V f-1 is stored in the RAM 204.
[0058] In step S808, the CPU 201 f -V f-1 As shown in FIG. 5B, it is determined whether the drive frequency f is less than the resonance frequency f 0 If it is higher than f -V f-1 On the other hand, when the drive frequency f is greater than the resonance frequency f 0 If it is lower than f -V f-1 becomes a negative value. f -V f-1 A drive frequency f at which the sign of V changes is searched for. f -V f-1 If the variable V is 0 or a positive value, the CPU 201 proceeds from step S808 to step S821. f-1 V f Then, proceed to S805. f -V f-1 If the value is negative, the CPU 201 proceeds from step S808 to step S809.
[0059] In S809, the CPU 201 instructs the IC 401 to increase the frequency of the PFM signal by one step (frequency df). As a result, the drive frequency f is increased to the resonant frequency f 0 is set nearby.
[0060] In S810, the CPU 201 sets the second target output voltage Vtar2 in the IC 401. The IC 401 determines a duty ratio corresponding to the second target output voltage Vtar2 and outputs a PWM signal of the determined duty ratio from the output port 411.
[0061] In step S811, the CPU 201 waits for the output voltage Vout to stabilize. The method for determining whether the output voltage Vout has stabilized is as described in step S803.
[0062] According to the second embodiment, the resonant frequency f 0 Even if there is manufacturing variation in the frequency of the PFM signal, the frequency of the PFM signal is the resonant frequency f 0 or the resonant frequency f 0 In other words, in the second embodiment, as in the first embodiment, electronic components with generally low cost rated voltages and low rated currents can be employed, and the manufacturing costs of the power supply device 400 and the image forming apparatus 100 can be reduced. Furthermore, in the second embodiment, the resonant frequency f of the piezoelectric transformer 407 measured at the time of shipment from the factory is 0 This eliminates the need for the NVRAM 202 for storing the frequency of the PFM signal when the drive voltage Vdrv is at its smallest, which further reduces the manufacturing cost of the power supply device 400. This eliminates the need for the step of storing the frequency of the PFM signal when the drive voltage Vdrv is at its smallest in the NVRAM 202 using an inspection tool at the time of shipping from the factory, as described in the first embodiment.
[0063] In the second embodiment, the resonant frequency f 0 Resonant frequency f for detecting 0 is different from the second target output voltage Vtar2 required for the load 410. However, by adjusting the sweep start frequency f, the second target output voltage Vtar2 may be used as the first target output voltage Vtar1. In this case, even if there is variation among the elements constituting the power supply device 400, a sweep start frequency f is required such that the voltage applied to each element is equal to or less than the rated voltage and the current flowing through each element is equal to or less than the rated current. Also, in this case, in S801, the second target output voltage Vtar2 is set as the target output voltage Vatr instead of the first target output voltage Vtar1. Furthermore, S810 and S811 are omitted.
[0064] Thus, according to the second embodiment, the resonant frequency f 0 This eliminates the need for the NVRAM 202 for storing the data in advance. Furthermore, it is possible to reduce the drain-source voltage Vds of the field-effect transistor FET1 of the drive circuit 402 and the current flowing through the inductor L1. This allows for the use of generally low-cost components for the field-effect transistor FET1 and the inductor L1. As a result, the manufacturing costs of the power supply device 400 and the image forming apparatus 100 are reduced.
[0065] According to the second embodiment, the IC 401 may detect the drive voltage each time the frequency of the second pulse signal is changed by about one step, calculate the difference between the drive voltage detected first and the drive voltage detected last, search for a frequency at which the sign of the difference changes, and identify the frequency before the searched frequency is changed by about one step as the frequency at which the drive voltage is lowest. The initial frequency used in the sweep may be set to a frequency equal to or higher than the sum of the nominal resonant frequency of the piezoelectric transformer and the maximum variation in the resonant frequency.
[0066] <Others> The CPU 201 and IC 401 are examples of control means. The voltage adjustment circuit 404 is an example of generation means. The drive circuit 402 is an example of drive means. The rectifying and smoothing circuit 403 is an example of rectification means. The resistors R11, R12, and R13 are examples of feedback means for generating feedback information (e.g., Vfd). The resistors R21 and R22 and the input port 413 are examples of detection means. As described in the second embodiment, the CPU 201 and IC 401 sweep the frequency f of the second pulse signal to change the drive voltage Vdrv, thereby detecting a predetermined frequency (e.g., resonance frequency f) at which the drive voltage Vdrv is lowest. 0 As described in the first embodiment, the CPU 201 and the IC 401 may generate a second pulse signal of a predetermined frequency by reading the predetermined frequency from a storage unit (e.g., the NVRAM 202). This allows inexpensive electronic components to be used as the electronic components constituting the power supply device 400, thereby reducing the manufacturing cost of the power supply device 400.
[0067] As explained with reference to FIGS. 5A and 5B, when the drive frequency f is equal to the resonance frequency f 0 When the drive frequency f is equal to the resonance frequency f, the drive voltage Vdrv is at its lowest. 0 This means that the drive frequency f and the resonant frequency f 0 This is because, if the difference between is sufficiently small, the effects targeted in Examples 1 and 2 can be achieved.
[0068] As explained with respect to FIG. f and V f-1 corresponds to the drive voltage detected earlier and the drive voltage detected later. As illustrated in S808, a drive frequency f at which the sign of the difference between these two changes may be searched for. As illustrated in S809, the frequency before the searched frequency is changed by about one step may be identified as the frequency at which the drive voltage is lowest. This will efficiently identify a frequency close to the resonant frequency f0 of the piezoelectric transformer 407.
[0069] As illustrated in FIG. f and V f-1 As suggested in S809, the frequency obtained by adding a frequency df corresponding to one step to the searched frequency may be identified as the frequency at which the drive voltage Vdrv is lowest.
[0070] As described in relation to S802, the sweep start frequency is the drive frequency f 1 is the nominal resonance frequency f of the piezoelectric transformer 407 0 and the resonant frequency f 0 This will enable the frequency at which the drive voltage Vdrv becomes the lowest to be efficiently identified.
[0071] Pulse width modulated (PWM) signals and pulse frequency modulated (PFM) signals are just examples of pulse signals, and other types of pulse signals may also be employed.
[0072] As described in Example 2, a characterization process may be performed prior to supplying the output voltage to the load 410. The characterization process may be referred to as a frequency sweep and search process.
[0073] The first target output voltage Vtar1 may be lower than the second target output voltage Vtar2. If each element of the power supply device 400 has sufficient performance for the second target output voltage Vtar2, each element will also have sufficient performance for the first target output voltage Vtar1. In other words, during the frequency sweep and search process, the voltage applied to each element will not exceed the rated voltage, and the current flowing through each element will not exceed the rated current.
[0074] When the second target output voltage Vtar2 is −1200 V, the first target output voltage Vtar1 may be set to −600 V. In the first and second embodiments, the concept of whether a voltage is high or low is obtained by comparing the absolute values of the voltages.
[0075] As shown in S810, once the frequency is identified, the target output voltage Vtar is switched from the first target output voltage Vtar1 to the second target output voltage Vtar2, thereby making it possible to efficiently obtain the output voltage Vout equivalent to the second target output voltage Vtar2.
[0076] As noted in the second embodiment, the first target output voltage Vtar1 and the second target output voltage Vtar2 may be equal to each other, which will shorten the time required from the start of control of the output voltage Vout until the output voltage Vout stabilizes.
[0077] As described in the first embodiment, a pre-specified frequency obtained when the power supply device 400 is shipped from the factory may be stored in the NVRAM 202. This will shorten the time required from the start of control of the output voltage Vout until the output voltage Vout stabilizes.
[0078] The resistor R15 is an example of a protective resistor. The resistor R16 and the capacitor C17 are an example of a conversion circuit.
[0079] The resistors R21 and R22 are an example of a voltage divider circuit. The input port 413 is an example of an AD converter.
[0080] Capacitor C6 is an example of a capacitor.
[0081] The resistors R11, R12, and R13 are examples of a plurality of resistive elements.
[0082] The image forming stations 10a to 10d and the secondary transfer roller 8 are an example of an image forming unit. The charging power supply 21, the developing power supply 22, the primary transfer power supply 23, and the secondary transfer power supply 24 are an example of a power supply device 400.
[0083] The primary transfer member 6 and the secondary transfer roller 8 are examples of transfer means. The primary transfer member 6 may be a brush, a blade, or a roller. (Other Examples) The present invention can also be realized by supplying a program that realizes one or more functions of the above-described embodiments to a system or device via a network or a storage medium, and having one or more processors in a computer of the system or device read and execute the program. The present invention can also be realized by a circuit (e.g., an ASIC) that realizes one or more functions.
[0084] The invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention.
[0085] This application claims priority based on Japanese Patent Application No. 2023-161705, filed on September 25, 2023, the entire contents of which are incorporated herein by reference.
Claims
1. A power supply device that generates a predetermined output voltage, comprising: control means for outputting a first pulse signal having a duty ratio corresponding to a target output voltage that is a target for the predetermined output voltage, and a second pulse signal of a predetermined frequency; generation means for generating a drive voltage based on the first pulse signal and feedback information about the output voltage from the power supply device so that the output voltage approaches the target output voltage; drive means for switching the drive voltage in response to the second pulse signal to generate a switching voltage; a piezoelectric transformer for stepping up the switching voltage to generate an AC voltage; rectification means for rectifying the AC voltage to generate the output voltage; feedback means for generating the feedback information for feeding back the output voltage to the drive voltage; and detection means for detecting the drive voltage and outputting voltage information indicating the drive voltage to the control means, wherein the control means is configured to specify a frequency at which the drive voltage is lowest by sweeping the frequency of the second pulse signal to change the drive voltage, or to read out the pre-specified frequency from memory means, and thereby generate the second pulse signal of the pre-specified frequency.
2. The power supply device according to claim 1, wherein the frequency at which the drive voltage is lowest is equal to the resonant frequency of the piezoelectric transformer.
3. A power supply device as claimed in claim 1 or 2, wherein said control means detects the drive voltage each time the frequency of the second pulse signal is changed by about one step, determines the difference between the drive voltage detected earlier and the drive voltage detected later, searches for a frequency at which the sign of said difference changes, and identifies the frequency found before the frequency is changed by about one step as the frequency at which the drive voltage is lowest.
4. A power supply device as claimed in any one of claims 1 to 3, wherein the control means detects the drive voltage each time the frequency of the second pulse signal is reduced by about one step, determines the difference between the drive voltage detected earlier and the drive voltage detected later, searches for a frequency at which the sign of the difference changes from positive to negative, and specifies the frequency obtained by adding one step to the searched frequency as the frequency at which the drive voltage is lowest.
5. A power supply device as claimed in claim 3 or 4, wherein the initial frequency used in the sweep is set to a frequency equal to or higher than the sum of the nominal resonant frequency of the piezoelectric transformer and the maximum variation in said resonant frequency.
6. A power supply device according to any one of claims 1 to 5, wherein the first pulse signal is a pulse width modulated (PWM) signal, and the second pulse signal is a pulse frequency modulated (PFM) signal.
7. A power supply device according to any one of claims 1 to 6, wherein said control means executes a specification process for specifying a frequency at which said drive voltage is lowest prior to starting the supply of said output voltage to a load.
8. A power supply device as described in claim 7, wherein a first target output voltage set as the target output voltage in the specification process is a voltage lower than a second target output voltage for the output voltage output to the load.
9. The power supply device of claim 8, wherein the first target output voltage is less than or equal to half of the second target output voltage.
10. The power supply device according to claim 8 or 9, wherein the control means switches the target output voltage from the first target output voltage to the second target output voltage when the specifying process is completed.
11. The power supply device according to claim 7, wherein a first target output voltage set as the target output voltage in the specification process is equal to a second target output voltage for the output voltage output to the load.
12. The power supply device according to claim 1, wherein said storage means is a non-volatile memory that stores said pre-specified frequency obtained when said power supply device is shipped from a factory.
13. The power supply device according to any one of claims 1 to 12, wherein the generating means comprises: a protective resistor having one end connected to the feedback means; a non-inverting input terminal connected to the other end of the protective resistor; an inverting input terminal connected to a conversion circuit that converts the first pulse signal into a DC voltage and outputs it; and an operational amplifier having an output terminal that outputs an adjustment voltage corresponding to the difference between the feedback information input to the non-inverting input terminal via the protective resistor and the DC voltage input to the inverting input terminal; a capacitor having one end connected to the output terminal of the operational amplifier and the other end connected to the inverting input terminal; and a transistor having a collector connected to a power supply voltage, a base connected to the output terminal of the operational amplifier, and an emitter that outputs the drive voltage.
14. A power supply device according to any one of claims 1 to 13, wherein the detection means comprises: a voltage divider circuit that divides the drive voltage; and an AD converter that performs analog-to-digital conversion of an output of the voltage divider circuit to generate the voltage information.
15. A power supply device as claimed in any one of claims 1 to 14, wherein the driving means comprises: an inductor to one end of which the driving voltage is applied; a field effect transistor having a drain connected to the other end of the inductor and a first input electrode of the piezoelectric transformer, a gate to which the second pulse signal is input, and a source connected to a frame ground and a second input electrode of the piezoelectric transformer; and a capacitor connected between the drain and the source.
16. A power supply device according to any one of claims 1 to 15, further comprising a rectifying and smoothing circuit connected between a load of the power supply device and an output electrode of the piezoelectric transformer, for rectifying and smoothing the AC voltage generated at the output electrode of the piezoelectric transformer to generate the output voltage.
17. A power supply device according to any one of claims 1 to 16, wherein the feedback means includes a plurality of resistive elements that divide the output voltage.
18. An image forming apparatus comprising: an image forming means for forming an image on a sheet; and a power supply device for supplying a high voltage to the image forming means, the power supply device being the power supply device according to any one of claims 1 to 17.
19. The image forming apparatus of claim 18, wherein the image forming means comprises a photoconductor, charging means for uniformly charging the surface of the photoconductor using a charging voltage, exposure means for exposing the surface of the photoconductor to light to form an electrostatic latent image, developing means for developing the electrostatic latent image using a developing voltage to generate a toner image, and transfer means for transferring the toner image to an intermediate transfer body or the sheet using a transfer voltage, and the power supply device generates the charging voltage, the developing voltage or the transfer voltage.
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