DC-DC converter

Abstract

A DC-DC converter (100) includes a high-side switch (11), a low-side switch (12), an inductor (3), an output capacitor (4), and a control unit (2). The control unit (2) comprises: a pre-charge circuit (21) that charges the output capacitor (4); a negative current detection circuit (25) that outputs a negative current detection signal indicating that a current flowing from the inductor (3) to the low-side switch (12) has reached a predetermined value; and a control circuit (26) that performs a switching operation that turns on the high-side switch (11) and the low-side switch (12) alternately. The control circuit (26) starts the switching operation by turning on the low-side switch (12), and turns off the low-side switch (12) after receiving the negative current detection signal.

Description

DC-DC converter

[0001] The present disclosure relates to DC-DC converters.

[0002] Generally, a DC-DC converter such as that shown in FIG. 5A or 5B is used, which steps down an input DC voltage and outputs an output DC voltage.

[0003] 5A and 5B are circuit diagrams showing the configuration of a typical DC-DC converter.

[0004] 5A shows a DC-DC converter comprising a main switching element 11, a freewheeling diode 13, an inductor 3, an output capacitor 4, and a control circuit 5. In Fig. 5A, an input DC voltage Ei from an input power source 1 is output intermittently to the inductor 3 and the output capacitor 4 by the switching operation of the main switching element 11, is averaged by the inductor 3 and the output capacitor 4, and is supplied to a load from the output capacitor 4 as an output DC voltage Eo. If the ratio of the on time to the switching period of the main switching element 11 is taken as a duty ratio δ, then the input DC voltage Ei and the output DC voltage Eo in a steady state generally satisfy the relationship shown in Equation 1 below.

[0005] Eo=δ・Ei (Formula 1)

[0006] Typically, a DC-DC converter stabilizes the output DC voltage Eo by having a control circuit 5 monitor the output DC voltage Eo and adjust the duty ratio δ. As an example of such a DC-DC converter, Patent Document 1 discloses a DC-DC converter in which the freewheeling diode 13 is replaced with a switching element 12 having a body diode similar to the main switching element 11, as shown in Figure 5B, thereby allowing the inductor current to flow in the reverse direction. In this disclosure, the DC-DC converter shown in Figure 5B is used as the basic configuration, and hereinafter the main switching element connected to the input high potential side will be referred to as a high-side switch, and the switching element connected to the low potential side that replaces the freewheeling diode will be referred to as a low-side switch.

[0007] Replacing the diode with a switching element is called synchronous rectification, and conduction loss can be reduced by setting the conduction voltage when the low-side switch is on (i.e., when the high-side switch is off) lower than the forward voltage of the diode. Also, when the inductor current flows backward, the high-side switch turns on at zero voltage as the low-side switch turns off, reducing switching loss.

[0008] When the input DC voltage Ei is significantly higher than the output DC voltage Eo (for example, 10 times or more), the on-time of the high-side switch becomes shorter. Therefore, it is difficult to respond to an increase in the output DC voltage Eo due to a sudden load drop or the like by adjusting the already short on-time to further shorten it. Therefore, a control method has been proposed, as in Patent Document 2, in which the on-time is fixed and the off-time is adjusted.

[0009] For example, as in Patent Document 1, by constantly alternately switching the high-side switch and the low-side switch to reverse the inductor current, switching loss is reduced, and further as in Patent Document 2, by fixing the on-time of the high-side switch, a DC-DC converter suitable for high input specifications can be obtained.

[0010] Japanese Patent Application Laid-Open No. 09-028076 U.S. Patent No. 10,587,196

[0011] In the design of DC-DC converters, component shapes are sometimes restricted due to demands for miniaturization. Restrictions on the shape of inductors also restrict the inductance of the inductors. If the inductor's inductance is small, the amount of current increase when the high-side switch is turned on increases when the input DC voltage is high, limiting the allowable current value of the inductor. For this reason, it is necessary to suppress the maximum current value of the inductor. Note that, as in Patent Document 2, the maximum current value can be suppressed by fixing the on-time to a short time, but when the input DC voltage is high, it may be difficult to further fix the on-time to a short time, which makes it difficult to suppress the maximum current value of the inductor.

[0012] An object of the present disclosure is to provide a DC-DC converter that can suppress the maximum current value of an inductor even when the inductance of the inductor is small.

[0013] A DC-DC converter according to one aspect of the present disclosure is a DC-DC converter having a high-side switch, a low-side switch, an inductor, an output capacitor, and a control unit, and steps down an input DC voltage from an input power supply and outputs an output DC voltage from the output capacitor, wherein the control unit includes a precharge circuit that charges the output capacitor, a negative current detection circuit that outputs a negative current detection signal indicating that a current flowing from the inductor to the low-side switch has reached a predetermined value, and a control circuit that performs a switching operation to alternately turn on the high-side switch and the low-side switch, and the control circuit starts the switching operation by turning on the low-side switch and turns off the low-side switch after receiving the negative current detection signal.

[0014] These comprehensive or specific aspects may be realized as a system, a method, an integrated circuit, a computer program, or a computer-readable recording medium such as a CD-ROM, or may be realized as any combination of a system, a method, an integrated circuit, a computer program, and a recording medium.

[0015] According to the DC-DC converter of the present disclosure, even if the inductor has a small inductance, the maximum current value of the inductor can be suppressed.

[0016] FIG. 1 is a circuit diagram showing the configuration of a DC-DC converter according to a first embodiment. FIG. 2 is a flowchart showing the operation of the DC-DC converter according to the first embodiment. FIG. 3 is a waveform diagram showing the operation of the DC-DC converter according to the first embodiment. FIG. 4 is a circuit diagram showing the configuration of a DC-DC converter according to a second embodiment. FIG. 5 is a circuit diagram showing the configuration of a general DC-DC converter. FIG. 6 is a circuit diagram showing the configuration of a general DC-DC converter.

[0017] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. Note that each embodiment described below represents a specific example of the present disclosure. The numerical values, shapes, materials, components, component arrangements and connection forms, steps, and step orders shown in the following embodiments are merely examples and do not limit the present disclosure. Furthermore, each figure is not necessarily an exact illustration. In each figure, substantially identical configurations are assigned the same reference numerals, and redundant explanations are omitted or simplified. Furthermore, "connection" means electrical connection, and includes not only cases where two circuit elements are directly connected, but also cases where two circuit elements are indirectly connected with another circuit element inserted between them.

[0018] Furthermore, "proportional" described below may be "approximately proportional," and "inversely proportional" may be "approximately inversely proportional." For example, if the coefficient when y is proportional to x is a, then "approximately proportional" and "approximately inversely proportional" mean that a does not necessarily have to be a fixed value depending on the value of x, and that a may vary somewhat depending on the value of x. For example, the range of variation of a is within ±10% of a representative value (such as the mean, median, or mode) that a can take.

[0019] First Embodiment FIG. 1 is a circuit diagram showing a configuration of a DC-DC converter 100 according to a first embodiment.

[0020] The DC-DC converter 100 includes a high-side switch 11, a low-side switch 12, an inductor 3, an output capacitor 4, and a control unit 2. The DC-DC converter 100 steps down an input DC voltage from an input power source 1 and outputs an output DC voltage from the output capacitor 4. In FIG. 1, the DC-DC converter 100 is a step-down converter that steps down an input DC voltage Ei from the input power source 1, such as a battery, and supplies an output DC voltage Eo to a load (not shown). In the DC-DC converter 100, a series configuration of the high-side switch 11 and the low-side switch 12 is connected in parallel to the input power source 1, one end of an inductor 3 having an inductance L is connected to a connection point LX between the high-side switch 11 and the low-side switch 12, and the other end of the inductor 3 is connected to the output capacitor 4. The voltage across the output capacitor 4 is supplied to the load as an output DC voltage Eo. The high-side switch 11 and the low-side switch 12 are, for example, NMOS (N type Metal Oxide Semiconductor) transistors.

[0021] The control unit 2 includes a reference voltage source 20, a precharge circuit 21, a feedback circuit 22, a start-up circuit 23, a pseudo-ripple comparison circuit 24, a negative current detection circuit 25, a control circuit 26, a low-side drive circuit 27, a high-side drive circuit 28, and a bootstrap circuit 29, and controls the switching operations of the high-side switch 11 and the low-side switch 12 so as to stabilize the output DC voltage Eo.

[0022] The reference voltage source 20 generates a reference voltage Vref.

[0023] The precharge circuit 21 charges the output capacitor 4. Specifically, the precharge circuit 21 has an NMOS transistor 210 that receives a start-up voltage Vcc at its gate, and charges the output capacitor 4 via the NMOS transistor 210. The NMOS transistor 210 is an example of a transistor connected between the input power supply 1 and the output capacitor 4. For example, the start-up voltage Vcc is generated based on a reference voltage Vref. In addition, voltages such as a first reference voltage Vr1, a second reference voltage Vr2, and a drive power supply voltage Vc, which will be described later, are also generated based on the reference voltage Vref.

[0024] The feedback circuit 22 divides the output DC voltage Eo using a resistor 220 and a resistor 221, and outputs a feedback voltage Vfb.

[0025] The start-up circuit 23 outputs an enable signal to the control circuit 26 to permit switching operation when the output DC voltage Eo is equal to or higher than a predetermined value. Specifically, the start-up circuit 23 compares a first reference voltage Vr1 with a feedback voltage Vfb, and outputs an enable signal EN that goes high when the feedback voltage Vfb is higher than the first reference voltage Vr1. The first reference voltage Vr1 is set lower than the reference voltage Vref, and detects at startup that the output DC voltage Eo has reached a predetermined level that is equal to or lower than the target voltage.

[0026] The pseudo-ripple comparison circuit 24 includes a pseudo-ripple generation circuit 240 and a comparison circuit 241. The pseudo-ripple generation circuit 240 receives the input DC voltage Ei, the output DC voltage Eo, and the feedback voltage Vfb, generates a pseudo-ripple voltage, and generates and outputs a target voltage Vr, which is a reference voltage Vref on which the pseudo-ripple voltage is superimposed. The target voltage Vr decreases from the reference voltage Vref at a predetermined rate proportional to the input-output voltage difference (Ei - Eo) during the on-period of the high-side switch 11, and increases at a predetermined rate proportional to the output DC voltage Eo during the on-period of the low-side switch 12. When the target voltage Vr reaches the feedback voltage Vfb, it is charged to the reference voltage Vref. The comparison circuit 241 compares the feedback voltage Vfb with the target voltage Vr, and outputs a first comparison signal Vc1 that goes high when the target voltage Vr exceeds the feedback voltage Vfb. As a result, when the output capacitor 4 is charged to a certain extent, the low-side switch 12 can start its switching operation by turning it on.

[0027] The negative current detection circuit 25 outputs a negative current detection signal indicating that the current flowing from the inductor 3 to the low-side switch 12 has reached a predetermined value. For example, the negative current detection circuit 25 detects the potential at the connection point LX between the high-side switch 11 and the low-side switch 12. Specifically, the negative current detection circuit 25 compares the LX terminal voltage Vx with a second reference voltage Vr2 and outputs a second comparison signal Vc2 that goes high when the LX terminal voltage Vx exceeds the second reference voltage Vr2. When the low-side switch 12 is on, the LX terminal voltage Vx is the product of the inductor current Ix and the on-resistance of the low-side switch 12. Therefore, by comparing the LX terminal voltage Vx with the second reference voltage Vr2, it is possible to detect that the inductor current Ix has reached a predetermined reverse flow value, i.e., that the current flowing from the inductor 3 to the low-side switch 12 has reached a predetermined value. For example, the second reference voltage Vr2 is set to a voltage value closer to zero than the other reference voltages. The second comparison signal Vc2 is an example of a negative current detection signal that indicates that the current flowing from the inductor 3 to the low-side switch 12 has reached a predetermined value. The negative current detection circuit 25 outputs the second comparison signal Vc2 to the control circuit 26.

[0028] In this way, by detecting the potential at the connection point between the high-side switch 11 and the low-side switch 12, it is possible to detect the amount of negative current flowing, and the low-side switch 12 can be turned off after the negative current reaches a predetermined value.

[0029] The control circuit 26 performs a switching operation that alternately turns on the high-side switch 11 and the low-side switch 12. The control circuit 26 has a logic circuit 260 and an on-time setting circuit 261. The control circuit 26 receives an enable signal EN, a first comparison signal Vc1, a second comparison signal Vc2, and an on-time setting signal Vt1, and outputs a high-side drive signal Vd1 and a low-side drive signal Vd2. The on-time setting circuit 261 is a timer circuit that outputs an on-time setting signal Vt1 that goes low when the high-side drive signal Vd1 rises and goes high after a predetermined time Tonx. Details of the control circuit 26 (specifically, the logic circuit 260) will be described later using FIG. 2 . The control circuit 26 starts its switching operation by turning on the low-side switch 12, and turns off the low-side switch 12 after receiving the second comparison signal Vc2.

[0030] The low-side drive circuit 27 is biased by the drive power supply voltage Vc, amplifies the low-side drive signal Vd2, and outputs the drive signal Vg2 that drives the low-side switch 12. The high-side drive circuit 28 amplifies the high-side drive signal Vd1 and outputs the drive signal Vg1 that drives the high-side switch 11. Hereinafter, in this disclosure, the on / off state of the high-side switch 11 will be represented by the high / low (H, L) state of the high-side drive signal Vd1, and the on / off state of the low-side switch 12 will be represented by the high / low (H, L) state of the low-side drive signal Vd2.

[0031] Bootstrap circuit 29 has a capacitor 290 that supplies a drive power supply voltage to high-side drive circuit 28, and a diode 291 that charges capacitor 290 from a drive power supply of drive power supply voltage Vc. When low-side switch 12 is on, LX terminal voltage Vx is approximately zero potential, so a charging current flows in the order of the drive power supply, diode 291, capacitor 290, node LX, and low-side switch 12, and capacitor 290 is charged to the drive power supply voltage Vc.

[0032] Fig. 2 is a flowchart showing the operation of the DC-DC converter 100 according to the first embodiment. Specifically, Fig. 2 is a flowchart showing the operation of the logic circuit 260 included in the control circuit 26. Fig. 2 shows states 1 to 4 as the states of the high-side switch 11 and the low-side switch 12.

[0033] In state 1, both the high-side drive signal Vd1 and the low-side drive signal Vd2 are at the L level, and both switches are off.

[0034] In state 2, the high-side drive signal Vd1 is at L level, the low-side drive signal Vd2 is at H level, the high-side switch 11 is off, and the low-side switch 12 is on.

[0035] In state 3, both the high-side drive signal Vd1 and the low-side drive signal Vd2 are at the L level, and both switches are off.

[0036] In state 4, the high-side drive signal Vd1 is at H level, the low-side drive signal Vd2 is at L level, the high-side switch 11 is on, and the low-side switch 12 is off.

[0037] FIG. 2 shows basic conditions under which the states of the high-side switch 11 and the low-side switch 12 transition from state 1 to state 2, state 3, state 4, state 1, . . .

[0038] 3 is a waveform diagram showing the operation of the DC-DC converter 100 according to the first embodiment. FIG. 3 is a waveform diagram showing the waveforms of the main parts of the DC-DC converter 100 according to the first embodiment, and shows, from top to bottom, the input DC voltage Ei, the feedback voltage Vfb, the reference voltage Vref, the first reference voltage Vr1, the enable signal EN, the target voltage Vr, the feedback voltage Vfb, the reference voltage Vref, the first comparison signal Vc1, the high-side drive signal Vd1, the on-time setting signal Vt1, the low-side drive signal Vd2, the inductor current Ix, the LX terminal voltage Vx, the second reference voltage Vr2, and the second comparison signal Vc2. Hereinafter, the operation of the DC-DC converter 100 according to the first embodiment shown in FIG. 1 (specifically, the operation of the control circuit 26) will be described with reference to FIGS. 2 and 3.

[0039] At time t0 in Fig. 3, when the input DC voltage Ei rises, the reference voltages and power supply voltages rise in the control unit 2, enabling each circuit to operate. In Fig. 2, in step S11, the high-side switch 11 and the low-side switch 12 are in State 1 (off, i.e., Vd1 = Vd2 = L). After this, the precharge circuit 21 charges the output capacitor 4, causing the feedback voltage Vfb to rise along with the output DC voltage Eo. While the feedback voltage Vfb is rising, there is a period in which the target voltage Vr is greater than the feedback voltage Vfb. However, because the enable signal EN is at L level, the states of the high-side switch 11 and the low-side switch 12 do not change. Therefore, until the feedback voltage Vfb reaches the first reference voltage Vr1, the answer in step S12 is No, and both the high-side switch 11 and the low-side switch 12 remain off. Consequently, the LX terminal voltage Vx rises along with the output DC voltage Eo.

[0040] At time t1, when the feedback voltage Vfb reaches the first reference voltage Vr1, i.e., when step S12 returns Yes, the enable signal EN goes high. As a result, in step S13, the logic circuit 260 raises the low-side drive signal Vd2 (Vd2=H) to transition the high-side switch 11 and the low-side switch 12 to State 2, turning on the low-side switch 12. At this time, the logic circuit 260 keeps the high-side drive signal Vd1 low (Vd1=L), maintaining the high-side switch 11 in the off state. With the low-side switch 12 turned on, the LX terminal voltage Vx becomes zero, the output DC voltage Eo is applied to the inductor 3, and the inductor current Ix flows through the output capacitor 4, the inductor 3, and the low-side switch 12 in that order. This current increases in the negative direction at a slope of Eo / L. When the low-side switch 12 is turned on, the pseudo ripple generating circuit 240 attempts to increase the target voltage Vr at a constant rate, but the target voltage Vr is clamped to the reference voltage Vref and is higher than the rising feedback voltage Vfb, and the first comparison signal Vc1 is at an H level.

[0041] Until the LX terminal voltage Vx reaches the second reference voltage Vr2, the answer in step S14 becomes No, and State 2 is maintained. At time t2, when the LX terminal voltage Vx reaches the second reference voltage Vr2 due to the inductor current Ix increasing in the negative direction, that is, when the answer in step S14 becomes Yes, the second comparison signal Vc2 becomes H level (Vc2=H). Furthermore, since the target voltage Vr is already higher than the feedback voltage Vfb (Vc1=H), that is, when the answer in step S15 becomes Yes, the high-side switch 11 and the low-side switch 12 transition to State 3.

[0042] In step S16, the logic circuit 260 lowers the low-side drive signal Vd2 to transition the high-side switch 11 and the low-side switch 12 to State 3, causing both the high-side switch 11 and the low-side switch 12 to enter State 3, where both are off (Vd1 = Vd2 = L). Because the inductor current Ix was flowing in the negative direction, the inertia of the inductor 3 causes the LX terminal voltage Vx to jump up, exceed the input DC voltage Ei, and the body diode of the high-side switch 11 becomes conductive. This state is a dead time to prevent both switches from being turned on simultaneously, and if there is no abnormality, the high-side switch 11 and the low-side switch 12 immediately transition to the next State 4. The pseudo ripple generation circuit 240 decreases the target voltage Vr from the reference voltage Vref at a constant rate proportional to the input / output voltage difference (Ei - Eo).

[0043] In step S17, the logic circuit 260 raises the high-side drive signal Vd1 (Vd1=H), causing the high-side drive circuit 28 to turn on the high-side switch 11. At this time, the logic circuit 260 leaves the low-side drive signal Vd2 at L level (Vd2=L), maintaining the low-side switch 12 in the OFF state. With the high-side switch 11 turned on, the LX terminal voltage Vx becomes the input DC voltage Ei, and the input-output voltage difference (Ei-Eo) is applied to the inductor 3. The inductor current Ix increases from a negative current to a positive current that flows in the order of the input power supply 10, the high-side switch 11, the inductor 3, and the output capacitor 4, and this current increases at a slope of (Ei-Eo) / L.

[0044] Until the on-time Ton of the high-side switch 11 reaches the predetermined time Tonx, step S18 returns to No, and State 4 is maintained. At time t3, when the on-time Ton reaches the predetermined time Tonx, i.e., when step S18 returns to Yes, the on-time setting signal Vt1 of the on-time setting circuit 261 goes high, the high-side switch 11 and the low-side switch 12 return to State 1, the high-side switch 11 turns off, and both the high-side switch 11 and the low-side switch 12 go off. Because the inductor current Ix was flowing in the forward direction, the inertia of the inductor 3 causes the LX terminal voltage Vx to drop sharply, fall below zero potential, and the body diode of the low-side switch 12 becomes conductive. Because the enable signal EN is high, the logic circuit 260 raises the low-side drive signal Vd2 to turn on the low-side switch 12, immediately transitioning the high-side switch 11 and the low-side switch 12 to the next State 2. The target voltage Vr of the pseudo ripple generating circuit 240 starts to rise.

[0045] In State 2 after time t3, the inductor current Ix decreases and eventually becomes a negative current, causing the LX terminal voltage Vx to exceed the second reference voltage Vr2 and the second comparison signal Vc2 to go high, but the target voltage Vr does not reach the feedback voltage Vfb, and the low-side switch 12 remains on, maintaining State 2. In other words, although the answer is Yes in step S14, the answer is No in step S15, and State 2 is maintained.

[0046] When the target voltage Vr reaches the feedback voltage Vfb at time t4, the output Vc1 of the comparator circuit 241 goes high, the high-side switch 11 and the low-side switch 12 transition to state 4 via state 3, the pseudo-ripple comparator circuit 24 sets the target voltage Vr to the reference voltage Vref and then decreases it, and the logic circuit 260 raises the high-side drive signal Vd1 to turn on the high-side switch 11. Thereafter, the operation of turning on the low-side switch 12 when the target voltage Vr rises and turning on the high-side switch 11 when the target voltage Vr falls is repeated.

[0047] In the steady-state switching operation of DC-DC converter 100, the on-time Ton of high-side switch 11 is fixed to a predetermined time Tonx set by on-time setting circuit 261, and target voltage Vr decreases from reference voltage Vref at a constant rate proportional to the input-output voltage difference (Ei - Eo). Therefore, reference voltage Vr1 at time t3 when target voltage Vr starts to increase is given by the following (Equation 2), where α is a proportionality constant.

[0048] Vr1=Vref-α・(Ei-Eo)・Tonx (Formula 2)

[0049] Next, the off-time Toff in the steady state is the time it takes for the target voltage Vr to change from the reference voltage Vr1 to the feedback voltage Vfb at a speed proportional to the output DC voltage Eo. Therefore, the proportionality constant is set to the same proportionality constant α as the on-time Ton, and the relationship shown in Equation 3 below holds.

[0050] Vfb-Vr1=α・Eo・Toff (Formula 3)

[0051] When Vr1 is eliminated from (Equation 2) and (Equation 3), the following relationship of (Equation 4) is established.

[0052] Vref-Vfb=α・(Ei-Eo)・Tonx-α・Eo・Toff (Formula 4)

[0053] On the other hand, since the increase and decrease in the inductor current Ix are balanced, the relationship of the following (Equation 5) holds.

[0054] (Ei-Eo)・Ton≒Eo・Toff (Formula 5)

[0055] Here, the reason we use "≒" is because there is a slight difference between both sides due to the voltage drop caused by parasitic impedance such as wiring resistance. From (Equation 2) to (Equation 4), the following relationship (Equation 6) holds.

[0056] Vfb≒Vref (Formula 6)

[0057] For example, if the load increases and the output DC voltage Eo decreases, the feedback voltage Vfb also decreases, and the off-time Toff shortens according to Equation 3, causing the output DC voltage Eo to increase. This negative feedback stabilizes the feedback voltage Vfb at the reference voltage Vref. In this way, the control circuit 26 fixes the on-time of the high-side switch 11 to a predetermined value and adjusts the off-time to control the output power of the DC-DC converter 100. The steady-state operation described above is an existing control method known as a hysteresis control method, in which the on-time is fixed, and is suitable for high-input specifications.

[0058] In the DC-DC converter 100 of the present disclosure, the inductor current starts flowing from a negative current when the high-side switch 11 is turned on, so that an inductor with strict inductance and current constraints can be used due to, for example, demands for miniaturization, thereby suppressing the peak current value when the high-side switch 11 is turned off. The key to achieving this is the following three points.

[0059] A precharge circuit 21 is provided to raise the output DC voltage in advance. When the switching operation starts, the low-side switch 12 is turned on first. Once the low-side switch 12 is turned on, the low-side switch 12 remains on until the current flowing from the inductor 3 to the low-side switch 12 reaches a predetermined value.

[0060] Due to these three points, when the high-side switch 11 is turned on, the inductor current always starts as a negative current below a predetermined value, and the on-time is set to a predetermined value, so that the peak current can be suppressed.

[0061] Furthermore, when the high-side switch 11 is an NMOS transistor as in the present disclosure, a bootstrap circuit 29 is required for its drive power supply. By turning on the low-side switch 12 first at the start of a switching operation, the bootstrap circuit 29 operates to ensure the drive voltage of the high-side switch 11.

[0062] Second Embodiment Figure 4 is a circuit diagram showing the configuration of a DC-DC converter 100A according to a second embodiment. In Figure 4, components having the same functions as those in the DC-DC converter 100 shown in Figure 1 are given the same numbers, and descriptions thereof will be omitted. The DC-DC converter 100A according to the second embodiment differs from the DC-DC converter 100 according to the first embodiment shown in Figure 1 in the precharge circuit provided in the control unit; to distinguish it from Figure 1, the control unit 2 is referred to as a control unit 2A, and the precharge circuit 21 is referred to as a precharge circuit 21A.

[0063] The precharge circuit 21A charges the output capacitor 4 via the high-side switch 11. Specifically, the precharge circuit 21A includes an inverter 211 that inverts the enable signal EN, a switch 212 that opens and closes in response to the enable signal EN and connects the high-side drive circuit 28 and the gate of the high-side switch 11, and a switch 213 that opens and closes in response to an inverted version of the enable signal EN and applies the startup voltage Vcc to the gate of the high-side switch 11.

[0064] With this configuration, when the enable signal EN is at H level, the switch 212 is turned on and the switch 213 is turned off, the drive signal Vg1 from the high-side drive circuit 28 is applied to the gate of the high-side switch 11, and the high-side switch 11 performs a switching operation together with the low-side switch 12. When the enable signal EN is at L level, that is, when the high-side switch 11 and the low-side switch 12 do not perform a switching operation as before startup, the switch 212 is turned off and the switch 213 is turned on, the startup voltage Vcc is applied to the gate of the high-side switch 11, and the output capacitor 4 is charged via the high-side switch 11.

[0065] As described above, in the second embodiment, the high-side switch 11 also serves as the NMOS transistor 210 of the precharge circuit 21 in the first embodiment. In other words, a dedicated switch for charging the output capacitor 4 before the start of a switching operation is not required, and the high-side switch 11 can also be used as a switch for charging the output capacitor 4. In the second embodiment, the high-side switch 11 also serves as a switch (transistor) for precharging the output capacitor 4, thereby enabling the control unit 2A to be made smaller.

[0066] (Other Embodiments) While the DC-DC converter according to the present disclosure has been described above based on Embodiments 1 and 2, the present disclosure is not limited to these embodiments. As long as they do not deviate from the spirit of the present disclosure, various modifications conceivable by those skilled in the art to the embodiments and other embodiments constructed by combining some of the components of the embodiments are also included within the scope of the present disclosure.

[0067] For example, while this disclosure has described a case where the on-time is fixed, a fixed on-time does not necessarily mean an on-time that is constantly adjusted by a feedback voltage to control the output DC voltage, but rather an on-time that is fixed to a predetermined value. Because it is difficult to dynamically and precisely control a short on-time when the input DC voltage is high, the on-time is fixed to a predetermined value and the off-time is controlled. For example, Patent Document 2 discloses a technology for setting the on-time to be inversely proportional to the input DC voltage. Furthermore, while this disclosure has described an example in which the technology is applied to a hysteresis control method, it may also be applied to a method in which the off-time is controlled using an error amplifier.

[0068] In the above-described embodiments, each component (particularly the control unit) included in the DC-DC converter may be configured with dedicated hardware, or may be realized by executing a software program suitable for each component. Each component may be realized by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0069] Some or all of the functions of the DC-DC converter according to the above embodiments are typically realized as an LSI, which is an integrated circuit. These may be individually implemented as single chips, or some or all of them may be integrated into a single chip. Furthermore, the integrated circuit is not limited to an LSI, and may be realized using a dedicated circuit or a general-purpose processor. It is also possible to use an FPGA (Field Programmable Gate Array) that can be programmed after LSI manufacturing, or a reconfigurable processor that can reconfigure the connections and settings of circuit cells within the LSI.

[0070] Furthermore, if an integrated circuit technology that can replace LSIs emerges due to advances in semiconductor technology or other derivative technologies, it is natural that each component included in the DC-DC converter can be integrated using that technology.

[0071] In addition, this disclosure also includes forms obtained by making various modifications to the embodiments that a person skilled in the art would think of, and forms realized by arbitrarily combining the components and functions in each embodiment within the scope of the present disclosure.

[0072] (Additional Notes) The above description of the embodiments discloses the following techniques.

[0073] (Technology 1) A DC-DC converter having a high-side switch, a low-side switch, an inductor, an output capacitor, and a control unit, which steps down an input DC voltage from an input power supply and outputs an output DC voltage from the output capacitor, wherein the control unit comprises: a pre-charge circuit which charges the output capacitor; a negative current detection circuit which outputs a negative current detection signal which indicates that a current flowing from the inductor to the low-side switch has reached a predetermined value; and a control circuit which performs a switching operation which alternately turns on the high-side switch and the low-side switch, wherein the control circuit starts the switching operation by turning on the low-side switch, and turns off the low-side switch after receiving the negative current detection signal.

[0074] According to this, the output DC voltage is increased in advance by a precharge circuit before starting the switching operation. By starting the switching operation by turning on the low-side switch, current is first reversed from the inductor to the low-side switch, i.e., a negative current can be passed. After this current reaches a predetermined value, the low-side switch is turned off and the high-side switch is turned on. Therefore, when the high-side switch is turned on, the inductor current always becomes a negative current below a predetermined value, and the inductor current increases from the negative current. Therefore, the maximum inductor current can be reduced by the amount of the negative current compared to when the inductor current increases from a zero state when the high-side switch is turned on. Therefore, even if the inductor has a small inductance, the maximum inductor current can be suppressed. In this way, the DC-DC converter disclosed herein can use inductors with strict inductance and current constraints, for example, due to demands for miniaturization.

[0075] (Technology 2) The DC-DC converter according to Technology 1, wherein the precharge circuit has a transistor connected between the input power supply and the output capacitor.

[0076] This allows the output capacitor to be charged via the transistor.

[0077] (Technology 3) The DC-DC converter according to Technology 1, wherein the precharge circuit charges the output capacitor via the high-side switch.

[0078] This eliminates the need for a dedicated switch for charging the output capacitor before the start of the switching operation, and allows the high-side switch to be used as a switch for charging the output capacitor.

[0079] (Technology 4) The DC-DC converter according to any one of Techniques 1 to 3, wherein the control unit further includes a start-up circuit that outputs an enable signal to the control circuit to permit the switching operation when the output DC voltage is equal to or greater than a predetermined value.

[0080] According to this, when the output capacitor is charged to a certain extent, the switching operation can be started by turning on the low-side switch.

[0081] (Technology 5) The DC-DC converter according to any one of Technologies 1 to 4, wherein the negative current detection circuit detects the potential at the connection point between the high-side switch and the low-side switch.

[0082] This makes it possible to detect the amount of negative current flowing by detecting the potential at the connection point between the high-side switch and the low-side switch, and to turn off the low-side switch after the negative current reaches a predetermined value.

[0083] (Technology 6) A DC-DC converter according to any one of Techniques 1 to 5, wherein the control circuit fixes the on-time of the high-side switch to a predetermined value and adjusts the off-time in order to control the output power of the DC-DC converter.

[0084] In this way, the on time may be fixed and the off time may be adjustable.

[0085] The DC-DC converter according to the present disclosure can be used as a power supply device that steps down an input DC voltage to obtain a desired output DC voltage.

[0086] REFERENCE SIGNS LIST 1 Input power supply 2, 2A Control unit 3 Inductor 4 Output capacitor 5, 26 Control circuit 11 High-side switch 12 Low-side switch 13 Freewheeling diode 20 Reference voltage source 21, 21A Precharge circuit 22 Feedback circuit 23 Start-up circuit 24 Pseudo ripple comparison circuit 25 Negative current detection circuit 27 Low-side drive circuit 28 High-side drive circuit 29 Bootstrap circuit 100, 100A DC-DC converter 210 NMOS transistor 211 Inverter 212, 213 Switch 220, 221 Resistor 240 Pseudo ripple generation circuit 241 Comparison circuit 260 Logic circuit 261 On-time setting circuit 290 Capacitor 291 Diode

Claims

1. A DC-DC converter having a high-side switch, a low-side switch, an inductor, an output capacitor, and a control unit, which steps down an input DC voltage from an input power supply and outputs an output DC voltage from the output capacitor, wherein the control unit comprises: a pre-charge circuit which charges the output capacitor; a negative current detection circuit which outputs a negative current detection signal which indicates that a current flowing from the inductor to the low-side switch has reached a predetermined value; and a control circuit which performs a switching operation to alternately turn on the high-side switch and the low-side switch, wherein the control circuit starts the switching operation by turning on the low-side switch, and turns off the low-side switch after receiving the negative current detection signal.

2. The DC-DC converter according to claim 1, wherein said precharge circuit comprises a transistor connected between said input power supply and said output capacitor.

3. The DC-DC converter according to claim 1, wherein said precharge circuit charges said output capacitor via said high-side switch.

4. The DC-DC converter according to any one of claims 1 to 3, wherein the control unit further comprises a start-up circuit that outputs an enable signal to the control circuit to permit the switching operation when the output DC voltage is equal to or higher than a predetermined value.

5. The DC-DC converter according to claim 1, wherein the negative current detection circuit detects the potential at the connection point between the high-side switch and the low-side switch.

6. The DC-DC converter according to any one of claims 1 to 5, wherein the control circuit fixes the on-time of the high-side switch to a predetermined value and adjusts the off-time in order to control the output power of the DC-DC converter.

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