Pixel array, mask apparatus, and pixel array manufacturing method

Abstract

The present application relates to a pixel array, a mask apparatus, and a pixel array manufacturing method. Each pixel comprises one first sub-pixel, one second sub-pixel, and one third sub-pixel. In one pixel, the first sub-pixel of the pixel is adjacent to the first sub-pixel of an adjacent pixel, the second sub-pixel of the pixel is adjacent to the second sub-pixel of the adjacent pixel, and the third sub-pixel of the pixel is adjacent to the third sub-pixel of the adjacent pixel, such that the first sub-pixels, the second sub-pixels, and the third sub-pixels are tightly nested, thus improving the pixel fill rate and prolonging the service life of the display apparatus.

Description

Pixel array, mask device and pixel array manufacturing method Technical Field

[0001] The present application relates to the technical field of display devices, and in particular to a pixel array, a mask device, and a pixel array manufacturing method. Background Art

[0002] Currently, organic light-emitting diodes (OLEDs) are widely used in various electronic devices due to their high contrast, faster response speed, and excellent viewing angle. With the rise of head-mounted display devices such as VR / AR, the requirements for the resolution and display quality of OLED panels are becoming increasingly higher.

[0003] Summary of the Invention

[0004] The present application provides a pixel array, comprising: a plurality of pixels, each of the pixels comprising a first sub-pixel, a second sub-pixel, and a third sub-pixel; in a pixel, the first sub-pixel of the pixel is adjacent to the first sub-pixel of an adjacent pixel, the second sub-pixel of the pixel is adjacent to the second sub-pixel of the adjacent pixel, and the third sub-pixel of the pixel is adjacent to the third sub-pixel of the adjacent pixel.

[0005] In one embodiment, two adjacent first sub-pixels and two adjacent second sub-pixels are arranged along the first direction or the second direction, and two adjacent third sub-pixels are arranged along the third direction, wherein the first direction is perpendicular to the second direction, and the angles between the third direction and the first direction and the second direction are both 45 degrees.

[0006] In one embodiment, the first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged in the form of a rectangle or a rectangle with rounded corners.

[0007] In one embodiment, the first sub-pixel is configured as a right triangle or a right triangle with rounded vertices, and two adjacent first sub-pixels are configured as a parallelogram or a parallelogram with rounded vertices.

[0008] In one embodiment, two adjacent first sub-pixels, two adjacent second sub-pixels, and two adjacent third sub-pixels are all arranged along the first direction or the second direction.

[0009] In one embodiment, the first sub-pixel, the second sub-pixel, and the third sub-pixel are all arranged in a square or a circle.

[0010] The present application further provides a display panel, which includes the pixel array as described above.

[0011] The present application also provides a mask device, which is used to manufacture the pixel array as described above. The mask device includes a first mask plate, a second mask plate and a third mask plate. The first mask plate is provided with multiple first evaporation holes, and the same first evaporation hole is used to form the light-emitting material of the first sub-pixel of at least two pixels; the second mask plate is provided with multiple second evaporation holes, and the same second evaporation hole is used to form the light-emitting material of the second sub-pixel of at least two pixels; the third mask plate is provided with multiple third evaporation holes, and the same third evaporation hole is used to form the light-emitting material of the third sub-pixel of at least two pixels.

[0012] In one embodiment, the first evaporation hole has a first symmetry axis, and the first symmetry axis of a portion of the first evaporation holes on the first mask plate is parallel to the first direction, so that two first sub-pixels are arranged at intervals along the first direction, and the first symmetry axis of another portion of the first evaporation holes is perpendicular to the first direction.

[0013] In one embodiment, the second evaporation hole is used to form the light-emitting material of the second sub-pixels of at least four pixels, and the second evaporation hole has a second symmetry axis, which is perpendicular to the first direction.

[0014] In one embodiment, the third evaporation hole is used to form the light-emitting material of the third sub-pixel of at least four pixels, and the third evaporation hole has a third symmetry axis, which is parallel to the third direction.

[0015] In one embodiment, the mask device also includes a fourth mask plate, which is provided with a plurality of fourth evaporation holes. The same fourth evaporation hole is used to form the light-emitting material of at least two of the first sub-pixels. The fourth evaporation hole is in the shape of a parallelogram or a parallelogram with rounded corners at each vertex.

[0016] The present application also provides a method for manufacturing a pixel array, including: forming a pixel defining layer on a substrate, wherein a plurality of pixel openings are provided in the pixel defining layer, and using the mask device as described above to evaporate a light-emitting material in the pixel openings to form a first sub-pixel, a second sub-pixel, and a third sub-pixel.

[0017] In one embodiment, the mask device is used to evaporate the light-emitting material in the pixel opening to form the first sub-pixel, the second sub-pixel and the third sub-pixel, including: using the first mask plate to evaporate the first light-emitting material in a portion of the pixel opening to form the first sub-pixel; using the second mask plate to evaporate the second light-emitting material in a portion of the pixel opening to form the second sub-pixel; using the third mask plate to evaporate the third light-emitting material in a portion of the pixel opening to form the third sub-pixel.

[0018] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0020] FIG1 is a schematic structural diagram of a pixel array and a mask device in one embodiment of the present application.

[0021] FIG. 2 is a schematic structural diagram of a first mask plate in an embodiment of the present application.

[0022] FIG3 is a schematic structural diagram of a second mask plate in an embodiment of the present application.

[0023] FIG4 is a schematic structural diagram of a third mask in an embodiment of the present application.

[0024] FIG. 5 is a schematic structural diagram of a fourth mask plate in an embodiment of the present application.

[0025] FIG6 is a schematic structural diagram of a pixel array and a mask device in an embodiment of the present application.

[0026] FIG. 7 is a schematic structural diagram of a pixel array and a mask device in an embodiment of the present application.

[0027] FIG8 is a schematic diagram of the structure of a pixel array and a mask device in one embodiment of the present application.

[0028] Description of reference numerals:

[0029] 10, pixel; 101, first sub-pixel; 102, second sub-pixel; 103, third sub-pixel;

[0030] 20, first mask plate; 201, first evaporation hole; 202, first symmetry axis;

[0031] 30, second mask plate; 301, second evaporation hole; 302, second symmetry axis;

[0032] 40, third mask plate; 401, third evaporation hole; 3402, third symmetry axis;

[0033] 50, fourth mask plate; 501, fourth evaporation hole;

[0034] X, first direction; Y, second direction; Z, third direction. DETAILED DESCRIPTION

[0035] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of devices consistent with certain aspects of the present application, as detailed in the appended claims.

[0036] Usually in the evaporation technology of organic light-emitting diodes, a fine metal mask (FMM) is used to evaporate the red, green and blue sub-pixel light-emitting layer materials, which determines the light-emitting area, position and spacing of each sub-pixel. The minimum feature size and the minimum spacing between apertures of widely used deposition masks are large (>20 microns), and the highest resolution that can be achieved is about 650PPI. In order to mitigate the screen door effect, head-mounted display devices such as VR / AR require a resolution of more than 1000PPI. Therefore, the opening size and fine etching capability of the mask limit the pixel density and pixel fill rate, thereby reducing the aperture rate and resolution of the display device, thereby affecting the display performance of the display device.

[0037] The present application provides a pixel array, a mask device, and a pixel array manufacturing method, which can solve the problem of limiting the improvement of the aperture ratio and resolution of a display device due to process limitations.

[0038] The present application provides a pixel array, comprising a plurality of pixels 10, each pixel 10 comprising a first sub-pixel 101, a second sub-pixel 102, and a third sub-pixel 103. In a pixel 10, the first sub-pixel 101 of the pixel 10 is adjacent to the first sub-pixel 101 of the adjacent pixel 10, the second sub-pixel 102 of the pixel 10 is adjacent to the second sub-pixel 102 of the adjacent pixel 10, and the third sub-pixel 103 of the pixel 10 is adjacent to the third sub-pixel 103 of the adjacent pixel 10.

[0039] The sub-pixels between two adjacent pixels 10 are adjacent to each other, making the structure between pixels 10 more compact, which can effectively improve the aperture ratio and resolution of the display device. Referring to Figure 1, the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 are arranged in a gradient offset along the first direction X or the second direction Y, so that the sub-pixels are staggered, which can effectively reduce the graininess and jaggedness caused by the aggregation of identical sub-pixels.

[0040] It should be noted that the spacing between the first sub-pixel 101 , the second sub-pixel 102 and the third sub-pixel 103 is determined based on display effect evaluation and manufacturing process limitations of the pixel definition layer of the display substrate, which will not be elaborated here.

[0041] In some embodiments, two adjacent first sub-pixels 101 and two adjacent second sub-pixels 102 are arranged along the first direction X or the second direction Y, and two adjacent third sub-pixels 103 are arranged along the third direction Z, wherein the first direction X is perpendicular to the second direction Y, and the angles between the third direction Z and the first direction X and the second direction Y are both 45 degrees.

[0042] 1 , between two adjacent first sub-pixels 101 , between two adjacent second sub-pixels 102 , and between two adjacent third sub-pixels 103 of two pixels 10 , there are first and second sub-forms.

[0043] For two adjacent first sub-pixels 101: the first sub-form is that the two first sub-pixels 101 are arranged at intervals along the first direction X, which in this embodiment can be understood as the two first sub-pixels 101 being arranged in the horizontal direction. The second sub-form is that the two first sub-pixels 101 are arranged at a certain distance along the second direction Y (hereinafter referred to as the interval arrangement), which in this embodiment can be understood as the two first sub-pixels 101 being arranged in the vertical direction. The first sub-form and the second sub-form are both staggered in the first direction X and the second direction Y. The final form after the staggered arrangement can be referred to as the first combined form.

[0044] For two adjacent second sub-pixels 102: the first sub-form is that the two second sub-pixels 102 are spaced apart along the first direction X, which in this embodiment can be understood as the two second sub-pixels 102 being arranged horizontally. The second sub-form is that the two second sub-pixels 102 are spaced apart along the second direction Y, which in this embodiment can be understood as the two second sub-pixels 102 being arranged vertically. The final form presented by two groups of first sub-forms spaced apart along the second direction Y and two groups of second sub-forms spaced apart along the first direction X is the same. This final form can be referred to as a second combined form (i.e., a combination of four second sub-pixels 102). The second combined form is arranged with a gradient offset in the first direction X and the second direction Y.

[0045] For two adjacent third sub-pixels 103: the first sub-form and the second sub-form are both that the two third sub-pixels 103 are arranged at intervals along the third direction Z, and the final forms presented by the two groups of first sub-forms arranged at intervals along the third direction Z and the two groups of second sub-forms arranged at intervals along the third direction Z are consistent. The final form can be called a third combined form (i.e., a combination of four third sub-pixels 103), and the third combined form is arranged with a gradient offset in the first direction X and the second direction Y.

[0046] First, since the human eye is more sensitive to the image quality in the horizontal or vertical direction, but less sensitive to the image quality in the direction with an angle of 45 degrees with the horizontal direction, the angle between the third direction Z and the first direction X and the second direction Y in this application is 45 degrees, so that the third sub-pixel 103 as a whole is tilted 45 degrees compared to the first sub-pixel 101 and the second sub-pixel 102, thereby improving the overall display quality. At the same time, this setting can also avoid the appearance of rainbows at the edge of the picture, further improving the display quality.

[0047] Secondly, due to the arrangement characteristics of the first sub-pixel 101 , the second sub-pixel 102 and the third sub-pixel 103 , the structure of each pixel 10 can be made compact, thereby improving the fill rate of the pixel 10 and thereby increasing the service life of the display device.

[0048] In some embodiments, the first sub-pixel 101 , the second sub-pixel 102 , and the third sub-pixel 103 may be arranged in a rectangular shape or a rectangular shape with rounded corners.

[0049] 1 , when the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 are all configured as regular rectangles with rounded corners, their corresponding mask openings are also correspondingly designed as regular rectangles with rounded corners. This configuration increases the mask opening size relative to that at the same resolution, helps reduce the difficulty of manufacturing the metal mask and improve its stability, thereby reducing color mixing defects generated during use and improving the yield of the display panel.

[0050] In some embodiments, the first sub-pixel 101 may be configured as a right triangle or a right triangle with rounded vertices, and two adjacent first sub-pixels 101 may be configured as a parallelogram or a parallelogram with rounded vertices.

[0051] 6 , in this embodiment, the second sub-pixel 102 and the third sub-pixel 103 have the same shape, i.e., both are rectangles or rectangles with rounded corners, and the second sub-pixel 102 and the third sub-pixel 103 are arranged in the same manner, i.e., both are gradient offset arrangements. At this time, the first sub-pixel 101 is set to a triangle, and the two adjacent triangles form a parallelogram, which can effectively fill the gaps between the second sub-pixel 102 and the third sub-pixel 103, and between the second sub-pixels 102 and the third sub-pixel 103, so that the pixels 10 are closely nested with each other, which helps to improve the pixel fill rate, thereby improving the service life of the display device.

[0052] In some embodiments, referring to FIG. 7 , two adjacent first sub-pixels 101 , two adjacent second sub-pixels 102 , and two adjacent third sub-pixels 103 are arranged along the first direction X or the second direction Y, and the first sub-pixels 101 , the second sub-pixels 102 , and the third sub-pixels 103 are all arranged in a square or a circle.

[0053] In some embodiments, referring to FIG7 , two adjacent first sub-pixels 101, two adjacent second sub-pixels 102, and two adjacent third sub-pixels 103 between two pixels 10 each have a first sub-form and a second sub-form. The first sub-form is that the two first sub-pixels 101, the two second sub-pixels 102, and the two third sub-pixels 103 are spaced apart along the first direction X (i.e., the two sub-pixels 101 / 102 / 103 spaced apart along the horizontal direction in FIG7 ), and the second sub-form is that the two first sub-pixels 101, the two second sub-pixels 102, and the two third sub-pixels 103 are spaced apart along the second direction Y (i.e., the two sub-pixels 101 / 102 / 103 spaced apart along the vertical direction in FIG7 ). The first sub-form and the second sub-form are both staggered in the first direction X and the second direction Y.

[0054] Specifically, the shapes and spacings of the first sub-pixel 101 , the second sub-pixel 102 and the third sub-pixel 103 are determined based on display effect evaluation and manufacturing process limitations of the pixel definition layer of the display substrate, and can be circular or polygonal, but not limited thereto.

[0055] When the shapes of the first sub-pixel 101, the second sub-pixel 102 and the third sub-pixel 103 are all circular, and the first sub-pixel 101, the second sub-pixel 102 and the third sub-pixel 103 are arranged in the same manner, so that the mask openings corresponding to the three sub-pixels are exactly the same, the evaporation of the light-emitting materials of the second sub-pixel 102 and the third sub-pixel 103 can be achieved by translating the mask of the first sub-pixel 101, thereby saving costs.

[0056] In some embodiments, referring to FIG8 , four first sub-pixels 101 form a first sub-pixel group, four second sub-pixels 102 form a second sub-pixel group, and four third sub-pixels 103 form a third sub-pixel group. The arrangement of the pixel groups in the nth row is the second sub-pixel 102 group, the third sub-pixel 103 group, the first sub-pixel 101 group, the second sub-pixel 102 group... The arrangement of the pixel groups in the n+1th row is the third sub-pixel group, the first sub-pixel group, the second sub-pixel group, the third sub-pixel group... The center points of the pixels in each row are on the same horizontal line. Although FIG8 shows that a row of pixel groups includes 4 pixel groups, the present application does not limit the number of pixel groups included in a row of pixel groups. The pixel groups not shown in the above ellipsis can be periodically arranged according to the corresponding pixel group arrangement in FIG8 . Wherein, n is a positive integer greater than or equal to 1. In some embodiments, n can be an odd number, and n+1 can be an even number. In some embodiments, n can be an even number, and n+1 can be an odd number.

[0057] Specifically, the shapes and spacings of the first sub-pixel 101 , the second sub-pixel 102 and the third sub-pixel 103 are determined based on display effect evaluation and manufacturing process limitations of the pixel definition layer of the display substrate, and can be circular or polygonal, but not limited thereto.

[0058] Furthermore, when the shapes of the first sub-pixel 101, the second sub-pixel 102 and the third sub-pixel 103 are all squares, and the arrangement of the first sub-pixel 101, the second sub-pixel 102 and the third sub-pixel 103 is the same, so that the mask openings corresponding to the three sub-pixels are exactly the same, the evaporation of the light-emitting materials of the second sub-pixel 102 and the third sub-pixel 103 can be achieved by translating the mask of the first sub-pixel 101, thereby saving costs.

[0059] The present application also provides a display panel, which includes the pixel array described in any one of the above embodiments.

[0060] The display panel can improve the resolution of a display device using the display panel, thereby providing a display device with real high resolution. At the same time, due to the design of the pixel array, the structure between the pixels 10 is compact and has a high fill rate, thereby increasing the service life of the display panel.

[0061] The present application further provides a mask device for manufacturing the pixel array of any of the above embodiments. As shown in Figures 2 to 4, the mask device includes a first mask plate 20, a second mask plate 30, and a third mask plate 40. The first mask plate 20 is provided with a plurality of first evaporation holes 201, and the same first evaporation hole 201 is used to form the light-emitting material of the first sub-pixels 101 of at least two pixels 10. The second mask plate 30 is provided with a plurality of second evaporation holes 301, and the same second evaporation hole 301 is used to form the light-emitting material of the second sub-pixels 102 of at least two pixels 10. The third mask plate 40 is provided with a plurality of third evaporation holes 401, and the same third evaporation hole 401 is used to form the light-emitting material of the third sub-pixels 103 of at least two pixels 10. The first evaporation holes 201 can be rectangular or have rounded corners, and the second evaporation holes 301 and the third evaporation holes 401 can each be square or have rounded corners.

[0062] In some embodiments, referring to FIG. 2 , the first evaporation holes 201 have a first axis of symmetry 202 . The first axes of symmetry 202 of a portion of the first evaporation holes 201 on the first mask plate 20 are parallel to the first direction X, so that the two first sub-pixels 101 are arranged at intervals along the first direction X. The first axes of symmetry 202 of another portion of the first evaporation holes 201 are perpendicular to the first direction X, so that the two first sub-pixels 101 are arranged sequentially along the second direction Y.

[0063] 3 , the second evaporation hole 301 is used to form the light-emitting material of the second sub-pixels 102 of at least four pixels 10 , and the second evaporation hole 301 has a second symmetric axis 302 , which is perpendicular to the first direction X.

[0064] In some embodiments, referring to FIG. 4 , the third evaporation hole 401 is used to form the light-emitting material of the third sub-pixels 103 of at least four pixels 10 . The third evaporation hole 401 has a third symmetry axis 402 , which is parallel to the third direction.

[0065] In some embodiments, referring to FIG2 , the size of the first evaporation hole 201 is A1*A2, and the minimum spacing between two adjacent first evaporation holes 201 is A3. A1 and A2 may be the width and length of the first evaporation hole 201, respectively. For example, when the first evaporation hole 201 is rectangular, A1 and A2 are the width and length of the rectangle, respectively. Compared with the same resolution, the area of ​​the first evaporation hole 201 is increased by about 1 times. Referring to FIG3 , the size of the second evaporation hole 301 is B1*B2, B1=B2, and the minimum spacing between two adjacent second evaporation holes 301 is B3. B1 and B2 may be the length of the second evaporation hole 301, respectively. For example, when the second evaporation hole 301 is square, B1 and B2 are the length of the square, respectively. Compared with the same resolution, the area of ​​the second evaporation hole 301 is increased by about 3 times. Referring to Figure 4 , the dimensions of the third evaporation holes 401 are C1*C2, where C1=C2. The minimum spacing between two adjacent third evaporation holes 401 is C3. C1 and C2 can each be the length of the third evaporation holes 401. For example, when the third evaporation holes 401 are square, C1 and C2 can each be the length of the square. Compared to images with the same resolution, the area of ​​the third evaporation holes 401 is approximately three times larger.

[0066] The larger the sizes of the first evaporation holes 201, the second evaporation holes 301 and the third evaporation holes 401, the more conducive it is to reducing the difficulty of manufacturing the first mask plate 20, the second mask plate 30 and the third mask plate 40, and improving their stability, thereby reducing the color mixing defects caused during the use of the mask plates.

[0067] Furthermore, the spacing between two adjacent first sub-pixels 101, the spacing between two adjacent second sub-pixels 102, and the spacing between two adjacent third sub-pixels 103 are in the relationship of A3<B3<C3. This setting can maximize the compactness of the pixel 10 structure and the pixel fill rate.

[0068] In some embodiments, referring to FIG. 5 , the mask device further includes a fourth mask plate 50 , the fourth mask plate 50 is provided with a plurality of fourth evaporation holes 501 , and the same fourth evaporation hole 501 is used to form the light-emitting material of at least two first sub-pixels 101 , and the fourth evaporation hole 501 is in the shape of a parallelogram or a parallelogram with rounded corners at each vertex.

[0069] In this embodiment, referring to FIG5 and FIG6 , since the first sub-pixel 101 is in a triangular shape, and the parallelogram formed by two adjacent triangles is more conducive to filling the gap between the second sub-pixel 102 and the third sub-pixel 103, the fourth mask 50 can be used to form the required pattern when forming the first sub-pixel 101 during the display panel manufacturing process. This improves the pixel fill rate and increases the service life of the display panel.

[0070] The present application further provides a method for fabricating a pixel array, wherein a pixel definition layer (PDL) is formed on a substrate, wherein a plurality of pixel openings are provided in the PDL. A light-emitting material is evaporated in the pixel openings using a mask device according to any of the above embodiments, thereby forming a first sub-pixel 101, a second sub-pixel 102, and a third sub-pixel 103. In some embodiments, the light-emitting material may be an organic light-emitting material, such as a thermally activated delayed fluorescence (TADF) material, which is not limited in the present application.

[0071] In some embodiments, a masking device is used to evaporate a light-emitting material within a pixel opening to form the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103. This includes using a first mask 20 to evaporate a first light-emitting material within a portion of the pixel opening to form the first sub-pixel 101. Using a second mask 30 to evaporate a second light-emitting material within a portion of the pixel opening to form the second sub-pixel 102. Using a third mask 40 to evaporate a third light-emitting material within a portion of the pixel opening to form the third sub-pixel 103.

[0072] Specifically, referring to FIG. 1 , the pixel array contained or shown therein can realize the evaporation of the light-emitting materials of the first sub-pixel 101 , the second sub-pixel 102 and the third sub-pixel 103 through the first mask 20 , the second mask 30 and the third mask 40 , respectively.

[0073] 6 , the pixel array contained or shown therein can realize the evaporation of the light-emitting materials of the first sub-pixel 101 , the second sub-pixel 102 and the third sub-pixel 103 respectively through the fourth mask 50 , the second mask 30 and the third mask 40 .

[0074] 7 , the pixel array contained or shown therein can achieve vapor deposition of the light-emitting materials of the first sub-pixel 101 , the second sub-pixel 102 and the third sub-pixel 103 by translation of the first mask plate 20 or other operations, which can effectively save production costs.

[0075] 8 , the pixel array contained or shown therein can achieve vapor deposition of the light-emitting materials of the first sub-pixel 101 , the second sub-pixel 102 and the third sub-pixel 103 by translating the second mask plate 30 or performing other operations, which can effectively save production costs.

[0076] In some embodiments, the first luminescent material, the second luminescent material, and the third luminescent material can respectively form one of a blue light source, a red light source, and a green light source, and the light sources formed by the first luminescent material, the second luminescent material, and the third luminescent material are different from each other.

[0077] The technical solution provided by the embodiments of the present application may include the following beneficial effects: the present application sets a plurality of pixels, each pixel including a first sub-pixel, a second sub-pixel and a third sub-pixel. In a pixel, the first sub-pixel of the pixel is adjacent to the first sub-pixel of the adjacent pixel, the second sub-pixel of the pixel is adjacent to the second sub-pixel of the adjacent pixel, and the third sub-pixel of the pixel is adjacent to the third sub-pixel of the adjacent pixel. This enables the first sub-pixel, the second sub-pixel and the third sub-pixel to be tightly nested, thereby improving the pixel fill rate and further improving the service life of the display device.

[0078] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. Unless otherwise defined, technical or scientific terms used in this application should have the ordinary meaning understood by a person of ordinary skill in the art to which this application belongs. The use of "first," "second," and similar terms in this specification and claims does not indicate any order, quantity, or importance, but is simply used to distinguish different components. Similarly, words such as "a" or "an" do not indicate a quantitative limitation, but rather indicate the presence of at least one. If only "a" is referred to, this will be separately stated. "Multiple" or "several" means two or more. Unless otherwise indicated, words such as "front," "rear," "lower," and / or "upper" are for convenience only and are not limited to a single location or spatial orientation. Words such as "include" or "comprising" mean that the elements or objects listed before "include" or "comprising" include the elements or objects listed after "include" or "comprising" and their equivalents, and do not exclude other elements or objects. "Connected" or "connected" and similar words are not limited to physical or mechanical connections, but can also include electrical connections, whether direct or indirect. As used in this specification and the appended claims, the singular forms "a," "the," and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0079] The specific embodiments described herein are merely illustrative of the spirit of the present application. Those skilled in the art may make various modifications, additions, or substitute similar methods for the described specific embodiments without departing from the spirit of the present application or exceeding the scope defined by the appended claims.

[0080] The technical features of the above embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

Claims

1. A pixel array, comprising: A plurality of pixels, each of the pixels comprising a first sub-pixel, a second sub-pixel and a third sub-pixel; In a pixel, a first subpixel of the pixel is adjacent to a first subpixel of an adjacent pixel, a second subpixel of the pixel is adjacent to a second subpixel of an adjacent pixel, and a third subpixel of the pixel is adjacent to a third subpixel of an adjacent pixel.

2. The pixel array according to claim 1, characterized in that: Two adjacent first sub-pixels and two adjacent second sub-pixels are arranged along the first direction or the second direction, and two adjacent third sub-pixels are arranged along the third direction. The first direction is perpendicular to the second direction, and the angles between the third direction and the first direction and the second direction are both 45 degrees.

3. The pixel array according to claim 2, characterized in that: The first sub-pixel, the second sub-pixel and the third sub-pixel are arranged in the form of a rectangle or a shape in which each corner of the rectangle is rounded.

4. The pixel array according to claim 2, characterized in that: The first sub-pixels are arranged in a right triangle or a figure with rounded vertices, and two adjacent first sub-pixels are arranged in a parallelogram or a figure with rounded vertices of each parallelogram.

5. The pixel array according to claim 1, characterized in that: Two adjacent first sub-pixels, two adjacent second sub-pixels, and two adjacent third sub-pixels are all arranged along the first direction or the second direction.

6. The pixel array according to claim 5, characterized in that: The first sub-pixel, the second sub-pixel and the third sub-pixel are all arranged in a square or a circle.

7. A display panel, characterized in that: The display panel comprises the pixel array according to any one of claims 1 to 6.

8. A mask device, characterized in that: The mask device is used to manufacture the pixel array according to any one of claims 1 to 6, and the mask device comprises a first mask plate, a second mask plate and a third mask plate, The first mask plate is provided with a plurality of first evaporation holes, and the same first evaporation hole is used to form the light-emitting material of the first sub-pixels of at least two pixels; The second mask plate is provided with a plurality of second evaporation holes, and the same second evaporation hole is used to form second sub-pixel light-emitting materials of at least two pixels; The third mask plate is provided with a plurality of third evaporation holes, and the same third evaporation hole is used to form the light-emitting material of the third sub-pixel of at least two pixels.

9. The mask device according to claim 8, characterized in that: The first evaporation hole has a first symmetry axis, and the first symmetry axis of a portion of the first evaporation holes on the first mask plate is parallel to the first direction, so that two first sub-pixels are arranged at intervals along the first direction, and the first symmetry axis of another portion of the first evaporation holes is perpendicular to the first direction.

10. The mask device according to claim 8, characterized in that: The second evaporation holes are used to form light-emitting materials of second sub-pixels of at least four pixels, and the second evaporation holes have a second symmetry axis, which is perpendicular to the first direction.

11. The mask device according to claim 8, characterized in that: The third evaporation holes are used to form light-emitting materials of third sub-pixels of at least four pixels, and the third evaporation holes have a third symmetry axis, which is parallel to the third direction.

12. The mask device according to claim 8, characterized in that: The mask device also includes a fourth mask plate, which is provided with a plurality of fourth evaporation holes. The same fourth evaporation hole is used to form the light-emitting material of at least two first sub-pixels. The fourth evaporation hole is in the shape of a parallelogram or a parallelogram with rounded vertices.

13. A method for manufacturing a pixel array, characterized in that: A pixel defining layer is formed on a substrate, wherein a plurality of pixel openings are provided in the pixel defining layer, and a light-emitting material is evaporated in the pixel openings using the mask device described in any one of claims 8 to 12, thereby forming a first sub-pixel, a second sub-pixel and a third sub-pixel.

14. The method for manufacturing a pixel array according to claim 13, characterized in that: Using the mask device to evaporate a light-emitting material in the pixel opening to form the first sub-pixel, the second sub-pixel, and the third sub-pixel, comprising: Using the first mask plate, evaporating a first light-emitting material in a portion of the pixel opening to form the first sub-pixel; Using the second mask plate, evaporating a second light-emitting material in a portion of the pixel opening to form the second sub-pixel; The third light-emitting material is evaporated in a portion of the pixel opening by using the third mask plate to form the third sub-pixel.

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