Optical detection device and electronic apparatus

Abstract

Provided is an optical detection device having a lamination structure in which a first substrate provided with a plurality of optical detection elements and a second substrate on which a plurality of transistors are mounted are laminated, the first substrate having an area smaller than that of the second substrate.

Description

Photodetector and electronic equipment

[0001] The present disclosure relates to photodetection devices and electronic devices.

[0002] In recent years, imaging devices with a three-dimensional structure have been proposed to further reduce the size of imaging devices (photodetection devices). An example of such a device is the imaging device disclosed in Patent Document 1. The technology disclosed in Patent Document 1 achieves the miniaturization of the imaging device by stacking and bonding a first substrate on which a plurality of imaging elements (photodetection elements) are provided and a second substrate on which a readout circuit including a plurality of pixel transistors that read pixel signals from each imaging element is provided.

[0003] International Publication No. 2020 / 066683

[0004] Since electrical connection between the two substrates must be ensured simultaneously with bonding the two substrates, highly accurate alignment of the two substrates is required. However, in conventional techniques, the allowable amount of misalignment is very small, making alignment extremely difficult. As a result, the yield of imaging devices (photodetector devices) decreases and it is difficult to suppress increases in manufacturing costs and time.

[0005] Therefore, the present disclosure proposes a photodetector and electronic equipment that can easily perform alignment when bonding substrates.

[0006] According to the present disclosure, there is provided a photodetection device having a stacked structure in which a first substrate on which a plurality of photodetection elements are provided and a second substrate on which a plurality of transistors are mounted are stacked, and the first substrate has a smaller area than the second substrate.

[0007] Furthermore, according to the present disclosure, there is provided an electronic device equipped with a photodetector, wherein the photodetector has a stacked structure in which a first substrate on which a plurality of photodetection elements are provided and a second substrate on which a plurality of transistors are mounted are stacked, and the first substrate has a smaller area than the second substrate.

[0008] FIG. 2 is an explanatory diagram showing an example of a planar configuration of an imaging device according to an embodiment of the present disclosure. FIG. 3 is an explanatory diagram showing an example of a planar configuration of an imaging device according to an embodiment of the present disclosure. FIG. 4 is an explanatory diagram showing an example of a planar configuration of an imaging device according to an embodiment of the present disclosure. FIG. 5 is an explanatory diagram showing an example of a cross-sectional configuration of an imaging device according to an embodiment of the present disclosure. FIG. 6 is an explanatory diagram showing an example of a cross-sectional configuration of an imaging device according to an embodiment of the present disclosure. FIG. 7 is an explanatory diagram showing an example of a planar configuration of a substrate of an imaging device according to an embodiment of the present disclosure. FIG. 8 is an explanatory diagram showing details of a manufacturing method of an imaging device according to an embodiment of the present disclosure. FIG. 9 is an explanatory diagram showing details of a manufacturing method of an imaging device according to an embodiment of the present disclosure. FIG. 10 is an explanatory diagram showing an example of a planar configuration of an imaging device according to an embodiment of the present disclosure. FIG. 10 is an explanatory diagram showing an example cross-sectional configuration of an imaging device according to a fifth modified example of the second embodiment of the present disclosure. FIG. 11 is an explanatory diagram showing an example cross-sectional configuration of an imaging device according to a sixth modified example of the second embodiment of the present disclosure. FIG. 12 is an explanatory diagram showing an example planar configuration of a substrate of an imaging device according to the sixth modified example of the second embodiment of the present disclosure. FIG. 13 is an explanatory diagram (part 2) showing an overview of a manufacturing method of an imaging device according to a comparative example. FIG. 14 is an explanatory diagram (part 1) showing an overview of a manufacturing method of an imaging device according to a third embodiment of the present disclosure. FIG. 15 is an explanatory diagram (part 2) showing an overview of a manufacturing method of an imaging device according to a third embodiment of the present disclosure. FIG. 16 is an explanatory diagram showing an example configuration of an imaging device according to a third embodiment of the present disclosure. FIG. 17 is a block diagram showing an example of a schematic functional configuration of a smartphone. FIG. 18 is a block diagram showing an example of a schematic configuration of a vehicle control system. FIG. 19 is an explanatory diagram showing an example of installation positions of an outside vehicle information detection unit and an imaging unit.

[0009] Preferred embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In this specification and the drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted. Furthermore, in this specification and the drawings, multiple components having substantially the same or similar functional configurations may be distinguished by adding different letters after the same reference numeral. However, when there is no particular need to distinguish between multiple components having substantially the same or similar functional configurations, only the same reference numerals will be used.

[0010] The drawings referred to in the following description are for explaining and facilitating understanding of one embodiment of the present disclosure, and for the sake of clarity, the shapes, dimensions, ratios, etc. shown in the drawings may differ from the actual ones. Furthermore, the design of the devices shown in the drawings can be modified as appropriate, taking into consideration the following description and known technologies.

[0011] The drawings referred to in the following description are for explaining and facilitating understanding of one embodiment of the present disclosure, and for the sake of clarity, the shapes, dimensions, ratios, etc. shown in the drawings may differ from the actual ones. Furthermore, the design of the devices shown in the drawings can be modified as appropriate, taking into consideration the following description and known technologies.

[0012] In the following description, "electrically connect" means connecting a plurality of elements directly or indirectly via another element.

[0013] In the following description, a semiconductor chip refers to an individual chip obtained by cutting a semiconductor wafer, and a substrate refers to a semiconductor wafer such as a silicon wafer, a silicon germanium wafer, or a germanium wafer, and a semiconductor chip obtained by cutting them, unless otherwise specified.

[0014] The description will be given in the following order: 1. Schematic configuration of imaging device 2. Background 3. First embodiment 3.1 Overview 3.2 Detailed configuration 3.3 Manufacturing method 4. Second embodiment 4.1 Detailed configuration 4.2 Modified example 5. Third embodiment 5.1 Background 5.2 Manufacturing method 5.3 Detailed configuration 6. Summary 7. Application examples 7.1 Application example to smartphones 7.2 Application example to mobile objects 8. Supplementary information

[0015] <<1. Schematic Configuration of Imaging Device>> First, before describing details of an embodiment of the present disclosure, a schematic configuration of an imaging device 1 (an example of a photodetector) according to an embodiment of the present disclosure will be described with reference to Figures 1 and 2. Figure 1 is an explanatory diagram showing an example configuration of the imaging device 1 according to an embodiment of the present disclosure. Figure 2 is an explanatory diagram showing an example configuration of the pixel 12 and readout circuit 22 shown in Figure 1.

[0016] As shown in Fig. 1, the imaging device 1 has three substrates (a first substrate 10, a second substrate 20, and a third substrate 30). The imaging device 1 has a three-dimensional structure (a laminated structure) formed by bonding (joining) the three substrates (the first substrate 10, the second substrate 20, and the third substrate 30). The first substrate 10, the second substrate 20, and the third substrate 30 are laminated in this order. Note that in the embodiment of the present disclosure, the imaging device 1 is not limited to a laminate of three substrates, and may be, for example, a laminate of the first substrate 10 and the second substrate 20.

[0017] In detail, the first substrate 10 has a plurality of pixels 12 that perform photoelectric conversion and are provided on a semiconductor substrate 11. The plurality of pixels 12 are provided in a pixel region (array region) 13 on the first substrate 10 in a matrix.

[0018] More specifically, the second substrate 20 has a readout circuit 22 provided on the semiconductor substrate 21, which outputs pixel signals based on the charges output from the pixels 12. The second substrate 20 has a plurality of pixel drive lines 23 extending in the row direction and a plurality of vertical signal lines 24 extending in the column direction.

[0019] More specifically, the third substrate 30 has a logic circuit 32 that processes pixel signals and is provided on a semiconductor substrate 31. The logic circuit 32 has, for example, a vertical drive circuit 33, a column signal processing circuit 34, a horizontal drive circuit 35, and a system control circuit 36. The logic circuit 32 (specifically, the horizontal drive circuit 35) outputs an output voltage Vout for each pixel 12 to the outside.

[0020] More specifically, the vertical drive circuit 33, for example, sequentially selects a plurality of pixels 12 row by row. The column signal processing circuit 34, for example, performs analog-to-digital conversion and correlated double sampling (CDS) on pixel signals output from each pixel 12 in the row selected by the vertical drive circuit 33. The column signal processing circuit 34 extracts the signal level of the pixel signal by performing CDS processing, for example, and holds pixel data corresponding to the amount of light received by each pixel 12. The horizontal drive circuit 35, for example, sequentially outputs the pixel data held in the column signal processing circuit 34 to the outside. The system control circuit 36, for example, controls the driving of each block (the vertical drive circuit 33, the column signal processing circuit 34, and the horizontal drive circuit 35) in the logic circuit 32.

[0021] 2 shows an example of the pixel 12 and the readout circuit 22. In FIG. 2, the pixel 12 is electrically connected to one readout circuit 22.

[0022] As shown in FIG. 2 , the pixel 12 includes, for example, a photoelectric conversion unit 101, a transfer transistor 102 electrically connected to the photoelectric conversion unit 101, and a floating diffusion 103 that temporarily stores charge output from the photoelectric conversion unit 101 via the transfer transistor 102. The photoelectric conversion unit 101 performs photoelectric conversion to generate charge according to the amount of received light. The cathode of the photoelectric conversion unit 101 is electrically connected to the source of the transfer transistor 102, and the anode of the photoelectric conversion unit 101 is electrically connected to a reference potential line (e.g., ground). The drain of the transfer transistor 102 is electrically connected to the floating diffusion 103, and the gate of the transfer transistor 102 is electrically connected to the pixel drive line 23. The transfer transistor 102 is, for example, a complementary metal oxide semiconductor (CMOS) transistor.

[0023] The readout circuit 22 includes, for example, a reset transistor 201, an amplification transistor 202, and a selection transistor 203. Note that the selection transistor 203 may be omitted if necessary. The source of the reset transistor 201 (the input terminal of the readout circuit 22) is electrically connected to the floating diffusion 103, and the drain of the reset transistor 201 is electrically connected to the power supply line VDD and the drain of the amplification transistor 202. The gate of the reset transistor 201 is electrically connected to a pixel drive line 23 (see FIG. 1). The source of the amplification transistor 202 is electrically connected to the drain of the selection transistor 203, and the gate of the amplification transistor 202 is electrically connected to the source of the reset transistor 201. The source of the selection transistor 203 (the output terminal of the readout circuit 22) is electrically connected to a vertical signal line 24, and the gate of the selection transistor 203 is electrically connected to the pixel drive line 23 (see FIG. 1). Note that the pixel 12 and the readout circuit 22 are electrically connected via a connection portion 510. Furthermore, the floating diffusion 103 and the amplification transistor 202 are electrically connected via a connection portion 510. The readout circuit 22 and the logic circuit 32 are also electrically connected via a connection portion (not shown).

[0024] When the transfer transistor 102 is turned on, it transfers the charge of the photoelectric conversion unit 101 to the floating diffusion 103. The reset transistor 201 resets the potential of the floating diffusion 103 to a predetermined potential. When the reset transistor 201 is turned on, it resets the potential of the floating diffusion 103 to the potential of the power supply line VDD. The selection transistor 203 controls the output timing of the pixel signal from the readout circuit 22. The amplification transistor 202 generates, as the pixel signal, a signal (voltage signal) whose voltage corresponds to the level of the charge held in the floating diffusion 103. When the selection transistor 203 is turned on, the amplification transistor 202 amplifies the potential of the floating diffusion 103 and outputs a voltage corresponding to the amplified potential to the column signal processing circuit 34 via the vertical signal line 24. The reset transistor 201, the amplification transistor 202, and the selection transistor 203 are, for example, CMOS transistors.

[0025] In the embodiment of the present disclosure, the configuration of the pixels 12 and the readout circuit 22 is not limited to the configuration shown in Fig. 2. In the embodiment of the present disclosure, for example, a plurality of pixels 12 may be connected to one readout circuit 22, or the readout circuit 22 may further include other pixel transistors. In addition, in the embodiment of the present disclosure, some or all of the pixel transistors constituting the readout circuit 22 may be provided on the first substrate 10.

[0026] <<2. Background>> Next, the background that led the inventors to create the embodiments of the present disclosure will be described with reference to Figures 3A and 3B. Figure 3A is an explanatory diagram showing an overview of a manufacturing method for an imaging device 1a according to a comparative example, and more specifically, corresponds to a cross-sectional view of the imaging device 1a cut along the stacking direction. Figure 3B is an explanatory diagram showing an example cross-sectional configuration of the imaging device 1a according to the comparative example, and more specifically, corresponds to a cross-sectional view of the imaging device 1a cut along the stacking direction. Note that the comparative example here refers to the imaging device 1a that the inventors had studied extensively before creating the embodiments of the present disclosure.

[0027] First, an outline of a manufacturing method of the imaging device 1a according to the comparative example will be described. In the comparative example, as shown on the left side of Fig. 3A , an insulating film 112 is provided on the bonding surface side of the first substrate 10, and a bonding electrode 110 is provided on the insulating film 112. Similarly, an insulating film 212 is provided on the bonding surface side of the second substrate 20, and a bonding electrode 110 is provided on the insulating film 212. In the comparative example, the two substrates 10, 20 are overlapped so that the bonding electrodes 110 of the two substrates 10, 20 face each other, and the bonding electrodes 110 are bonded together, thereby bonding the two substrates 10, 20.

[0028] Next, as shown in the center of FIG. 3A , of the two bonded substrates 10 and 20, the second substrate 20 is ground and thinned, and then an insulating film 222 and a bonding electrode 210 are formed on the surface of the second substrate 20 located on the opposite side from the first substrate 10.

[0029] 3A , an insulating film 312 is provided on the bonding surface side of the third substrate 30, and a bonding electrode 210 is provided on the insulating film 312. In the comparative example, the two substrates 20, 30 are overlapped with each other so that the bonding electrodes 210 of the two substrates 20, 30 face each other, and the bonding electrodes 210 are bonded to each other, thereby bonding the two substrates 20, 30. Thereafter, the stacked structure of the three substrates 10, 20, 30 is cut (divided into individual pieces), thereby manufacturing the imaging device 1a.

[0030] In the comparative example, the three substrates 10, 20, and 30 are semiconductor wafers. That is, the three substrates 10, 20, and 30 are bonded to one another in the form of wafers. In the comparative example, in order to suppress an increase in the manufacturing cost of the imaging device 1a, it is preferable that the diameter of the semiconductor wafers used as the substrates be large, and the semiconductor wafers have a diameter of, for example, 300 mm.

[0031] The connection portion 510 (see FIG. 2 ) electrically connecting the first substrate 10 and the second substrate 20 constitutes part of the signal line that transmits the electric charge generated in the photoelectric conversion unit 164 (see FIG. 3B ) to the readout circuit 22. Therefore, it is necessary to reliably ensure the electrical connection of the connection portion 510. In the imaging device 1a, the connection portion 510 is formed by part of the connection made by the bonding electrode 110 that bonds the two substrates 10 and 20. Therefore, in the comparative example, when bonding the two substrates 10 and 20, it is necessary to align the bonding electrode 110 between the first substrate 10 and the second substrate 20 with high precision. Furthermore, because both the first substrate 10 and the second substrate 20 are semiconductor wafers, it is necessary to align the bonding electrode 110 with high precision over the entire surface of the semiconductor wafer in the comparative example. For example, when bonding the two substrates 10 and 20, it is necessary to keep the positional misalignment of the bonding electrode 110 to 100 nm or less. In the comparative example, the allowable amount of misalignment is so small that alignment is extremely difficult, which reduces the yield of the imaging device 1 a and makes it difficult to suppress increases in manufacturing costs and manufacturing time.

[0032] Next, a cross-sectional configuration of the imaging device 1a of the comparative example will be described. As shown in Fig. 3B, the imaging device 1a of the comparative example has three substrates (a first substrate 10, a second substrate 20, and a third substrate 30). The imaging device 1a has a three-dimensional structure (a laminated structure) obtained by bonding (joining) the three substrates 10, 20, and 30 together and then dividing them into individual pieces.

[0033] The first substrate 10 has a semiconductor substrate 11 provided with a photoelectric conversion unit (photodetector element, image sensor) 164 that performs photoelectric conversion. Furthermore, the first substrate 10 has a wiring layer 15 including the insulating film 112 on the surface of the semiconductor substrate 11 facing the second substrate 20 (bonding surface side). The first substrate 10 also has a color filter 160 and an on-chip lens 162 on the side of the semiconductor substrate 11 opposite to the second substrate 20.

[0034] The second substrate 20 is also provided with a readout circuit 22 that reads out (processes) pixel signals (detection signals) from the photoelectric conversion unit 164. The readout circuit 22 has a plurality of pixel transistors, which are provided in a semiconductor substrate 21 of the second substrate 20. The second substrate 20 also has a wiring layer 25 including an insulating film 212 on the surface of the semiconductor substrate 21 facing the first substrate 10 (bonding surface side). The wiring layer 25 of the second substrate 20 is also provided with a pad 174 connected to an external power supply, and the upper surface of the pad 174 is exposed from an opening 170 that penetrates the semiconductor substrate 11 and the wiring layers 15, 25. The second substrate 20 also has a wiring layer 26 including an insulating film 222 on the surface of the semiconductor substrate 21 facing the third substrate 30 (bonding surface side).

[0035] The third substrate 30 is also provided with, for example, a logic circuit 32 that controls the pixels 12 and processes pixel signals from the pixels 12. The logic circuit 32 is provided on a semiconductor substrate 31 included in the third substrate 30. Furthermore, the third substrate 30 has a wiring layer 37 including an insulating film 312 on the surface of the semiconductor substrate 31 facing the second substrate 20 (bonding surface side).

[0036] Furthermore, in the comparative example, the wiring layer 15 of the first substrate 10 and the wiring layer 25 of the second substrate 20 face each other and are bonded together, thereby forming a stacked structure of two substrates (the first substrate 10 and the second substrate 20). Furthermore, in the comparative example, the wiring layer 26 of the second substrate 20 and the wiring layer 37 of the third substrate 30 face each other and are bonded together, thereby forming a stacked structure of two substrates (the second substrate 20 and the third substrate 30). In detail, bonding electrodes 110 and 210 are provided on the respective wiring layers 15, 25, 26, and 37, and bonding of the bonding electrodes 110 and 210 bonds the multiple substrates 10, 20, and 30 together. Furthermore, portions of the bonding electrodes 110 and 210 not only bond the multiple substrates 10, 20, and 30 together, but also ensure electrical connection between the multiple substrates 10, 20, and 30.

[0037] In the comparative example, as shown in FIG. 3B , an opening 170 penetrating the semiconductor substrate 11 and the wiring layers 15 and 25 allows light to be incident on the side surface of the semiconductor substrate 11 through the opening 170. In such a case, unnecessary light is incident on the photoelectric conversion unit 164, causing unnecessary signals (noise) to be generated in the photoelectric conversion unit 164. Furthermore, in order to prevent the above-described light from being incident, it is conceivable to separate the opening 170 from the photoelectric conversion unit 164. However, separating the opening 170 from the photoelectric conversion unit 164 makes it difficult to reduce the areas of the first substrate 10 and the second substrate 20. Therefore, in the comparative example, there was a limit to how much the imaging device 1a could be miniaturized.

[0038] Furthermore, in the comparative example, the opening 170 penetrates the semiconductor substrate 11 and the wiring layers 15 and 25, and therefore the opening 170 is deep. In order to accurately process the opening 170 by dry etching or the like, it is necessary to reduce the aspect ratio of the opening 170. However, if the opening area of ​​the opening 170 or the pad 174 is increased in order to reduce the aspect ratio of the opening 170, it becomes difficult to reduce the area of ​​the first substrate 10 and the second substrate 20. Therefore, in the comparative example, there was a limit to how much the imaging device 1a could be miniaturized.

[0039] In view of this situation, the present inventors have conducted extensive research into whether it is possible to further reduce the size of the imaging device 1a while facilitating alignment during substrate bonding. As a result, the present inventors have come up with the embodiments of the present disclosure described below. Details of the embodiments of the present disclosure created by the present inventors will be described below.

[0040] <<3. First Embodiment>> <3.1 Overview> First, an overview of the first embodiment of the present disclosure will be described with reference to Fig. 4. Fig. 4 is an explanatory diagram showing an overview of a manufacturing method for the imaging device 1 according to this embodiment, and in detail corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction.

[0041] In this embodiment, as shown on the left side of Fig. 4, an insulating film 222 is provided on the bonding surface side of the second substrate 20, and a bonding electrode 210 is provided on the insulating film 222. Similarly, an insulating film 312 is provided on the bonding surface side of the third substrate 30, and a bonding electrode 210 is provided on the insulating film 312. In this embodiment, the two substrates 20, 30 are overlapped and bonded together so that the bonding electrodes 210 of the two substrates 20, 30 face each other. In this embodiment, when the two substrates 20, 30 are bonded together, the second substrate 20 and the third substrate 30 are in the form of semiconductor wafers.

[0042] Furthermore, the bonding of the bonding electrodes 210 that constitute the connection between the second substrate 20 and the third substrate 30 is a connection between the readout circuit 22 and each circuit, and therefore it is sufficient to ensure a minimum level of electrical connection, and therefore the allowable positional misalignment of the bonding electrodes 210 is large. In other words, when bonding the two substrates 20, 30, although it is the entire surface of the semiconductor wafer, high precision is not required for the alignment of the bonding electrodes 210. For example, when bonding the two substrates 20, 30, the positional misalignment of the bonding electrodes 210 of the two substrates 20, 30 may be, for example, 1000 nm or less.

[0043] Next, as shown in the center of Figure 4, of the two bonded substrates 20, 30, substrate 20 is ground and thinned, and then an insulating film 212 and a bonding electrode 110 are formed on the surface of substrate 20 located opposite to the third substrate 30.

[0044] 4, an insulating film 112 is provided on the bonding surface of the first substrate 10c, and a bonding electrode 110 is provided on the insulating film 112. At this time, unlike the comparative example, the first substrate 10c is in the form of a semiconductor chip. In this embodiment, the two substrates 10c and 20 are overlapped and bonded together so that the bonding electrodes 110 of the two substrates 10c and 20 face each other.

[0045] In this embodiment, when bonding the two substrates 10c, 20, it is necessary to align the bonding electrode 110 between the first substrate 10c and the second substrate 20 with high precision, as in the comparative example. For example, when bonding the two substrates 10c, 20, it is required that the misalignment between the two substrates 10, 20 be 100 nm or less. In the comparative example, alignment is performed across the entire surface of the semiconductor wafers, whereas in this embodiment, alignment is performed between the semiconductor wafer (second substrate 20) and the semiconductor chip (first substrate 10c). Therefore, in this embodiment, the difficulty of alignment is reduced compared to the comparative example. As a result, since alignment is easier in this embodiment, it is possible to prevent a decrease in yield of the imaging device 1 and suppress increases in manufacturing costs and manufacturing time.

[0046] Although not shown in the drawings, the stacked structure of the three substrates 10c, 20, and 30 is cut (divided into pieces) to produce the imaging device 1 according to this embodiment.

[0047] 5A and 5B, a detailed configuration of the imaging device 1 according to this embodiment will be described. Fig. 5A is an explanatory diagram showing an example of the cross-sectional configuration of the imaging device 1 according to this embodiment. Specifically, this corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction, and some components are not shown. Fig. 5B is an explanatory diagram showing an example of the planar configuration of the substrates 10c and 20 of the imaging device 1 according to this embodiment.

[0048] 5A, the imaging device (photodetector) 1 according to this embodiment has three substrates (a first substrate 10c, a second substrate 20, and a third substrate 30). Similarly to the comparative example, the imaging device 1 has a three-dimensional structure (a laminated structure) obtained by bonding (joining) the three substrates 10c, 20, and 30 together and then dividing them into individual pieces. Specifically, the second substrate 20 is laminated on the third substrate 30, and the first substrate 10c is laminated on the second substrate 20.

[0049] The first substrate 10c includes a semiconductor substrate (first semiconductor substrate) 11 provided with, for example, a plurality of photoelectric conversion units (photodetection elements, image pickup elements) 164 that perform photoelectric conversion, transfer transistors 102 (not shown in FIG. 5A ) electrically connected to the photoelectric conversion units, and floating diffusions (FDs) 103 (not shown in FIG. 5A ) that temporarily hold charges output from the photoelectric conversion units 164 via the transfer transistors 102. The first substrate 10c further includes a wiring layer 15 including the insulating film 112 on the surface of the semiconductor substrate 11 facing the second substrate 20 (the bonding surface side). The first substrate 10c also includes a color filter 160 and an on-chip lens 162 on the surface of the semiconductor substrate 11 opposite the second substrate 20. In this embodiment, the first substrate 10c is stacked on the second substrate 20 and has a smaller area than the second substrate 20.

[0050] The second substrate 20 is also provided with a readout circuit 22 that reads out (processes) pixel signals (detection signals) from the photoelectric conversion unit 164. The readout circuit 22 has a plurality of pixel transistors (e.g., a reset transistor 201, an amplification transistor 202, and a selection transistor 203), and these pixel transistors are provided on a semiconductor substrate (second semiconductor substrate) 21 of the second substrate 20. In this embodiment, the transfer transistor 102 of the first substrate 10c may be provided on the second substrate 20. Alternatively, some or all of the pixel transistors of the second substrate 20 may be provided on the first substrate 10c. Note that when all of the pixel transistors of the second substrate 20 are provided on the first substrate 10c, the second substrate 20 may be provided with a logic circuit 32, as described below. The second substrate 20 also has a wiring layer 25 including an insulating film 212 on the surface of the semiconductor substrate 21 facing the first substrate 10c (bonding surface side). The second substrate 20 also has a wiring layer 26 including an insulating film 222 on the surface of the semiconductor substrate 21 facing the third substrate 30 (bonding surface side). That is, the second substrate 20 has two wiring layers (a pair of wiring layers) 25, 26 that sandwich the semiconductor substrate 21.

[0051] The second substrate 20 also has through electrodes 260 that penetrate the semiconductor substrate 21 and electrically connect the wiring of the two wiring layers 25, 26. The through electrodes 260 may be formed to penetrate the semiconductor substrate 21 from the first substrate 10c side to the third substrate 30 side, for example, and in this case, the diameter of the through electrodes 260 may decrease from the first substrate 10c side to the third substrate 30 side.

[0052] The third substrate 30 is also provided with, for example, a logic circuit 32 that controls the pixels 12 and processes pixel signals from the pixels 12, a memory element (not shown) that stores the pixel signals, and the like. The logic circuit 32 and the memory element are provided on a semiconductor substrate 31 of the third substrate 30. Furthermore, the third substrate 30 has a wiring layer 37 including an insulating film 312 on the surface of the semiconductor substrate 31 facing the second substrate 20 (bonding surface side). In this embodiment, the third substrate 30 has the same area as the second substrate 20.

[0053] 5A , in this embodiment as well, the wiring layer 15 of the first substrate 10c and the wiring layer 25 of the second substrate 20 face each other and are bonded together to form a stacked structure of two substrates (the first substrate 10c and the second substrate 20). Furthermore, in this embodiment as well, the wiring layer 26 of the second substrate 20 and the wiring layer 37 of the third substrate 30 face each other and are bonded together to form a stacked structure of two substrates (the second substrate 20 and the third substrate 30). In this embodiment, bonding electrodes 110 and 210 (not shown in FIG. 5A ) are provided on the respective wiring layers 15, 25, 26, and 37, and the bonding electrodes 110 and 210 bond the plurality of substrates 10, 20, and 30 together. In this embodiment, some of the bonding electrodes 110 and 210 not only bond the multiple substrates 10, 20, and 30 together, but also ensure electrical connection between the multiple substrates 10, 20, and 30. Specifically, the pixels 12 of the first substrate 10c and the readout circuit 22 of the second substrate 20, more specifically, the floating diffusion FD and the amplification transistor 202, are electrically connected by the bonding electrodes 110. The readout circuit 22 of the second substrate 20 and the logic circuit 32 of the third substrate 30 are electrically connected by the bonding electrodes 210. The remaining bonding electrodes (dummy electrodes) 110 and 210 only bond the multiple substrates 10, 20, and 30 together. The bonding electrodes 110 and 210 can be formed of, for example, copper (Cu).

[0054] In this embodiment, a peripheral region surrounding the first substrate 10c is located on the surface of the second substrate 20 facing the first substrate 10c. In this embodiment, the side surfaces of the first substrate 10c and the peripheral region of the second substrate 20 on the second substrate 20 are covered with a light-shielding film 136. Furthermore, in this embodiment, a pad (first electrode) 174 connected to an external device is provided on the surface of the wiring layer 25 on the first substrate 10c side of the second substrate 20 in the peripheral region of the second substrate 20. As shown in FIG. 5A , the pad 174 is located below the photoelectric conversion unit 164 in the stacking direction of the three substrates 10c, 20, and 30 of the imaging device 1. Also, as shown in FIG. 5A , the upper surface of the pad 174 is exposed through an opening (first opening, second opening) 170 penetrating the protective film 140 and the light-shielding film 136. In detail, the opening in the protective film 140 and the opening in the light-shielding film 136 communicate with each other to form a single opening 170, exposing the upper surface of the pad 174. In this embodiment, because the side surface of the semiconductor substrate 11 is covered with the light-shielding film 136, light is not incident on the side surface of the semiconductor substrate 11 through the opening 170, and as a result, unnecessary signals (noise) are not generated in the photoelectric conversion unit 164. Therefore, in this embodiment, it is not necessary to separate the opening 170 from the photoelectric conversion unit 164 to prevent light from entering, and therefore it is easy to reduce the areas of the first substrate 10 and the second substrate 20. As a result, this embodiment enables further miniaturization of the imaging device 1.

[0055] The light-shielding film 136 may include a conductive film such as a metal film, and may be electrically connected to a pad (second electrode) 176 (see FIG. 6A ) having a predetermined potential, which is provided in the peripheral region of the second substrate 20. In particular, the light-shielding film 136 has an opening (third opening) 172 that exposes the top surface of the pad 176, and is provided so as to cover the inner wall of the opening 172, thereby electrically connecting to the pad 176. In this manner, in this embodiment, the light-shielding film 136 can function as a wiring. Note that the side surface of the first substrate 10c and the peripheral region of the second substrate 20 will be described in detail later.

[0056] Furthermore, in this embodiment, a protective film 140 is laminated on the light-shielding film 136. In this embodiment, the protective film 140 may be provided so as to extend onto the upper surface of the first substrate 10c as well. In such a case, the protective film 140 will have a step between the first substrate 10c and the peripheral region of the second substrate 20.

[0057] 5A , in this embodiment, the opening 170 penetrates the protective film 140, the light-shielding film 136, etc., and therefore the depth of the opening 170 is shallower than the opening 170 that penetrates the semiconductor substrate 11 in the comparative example. Therefore, in this embodiment, in order to process the opening 170 with high precision, it is not necessary to increase the opening area of ​​the opening 170 or the pad 174 to reduce the aspect ratio of the opening 170. This makes it easy to reduce the area of ​​the second substrate 20, enabling further miniaturization of the imaging device 1.

[0058] 5B , in this embodiment, the first substrate 10c has a pixel array region 113 in which a plurality of photoelectric conversion units 164 are arranged in a matrix, and a peripheral region 114 provided around the pixel array region 113. Furthermore, the peripheral region 114 is provided with a plurality of alignment marks (first alignment marks) 400a, 400b used for alignment when bonding to the second substrate 20. As shown in FIG. 5B , the plurality of alignment marks 400a, 400b may have different shapes and sizes, and the shapes and sizes are not particularly limited. Here, the alignment marks are patterns whose shapes and positions can be recognized using existing image recognition technology, and the substrates are aligned so that the alignment marks overlap based on the detection results of the image recognition technology.

[0059] 5B , in this embodiment, the second substrate 20 has a pixel array region 213 that overlaps with the pixel array region 113 of the first substrate 10, and a peripheral region 214 that is provided around the pixel array region 213. Furthermore, the peripheral region 214 is provided with a plurality of alignment marks (second alignment marks) 400 a, 400 b that are used for alignment when bonding to the second substrate 20. As shown in FIG. 5B , the plurality of alignment marks 400 a, 400 b may have different shapes and sizes, and the shapes and sizes are not particularly limited.

[0060] In this embodiment, by arranging (aligning) the alignment marks 400a, 400b of the first substrate 10c and the alignment marks 400a, 400b of the second substrate 20 so that they overlap each other, it is possible to bond the two substrates 10c, 20 while suppressing misalignment between the first substrate 10c and the second substrate 20.

[0061] As described above, in this embodiment, since the alignment is between the semiconductor wafer (second substrate 20) and the semiconductor chip (first substrate 10c), the difficulty of alignment is alleviated compared to the comparative example in which alignment is between semiconductor wafers. As a result, since alignment is easier in this embodiment, it is possible to prevent a decrease in the yield of the imaging device 1 and suppress an increase in manufacturing cost and manufacturing time.

[0062] Furthermore, in this embodiment, since the imaging device 1 is fabricated using this method, it is easy to form the light-shielding film 136 that covers at least a portion of the side surface of the first substrate 10c on the second substrate 20. Therefore, in this embodiment, since the side surface of the semiconductor substrate 11 is covered with the light-shielding film 136, light is not incident on the side surface of the semiconductor substrate 11 through the opening 170, and unnecessary signals (noise) are not generated in the photoelectric conversion unit 164. As a result, in this embodiment, it is not necessary to separate the opening 170 from the photoelectric conversion unit 164 to prevent light from entering, and therefore it is easy to reduce the areas of the first substrate 10 and the second substrate 20, enabling further miniaturization of the imaging device 1.

[0063] Additionally, in this embodiment, since the imaging device 1 is fabricated by the method described above, the opening 170 penetrates the protective film 140 and the light-shielding film 136. Therefore, the opening 170 in this embodiment is shallower than the opening 170 in the comparative example, which penetrates the semiconductor substrate 11. Therefore, in this embodiment, since the opening 170 is processed with high precision, it is not necessary to increase the opening area of ​​the opening 170 or the pad 174 to reduce the aspect ratio of the opening 170. Therefore, according to this embodiment, it is easy to reduce the area of ​​the second substrate 20, and the imaging device 1 can be further miniaturized.

[0064] In this embodiment, the configuration of the imaging device 1 is not limited to the configuration shown in FIGS. 5A and 5B, but can be modified in various ways.

[0065] 6A to 6C, an example of a method for manufacturing the imaging device 1 according to this embodiment will be described. Figures 6A to 6C are explanatory views showing the method for manufacturing the imaging device 1 according to this embodiment, and more specifically, correspond to cross sections of the main parts of the imaging device 1 shown in Figure 5A.

[0066] First, the first substrate 10c, the second substrate 20, and the third substrate 30 are fabricated using various semiconductor processes. At this time, a fixed charge film may be formed in advance on the first substrate 10c at the position of the pixel separation section 180. Furthermore, pads 174 and 176 are provided on the wiring layer 25 on the first substrate 10c side of the second substrate 20. The two substrates 20 and 30 are then superimposed and bonded together. At this time, the second substrate 20 and the third substrate 30 are in the form of semiconductor wafers. Furthermore, the first substrate 10c, which is a semiconductor chip, is superimposed on the stack of the two substrates 20 and 30, and the two substrates 10c and 20 are bonded together. This process results in a configuration such as that shown on the left side of FIG. 6A .

[0067] Next, as shown in the center of Fig. 6A, a silicon nitride film 132 is formed so as to cover the upper and side surfaces of the first substrate 10c and the peripheral region of the second substrate 20. Then, as shown on the right side of Fig. 6A, the silicon nitride film 132 located on the upper surface of the first substrate 10c is removed, the first substrate 10c is thinned, and the surface is planarized. Furthermore, a trench that will become the pixel separating portion 180 is opened in the first substrate 10c.

[0068] Next, as shown on the left side of FIG. 6B , an oxide film 134 is formed so as to cover the upper and side surfaces of the first substrate 10c and the peripheral region of the second substrate 20, and to fill the trenches that will become the pixel separating sections 180. The oxide film 134 is made of silicon oxide (SiO ２ ), or hafnium oxide (HfO ２ ) film, aluminum oxide (Al ２ O ３ ) film, zirconium oxide (ZrO ２ ) film, titanium oxide (TiO ２ ) or tantalum oxide (Ta ２ O ５ The sidewall of the trench that becomes the pixel separating portion 180 may be covered with an insulating film having a negative fixed charge, or an oxide film 134 may be embedded in a trench whose sidewall is covered with a charge storage film.

[0069] Next, as shown in the center of FIG. 6B , an opening 172 is formed in the silicon nitride film 132 and the oxide film 134 so as to expose the top surface of the pad 176 of the second substrate 20. Then, a light-shielding film 136 is formed so as to cover the top and side surfaces of the first substrate 10c, the peripheral region of the second substrate 20, and the sidewalls and bottom of the opening 172 (more specifically, a portion of the top surface of the pad 176). By providing the light-shielding film 136 so as to cover the sidewalls and bottom of the opening 172, the light-shielding film 136 can be electrically connected to the pad 176, which has a predetermined potential. The light-shielding film 136 can be formed from a metal material, such as tungsten (W), aluminum (Al), copper (Cu), titanium (Ti), molybdenum (Mo), or nickel (Ni). Furthermore, in this embodiment, when applying resist to the upper surfaces of the first substrate 10c and the second substrate 20 to form the opening 172, it is preferable to use spray coating or spin coating, since there is a step between the first substrate 10c and the peripheral region of the second substrate 20.

[0070] 6B, a low-refractive index film 138 is formed so as to cover the upper and side surfaces of the first substrate 10c and the peripheral region of the second substrate 20, and to fill the opening 172. The low-refractive index film 138 is made of, for example, silicon oxide (SiO ２ ) film, aluminum oxide (Al ２ O ３ ) film, acrylic resin film, epoxy resin film, etc.

[0071] Next, as shown on the left side of FIG. 6C , the low-refractive-index film 138 and a portion of the light-shielding film 136 are etched. Furthermore, as shown on the right side of FIG. 6C , a color filter 160 and an on-chip lens 162 are formed in the etched portions. Furthermore, a protective film 140 is formed in the peripheral region of the second substrate 20. Next, an opening 170 is formed that penetrates the protective film 140, the low-refractive-index film 138, the light-shielding film 136, the oxide film 134, and the silicon nitride film 132 and exposes the top surface of the pad 174. Then, although not shown, the stacked structure of the three substrates 10c, 20, and 30 is cut (divided) to fabricate the imaging device 1 according to this embodiment.

[0072] <<4. Second Embodiment>> <4.1 Detailed Configuration> Next, a detailed configuration of an imaging device 1 according to a second embodiment of the present disclosure will be described with reference to Fig. 7. Fig. 7 is an explanatory diagram showing an example configuration of the imaging device 1 according to this embodiment, and in detail, the left side of Fig. 7 shows a cross section of a main part when the imaging device 1 is cut along the stacking direction, and the right side of Fig. 7 shows an example planar configuration of the substrates 10c, 20 of the imaging device 1 according to this embodiment. Note that in the following description, explanations of points common to the above-described first embodiment will be omitted.

[0073] In this embodiment, as shown on the left side of FIG. 7 , the pixel separating portion 180 separating the photoelectric conversion portion 164 penetrates the semiconductor substrate 11 of the first substrate 10c in the film thickness direction of the semiconductor substrate 11. Furthermore, the pixel separating portion 180 has a trench whose width increases from the first substrate 10c side toward the second substrate 20 side. In other words, the pixel separating portion 180 has a trench that penetrates the semiconductor substrate 11 from the surface (front surface) opposite to the light-receiving surface of the semiconductor substrate 11. In this embodiment, the pixel separating portion 180 can be formed on the first substrate 10c before bonding to the second substrate 20, for example. Note that in this embodiment, the pixel separating portion 180 is not limited to penetrating the semiconductor substrate 11 from its top surface to its bottom surface, but may penetrate at least a portion of the semiconductor substrate 11.

[0074] 7 , the first substrate 10c has a pixel array region 113 in which a plurality of photoelectric conversion units 164 are arranged in a matrix, and a peripheral region 114 provided around the pixel array region 113. Furthermore, the peripheral region 114 is provided with a plurality of alignment marks 400a, 400b used for alignment when bonding to the second substrate 20. Furthermore, in this embodiment, the second substrate 20 has a pixel array region 213 that overlaps with the pixel array region 113 of the first substrate 10, and a peripheral region 214 provided around the pixel array region 213. Furthermore, the peripheral region 214 is provided with a plurality of alignment marks 400a, 400b used for alignment when bonding to the second substrate 20. Furthermore, pads 174, 176 are provided in the peripheral region 214 of the second substrate 20.

[0075] As described above, in this embodiment, since alignment is performed between a semiconductor wafer (second substrate 20) and a semiconductor chip (first substrate 10c), the difficulty of alignment is alleviated compared to the comparative example, in which alignment is performed between semiconductor wafers. As a result, in this embodiment, alignment is facilitated, which prevents a decrease in yield of the imaging device 1 and suppresses increases in manufacturing costs and manufacturing time. Furthermore, in this embodiment, since the imaging device 1 is fabricated using this method, it is easy to form the light-shielding film 136 that covers the side surface of the first substrate 10c on the second substrate 20. Therefore, in this embodiment, since the side surface of the semiconductor substrate 11 is covered with the light-shielding film 136, light is not incident on the side surface of the semiconductor substrate 11 through the opening 170, and unnecessary signals (noise) are not generated in the photoelectric conversion unit 164. As a result, in this embodiment, it is not necessary to separate the opening 170 from the photoelectric conversion unit 164 to prevent light from entering, which makes it easy to reduce the areas of the first substrate 10 and the second substrate 20, thereby enabling further miniaturization of the imaging device 1. Additionally, in this embodiment, since the imaging device 1 is fabricated by the method described above, the opening 170 penetrates the protective film 140 and the light-shielding film 136. Therefore, the opening 170 in this embodiment is shallower than the opening 170 in the comparative example, which penetrates the semiconductor substrate 11. Therefore, in this embodiment, since the opening 170 is processed with high precision, it is not necessary to increase the opening area of ​​the opening 170 or the pad 174 to reduce the aspect ratio of the opening 170. Therefore, according to this embodiment, it is easy to reduce the area of ​​the second substrate 20, and the imaging device 1 can be further miniaturized.

[0076] <4.2 Modifications> (Modification 1) Next, a detailed configuration of the imaging device 1 according to Modification 1 of the present embodiment will be described with reference to Fig. 8. Fig. 8 is an explanatory diagram showing an example of the cross-sectional configuration of the imaging device 1 according to Modification 1, and more specifically, corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction.

[0077] In this modification, as shown in FIG. 8 , the pixel separating portion 182 separating the photoelectric conversion portions 164 penetrates the semiconductor substrate 11 of the first substrate 10c. Furthermore, the pixel separating portion 182 has a trench whose width narrows from the first substrate 10c side toward the second substrate 20 side. That is, the pixel separating portion 182 has a trench that penetrates the semiconductor substrate 11 from the light-receiving surface (back surface) of the semiconductor substrate 11. In this embodiment, the pixel separating portion 182 can be formed on the first substrate 10c after bonding to the second substrate 20, for example. Note that in this modification, the pixel separating portion 180 is not limited to penetrating the semiconductor substrate 11 from its top surface to its bottom surface, and may penetrate at least a portion of the semiconductor substrate 11.

[0078] (Modification 2) Next, a detailed configuration of the imaging device 1 according to Modification 2 of the present embodiment will be described with reference to Fig. 9. Fig. 9 is an explanatory diagram showing an example of the planar configuration of the imaging device 1 according to Modification 2, and in detail shows an example of the planar configuration of the boards 10c and 20 of the imaging device 1.

[0079] 9 , the first substrate 10c and the second substrate 20 have a plurality of alignment marks 400a, 400b arranged to sandwich the pixel array regions 113, 213. By doing so, in this modification, it is possible to suppress misalignment caused by rotation of the first substrate 10c when aligning the first substrate 10c and the second substrate 20. Note that in this modification, the plurality of alignment marks 400a, 400b are not limited to being arranged to sandwich the pixel array regions 113, 213, and may be arranged, for example, at the four corners or along the four sides of the first substrate 10c and the second substrate 20 so as to surround the pixel array regions 113, 213.

[0080] (Variation 3) Next, a detailed configuration of the imaging device 1 according to Variation 3 of the present embodiment will be described with reference to Fig. 10. Fig. 10 is an explanatory diagram showing an example of the cross-sectional configuration of the imaging device 1 according to Variation 3, and more specifically corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction.

[0081] 10 , instead of a protective film 140, a low-refractive-index film 138 is formed on the peripheral region of the second substrate 20 and the upper surface of the first substrate 10c. Furthermore, in this modification, the upper surface of the low-refractive-index film 138 is flattened across the entire front surface of the imaging device 1. Therefore, in this modification, the low-refractive-index film 138 does not have a step between the first substrate 10c and the peripheral region of the second substrate 20. Note that such a low-refractive-index film 138 can be formed by utilizing CVD (Chemical Vapor Deposition) or coating.

[0082] (Modification 4) Next, a detailed configuration of the imaging device 1 according to Modification 4 of the present embodiment will be described with reference to Fig. 11. Fig. 11 is an explanatory diagram showing an example of the cross-sectional configuration of the imaging device 1 according to Modification 4, and more specifically corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction.

[0083] 11 , unlike the above-described third modification, the low-refractive-index film (protective film) 138 has a slope between the first substrate 10c, shown as region A in the figure, and the peripheral region of the second substrate 20. According to this modification, the low-refractive-index film (protective film) 138 has such a slope, which allows the depth of the opening 170 to be shallower.

[0084] (Modification 5) Next, a detailed configuration of the imaging device 1 according to Modification 5 of the present embodiment will be described with reference to Fig. 12. Fig. 12 is an explanatory diagram showing an example of the cross-sectional configuration of the imaging device 1 according to Modification 5, and more specifically, corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction.

[0085] 12 , unlike the embodiments and modifications described so far, the present modification 5 does not include a low refractive index film 138 or a protective film 140. According to the present modification, the depth of the opening 170 can be made shallower by not including the low refractive index film 138 or the protective film 140. In the present modification, a silicon oxide film 142 may be formed as a film for separating the color filters 160.

[0086] (Variation 6) Next, a detailed configuration of an imaging device 1 according to Variation 6 of this embodiment will be described with reference to Figures 13A and 13B. Figure 13A is an explanatory diagram showing an example cross-sectional configuration of the imaging device 1 according to Variation 6, and more specifically, corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction. Figure 13B is an explanatory diagram showing an example planar configuration of the imaging device 1 according to Variation 6, and more specifically, shows an example planar configuration of the substrates 10c and 20 of the imaging device 1.

[0087] 13A , in this modification, the semiconductor substrate 11 of the first substrate 10c may extend up to the position of the opening 170. In this modification, the inner wall of the opening 172 located near the photoelectric conversion unit 164 is covered with the light-shielding film 136, so that light does not enter the side surface of the semiconductor substrate 11 through the opening 172. Therefore, in this modification, the semiconductor substrate 11 has an opening (third opening) 170 that exposes the top surface of the pad 174, and also has an opening 172 that exposes the top surface of the pad 176.

[0088] In this modification, as shown on the right side of FIG. 13B , the first substrate 10c has a pixel array region 113 and a peripheral region 114, and the peripheral region 114 is provided with a plurality of alignment marks 400a, 400b used for alignment when bonding to the second substrate 20. In this modification, the second substrate 20 also has a pixel array region 213 and a peripheral region 214. Furthermore, the peripheral region 214 is provided with a plurality of alignment marks 400a, 400b used for alignment when bonding to the second substrate 20. The peripheral region 214 of the second substrate 20 also has the pads 174, 176 described above. Furthermore, in this modification, the first substrate 10c and the second substrate 20 overlap at the positions of the pads 174, 176.

[0089] Furthermore, in this modification, the semiconductor substrate 11 of the first substrate 10c is not limited to extending to the position of the opening 170. In this modification, for example, a dummy substrate 10d may be provided at the position of the opening 170, as shown on the right side of FIG. 13B . The dummy substrate 10d is provided on the pads 174 and 176 of the second substrate 20 so as to be adjacent to the first substrate 10c. This ensures that the material and film thickness of the portions to be diced are uniform when the stacked structure is diced into individual pieces in the fabrication of the imaging device 1, allowing for accurate cutting. Therefore, the dummy substrate 10d has an opening (fourth opening) 170 exposing the top surface of the pad 174 and an opening 172 exposing the top surface of the pad 176.

[0090] As described above, in each of the modified examples, the alignment is performed between a semiconductor wafer (second substrate 20) and a semiconductor chip (first substrate 10c), which makes the alignment less difficult than in the comparative example, in which semiconductor wafers are aligned. As a result, the alignment is easier in the modified examples, which prevents a decrease in yield of the imaging device 1 and suppresses increases in manufacturing costs and manufacturing time. Furthermore, in the modified examples, the side surfaces of the semiconductor substrate 11 or the inner walls of the openings 172 are covered with the light-shielding film 136, which prevents light from entering the side surfaces of the semiconductor substrate 11 through the openings 170 and 172 and thus prevents unnecessary signals (noise) from being generated in the photoelectric conversion unit 164. As a result, in the modified examples, it is not necessary to separate the openings 170 and 172 from the photoelectric conversion unit 164 to prevent light from entering. This makes it easier to reduce the areas of the first substrate 10 and the second substrate 20, thereby enabling further miniaturization of the imaging device 1.

[0091] In this embodiment and this modified example, the configuration of the imaging device 1 is not limited to the configurations shown in FIGS. 7 to 13B, but can be modified in various ways.

[0092] <<5. Third Embodiment>> <5.1 Background> Next, a third embodiment of the present disclosure will be described. This embodiment differs from the embodiments described so far in that the third substrate 30 is joined to the second substrate 20 in the form of a semiconductor chip. First, the background leading to the creation of the third embodiment of the present disclosure will be described with reference to FIGS. 14A and 14B. FIGS. 14A and 14B are explanatory diagrams showing an overview of a manufacturing method for an image pickup device 1a according to a comparative example, and more specifically, correspond to cross-sectional views of the image pickup device 1a cut along the stacking direction.

[0093] In the comparative example, as shown on the left side of Fig. 14A, two semiconductor wafer-shaped substrates 10 and 20 are overlapped and bonded together. Next, as shown on the right side of Fig. 14A, of the two bonded substrates 10 and 20, substrate 20 is ground and thinned, and then an insulating film 222, a bonding electrode 210, etc. are formed on the surface of substrate 20 located opposite substrate 10.

[0094] Next, as shown on the left side of Fig. 14B , the two substrates 20, 30c are overlapped and bonded together so that the bonding electrode 210 of the semiconductor chip-shaped third substrate 30c faces the bonding electrode 210 of the second substrate 20. Furthermore, as shown on the right side of Fig. 14B , an insulating film 350 is provided to cover the third substrate 30c, and a support substrate 50 is bonded onto the insulating film 350. Thereafter, although not shown, the stacked structure of the three substrates 10, 20, and 30 is cut (divided into individual pieces) to manufacture the imaging device 1a.

[0095] In the comparative example, the first substrate 10 and the second substrate 20 are semiconductor wafers. That is, in the comparative example, the first substrate 10 and the second substrate 20 are bonded to each other in the wafer state. Therefore, in the comparative example, when bonding the two substrates 10 and 20, it is necessary to align the first substrate 10 and the second substrate 20 over the entire surface of the semiconductor wafer with high precision. In the comparative example, when bonding the first substrate 10 and the second substrate 20, the allowable amount of misalignment is very small, making alignment very difficult. Therefore, in the comparative example, the yield of the imaging device 1a decreases, and it is difficult to suppress increases in manufacturing costs and manufacturing time.

[0096] In view of the above circumstances, the present inventors have come up with a third embodiment of the present disclosure. The details of the third embodiment of the present disclosure created by the present inventors will be described below.

[0097] 15A and 15B are explanatory diagrams showing an overview of the manufacturing method of the imaging device 1 according to the third embodiment of the present disclosure, and more specifically, correspond to cross-sectional views cut along the stacking direction.

[0098] 15A , in this embodiment, an insulating film 222 is provided on the bonding surface side of the semiconductor wafer-shaped second substrate 20, and a bonding electrode 210 is provided on the insulating film 222. Similarly, an insulating film 312 is provided on the bonding surface side of the semiconductor chip-shaped third substrate 30, and a bonding electrode 210 is provided on the insulating film 312. That is, in this embodiment, the third substrate 30c has a smaller area than the second substrate 20.

[0099] 15A, the two substrates 20, 30c are overlapped and bonded together so that the bonding electrodes 210 of the two substrates 20, 30c face each other. High precision is not required for the alignment of the two substrates 20, 30c; for example, the misalignment between the two substrates 20, 30c may be 1000 nm or less. An insulating film 350 is then provided to cover the third substrate 30c, and a support substrate 50 is bonded onto the insulating film 350.

[0100] Next, as shown on the left side of FIG. 15B, the second substrate 20 is ground and thinned, and then an insulating film 212 and a bonding electrode 110 are formed on the surface of the second substrate 20 located on the opposite side to the third substrate 30c.

[0101] 15B, an insulating film 112 is provided on the bonding surface of the first substrate 10c, and a bonding electrode 110 is provided on the insulating film 112. At this time, the first substrate 10c is in the form of a semiconductor chip. In this embodiment, the two substrates 10c and 20 are overlapped and bonded together so that the bonding electrodes 110 of the two substrates 10c and 20 face each other.

[0102] Furthermore, in this embodiment, in order to form the color filter 160 and the like on the first substrate 10c, a resist is provided on the upper surfaces of the first substrate 10c and the second substrate 20. At this time, although there is a step between the first substrate 10c and the peripheral region of the second substrate 20, the resist can be formed evenly by using spray coating or spin coating.

[0103] In this embodiment, when bonding the two substrates 10c, 20, it is necessary to align the bonding electrode 110 between the first substrate 10c and the second substrate 20 with high precision, as in the first embodiment. For example, when bonding the two substrates 10c, 20, it is required that the misalignment between the two substrates 10, 20 be 100 nm or less. In this embodiment, since alignment is performed between a semiconductor wafer (second substrate 20) and a semiconductor chip (first substrate 10c), the difficulty of alignment is reduced compared to the comparative example, in which semiconductor wafers are aligned. As a result, since alignment is easier in this embodiment, it is possible to prevent a decrease in yield of the imaging device 1 and suppress increases in manufacturing costs and manufacturing time.

[0104] 5.3 Detailed Configuration Next, a detailed configuration of the imaging device 1 according to this embodiment will be described with reference to Fig. 16. Fig. 16 is an explanatory diagram showing an example of the cross-sectional configuration of the imaging device 1 according to this embodiment, and corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction in detail. Note that in the following description, explanations of points common to the first embodiment will be omitted.

[0105] As shown in FIG. 16 , the imaging device 1 according to this embodiment has three substrates (a first substrate 10c, a second substrate 20, and a third substrate 30c). Similarly to the first embodiment, the imaging device 1 has a three-dimensional structure (a laminated structure) obtained by bonding (joining) the three substrates 10c, 20, and 30c together and then singulating them. However, unlike the first embodiment, in this embodiment, the third substrate 30c has a smaller area than the second substrate 20. Furthermore, in this embodiment, an insulating film 350 is provided so as to cover the third substrate 30c, and the insulating film 350 is bonded to a support substrate 50 that will eventually be separated.

[0106] As described above, in this embodiment, since alignment is performed between a semiconductor wafer (second substrate 20) and a semiconductor chip (first substrate 10c), the difficulty of alignment is alleviated compared to the comparative example, in which alignment is performed between semiconductor wafers. As a result, in this embodiment, alignment is facilitated, which prevents a decrease in yield of the imaging device 1 and suppresses increases in manufacturing costs and manufacturing time. Furthermore, in this embodiment, since the side surfaces of the semiconductor substrate 11 are covered with the light-shielding film 136, light is not incident on the side surfaces of the semiconductor substrate 11 through the openings 170, and unnecessary signals (noise) are not generated in the photoelectric conversion unit 164. As a result, in this embodiment, it is not necessary to separate the openings 170 from the photoelectric conversion unit 164 to prevent light from entering. This makes it easy to reduce the areas of the first substrate 10 and the second substrate 20, thereby enabling further miniaturization of the imaging device 1. In addition, in this embodiment, the openings 170 penetrate the protective film 140, the light-shielding film 136, etc. Therefore, the depth of the opening 170 in this embodiment is shallower than the opening 170 that penetrates the semiconductor substrate 11 in the comparative example. Therefore, in this embodiment, since the opening 170 is processed with high precision, it is not necessary to increase the opening area of ​​the opening 170 or the pad 174 to reduce the aspect ratio of the opening 170. Therefore, according to this embodiment, it is easy to reduce the area of ​​the second substrate 20, and the imaging device 1 can be further miniaturized.

[0107] In this embodiment, the configuration of the imaging device 1 is not limited to the configuration shown in FIG. 16, but can be modified in various ways.

[0108] <<6. Summary>> As described above, in each embodiment of the present disclosure, since the alignment is between the semiconductor wafer (second substrate 20) and the semiconductor chip (first substrate 10c), the difficulty of alignment is alleviated compared to the comparative example in which semiconductor wafers are aligned. As a result, since the alignment is easier in the present embodiment, it is possible to prevent a decrease in the yield of the imaging device 1 and suppress an increase in manufacturing cost and manufacturing time.

[0109] Furthermore, in this embodiment, since the imaging device 1 is fabricated by the method described above, it is easy to form the light-shielding film 136 that covers at least a portion of the side surface of the first substrate 10c on the second substrate 20. Therefore, in this embodiment, since the side surface of the semiconductor substrate 11 is covered with the light-shielding film 136, light is not incident on the side surface of the semiconductor substrate 11 through the opening 170, and unnecessary signals (noise) are not generated in the photoelectric conversion unit 164. As a result, in this embodiment, it is not necessary to separate the opening 170 from the photoelectric conversion unit 164 to prevent light from entering, so it is easy to reduce the areas of the first substrate 10 and the second substrate 20, and the imaging device 1 can be further miniaturized.

[0110] Additionally, in this embodiment, since the imaging device 1 is fabricated by the method described above, the opening 170 penetrates the protective film 140 and the light-shielding film 136. Therefore, the opening 170 in this embodiment is shallower than the opening 170 in the comparative example, which penetrates the semiconductor substrate 11. Therefore, in this embodiment, since the opening 170 is processed with high precision, it is not necessary to increase the opening area of ​​the opening 170 or the pad 174 to reduce the aspect ratio of the opening 170. Therefore, according to this embodiment, it is easy to reduce the area of ​​the second substrate 20, and the imaging device 1 can be further miniaturized.

[0111] In each embodiment of the present disclosure, the imaging device 1 has been described as having a stacked structure of three substrates (first substrate 10, second substrate 20, and third substrate 30). However, each embodiment of the present disclosure is not limited to such a structure. In each embodiment of the present disclosure, the imaging device 1 may have, for example, a stacked structure of two substrates, or a stacked structure of four or more substrates. More specifically, in each embodiment of the present disclosure, when the imaging device 1 has a stacked structure of two substrates, the first substrate 10c may have, for example, a plurality of photoelectric conversion units (photodetection elements, imaging elements) 164 that perform photoelectric conversion and a plurality of pixel transistors of a readout circuit 22 that reads (processes) pixel signals (detection signals) from the photoelectric conversion units 164. Furthermore, in such a case, the second substrate 20 may have, for example, a logic circuit 32 that controls the pixels 12 and processes pixel signals from the pixels 12.

[0112] In the above-described embodiment of the present disclosure, the case where the present disclosure is applied to an imaging device 1 has been described, but the embodiment of the present disclosure is not limited to this and may be applied, for example, to a distance measuring device that performs distance measurement using a photodetector element, or to other semiconductor devices.

[0113] Furthermore, the imaging device 1 according to the embodiment of the present disclosure can be manufactured using methods, devices, and conditions that are used in the manufacture of general semiconductor devices. That is, the imaging device 1 according to the present embodiment can be manufactured using existing semiconductor device manufacturing processes.

[0114] Examples of the above-mentioned methods include physical vapor deposition (PVD), CVD, and atomic layer deposition (ALD). Examples of PVD methods include vacuum deposition, electron beam (EB) deposition, various sputtering methods (magnetron sputtering, RF (radio frequency)-direct current (DC) combined bias sputtering, electron cyclotron resonance (ECR) sputtering, facing target sputtering, and high frequency sputtering), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of CVD methods include plasma CVD, thermal CVD, metal organic (MO) CVD, and photo-CVD. Other methods include electroplating, electroless plating, spin coating, dipping, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, and flexographic printing, stamping, spraying, and various coating methods such as air doctor coater, blade coater, rod coater, knife coater, squeeze coater, reverse roll coater, transfer roll coater, gravure coater, kiss coater, cast coater, spray coater, slit orifice coater, and calendar coater. Examples of patterning methods include chemical etching such as shadow masking, laser transfer, and photolithography, and physical etching using ultraviolet light or a laser. Additionally, examples of planarization techniques include CMP, laser planarization, and reflow.

[0115] <<7. Application Examples>> <7.1 Application Examples to Smartphones> The technology according to the present disclosure may also be applied to electronic devices such as cameras and smartphones. Therefore, a configuration example of a smartphone 900 as an electronic device to which the present technology is applied will be described with reference to Fig. 17. Fig. 17 is a block diagram showing an example of a schematic functional configuration of a smartphone 900 to which the technology according to the present disclosure (the present technology) can be applied.

[0116] 17 , the smartphone 900 includes a CPU (Central Processing Unit) 901, a ROM (Read Only Memory) 902, and a RAM (Random Access Memory) 903. The smartphone 900 also includes a storage device 904, a communication module 905, and a sensor module 907. The smartphone 900 also includes an imaging device 1, a display device 910, a speaker 911, a microphone 912, an input device 913, and a bus 914. The smartphone 900 may also include a processing circuit such as a DSP (Digital Signal Processor) instead of or in addition to the CPU 901.

[0117] The CPU 901 functions as an arithmetic processing unit and control device, and controls all or part of the operations within the smartphone 900 in accordance with various programs recorded in the ROM 902, RAM 903, storage device 904, etc. The ROM 902 stores programs and calculation parameters used by the CPU 901. The RAM 903 temporarily stores programs used in the execution of the CPU 901 and parameters that change as appropriate during the execution. The CPU 901, ROM 902, and RAM 903 are interconnected by a bus 914. The storage device 904 is a data storage device configured as an example of a storage unit of the smartphone 900. The storage device 904 is configured, for example, by a magnetic storage device such as an HDD (hard disk drive), a semiconductor storage device, an optical storage device, etc. This storage device 904 stores programs executed by the CPU 901, various data, and various data acquired from outside.

[0118] The communication module 905 is a communication interface configured with, for example, a communication device for connecting to the communication network 906. The communication module 905 may be, for example, a communication card for a wired or wireless local area network (LAN), Bluetooth (registered trademark), or wireless USB (WUSB). The communication module 905 may also be a router for optical communication, a router for asymmetric digital subscriber line (ADSL), or a modem for various communications. The communication module 905 transmits and receives signals between the Internet and other communication devices using a predetermined protocol such as TCP (Transmission Control Protocol) / IP (Internet Protocol). The communication network 906 connected to the communication module 905 is a wired or wireless network, such as the Internet, a home LAN, infrared communication, or satellite communication.

[0119] The sensor module 907 includes various sensors such as a motion sensor (e.g., an acceleration sensor, a gyro sensor, a geomagnetic sensor, etc.), a biometric information sensor (e.g., a pulse sensor, a blood pressure sensor, a fingerprint sensor, etc.), or a position sensor (e.g., a GNSS (Global Navigation Satellite System) receiver, etc.).

[0120] The imaging device 1 is provided on the surface of the smartphone 900 and can capture an image of an object located on the front or back side of the smartphone 900. Specifically, the imaging device 1 is configured to employ the technology of the present disclosure (the present technology). That is, the imaging device 1 may include an imaging element (not shown) and a signal processing circuit (not shown) that performs imaging signal processing on a signal photoelectrically converted by the imaging element. Furthermore, the imaging device 1 may further include an optical system mechanism (not shown) including an imaging lens, a zoom lens, a focus lens, and the like, and a drive system mechanism (not shown) that controls the operation of the optical system mechanism. The imaging element collects incident light from an object as an optical image, and the signal processing circuit photoelectrically converts the formed optical image on a pixel-by-pixel basis, reads out the signal from each pixel as an imaging signal, and performs image processing to obtain a captured image.

[0121] The display device 910 is provided on the surface of the smartphone 900 and can be, for example, a display device such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display. The display device 910 can display an operation screen, captured images acquired by the imaging device 1 described above, and the like.

[0122] The speaker 911 can output, for example, telephone call audio and audio accompanying the video content displayed by the display device 910 described above to the user.

[0123] The microphone 912 can collect, for example, the user's voice during a call, voice including commands to activate functions of the smartphone 900, and voice from the surrounding environment of the smartphone 900.

[0124] The input device 913 is a device operated by a user, such as a button, a keyboard, a touch panel, or a mouse. The input device 913 includes an input control circuit that generates an input signal based on information input by the user and outputs the signal to the CPU 901. By operating the input device 913, the user can input various data to the smartphone 900 and instruct processing operations.

[0125] The above describes an example configuration of the smartphone 900. Each of the above components may be configured using general-purpose components, or may be configured using hardware specialized for the function of each component. Such a configuration may be changed as appropriate depending on the technical level at the time of implementation.

[0126] 7.2 Application Examples to Mobile Bodies The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0127] FIG. 18 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0128] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 18, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053.

[0129] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0130] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0131] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0132] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0133] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0134] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0135] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0136] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0137] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 18, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0138] FIG. 19 is a diagram showing an example of the installation position of the imaging unit 12031.

[0139] In FIG. 19, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0140] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided on the top of the windshield inside the vehicle cabin is mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0141] 19 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0142] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0143] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0144] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0145] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0146] The above describes an example of a vehicle control system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the image capturing unit 12031 and the like among the above-described components.

[0147] <<8. Supplementary Information>> Although preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to such examples. It is clear that a person skilled in the art of the present disclosure can conceive of various modified or altered examples within the scope of the technical idea described in the claims, and it is understood that these also naturally fall within the technical scope of the present disclosure.

[0148] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that will be apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0149] The present technology can also be configured as follows. (1) A photodetector including a stacked structure in which a first substrate provided with a plurality of photodetection elements and a second substrate mounted with a plurality of transistors are stacked, wherein the first substrate has a smaller area than the second substrate. (2) The photodetector according to (1), wherein at least a portion of a side surface of the first substrate is covered with a light-shielding film. (3) The photodetector according to (2), wherein a first electrode connected to an external device is provided in a peripheral region surrounding the first substrate on a surface of the second substrate facing the first substrate. (4) The photodetector according to (3), wherein the first substrate is stacked on the second substrate, and the first electrode is located below the photodetection elements in the stacking direction of the photodetector. (5) The photodetector according to (4) above, wherein the peripheral region is covered with the light-shielding film, and the light-shielding film has a first opening exposing an upper surface of the first electrode. (6) The photodetector according to (5) above, wherein a protective film is laminated on the light-shielding film in the peripheral region, and the protective film has a second opening communicating with the first opening. (7) The photodetector according to (6) above, wherein the protective film is provided so as to extend on the first substrate. (8) The photodetector according to (7) above, wherein the protective film has a step between the first substrate and the peripheral region. (9) The photodetector according to (7) above, wherein the protective film has a slope between the first substrate and the peripheral region. (10) The photodetector according to any one of (3) to (9) above, wherein the light-shielding film includes a conductive film and is electrically connected to a second electrode having a predetermined potential provided in the peripheral region of the second substrate. (11) The photodetector according to (10), wherein the light-shielding film has a third opening that exposes an upper surface of the second electrode, and is provided so as to cover an inner wall of the third opening, thereby electrically connecting to the second electrode.(12) The photodetector according to any one of (1) to (11), wherein the first substrate has an array region in which the plurality of photodetector elements are arranged in a matrix, and first alignment marks provided around the array region and used for alignment when bonding to the second substrate, and the second substrate has second alignment marks used for alignment when bonding to the first substrate. (13) The photodetector according to (12), wherein the first substrate has a plurality of the first alignment marks provided so as to sandwich the array region. (14) The photodetector according to any one of (1) to (13), wherein the stacked structure includes a third substrate on which a logic circuit that processes signals read out from the photodetector elements is mounted, the second substrate is stacked on the third substrate, and the third substrate has an area smaller than that of the second substrate. (15) The photodetector according to (14), wherein the first substrate and the second substrate, and the second substrate and the third substrate are bonded by a plurality of bonding electrodes provided on each of the first to third substrates. (16) The photodetector according to (15), wherein the bonding electrodes contain copper. (17) The photodetector according to (15), wherein at least some of the plurality of bonding electrodes electrically connect the first substrate and the second substrate, and the second substrate and the third substrate. (18) The photodetector according to any one of (14) to (17), wherein the second substrate comprises: a second semiconductor substrate on which the plurality of transistors are provided; a pair of wiring layers arranged to sandwich the second semiconductor substrate; and through electrodes that penetrate the second semiconductor substrate and electrically connect the wiring in the pair of wiring layers, and the through electrodes have a diameter that decreases from the first substrate side toward the third substrate side.(19) The photodetector according to any one of (1) to (18), wherein the first substrate has: a first semiconductor substrate on which the plurality of photodetector elements are provided; and a plurality of pixel separation sections which are provided so as to penetrate at least a part of the first semiconductor substrate along a film thickness direction of the first semiconductor substrate and separate the photodetector elements. (20) The photodetector according to any one of (1) to (19), wherein some of the plurality of pixel transistors are mounted on the first substrate. (21) The photodetector according to any one of (1) to (20), wherein at least some of the plurality of pixel transistors are mounted on the second substrate. (22) The photodetector according to any one of (1) to (13), wherein a logic circuit which processes signals read out from the photodetector elements is mounted on the second substrate. (23) An electronic device equipped with a photodetector, wherein the photodetector has a laminated structure in which a first substrate on which a plurality of photodetection elements are provided and a second substrate on which a plurality of transistors are mounted are laminated, and the first substrate has an area smaller than that of the second substrate.

[0150] REFERENCE SIGNS LIST 1, 1a Imaging device 10, 10c, 20, 30, 30c Substrate 10d Dummy substrate 11, 21, 31 Semiconductor substrate 12 Pixel 13 Pixel region 15, 25, 26, 37 Wiring layer 22 Readout circuit 23 Pixel drive line 24 Vertical signal line 32 Logic circuit 33 Vertical drive circuit 34 Column signal processing circuit 35 Horizontal drive circuit 36 ​​System control circuit 50 Support substrate 101 Photoelectric conversion unit 102 Transfer transistor 103 Floating diffusion 110, 210 Bonding electrode 112, 212, 222, 312, 350 Insulating film 113, 213 Pixel array region 114, 214 Peripheral region 132 Silicon nitride film 134 Oxide film 136 Light-shielding film 138 Low refractive index film 140 Protective film 142 Silicon oxide film 160 Color filter 162 On-chip lens 164 Photoelectric conversion section 170, 172 Opening 174, 176 Pad 180, 182 Pixel separation section 201 Reset transistor 202 Amplification transistor 203 Selection transistor 260 Through electrode 400a, 400b Alignment mark 510 Connection section 900 Smartphone 901 CPU 902 ROM 903 RAM 904 Storage device 905 Communication module 906 Communication network 907 Sensor module 910 Display device 911 Speaker 912 Microphone 913 Input device 914 Bus

Claims

1. A photodetection device comprising a layered structure in which a first substrate having a plurality of photodetection elements and a second substrate having a plurality of transistors mounted thereon are stacked, the first substrate having an area smaller than that of the second substrate.

2. The photodetector according to claim 1, wherein at least a portion of a side surface of the first substrate is covered with a light-shielding film.

3. The photodetector device according to claim 2, wherein a first electrode for connection to an external device is provided in a peripheral region surrounding the first substrate on the surface of the second substrate facing the first substrate.

4. The photodetection device according to claim 3, wherein the first substrate is stacked on the second substrate, and the first electrode is positioned lower than the photodetection element in a stacking direction of the photodetection device.

5. The photodetector according to claim 4, wherein the peripheral region is covered with the light-shielding film, and the light-shielding film has a first opening exposing an upper surface of the first electrode.

6. The light detection device according to claim 5, wherein a protective film is laminated on said light-shielding film in said peripheral region, and said protective film has a second opening communicating with said first opening.

7. The light detection device according to claim 6, wherein the protective film is provided so as to extend onto the first substrate.

8. The light detection device according to claim 7, wherein the protective film has a step between the first substrate and the peripheral region.

9. The photodetection device according to claim 7, wherein the protective film has a slope between the first substrate and the peripheral region.

10. The photodetector according to claim 3, wherein the light-shielding film includes a conductive film and is electrically connected to a second electrode having a predetermined potential, the second electrode being provided in the peripheral region of the second substrate.

11. The photodetector device of claim 10, wherein the light-shielding film has a third opening exposing an upper surface of the second electrode, and is arranged to cover an inner wall of the third opening, thereby electrically connecting to the second electrode.

12. The photodetection device as described in claim 1, wherein the first substrate has an array region in which the plurality of photodetection elements are arranged in a matrix, and a first alignment mark provided around the array region and used for alignment when bonding to the second substrate, and the second substrate has a second alignment mark used for alignment when bonding to the first substrate.

13. The photodetection device according to claim 12, wherein the first substrate has a plurality of the first alignment marks disposed so as to sandwich the array region.

14. The photodetection device of claim 1, wherein the laminated structure includes a third substrate on which a logic circuit for processing a signal read out from the photodetection element is mounted, the second substrate is laminated on the third substrate, and the third substrate has an area smaller than that of the second substrate.

15. The optical detection device described in claim 14, wherein the first substrate and the second substrate, and the second substrate and the third substrate are bonded together by a plurality of bonding electrodes provided on each of the first to third substrates.

16. The optical detection device of claim 15, wherein the junction electrode comprises copper.

17. The photodetection device of claim 15, wherein at least a portion of the plurality of junction electrodes electrically connects between the first substrate and the second substrate, and between the second substrate and the third substrate.

18. The photodetector device of claim 14, wherein the second substrate comprises: a second semiconductor substrate having the plurality of transistors; a pair of wiring layers arranged to sandwich the second semiconductor substrate; and a through electrode that penetrates the second semiconductor substrate and electrically connects the wiring in the pair of wiring layers, the through electrode having a diameter that decreases from the first substrate side toward the third substrate side.

19. The photodetection device according to claim 1, wherein the first substrate comprises: a first semiconductor substrate on which the plurality of photodetection elements are provided; and a plurality of pixel separation sections which are provided along a film thickness direction of the first semiconductor substrate and penetrate at least a portion of the first semiconductor substrate, isolating the photodetection elements.

20. An electronic device equipped with a photodetector, the photodetector having a layered structure in which a first substrate having a plurality of photodetection elements and a second substrate having a plurality of transistors are stacked, and the first substrate has an area smaller than that of the second substrate.

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