Fluorescence detection device

Abstract

The present invention provides a fluorescence detection device that makes it possible to easily reduce the size of the entire device. Provided is a fluorescence detection device wherein: a light suppression layer has a plurality of openings and has disposed therein a plurality of accommodation sections which are each surrounded by a side wall of a through hole and each accommodate a sample; the openings are disposed at positions overlapping the accommodation sections; and a light-receiving element is disposed so as to surround the accommodation sections in plan view.

Description

Fluorescence detection device

[0001] The present invention relates to a fluorescence detection device.

[0002] A detection device is known that has an optical system with a dichroic mirror and detects fluorescence reflected from a sample (for example, Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2005-321753

[0004] However, the detection device described in Document 1 has a structure in which excitation light is reflected by a dichroic mirror and irradiated onto a sample, which increases the number of parts and may result in an increase in the size of the entire detection device.

[0005] An object of the present invention is to provide a fluorescence detection device that can easily be made smaller as a whole.

[0006] A fluorescence detection device according to one aspect of the present invention includes a substrate, a light source that irradiates excitation light onto a sample, and a detection unit that detects fluorescence. The detection unit includes a light-transmitting light-guiding layer that has a first surface and a second surface opposite to the first surface, a through-hole that penetrates the light-guiding layer from the first surface to the second surface in a direction perpendicular to the substrate, a light-receiving element that is covered by the light-guiding layer and that receives fluorescence emitted by the sample in response to the excitation light, and a light-inhibiting layer that is provided on the light-guiding layer and that inhibits transmission of the excitation light. The light-inhibiting layer has a plurality of openings and is surrounded by side walls of the through-holes. A plurality of storage units that store the samples are arranged in the light-inhibiting layer. The openings are positioned to overlap the storage units, and the light-receiving elements are arranged to surround the storage units in a planar view.

[0007] FIG. 1 is a plan view showing a fluorescence detection device according to the first embodiment. FIG. 2 is a block diagram showing an example of the configuration of the fluorescence detection device according to the first embodiment. FIG. 3 is a circuit diagram showing a sensor pixel according to the first embodiment. FIG. 4 is a plan view showing a light guide layer of the fluorescence detection device according to the first embodiment. FIG. 5 is a plan view showing a light suppression layer of the fluorescence detection device according to the first embodiment. FIG. 6 is a VI-VI' cross-sectional view of FIG. 4. FIG. 7 is a VII-VII' cross-sectional view of FIG. 4. FIG. 8A is a cross-sectional view showing a fluorescence detection device according to Modification 1 of the first embodiment. FIG. 8B is a cross-sectional view showing a fluorescence detection device according to Modification 2 of the first embodiment. FIG. 9 is a plan view of a fluorescence detection device according to the second embodiment. FIG. 10 is an X-X' cross-sectional view of FIG. 9. FIG. 11 is a plan view of a fluorescence detection device according to the third embodiment. FIG. 12 is a XII-XII' cross-sectional view of FIG. 11. FIG. 13 is a plan view of a fluorescence detection device according to the fourth embodiment. FIG. 14 is a XIV-XIV' cross-sectional view of FIG. 13.

[0008] Modes for carrying out the invention (embodiments) will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the following embodiments. Furthermore, the components described below include those that can be easily imagined by a person skilled in the art and those that are substantially identical. Furthermore, the components described below can be combined as appropriate. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily conceive while maintaining the gist of the invention are naturally included within the scope of the present invention. Furthermore, for clarity of explanation, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment. However, these are merely examples and are not intended to limit the interpretation of the present invention. Furthermore, in this specification and each figure, elements similar to those described above with reference to the previous figures may be designated by the same reference numerals, and detailed descriptions may be omitted as appropriate.

[0009] In this specification and claims, when expressing an aspect of placing another structure on top of a certain structure, the term "on top" is used, unless otherwise specified, to include both a case in which another structure is placed directly on top of a certain structure so as to be in contact with the certain structure, and a case in which another structure is placed above a certain structure via yet another structure.

[0010] First Embodiment Fig. 1 is a plan view showing a fluorescence detection device according to a first embodiment. As shown in Fig. 1, the fluorescence detection device 1 includes a sensor unit 10 and a detection unit 50. The detection unit 50 has a plurality of light receiving elements 31 and a plurality of storage units 300 on a substrate 21. The storage units 300 are arranged, for example, in a matrix. The storage units 300 are holders that hold samples. The detection unit 50 has a light guide layer 51. The plurality of light receiving elements 31 provided inside the light guide layer 51 are arranged in a lattice pattern surrounding the storage unit 300 in a plan view.

[0011] 2 is a block diagram showing an example of the configuration of the fluorescence detection device according to the first embodiment. As shown in Fig. 2, the sensor unit 10 has a substrate 21, a plurality of sensor pixels 3 (light-receiving elements 31) provided on the substrate 21, a gate line driving circuit 15, a signal line driving circuit 16, and a detection control circuit 11.

[0012] The substrate 21 has a detection area AA and a peripheral area GA. The detection area AA is an area in which a plurality of sensor pixels 3 are provided. Here, each sensor pixel 3 is an optical sensor having a light receiving element 31 and a housing portion 300, and further includes a capacitive element Ca and a drive transistor Tr, which will be described later. The peripheral area GA is an area between the periphery of the detection area AA and the outer edge of the substrate 21, and is an area in which a plurality of sensor pixels 3 are not provided. The gate line drive circuit 15, the signal line drive circuit 16, and the detection control circuit 11 are provided in the peripheral area GA. The substrate 21 is a drive circuit substrate that drives sensors for each predetermined detection area, and is also called a backplane or active matrix substrate.

[0013] In the following description, the first direction Dx is a direction in a plane parallel to the substrate 21. The second direction Dy is a direction in a plane parallel to the substrate 21, and is a direction perpendicular to the first direction Dx. The second direction Dy may intersect the first direction Dx without being perpendicular to it. The third direction Dz is a direction perpendicular to the first direction Dx and the second direction Dy, and is the normal direction to the main surface of the substrate 21. Furthermore, "planar view" refers to the positional relationship when viewed from a direction perpendicular to the substrate 21.

[0014] Each of the plurality of sensor pixels 3 has a function of outputting an electrical signal corresponding to light incident on its corresponding light receiving element 31, and can detect the intensity of fluorescence generated in the accommodation section 300 via a detection circuit 48 (described later) or the like. The light receiving element 31 is a photoelectric conversion element, such as an OPD (organic photodiode) or a PIN (positive intrinsic negative) photodiode using an organic semiconductor. The plurality of sensor pixels 3 (plurality of light receiving elements 31) are arranged in a matrix in the detection area AA of the substrate 21.

[0015] The detection control circuit 11 controls the operations of the gate line drive circuit 15 and the signal line drive circuit 16 by supplying control signals Sa and Sb (see FIG. 2) to them, respectively, and further by supplying a reset signal RST (not shown in FIG. 2, see FIG. 3) to the reset transistor TrR. The gate line drive circuit 15 outputs a gate drive signal to the gate line GL (see FIG. 3) based on the control signal Sa. The signal line drive circuit 16 electrically connects the signal line SL selected based on the control signal Sb to the detection control circuit 11.

[0016] The sensor pixels 3 output electrical signals as detection signals Vdet to the signal line driving circuit 16. The detection control circuit 11 processes the detection signals Vdet from the multiple sensor pixels 3 and outputs a sensor value Vo based on the detection signals Vdet to a host IC (not shown). This allows the fluorescence detection device 1 to detect information related to the sample 54 (see FIG. 7).

[0017] 2, the detection control circuit 11 has a detection signal amplitude adjustment circuit 41, an A / D conversion circuit 42, and a signal processing circuit 43. The detection signal amplitude adjustment circuit 41 and the A / D conversion circuit 42 included in the detection control circuit 11 are connected to a signal line SL (see FIG. 3), and form a detection circuit 48 that processes the detection signal Vdet.

[0018] Next, a configuration example of the sensor unit 10 will be described. Fig. 3 is a circuit diagram showing a sensor pixel according to the first embodiment. As shown in Fig. 3, the capacitive element Ca is a capacitance (sensor capacitance) formed in the light receiving element 31, and is connected in parallel with the light receiving element 31.

[0019] 3 shows two gate lines GL(m) and GL(m+1) arranged in the second direction Dy among the multiple gate lines GL. Also, two signal lines SL(n) and SL(n+1) arranged in the first direction Dx among the multiple signal lines SL. The sensor pixel 3 is an area surrounded by the gate lines GL and the signal lines SL.

[0020] The drive transistors Tr are provided corresponding to the plurality of light receiving elements 31, respectively. The drive transistors Tr are configured by thin film transistors, and in this example, are configured by n-channel MOS (Metal Oxide Semiconductor) type TFTs (Thin Film Transistors).

[0021] Each of the gate lines GL is connected to the gates of a plurality of drive transistors Tr arranged in a first direction Dx. Each of the signal lines SL is connected to one of the source and drain of a plurality of drive transistors Tr arranged in a second direction Dy. The other of the source and drain of each of the drive transistors Tr is connected to the cathode of the light receiving element 31 and the capacitance element Ca.

[0022] A sensor power supply signal VDDSNS is supplied from a power supply circuit (not shown) to the anode of the light receiving element 31. A sensor reference voltage COM, which serves as the initial potential of the signal line SL and the capacitance element Ca, is supplied from the power supply circuit via a reset transistor TrR to the signal line SL and the capacitance element Ca.

[0023] When the sensor pixel 3 is irradiated with light during the exposure period, a current corresponding to the amount of light flows through the light-receiving element 31, causing charge to accumulate in the capacitance element Ca. When the drive transistor Tr is turned on during the readout period, a current corresponding to the charge accumulated in the capacitance element Ca flows through the signal line SL. The signal line SL is connected to the detection circuit 48 via the output transistor TrS of the signal line drive circuit 16. This allows the fluorescence detection device 1 to detect a signal corresponding to the amount of light irradiated on the light-receiving element 31 for each sensor pixel 3.

[0024] During the readout period, the switch SSW of the detection circuit 48 is turned on and connected to the signal line SL. The detection signal amplitude adjustment circuit 41 of the detection circuit 48 converts the current or charge supplied from the signal line SL into a voltage corresponding to the current or charge. A reference potential (Vref) having a fixed potential is input to the non-inverting input terminal (+) of the detection signal amplitude adjustment circuit 41, and the signal line SL is connected to the inverting input terminal (-). In this embodiment, a signal identical to the sensor reference voltage COM is input as the reference potential (Vref) voltage. The detection signal amplitude adjustment circuit 41 also has a capacitance element Cb and a reset switch RSW. During the reset period, the reset switch RSW is turned on and the charge of the capacitance element Cb is reset.

[0025] As described above, the detection signal amplitude adjustment circuit 41 shown in FIGS. 2 and 3 is a circuit that adjusts the amplitude of the detection signal Vdet output from the sensor pixel 3, and is configured to include, for example, an amplifier.

[0026] 2 and 3, the A / D conversion circuit 42 converts the analog signal output from the detection signal amplitude adjustment circuit 41 into a digital signal. As shown in Fig. 2, the signal processing circuit 43 processes the digital signal from the A / D conversion circuit 42 and transmits the sensor value Vo to a host IC (not shown). In this way, the signal processing circuit 43 can be said to be a circuit that processes the detection signals Vdet from the multiple light receiving elements 31.

[0027] The driving transistor Tr is not limited to an n-type TFT, but may be a p-type TFT. The pixel circuit of the sensor pixel 3 shown in FIG. 3 is merely an example, and the sensor pixel 3 may be provided with a plurality of transistors corresponding to one light receiving element 31.

[0028] Fig. 4 is a plan view showing a light guide layer of the fluorescence detection device according to the first embodiment. Fig. 5 is a plan view showing a light suppression layer of the fluorescence detection device according to the first embodiment. Fig. 6 is a cross-sectional view taken along line VI-VI' in Fig. 4. Fig. 7 is a cross-sectional view taken along line VII-VII' in Fig. 4.

[0029] As shown in the hatched area in FIG. 4 and in FIG. 7 , the light guide layer 51 is a light-transmitting layer provided on the insulating film 27, covering the light receiving element 31, and for efficiently guiding the fluorescence L2. A through-hole 53 penetrating from the first surface 511 of the light guide layer 51 to the second surface 512 of the light guide layer 51 serves as the accommodation portion 300. The accommodation portion 300 has an opening bottom surface 53a of the through-hole 53 on the second surface 512. As shown in FIGS. 4 and 7 , the sidewall 513 of the accommodation portion 300 has an outer shape that becomes smaller as it approaches the insulating film 27. As shown in FIG. 4 , one accommodation portion 300 is disposed at a position surrounded by the gate line GL and the signal line SL. The accommodation portion 300 has a circular shape in a plan view. The shape of the accommodation portion 300 is not particularly limited and may be a square or polygonal shape in a plan view.

[0030] As shown in Fig. 4, one light receiving element 31 is arranged to surround one accommodation section 300. Then, as shown in Fig. 5, the light suppression layer 69 is provided above the light guide layer 51 in the third direction Dz, and is arranged at a position overlapping the light receiving element 31 in a plan view. The light suppression layer 69 will be described in detail later with reference to Fig. 7. For convenience of explanation, the light receiving elements 31 around one accommodation section 300 shown in Fig. 7 may be referred to as light receiving element 31a and light receiving element 31b, respectively.

[0031] 4 includes a semiconductor layer 61, a source electrode 62, a drain electrode 63, and a gate electrode 64. The semiconductor layer 61 extends along the gate line GL and intersects with the gate electrode 64 in a plan view. The gate electrode 64 is connected to the gate line GL and extends in a direction (second direction Dy) perpendicular to the gate line GL.

[0032] One end of the semiconductor layer 61 is connected to a source electrode 62 via a contact hole CH2. The source electrode 62 is connected to a connection pad 66 and is drawn out to the center of the lower electrode 23 (see FIG. 6) of the light-receiving element 31. The lower electrode 23 is connected to the connection pad 66 at its center via a contact hole CH1. With this configuration, the source electrode 62 of the drive transistor Tr is electrically connected to the light-receiving element 31. The other end of the semiconductor layer 61 is connected to a drain electrode 63 via a contact hole CH3. The drain electrode 63 is connected to a signal line SL.

[0033] 6, the fluorescence detection device 1 includes a circuit formation layer 70, an insulating film 27, and a light receiving element 31 stacked in this order on a substrate 21. The substrate 21 is an insulating substrate, and may be, for example, a glass substrate made of quartz, alkali-free glass, or the like.

[0034] The circuit formation layer 70 is provided on the substrate 21. The insulating film 27 is provided on the circuit formation layer 70 including the drive transistor Tr, covering the signal line SL. The insulating film 27 is an organic planarization film made of an organic insulating material.

[0035] As shown in FIG. 6, the circuit formation layer 70 includes an undercoat film 91, a gate insulating film 92, and an interlayer insulating film 93 as insulating films.

[0036] The undercoat film 91 has, for example, a two-layer laminated structure having insulating films 91a and 91b. The undercoat film 91 is formed of, for example, an inorganic insulating film such as a silicon nitride film or a silicon oxide film. The configuration of the undercoat film 91 is not limited to that shown in FIG. 6. For example, the undercoat film 91 may be a single-layer film or a laminated film of three or more layers.

[0037] The light-shielding film 670 is provided on the insulating film 91a. The light-shielding film 670 is provided between the semiconductor layer 61 and the substrate 21. The light-shielding film 670 can prevent light from entering the channel region of the semiconductor layer 61 from the substrate 21 side.

[0038] The drive transistor Tr is composed of a thin film transistor and is provided on a substrate 21. The semiconductor layer 61 is provided on an undercoat film 91. The gate insulating film 92 is provided on the undercoat film 91, covering the semiconductor layer 61. The gate insulating film 92 is an inorganic insulating film such as a silicon oxide film. The gate electrode 64 is provided on the gate insulating film 92.

[0039] In this embodiment, the driving transistor Tr has a top gate structure. However, the driving transistor Tr is not limited to this, and may have a bottom gate structure or a dual gate structure in which gate electrodes 64 are provided on both the upper and lower sides of the semiconductor layer 61.

[0040] The interlayer insulating film 93 is provided on the gate insulating film 92, covering the gate electrode 64. The interlayer insulating film 93 has, for example, a stacked structure of a silicon nitride film and a silicon oxide film. The source electrode 62 and the drain electrode 63 are provided on the interlayer insulating film 93. The source electrode 62 is connected to the source region of the semiconductor layer 61 via a contact hole CH2 provided in the gate insulating film 92 and the interlayer insulating film 93. The drain electrode 63 is connected to the drain region of the semiconductor layer 61 via a contact hole CH3 provided in the gate insulating film 92 and the interlayer insulating film 93.

[0041] Furthermore, the contact hole CH1 is provided in the lower electrode 23 so as to penetrate the insulating film 27 in the thickness direction (third direction Dz). The lower electrode 23 is connected to the connection pad 66 at the bottom of the contact hole CH1.

[0042] The insulating film 27 covers the source electrode 62 and the drain electrode 63 of the driving transistor Tr and is provided on the interlayer insulating film 93. In this embodiment, the contact hole CH1 in the insulating film 27 is provided in a region overlapping with the source electrode 62.

[0043] The light-receiving element 31 is provided on the insulating film 27. The light-receiving element 31 has a lower electrode 23, a lower buffer layer 37, an active layer 36, an upper buffer layer 38, and an upper electrode 24. The light-receiving element 31 is formed by stacking the lower electrode 23, the lower buffer layer 32, the active layer 36, the upper buffer layer 33, and the upper electrode 24 in this order. The light-receiving element 31 is an OPD (organic photodiode) that uses an organic semiconductor as the active layer 36. The shape of the light-receiving element 31, in plan view, is, for example, a rectangular outer periphery with a circular opening inside. The outer periphery of the light-receiving element 31 may also be square.

[0044] The lower electrode 23 is a cathode electrode of the light-receiving element 31 and is formed of a conductive material such as ITO (Indium Tin Oxide). The lower electrode 23 is provided separately for each light-receiving element 31. The lower buffer layer 32, the active layer 36, the upper buffer layer 38, and the upper electrode 24 are provided continuously across multiple light-receiving elements 31. Specifically, the lower buffer layer 37, the active layer 36, the upper buffer layer 38, and the upper electrode 24 are provided so as to overlap the lower electrode 23 of an adjacent light-receiving element 31. The lower electrode 23 is electrically connected to the source electrode 62 at the bottom of the contact hole CH1 near the drive transistor Tr. The lower buffer layer 32, the active layer 36, the upper buffer layer 33, and the upper electrode 24 may be provided separately for each sensor pixel 3.

[0045] The active layer 36 changes its characteristics (e.g., voltage-current characteristics and resistance value) depending on the light irradiated thereon. An organic material is used as the material for the active layer 36. Specifically, the active layer 36 has a bulk heterostructure in which a p-type organic semiconductor and an n-type organic semiconductor, an n-type fullerene derivative (PCBM), are mixed. Examples of low-molecular-weight organic materials that can be used for the active layer 36 include C60 (fullerene), PCBM (phenyl C61-butyric acid methyl ester), CuPc (copper phthalocyanine), F16CuPc (fluorinated copper phthalocyanine), rubrene (5,6,11,12-tetraphenyltetracene), and PDI (perylene derivative).

[0046] The active layer 36 can be formed using these low-molecular-weight organic materials by a vapor deposition (dry process). In this case, the active layer 36 may be, for example, a laminated film of CuPc and F16CuPc, or a laminated film of rubrene and C60. The active layer 36 can also be formed by a coating (wet process). In this case, the active layer 36 is formed using a material that combines the above-mentioned low-molecular-weight organic material with a high-molecular-weight organic material. Examples of high-molecular-weight organic materials that can be used include P3HT (poly(3-hexylthiophene)) and F8BT (F8-alt-benzothiadiazole). The active layer 36 can be a film in which P3HT and PCBM are mixed, or a film in which F8BT and PDI are mixed.

[0047] The lower buffer layer 37 is an electron transport layer, and the upper buffer layer 38 is a hole transport layer. The lower buffer layer 37 and the upper buffer layer 38 are provided to facilitate the electrons and holes generated in the active layer 36 reaching the lower electrode 23 or the upper electrode 24. The lower buffer layer 37 (electron transport layer) is in direct contact with the upper surface of the lower electrode 23. The active layer 36 is in direct contact with the upper surface of the lower buffer layer 37. Ethoxylated polyethyleneimine (PEIE) or the like is used as a material for the electron transport layer.

[0048] The upper buffer layer 38 (hole transport layer) is in direct contact with the active layer 36, and the upper electrode 24 is in direct contact with the upper buffer layer 38. The material of the hole transport layer is a metal oxide layer. As the metal oxide layer, tungsten oxide (WO ３ ), molybdenum oxide (MoO ３ ) etc. are used.

[0049] The materials and manufacturing methods of the lower buffer layer 37, the active layer 36, and the upper buffer layer 38 are merely examples, and other materials and manufacturing methods may be used. For example, the lower buffer layer 37 and the upper buffer layer 38 are not limited to single-layer films, and may be formed as multilayer films including a hole blocking layer and an electron blocking layer. The sensor pixel circuit is configured appropriately depending on the orientation of the diode.

[0050] The upper electrode 24 is provided on the upper buffer layer 38. The upper electrode 24 is an anode electrode of the light-receiving element 31 and is formed continuously across the entire detection area AA. In other words, the upper electrode 24 is provided continuously on the multiple light-receiving elements 31. The upper electrode 24 faces the multiple lower electrodes 23, sandwiching the lower buffer layer 37, the active layer 36, and the upper buffer layer 38 between them. The upper electrode 24 is formed of a light-transmitting conductive material such as ITO or IZO. Alternatively, the upper electrode 24 can be a light-transmitting metal thin film, such as silver (Ag), aluminum (Al), or gold (Au), with a thickness of approximately several tens of nanometers. The upper electrode 24 may also be a laminated film of multiple light-transmitting conductive materials.

[0051] Therefore, by providing the drive transistor Tr and the light receiving element 31 on the same substrate 21, it is possible to configure a thin fluorescence detection device that has a relatively large area.

[0052] 7 , the fluorescence detection device 1 includes a light source 60, a substrate 21, a circuit-forming layer 70, an insulating film 27, and a detection unit 50. In the fluorescence detection device 1, the substrate 21, the circuit-forming layer 70, the insulating film 27, and the detection unit 50 are stacked in this order in a third direction Dz that is perpendicular to the substrate 21.

[0053] When the fluorescence detection device 1 irradiates the sample 54 with excitation light L1 of a predetermined wavelength, the substance in the sample 54 is excited and emits fluorescence L2 having spectral characteristics whose peak wavelength is slightly shifted from the wavelength of the excitation light. The fluorescence detection device 1 is capable of observing the intensity of this fluorescence L2 and the emission intensity distribution of the fluorescence L2.

[0054] The light source 60 is a light-emitting element that oscillates and emits predetermined excitation light L1 toward the upper surface of the detection unit 50 .

[0055] The detection unit 50 includes a light-transmitting light-guiding layer 51 having a first surface 511 and a second surface 512 opposite the first surface 511, a through-hole 53 penetrating from the first surface 511 to the second surface 512, and a light-receiving element 31 covered by the light-guiding layer 51 for receiving fluorescence L2 emitted by a sample 54 in response to excitation light L1.

[0056] 7 is formed of an inorganic insulating film such as a silicon nitride film (SiN) or a silicon oxynitride film (SiON). The light guide layer 51 may be made of an organic material such as an acrylic resin that is light-transmitting.

[0057] The refractive index of the light guide layer 51 is preferably higher than those of the substrate 21 and the fluorescent solution, and the light guide layer 51 preferably has a high transmittance for the fluorescent light L2 and a low transmittance for the excitation light L1.

[0058] The opening bottom surface 53 a is covered by the upper surface 270 of the insulating film 27. The light guide layer 51 is located on the upper surface 270 of the insulating film 27 and is formed integrally with the insulating film 27.

[0059] A plurality of the storage sections 300 for storing the samples 54 are arranged, each surrounded by the side wall 513 of the through-hole 53 .

[0060] 7 , the detection unit 50 includes a light suppression layer 69. The light suppression layer 69 is a layer that suppresses transmission of excitation light, and includes a light-shielding layer 67 and a reflective layer 68. The detection unit 50 is formed by laminating a light guide layer 51, the reflective layer 68, and the light-shielding layer 67 in this order. The light-shielding layer 67 has a plurality of openings 67a that penetrate in the third direction Dz, and the reflective layer 68 has a plurality of openings 68a that penetrate in the third direction Dz. The openings 67a, 68a are arranged at positions that overlap with the storage unit 300.

[0061] As shown in FIG. 5, the openings 67a and 68a have a shape that is approximately the same size as the shape of the storage section 300 in a plan view, and are, for example, circular in a plan view.

[0062] The light-shielding layer 67 suppresses transmission of the excitation light L1 by blocking the excitation light L1 emitted from the light source 60. The light-shielding layer 67 is made of a material such as a black resin or a metal such as molybdenum (Mo) that has a light-shielding property against the excitation light L1 and a high absorption rate of the excitation light L1.

[0063] This blocks the excitation light L1 incident on the light-shielding layer 67 , thereby preventing the excitation light L1 from reaching the light-receiving element 31 .

[0064] The reflective layer 68 suppresses transmission of the excitation light L1 by reflecting the excitation light L1 emitted from the light source 60. The reflective layer 68 is made of a material such as resin or metal that has a high reflectance for the fluorescent light L2.

[0065] This allows the fluorescence L2 to be reflected and propagated within the light guide layer 51 , and the fluorescence L2 to be incident on the light receiving element 31 .

[0066] The storage section 300 and the openings 67a, 68a are filled with a specimen, and the sample 54 is stored inside the storage section 300.

[0067] Here, the specimen is, for example, a sample stained with a fluorescent dye and dispersed in a liquid or dissolved in a solvent to form a fluorescent solution. The fluorescent dye and solvent used may be selected to be appropriate for the subject of analysis, and are not particularly limited.

[0068] The fluorescent substance that is the sample 54 is, for example, an organic dye (fluorescein, rhodamine and their derivatives, Texas Red, sulforhodamine), an amino acid (tryptophan, phenylalanine, tyrosine), a base pair derivative, chlorophyll, a rare earth element, a fluorescent protein, a fluorescent probe, etc.

[0069] This makes it possible to separate the excitation light L1 from the fluorescence L2 without using a cut filter, and therefore the entire device can be easily made smaller.

[0070] Furthermore, the light suppression layer 69 suppresses the excitation light L1 from entering the light receiving element 31, so that the fluorescence L2 from the specimen generated in each storage section 300 is incident on the light receiving element 31 with the excitation light L1 suppressed. This improves the detection accuracy of the fluorescence L2 from the specimen generated in each storage section 300.

[0071] Because the light guide layer 51 is translucent, the fluorescence L2 from the specimen generated in the specific storage section 300 shown in FIG. 7 may reach not only the light receiving element 31, which is intended to receive the fluorescence, but also the light receiving elements 31a and 31b. However, the amount of fluorescence L2 generated in the specific storage section 300 shown in FIG. 7 received by the intended light receiving element 31 is greater than that of the adjacent light receiving elements 31a and 31b. Therefore, the detected fluorescence intensity is highest in the light receiving element 31 located closest to the specific storage section 300 shown in FIG. 7, and is lower in the light receiving elements 31a and 31b located farther from the storage section 300. In other words, the light receiving element 31 is strongly influenced by the fluorescence L2 generated in the specific storage section 300, while it is weakly influenced by the fluorescence L2 generated in the storage section 300 closest to the light receiving elements 31a and 31b. Conversely, the light receiving elements 31a and 31b are strongly influenced by the fluorescence L2 generated in the closest accommodation unit 300, and the influence of the fluorescence L2 generated in the specific accommodation unit 300 closest to the light receiving element 31 is weak.

[0072] Therefore, by statistically determining the intensity distribution in the multiple light-receiving elements 31, including the light-receiving elements 31 a and 31 b, it is possible to measure the fluorescence intensity distribution within the plane of the detection area AA (see FIG. 1 ). As a result, it is possible to determine which storage section 300 has the highest fluorescence intensity based on the fluorescence intensity distribution.

[0073] (Modification 1 of First Embodiment) FIG. 8A is a cross-sectional view showing a fluorescence detection device according to Modification 1 of the first embodiment.

[0074] 8A , the fluorescence detection device 1a according to the first modification of the first embodiment may have a structure in which the reflective layer 68 is not provided, and only the light-shielding layer 67 is provided on the light-guiding layer 51. This can block the excitation light L1 incident on the light-shielding layer 67 and prevent the excitation light L1 from reaching the light-receiving element 31.

[0075] (Modification 2 of First Embodiment) FIG. 8B is a cross-sectional view showing a fluorescence detection device according to Modification 2 of the first embodiment.

[0076] 8B , the fluorescence detection device 1b according to the second modification of the first embodiment may have a structure in which the light-shielding layer 67 is not provided, and only the reflective layer 68 is provided on the light-guiding layer 51. This allows the excitation light L1 incident on the reflective layer 68 to be reflected as reflected light L3, thereby preventing the excitation light L1 from reaching the light-receiving element 31.

[0077] Second Embodiment Fig. 9 is a plan view of a fluorescence detection device according to a second embodiment. Fig. 10 is a cross-sectional view taken along the line X-X' in Fig. 9. In the following description, the same components as those described in the above-mentioned embodiments are designated by the same reference numerals, and redundant description will be omitted.

[0078] 9 and 10 , the fluorescence detection device 1A includes a substrate 21, a circuit formation layer 70, an insulating film 27, and a detection unit 50. The detection unit 50 further includes a light-shielding film LS1. The light-shielding film LS1 has light-shielding properties against the fluorescence L2 and is formed of a black resin, a metal such as molybdenum (Mo), or the like, which has a high absorptivity for the fluorescence L2.

[0079] 9, the light-shielding film LS1 is provided at a position overlapping the gate lines GL and the signal lines SL in a plan view, and is disposed so as to surround each of the light-receiving elements 31. As shown in FIG. 10, the light-shielding film LS1 is covered with a light-guiding layer 51.

[0080] If adjacent light receiving elements 31 are not surrounded by a light-shielding film LS1, there is a possibility that the fluorescence L2 emitted from the specimen in the storage section adjacent to one of the light receiving elements 31 will be detected by the other light receiving element 31. However, if each light receiving element 31 is surrounded by a light-shielding film LS1, the fluorescence L2 emitted from one of the light receiving elements 31 will not be detected by the other light receiving element 31.

[0081] This makes it possible to prevent the fluorescence L2 from leaking from the light receiving element 31 surrounded by the light-shielding film LS1, and improves the accuracy of detecting fluorescence from the specimen for each storage section 300 of the light receiving element 31.

[0082] The light-shielding film LS1 may be made of a metal (such as silver (Ag) or aluminum (Al)) that has light-shielding properties against the fluorescence L2 and has a high reflectance for the fluorescence L2. In this case, the fluorescence L2 that propagates through the light-guiding layer 51 and reaches the light-shielding film LS1 is reflected by the light-shielding film LS1. When the reflected light propagates through the light-guiding layer 51 again, a portion of the reflected light is irradiated onto the light-receiving element 31, which is expected to increase the detection intensity.

[0083] (Third embodiment) Fig. 11 is a plan view of a fluorescence detection device according to a third embodiment. Fig. 12 is a schematic cross-sectional view taken along the line XII-XII' in Fig. 11. In the following description, the same components as those described in the above-mentioned embodiments are designated by the same reference numerals, and redundant description will be omitted.

[0084] The fluorescence detection device 1B shown in Fig. 12 includes a substrate 21, a circuit formation layer 70, an insulating film 27, and a detection unit 50. As shown in Fig. 11, the outer shape of the light receiving element 31 is hexagonal in plan view.

[0085] 11 and 12 has two sides along the second direction Dy. One side is arranged at a position overlapping the signal line SL in a plan view. The other side is arranged at a position not overlapping the signal line SL in a plan view.

[0086] The signal line SL is bent and extends so as to straddle the space between the light receiving elements 31 adjacent to each other in the second direction Dy in a plan view.

[0087] Here, if the signal line SL is disposed between adjacent light receiving elements 31 as in the first embodiment, the bending angle of the signal line SL becomes large and the length of the signal line SL becomes long. However, in the third embodiment, by disposing the signal line SL so that it overlaps with the light receiving elements 31 in a plan view, the bending angle of the signal line SL becomes small and the length of the signal line SL becomes shorter, thereby suppressing problems such as signal delay.

[0088] Furthermore, compared to the fluorescence detection device 1 of the first embodiment, this increases the proportion of the area of ​​the light receiving elements located at equal distances from the storage section 300, thereby improving the accuracy of fluorescence detection by the sample for each storage section 300 of the light receiving element 31.

[0089] (Fourth embodiment) Fig. 13 is a plan view of a fluorescence detection device according to a fourth embodiment. Fig. 14 is a schematic cross-sectional view taken along the line XIV-XIV' in Fig. 13. In the following description, the same components as those described in the above-mentioned embodiments are designated by the same reference numerals, and redundant description will be omitted.

[0090] The fluorescence detection device 1C includes a substrate 21, a circuit formation layer 70, an insulating film 27, a detection section 50, and a bank 80 provided on the detection section 50.

[0091] The bank 80 is disposed so as to surround the plurality of light receiving elements 31 in a plan view. The bank 80 is disposed on the light suppression layer 69. The bank 80 is formed of, for example, an acrylic resin. An enclosed region 800 surrounded by the plurality of containing sections 300, the plurality of openings 67 a, 68 a, and the bank 80 is filled with a sample.

[0092] The sample 54 is accommodated inside the accommodation portion 300. The sample 54 is also accommodated on the light suppression layer 69 in the surrounding region 800.

[0093] This allows the amount of sample 54 to be increased, thereby increasing the absolute value of the fluorescence intensity.

[0094] In the enclosed area 800 , the fluorescence L 2 emitted from the sample 54 in response to the excitation light L 1 is totally reflected at the interface between the air and the specimen, or is directly incident on the light receiving element 31 .

[0095] This increases the absolute intensity of the fluorescence, thereby increasing the signal-to-noise ratio (SNR), and improving the accuracy of detecting fluorescence from the specimen in each storage section 300 of the light receiving element 31 .

[0096] Although preferred embodiments of the present invention have been described above, the present invention is not limited to such embodiments. The contents disclosed in the embodiments are merely examples, and various modifications are possible without departing from the spirit of the present invention. Appropriate modifications made without departing from the spirit of the present invention naturally fall within the technical scope of the present invention. At least one of various omissions, substitutions, and modifications of components can be made without departing from the gist of each of the above-described embodiments and modifications.

[0097] REFERENCE SIGNS 1, 1a, 1b, 1A, 1B, 1C Fluorescence detection device 10 Sensor section 21 Substrate 31 Light receiving element 50 Detection section 51 Light guide layer 53 Through hole 54 Sample 60 Light source 67 Light shielding layer 68 Reflection layer 69 Light suppression layer 67a, 68a Opening 80 Bank 300 Storage section 513 Side wall 511 First surface 512 Second surface GL Gate line LS1 Light shielding film SL Signal line Tr Drive transistor

Claims

1. A fluorescence detection device comprising: a substrate; a light source which irradiates excitation light onto a sample; and a detection unit which detects fluorescence, the detection unit comprising: a light-transmitting light-guiding layer having a first surface and a second surface opposite to the first surface, a through-hole which penetrates the light-guiding layer from the first surface to the second surface in a direction perpendicular to the substrate, a light-receiving element which is covered by the light-guiding layer and receives fluorescence emitted by the sample in response to the excitation light, and a light-suppressing layer which is provided on the light-guiding layer and which suppresses transmission of the excitation light, the light-suppressing layer having a plurality of openings, a plurality of storage sections for storing the samples are arranged surrounded by side walls of the through-holes, the openings are arranged at positions which overlap the storage sections, and the light-receiving element is arranged to surround the storage section in a planar view.

2. The fluorescence detection device according to claim 1, wherein the light suppression layer includes a light-shielding layer having a light-shielding property and a light-reflecting layer that reflects light.

3. The fluorescence detection device according to claim 1, wherein the light suppression layer includes a light-shielding layer having light-shielding properties.

4. The fluorescence detection device according to claim 1, wherein the light suppression layer includes a reflective layer that reflects light.

5. The fluorescence detection device according to claim 2, further comprising a drive transistor for controlling the light receiving element, the drive transistor being disposed on the substrate.

6. The fluorescence detection device according to claim 5, wherein the containing section is surrounded by adjacent gate lines and adjacent signal lines, the detection section has a light-shielding film provided in the light-guiding layer between adjacent light-receiving elements, and the light-shielding film is positioned so as to overlap the gate lines and the signal lines in a planar view.

7. The fluorescence detection device according to claim 2 or 6, wherein the shape of the light receiving element is hexagonal in a plan view.

8. A fluorescence detection device according to claim 2 or 5, further comprising a bank provided on said detection section, said bank being arranged to surround a plurality of said light receiving elements in a plan view.

Images