Wiring board and semiconductor device

Abstract

A wiring board according to the present disclosure comprises: a first base material; a second base material that is made of an organic resin, that contains a plurality of inorganic particles, and that is bonded to the first base material; and wiring that is located on the second base material. The first base material has higher rigidity than the second base material. The second base material includes: a first organic resin layer; and a second organic resin layer laminated on the first organic resin layer. If a region, in the first organic resin layer, which faces the wiring and which is part of an interface region that interfaces the second organic resin layer is defined as a first wiring region, and a region, in the interface region, which faces the second organic resin layer is defined as a first bonding region, the content of the inorganic particles in the first bonding region is lower than the content of the inorganic particles in the first wiring region.

Description

Wiring board and semiconductor device

[0001] The present disclosure relates to a wiring substrate and a semiconductor device.

[0002] A wiring board is known in which an organic substrate with wiring formed thereon is laminated on a glass cloth substrate as a core material. The organic substrate has multiple organic resin layers, and each organic resin layer contains inorganic particles such as silica (Patent Document 1).

[0003] JP 2014-27212 A

[0004] A wiring board according to the present disclosure includes a first substrate, a second substrate made of an organic resin containing a plurality of inorganic particles and bonded to the first substrate, and wiring located on the second substrate. The first substrate has higher rigidity than the second substrate. The second substrate includes a first organic resin layer and a second organic resin layer laminated on the first organic resin layer. When a region of the first organic resin layer at an interface with the second organic resin layer that faces the wiring is defined as a first wiring region, and a region of the interface region that faces the second organic resin layer is defined as a first junction region, the content of inorganic particles in the first junction region is lower than the content of inorganic particles in the first wiring region.

[0005] FIG. 1 is a schematic cross-sectional view showing a state in which a semiconductor device according to an embodiment is mounted on a motherboard. FIG. 2 is a schematic cross-sectional view showing the configuration of a wiring substrate according to an embodiment. FIG. 3 is a schematic cross-sectional view showing the configuration of a second substrate according to an embodiment. FIG. 4 is a schematic cross-sectional view showing the configurations of a first substrate and a second substrate according to an embodiment. FIG. 5 is a schematic view for explaining a method for manufacturing a second substrate according to an embodiment. FIG. 6 is a schematic view for explaining a method for manufacturing a second substrate according to an embodiment. FIG. 7 is a schematic view for explaining a method for manufacturing a second substrate according to an embodiment.

[0006] Hereinafter, embodiments for carrying out a wiring board and a semiconductor device according to the present disclosure (hereinafter referred to as "embodiments") will be described in detail with reference to the drawings. Note that the present disclosure is not limited to these embodiments. Furthermore, the embodiments can be appropriately combined as long as the processing content is not contradictory. Furthermore, the same components in the following embodiments will be assigned the same reference numerals, and redundant explanations will be omitted.

[0007] Furthermore, in the following embodiments, expressions such as "constant," "orthogonal," "perpendicular," or "parallel" may be used, but these expressions do not necessarily mean "constant," "orthogonal," "perpendicular," or "parallel" in the strict sense. In other words, the above expressions allow for deviations due to, for example, manufacturing precision or installation precision.

[0008] In addition, in the drawings referred to below, for ease of understanding, an orthogonal coordinate system may be shown in which the X-axis direction, Y-axis direction, and Z-axis direction, which are perpendicular to each other, are defined, and the positive Z-axis direction is the vertically upward direction.

[0009] While inorganic particles have the effect of improving the electrical properties of the organic resin substrate, they may also reduce the adhesion between organic resin layers.

[0010] The present disclosure provides a technique that can improve the electrical properties of an organic resin substrate by using inorganic particles, while also improving the adhesion between organic resin layers.

[0011] First, the configuration of a semiconductor device 100 according to an embodiment will be described with reference to Fig. 1. Fig. 1 is a schematic cross-sectional view showing a state in which the semiconductor device 100 according to the embodiment is mounted on a motherboard 4.

[0012] As shown in FIG. 1, the semiconductor device 100 includes a wiring substrate 1 , a plurality of semiconductor elements 2 , and an intermediate substrate 3 .

[0013] The wiring board 1 is mounted on a motherboard 4. Details of the wiring board 1 will be described later.

[0014] The semiconductor element 2 is mounted on the wiring substrate 1 via an intermediate substrate 3. The semiconductor element 2 is, for example, a chip or chiplet in which a circuit or element is formed on a substrate made of a material other than a semiconductor, such as a semiconductor chip or a glass substrate. The chiplet is a functional block that constitutes part of the integrated circuit of the semiconductor device 100.

[0015] 1 shows two semiconductor elements 2, the semiconductor device 100 may include three or more semiconductor elements. The semiconductor device 100 may also include only one semiconductor element 2. For example, if the semiconductor element 2 is a chiplet, a plurality of semiconductor elements 2 may form an integrated circuit having one function.

[0016] The relay substrate 3 is a so-called interposer, and relays the electrical connection between the wiring substrate 1 and the semiconductor element 2. The relay substrate 3 is joined to the semiconductor element 2 via a joint 5, and is joined to the wiring substrate 1 via a joint 6. The joints 5 and 6 are, for example, solder. The Young's modulus of the relay substrate 3 may be smaller than that of the wiring substrate 1. In this case, the relay substrate 3 may have flexibility that allows it to deform according to the shape of the surface of the wiring substrate 1.

[0017] Next, the configuration of the wiring board 1 according to the embodiment will be described with reference to Fig. 2. Fig. 2 is a schematic cross-sectional view showing the configuration of the wiring board 1 according to the embodiment.

[0018] The wiring board 1 has a first base material 10 and a second base material 20. The wiring board 1 is a laminate of the first base material 10 and the second base material 20. The wiring board 1 also has a first wiring 30 and a second wiring 40.

[0019] <First Substrate> The first substrate 10 is a ceramic substrate. The first substrate 10 may be formed using a ceramic composite material containing a glass component, known as glass ceramic. The glass ceramic may be any of a composite of a glass phase and ceramic particles, a composite of a glass phase and a crystalline phase formed by the crystallization of a portion of the glass phase, a form in which ceramic particles exist in the glass phase, and a form in which a glass phase exists at the grain boundaries between ceramic particles. The first substrate 10 formed using ceramic in this manner has higher rigidity than a glass core material.

[0020] For example, the first substrate 10 may be made of low temperature co-fired ceramics (LTCC). When LTCC is used as the first substrate 10, a low-melting-point metal such as copper or silver, which has a relatively low electrical resistance, can be used as wiring.

[0021] The first substrate 10 may contain a ceramic filler as ceramic particles. Examples of the ceramic filler that can be used include alumina (aluminum oxide), calcium titanate, and magnesium titanate. In particular, the first substrate 10 containing alumina has high rigidity.

[0022] The first substrate 10 has a first surface 101 and a second surface 102 located on the opposite side to the first surface 101. The first substrate 10 may be a plate-like body having the first surface 101 and the second surface 102 as its main surfaces. In this embodiment, the low-melting-point metal is a metal with a melting point lower than that of typical metals used for wiring of ceramic substrates, such as tungsten or molybdenum.

[0023] In the embodiment, the first substrate 10 has a plurality of ceramic layers 11. The plurality of ceramic layers 11 are stacked along the thickness direction of the first substrate 10. A wiring board 1 having such a first substrate 10 has a high degree of freedom in design. Furthermore, by forming the first substrate 10 using a plurality of ceramic layers 11, the first substrate 10 can be manufactured while checking whether the first wiring 30 is properly formed for each layer, thereby improving the yield of the first substrate 10.

[0024] 1 and 2, the first substrate 10 has four ceramic layers 11, but the number of ceramic layers 11 is not limited to four. The number of ceramic layers 11 may be two, three, or five or more.

[0025] <Second Base Material> The second base material 20 is a base material containing an organic component. The organic component may be an organic resin. The organic resin may be, for example, an epoxy resin, an acrylic resin, a polycarbonate resin, a polyimide resin, an olefin resin, or a polyphenylene resin.

[0026] The organic resin may be, for example, polytetrafluoroethylene (PTFE) or other fluororesins or polyphenylene ether resins. The second substrate 20 may contain components other than the organic resin. In the present disclosure, the organic resin may be, for example, a material that accounts for 30% by mass or more of the material that constitutes the second substrate 20.

[0027] The second substrate 20 has a third surface 103 and a fourth surface 104 located on the opposite side to the third surface 103. The second substrate 20 may be a plate-like body having the third surface 103 and the fourth surface 104 as main surfaces.

[0028] The wiring board 1 according to the embodiment has two second substrates 20. One of the two second substrates 20 is bonded to the first surface 101 of the first substrate 10, and the other is bonded to the second surface 102 of the first substrate 10.

[0029] The second substrate 20, located on the first surface 101 of the first substrate 10, has a third surface 103 bonded to the first surface 101 of the first substrate 10, and multiple semiconductor elements 2 are placed on a fourth surface 104 of the second substrate 20 via an intermediate substrate 3 (see Figure 1).

[0030] The second substrate 20 located on the second surface 102 of the first substrate 10 has a third surface 103 joined to the first surface 101 of the first substrate 10, and a fourth surface 104 of the second substrate 20 joined to the motherboard 4 via the joint 7.

[0031] The second base material 20 has a plurality of organic resin layers 21. The plurality of organic resin layers 21 are stacked along the thickness direction of the second base material 20. A wiring board 1 having such a second base material 20 has a high degree of freedom in design. In the example shown in FIG. 2 , the second base material 20 has four organic resin layers 21, but the number of organic resin layers 21 is not limited to four. The number of organic resin layers 21 may be two, three, or five or more.

[0032] 1 and 2 show an example in which the wiring board 1 has the second base material 20 on each of both main surfaces (first surface 101 and second surface 102) of the first base material 10. However, the wiring board 1 is not limited to this, and it is sufficient that the wiring board 1 has the second base material 20 on at least the first surface 101 of the first base material 10.

[0033] The second substrate 20 containing an organic component is easier to form a fine wiring pattern on than an inorganic substrate. On the other hand, the first substrate 10 made of ceramic has higher rigidity and lower density than the second substrate 20.

[0034] The wiring board 1 according to the embodiment can increase rigidity while achieving finer wiring and narrower pitches by combining the first substrate 10 and the second substrate 20. Since warping of the board becomes more pronounced as the board becomes larger, the configuration of the wiring board 1 in which the first substrate 10 compensates for the low rigidity of the second substrate 20 is particularly useful for increasing the size of the board.

[0035] The first substrate 10 and the second substrate 20 are bonded together by, for example, hydrogen bonding. Specifically, the first substrate 10 and the second substrate 20 are bonded together by bonding between hydroxyl groups on the first substrate 10 and the second substrate 20. In this case, a ceramic material such as alumina having surface hydroxyl groups may be used for the first substrate 10, and an epoxy resin, which is a resin material containing hydroxyl groups, may be used for the second substrate 20. By directly bonding the first substrate 10 and the second substrate 20 in this way without using solder, underfill, or the like, the thickness of the wiring board 1 can be reduced and the manufacturing process can be simplified.

[0036] The first substrate 10 may contain a glass component, and the second substrate 20 may contain a coupling agent that chemically bonds with the glass component. For example, a silane coupling agent may be used as the coupling agent. Alternatively, a titanium-based coupling agent or an aluminum-based coupling agent may be used as the coupling agent. With this configuration, the first substrate 10 and the second substrate 20 are chemically bonded together, thereby more firmly bonding the first substrate 10 and the second substrate 20, which are made of different materials.

[0037] <First Wiring> The first wiring 30 is a through-hole conductor located in the first substrate 10. Specifically, the first wiring 30 has a through hole 31 that penetrates the first substrate 10, and a conductor 32. The conductor 32 is mainly composed of metal and is located inside the through hole 31.

[0038] The first wiring 30 has land portions 33 on the first surface 101 and the second surface 102 of the first substrate 10 .

[0039] <Second Wiring> The second wiring 40 has a plurality of vias 41 and one or more wiring layers 42. The vias 41 penetrate one or more organic resin layers 21. The wiring layers 42 are located between adjacent organic resin layers 21 and electrically connect the plurality of vias 41 to each other. The second wiring 40 may have a land portion located on the fourth surface 104 of the second base material 20.

[0040] The first wiring 30 and the second wiring 40 may be, for example, a metal conductor whose main component is copper or silver. For example, both the first wiring 30 and the second wiring 40 may be a metal conductor whose main component is copper. Alternatively, both the first wiring 30 and the second wiring 40 may be a metal conductor whose main component is silver. Alternatively, one of the first wiring 30 and the second wiring 40 may be a metal conductor whose main component is copper, and the other may be a metal conductor whose main component is silver.

[0041] By making all of the first wiring 30 and the second wiring 40 metal conductors whose main component is copper or silver, it is possible to obtain higher electrical characteristics compared to, for example, when one of the first wiring 30 and the second wiring 40 is made of a metal conductor other than copper or silver.

[0042] Of the first wiring 30 and the second wiring 40, only the first wiring 30 may contain a glass component. In this case, the first wiring 30 is firmly bonded to the first base material 10, which also contains a glass component, via the glass component. This allows the rigidity of the first base material 10 to be increased.

[0043] Furthermore, in the firing step when manufacturing the wiring board 1, the shrinkage rates of the first base material 10 and the first wiring 30 can be made to be equal to some extent, so that the first wiring 30 is less likely to be misaligned.

[0044] The first wiring 30 may be formed, for example, by printing a conductive paste containing copper and glass components on a green sheet that is the raw material of the ceramic layer 11, and firing the green sheet simultaneously with the green sheet. Specifically, the conductive paste may contain, for example, copper powder, borosilicate glass powder, and silica particles.

[0045] On the other hand, the second wiring 40 may be formed by copper plating, which allows the first wiring 30 and the second wiring 40 to have a configuration in which only the first wiring 30 contains a glass component.

[0046] The second wiring 40 may be electrically and thermally connected to the semiconductor element 2 via the relay substrate 3. By thermally connecting the second wiring 40, which is mainly composed of copper or silver, which has a relatively high thermal conductivity, to the semiconductor element 2, which serves as a heat source, the heat generated from the semiconductor element 2 can be efficiently dissipated via the second wiring 40 and the first wiring 30.

[0047] Next, the configuration of the second substrate 20 according to the embodiment will be described with reference to Fig. 3 and Fig. 4. Fig. 3 is a schematic cross-sectional view showing the configuration of the second substrate 20 according to the embodiment. Fig. 4 is a schematic cross-sectional view showing the configurations of the first substrate 10 and the second substrate 20 according to the embodiment.

[0048] As described above, the second base material 20 has a plurality of organic resin layers 21. Specifically, the plurality of organic resin layers 21 have a first layer 21a that is in contact with the first base material 10, and second layers 21b to 21d that are laminated on the first layer 21a. In other words, the second layers 21b to 21d refer to all of the plurality of organic resin layers 21 that are not in contact with the first base material 10. The second layers 21b to 21d are formed by laminating a first organic resin layer 21b, a second organic resin layer 21c, and a third organic resin layer 21d in this order.

[0049] The wiring board 1 according to the embodiment may further include a third wiring 50. The third wiring 50 is located on the second layers 21b to 21d. The third wiring 50 includes a first ground wiring 51, a second ground wiring 52, and a signal line 53.

[0050] Specifically, the first ground wiring 51 is located in the first organic resin layer 21b and is connected to the ground. The second ground wiring 52 is located in the third organic resin layer 21d and is connected to the ground. The signal line 53 is located in the second organic resin layer 21c and faces the first ground wiring 51 and the second ground wiring 52. The first ground wiring 51 and the second ground wiring 52 are so-called solid patterns and have a larger horizontal width (wiring width) than the signal line 53.

[0051] 3, the second base material 20, i.e., the first layer 21a and the second layers 21b to 21d (the first organic resin layer 21b, the second organic resin layer 21c, and the third organic resin layer 21d), contains inorganic particles 15. The inorganic particles 15 are, for example, silica. The inorganic particles 15 are not limited to silica, and may be alumina, magnesium oxide, zirconia, calcium oxide, calcium carbonate, or the like.

[0052] The inorganic particles 15 reduce the dielectric loss of the second base material 20 made of organic resin, and therefore have the effect of improving the electrical properties of the second base material 20. However, if the inorganic particles 15 are located at the interface between two organic resin layers 21, the contact area between the organic resin layers 21 will be reduced, which may reduce the adhesion between the organic resin layers.

[0053] Therefore, in the wiring board 1 according to the embodiment, the content of inorganic particles 15 in the interface region where the organic resin layers 21 are joined is relatively low, thereby improving the adhesion between the organic resin layers 21.

[0054] For example, the region of the interface between the first organic resin layer 21b and the second organic resin layer 21c that faces the third wiring 50 (here, the signal line 53) is referred to as the first wiring region W1, and the region of the interface between the first organic resin layer 21b and the second organic resin layer 21c is referred to as the first bonding region J1. In the wiring substrate 1 according to the embodiment, the content of inorganic particles 15 in the first bonding region J1 is lower than the content of inorganic particles 15 in the first wiring region W1. With this configuration, the content of inorganic particles 15 in the first bonding region J1, where the first organic resin layer 21b and the second organic resin layer 21c are in direct contact, is relatively low, thereby improving the adhesion between the organic resin layers 21. Furthermore, the content of inorganic particles 15 in the first wiring region W1, where the first organic resin layer 21b and the signal line 53 are in contact, is relatively high, thereby improving the electrical characteristics of the second base material 20. Thus, according to the wiring board 1 according to the embodiment, the electrical properties of the second base material 20 can be improved by the inorganic particles 15, while the adhesion between the organic resin layers 21 can be improved.

[0055] 3, a region of the second organic resin layer 21c at the interface with the first organic resin layer 21b that faces the third wiring 50 (here, the signal line 53) is defined as a second wiring region W2, and a region of the interface that faces the first organic resin layer 21b is defined as a second bonding region J2. In the wiring substrate 1 according to the embodiment, the content of inorganic particles 15 in the second bonding region J2 may be lower than the content of inorganic particles 15 in the second wiring region W2.

[0056] By making the content of inorganic particles 15 in the second junction region J2 lower than the content of inorganic particles 15 in the second wiring region W2 not only in the interface region of the first organic resin layer 21b but also in the interface region of the second organic resin layer 21c, the electrical properties of the second base material 20 can be improved by the inorganic particles 15 while further improving the adhesion between the organic resin layers 21.

[0057] Furthermore, although not shown, in the case where a region of the interface region of the second organic resin layer 21 c with the third organic resin layer 21 d that faces the third wiring 50 (here, the second ground wiring 52) is defined as a third wiring region W3 and a region of the interface region that faces the third organic resin layer 21 d is defined as a third junction region J3, the content of inorganic particles 15 in the third junction region J3 may be lower than the content of inorganic particles 15 in the third wiring region W3. Similarly, although not shown, in the case where a region of the interface region of the third organic resin layer 21 d with the second organic resin layer 21 c that faces the third wiring 50 (here, the second ground wiring 52) is defined as a fourth wiring region W4 and a region of the interface region that faces the second organic resin layer 21 c is defined as a fourth junction region J4, the content of inorganic particles 15 in the fourth junction region J4 may be lower than the content of inorganic particles 15 in the fourth wiring region W4.

[0058] The content of the inorganic particles 15 in the first wiring region W1 and the second wiring region W2 is preferably 40 wt % or more and 80 wt % or less, and the average particle size of the inorganic particles 15 in the first wiring region W1 and the second wiring region W2 is preferably 0.1 μm or more and 0.5 μm or less.

[0059] Furthermore, the maximum particle size of the inorganic particles 15 in the first wiring region W1 and the second wiring region W2 is preferably 10 times or less the average particle size. For example, if the average particle size of the inorganic particles 15 in the first wiring region W1 and the second wiring region W2 is 0.1 μm, the maximum particle size is preferably 1 μm or less, and if the average particle size is 0.5 μm, the maximum particle size is preferably 5 μm or less.

[0060] Furthermore, as shown in FIG. 3 , in the organic resin layer 21 including the first organic resin layer 21 b, the second organic resin layer 21 c, and the third organic resin layer 21 d, the content of inorganic particles 15 in a region R that overlaps with any of the first ground wiring 51, the signal line 53, and the second ground wiring 52 in a planar view may be higher than the content of inorganic particles 15 in a region that does not overlap with any of the first ground wiring 51, the signal line 53, and the second ground wiring 52 in a planar view.

[0061] When a stripline (a configuration in which a signal line is sandwiched between ground planes on both sides via an insulating layer) is used as wiring, the electrical characteristics of the stripline (the propagation speed of the electrical signal in the signal line) can be improved by relatively increasing the content of inorganic particles 15 in the region R where the stripline is located.

[0062] As shown in FIG. 4 , the wiring substrate 1 according to the embodiment has two second base materials 20. One of the two second base materials 20 is bonded to the first surface 101 of the first base material 10, and the other is bonded to the second surface 102 of the first base material 10. Although not shown, in each of the two second base materials 20, a region of the interface region of the first organic resin layer 21 b with the second organic resin layer 21 c that faces the third wiring 50 (here, the signal line 53) is defined as a first wiring region W1, and a region of the interface region that faces the second organic resin layer 21 c is defined as a first bonding region J1. The content of inorganic particles 15 in the first bonding region J1 is lower than the content of inorganic particles 15 in the first wiring region W1. This allows the inorganic particles 15 to enhance the electrical properties of the second base material 20 while improving the adhesion between the organic resin layers 21.

[0063] Furthermore, the two second substrates 20 each include third wiring 50 located on the second layers 21b to 21d. In this case, the third wiring 50 located on the second substrate 20 bonded to the first surface 101 of the first substrate 10 and the third wiring 50 located on the second substrate 20 bonded to the second surface 102 are electrically connected via conductors 32 that penetrate the first substrate 10. This allows the third wiring 50 to be arranged at a high density.

[0064] (Method for manufacturing second substrate) Next, a method for manufacturing the second substrate 20 according to the embodiment, specifically, an example of a method for forming the above-described wiring region and bonding region on the second substrate 20, will be described with reference to Figures 5 to 7. Figures 5 to 7 are schematic diagrams for explaining the method for manufacturing the second substrate 20 according to the embodiment. The second substrate 20 is formed by stacking, for example, four insulating layers (organic resin layers 21).

[0065] First, inorganic particles 15 such as silica are added to epoxy resin to prepare a varnish, which is then formed into a sheet to produce an organic resin sheet 22 .

[0066] Next, the produced organic resin sheet 22 is attached to the first base material 10. Thereafter, wiring is formed on the organic resin sheet 22. Of the wiring, the above-mentioned second wiring 40 may be formed, for example, by drilling holes that penetrate the organic resin sheet 22 in the thickness direction, thereby forming through holes in the organic resin sheet 22, and filling the through holes with a conductive paste.

[0067] In this case, the conductive paste may preferably be a composite metal powder made by adding a low-melting-point metal to copper or silver powder, such as tin (Sn), solder (Sn-Pb), bismuth (Bi), or antimony (Sb).

[0068] The conductor paste may contain, as a binder, one or more organic resins selected from the group consisting of epoxy resins, acrylic resins, polyethylene resins, etc. The binder is preferably 1 to 20 parts by mass per 100 parts by mass of the metal component.

[0069] Furthermore, the third wiring 50 of the wirings may be formed by a so-called semi-additive method. In the semi-additive method, a seed layer is first formed on the surface of the organic resin sheet 22, and then a pattern is formed using a plating resist. The formed pattern is subjected to electrolytic copper plating, and then the plating resist is peeled off, and only the seed layer is etched. In this way, a pattern (copper plating 60 and seed layer 70) is formed on the organic resin sheet 22, as shown in FIG. 5 .

[0070] Next, as shown in Fig. 6, the interface region of the organic resin sheet 22 on which the wiring has been formed is etched with fluoronitric acid 300. As a result, the inorganic particles 15 contained in the interface region of the organic resin sheet 22 are melted, as shown in Fig. 7. Here, the inorganic particles 15 located directly below the pattern in the interface region of the organic resin sheet 22 do not come into contact with the fluoronitric acid 300, and therefore remain on the organic resin sheet 22 without being melted by the fluoronitric acid 300. As a result, as shown in Fig. 7, an organic resin sheet 22 (hereinafter referred to as a pattern sheet) is formed that has a region (bonding region J) with a relatively high content of inorganic particles 15 and a region (wiring region W) with a relatively low content of inorganic particles 15.

[0071] Next, another pattern sheet is laminated on the above-mentioned pattern sheet. The other pattern sheet is also subjected to an etching treatment with fluoronitric acid 300 in advance, similar to the above-mentioned pattern sheet. Therefore, a bonding region J and a wiring region W are also formed on the surface of the other pattern sheet. To form the wiring region W on the other pattern sheet, for example, an etching treatment can be performed while covering the portion of the surface of the other pattern sheet that is located directly above the pattern formed on the above-mentioned pattern sheet with a mask. However, this is not limited to this, and the entire surface of the other pattern sheet may be etched without forming a mask on it. In this case, a bonding region J is formed on the entire surface of the other pattern sheet.

[0072] After laminating the plurality of pattern sheets on the first substrate 10 in this manner, the plurality of pattern sheets and the first substrate 10 are heat-treated to produce a laminate of the first substrate 10 and the second substrate 20 .

[0073] When a plurality of pattern sheets are stacked, gaps may be formed in the joining region J depending on the stacking state of the pattern sheets.

[0074] The present technology can also be configured as follows. (1) A wiring board (for example, wiring board 1) includes a first substrate (for example, first substrate 10), a second substrate (for example, second substrate 20) made of an organic resin and bonded to the first substrate, and wiring (for example, third wiring 50) located on the second substrate. The first substrate has higher rigidity than the second substrate. The second substrate includes a first organic resin layer (for example, first organic resin layer 21b) and a second organic resin layer (for example, second organic resin layer 21c) laminated on the first organic resin layer. (2) In the wiring substrate described in (1), when a region of the interface region of the first organic resin layer with the second organic resin layer that faces the wiring is defined as a first wiring region (for example, the first wiring region W1) and a region of the interface region that faces the second organic resin layer is defined as a first bonding region (for example, the first bonding region J1), the content of inorganic particles in the first bonding region may be lower than the content of inorganic particles in the first wiring region. (3) In the wiring substrate described in (1), when a region of the interface region of the second organic resin layer with the first organic resin layer that faces the wiring is defined as a second wiring region (for example, the second wiring region W2) and a region of the interface region that faces the first organic resin layer is defined as a second bonding region (for example, the second bonding region J2), the content of inorganic particles in the second bonding region may be lower than the content of inorganic particles in the second wiring region.(3) In the wiring board described in (1) or (2) above, the second base material further includes a third organic resin layer (for example, third organic resin layer 21 d) laminated on the second organic resin layer, and the wiring includes a first ground wiring (for example, first ground wiring 51) located in the first organic resin layer and connected to the ground, a second ground wiring (for example, second ground wiring 52) located in the third organic resin layer and connected to the ground, and a signal line (for example, signal line 53) located in the second organic resin layer and facing the first ground wiring and the second ground wiring, and the organic resin layer including the first organic resin layer, the second organic resin layer, and the third organic resin layer may have a higher content of inorganic particles in a region (for example, region R) that overlaps with any of the first ground wiring, the signal line, and the second ground wiring in a planar view than in a region that does not overlap with any of the first ground wiring, the signal line, and the second ground wiring in a planar view. (4) In the wiring board according to any one of (1) to (3) above, the first substrate may be made of ceramic. (5) In the wiring board according to any one of (1) to (4) above, the first substrate may have a plurality of ceramic layers. (6) In the wiring board according to any one of (1) to (5) above, the wiring board may have two second substrates, and the first substrate may have a first surface (for example, first surface 101) and a second surface (for example, second surface 102) located opposite the first surface, and the second substrate may be bonded to each of the first surface and the second surface. (7) In the wiring board according to (6) above, a conductor (for example, conductor 32) may penetrate between the first surface and the second surface of the first substrate, and wiring located on the second substrate bonded to the first surface may be electrically connected via the conductor. (8) In the wiring board according to any one of (1) to (7), the first base material may contain a glass component, and the second base material may contain a coupling agent that chemically bonds with the glass component. (9) In the wiring board according to (1), the content of inorganic particles in the first wiring region may be 40 wt % or more and 80 wt % or less, the average particle size may be 0.1 μm or more and 0.5 μm or less, and the maximum particle size may be 10 times the average particle size or less.(10) The semiconductor device 100 may have the wiring board according to any one of (1) to (9) above and a semiconductor element (for example, semiconductor element 2) mounted on a second base material of the wiring board.

[0075] The disclosed embodiments should be considered in all respects as illustrative and not restrictive. Indeed, the above-described embodiments may be embodied in various forms. Furthermore, the above-described embodiments may be omitted, substituted, or modified in various ways without departing from the scope and spirit of the appended claims.

[0076] REFERENCE SIGNS LIST 1 wiring substrate 2 semiconductor element 3 relay substrate 10 first base material 11 ceramic layer 15 inorganic particles 20 second base material 21 organic resin layer 21a first layer 21b first organic resin layer 21c second organic resin layer 21d third organic resin layer 30 first wiring 40 second wiring 50 third wiring 51 first ground wiring 52 second ground wiring 53 signal line 100 semiconductor device

Claims

1. A wiring board comprising: a first substrate; a second substrate made of an organic resin containing a plurality of inorganic particles and bonded to the first substrate; and wiring located on the second substrate, wherein the first substrate has a higher rigidity than the second substrate; the second substrate includes a first organic resin layer and a second organic resin layer laminated on the first organic resin layer; and wherein, when a region of the interface region of the first organic resin layer with the second organic resin layer that faces the wiring is defined as a first wiring region, and a region of the interface region that faces the second organic resin layer is defined as a first bonding region, a content of the inorganic particles in the first bonding region is lower than a content of the inorganic particles in the first wiring region.

2. The wiring board described in claim 1, wherein when a region of the interface region of the second organic resin layer with the first organic resin layer that faces the wiring is defined as a second wiring region, and a region of the interface region that faces the first organic resin layer is defined as a second bonding region, the content of the inorganic particles in the second bonding region is lower than the content of the inorganic particles in the second wiring region.

3. The wiring board according to claim 1 or 2, wherein the second base material further includes a third organic resin layer laminated on the second organic resin layer, and the wiring includes: a first ground wiring located in the first organic resin layer and connected to ground, a second ground wiring located in the third organic resin layer and connected to ground, and a signal line located in the second organic resin layer and facing the first ground wiring and the second ground wiring, and a content of the inorganic particles in a region of the organic resin layer including the first organic resin layer, the second organic resin layer and the third organic resin layer that overlaps with any of the first ground wiring, the signal line and the second ground wiring in a planar view is higher than a content of the inorganic particles in a region that does not overlap with any of the first ground wiring, the signal line and the second ground wiring in a planar view.

4. The wiring board according to any one of claims 1 to 3, wherein the first base material is made of ceramic.

5. The wiring board according to claim 4, wherein the first base material has a plurality of ceramic layers.

6. A wiring board as described in claim 4 or 5, comprising two second substrates, each of the first substrates having a first surface and a second surface located opposite the first surface, and the second substrates being bonded to each of the first surface and the second surface.

7. The wiring board according to claim 6, further comprising a conductor penetrating the first surface and the second surface of the first substrate, wherein the wiring located on the second substrate bonded to the first surface and the wiring located on the second substrate bonded to the second surface are electrically connected via the conductor.

8. The wiring board according to any one of claims 4 to 7, wherein the first base material contains a glass component, and the second base material contains a coupling agent that chemically bonds with the glass component.

9. A wiring board according to any one of claims 1 to 8, wherein the content of said inorganic particles in said first wiring region is 40 wt % or more and 80 wt % or less, the average particle size is 0.1 μm or more and 0.5 μm or less, and the maximum particle size is 10 times the average particle size or less.

10. A semiconductor device comprising: a wiring board according to any one of claims 1 to 9; and a semiconductor element mounted on the second base material of the wiring board.

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