Information transmitting method, information receiving method, communication apparatuses and storage medium

Abstract

Provided in the embodiments of the present disclosure are an information transmitting method, an information receiving method, communication apparatuses, and a storage medium. The information transmitting method comprises: on the basis of an information sequence, generating a first signal consisting of high-level pulses and low-level pulses; and sending the first signal.

Description

Information transmission method and receiving method, communication device and storage medium

[0001] This application claims priority to Chinese patent application No. 202311524948.2 filed on November 15, 2023, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present disclosure relates to the field of communication technology, and in particular to an information transmission method and receiving method, a communication device, and a storage medium. Background Art

[0003] The Internet of Things (IoT) is a converged application and technological advancement that connects any object to the network through information sensing devices and agreed-upon protocols. Objects exchange and communicate information through information transmission media to achieve intelligent identification, positioning, tracking, and monitoring functions. In particular, to meet the technological demands of low cost, low power consumption, energy conservation, and carbon reduction, the Passive Internet of Things (Passive-IoT) has garnered widespread attention. Passive-IoT is a new type of IoT technology that can utilize energy sources in the environment, such as electromagnetic waves or light, to power IoT devices, thereby reducing device energy consumption, extending their service life, and reducing reliance on traditional energy sources. Passive-IoT can also better adapt to various environments and application scenarios, with a wide range of applications, including smart homes, smart cities, smart healthcare, and smart transportation.

[0004] Summary of the Invention

[0005] In a first aspect, the present disclosure provides an information transmission method, which includes: generating a first signal consisting of a high-level pulse and a low-level pulse based on an information sequence; and sending the first signal.

[0006] In a second aspect, the present disclosure provides an information receiving method, which includes: receiving a first signal composed of a high-level pulse and a low-level pulse; charging based on the first signal and acquiring an information sequence.

[0007] In a third aspect, the present disclosure provides a communication device, comprising: a processing module for generating a first signal consisting of a high-level pulse and a low-level pulse based on an information sequence; and a sending module for sending the first signal.

[0008] In a fourth aspect, the present disclosure provides a communication device, which includes: a receiving module for receiving a first signal composed of a high-level pulse and a low-level pulse; and a processing module for charging and acquiring an information sequence based on the first signal.

[0009] In a fifth aspect, the present disclosure provides a communication device comprising: a processor and a memory. The memory stores instructions executable by the processor; when the processor is configured to execute the instructions, the communication device implements any of the methods provided in the first or second aspects above.

[0010] In a sixth aspect, the present disclosure provides a computer-readable storage medium storing computer instructions. When the computer instructions are executed on a computer, the computer executes any one of the methods provided in the first aspect or the second aspect.

[0011] In a seventh aspect, the present disclosure provides a computer program product comprising computer instructions, which, when executed on a computer, enables the computer to execute any one of the methods provided in the first aspect or the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] FIG1 is a schematic diagram of the architecture of a communication system according to an embodiment of the present disclosure.

[0013] FIG2 is a flow chart of an information transmission method according to an embodiment of the present disclosure.

[0014] FIG3 is a flow chart of another information transmission method according to an embodiment of the present disclosure.

[0015] FIG4 is a schematic diagram of first information according to an embodiment of the present disclosure.

[0016] FIG5 is a schematic diagram of another type of first information according to an embodiment of the present disclosure.

[0017] FIG6 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0018] FIG7 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0019] FIG8 is a schematic diagram of second information according to an embodiment of the present disclosure.

[0020] FIG9 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0021] FIG10 is a schematic diagram of another type of second information according to an embodiment of the present disclosure.

[0022] FIG11 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0023] FIG12 is a schematic diagram of yet another type of second information according to an embodiment of the present disclosure.

[0024] FIG13 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0025] FIG14 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0026] FIG15 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0027] FIG16 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0028] FIG17 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0029] FIG18 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0030] FIG19 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0031] FIG20 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0032] FIG21 is a schematic diagram of yet another type of second information according to an embodiment of the present disclosure.

[0033] FIG22 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0034] FIG23 is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0035] FIG24 is a schematic diagram of yet another type of second information according to an embodiment of the present disclosure.

[0036] FIG25A is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0037] FIG25B is a schematic diagram of another type of first information according to an embodiment of the present disclosure.

[0038] FIG25C is a schematic diagram of another type of first information according to an embodiment of the present disclosure.

[0039] FIG25D is a schematic diagram of another type of first information according to an embodiment of the present disclosure.

[0040] FIG25E is a schematic diagram of another type of first information according to an embodiment of the present disclosure.

[0041] FIG25F is a schematic diagram of another type of first information according to an embodiment of the present disclosure.

[0042] FIG26 is a schematic diagram of yet another type of second information according to an embodiment of the present disclosure.

[0043] FIG27A is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0044] FIG27B is a schematic diagram of yet another type of first information according to an embodiment of the present disclosure.

[0045] FIG28 is a flow chart of another information transmission method according to an embodiment of the present disclosure.

[0046] FIG29 is a schematic diagram of transmitting information according to an embodiment of the present disclosure.

[0047] FIG30 is a flow chart of an information receiving method according to an embodiment of the present disclosure.

[0048] FIG31 is a schematic diagram showing the composition of a communication device according to an embodiment of the present disclosure.

[0049] FIG32 is a schematic diagram showing the composition of another communication device according to an embodiment of the present disclosure.

[0050] FIG33 is a schematic structural diagram of a communication device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0051] The following will be combined with the accompanying drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the embodiments described are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present disclosure.

[0052] In the description of the present disclosure, unless otherwise specified, " / " means "or", for example, A / B can mean A or B. "And / or" in this article is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can mean: only A, only B, and A and B. In addition, "at least one" means one or more, and "a plurality" means two or more. Words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different.

[0053] It should be noted that, in this disclosure, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this disclosure as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0054] The passive-internet of things (Passive-IoT) is currently attracting widespread attention. Passive terminals within the Passive-IoT are widely used in many fields due to their advantages, including the lack of external power supply, strong adaptability, high reliability, high security, low cost, easy installation, and good maintainability. However, passive terminals require energy from the environment, which can be inefficient and potentially limit the device's operating time, distance, and range.

[0055] In view of this, the present disclosure provides a data information transmission method, comprising: generating a first signal consisting of high-level pulses and low-level pulses based on an information sequence, and transmitting the first signal. In this way, while transmitting information to a receiving end, the high-level pulses in the first signal can also be used to provide energy to the receiving end.

[0056] In some embodiments, in a passive Internet of Things, a communication mode based on backscattering can be used to transmit information to a receiving end.

[0057] Backscatter communication (BSC) is a wireless communication technology that leverages the backscattering principle of radio frequency signals. In backscatter communication, the transmitting device enhances the reflection of the incoming radio frequency signal by adjusting the matching between the receiving antenna and the impedance. The transmitting device then modulates the acquired sensor data onto the reflected signal to complete data transmission.

[0058] To facilitate understanding of the technical solutions provided by the present disclosure, a communication system is shown in FIG1 , which can utilize the above-mentioned backscatter communication technology. As shown in FIG1 , the communication system 100 includes a transmitting device 101 , a reverse communication device 102 , and a receiving device 103 .

[0059] The transmitting device 101 may also be referred to as a helper, exciter, or excitation device, without limitation. The reverse communication device 102 may also be referred to as a backscatter device, a reflector, an electronic tag, or a tag, without limitation. The receiving device 103 may also be referred to as a receiver, a reader, or a reader / writer, without limitation. The transmitting device may also be a base station, a reader / writer, a relay device, etc., and the receiving device may also be a base station, a reader / writer, a relay device, etc. The transmitting and receiving devices may be the same or different. The excitation device primarily transmits an excitation signal to provide energy and carrier waves to the tag, activating it. The tag is a passive device; upon receiving the excitation signal from the excitation device, it begins reflecting the signal. The tag can be considered a full-duplex device, modulating and reflecting its own information while receiving energy / signals / carrier waves. The reader / writer can control the excitation device to send instructions and excitations while simultaneously receiving information from the tag. In some scenarios, the excitation device and the receiving device can be integrated into one device, that is, the integrated device can both send the excitation signal and receive the reflected signal. In some scenarios, the excitation device and the receiving device can adopt a separate architecture, that is, the excitation device and the receiving device are two separate devices, the excitation device is used to send the excitation signal, and the receiving device is used to receive the reflected signal. It should be noted that the embodiments of the present disclosure are all described in the scenario where the excitation device and the receiving device in the backscatter communication system are two separate devices.

[0060] The method provided in the present disclosure can be applied to any current or future communication system that adopts reflection communication technology, such as global system of mobile communication (GSM), code division multiple access (CDMA) system, wideband code division multiple access (WCDMA) system, general packet radio service (GPRS), long term evolution (LTE) system, LTE frequency division duplex (FDD) system, LTE time division duplex (TDD), universal mobile telecommunication system (UMTS), world-wide interoperability for microwave access (WiMAX) communication system, fifth-generation (5G) system or new radio (NR) and future communication systems, etc., without limitation here.

[0061] In some embodiments, the excitation device involved in the embodiments of the present disclosure may be a network device, and the reader / writer may be a terminal device; or, the excitation device is a terminal device, and the reader / writer is a network device; or, both the excitation device and the reader / writer may be network devices; or, both the excitation device and the reader / writer may be terminal devices, etc., without limitation. The excitation device may send an excitation signal to the tag on a specified time-frequency resource under the coordination and control of the reader / writer to complete the communication process. For example, in the application scenario of the Internet of Things, the tag device can be used as a low-cost tag and installed on objects in large quantities. The network device and the terminal device can charge the tag device to obtain information when the electronic tag information is needed.

[0062] Network devices can be used to implement functions such as resource scheduling, wireless resource management, and wireless access control for terminal devices. For example, a network device can be any of a base transceiver, a wireless base station, a wireless transceiver, a small base station, a wireless access point, a transmission and reception point (TRP), a transmission point (TP), an evolved Node B (eNB), a Home Node B, a Home evolved Node B, a reader, and some other access node. In some embodiments, the communication system 100 may also include different types of base stations, such as macrocell base stations and / or small cell base stations.

[0063] Terminal devices may also be referred to as terminals, user equipment (UE), mobile stations, mobile terminals, etc. Terminal devices may be Internet of Things (IoT) devices, used to collect various information, then perform forward error correction coding on the data before sending it to a base station. Terminal devices may also be mobile devices such as mobile phones, tablet computers, computers with wireless transceiver capabilities, cars, and trams. Furthermore, terminal devices may be fixed or mobile. Various types of terminal devices may also include or be referred to by those skilled in the art as mobile stations, user stations, mobile units, user units, wireless units, remote units, mobile devices, wireless devices, wireless communication devices, remote devices, mobile user stations, access terminals, mobile terminals, wireless terminals, remote terminals, handheld devices, user agents, mobile clients, clients, passive tags, or some other possible devices. Various types of UEs may also be cellular phones, personal digital assistants (PDAs), wireless modems, wireless communication devices, handheld devices, tablet computers, laptop computers, cordless phones, wireless local loop (WLL) stations, etc. Various types of UEs can communicate with various types of base stations and network devices (including macro eNBs (Evolved Node Bs), small cell eNBs, relay base stations, etc.) The wireless communication system 100 may also include an IoT system or be part of an IoT system.

[0064] As shown in FIG2 , an information transmission method according to an embodiment of the present disclosure is shown. The information transmission method includes the following S101 and S102 .

[0065] In S101 , a first signal consisting of a high-level pulse and a low-level pulse is generated based on an information sequence.

[0066] The above information sequence is a sequence generated based on the data to be transmitted. In addition, the length of the information sequence can be K bits, where K≥1.

[0067] In some embodiments, the length of the information sequence is determined in one of the following ways: pre-set or configured via signaling. For example, the transmitting device may receive signaling indicating the length of the information sequence (i.e., the value of K), e.g., the length of the information sequence is 1 bit. Based on the signaling, the transmitting device may determine the length of the information sequence to be 1 bit.

[0068] In one implementation, a second signal consisting of a high-level pulse and a low-level pulse may be generated first, and then the first signal may be generated based on the second signal. As shown in FIG3 , for example, this may be implemented as the following S101A1 and S101A2.

[0069] In S101A1 , a second signal consisting of a high-level pulse and a low-level pulse is generated based on the information sequence.

[0070] Different characteristics of the second signal correspond to different information sequences, that is, different characteristics of the second signal correspond to different K-bit length information sequences.

[0071] In some embodiments, different characteristics of the second signal correspond to different information sequences, including at least one of the following: different lengths of the second signal correspond to different information sequences, different combination orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences, different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different information sequences, different widths of high-level pulses and / or low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

[0072] In some embodiments, the above information sequence may also correspond to multiple sequence states, dividing the multiple sequences into multiple groups. For example, the above information sequence may be a K-bit long information sequence, which may correspond to 2 k Sequence state, and then 2 k The sequence states are divided into multiple groups.

[0073] In the above-mentioned multiple groups of sequence states, the sequence states belonging to the same group correspond to the same information sequence length. The sequence states belonging to the same group are different, and different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different sequence states belonging to the same group. In addition, the second signals corresponding to sequence states belonging to different groups have different signal lengths.

[0074] In some embodiments, the second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

[0075] In one example, the preset waveform coding method may be a rate 1 / 2 Manchester waveform coding method or a rate 1 / 4 Manchester waveform coding method. That is, the second signal may be generated based on an information sequence of K bits using a rate 1 / 2 or rate 1 / 4 Manchester waveform coding method.

[0076] Exemplarily, as shown in FIG4 , the value of K is 1, and the Manchester waveform coding method with a rate of 1 / 2 is used to generate the second signal. Indicator box 41, indicator box 42, and indicator box 43 in FIG4 are all second signals, and different characteristics of the second signal correspond to different information sequences. In one example, different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. As shown in FIG4 , K=1, the bit value of the information sequence is 0, and the second signal consists of a sequence of low-level pulses and high-level pulses with equal pulse widths; the bit value of the information sequence is 1, and the second signal consists of a sequence of high-level pulses and low-level pulses with equal pulse widths.

[0077] In S101A2 , M unit high-level pulses and N unit low-level pulses are added to the second signal to generate a first signal.

[0078] M is an integer greater than or equal to 1, N is an integer greater than or equal to 0, and M is greater than N.

[0079] In some embodiments, the pulse width of the unit high-level pulse and the pulse width of the unit low-level pulse are determined according to one of the following methods: a preset pulse width value, or configuration through signaling.

[0080] In an example, the value of N may be 0, that is, M unit high-level pulses may be added to the second signal to generate the first signal.

[0081] In some embodiments, in the first signal, the M unit high-level pulses satisfy at least one of the following: M1 unit high-level pulses are located before the first pulse in the second signal, M2 unit high-level pulses are located after the last pulse in the second signal, and M3 unit high-level pulses are located within the second signal. M1, M2, and M3 are all integers less than or equal to M, and the sum of M1, M2, and M3 is equal to M.

[0082] Exemplarily, the value of M1 is equal to M, and the values ​​of M2 and M3 are both 0, that is, the M unit high-level pulses are all located before the first pulse of the second signal. Alternatively, the value of M2 is equal to M, and the values ​​of M1 and M3 are both 0, that is, the M unit high-level pulses are all located after the last pulse of the second signal. Alternatively, the values ​​of M1 and M2 are greater than 0, and the value of M3 is both 0, that is, the M unit high-level pulses include two parts, one part is M1 unit high-level pulses, which are located before the first pulse of the second signal, and the other part is M2 unit high-level pulses, which are located after the last pulse of the second signal. It should be understood that the above is only an exemplary description of the values ​​of M1, M2 and M3, and there are many other possible situations for the values ​​of M1, M2 and M3, which are not listed here one by one.

[0083] Furthermore, the present embodiment is exemplarily described below with reference to Examples 1 to 3.

[0084] Example 1: As shown in FIG4 , K is 1, and M = 1. A Manchester waveform encoding method with a rate of 1 / 2 is used to generate the second signal. The pulse width of a unit high-level pulse and the pulse width of a unit low-level pulse are both PW. As shown in the second signal indicated by the indicator box 41 in FIG4 , in the first signal, all M = 1 unit high-level pulses are located before the first pulse of the second signal; and the proportion of high-level pulses of the first signal to all pulses of the first signal is 2 / 3.

[0085] Alternatively, as shown in the second signal in the indicator box 42 in Figure 4, in the first signal, M=1 unit high-level pulses are all located in the second signal; and the proportion of the high-level pulses of the first signal to all pulses of the first signal is 2 / 3.

[0086] Alternatively, as shown in the second signal in the indicator box 43 in Figure 4, in the first signal, M=1 unit high-level pulses are all located after the last pulse of the second signal; and the proportion of the high-level pulses of the first signal to all pulses of the first signal is 2 / 3.

[0087] Example 2, as shown in Figure 5, the value of K is 1, and M>1, and the second signal is generated using a Manchester waveform encoding method with a rate of 1 / 2. The pulse width of the unit high-level pulse and the pulse width of the unit low-level pulse are both PW. Indicator boxes 51, 52, 53, and 54 in Figure 5 are all second signals. As shown in the second signal in indicator box 51 in Figure 5, in the first signal, M=2 unit high-level pulses are all located before the first pulse of the second signal; and the proportion of the high-level pulses of the first signal to all pulses of the first signal is 3 / 4.

[0088] Alternatively, as shown in the second signal in the indicator box 52 in Figure 5, in the first signal, M=2 unit high-level pulses are all located in the second signal; and the proportion of the high-level pulses of the first signal to all pulses of the first signal is 3 / 4.

[0089] Alternatively, as shown in the second signal in the indicator box 53 in Figure 5, in the first signal, M=2 unit high-level pulses are all located after the last pulse of the second signal; and the proportion of the high-level pulses of the first signal to all pulses of the first signal is 3 / 4.

[0090] Alternatively, as shown by the second signal in the indicator box 54 in Figure 5, in the first signal, M=2 unit high-level pulses include two parts, each part includes 1 high-level pulse, one part of the high-level pulses is located before the first pulse of the second signal, and the other part is located after the last pulse of the second signal; and the proportion of the high-level pulses of the first signal to all the pulses of the first signal is 3 / 4.

[0091] Furthermore, as shown in FIG5 , different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. When K = 1, the bit value of the information sequence is 0, and the second signal consists of a sequence of low-level pulses and high-level pulses of equal pulse width. Alternatively, the bit value of the information sequence is 1, and the second signal consists of a sequence of high-level pulses and low-level pulses of equal pulse width.

[0092] Example 3: As shown in Figure 6, K is 1, and M = 1. A Manchester waveform encoding method with a rate of 1 / 4 is used to generate the second signal. The pulse width of the unit high-level pulse and the pulse width of the unit low-level pulse are both PW. Indicator boxes 61, 62, and 63 in Figure 6 are all second signals. As shown in the second signal in indicator box 61 in Figure 6, in the first signal, M = 1 unit high-level pulses are all located before the first pulse of the second signal; and the proportion of high-level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0093] Alternatively, as shown in the second signal in the indicator box 62 in Figure 6, in the first signal, M=1 unit high-level pulses are all located in the second signal; and the proportion of the high-level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0094] Alternatively, as shown in the second signal in the indicator box 63 in Figure 6, in the first signal, M=1 unit high-level pulses are all located after the last pulse of the second signal; and the proportion of the high-level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0095] In addition, as shown in Figure 6, different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. When K = 1, the bit value of the information sequence is 0, and the second signal is composed of two low-level pulses and two high-level pulses of equal pulse width, alternating in sequence. Alternatively, when the bit value of the information sequence is 1, the second signal is composed of two high-level pulses and two low-level pulses of equal pulse width, alternating in sequence.

[0096] In another example, the value of N may be greater than 0, that is, M unit high-level pulses and N unit low-level pulses are added to the second signal to generate the first signal.

[0097] In some embodiments, in the first signal, N unit low-level pulses satisfy at least one of the following: N1 unit low-level pulses are located before the first pulse in the second signal, N2 unit low-level pulses are located after the last pulse in the second signal, and N3 unit low-level pulses are located within the second signal. N1, N2, and N3 are all integers less than or equal to N, and the sum of N1, N2, and N3 is equal to N. Furthermore, in the first signal, M unit high-level pulses satisfy at least one of the following: M1 unit high-level pulses are located before the first pulse in the second signal, M2 unit high-level pulses are located after the last pulse in the second signal, and M3 unit high-level pulses are located within the second signal. M1, M2, and M3 are all integers less than or equal to M, and the sum of M1, M2, and M3 is equal to M.

[0098] For example, the value of M1 is equal to M, the value of N1 is equal to N, and the values ​​of M2, M3, N2, and N3 are all 0, that is, the M unit high-level pulses and the N unit low-level pulses are all located before the first pulse of the second signal. Alternatively, the value of M2 is equal to M, the value of N2 is equal to N, and the values ​​of M1, M3, N1, and N3 are all 0, that is, the M unit high-level pulses and the N unit low-level pulses are all located after the last pulse of the second signal. Alternatively, the values ​​of M1, M2, N1, and N2 are all greater than 0, and the values ​​of M3 and N3 are both 0, that is, the M unit high-level pulses include two parts, one part is M1 unit high-level pulses, which are located before the first pulse of the second signal, and the other part is M2 unit high-level pulses, which are located after the last pulse of the second signal, and the N unit low-level pulses also include two parts, one part is N1 unit low-level pulses, which are located before the first pulse of the second signal, and the other part is N2 unit low-level pulses, which are located after the last pulse of the second signal. It should be understood that the above is only an exemplary description of the values ​​of M1, M2, M3, N1, N2, and N3. There are many other possible situations for the values ​​of M1, M2, M3, N1, N2, and N3, which are not listed here one by one. In addition, the following example 4 is used to illustrate this embodiment.

[0099] Example 4: As shown in FIG7 , K is 1, M=2, and N=1, and a Manchester waveform encoding method with a rate of 1 / 2 is used to generate the second signal. The pulse width of a unit high-level pulse and the pulse width of a unit low-level pulse are both PW. As shown in the second signal in the indicator box 71 in FIG7 , in the first signal, M=2 unit high-level pulses and N=1 unit low-level pulse are both located before the first pulse of the second signal; and the ratio of the high-level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0100] Alternatively, as shown in the second signal in the indicator box 72 in Figure 7, in the first signal, M=2 unit high-level pulses and N=1 unit low-level pulses are both located in the second signal; and the ratio of the high-level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0101] Alternatively, as shown in the second signal in the indicator box 73 in Figure 7, in the first signal, M=2 unit high-level pulses and N=1 unit low-level pulses are both located after the last pulse of the second signal; and the ratio of the high-level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0102] In addition, as shown in Figure 7, different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. When K = 1, the bit value of the information sequence is 0, and the second signal consists of a sequence of low-level pulses and high-level pulses with equal pulse widths; alternatively, the bit value of the information sequence is 1, and the second signal consists of a sequence of high-level pulses and low-level pulses with equal pulse widths.

[0103] In some embodiments, the high-level pulses and low-level pulses in the second signal correspond to one or more modulation symbols of the same length and different amplitude values, and the different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols correspond to high-level pulses and low-level pulses, respectively. Exemplarily, the modulation symbols can be, for example, on-off keying (OOK) modulation symbols, amplitude shift keying (ASK) modulation symbols, orthogonal frequency-division multiplexing (OFDM) modulation symbols, etc., and the length of the modulation symbol is the duration of the symbol.

[0104] In some embodiments, the length of the second signal is determined based on the duration of the second signal. The duration of the pulse of the second signal is determined based on the pulse width of the high level pulse and the pulse width of the low level pulse in the second signal.

[0105] In some embodiments, the second signal can also be generated based on a signal sequence of length K and a preset mapping method. Furthermore, the first signal can be obtained based on the second signal and an additional M unit high-level pulses and N unit low-level pulses. The pulse width of the unit high-level pulse or the unit low-level pulse can be PW, and the pulse width of the unit high-level pulse or the unit low-level pulse can be determined by pre-setting a pulse width value or by signaling configuration. Moreover, M≥1, N≥0, M>N. In the first signal, the M unit high-level pulses and the N unit low-level pulses can all be located before the second signal, all in the middle of the second signal, or all after the second signal. Alternatively, the M unit high-level pulses and the N unit low-level pulses can be divided into multiple parts, each of which is located before the second signal, in the middle of the second signal, or after the second signal, which will not be repeated here. Moreover, the following examples 5 to 7 are used to exemplify this embodiment.

[0106] Example 5: K = 1. A signal sequence of length K generates a second signal using a preset mapping method, and different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. As shown in Figure 8, when the signal sequence value is 1, the second signal is composed of a low-level pulse with a pulse width of PW, a high-level pulse with a pulse width of 2PW, and a low-level pulse with a pulse width of PW, connected in sequence. Alternatively, when the signal sequence value is 0, the second signal is composed of a high-level pulse with a pulse width of PW, a low-level pulse with a pulse width of 2PW, and a high-level pulse with a pulse width of PW, connected in sequence. Furthermore, M unit high-level pulses and N unit low-level pulses can be added to the second signal to generate the first signal. As shown in Figure 9, M = 1, N = 0, and the pulse width of a unit high-level pulse is PW. As shown in the second signal in the indicator box 91 in Figure 9, M = 1 unit high-level pulse precedes the first pulse of the second signal; and the high-level pulses of the first signal account for 3 / 5 of all the pulses in the first signal. Alternatively, as shown in the second signal indicated by the indicator box 92 in FIG9 , M=1 unit high-level pulse is located within the second signal; and the proportion of high-level pulses of the first signal to all pulses of the first signal is 3 / 5. Alternatively, as shown in the second signal indicated by the indicator box 93 in FIG9 , M=1 unit high-level pulse is located after the last pulse of the second signal; and the proportion of high-level pulses of the first signal to all pulses of the first signal is 3 / 5.

[0107] Example 6, K=1, a signal sequence of length K generates a second signal in a preset mapping manner, and different combinations of high-level pulses and low-level pulses in the second signal represent different K-bit signal sequences. As shown in Figure 10, when the bit value of the signal sequence is 1, the second signal is composed of a high-level pulse with a pulse width of 2PW and a low-level pulse with a pulse width of 2PW connected in sequence. When the bit value of the signal sequence is 0, the second signal is composed of a low-level pulse with a pulse width of 2PW and a high-level pulse with a pulse width of 2PW connected in sequence. Furthermore, M unit high-level pulses and N unit low-level pulses can be added to the second signal to generate the first signal. As shown in Figure 11, M=1, N=0, and the pulse width of the unit high-level pulse is PW. As shown in the second signal in the indicator box 111 in Figure 11, M=1 unit high-level pulses are all located before the second signal, and the high-level ratio of the first signal is 3 / 5. Alternatively, as shown by the second signal in the indicator box 112 in Figure 11, M=1 unit high-level pulses are all located within the second signal, and the high-level ratio of the first signal is 3 / 5. Alternatively, as shown by the second signal in the indicator box 113 in Figure 11, M=1 unit high-level pulses are all located after the second signal, and the high-level ratio of the first signal is 3 / 5.

[0108] Example 7, K=1, a signal sequence with a length of K generates a second signal in a preset mapping manner, and different width ratios of the two high-level pulses in the second signal correspond to different information sequences. As shown in Figure 12, when the bit value of the signal sequence is 0, the ratio of the width of the first high-level pulse to the width of the second high-level pulse in the second signal is less than 1. When the bit value of the signal sequence is 1, the ratio of the width of the first high-level pulse to the width of the second high-level pulse in the second signal is greater than 1. Furthermore, the first signal can be generated based on the second signal and another M unit high-level pulses and N unit low-level pulses. As shown in Figure 13, M=2, N=0, and the pulse width of the unit high-level pulse is PW. As shown in the second signal in the indicator box 131 in Figure 13, M=2 unit high-level pulses are all located within the last low-level pulse in the second signal, and the high-level ratio of the first signal is 5 / 8.

[0109] In some embodiments, the value of K may be greater than 1. Furthermore, the following examples 8 to 11 are used to exemplify the case where the value of K in this embodiment is greater than 1.

[0110] Example 8, as shown in Figure 14, K = 2, M = 2, N = 0, and the bit values ​​of the information sequence may include 00, 01, 10 or 11. The second signal is determined based on the information sequence and Manchester waveform coding with a rate of 1 / 2. In addition, different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. M = 2 unit high-level pulses can then be added to the second signal to generate the first signal. As shown in Figure 14, the M = 2 unit high-level pulses can be divided into two parts, one part is located before the second signal, and the other part is located after the second signal, and the high level ratio in the first signal is 2 / 3.

[0111] Example 9, as shown in Figure 15, K = 2, M = 2, N = 0. The second signal is determined based on the information sequence and the preset mapping method. In addition, different width combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. Furthermore, the first signal can be composed of the second signal and another M = 2 unit high-level pulses. As shown in Figure 15, all M = 2 unit high-level pulses are located after the second signal, and the high level ratio in the first signal is 3 / 5.

[0112] Example 10, as shown in Figure 16, K=2, M=2, N=0. The second signal is determined based on the information sequence and the preset mapping method. In addition, different width combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. Furthermore, the first signal can be composed of the second signal and another M=2 unit high-level pulses. As shown in Figure 16, the M=2 unit high-level pulses are divided into two parts, each including 1 unit high-level pulse, one part is located before the second signal, and the other part is located after the second signal, and in the case of bit combinations of 0 and 1, the high level in the first signal accounts for 5 / 8.

[0113] Example 11, as shown in Figure 17, K=2, M=2, N=1. The second signal is determined based on the information sequence and a pre-set mapping method. In addition, different width combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. Furthermore, the first signal can be composed of the second signal and another M=2 unit high-level pulses and N=1 unit low levels. As shown in Figure 17, M=2 unit high-level pulses and N=1 unit low levels are both located after the second signal. In addition, in the case of bit combinations of 0 and 1, the high level in the first signal accounts for 15 / 22. In addition, M=2 unit high-level pulses and N=1 unit low-level pulses can also all be located before or in the middle of the second signal, or divided into multiple parts, respectively located before, in the middle or after the second signal, which will not be repeated here.

[0114] In some embodiments, for different information sequences, the lengths of the corresponding generated second signals can also be different. Moreover, the following uses Example 12 and Example 13 to illustrate this embodiment exemplarily.

[0115] Example 12: As shown in FIG. 18, K = 1, and the second signal is determined based on the information sequence through a preset mapping method. When the bit value of the information sequence is 0, the corresponding second signal can be as shown in indication box 181; when the bit value of the information sequence is 1, the corresponding second signal can be as shown in indication box 182. It can be seen that the signal length in indication box 181 is different from the signal length in indication box 182. That is, for different information sequences, the lengths of the corresponding generated second signals can also be different. Furthermore, M = 1, N = 0, and the first signal can be composed of the second signal and another M = 1 unit high-level pulse. As shown in FIG. 18, the M = 1 unit high-level pulse is located before the second signal; and, when bits 0 and 1 are equally probable, the high-level ratio in the first signal is ⅔.

[0116] Example 13: As shown in FIG. 19, K = 2, and the second signal is determined based on the information sequence through a preset mapping method. The high-level pulses in the second signal are determined based on the bit values of the information sequence. For example, the width of the i-th high-level pulse in the second signal is determined by the value of the i-th bit in the information sequence, where 0 ≤ i < K. Exemplarily, when the i-th bit in the information sequence is 1, the width of the i-th high-level pulse in the second signal is 2PW. When the i-th bit in the information sequence is 0, the width of the i-th high-level pulse in the second signal is PW. In addition, the width of the low-level pulse in the second signal is PW. Thus, when the bit values of the information sequence are 00, the corresponding second signal can be as shown in indication box 191; when the bit values of the information sequence are 01, the corresponding second signal can be as shown in indication box 192; when the bit values of the information sequence are 10, the corresponding second signal can be as shown in indication box 193; when the bit values of the information sequence are 11, the corresponding second signal can be as shown in indication box 194. It can be seen that the signal length in indication box 191 is different from the signal lengths in indication boxes 192 and 193, the signal length in indication box 194 is also different from the signal lengths in indication boxes 192 and 193, and the signal length in indication box 191 is also different from the signal length in indication box 194. That is, for different information sequences, the lengths of the corresponding generated second signals can also be different. Furthermore, M = 2, N = 1, and the first signal can be composed of the second signal and another M = 2 unit high-level pulses and N = 1 unit low level. As shown in FIG. 19, the M = 2 unit high-level pulses and the N = 1 unit low level are both located after the second signal; and, when the bit combinations of 0 and 1 are equally probable, the high-level ratio in the first signal is ⅝.

[0117] In some embodiments, the pulse width PW of the other M unit high-level pulses and N unit low-level pulses in the first signal is less than or equal to the high / low level pulse width in the second signal. Alternatively, the pulse width PW of the other M unit high-level pulses and N unit low-level pulses in the first signal is greater than the high / low level pulse width in the second signal. Furthermore, Examples 14 to 16 are used below to exemplify this embodiment.

[0118] Example 14, K=1, M=1, N=0, the second signal is determined by an information sequence and a Manchester waveform encoding with a rate of 1 / 2, and different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. As shown in Figure 20, when the bit value of the signal sequence is 0, the second signal is composed of a low-level pulse and a high-level pulse sequence with a pulse width of PW'. Alternatively, when the bit value of the signal sequence is 1, the second signal is composed of a high-level pulse and a low-level pulse sequence with a pulse width of PW'. Further, the first signal is composed of the second signal and another M=1 unit high-level pulse. In addition, the width of the M=1 unit high-level pulse is PW, and PW>PW'. As shown in the second signal in the indicator box 201, the M=1 unit high-level pulses are all located before the second signal, and the high-level ratio of the first signal is (PW+PW') / (PW+2PW')>2 / 3. Alternatively, as shown by the second signal in the indicator box 202, M=1 unit high-level pulses are all located within the second signal, and the high-level ratio of the first signal is (PW+PW') / (PW+2PW')>2 / 3. Alternatively, as shown by the second signal in the indicator box 203, M=1 unit high-level pulses are all located after the second signal, and the high-level ratio of the first signal is (PW+PW') / (PW+2PW')>2 / 3.

[0119] Example 15, K=1, M=1, N=0, the second signal is determined by the information sequence and the preset mapping method, and different combinations of high-level pulses and low-level pulses in the second signal correspond to different information sequences. As shown in Figure 21, when the bit value of the signal sequence is 1, the second signal is composed of a low-level pulse with a pulse width of PW', a high-level pulse with a width of 2PW', and a low-level pulse with a width of PW'. Alternatively, when the bit value of the signal sequence is 0, the second signal is composed of a high-level pulse with a pulse width of PW', a low-level pulse with a width of 2PW', and a high-level pulse with a width of PW'. Furthermore, the first signal consists of the second signal and another M=1 unit high-level pulse. As shown in Figure 22, all of the M=1 unit high-level pulses are located before the second signal, and the high-level ratio of the first signal is (PW+2PW') / (PW+4PW').

[0120] Example 16: K = 2, M = 2, N = 1. The second signal is determined by the information sequence and a preset mapping method. Different combination orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences. Moreover, different pulse widths of different high-level pulses in the second signal correspond to different bit values. That is, the width of the i-th high-level pulse in the second signal is determined by the value of the i-th bit in the information sequence, where 0 ≤ i < K. Exemplarily, when the i-th bit in the information sequence is 1, the width of the i-th high-level pulse in the second signal is PW2. When the i-th bit in the information sequence is 0, the width of the i-th high-level pulse in the second signal is PW1. The width of the low-level pulse in the second signal is PW0, and PW2 > PW1 ≥ PW0. Further, the first signal is composed of the second signal, another M = 2 unit high-level pulses, and N = 1 unit low-level pulse. As shown in Figure 23, the M = 2 unit high-level pulses and the N = 1 unit low-level pulse are located after the second signal. And, when the bit combinations of 0 and 1 are equally probable, the high-level ratio of the first signal is (PW1 + PW2 + 2PW) / (PW1 + PW2 + 2PW0 + 3PW).

[0121] In some embodiments, the bit length of the information sequence is K, and there can be 2 k kinds of bit values, or it can be understood as including 2 k kinds of information sequences. The 2 k kinds of information sequences can correspondingly generate 2 k kinds of second signals. Further, the 2 k kinds of second signals are combined with another M high-level pulses and N low-level pulses to generate 2 k kinds of first signals. Among the 2 k kinds of first signals, the M unit high-level pulses and the N unit low-level pulses are located at the same position of the second signal. For example, both the M unit high-level pulses and the N unit low-level pulses are located before the first pulse of the second signal, or both the M unit high-level pulses and the N unit low-level pulses are located after the last pulse of the second signal, etc., and will not be listed one by one here.

[0122] Alternatively, in some embodiments, among the 2 k kinds of first signals, the M unit high-level pulses and the N unit low-level pulses can be located at different positions of the second signal. And the following uses Example 17 and Example 18 to exemplarily illustrate this embodiment.

[0123] Example 17, K=1, the second signal is determined by the information sequence and a preset mapping method, and different width ratios of two high-level pulses in the second signal correspond to different information sequences. As shown in FIG24 , the bit value of the information sequence is 0, and the ratio of the first high-level pulse width to the second high-level pulse width of the second signal is less than 1. Alternatively, the bit value of the information sequence is 1, and the ratio of the first high-level pulse width to the second high-level pulse width of the second signal is greater than 1.

[0124] Furthermore, the first signal is composed of the second signal and M additional unit high-level pulses and N unit low-level pulses. The pulse width of the unit high-level pulse and the pulse width of the unit low-level pulse are both PW, which can be determined by presetting or signaling configuration, and M≥1, N≥0, and M>N.

[0125] The first signal is composed of the second signal shown in Figure 24 and another M unit high-level pulses and N unit low-level pulses. As shown in Figure 25A, M = 1, N = 0, K = 1. The bit value of the information sequence is 0, and in the first signal, M = 1 unit high-level pulses are located after the second high-level pulse in the second signal. Alternatively, the bit value of the information sequence is 1, and in the first signal, M = 1 unit high-level pulses are located after the first high-level pulse in the second signal. In addition, the high level ratio in the first signal is 2 / 3.

[0126] Alternatively, as shown in Figure 25B, M = 2, N = 0, and K = 1. The bit value of the information sequence is 0, and in the first signal, M = 2 unit high-level pulses are both located after the second high-level pulse in the second signal. Alternatively, the bit value of the information sequence is 1, and in the first signal, M = 2 unit high-level pulses are both located after the first high-level pulse in the second signal. In addition, the high-level ratio in the first signal is 5 / 7.

[0127] Alternatively, as shown in FIG25C , M=3, N=0, and K=1. The bit value of the information sequence is 0. In the first signal, one high-level pulse follows the first high-level pulse in the second signal, and two high-level pulses follow the second high-level pulse in the second signal. Alternatively, the bit value of the information sequence is 1. In the first signal, two high-level pulses follow the first high-level pulse in the second signal, and one high-level pulse follows the second high-level pulse in the second signal. In addition, the high-level ratio in the first signal is 3 / 4.

[0128] Alternatively, as shown in Figure 25D, M = 6, N = 0, and K = 1. The bit value of the information sequence is 0. In the first signal, two unit high-level pulses are located after the first high-level pulse in its second signal, and four unit high-level pulses are located after the second high-level pulse in its second signal. Alternatively, the bit value of the information sequence is 1. In the first signal, four unit high-level pulses are located after the first high-level pulse in its second signal, and two unit high-level pulses are located after the second high-level pulse in its second signal. In addition, the high-level ratio in the first signal is 9 / 11.

[0129] Alternatively, as shown in Figure 25E, M = 2, N = 2, and K = 1. The bit value of the information sequence is 0. For M = 2 unit high-level pulses and N = 2 unit low-level pulses, in the first signal, the sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the first high-level pulse in its second signal, and the sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the second high-level pulse in its second signal. Alternatively, the bit value of the information sequence is 1. For M = 2 unit high-level pulses and N = 2 unit low-level pulses, in the first signal, the sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the first high-level pulse in its second signal, and the sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the second high-level pulse in its second signal. In addition, the high-level ratio in the first signal is 5 / 9.

[0130] Alternatively, as shown in FIG25F , M=3, N=2, and K=1. The bit value of the information sequence is 0. For M=3 unit high-level pulses and N=2 unit low-level pulses, in the first signal, the sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the first high-level pulse in its second signal, and the sequential combination of 2 unit high-level pulses and 1 unit low-level pulse is located after the second high-level pulse in its second signal. Alternatively, the bit value of the information sequence is 1. In the first signal, for M=3 unit high-level pulses and N=2 unit low-level pulses, the sequential combination of 2 unit high-level pulses and 1 unit low-level pulse is located after the first high-level pulse in its second signal, and the sequential combination of 1 unit high-level pulse and 1 unit low-level pulse is located after the second high-level pulse in its second signal. In addition, the high-level ratio in the first signal is 3 / 5.

[0131] Example 18, K=1, the second signal is determined by a K-bit information sequence and a pre-set mapping method, and the different width ratios of the two high-level pulses in the second signal correspond to different information sequences, and the different lengths of the second signal correspond to different information sequences. As shown in Figure 26, when the bit value of the signal sequence is 0, the ratio of the first high-level pulse width to the second high-level pulse width in the second signal is less than 1, and the length of the second signal is 5PW. When the bit value of the signal sequence is 1, the ratio of the first high-level pulse width to the second high-level pulse width in the second signal is greater than 1, and the length of the second signal is 6PW. Furthermore, the first signal can be obtained based on the second signal and another M unit high-level pulses and N unit low-level pulses, M≥1, N>0 and M>N.

[0132] The first signal is composed of the second signal shown in Figure 26 and another M unit high-level pulses and N unit low-level pulses. As shown in Figure 27A, M=1, N=0. When the bit value of the signal sequence is 0, as shown by the second signal in the indicator box 271, M=1 unit high-level pulses are located after the second high-level pulse in its second signal. Alternatively, when the bit value of the signal sequence is 1, as shown by the second signal in the indicator box 272, M=1 unit high-level pulses are located after the first high-level pulse in its second signal, and, when the probability of bit 0 and bit 1 is equal, the high-level ratio of the first signal is 9 / 13.

[0133] Alternatively, as shown in FIG27B , K=1, M=1, and N=1. When the bit value of the signal sequence is 0, as indicated by the second signal in the indicator box 273, M=1 unit high-level pulses and N=1 unit low-level pulses are sequentially located after the second high-level pulse in the second signal. Alternatively, when the bit value of the signal sequence is 1, as indicated by the second signal in the indicator box 274, M=1 unit high-level pulses and N=1 unit low-level pulses are sequentially located after the first high-level pulse in the second signal, and, when the probability of bit 0 and bit 1 is equal, the high-level ratio of the first signal is 9 / 15.

[0134] In another implementation, a first bit sequence may be generated first, a second bit sequence may be generated based on the first bit sequence, and the first signal may be determined based on the second bit sequence. As shown in FIG28 , for example, this may be implemented as follows S101B1 to S101B3.

[0135] In S101B1, a first bit sequence is generated based on the information sequence.

[0136] In some embodiments, the first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

[0137] In S101B2, P bits are added to the first bit sequence to generate a second bit sequence.

[0138] P is a positive integer.

[0139] In some embodiments, in the second bit sequence, P bits satisfy at least one of the following: P1 bits are located before the first bit sequence, P2 bits are located after the first bit sequence, and P3 bits are located within the first bit sequence. P1, P2, and P3 are all integers less than or equal to P, and the sum of P1, P2, and P3 is equal to P.

[0140] In S101B3 , a first signal is generated based on the second bit sequence.

[0141] Different characteristics of the first signal correspond to different second bit sequences.

[0142] In some embodiments, different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: different lengths of the first signal correspond to different second bit sequences, different combination orders of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences, different width combinations of high-level pulses and / or low-level pulses in the first signal correspond to different second bit sequences, different widths of high-level pulses and / or low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

[0143] In some embodiments, the first signal is generated based on the second bit sequence through a preset waveform coding method or mapping method.

[0144] In some embodiments, the high-level pulses and low-level pulses in the first signal correspond to one or more modulation symbols of the same length and different amplitudes, and the different amplitudes of the modulation symbols or the presence or absence of data transmission on the modulation symbols correspond to high-level pulses and low-level pulses, respectively. Exemplarily, the modulation symbols may be, for example, on-off keying modulation symbols, amplitude shift keying modulation symbols, orthogonal frequency division multiplexing modulation symbols, and the length of the modulation symbol is the duration of the symbol.

[0145] In some embodiments, the length of the first signal is determined based on a duration of the first signal. The duration of a pulse of the first signal is determined based on a pulse width of a high-level pulse and a pulse width of a low-level pulse in the first signal.

[0146] In some embodiments, an information sequence of length K = 1 is mapped using a predetermined encoding or mapping method to obtain a first bit sequence, and P bits are added to the first bit sequence to generate a second bit sequence, where P is a positive integer. Furthermore, a first signal is generated based on the second bit sequence, and different combinations of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences. Examples 19 to 25 below illustrate this embodiment.

[0147] Example 19: Taking the first signal shown in FIG. 4 as an example, K=1, P=1, and an information sequence with a length of K=1 bits can be mapped to a first bit sequence with a length of K1=2 based on a pre-set mapping method, and P=1 bits are added to the first bit sequence to obtain a second bit sequence, and the P=1 bit sequence is 1. Exemplarily, the first bit sequence and the second bit sequence can be as shown in Table 1 below: when the bit value of the information sequence is 0, the value of the first bit sequence is 01, and further, when all P=1 bits are located before the first bit sequence, the value of the second bit sequence is 101; or, when all P=1 bits are located within the first bit sequence, the value of the second bit sequence is 011; or, when all P=1 bits are located after the first bit sequence, the value of the second bit sequence is 011. Alternatively, when the bit value of the information sequence is 1 and the value of the first bit sequence is 10, and further, when P=1 bit is entirely located before the first bit sequence, the value of the second bit sequence is 110. Alternatively, when P=1 bit is entirely located within the first bit sequence, the value of the second bit sequence is 110. Alternatively, when P=1 bit is entirely located after the first bit sequence, the value of the second bit sequence is 101. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as shown in FIG. 4 above.

[0148] Table 1

[0149] Example 20: Taking the first signal shown in FIG. 5 as an example, K=1, P=2, and an information sequence with a length of K=1 bits can be mapped to a first bit sequence with a length of K1=2 based on a pre-set mapping method. P=2 bits are added to the first bit sequence to obtain a second bit sequence, and the P=2 bit sequence is 11. For example, the first bit sequence and the second bit sequence can be as shown in Table 2 below: when the bit value of the information sequence is 0 and the value of the first bit sequence is 01, and further, when all P=2 bits are located before the first bit sequence, the value of the second bit sequence is 1101; or, when all P=2 bits are located within the first bit sequence, the value of the second bit sequence is 0111; or, when all P=2 bits are located after the first bit sequence, the value of the second bit sequence is 0111; or, when one of the P=2 bits is located before the first bit sequence and the other bit is located after the first bit sequence, the value of the second bit sequence is 1011.

[0150] Alternatively, when the bit value of the information sequence is 1 and the value of the first bit sequence is 10, and further, P=2 bits are all located before the first bit sequence, the value of the second bit sequence is 1110; or, when P=2 bits are all located within the first bit sequence, the value of the second bit sequence is 1110; or, when P=2 bits are all located after the first bit sequence, the value of the second bit sequence is 1011; or, when P=1 of the 2 bits is located before the first bit sequence and the other bit is located after the first bit sequence, the value of the second bit sequence is 1101.

[0151] In addition, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as shown in Figure 5 above.

[0152] Table 2

[0153] Example 21: Taking the first signal shown in FIG6 as an example, K=1, P=1, and K1=4. An information sequence with a length of K=1 bits can be mapped to a first bit sequence with a length of K1=4 based on a pre-set mapping method, and P=1 bits are added to the first bit sequence to obtain a second bit sequence, where the P=1 bit sequence is 1. For example, the first bit sequence and the second bit sequence can be as shown in Table 3 below: when the bit value of the information sequence is 0, the value of the first bit sequence is 0101, and further, when all P=1 bits are located before the first bit sequence, the value of the second bit sequence is 10101; or, when all P=1 bits are located within the first bit sequence, the value of the second bit sequence is 01101; or, when all P=1 bits are located after the first bit sequence, the value of the second bit sequence is 01011.

[0154] Alternatively, when the bit value of the information sequence is 1, the value of the first bit sequence is 1010, and further, when P=1 bit is entirely located before the first bit sequence, the value of the second bit sequence is 11010; or, when P=1 bit is entirely located within the first bit sequence, the value of the second bit sequence is 10110; or, when P=1 bit is entirely located after the first bit sequence, the value of the second bit sequence is 10101.

[0155] In addition, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as shown in Figure 6 above.

[0156] Table 3

[0157] Example 22: Taking the first signal shown in FIG. 7 as an example, K=1, P=3, and K1=2. An information sequence of length K=1 bits can be mapped to a first bit sequence of length K1=2 based on a pre-set mapping method, and P=3 bits are added to the first bit sequence to obtain a second bit sequence, where the P=3 bit sequence is 101. For example, the first bit sequence and the second bit sequence can be as shown in Table 4 below: when the bit value of the information sequence is 0 and the value of the first bit sequence is 01, and further, when all P=3 bits are located before the first bit sequence, the value of the second bit sequence is 10101; or, when all P=3 bits are located within the first bit sequence, the value of the second bit sequence is 01011; or, when all P=3 bits are located after the first bit sequence, the value of the second bit sequence is 01101.

[0158] Alternatively, when the bit value of the information sequence is 1, the value of the first bit sequence is 10, and further, when P=3 bits are all located before the first bit sequence, the value of the second bit sequence is 10110; or, when P=3 bits are all located within the first bit sequence, the value of the second bit sequence is 11010; or, when P=3 bits are all located after the first bit sequence, the value of the second bit sequence is 10101.

[0159] In addition, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as shown in Figure 7 above.

[0160] Table 4

[0161] Example 23, K=1, P=1, and K1=4. An information sequence with a length of K=1 bits can be mapped to a first bit sequence with a length of K1=4 based on a pre-set mapping method, and P=1 bits are added to the first bit sequence to obtain a second bit sequence, and the P=1 bit sequence is 1. Exemplarily, the first bit sequence and the second bit sequence can be as shown in Table 5 below, where the bit value of the information sequence is 0, the value of the first bit sequence is 1001, and further, when all P=1 bits are located before the first bit sequence, the value of the second bit sequence is 11001, or when all P=1 bits are located within the first bit sequence, the value of the second bit sequence is 10101, or when all P=1 bits are located after the first bit sequence, the value of the second bit sequence is 10011.

[0162] Alternatively, when the bit value of the information sequence is 1, the value of the first bit sequence is 0110, and further, when P=1 bit is entirely located before the first bit sequence, the value of the second bit sequence is 10110; or, when P=1 bit is entirely located within the first bit sequence, the value of the second bit sequence is 01110; or, when P=1 bit is entirely located after the first bit sequence, the value of the second bit sequence is 01101.

[0163] In addition, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as shown in Figure 9 above.

[0164] Table 5

[0165] Example 24: K=1, P=1, and K1=4. An information sequence with a length of K=1 bits can be mapped to a first bit sequence with a length of K1=4 based on a pre-set mapping method, and P=1 bits are added to the first bit sequence to obtain a second bit sequence, and the P=1 bit sequence is 1. For example, the first bit sequence and the second bit sequence can be as shown in Table 6 below, where the bit value of the information sequence is 0, the value of the first bit sequence is 0011, and when all P=1 bits are located before the first bit sequence, the second bit sequence is 10011, or, when all P=1 bits are located within the first bit sequence, the second bit sequence is 00111, or, when all P=1 bits are located after the first bit sequence, the second bit sequence is 00111. The information sequence is 1, the first bit sequence is 1100, and when P=1 bit is entirely located before the first bit sequence, the second bit sequence is 11100. Alternatively, when P=1 bit is entirely located within the first bit sequence, the second bit sequence is 11100. Alternatively, when P=1 bit is entirely located after the first bit sequence, the second bit sequence is 11001. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal may be as shown in FIG. 11 .

[0166] Table 6

[0167] Example 25: K=1, P=2, and K1=6. An information sequence with a length of K=1 bits can be mapped to a first bit sequence with a length of K1=6 based on a pre-set mapping method. P=2 bits are added to the first bit sequence to obtain a second bit sequence, and the P=2 bit sequence is 11. For example, the first bit sequence and the second bit sequence can be as shown in Table 7 below: the information sequence is 0, the first bit sequence is 101100, and when all P=2 bits are within the first bit sequence, the second bit sequence can be 10110110. The information sequence is 1, the first bit sequence is 110100, and when all P=2 bits are within the first bit sequence, the second bit sequence can be 11010110. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW. That is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as shown in FIG. 13 above.

[0168] Table 7

[0169] In some embodiments, the value of K may be greater than 1. Furthermore, the present embodiment is exemplarily described below with reference to Examples 26 to 29.

[0170] Example 26: K=2, P=2, and the bit values ​​of the information sequence may include 00, 01, 10, or 11. The information sequence can be mapped to a first bit sequence with K1=4 based on a preset mapping method. Furthermore, P=2 bits are added to the first bit sequence to obtain a second bit sequence. The P=2 bit sequence is 11, and the P=2 bits can be divided into two parts, one before the first bit sequence and the other after the first bit sequence. The first bit sequence and the second bit sequence are shown in Table 8 below. The bit value of the information sequence is 00, the value of the first bit sequence is 0101, and the value of the second bit sequence is 101011. Alternatively, the bit value of the information sequence is 01, the value of the first bit sequence is 0110, and the value of the second bit sequence is 101101. Alternatively, the bit value of the information sequence is 10, the value of the first bit sequence is 1001, and the value of the second bit sequence is 110011. Alternatively, the bit value of the information sequence is 11, the value of the first bit sequence is 1010, and the value of the second bit sequence is 110101. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW. The generated first signal can be as shown in FIG. 14 above.

[0171] Table 8

[0172] Example 27: K = 2, and the information sequence of K = 2 is determined as a first bit sequence based on a Walsh code encoding method with a length of 8 (i.e., K1 = 8). The first bit sequence and another P = 2 bits are then combined to form a second bit sequence, where the P = 2 bit sequence is 11. The P = 2 bits can all be located before, in the middle, or after the first bit sequence, or divided into multiple parts and located before, in the middle, or after the first bit sequence. The first bit sequence and the second bit sequence are shown in Table 9. Taking the example of P = 2 bits all being located after the first bit sequence, the bit value of the information sequence is 00, the value of the first bit sequence is 01010101, and the value of the second bit sequence is 0101010111. Alternatively, the bit value of the information sequence is 01, the value of the first bit sequence is 01100110, and the value of the second bit sequence is 0110011011. Alternatively, the bit value of the information sequence is 10, the value of the first bit sequence is 01011010, and the value of the second bit sequence is 0101101011. Alternatively, the bit value of the information sequence is 11, the value of the first bit sequence is 01101001, and the value of the second bit sequence is 0110100111. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, which can be shown in FIG. 15 above.

[0173] Table 9

[0174] Example 28: K = 2, and the information sequence of K = 2 is used to determine a first bit sequence of K1 = 6 based on a preset mapping method. The first bit sequence and P = 2 additional bits are then combined to form a second bit sequence, where the P = 2 bit sequence is 11. The P = 2 bits can all be located before, in the middle, or after the first bit sequence, or divided into multiple parts and located before, in the middle, or after the first bit sequence. The first bit sequence and the second bit sequence are shown in Table 10. Taking P = 2 bits divided into two parts and located before and after the first bit sequence as an example, the bit value of the information sequence is 00, the value of the first bit sequence is 100111, and the value of the second bit sequence is 11001111. Alternatively, the bit value of the information sequence is 01, the value of the first bit sequence is 111001, and the value of the second bit sequence is 11110011. Alternatively, the bit value of the information sequence is 10, the value of the first bit sequence is 010100, and the value of the second bit sequence is 10101001. Alternatively, the bit value of the information sequence is 11, the value of the first bit sequence is 001010, and the value of the second bit sequence is 10010101. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, which can be shown in FIG. 16 above.

[0175] Table 10

[0176] Example 29: K = 2, and the information sequence of K = 2 is used to determine a first bit sequence of K1 = 8 based on a preset mapping method. The first bit sequence and another P = 3 bits are then combined to form a second bit sequence, where the P = 3 bit sequence is 110. The P = 3 bits can all be located before, in the middle, or after the first bit sequence, or divided into multiple parts and located before, in the middle, or after the first bit sequence. The first bit sequence and the second bit sequence are shown in Table 11. Taking the example of P = 3 bits all located after the first bit sequence, the bit value of the information sequence is 00, the value of the first bit sequence is 11111110, and the value of the second bit sequence is 11111110110. Alternatively, the bit value of the information sequence is 01, the value of the first bit sequence is 111111100, and the value of the second bit sequence is 111111100110. Alternatively, the bit value of the information sequence is 10, the value of the first bit sequence is 11111000, and the value of the second bit sequence is 11111000110. Alternatively, the bit value of the information sequence is 11, the value of the first bit sequence is 11110000, and the value of the second bit sequence is 11110000110. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, which can be shown in FIG. 17 above.

[0177] Table 11

[0178] In some embodiments, for different information sequences, the lengths of the corresponding generated first bit sequences may also be different. In addition, the present embodiment is exemplarily described below with reference to Examples 30 and 31.

[0179] Example 30: K=1, and the information sequence of K=1 is determined to be a first bit sequence of length K1 based on a preset mapping method. The value of K1 can be 4, 6, or other possible values. The first bit sequence and another P=1 bits are then combined to form a second bit sequence, and the P=1 bit sequence is 1. The P=1 bit can all be located before, in the middle, or after the first bit sequence. The first bit sequence and the second bit sequence are shown in Table 12. Taking the example of P=1 bit all being located before the first bit sequence, the bit value of the information sequence is 0, the value of the first bit sequence is 1001, and the value of the second bit sequence is 11001. Alternatively, the bit value of the information sequence is 1, the value of the first bit sequence is 011011, and the value of the second bit sequence is 1011011. It can be seen that different bit values ​​of the information sequence correspond to different lengths of the first bit sequence, and thus the corresponding lengths of the second bit sequence are also different. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal. The first signal can be as shown in FIG. 18 above. For different information sequences, the length of the corresponding generated first signal can also be different.

[0180] Table 12

[0181] Example 31: K=2, and the information sequence of K=2 is determined based on a preset mapping method to form a first bit sequence of length K1. The value of K1 can be determined based on the bit value of the information sequence. The first bit sequence and another P=3 bits are then combined to form a second bit sequence. The first bit sequence and the second bit sequence are shown in Table 13. Taking the example of P=3 bits all located after the first bit sequence, the P=3 bit sequence is 110. The bit value of the information sequence is 00, the value of the first bit sequence is 1010, and the value of the second bit sequence is 1010110. Alternatively, the bit value of the information sequence is 01, the value of the first bit sequence is 10110, and the value of the second bit sequence is 10110110. Alternatively, the bit value of the information sequence is 10, the value of the first bit sequence is 11010, and the value of the second bit sequence is 11010110. Alternatively, the bit value of the information sequence is 11, the value of the first bit sequence is 110110, and the value of the second bit sequence is 110110110. It can be seen that different bit values ​​of the information sequence correspond to different lengths of the first bit sequence, and thus the corresponding lengths of the second bit sequence are also different. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, that is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal. The first signal can be as shown in FIG. 19 above. For different information sequences, the length of the corresponding generated second signal can also be different.

[0182] Table 13

[0183] In some embodiments, in the process of generating the first signal based on the second bit sequence through a preset waveform encoding method or mapping method, the waveform width corresponding to the first bit sequence is the same as the waveform width corresponding to the other P bits.

[0184] In some embodiments, the waveform width corresponding to the first bit sequence may be different from the waveform width corresponding to the other P bits. In addition, the present embodiment is exemplarily described below with Examples 32 to 34.

[0185] Example 32: K = 1, K1 = 2. The first bit sequence and another P = 1 bit constitute the second bit sequence, where the P = 1 bit sequence is 1. The P = 1 bit can be located entirely before, within, or after the first bit sequence. The first signal is obtained by mapping the second bit sequence according to a pre-set mapping method. The P = 1 bit in the second bit sequence is mapped to a high-level pulse with a width of PW. Bit 1 in the second bit sequence belonging to the first bit sequence is mapped to a high-level pulse with a width of PW'. Bit 0 in the first bit sequence is mapped to a low-level pulse with a width of PW', where PW > PW'. The first bit sequence and the second bit sequence are shown in Table 1. When the bit value of the information sequence is 0 and the value of the first bit sequence is 01, and further, when the P = 1 bit is located entirely before the first bit sequence, the value of the second bit sequence is 101. Alternatively, when the P = 1 bit is located entirely within the first bit sequence, the value of the second bit sequence is 011. Alternatively, when the P = 1 bit is located entirely after the first bit sequence, the value of the second bit sequence is 011. Alternatively, when the bit value of the information sequence is 1 and the value of the first bit sequence is 10, and further, P=1 bit is entirely located before the first bit sequence, the value of the second bit sequence is 110. Alternatively, when P=1 bit is entirely located within the first bit sequence, the value of the second bit sequence is 110. Alternatively, when P=1 bit is entirely located after the first bit sequence, the value of the second bit sequence is 101. Furthermore, the first signal obtained based on the second bit sequence may be as shown in FIG. 20 .

[0186] Example 33: K = 1, K1 = 4. The first bit sequence and another P = 1 bit constitute the second bit sequence, where the P = 1 bit sequence is 1. Taking the case where all P = 1 bits precede the first bit sequence as an example, the first signal is obtained by mapping the second bit sequence according to a pre-set mapping method. The P = 1 bit in the second bit sequence is mapped to a high-level pulse with a width of PW. Bit 1 in the second bit sequence belonging to the first bit sequence is mapped to a high-level pulse with a width of PW'. Bit 0 in the first bit sequence is mapped to a low-level pulse with a width of PW', where PW > PW'. The first and second bit sequences are shown in Table 14. Taking the case where all P = 1 bits precede the first bit sequence as an example, the information bit has a bit value of 0, the bit value of the first bit sequence has a bit value of 1001, and the bit value of the second bit sequence has a bit value of 11001. Alternatively, the information bit has a bit value of 1, the bit value of the first bit sequence has a bit value of 0110, and the bit value of the second bit sequence has a bit value of 10110. In addition, the first signal obtained based on the second bit sequence can be as shown in Figure 22 above.

[0187] Table 14

[0188] Example 34: K = 2. The first bit sequence and another P = 3 bits form the second bit sequence, where the P = 3 bit sequence is 110. Taking the case where all P = 3 bits follow the first bit sequence as an example, the first signal is obtained by mapping based on the second bit sequence according to a pre-set mapping method. Bit 1 of the P = 3 bits in the second bit sequence is mapped to a high-level pulse with a width of PW, and bit 0 of the P = 3 bits is mapped to a low-level pulse with a width of PW. Bit 0 of the second bit sequence belonging to the first bit sequence is mapped to a low-level pulse with a width of PW0, a single bit 1 belonging to the first bit sequence is mapped to a high-level pulse with a width of PW1, and two consecutive bits 1 belonging to the first bit sequence are mapped together to a high-level pulse with a width of PW2, where PW>PW2>PW1≥PW0. The first and second bit sequences are shown in Table 15. Taking the case where all P = 3 bits follow the first bit sequence as an example, the information bits have bit values ​​of 00, the first bit sequence has bit values ​​of 1010, and the second bit sequence has bit values ​​of 1010110. Alternatively, the information bit value is 01, the bit value of the first bit sequence is 10110, and the bit value of the second bit sequence is 10110110. Alternatively, the information bit value is 10, the bit value of the first bit sequence is 11010, and the bit value of the second bit sequence is 11010110. Alternatively, the information bit value is 11, the bit value of the first bit sequence is 110110, and the bit value of the second bit sequence is 110110110. Furthermore, the first signal obtained based on the second bit sequence may be as shown in FIG. 23 above.

[0189] Table 15

[0190] In some embodiments, for different information sequences, the added P bits may be located at different positions in the first bit sequence thereof. In addition, this embodiment is exemplarily described below with reference to Examples 35 and 36.

[0191] Example 35: An information sequence with K = 1 bits is mapped to a first bit sequence with K1 = 5 according to a predefined mapping method, and P bits are added to the first bit sequence to form a second bit sequence, where P is a positive integer. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW, i.e., in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal, which can be shown as shown in Figures 25A to 25F above. The first bit sequence and the second bit sequence are shown in Table 16, respectively. When the information sequence is 0, the first bit sequence is 10110; or when the information sequence is 1, the first bit sequence is 11010. Furthermore, P bits are added to the first bit sequence to form a second bit sequence.

[0192] Corresponding to FIG. 25A , if P=1 and P=1 bit is 1, and the information sequence is 0, and P=1 bit is added after the fourth bit of the first bit sequence, the resulting second bit sequence is 101110. Alternatively, if the information sequence is 1, and P=1 bit is added after the second bit of the first bit sequence, the resulting second bit sequence is 111010.

[0193] Corresponding to FIG. 25B , P=2 and P=2 bits is 11. When the information sequence is 0 and P=2 bits are added after the fourth bit of the first bit sequence, the resulting second bit sequence is 1011110. Alternatively, when the information sequence is 1 and P=2 bits are added after the second bit of the first bit sequence, the resulting second bit sequence is 1111010.

[0194] Corresponding to FIG. 25C , P=3 and P=3 bits is 111. When the information sequence is 0 and 1 and 2 bits are added after the 1st and 4th bits of the first bit sequence, respectively, the resulting second bit sequence is 11011110. Alternatively, when the information sequence is 1 and 2 and 1 bits are added after the 2nd and 4th bits of the first bit sequence, respectively, the resulting second bit sequence is 11110110.

[0195] Corresponding to FIG. 25D , P=6, and all P=6 bits are 1. When the information sequence is 0, and 2 and 4 bits are added after the 1st and 4th bits of the first bit sequence, respectively, the resulting second bit sequence is 11101111110. Alternatively, when the information sequence is 1, and 4 and 2 bits are added after the 2nd and 4th bits of the first bit sequence, respectively, the resulting second bit sequence is 11111101110.

[0196] Corresponding to FIG. 25E , P=4, and P=4 bits is 1010. When the information sequence is 0, and bit 10 and bit 10 are added after the first bit and the fourth bit of the first bit sequence, respectively, the resulting second bit sequence is 110011100. Alternatively, when the information sequence is 1, and bit 10 and bit 10 are added after the second bit and the fourth bit of the first bit sequence, respectively, the resulting second bit sequence is 111001100.

[0197] Corresponding to FIG. 25F , P=5, and P=5 bits are 10110. When the information sequence is 0, and bit 10 and bit 110 are added after the first and fourth bits of the first bit sequence, respectively, the resulting second bit sequence is 1100111100. Alternatively, when the information sequence is 1, and bit 110 and bit 10 are added after the second and fourth bits of the first bit sequence, respectively, the resulting second bit sequence is 1111001100.

[0198] Table 16

[0199] Example 36: An information sequence with K = 1 bits is mapped to a first bit sequence with K1 = 5, 6, or other possible values ​​according to a predefined mapping method. That is, the first bit sequences corresponding to different information sequences can have different lengths. Furthermore, P bits are added to the first bit sequence to form a second bit sequence, where P is a positive integer. Furthermore, the second bit sequence is mapped bit by bit to a high / low level pulse with a width of PW. That is, in the second bit sequence, bit 0 is mapped to a low level pulse with a width of PW, and bit 1 is mapped to a high level pulse with a width of PW, to obtain a first signal. The first signal can be shown in Figures 27A and 27B above. The first bit sequence and the second bit sequence are shown in Table 17, respectively. When the information sequence is 0, the first bit sequence is 10110, and its length is K1 = 5; or when the information sequence is 1, the first bit sequence is 111010, and its length is K1 = 6. Furthermore, P bits are added to the first bit sequence to form a second bit sequence.

[0200] Corresponding to FIG. 27A , where P=1 and P=1 bit is 1, and the information sequence is 0 and P=1 bit is added after the fourth bit of the first bit sequence, the resulting second bit sequence is 101110, which is 6 bits long. Where the information sequence is 1 and P=1 bit is added after the third bit of the first bit sequence, the resulting second bit sequence is 1111010, which is 7 bits long.

[0201] Corresponding to FIG. 27B , where P=2 and P=2 bits is 10, and the information sequence is 0 and two bits 10 are added after the fourth bit of the first bit sequence, the resulting second bit sequence is 1011100, which is 7 bits long. If the information sequence is 1 and bit 10 is added after the third bit of the first bit sequence, the resulting second bit sequence is 11110010, which is 8 bits long.

[0202] Table 17

[0203] In S102, a first signal is sent.

[0204] Accordingly, after receiving the first signal, the receiving end can use the high level in the signal for charging, and simultaneously use the part of the first signal belonging to the second signal or the first bit sequence to detect the information bits represented in the received signal.

[0205] It should be noted that, using the system shown in Figure 1 as an example, the information transmission method that can be used in the reader-to-tag link is the pulse interval encoding (PIE) scheme. As shown in Figure 29, the transmission signal corresponding to a bit value of 0 consists of high-level pulses and low-level pulses of equal width, with the low-level pulse width being PW (Pulse Width). The transmission signal corresponding to a bit value of 1 consists of high-level pulses and low-level pulses of varying widths, with the low-level pulse width being PW, and the high-level pulse width being 2PW to 3PW. When the probability of bits 0 and 1 is equal, the high-level ratio of each transmission signal is 3 / 5 to 2 / 3. Leveraging the different high-level pulse widths in the transmission signals of bits 0 and 1, the passive tag can make bit decisions based on the received high-level pulse widths. Furthermore, because the transmission signals of both bits 0 and 1 contain high-level pulses, the RF signal transmitted by the reader can always maintain a certain energy level.

[0206] For example, the waveform length of bit 0 is T s =2PW, the width of high-level pulse and low-level pulse are both 0.5T s =PW, so the waveform length of bit 1 is (1+α)T s (0.5≤α≤1), α is the proportional coefficient. The amplitude of the high level is A, and the amplitude of the low level is 0, then the transmission signal of bit 0 has energy The transmitted signal of bit 1 has energy E1 = A 2 (1+α-0.5)T s Furthermore, when the probability of bits 0 and 1 is equal, the transmitted signal per bit has an average energy of Therefore, this information transmission method can ensure that energy is provided to the passive tag while data is transmitted.

[0207] Furthermore, in PIE encoding, the average length of the transmission signal per bit is Therefore, within the length range of each transmission signal, the average power consumption of each bit of the transmission signal is It is easy to know that this value is proportional to the high level ratio in each transmission signal in the PIE encoding. Therefore, in the present disclosure, the energy supply capability of the information transmission method can be improved to a certain extent by changing the high level ratio in the first signal.

[0208] Based on the technical solution provided by the present disclosure, a signal generated based on an information sequence can be transmitted, generating a signal composed of high-level pulses and low-level pulses. Based on this signal, energy can be provided to a passive terminal at the receiving end while transmitting information. In addition, the different ratios of high-level pulses to low-level pulses in this signal can be used to measure the energy supply capacity of the signal, thereby improving the energy supply capacity by controlling the ratio of high-level pulses to low-level pulses in the signal.

[0209] In some embodiments, as shown in FIG30 , the present disclosure further provides an information receiving method, which includes S201 and S202 .

[0210] In S201 , a first signal consisting of a high-level pulse and a low-level pulse is received.

[0211] In some embodiments, the length of the information sequence is determined according to one of the following methods: pre-set, or configured through signaling.

[0212] In one implementation, the first signal is obtained by adding M unit high-level pulses and N unit low-level pulses to the second signal. The second signal is generated based on the information sequence and is composed of high-level pulses and low-level pulses. Different characteristics of the second signal correspond to different information sequences. M is an integer greater than or equal to 1, and N is an integer greater than or equal to 0, with M being greater than N.

[0213] In some embodiments, the pulse width of the unit high-level pulse and the pulse width of the unit low-level pulse are determined according to one of the following methods: a preset pulse width value, or configuration through signaling.

[0214] In some embodiments, the second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

[0215] In some embodiments, in the first signal, the M unit high-level pulses satisfy at least one of the following: M1 unit high-level pulses are located before the first pulse in the second signal, M2 unit high-level pulses are located after the last pulse in the second signal, and M3 unit high-level pulses are located within the second signal. M1, M2, and M3 are all integers less than or equal to M, and the sum of M1, M2, and M3 is equal to M.

[0216] In some embodiments, in the first signal, N unit low-level pulses satisfy at least one of the following: N1 unit low-level pulses are located before the first pulse in the second signal, N2 unit low-level pulses are located after the last pulse in the second signal, and N3 unit low-level pulses are located within the second signal. N1, N2, and N3 are all integers less than or equal to N, and the sum of N1, N2, and N3 is equal to N.

[0217] In some embodiments, different characteristics of the second signal correspond to different information sequences, including at least one of the following: different lengths of the second signal correspond to different information sequences, different combination orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences, different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different information sequences, different widths of high-level pulses and / or low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

[0218] In some embodiments, the high-level pulses and low-level pulses in the second signal correspond to one or more modulation symbols of the same length and different amplitude values, and the different amplitudes of the modulation symbols or whether the modulation symbols have data transmission or not correspond to high-level pulses and low-level pulses respectively.

[0219] In another implementation, the first signal is generated by adding P bits to the first bit sequence to obtain a second bit sequence. The first bit sequence is generated based on the information sequence, and P is a positive integer.

[0220] In some embodiments, the first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

[0221] In some embodiments, the first signal is generated based on the second bit sequence through a preset waveform coding method or mapping method.

[0222] In some embodiments, in the second bit sequence, P bits satisfy at least one of the following: P1 bits are located before the first bit sequence, P2 bits are located after the first bit sequence, and P3 bits are located within the first bit sequence. P1, P2, and P3 are all integers less than or equal to P, and the sum of P1, P2, and P3 is equal to P.

[0223] In some embodiments, different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: different lengths of the first signal correspond to different second bit sequences, different combination orders of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences, different width combinations of high-level pulses and / or low-level pulses in the first signal correspond to different second bit sequences, different widths of high-level pulses and / or low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

[0224] In some embodiments, the high-level pulses and low-level pulses in the first signal correspond to one or more modulation symbols of the same length and different amplitude values. The different amplitudes of the modulation symbols or whether the modulation symbols have data transmission or not correspond to high-level pulses and low-level pulses respectively.

[0225] In S202 , charging is performed based on the first signal and an information sequence is acquired.

[0226] After receiving the first signal, the receiving end can use the high level in the signal for charging, and at the same time use the part of the first signal belonging to the second signal or the first bit sequence to detect the information bits represented in the received signal.

[0227] For detailed description of S201 and S202 , please refer to the relevant description of S101 and S102 above, which will not be repeated here.

[0228] The above mainly introduces the solution provided by the present disclosure from the perspective of the interaction between each node. It is understandable that each node, such as a device or equipment, includes a hardware structure and / or software module corresponding to the execution of each function in order to realize the above functions. Those skilled in the art should easily realize that, in combination with the algorithm steps of each example described in the embodiments disclosed herein, the present disclosure can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present disclosure.

[0229] The embodiments of the present disclosure can divide the functional modules of the communication device according to the above-mentioned method embodiments. For example, each functional module can be divided corresponding to each function, or two or more functions can be integrated into one functional module. The above-mentioned integrated modules can be implemented in the form of hardware or software. It should be noted that the division of modules in the embodiments of the present disclosure is schematic and is only a logical functional division. In actual implementation, there may be other division methods. The following is an example of dividing each functional module corresponding to each function.

[0230] FIG31 is a schematic diagram showing the composition of a communication device according to an embodiment of the present disclosure. As shown in FIG31 , the communication device 310 includes a processing module 3101 and a sending module 3102 .

[0231] In some embodiments, the processing module 3101 is configured to generate a first signal consisting of a high-level pulse and a low-level pulse based on the information sequence. The sending module 3102 is configured to send the first signal.

[0232] In some embodiments, the length of the information sequence is determined according to one of the following methods: pre-set, or configured through signaling.

[0233] In some embodiments, the processing module 3101 is configured to, for example, generate a second signal consisting of high-level pulses and low-level pulses based on the information sequence. Different characteristics of the second signal correspond to different information sequences, and to add M unit high-level pulses and N unit low-level pulses to the second signal to generate the first signal. M is an integer greater than or equal to 1, N is an integer greater than or equal to 0, and M is greater than N.

[0234] In some embodiments, the pulse width of the unit high-level pulse and the pulse width of the unit low-level pulse are determined according to one of the following methods: a preset pulse width value, or configuration through signaling.

[0235] In some embodiments, the second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

[0236] In some embodiments, in the first signal, the M unit high-level pulses satisfy at least one of the following: M1 unit high-level pulses are located before the first pulse in the second signal, M2 unit high-level pulses are located after the last pulse in the second signal, and M3 unit high-level pulses are located within the second signal. M1, M2, and M3 are all integers less than or equal to M, and the sum of M1, M2, and M3 is equal to M.

[0237] In some embodiments, in the first signal, N unit low-level pulses satisfy at least one of the following: N1 unit low-level pulses are located before the first pulse in the second signal, N2 unit low-level pulses are located after the last pulse in the second signal, and N3 unit low-level pulses are located within the second signal. N1, N2, and N3 are all integers less than or equal to N, and the sum of N1, N2, and N3 is equal to N.

[0238] In some embodiments, different characteristics of the second signal correspond to different information sequences, including at least one of the following: different lengths of the second signal correspond to different information sequences, different combination orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences, different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different information sequences, different widths of high-level pulses and / or low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

[0239] In some embodiments, the high-level pulses and low-level pulses in the second signal correspond to one or more modulation symbols of the same length and different amplitude values, and the different amplitudes of the modulation symbols or whether the modulation symbols have data transmission or not correspond to high-level pulses and low-level pulses respectively.

[0240] In some embodiments, the processing module 3101 is used, for example, to: generate a first bit sequence based on the information sequence; add P bits to the first bit sequence to generate a second bit sequence, where P is a positive integer; and generate a first signal based on the second bit sequence.

[0241] In some embodiments, the first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

[0242] In some embodiments, the first signal is generated based on the second bit sequence through a preset waveform coding method or mapping method.

[0243] In some embodiments, in the second bit sequence, P bits satisfy at least one of the following: P1 bits are located before the first bit sequence, P2 bits are located after the first bit sequence, and P3 bits are located within the first bit sequence. P1, P2, and P3 are all integers less than or equal to P, and the sum of P1, P2, and P3 is equal to P.

[0244] In some embodiments, different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: different lengths of the first signal correspond to different second bit sequences, different combination orders of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences, different width combinations of high-level pulses and / or low-level pulses in the first signal correspond to different second bit sequences, different widths of high-level pulses and / or low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

[0245] In some embodiments, the high-level pulses and low-level pulses in the first signal correspond to one or more modulation symbols of the same length and different amplitude values. The different amplitudes of the modulation symbols or whether the modulation symbols have data transmission or not correspond to high-level pulses and low-level pulses respectively.

[0246] For a more detailed description of the above-mentioned processing module 3101 and sending module 3102, a more detailed description of each technical feature, and a description of the beneficial effects, etc., please refer to the above-mentioned corresponding method embodiment part, which will not be repeated here.

[0247] FIG32 is a schematic diagram showing the composition of a communication device according to an embodiment of the present disclosure. As shown in FIG32 , the communication device 320 includes a receiving module 3201 and a processing module 3202 .

[0248] In some embodiments, the receiving module 3201 is configured to receive a first signal consisting of a high-level pulse and a low-level pulse, and the processing module 3202 is configured to charge and obtain an information sequence based on the first signal.

[0249] In some embodiments, the length of the information sequence is determined according to one of the following methods: pre-set, or configured through signaling.

[0250] In some embodiments, the first signal is obtained by adding M unit high-level pulses and N unit low-level pulses to the second signal. The second signal is generated based on the information sequence and is composed of high-level pulses and low-level pulses. Different characteristics of the second signal correspond to different information sequences. M is an integer greater than or equal to 1, and N is an integer greater than or equal to 0, where M is greater than N.

[0251] In some embodiments, the pulse width of the unit high-level pulse and the pulse width of the unit low-level pulse are determined according to one of the following methods: a preset pulse width value, or configuration through signaling.

[0252] In some embodiments, the second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

[0253] In some embodiments, in the first signal, the M unit high-level pulses satisfy at least one of the following: M1 unit high-level pulses are located before the first pulse in the second signal, M2 unit high-level pulses are located after the last pulse in the second signal, and M3 unit high-level pulses are located within the second signal. M1, M2, and M3 are all integers less than or equal to M, and the sum of M1, M2, and M3 is equal to M.

[0254] In some embodiments, in the first signal, N unit low-level pulses satisfy at least one of the following: N1 unit low-level pulses are located before the first pulse in the second signal, N2 unit low-level pulses are located after the last pulse in the second signal, and N3 unit low-level pulses are located within the second signal. N1, N2, and N3 are all integers less than or equal to N, and the sum of N1, N2, and N3 is equal to N.

[0255] In some embodiments, different characteristics of the second signal correspond to different information sequences, including at least one of the following: different lengths of the second signal correspond to different information sequences, different combination orders of high-level pulses and low-level pulses in the second signal correspond to different information sequences, different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different information sequences, different widths of high-level pulses and / or low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

[0256] In some embodiments, the high-level pulses and low-level pulses in the second signal correspond to one or more modulation symbols of the same length and different amplitude values, and the different amplitudes of the modulation symbols or whether the modulation symbols have data transmission or not correspond to high-level pulses and low-level pulses respectively.

[0257] In some embodiments, the first signal is generated by adding P bits to the first bit sequence to obtain a second bit sequence. The first bit sequence is generated based on the information sequence, and P is a positive integer.

[0258] In some embodiments, the first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

[0259] In some embodiments, the second signal is generated based on the second bit sequence through a preset waveform coding method or mapping method.

[0260] In some embodiments, in the second bit sequence, P bits satisfy at least one of the following: P1 bits are located before the first bit sequence, P2 bits are located after the first bit sequence, and P3 bits are located within the first bit sequence. P1, P2, and P3 are all integers less than or equal to P, and the sum of P1, P2, and P3 is equal to P.

[0261] In some embodiments, different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: different lengths of the first signal correspond to different second bit sequences, different combination orders of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences, different width combinations of high-level pulses and / or low-level pulses in the first signal correspond to different second bit sequences, different widths of high-level pulses and / or low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence, and different width ratios between a consecutive high-level pulse and a low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

[0262] In some embodiments, the high-level pulses and low-level pulses in the first signal correspond to one or more modulation symbols of the same length and different amplitude values. The different amplitudes of the modulation symbols or whether the modulation symbols have data transmission or not correspond to high-level pulses and low-level pulses respectively.

[0263] For a more detailed description of the above-mentioned receiving module 3201 and processing module 3202, a more detailed description of each technical feature, and a description of the beneficial effects, etc., please refer to the above-mentioned corresponding method embodiment part, which will not be repeated here.

[0264] It should be noted that the modules in FIG31 or FIG32 may also be referred to as units, for example, the processing module may be referred to as a processing unit. In addition, in the embodiment shown in FIG31 or FIG32 , the names of the modules may not be those shown in the figure, for example, the receiving module may also be referred to as a communication module.

[0265] If the various units in Figure 31 or Figure 32 are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiment of the present disclosure is essentially or the part that contributes to the relevant technology or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) or a processor (processor) to perform all or part of the steps of the various embodiments of the present disclosure. The storage medium for storing computer software products includes: various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0266] In the case of implementing the functions of the above-mentioned integrated modules in hardware, the embodiments of the present disclosure provide a schematic structural diagram of a communication device. As shown in Figure 33, the communication device 330 includes: a processor 3302, a communication interface 3303, and a bus 3304. In some embodiments, the communication device 330 may also include a memory 3301.

[0267] Processor 3302 may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the present disclosure. Processor 3302 may be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit, a field-programmable gate array, or other programmable logic device, a transistor logic device, a hardware component, or any combination thereof, and may implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the present disclosure. Processor 3302 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP (digital signal processor) and a microprocessor, and the like.

[0268] The communication interface 3303 is used to connect to other devices via a communication network, such as Ethernet, wireless access network, or wireless local area network (WLAN).

[0269] The memory 3301 may be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto.

[0270] As an implementation, the memory 3301 can exist independently of the processor 3302. The memory 3301 can be connected to the processor 3302 via a bus 3304 to store instructions or program codes. When the processor 3302 calls and executes the instructions or program codes stored in the memory 3301, the method provided by the embodiments of the present disclosure can be implemented.

[0271] In another implementation, the memory 3301 may also be integrated with the processor 3302 .

[0272] Bus 3304 can be an Extended Industry Standard Architecture (EISA) bus, etc. Bus 3304 can be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, FIG33 shows only one thick line, but this does not mean that there is only one bus or only one type of bus.

[0273] Through the description of the above implementation methods, technical personnel in the relevant field can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual applications, the above-mentioned functions can be distributed and completed by different functional modules as needed, that is, the internal structure of the equipment or device is divided into different functional modules to complete all or part of the functions described above.

[0274] The embodiments of the present disclosure also provide a computer-readable storage medium (e.g., a non-transitory computer-readable storage medium). All or part of the processes in the above-mentioned method embodiments can be completed by computer instructions to instruct the relevant hardware, and the program can be stored in the above-mentioned computer-readable storage medium. When the program is executed, it can include the processes of the above-mentioned method embodiments. The computer-readable storage medium can be the memory or memory of any of the aforementioned embodiments. The above-mentioned computer-readable storage medium can also be an external storage device of the above-mentioned device or apparatus, such as a plug-in hard disk, a smart memory card (smart media card, SMC), a secure digital (secure digital, SD) card, a flash card (flash card), etc. equipped on the above-mentioned device or apparatus. Furthermore, the above-mentioned computer-readable storage medium can also include both the internal storage unit of the above-mentioned device or apparatus and an external storage device. The above-mentioned computer-readable storage medium is used to store the above-mentioned computer program and other programs and data required by the above-mentioned device or apparatus. The above-mentioned computer-readable storage medium can also be used to temporarily store data that has been output or is to be output.

[0275] The embodiments of the present disclosure further provide a computer program product, which includes a computer program. When the computer program product is run on a computer, the computer is enabled to execute any one of the methods provided in the above embodiments.

[0276] Based on the technical solutions provided by the present disclosure, a signal consisting of high-level pulses and low-level pulses can be generated and transmitted based on an information sequence. This signal can simultaneously transmit information and provide energy to a passive terminal at the receiving end. Furthermore, the varying ratios of high-level pulses to low-level pulses in this signal can be used to measure the energy supply capability of the signal, thereby improving the energy supply capability by controlling the ratio of high-level pulses to low-level pulses in the signal.

[0277] Although the present disclosure is described herein in conjunction with various embodiments, in the process of implementing the disclosure for which protection is sought, those skilled in the art may understand and implement other variations of the disclosed embodiments by reviewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude multiple components. A single processor or other unit may implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.

[0278] Although the present disclosure has been described with reference to specific features and embodiments thereof, it will be apparent that various modifications and combinations may be made thereto without departing from the spirit and scope of the present disclosure. Accordingly, this specification and the drawings are merely illustrative of the present disclosure as defined by the appended claims and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the present disclosure. Obviously, those skilled in the art may make various modifications and variations to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, the present disclosure is intended to encompass such modifications and variations if they fall within the scope of the claims of the present disclosure and their equivalents.

[0279] The above is only a specific embodiment of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or replacements within the technical scope disclosed in the present disclosure should be included in the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. An information transmission method, comprising: Based on the information sequence, generating a first signal consisting of a high level pulse and a low level pulse; The first signal is sent.

2. The method according to claim 1, wherein: The length of the information sequence is determined according to one of the following methods: presetting, or configuring through signaling.

3. The method according to claim 1, wherein: The step of generating the first signal consisting of a high level pulse and a low level pulse based on the information sequence comprises: Based on the information sequence, generating a second signal consisting of a high-level pulse and a low-level pulse; wherein different characteristics of the second signal correspond to different information sequences; The first signal is generated by adding M unit high-level pulses and N unit low-level pulses to the second signal, where M is an integer greater than or equal to 1, N is an integer greater than or equal to 0, and M is greater than N.

4. The method according to claim 3, wherein: The pulse width of the unit high level pulse and the pulse width of the unit low level pulse are determined according to one of the following methods: a preset pulse width value, or by signaling configuration.

5. The method according to claim 3, wherein: The second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

6. The method according to claim 3, wherein: In the first signal, the M unit high-level pulses satisfy at least one of the following: M1 of the unit high level pulses are located before the first pulse in the second signal; M2 of the unit high level pulses are located after the last pulse in the second signal; M3 of the unit high level pulses are located in the second signal; Wherein, M1, M2 and M3 are all integers less than or equal to M, and the sum of M1, M2 and M3 is equal to M.

7. The method according to claim 3, wherein: In the first signal, the N unit low-level pulses satisfy at least one of the following: N1 of the unit low level pulses are located before the first pulse in the second signal; N2 said unit low level pulses are located after the last pulse in the second signal; N3 of the unit low level pulses are located in the second signal; Wherein, N1, N2 and N3 are all integers less than or equal to N, and the sum of N1, N2 and N3 is equal to N.

8. The method according to claim 3, wherein: Different characteristics of the second signal correspond to different information sequences, including at least one of the following: Different lengths of the second signal correspond to different information sequences; Different combination sequences of high-level pulses and low-level pulses in the second signal correspond to different information sequences; Different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different information sequences; Different widths of the high level pulse and / or the low level pulse in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between a continuous high-level pulse and a continuous low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

9. The method according to claim 3, wherein: The high level pulses and low level pulses in the second signal correspond to one or more modulation symbols with the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

10. The method according to claim 1, wherein: The step of generating the first signal consisting of a high level pulse and a low level pulse based on the information sequence comprises: Based on the information sequence, generate a first bit sequence; Adding P bits to the first bit sequence to generate a second bit sequence, where P is a positive integer; Based on the second bit sequence, the first signal is generated.

11. The method according to claim 10, wherein: The first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

12. The method according to claim 10, wherein: The first signal is generated based on the second bit sequence through a preset waveform coding method or mapping method.

13. The method according to claim 10, wherein: In the second bit sequence, the P bits satisfy at least one of the following: P1 bits are located before the first bit sequence; P2 bits are located after the first bit sequence; P3 bits are located in the first bit sequence; Wherein, P1, P2 and P3 are all integers less than or equal to P, and the sum of P1, P2 and P3 is equal to P.

14. The method according to claim 10, wherein: Different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: Different lengths of the first signal correspond to different second bit sequences; Different combination sequences of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences; Different width combinations of high-level pulses and / or low-level pulses in the first signal correspond to different second bit sequences; Different widths of the high-level pulse and / or the low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between a continuous high-level pulse and a continuous low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

15. The method according to claim 1, wherein: The high level pulse and the low level pulse in the first signal correspond to one or more modulation symbols with the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

16. A method for receiving information, comprising: receiving a first signal consisting of a high level pulse and a low level pulse; Charging is performed based on the first signal and an information sequence is acquired.

17. The method according to claim 16, wherein: The length of the information sequence is determined according to one of the following methods: presetting, or configuring through signaling.

18. The method according to claim 16, wherein: The first signal is obtained by adding M unit high-level pulses and N unit low-level pulses to the second signal; wherein, the second signal is a signal generated based on the information sequence and composed of high-level pulses and low-level pulses, different characteristics of the second signal correspond to different information sequences, M is an integer greater than or equal to 1, N is an integer greater than or equal to 0, and M is greater than N.

19. The method according to claim 18, wherein: The pulse width of the unit high level pulse and the pulse width of the unit low level pulse are determined according to one of the following methods: a preset pulse width value, or by signaling configuration.

20. The method according to claim 18, wherein: The second signal is generated based on the information sequence through a preset waveform coding method or mapping method.

21. The method according to claim 18, wherein: In the first signal, the M unit high-level pulses satisfy at least one of the following: M1 of the unit high level pulses are located before the first pulse in the second signal; M2 of the unit high level pulses are located after the last pulse in the second signal; M3 of the unit high level pulses are located in the second signal; Wherein, M1, M2 and M3 are all integers less than or equal to M, and the sum of M1, M2 and M3 is equal to M.

22. The method according to claim 18, wherein: In the first signal, the N unit low-level pulses satisfy at least one of the following: N1 of the unit low level pulses are located before the first pulse in the second signal; N2 said unit low level pulses are located after the last pulse in the second signal; N3 of the unit low level pulses are located in the second signal; Wherein, N1, N2 and N3 are all integers less than or equal to N, and the sum of N1, N2 and N3 is equal to N.

23. The method according to claim 18, wherein: Different characteristics of the second signal correspond to different information sequences, including at least one of the following: Different lengths of the second signal correspond to different information sequences; Different combination sequences of high-level pulses and low-level pulses in the second signal correspond to different information sequences; Different width combinations of high-level pulses and / or low-level pulses in the second signal correspond to different information sequences; Different widths of the high level pulse and / or the low level pulse in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between two consecutive high-level pulses in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between two consecutive low-level pulses in the second signal correspond to different values ​​of a bit in the information sequence; Different width ratios between a continuous high-level pulse and a continuous low-level pulse in the second signal correspond to different values ​​of a bit in the information sequence.

24. The method according to claim 18, wherein: The high level pulses and low level pulses in the second signal correspond to one or more modulation symbols with the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

25. The method of claim 16, wherein: The first signal is generated by adding P bits to the first bit sequence to obtain a second bit sequence; wherein the first bit sequence is generated based on the information sequence, and P is a positive integer.

26. The method according to claim 25, wherein: The first bit sequence is generated based on the information sequence through a preset encoding method or mapping method.

27. The method according to claim 25, wherein: The first signal is generated based on the second bit sequence through a preset waveform coding method or mapping method.

28. The method according to claim 25, wherein: In the second bit sequence, the P bits satisfy at least one of the following: P1 bits are located before the first bit sequence; P2 bits are located after the first bit sequence; P3 bits are located in the first bit sequence; Wherein, P1, P2 and P3 are all integers less than or equal to P, and the sum of P1, P2 and P3 is equal to P.

29. The method according to claim 25, wherein: Different characteristics of the first signal correspond to different second bit sequences, including at least one of the following: Different lengths of the first signal correspond to different second bit sequences; Different combination sequences of high-level pulses and low-level pulses in the first signal correspond to different second bit sequences; Different width combinations of high-level pulses and / or low-level pulses in the first signal correspond to different second bit sequences; Different widths of the high-level pulse and / or the low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between two consecutive high-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between two consecutive low-level pulses in the first signal correspond to different values ​​of a bit in the second bit sequence; Different width ratios between a continuous high-level pulse and a continuous low-level pulse in the first signal correspond to different values ​​of a bit in the second bit sequence.

30. The method of claim 16, wherein: The high level pulse and the low level pulse in the first signal correspond to one or more modulation symbols with the same length and different amplitude values. The different amplitudes of the modulation symbols or the presence or absence of data transmission of the modulation symbols respectively represent high level pulses and low level pulses.

31. A communication device, comprising: A memory and a processor; wherein the memory and the processor are coupled; the memory is used to store instructions executable by the processor; and when the processor executes the instructions, the method according to any one of claims 1 to 30 is performed.

32. A computer-readable storage medium, wherein: The computer-readable storage medium stores computer instructions, and when the computer instructions are executed on a communication device, the communication device is caused to perform the method according to any one of claims 1 to 30.

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