Methods of epitaxial growth of optimal thin-film thermoelectric periodic structures for improved device performance

Abstract

Disclosed herein are systems and methods of manufacturing thermoelectric thin film periodic materials, structures, and devices. In some embodiments, the thermoelectric thin film periodic structure can be grown on the (111) plane of a substrate. In some embodiments, the thermoelectric thin film periodic structure can include a hexagonal rhombohedral crystalline microstructure and a controlled hierarchically engineered superlattice structure disposed along a growth axis of a substrate having a long-range uniform periodicity. In some embodiments, the thermoelectric thin film periodic structure can be grown at a temperature ranging from about 300°C to about 450 °C. In some embodiments, the thermoelectric thin film periodic structure can be grown on a heavily doped portion of a substrate.

Description

METHODS OF EPITAXIAL GROWTH OF OPTIMAL THIN-FILM THERMOELECTRIC PERIODIC STRUCTURES FOR IMPROVED DEVICE PERFORMANCECROSS-REFERENCE TO RELATED APPLICATIONS

[0001] The present application claims priority to and filing benefit of U.S. Provisional Patent Application No. 63 / 599,436, filed on November 15, 2023, and U.S. Provisional Patent Application No. 63 / 599,441, filed on November 15, 2023, which are incorporated herein by reference in their entireties.STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH OR DEVELOPMENT

[0002] This invention was made with Government support under Contract No. 21-C-0088 awarded by the National Reconnaissance Office. The Government has certain rights in the invention.BACKGROUND

[0003] Thermoelectric devices for energy harvesting, refrigeration, and thermal management are becoming more and more a ubiquitous part of present day and future society. The ability to provide thermoelectric devices that are efficient, reliable, robust, and easily produced in a cost-effective way is necessary to maintain the growth within the computation, communications and power generation / energy efficiency sector.SUMMARY

[0004] There exists a need for high-capacity, robust, safe, efficient, and easily produced thermoelectric device systems as a means of thermal management and / or energy harvesting.

[0005] Some embodiments of the present disclosure include a thermoelectric thin film structure that can include a hexagonal rhombohedral microstructure and a controlled hierarchically engineered superlattice structure (CHESS) comprising a long-range uniform periodicity. In some embodiments, the thermoelectric thin film structure is epitaxially grown on a substrate having a three-fold crystalline symmetry. In someembodiments, the long-range uniform periodicity comprises a spacing for optimized phonon blocking and an optimized lattice thermal conductivity. In some embodiments, the long-range uniform periodicity comprises a plurality of periodic stacks having varied fdm periods. In some embodiments, the optimized lattice thermal conductivity comprises at least 0.015 W / cm-K at a temperature of about 300 K. In some embodiments, the long- range uniform periodicity comprises a thermoelectric figure of merit ranging from about 2 to about 3.

[0006] Some embodiments of the present disclosure also include a method of manufacturing a thermoelectric thin film structure that can include exposing a (111) plane of a substrate, growing, in at least a first growing operation for a thin film, the thermoelectric thin film structure on the exposed (111) plane of the substrate, and urging, by the growing of the thermoelectric thin film structure on the exposed (111) plane, a microstructure of the thermoelectric thin film structure into a hexagonal rhombohedral microstructure. In some embodiments, the growing can include a growth temperature ranging from 300 °C to 450 °C. In some embodiments, the method can further include a second growing operation for a thin film performed after the first growing operation. In some embodiments, the first growing operation provides a first thermoelectric thin film structure having a thickness ranging from about 1 micron to about 15 microns grown on the exposed (111) plane of the substrate, and a second growing operation for a thin film provides a second thermoelectric thin film structure having a thickness ranging from about 5 microns to about 35 microns grown on the first thermoelectric thin film structure. In some embodiments, the first growing operation and the second growing operation provide the thermoelectric thin film structure having a total thickness of up to about 50 microns. In some embodiments, the growing can include growing a periodic controlled hierarchically engineered superlattice structure within the thermoelectric thin film structure (e.g., growing a plurality of periodic structures). In some embodiments, the method can further include growing a first P-type thermoelectric thin film having a thickness ranging from about 0.1 to about 0.3 microns and having a carrier concentration level of at least IxlO19cm'3, growing a second P-type thin film on the first P-type film having a thickness ranging from about 1 micron to about 50 microns and having a carrier concentration level of at least 1x1018cm'3, and growing a third P-type thin film on the second P-type thin film having thickness ranging from about 0.1 to about 0.3 microns andhaving a carrier concentration level of at least 1x1019cm'3, wherein the first and third P- type thin films comprise a P+-type thin film providing a P+ / P / P+doped structure. In some embodiments, the method can further include growing a first N-type thermoelectric thin film having a thickness ranging from about 0.1 to about 0.3 microns and having a carrier concentration level of at least IxlO19cm'3, growing a second N-type thin film on the first N-type film having a thickness ranging from about 1 micron to about 50 microns and having a carrier concentration level of at least IxlO18cm'3, and growing a third N-type thin film on the second N-type thin film having thickness ranging from about 0.1 to about 0.3 microns and having a carrier concentration level of at least IxlO19cm'3, wherein the first and third N-type thin films comprise a N+-type thin film providing an N+ / N / N+doped structure. In some embodiments, the method can further include coupling the P+ / P / P+doped structure to the N+ / N / N+doped structure.

[0007] Some embodiments of the present disclosure also includes a periodic thermoelectric thin film device that can include a P-type thermoelectric structure grown on a (100) plane of a substrate, an N-type thermoelectric structure grown on a (111) plane of a substrate, wherein the N-type thermoelectric structure comprises a hexagonal rhombohedral crystalline microstructure, and a metal film configured to couple the P-type thermoelectric structure to the N-type thermoelectric structure. In some embodiments, the periodic thermoelectric thin film structure can include a thickness of up to about 50 microns. In some embodiments, the periodic thermoelectric thin film structure can include a periodic controlled hierarchically engineered superlattice structure within the thermoelectric thin film structure. In some embodiments, the periodic thermoelectric thin film structure can include a long-range uniform periodicity.

[0008] Covered embodiments are defined by the claims, not this summary. This summary is a high-level overview of various aspects of the embodiments and introduces some of the concepts that are further described in the Detailed Description section below. This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to be used in isolation to determine the scope of the claimed subject matter. The subject matter should be understood by reference to appropriate portions of the entire specification, any or all drawings, and each claim.BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The accompanying drawings are incorporated herein and form a part of the specification.

[0010] Fig. 1 is a graph showing X-ray diffraction (XRD) spectroscopy of thermoelectric thin film periodic structures according to some embodiments of the present disclosure.

[0011] FIGs. 2A and 2B illustrate device architectures according to some embodiments of the present disclosure.

[0012] FIG. 3 is a graph illustrating the XRD spectroscopy of thermoelectric thin film periodic structures having various thickness, according to some embodiments of the present disclosure.

[0013] FIGs. 4A, 4B, 5A, 5B, 6A, and 6B are graphs showing experimental data of devices fabricated according to embodiments of the present disclosure.

[0014] FIGs. 7A, 7B, 8A, 8B, 9A, and 9B are graphs showing experimental data of devices fabricated according to embodiments of the present disclosure.

[0015] Fig. 10 is a flowchart showing a method according to some embodiments of the present disclosure.

[0016] In the drawings, like reference numbers generally indicate identical or similar elements.DETAILED DESCRIPTION

[0017] As used herein, the meaning of “a,” “an,” and “the” includes singular and plural references unless the context clearly dictates otherwise.

[0018] All ranges disclosed herein are to be understood to encompass any and all endpoints as well as any and all subranges subsumed therein. For example, a stated range of “1 to 10” should be considered to include any and all subranges between (and inclusive of) the minimum value of 1 and the maximum value of 10; that is, all subranges beginning with a minimum value of 1 or more, e.g. 1 to 6.1 , and ending with a maximum value of 10 or less, e.g., 5.5 to 10.

[0019] The term “and / or” when used in a list of two or more items, means that any one of the listed items can be employed by itself or in combination with any one or more of the listed items. For example, the expression “A and / or B” is intended to mean either or both of A and B, i.e., A alone, B alone, or A and B in combination. The expression “A, B and / orC” is intended to mean A alone, B alone, C alone, A and B in combination, A and C in combination, B and C in combination or A, B, and C in combination.

[0020] As used herein, the meaning of “room temperature” can include a temperature of from about 15 °C to about 30 °C, for example about 15 °C, about 16 °C, about 17 °C, about 18 °C, about 19 °C, about 20 °C, about 21 °C, about 22 °C, about 23 °C, about 24 °C, about 25 °C, about 26 °C, about 27 °C, about 28 °C, about 29 °C, or about 30 °C.

[0021] Embodiments of the present disclosure can be directed to epitaxial growth of optimized thin fdm thermoelectric controlled hierarchically engineered superlattice structures (CHESS) for improved device performance. Improved device performance can be directed to energy harvesting, refrigeration, thermal management, power generation, cooling, or any thermoelectric application known to those of skill in the art.

[0022] In some embodiments, the thermoelectric thin fdm periodic structure can be grown on the (111) plane of a substrate. In some embodiments, the thermoelectric thin fdm periodic structure can include a hexagonal rhombohedral crystalline microstructure and a controlled hierarchically engineered superlattice structure disposed along a growth axis of a substrate having a long-range uniform periodicity.

[0023] In some embodiments, the thermoelectric thin fdm periodic structure can be grown at a temperature ranging from about 300 °C to about 450 °C.

[0024] In some embodiments, the active CHESS thermoelectric thin fdm periodic structure can be grown on a heavily doped layer on a substrate.

[0025] In some embodiments, described herein are nano-engineered thin fdm thermoelectric (NETT) materials and / or structures. In some embodiments, the NETT structures can be grown by metal-organic chemical vapor deposition (MOCVD). In some embodiments, the NETT structures can include the CHESS and can provide desired material properties, e.g., decreased lattice thermal conductivity, an improved figure of merit (ZT), and optimized phonon blocking.

[0026] In some embodiments, growing a thermoelectric on the (111) plane of a substrate, for example, a gallium arsenide (GaAs) substrate, can provide a microstructure having an improved stability, improved thermoelectric properties, and reduced defects. For example, a thermoelectric thin fdm periodic structure epitaxially grown on a (100) surface plane of a GaAs substrate can exhibit about a 4-degree misorientation. Not to be bound by theory, the (100) plane of a GaAs substrate can typically be used in the epitaxial growth of manycompound semiconductors that have a Face Centered Cubic (FCC) structure, with four- fold crystalline symmetry (e.g., tetrahedral silicon and / or silicon oxides). However, thermoelectric materials (e.g., Bi2Te3 thin fdms and Bi2Te2.40Seo.5 thin fdms) can have hexagonal-like rhombohedral structures that fail to optimally align with the four-fold crystalline symmetry of the (100) plane of the GaAs substrate.

[0027] In some embodiments, the hexagonal-like rhombohedral crystalline structure of thermoelectric materials grown on a three-fold crystalline symmetry of the (111) plane of a GaAs substrate can exhibit the improved stability, improved thermoelectric properties, and reduced defects. In some embodiments, such structural improvements are significant for N-type CHESS structures. For example, a 25 micron (pm) thick N-type film grown on the (111) plane of a GaAs substrate can show excellent CHESS periodicity, as indicated by X-ray diffraction spectroscopy.

[0028] Fig. 1 is a graph showing X-ray diffraction (XRD) spectroscopy of thermoelectric thin film periodic structures according to some embodiments of the present disclosure. The graph is a high resolution 2-theta (20) scan of the (0015) reflection of N-type thermoelectric thin film structures. For example, the XRD plot illustrates a vertical periodicity having an alternating Bi2Te3 thin film and a Bi2Te2.40Seo.5 thin film.

[0029] Figs. 2 A and 2B illustrate periodic thermoelectric thin film device architectures according to some embodiments of the present disclosure. In some embodiments, the periodic thermoelectric thin film device structures can include a long-range uniform periodicity that can have a spacing for optimized phonon blocking and an optimized lattice thermal conductivity. In some embodiments, the long-range uniform periodicity can include a plurality of periodic stacks having varied film periods. For example, illustrated in FIGs. 2A and 2B are the thermoelectric thin film periodic structure (e.g., CHESS). In some embodiments, the central peak 0 and each shoulder (e.g., ±1, ±2, ±3, and ±4 for the XRD spectrum of the thermoelectric thin film periodic structure having a period thickness of about 200 A, e.g., 206 A) represent an interface between the Bi2Te3 thin film and the Bi2Te2.40Seo.5 thin film, indicating the periodicity of the CHESS.

[0030] Returning to Fig. 1, in some embodiments the distinct peaks can indicate a uniform periodic CHESS structure. For example, growing the thermoelectric thin film periodic structures on the (111) plane of the GaAs substrate can provide thermoelectric thin film periodic structures having a clean crystalline structure, contributing to improved stability,improved thermoelectric properties including reduced lattice thermal conductivity and reduced defects. Thus, in some embodiments, growing the thermoelectric thin fdm periodic structure on the (111) plane of a GaAs substrate provides improved crystallinity than when the thermoelectric thin fdm periodic structure is grown on the (100) plane of a GaAs substrate.

[0031] As shown in FIG. 2A, the periodic thermoelectric thin fdm device structure having a period thickness of about 200 A 200 can include a period including a Bi2Te3 thin fdm and a Bi2Te3-xSexthin fdm, where x can range from about 0.15 to about 1. For example, the thermoelectric thin fdm periodic structure can include a first period 202 including a 1 nanometer (nm) thick Bi2Te3 thin fdm and a 1 nm thick Bi2Te2.6Seo.4 thin fdm, a second period 204 including a 1 nm thick Bi2Te3 thin fdm and a 2 nm thick Bi2Te2.6Seo.4thm fdm, a third period 206 including a 1 nm thick Bi2Te3 thin fdm and a 3 nm thick Bi2Te2.6Seo.4 thin fdm, a fourth period 208 including a 1 nm thick Bi2Te3 thin film and a 4 nm thick Bi2Te2.6Seo.4 thin fdm, and a fifth period 210 including a 1 nm thick Bi2Te3 thin fdm and a 5 nm thick Bi2Te2.6Seo.4 thin fdm, the total thickness of the structure can be about 20 nm (e.g., 200 A).

[0032] In some embodiments, a thermoelectric thin fdm periodic structure having a period thickness of about 300 A (e.g., 305 A in the example of FIG. 1) can also demonstrate the periodicity of the CHESS, including the 0 peak and shoulders ±1, ±2, ±3, ±4, ±5, and -6.

[0033] As shown in FIG. 2B, the periodic thermoelectric thin fdm device structure having a period thickness of about 300 A 220 can include a first period 222 including a 1 nm thick Bi2Te3 thin fdm and a 3 nm thick Bi2Te2.6Seo.4 thin fdm, a second period 224 including a 1 nm thick Bi2Te3 thin film and a 4 nm thick Bi2Te2.6Seo.4 thin film, a third period 226 including a 1 nm thick Bi2Te3 thin fdm and a 5 nm thick Bi2Te2.6Seo.4 thin fdm, a fourth period 228 including a 1 nm thick Bi2Te3 thin fdm and a 6 nm thick Bi2Te2.6Seo.4 thin fdm, and a fifth period 230 including a 1 nm thick Bi2Te3 thin fdm and a 7 nm thick Bi2Te2.6Seo.4 thin fdm, the total thickness of the thermoelectric thin fdm periodic structure can be up to about 50 nm (e.g., 500 A).

[0034] In some embodiments, the long-range uniform periodicity can include periods having varied thicknesses.

[0035] In some embodiments, growing thermoelectric thin fdm periodic structures having a distinct and robust CHESS periodicity can greatly contribute to decreasing and / oroptimizing the lattice thermal conductivity and increasing the figure of merit (ZT) up to about 3 (e.g., from about 2 to about 3). In some embodiments, the lattice thermal conductivity can be as low as (e.g., greater than or equal to or at least) 0.015 W / cm-K at a temperature of about 300 K.

[0036] FIG. 3 is a graph illustrating the XRD spectroscopy of thermoelectric thin film periodic structures having various thickness, according to some embodiments. For example, thermoelectric thin film periodic structures having thicknesses of 1.4 pm, 5.4 pm, 11 pm, and 24.7 pm were analyzed. As shown in FIG. 3, the periodicity of each thermoelectric thin film structure demonstrates distinct periodic interfaces. In some embodiments, the distinct peaks can indicate a uniform periodic structure, which can contribute to the improved stability, improved thermoelectric properties, and reduced defects. In some embodiments, additional thermoelectric materials, e.g., bismuth / antimony (Bi / Sb) superlattice films grown on the (111) plane of a GaAs substrate can transition to clean crystalline order earlier during the epitaxial growth than when grown on the (100) plane of a GaAs substrate.

[0037] In some embodiments, the thermoelectric thin film periodic structure having the 1.4 pm thickness can include seventy (70) vertically stacked 200 A periods, or about fifty (50) vertically stacked 300 A periods. Likewise, in some embodiments, the thermoelectric thin film periodic structure having the 5.4 pm thickness can include 270 vertically stacked 200 A periods, or about 180 vertically stacked 300 A periods. In some examples, the thermoelectric thin film periodic structure having the 11 pm thickness can include 550 vertically stacked 200 A periods, or about 367 vertically stacked 300 A periods. In some embodiments, the thermoelectric thin film periodic structure having the 24.7 pm thickness can include 1,235 vertically stacked 200 A periods, or about 823 vertically stacked 300 A periods.

[0038] In some embodiments, the larger period thickness (e.g., the about 300 A thick period) can further exhibit improved thermoelectric thin film periodic structure crystallinity by, for example, reducing the quantity of thin film interfaces within the thermoelectric thin film periodic structure.

[0039] In some embodiments, active device structures can comprise about 25 pm thick films having the improved crystallinity when the thermoelectric thin film periodic structure is epitaxially grown on the (111) plane of the GaAs substrate. In some embodiments,growing an N-type thermoelectric thin film periodic structure on the (111) plane of the GaAs substrate can improve device performance.

[0040] In some embodiments, thermoelectric devices having N-type thermoelectric thin film periodic structures (e.g., N-type CHESS) grown on the (111) plane of GaAs substrates demonstrate the improved device performance when compared to thermoelectric devices having N-type thermoelectric thin film periodic structures grown on the (100) plane of GaAs substrates.

[0041] Several device performance tests were performed on 1x3 NETT modules having four different architectures. For example, a 1x3 NETT module can include 3 P-N couples in a linear array (e.g., 1 linear device having 3 P-N couples).

[0042] FIGs. 4A, 4B, 5A, 5B, 6A, and 6B are graphs showing experimental data of devices fabricated according to embodiments of the present disclosure.

[0043] In some embodiments, three 1x3 NETT modules (referred to as “911,” “926,” and “927” in FIGs. 4A, 4B, 5A, 5B, 6A, and 6B) were fabricated with a P-type CHESS on the (100) plane of a GaAs substrate and an N-type CHESS on the (100) plane of a GaAs substrate. NETT modules 911, 926, and 927 each were fabricated having a different contact area, e.g., NETT module 911 was fabricated with a 167 pm2contact area, NETT module 926 was fabricated with a 140 pm2contact area, and NETT module 927 was fabricated with a 97 pm2contact area.

[0044] Additionally, according to some embodiments, a 1x3 NETT module (referred to as “930” in FIGs. 4A, 4B, 5A, 5B, 6A, and 6B) was fabricated having a P-type CHESS on the (100) plane of a GaAs substrate and an N-type CHESS on the (111) plane of a GaAs substrate.

[0045] NETT module 911 is represented by squares in FIGs. 4A, 4B, 5 A, 5B, 6A, and 6B. NETT module 926 is represented by circles in FIGs. 4A, 4B, 5A, 5B, 6A, and 6B. NETT module 927 is represented by triangles in FIGs. 4 A, 4B, 5 A, 5B, 6 A, and 6B. NETT module 930 is represented by diamonds in FIGs. 4A, 4B, 5A, 5B, 6A, and 6B.

[0046] Again, FIGs. 4A, 4B, 5A, 5B, 6A, and 6B are graphs showing experimental data of devices fabricated according to embodiments described herein.

[0047] FIG. 4A shows the nano-engineered thin film thermoelectric (NETT) module resistance as a function of the mean temperature between a cold-sink and a near room temperature heat source in degrees Kelvin (K).

[0048] FIG. 4B shows the NETT module internal temperature change percentage (AT) as a function of the mean temperature in K of each NETT device.

[0049] FIG. 5A shows the NETT module open circuit voltage (Voc) across each NETT module as a function of the external temperature change (AT) in K of each NETT device.

[0050] FIG. 5B shows the NETT module estimated total heat flow in milli Watts (mW) as a function of the external temperature change (AT) in K of each NETT device.

[0051] FIG. 6A shows the NETT module power (mW) as a function of the external temperature change (AT) in K of each NETT device.

[0052] FIG. 6B shows the NETT module estimated efficiency percentage (%) as a function of the external temperature change (AT) in K of each NETT device.

[0053] FIGs. 7A, 7B, 8A, 8B, 9A, and 9B are graphs showing experimental data of devices fabricated according to embodiments described herein. In some embodiments, FIGs. 7A, 7B, 8A, 8B, 9A, and 9B show NETT module test results that can demonstrate an effect of the improved material quality of N-type CHESS grown on the (111) plane of a GaAs substrate. For example, NETT devices fabricated with the N-type structures grown on the (111) plane of the GaAs substrates showed decreased thermal resistance, a lower change in internal temperature, increased heat flow, increased power, and an increased estimated efficiency.

[0054] FIG. 7A shows the nano-engineered thin film thermoelectric (NETT) module resistance as a function of the mean temperature between a cold-sink and a near room temperature heat source in degrees Kelvin (K).

[0055] FIG. 7B shows the NETT module internal temperature change percentage (AT) as a function of the mean temperature in K of each NETT device.

[0056] FIG. 8A shows the NETT module open circuit voltage (Voc) across each NETT module as a function of the external temperature change (AT) in K of each NETT device.

[0057] FIG. 8B shows the NETT module estimated total heat flow in milliWatts (mW) as a function of the external temperature change (AT) in K of each NETT device. In some embodiments, a very small amount of heat flow, e.g., from about 200 mW to about 250 mW can generate electric power, as shown below in FIG. 9A.

[0058] FIG. 9A shows the NETT module power (mW) as a function of the external temperature change (AT) in K of each NETT device. In some embodiments, the very small amount of heat can be used to generate about 10 mW to about 20 mW of electric power.Additionally, in some embodiments, the estimated conversion efficiencies can be about 8 % for temperature differentials as small as 100 K, as shown in FIG. 9B.

[0059] FIG. 9B shows the NETT module estimated efficiency percentage (%) as a function of the external temperature change (AT) in K of each NETT device.

[0060] Fig. 10 is a flowchart showing a method 1000 according to some embodiments of the present disclosure. In some embodiments, method 1000 can provide a thermoelectric thin film periodic structure. Method 1000 can include: exposing a (111) plane of a substrate; growing, in at least a first growing operation for a thin film, the thermoelectric thin film structure on the exposed (111) plane of the substrate; and urging, by the growing of the thermoelectric thin film structure on the exposed (111) plane, a microstructure of the thermoelectric thin film structure into a hexagonal rhombohedral microstructure.

[0061] It is to be appreciated that not all operations need be performed or performed in the order shown. In one example, the operations shown relate to FIGs. 1, 2A, 2B, and 3.

[0062] In some embodiments, operation 1002 can expose the (111) plane of a substrate, for example a GaAs substrate, by any technique known to those of skill in the art. For example, the exposing can be performed by an etching procedure (e.g., a dry etch or a wet etch), a cutting procedure (e.g., using a microtome, a laser, or the like), a fracture operation, or any combination thereof.

[0063] In some embodiments, operation 1004 can grow, in at least a first growing operation for a thin film, the thermoelectric thin film structure on the exposed (111) plane of the substrate. For example, the growing operation for a thin film can be an epitaxial growing operation, a chemical vapor deposition operation, a physical vapor deposition operation, a plasma enhanced chemical vapor deposition, a metal-organic chemical vapor deposition, any combination thereof, or any growth / deposition technique known to those of skill in the art.

[0064] In some embodiments, operation 1004 can grow a first P-type thermoelectric thin film having a thickness ranging from about 0.1 to about 0.3 microns and having a carrier concentration level of at least IxlO19cm'3. In some embodiments, operation 1004 can grow a second P-type thin film on the first P-type film having a thickness ranging from about 1 micron to about 50 microns and having a carrier concentration level of at least 1x1018cm' 3. In some embodiments, operation 1004 can grow a third P-type thin film on the second P- type thin film having thickness ranging from about 0.1 to about 0.3 microns and having acarrier concentration level of at least IxlO19cm'3. In some embodiments, the first and third P-type thin films comprise a P+-type thin film providing a P+ / P / P+ doped structure.

[0065] In some embodiments, operation 1004 can grow a first N-type thermoelectric thin film having a thickness ranging from about 0.1 to about 0.3 microns and having a carrier concentration level of at least IxlO19cm'3. In some embodiments, operation 1004 can grow a second N-type thin film on the first N-type film having a thickness ranging from about 1 micron to about 50 microns and having a carrier concentration level of at least IxlO18cm' 3. In some embodiments, operation 1004 can grow a third N-type thin film on the second N-type thin film having thickness ranging from about 0.1 to about 0.3 microns and having a carrier concentration level of at least IxlO19cm'3. In some embodiments, the first and third N-type thin films comprise a N+-type thin film providing a N+ / N / N+ doped structure. In some embodiments, the P+ / P / P+doped structure can be coupled to the N+ / N / N+doped structure to provide a heavily doped thermoelectric thin film periodic structure.

[0066] In some embodiments, operation 1006 can urge, by the growing operation 1004, a microstructure of the thermoelectric thin film structure into a hexagonal rhombohedral microstructure. In some embodiments, the exposed (111) plane of the GaAs substrate provides a three-fold crystalline symmetry that can be amenable to the hexagonal rhombohedral crystalline microstructure forming during the growing operation 1004.

[0067] In some embodiments, the growing operation 1004 can be performed at a growth temperature ranging from about 300 °C to about 450 °C (e.g., from about 310 °C to about 450 °C, from about 300 °C to about 440 °C, from about 325 °C to about 425 °C, from about 350 °C to about 450 °C, or from about 385 °C to about 415 °C).

[0068] In some embodiments, method 1000 can further include a second growing operation for a thin film performed after the first growing operation. For example, the growing operation 1004 can be a two-step growing operation providing a thermoelectric thin film structure ranging from about 1 pm to about 25 pm grown on the exposed (111) plane of the substrate followed by a second growing operation providing a thermoelectric thin film structure ranging from about 5 pm to about 25 pm grown on the first thermoelectric thin film structure (e.g., the first thin film having a thickness of up to 25 pm). In some embodiments, the first growing operation and the second growing operation can provide the thermoelectric thin film structure having a total thickness of up to 50 pm.

[0069] In some embodiments, the growing operation 1004 can be used to provide a periodic controlled hierarchically engineered superlattice structure (CHESS) within the thermoelectric thin film structure. In some embodiments, the periodic CHESS can include a plurality of periodic structures. For example, the plurality of periodic structures can be vertically stacked to provide a CHESS structure having a thickness amenable to thermoelectric device function (e.g., up to about 25 pm).

[0070] As noted earlier, in some embodiments, each period in the vertically stacked periodic structures can have a controllably grown thickness ranging from about 200 A to about 300 A (FIGs. 2A and 2B).

[0071] In one aspect, operations 1002, 1004, and 1006 can be performed in a series of any combination, concomitantly, in any order, or in repetition.

[0072] It is to be appreciated that the Detailed Description section, and not any other section, is intended to be used to interpret the claims. Other sections can set forth one or more but not all exemplary embodiments as contemplated by the inventor(s), and thus, are not intended to limit this disclosure or the appended claims in any way.

[0073] While this disclosure describes exemplary embodiments for exemplary fields and applications, it should be understood that the disclosure is not limited thereto. Other embodiments and modifications thereto are possible, and are within the scope and spirit of this disclosure. For example, and without limiting the generality of this paragraph, embodiments are not limited to the software, hardware, firmware, and / or entities illustrated in the figures and / or described herein. Further, embodiments (whether or not explicitly described herein) have significant utility to fields and applications beyond the examples described herein.

[0074] Embodiments have been described herein with the aid of functional building blocks illustrating the implementation of specified functions and relationships thereof. The boundaries of these functional building blocks have been arbitrarily defined herein for the convenience of the description. Alternate boundaries can be defined as long as the specified functions and relationships (or equivalents thereof) are appropriately performed. Also, alternative embodiments can perform functional blocks, steps, operations, methods, etc. using orderings different than those described herein.

[0075] References herein to “one embodiment,” “an embodiment,” “an example embodiment,” or similar phrases, indicate that the embodiment described can include aparticular feature, structure, or characteristic, but every embodiment can not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it would be within the knowledge of persons skilled in the relevant art(s) to incorporate such feature, structure, or characteristic into other embodiments whether or not explicitly mentioned or described herein. Additionally, some embodiments can be described using the expression “coupled” and “connected” along with their derivatives. These terms are not necessarily intended as synonyms for each other. For example, some embodiments can be described using the terms “connected” and / or “coupled” to indicate that two or more elements are in direct physical or electrical contact with each other. The term “coupled,” however, can also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other.

[0076] The breadth and scope of this disclosure should not be limited by any of the abovedescribed exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

CLAIMSWhat is claimed is:

1. A thermoelectric thin film structure, comprising: a hexagonal rhombohedral crystalline microstructure; and a controlled hierarchically engineered superlattice structure disposed along a growth axis of a substrate having a long-range uniform periodicity.

2. The thermoelectric thin film structure of claim 1, wherein the thermoelectric thin film structure is epitaxially grown on a substrate having a three-fold crystalline symmetry.

3. The thermoelectric thin film structure of claim 1, wherein the long-range uniform periodicity comprises a spacing for optimized phonon blocking and an optimized lattice thermal conductivity.

4. The thermoelectric thin film structure of claim 3, wherein the long-range uniform periodicity comprises a plurality of periodic stacks having varied film periods.

5. The thermoelectric thin film structure of claim 3, wherein the optimized lattice thermal conductivity comprises at least 0.015 W / cm K at a temperature of about 300 K.

6. The thermoelectric thin film structure of claim 1, wherein the long-range uniform periodicity comprises a thermoelectric figure of merit ranging from about 2 to about 3.

7. A method of manufacturing a thermoelectric thin film structure, comprising: exposing a (111) plane of a substrate; growing, in at least a first growing operation for a thin film, the thermoelectric thin film structure on the exposed (111) plane of the substrate; and urging, by the growing of the thermoelectric thin film structure on the exposed (111) plane, a microstructure of the thermoelectric thin film structure into a hexagonal rhombohedral microstructure.

8. The method of claim 7, wherein the growing comprises a growth temperature ranging from 300 °C to 450 °C.

9. The method of claim 7, further comprising a second growing operation for a thin film performed after the first growing operation.

10. The method of claim 9, wherein: the first growing operation provides a first thermoelectric thin film structure having a thickness ranging from about 1 micron to about 15 microns grown on the exposed (111) plane of the substrate, and a second growing operation for a thin film provides a second thermoelectric thin film structure having a thickness ranging from about 5 microns to about 35 microns grown on the first thermoelectric thin film structure.

11. The method of claim 10, wherein the first growing operation and the second growing operation provide the thermoelectric thin film structure having a total thickness of up to about 50 microns.

12. The method of claim 7, further comprising growing a periodic controlled hierarchically engineered superlattice structure within the thermoelectric thin film structure.

13. The method of claim 12, wherein the growing the periodic controlled hierarchically engineered superlattice structure comprises growing a plurality of periodic structures.

14. The method of claim 7, further comprising: growing a first P-type thermoelectric thin film having a thickness ranging from about 0.1 to about 0.3 microns and having a carrier concentration level of at least IxlO19cm'3; growing a second P-type thin film on the first P-type film having a thickness ranging from about 1 micron to about 50 microns and having a carrier concentration level of at least IxlO18cm'3; and growing a third P-type thin film on the second P-type thin film having thickness ranging from about 0.1 to about 0.3 microns and having a carrier concentration level of at least IxlO19cm'3,wherein the first and third P-type thin films comprise a P+-type thin film providing a P+ / P / P+doped structure.

15. The method of claim 14, further comprising: growing a first N-type thermoelectric thin film having a thickness ranging from about 0.1 to about 0.3 microns and having a carrier concentration level of at least IxlO19cm'3; growing a second N-type thin film on the first N-type film having a thickness ranging from about 1 micron to about 50 microns and having a carrier concentration level of at least IxlO18cm'3; and growing a third N-type thin film on the second N-type thin film having thickness ranging from about 0.1 to about 0.3 microns and having a carrier concentration level of at least IxlO19cm'3, wherein the first and third N-type thin films comprise a N+-type thin film providing an N+ / N / N+doped structure.

16. The method of claim 15, wherein further comprising coupling the P+ / P / P+doped structure to the N+ / N / N+doped structure.

17. A periodic thermoelectric thin film device, comprising; a P-type thermoelectric structure grown on a (100) plane of a substrate; an N-type thermoelectric structure grown on a (111) plane of a substrate, wherein the N-type thermoelectric structure comprises a hexagonal rhombohedral crystalline microstructure; and a metal film configured to couple the P-type thermoelectric structure to the N-type thermoelectric structure.

18. The periodic thermoelectric thin film device of claim 17, comprising a thickness of up to about 50 microns.

19. The periodic thermoelectric thin film device of claim 17, comprising a periodic controlled hierarchically engineered superlattice structure within the thermoelectric thin film structure.

20. The periodic thermoelectric thin film device of claim 17, comprising a long-range uniform periodicity.

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