Method to extract codec-agnostic mesh data in basemesh bitstream

Abstract

Some embodiments of a method may include: obtaining a visual volumetric video coding (V3C) bitstream, wherein the V3C bitstream comprises one or more raw byte payload (RBSP) bits, and wherein the RBSP bits comprise one or more stop bits; determining a location of a start of the one or more stop bits within the RBSP bits; determining a codec used to encode the RBSP bits based on the determined location; and decoding the RBSP bits using the determined codec.

Description

METHOD TO EXTRACT CODEC-AGNOSTIC MESH DATA IN BASEMESH BITSTREAMCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] The present application claims benefit of European Patent Application No. EP23307035, entitled "METHOD TO EXTRACT CODEC-AGNOSTIC MESH DATA IN BASEMESH BITSTREAM” and filed November 22, 2023, which is hereby incorporated by reference in its entirety.BACKGROUND

[0002] Visual volumetric video-based coding (V3C) is described in ISO / IEC 23090-5:2021 , Information technology — Coded representation of immersive media — Part 5: Visual volumetric video-based coding (V3C) and video-based point cloud compression (V-PCC). Video-based dynamic mesh coding (V-DMC) is a framework for compressing dynamic meshes that is being developed by extending V3C. The V-DMC framework may involve different attributes specified for a dynamic mesh sequence. In V-DMC, the underlying static mesh codec may decode mesh attributes per face or per vertex. These attributes may provide additional information about the static mesh e.g., color, texture coordinates, normals, reflectance information, transparency information, and / or user-defined attributes.

[0003] For V-DMC, a framework is developed by extending V3C. V3C is described at ISO / IEC 23090- 5:2021 , Information technology — Coded representation of immersive media — Part 5: Visual volumetric video-based coding (V3C) and video-based point cloud compression (V-PCC).SUMMARY

[0004] A first example method in accordance with some embodiments may include: obtaining a visual volumetric video coding (V3C) bitstream, wherein the V3C bitstream includes one or more raw byte payload (RBSP) bits, and wherein the RBSP bits include one or more stop bits; determining a location of a start of the one or more stop bits within the RBSP bits; determining a codec used to encode the RBSP bits based on the determined location; and decoding the RBSP bits using the determined codec.

[0005] Some embodiments of the first example method may further include determining a size of the RBSP bits, wherein determining the codec is further based on the determined size of the RBSP bits.

[0006] In some embodiments of the first example method, determining the size of the RBSP bits includes: obtaining a Network Abstraction Layer (NAL) unit size; obtaining a submesh header size; determining a quantity of the one or more stop bits; and subtracting the submesh header size and the quantity of the one or more stop bits from the NAL unit size to obtain the size of the RBSP bits.

[0007] In some embodiments of the first example method, obtaining the NAL unit size includes: obtaining a submesh type corresponding to the bitstream; and using the submesh type to determine the NAL unit size.

[0008] Some embodiments of the first example method may further include extracting a string of one or more data bits from the RBSP bits, wherein decoding the RBSP bits is further based on the extracted string of one or more data bits.

[0009] In some embodiments of the first example method, determining the codec is further based on the extracted string of one or more data bits.

[0010] Some embodiments of the first example method may further include: extracting the RBSP bits from the V3C bitstream; and removing the one or more stop bits from the RBSP bits.

[0011] In some embodiments of the first example method, the codec is selected from the group consisting of an intra mesh codec and an inter mesh codec.

[0012] Some embodiments of the first example method may further include: extracting one or more header bits from the V3C bitstream; and determining the codec based on the extracted one or more header bits.

[0013] In some embodiments of the first example method, determining the location of the start of the one or more stop bits within the RBSP bits includes: determining a location of a last bit equal to one within the RBSP bits ; and setting the location of the start of the one or more stop bits to be equal to the determined location of the last bit equal to one.

[0014] In some embodiments of the first example method, determining the location of the last bit equal to one within the V3C bitstream includes searching within the RBSP bits for the last bit equal to one within the RBSP bits .

[0015] A first example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0016] A second example method in accordance with some embodiments may include: obtaining a visual volumetric video coding (V3C) bitstream, wherein the V3C bitstream includes one or more raw byte payload (RBSP) bits, and wherein the RBSP bits include one or more stop bits; determining a size of the RBSP bits;determining a codec used to encode the RBSP bits based on the determined size of the RBSP bits; and decoding the RBSP bits using the determined codec.

[0017] In some embodiments of the second example method, determining the size of the RBSP bits includes: obtaining an NAL unit size; obtaining a submesh header size; determining a quantity of the one or more stop bits; and subtracting the submesh header size and the quantity of the one or more stop bits from the NAL unit size to obtain the size of the RBSP bits.

[0018] In some embodiments of the second example method, obtaining the NAL unit size includes: obtaining a submesh type corresponding to the bitstream; and using the submesh type to determine the NAL unit size.

[0019] Some embodiments of the second example method may further include extracting a string of one or more data bits from the RBSP bits, wherein decoding the RBSP bits is further based on the extracted string of one or more data bits.

[0020] In some embodiments of the second example method, determining the codec is further based on the extracted string of one or more data bits.

[0021] Some embodiments of the second example method may further include: extracting the RBSP bits from the V3C bitstream; and removing the one or more stop bits from the RBSP bits.

[0022] In some embodiments of the second example method, the codec is selected from the group consisting of an intra mesh codec and an inter mesh codec.

[0023] Some embodiments of the second example method may further include: extracting one or more header bits from the V3C bitstream; and determining the codec based on the extracted one or more header bits.

[0024] Some embodiments of the second example method may further include determining a location of the start of the one or more stop bits within the RBSP bits, wherein determining the location of the start of the one or more stop bits within the RBSP bits includes: determining a location of a last bit equal to one within the RBSP bits; and setting the location of the start of the one or more stop bits to be equal to the determined location of the last bit equal to one.

[0025] In some embodiments of the second example method, determining the location of the last bit equal to one within the RBSP bits includes searching within the RBSP bits for the last bit equal to one within the bitstream.

[0026] A second example apparatus in accordance with some embodiments may include: a processor; and non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0027] A third example method in accordance with some embodiments may include: obtaining a bitstream, wherein the bitstream includes one or more payload bits, and wherein the payload bits include one or more stop bits; determining a location of a first bit of the one or more stop bits; determining a size of the payload bits based on the location of the first bit of the one or more stop bits; determining a codec used to encode the payload bits based on the determined size of the payload bits; and decoding the payload bits using the determined codec.

[0028] A third example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0029] A fourth example method in accordance with some embodiments may include: obtaining a bitstream, wherein the bitstream includes one or more payload bits, and wherein the payload bits include one or more stop bits; determining a location of a first bit of the one or more stop bits; determining a codec used to encode the payload bits based on the determined location; and decoding the payload bits using the determined codec.

[0030] A fifth example method in accordance with some embodiments may include extracting a coded mesh payload from a basemesh bitstream, the coded mesh payload having been encoded into the basemesh bitstream using a codec, wherein the extraction of the coded mesh payload operates independently of the codec used to encode the coded mesh payload.

[0031] A fifth example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0032] A sixth example method in accordance with some embodiments may include: obtaining a codec to be used to encode one or more raw byte payload (RBSP) bits; obtaining a location of a start of the one or more stop bits within the RBSP bits; and encoding a visual volumetric video coding (V3C) bitstream using the obtained codec and the obtained location, wherein the V3C bitstream includes the one or more raw byte payload (RBSP) bits, and wherein the RBSP bits include one or more stop bits.

[0033] A sixth example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0034] A seventh example apparatus in accordance with some embodiments may include at least one processor configured to perform any one of the methods listed above.

[0035] An eighth example apparatus in accordance with some embodiments may include a computer- readable medium storing instructions for causing one or more processors to perform any one of the methods listed above.

[0036] A ninth example apparatus in accordance with some embodiments may include at least one processor and at least one non-transitory computer-readable medium storing instructions for causing the at least one processor to perform any one of the methods listed above.

[0037] An example signal in accordance with some embodiments may include a bitstream obtained according to any one of the methods listed above.

[0038] An example method of encoding a bitstream in accordance with some embodiments according to any one of the methods listed above.

[0039] In additional embodiments, encoder and decoder apparatus are provided to perform the methods described herein. An encoder or decoder apparatus may include a processor configured to perform the methods described herein. The apparatus may include a computer-readable medium (e.g. a non-transitory medium) storing instructions for performing the methods described herein. In some embodiments, a computer-readable medium (e.g. a non-transitory medium) stores a video encoded using any of the methods described herein.

[0040] One or more of the present embodiments also provide a computer readable storage medium having stored thereon instructions for performing bi-directional optical flow, encoding or decoding video data according to any of the methods described above. The present embodiments also provide a computer readable storage medium having stored thereon a bitstream generated according to the methods described above. The present embodiments also provide a method and apparatus for transmitting the bitstream generated according to the methods described above. The present embodiments also provide a computer program product including instructions for performing any of the methods described.BRIEF DESCRIPTION OF THE DRAWINGS

[0041] FIG. 1A is a system diagram illustrating an example communications system according to some embodiments.

[0042] FIG. 1 B is a system diagram illustrating an example wireless transmit / receive unit (WTRU) that may be used within the communications system illustrated in FIG. 1A according to some embodiments.

[0043] FIG. 1C is a system diagram illustrating an example set of interfaces for a system according to some embodiments.

[0044] FIG. 2A is a functional block diagram of block-based video encoder, such as an encoder used for Versatile Video Coding (VVC), according to some embodiments.

[0045] FIG. 2B is a functional block diagram of a block-based video decoder, such as a decoder used for VVC, according to some embodiments.

[0046] FIG. 3 is a system diagram illustrating an example hierarchical structure for a V-DMC bitstream.

[0047] FIG. 4 is a functional block diagram of an MPEG V-DMC dynamic mesh encoder according to some embodiments.

[0048] FIG. 5 is a functional block diagram of a mesh decoder according to some embodiments.

[0049] FIG. 6 is a functional block diagram of an example decoder according to some embodiments.

[0050] FIG. 7 is a schematic illustration showing an example portion of an example bitstream according to some embodiments.

[0051] FIG. 8 is a flowchart illustrating an example process for decoding a bitstream according to some embodiments.

[0052] FIG. 9 is a flowchart illustrating an example process for decoding a bitstream according to some embodiments.

[0053] The entities, connections, arrangements, and the like that are depicted in— and described in connection with— the various figures are presented by way of example and not by way of limitation. As such, any and all statements or other indications as to what a particular figure "depicts,” what a particular element or entity in a particular figure "is” or "has,” and any and all similar statements— that may in isolation and out of context be read as absolute and therefore limiting— may only properly be read as being constructively preceded by a clause such as "In at least one embodiment, ... " For brevity and clarity of presentation, this implied leading clause is not repeated ad nauseum in the detailed description.DETAILED DESCRIPTION

[0054] FIG. 1A is a diagram illustrating an example communications system 100 in which one or more disclosed embodiments may be implemented. The communications system 100 may be a multiple access system that provides content, such as voice, data, video, messaging, broadcast, etc., to multiple wireless users. The communications system 100 may enable multiple wireless users to access such content through the sharing of system resources, including wireless bandwidth. For example, the communications systems 100 may employ one or more channel access methods, such as code division multiple access (CDMA), time division multiple access (TDMA), frequency division multiple access (FDMA), orthogonal FDMA (OFDMA), single-carrier FDMA (SC-FDMA), zero-tail unique-word DFT-Spread OFDM (ZT UW DTS-s OFDM), unique word OFDM (UW-OFDM), resource block-filtered OFDM, filter bank multicarrier (FBMC), and the like.

[0055] As shown in FIG. 1A, the communications system 100 may include wireless transmit / receive units (WTRUs) 102a, 102b, 102c, 102d, a RAN 104 / 113, a ON 106, a public switched telephone network (PSTN) 108, the Internet 110, and other networks 112, though it will be appreciated that the disclosed embodiments contemplate any number of WTRUs, base stations, networks, and / or network elements. Each of the WTRUs 102a, 102b, 102c, 102d may be any type of device configured to operate and / or communicate in a wireless environment. By way of example, the WTRUs 102a, 102b, 102c, 102d, any of which may be referred to as a "station” and / or a "STA”, may be configured to transmit and / or receive wireless signals and may include a user equipment (UE), a mobile station, a fixed or mobile subscriber unit, a subscription-based unit, a pager, a cellular telephone, a personal digital assistant (PDA), a smartphone, a laptop, a netbook, a personal computer, a wireless sensor, a hotspot or Mi-Fi device, an Internet of Things (loT) device, a watch or other wearable, a head-mounted display (HMD), a vehicle, a drone, a medical device and applications (e.g., remote surgery), an industrial device and applications (e.g., a robot and / or other wireless devices operating in an industrial and / or an automated processing chain contexts), a consumer electronics device, a device operating on commercial and / or industrial wireless networks, and the like. Any of the WTRUs 102a, 102b, 102c and 102d may be interchangeably referred to as a UE.

[0056] The communications systems 100 may also include a base station 114a and / or a base station 114b. Each of the base stations 114a, 114b may be any type of device configured to wirelessly interface with at least one of the WTRUs 102a, 102b, 102c, 102d to facilitate access to one or more communication networks, such as the CN 106, the Internet 110, and / or the other networks 112. By way of example, the base stations 114a, 114b may be a base transceiver station (BTS), a Node-B, an eNode B, a Home Node B, a Home eNode B, a gNB, a NR NodeB, a site controller, an access point (AP), a wireless router, and the like. While the base stations 114a, 114b are each depicted as a single element, it will be appreciated that the base stations 114a, 114b may include any number of interconnected base stations and / or network elements.

[0057] The base station 114a may be part of the RAN 104 / 113, which may also include other base stations and / or network elements (not shown), such as a base station controller (BSC), a radio network controller (RNC), relay nodes, etc. The base station 114a and / or the base station 114b may be configured to transmit and / or receive wireless signals on one or more carrier frequencies, which may be referred to as a cell (not shown). These frequencies may be in licensed spectrum, unlicensed spectrum, or a combination of licensed and unlicensed spectrum. A cell may provide coverage for a wireless service to a specific geographical area that may be relatively fixed or that may change over time. The cell may further be divided into cell sectors. For example, the cell associated with the base station 114a may be divided into three sectors. Thus, in one embodiment, the base station 114a may include three transceivers, i.e., one for each sector of the cell. In an embodiment, the base station 114a may employ multiple-input multiple output (MIMO) technology and may utilize multiple transceivers for each sector of the cell. For example, beamforming may be used to transmit and / or receive signals in desired spatial directions.

[0058] The base stations 114a, 114b may communicate with one or more of the WTRUs 102a, 102b, 102c, 102d over an air interface 116, which may be any suitable wireless communication link (e.g., radio frequency (RF), microwave, centimeter wave, micrometer wave, infrared (IR), ultraviolet (UV), visible light, etc.). The air interface 116 may be established using any suitable radio access technology (RAT).

[0059] More specifically, as noted above, the communications system 100 may be a multiple access system and may employ one or more channel access schemes, such as CDMA, TDMA, FDMA, OFDMA, SC-FDMA, and the like. For example, the base station 114a in the RAN 104 / 113 and the WTRUs 102a, 102b, 102c may implement a radio technology such as Universal Mobile Telecommunications System (UMTS) Terrestrial Radio Access (UTRA), which may establish the air interface 116 using wideband CDMA (WCDMA). WCDMA may include communication protocols such as High-Speed Packet Access (HSPA) and / or Evolved HSPA (HSPA+). HSPA may include High-Speed Downlink (DL) Packet Access (HSDPA) and / or High-Speed UL Packet Access (HSUPA).

[0060] In an embodiment, the base station 114a and the WTRUs 102a, 102b, 102c may implement a radio technology such as Evolved UMTS Terrestrial Radio Access (E-UTRA), which may establish the air interface 116 using Long Term Evolution (LTE) and / or LTE-Advanced (LTE-A) and / or LTE-Advanced Pro (LTE-A Pro).

[0061] In an embodiment, the base station 114a and the WTRUs 102a, 102b, 102c may implement a radio technology such as NR Radio Access , which may establish the air interface 116 using New Radio (NR).

[0062] In an embodiment, the base station 114a and the WTRUs 102a, 102b, 102c may implement multiple radio access technologies. For example, the base station 114a and the WTRUs 102a, 102b, 102c may implement LTE radio access and NR radio access together, for instance using dual connectivity (DC) principles. Thus, the air interface utilized by WTRUs 102a, 102b, 102c may be characterized by multiple types of radio access technologies and / or transmissions sent to / from multiple types of base stations (e.g., a eNB and a gNB).

[0063] In other embodiments, the base station 114a and the WTRUs 102a, 102b, 102c may implement radio technologies such as IEEE 802.11 (i.e., Wireless Fidelity (WiFi), IEEE 802.16 (i.e., Worldwide Interoperability for Microwave Access (WiMAX)), CDMA2000, CDMA2000 1X, CDMA2000 EV-DO, Interim Standard 2000 (IS-2000), Interim Standard 95 (IS-95), Interim Standard 856 (IS-856), Global System for Mobile communications (GSM), Enhanced Data rates for GSM Evolution (EDGE), GSM EDGE (GERAN), and the like.

[0064] The base station 114b in FIG. 1A may be a wireless router, Home Node B, Home eNode B, or access point, for example, and may utilize any suitable RAT for facilitating wireless connectivity in a localized area, such as a place of business, a home, a vehicle, a campus, an industrial facility, an air corridor (e.g., for use by drones), a roadway, and the like. In one embodiment, the base station 114b and the WTRUs 102c, 102d may implement a radio technology such as IEEE 802.11 to establish a wireless local area network (WLAN). In an embodiment, the base station 114b and the WTRUs 102c, 102d may implement a radio technology such as IEEE 802.15 to establish a wireless personal area network (WPAN). In yet another embodiment, the base station 114b and the WTRUs 102c, 102d may utilize a cellular-based RAT (e.g., WCDMA, CDMA2000, GSM, LTE, LTE-A, LTE-A Pro, NR etc.) to establish a picocell or femtocell. As shown in FIG. 1A, the base station 114b may have a direct connection to the Internet 110. Thus, the base station 114b may not be required to access the Internet 110 via the CN 106.

[0065] The RAN 104 / 113 may be in communication with the CN 106, which may be any type of network configured to provide voice, data, applications, and / or voice over internet protocol (VoIP) services to one or more of the WTRUs 102a, 102b, 102c, 102d. The data may have varying quality of service (QoS) requirements, such as differing throughput requirements, latency requirements, error tolerance requirements, reliability requirements, data throughput requirements, mobility requirements, and the like. The CN 106 may provide call control, billing services, mobile location-based services, pre-paid calling, Internet connectivity, video distribution, etc., and / or perform high-level security functions, such as user authentication. Although not shown in FIG. 1A, it will be appreciated that the RAN 104 / 113 and / or the CN 106 may be in direct or indirect communication with other RANs that employ the same RAT as the RAN 104 / 113 or a different RAT.For example, in addition to being connected to the RAN 104 / 113, which may be utilizing a NR radio technology, the CN 106 may also be in communication with another RAN (not shown) employing a GSM, UMTS, CDMA 2000, WiMAX, E-UTRA, or WiFi radio technology.

[0066] The CN 106 may also serve as a gateway for the WTRUs 102a, 102b, 102c, 102d to access the PSTN 108, the Internet 110, and / or the other networks 112. The PSTN 108 may include circuit-switched telephone networks that provide plain old telephone service (POTS). The Internet 110 may include a global system of interconnected computer networks and devices that use common communication protocols, such as the transmission control protocol (TCP), user datagram protocol (UDP) and / or the internet protocol (IP) in the TCP / IP internet protocol suite. The networks 112 may include wired and / or wireless communications networks owned and / or operated by other service providers. For example, the networks 112 may include another CN connected to one or more RANs, which may employ the same RAT as the RAN 104 / 113 or a different RAT.

[0067] Some or all of the WTRUs 102a, 102b, 102c, 102d in the communications system 100 may include multi-mode capabilities (e.g., the WTRUs 102a, 102b, 102c, 102d may include multiple transceivers for communicating with different wireless networks over different wireless links). For example, the WTRU 102c shown in FIG. 1A may be configured to communicate with the base station 114a, which may employ a cellular-based radio technology, and with the base station 114b, which may employ an IEEE 802 radio technology.

[0068] FIG. 1 B is a system diagram illustrating an example WTRU 102. As shown in FIG. 1 B, the WTRU 102 may include a processor 118, a transceiver 120, a transmit / receive element 122, a speaker / microphone 124, a keypad 126, a display / touchpad 128, non-removable memory 130, removable memory 132, a power source 134, a global positioning system (GPS) chipset 136, and / or other peripherals 138, among others. It will be appreciated that the WTRU 102 may include any sub-combination of the foregoing elements while remaining consistent with an embodiment.

[0069] The processor 118 may be a general purpose processor, a special purpose processor, a conventional processor, a digital signal processor (DSP), a plurality of microprocessors, one or more microprocessors in association with a DSP core, a controller, a microcontroller, Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) circuits, any other type of integrated circuit (IC), a state machine, and the like. The processor 118 may perform signal coding, data processing, power control, input / output processing, and / or any other functionality that enables the WTRU 102 to operate in a wireless environment. The processor 118 may be coupled to the transceiver 120, which may be coupled to the transmit / receive element 122. While FIG. 1 B depicts the processor 118 and the transceiver 120 asseparate components, it will be appreciated that the processor 118 and the transceiver 120 may be integrated together in an electronic package or chip.

[0070] The transmit / receive element 122 may be configured to transmit signals to, or receive signals from, a base station (e.g., the base station 114a) over the air interface 116. For example, in one embodiment, the transmit / receive element 122 may be an antenna configured to transmit and / or receive RF signals. In an embodiment, the transmit / receive element 122 may be an emitter / detector configured to transmit and / or receive IR, UV, or visible light signals, for example. In yet another embodiment, the transmit / receive element 122 may be configured to transmit and / or receive both RF and light signals. It will be appreciated that the transmit / receive element 122 may be configured to transmit and / or receive any combination of wireless signals.

[0071] Although the transmit / receive element 122 is depicted in FIG. 1 B as a single element, the WTRU 102 may include any number of transmit / receive elements 122. More specifically, the WTRU 102 may employ MIMO technology. Thus, in one embodiment, the WTRU 102 may include two or more transmit / receive elements 122 (e.g., multiple antennas) for transmitting and receiving wireless signals over the air interface 116.

[0072] The transceiver 120 may be configured to modulate the signals that are to be transmitted by the transmit / receive element 122 and to demodulate the signals that are received by the transmit / receive element 122. As noted above, the WTRU 102 may have multi-mode capabilities. Thus, the transceiver 120 may include multiple transceivers for enabling the WTRU 102 to communicate via multiple RATs, such as NR and IEEE 802.11 , for example.

[0073] The processor 118 of the WTRU 102 may be coupled to, and may receive user input data from, the speaker / microphone 124, the keypad 126, and / or the display / touchpad 128 (e.g., a liquid crystal display (LCD) display unit or organic light-emitting diode (OLED) display unit). The processor 118 may also output user data to the speaker / microphone 124, the keypad 126, and / or the display / touchpad 128. In addition, the processor 118 may access information from, and store data in, any type of suitable memory, such as the non-removable memory 130 and / or the removable memory 132. The non-removable memory 130 may include random-access memory (RAM), read-only memory (ROM), a hard disk, or any other type of memory storage device. The removable memory 132 may include a subscriber identity module (SIM) card, a memory stick, a secure digital (SD) memory card, and the like. In other embodiments, the processor 118 may access information from, and store data in, memory that is not physically located on the WTRU 102, such as on a server or a home computer (not shown).

[0074] The processor 118 may receive power from the power source 134, and may be configured to distribute and / or control the power to the other components in the WTRU 102. The power source 134 may be any suitable device for powering the WTRU 102. For example, the power source 134 may include one or more dry cell batteries (e.g., nickel-cadmium (NiCd), nickel-zinc (NiZn), nickel metal hydride (NiMH), lithium- ion (Li-ion), etc.), solar cells, fuel cells, and the like.

[0075] The processor 118 may also be coupled to the GPS chipset 136, which may be configured to provide location information (e.g., longitude and latitude) regarding the current location of the WTRU 102. In addition to, or in lieu of, the information from the GPS chipset 136, the WTRU 102 may receive location information over the air interface 116 from a base station (e.g., base stations 114a, 114b) and / or determine its location based on the timing of the signals being received from two or more nearby base stations. It will be appreciated that the WTRU 102 may acquire location information by way of any suitable locationdetermination method while remaining consistent with an embodiment.

[0076] The processor 118 may further be coupled to other peripherals 138, which may include one or more software and / or hardware modules that provide additional features, functionality and / or wired or wireless connectivity. For example, the peripherals 138 may include an accelerometer, an e-compass, a satellite transceiver, a digital camera (for photographs and / or video), a universal serial bus (USB) port, a vibration device, a television transceiver, a hands free headset, a Bluetooth® module, a frequency modulated (FM) radio unit, a digital music player, a media player, a video game player module, an Internet browser, a Virtual Reality and / or Augmented Reality (VR / AR) device, an activity tracker, and the like. The peripherals 138 may include one or more sensors, the sensors may be one or more of a gyroscope, an accelerometer, a hall effect sensor, a magnetometer, an orientation sensor, a proximity sensor, a temperature sensor, a time sensor; a geolocation sensor; an altimeter, a light sensor, a touch sensor, a magnetometer, a barometer, a gesture sensor, a biometric sensor, and / or a humidity sensor.

[0077] The WTRU 102 may include a full duplex radio for which transmission and reception of some or all of the signals (e.g., associated with particular subframes for both the UL (e.g., for transmission) and downlink (e.g., for reception) may be concurrent and / or simultaneous. The full duplex radio may include an interference management unit to reduce and or substantially eliminate self-interference via either hardware (e.g., a choke) or signal processing via a processor (e.g., a separate processor (not shown) or via processor 118). In an embodiment, the WTRU 102 may include a half-duplex radio for which transmission and reception of some or all of the signals (e.g., associated with particular subframes for either the UL (e.g., for transmission) or the downlink (e.g., for reception)).

[0078] Although the WTRU is described in FIGs. 1 A-1 B as a wireless terminal, it is contemplated that in certain representative embodiments that such a terminal may use (e.g., temporarily or permanently) wired communication interfaces with the communication network.

[0079] In representative embodiments, the other network 112 may be a WLAN.

[0080] In view of FIGs. 1 A-1 B, and the corresponding description, one or more, or all, of the functions described herein may be performed by one or more emulation devices (not shown). The emulation devices may be one or more devices configured to emulate one or more, or all, of the functions described herein. For example, the emulation devices may be used to test other devices and / or to simulate network and / or WTRU functions.

[0081] The emulation devices may be designed to implement one or more tests of other devices in a lab environment and / or in an operator network environment. For example, the one or more emulation devices may perform the one or more, or all, functions while being fully or partially implemented and / or deployed as part of a wired and / or wireless communication network in order to test other devices within the communication network. The one or more emulation devices may perform the one or more, or all, functions while being temporarily implemented / deployed as part of a wired and / or wireless communication network. The emulation device may be directly coupled to another device for purposes of testing and / or may performing testing using over-the-air wireless communications.

[0082] The one or more emulation devices may perform the one or more, including all, functions while not being implemented / deployed as part of a wired and / or wireless communication network. For example, the emulation devices may be utilized in a testing scenario in a testing laboratory and / or a non-deployed (e.g., testing) wired and / or wireless communication network in order to implement testing of one or more components. The one or more emulation devices may be test equipment. Direct RF coupling and / or wireless communications via RF circuitry (e.g., which may include one or more antennas) may be used by the emulation devices to transmit and / or receive data.

[0083] FIG. 1 C is a system diagram illustrating an example set of interfaces for a system according to some embodiments. An extended reality display device, together with its control electronics, may be implemented for some embodiments. System 150 can be embodied as a device including the various components described below and is configured to perform one or more of the aspects described in this document. Examples of such devices, include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set top boxes, digital television receivers, personal video recording systems, connected home appliances, and servers. Elements of system 150, singly or in combination, can be embodied in a single integrated circuit (IC), multipleICs, and / or discrete components. For example, in at least one embodiment, the processing and encoder / decoder elements of system 150 are distributed across multiple ICs and / or discrete components. In various embodiments, the system 150 is communicatively coupled to one or more other systems, or other electronic devices, via, for example, a communications bus or through dedicated input and / or output ports. In various embodiments, the system 150 is configured to implement one or more of the aspects described in this document.

[0084] The system 150 includes at least one processor 152 configured to execute instructions loaded therein for implementing, for example, the various aspects described in this document. Processor 152 may include embedded memory, input output interface, and various other circuitries as known in the art. The system 150 includes at least one memory 154 (e.g., a volatile memory device, and / or a non-volatile memory device). System 150 may include a storage device 158, which can include non-volatile memory and / or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), flash, magnetic disk drive, and / or optical disk drive. The storage device 158 can include an internal storage device, an attached storage device (including detachable and non-detachable storage devices), and / or a network accessible storage device, as non-limiting examples.

[0085] System 150 includes an encoder / decoder module 156 configured, for example, to process data to provide an encoded video or decoded video, and the encoder / decoder module 156 can include its own processor and memory. The encoder / decoder module 156 represents module(s) that can be included in a device to perform the encoding and / or decoding functions. As is known, a device can include one or both of the encoding and decoding modules. Additionally, encoder / decoder module 156 can be implemented as a separate element of system 150 or can be incorporated within processor 152 as a combination of hardware and software as known to those skilled in the art.

[0086] Program code to be loaded onto processor 152 or encoder / decoder 156 to perform the various aspects described in this document can be stored in storage device 158 and subsequently loaded onto memory 154 for execution by processor 152. In accordance with various embodiments, one or more of processor 152, memory 154, storage device 158, and encoder / decoder module 156 can store one or more of various items during the performance of the processes described in this document. Such stored items can include, but are not limited to, the input video, the decoded video or portions of the decoded video, the bitstream, matrices, variables, and intermediate or final results from the processing of equations, formulas, operations, and operational logic.

[0087] In some embodiments, memory inside of the processor 152 and / or the encoder / decoder module 156 is used to store instructions and to provide working memory for processing that is needed during encoding or decoding. In other embodiments, however, a memory external to the processing device (for example, the processing device can be either the processor 152 or the encoder / decoder module 152) is used for one or more of these functions. The external memory can be the memory 154 and / or the storage device 158, for example, a dynamic volatile memory and / or a non-volatile flash memory. In several embodiments, an external non-volatile flash memory is used to store the operating system of, for example, a television. In at least one embodiment, a fast external dynamic volatile memory such as a RAM is used as working memory for video coding and decoding operations, such as for MPEG-2 (MPEG refers to the Moving Picture Experts Group, MPEG-2 is also referred to as ISO / IEC 13818, and 13818-1 is also known as H.222, and 13818-2 is also known as H.262), HEVC (HEVC refers to High Efficiency Video Coding, also known as H.265 and MPEG-H Part 2), or WC (Versatile Video Coding, a new standard being developed by JVET, the Joint Video Experts Team).

[0088] The input to the elements of system 150 can be provided through various input devices as indicated in block 172. Such input devices include, but are not limited to, (i) a radio frequency (RF) portion that receives an RF signal transmitted, for example, over the air by a broadcaster, (ii) a Component (COMP) input terminal (or a set of COMP input terminals), (iii) a Universal Serial Bus (USB) input terminal, and / or (iv) a High Definition Multimedia Interface (HDMI) input terminal. Other examples, not shown in FIG. 1 C, include composite video.

[0089] In various embodiments, the input devices of block 172 have associated respective input processing elements as known in the art. For example, the RF portion can be associated with elements suitable for (i) selecting a desired frequency (also referred to as selecting a signal, or band-limiting a signal to a band of frequencies), (ii) downconverting the selected signal, (iii) band-limiting again to a narrower band of frequencies to select (for example) a signal frequency band which can be referred to as a channel in certain embodiments, (iv) demodulating the downconverted and band-limited signal, (v) performing error correction, and (vi) demultiplexing to select the desired stream of data packets. The RF portion of various embodiments includes one or more elements to perform these functions, for example, frequency selectors, signal selectors, band-limiters, channel selectors, filters, downconverters, demodulators, error correctors, and demultiplexers. The RF portion can include a tuner that performs various of these functions, including, for example, downconverting the received signal to a lower frequency (for example, an intermediate frequency or a near-baseband frequency) or to baseband. In one set-top box embodiment, the RF portion and its associated input processing element receives an RF signal transmitted over a wired (for example,cable) medium, and performs frequency selection by filtering, downconverting, and filtering again to a desired frequency band. Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and / or add other elements performing similar or different functions. Adding elements can include inserting elements in between existing elements, such as, for example, inserting amplifiers and an analog-to-digital converter. In various embodiments, the RF portion includes an antenna.

[0090] Additionally, the USB and / or HDMI terminals can include respective interface processors for connecting system 150 to other electronic devices across USB and / or HDMI connections. It is to be understood that various aspects of input processing, for example, Reed-Solomon error correction, can be implemented, for example, within a separate input processing IC or within processor 152 as necessary. Similarly, aspects of USB or HDMI interface processing can be implemented within separate interface ICs or within processor 152 as necessary. The demodulated, error corrected, and demultiplexed stream is provided to various processing elements, including, for example, processor 152, and encoder / decoder 156 operating in combination with the memory and storage elements to process the datastream as necessary for presentation on an output device.

[0091] Various elements of system 150 can be provided within an integrated housing, Within the integrated housing, the various elements can be interconnected and transmit data therebetween using suitable connection arrangement 174, for example, an internal bus as known in the art, including the Inter- IC (I2C) bus, wiring, and printed circuit boards.

[0092] The system 150 includes communication interface 160 that enables communication with other devices via communication channel 162. The communication interface 160 can include, but is not limited to, a transceiver configured to transmit and to receive data over communication channel 162. The communication interface 160 can include, but is not limited to, a modem or network card and the communication channel 162 can be implemented, for example, within a wired and / or a wireless medium.

[0093] Data is streamed, or otherwise provided, to the system 150, in various embodiments, using a wireless network such as a Wi-Fi network, for example IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). The Wi-Fi signal of these embodiments is received over the communications channel 162 and the communications interface 160 which are adapted for Wi-Fi communications. The communications channel 162 of these embodiments is typically connected to an access point or router that provides access to external networks including the Internet for allowing streaming applications and other over-the-top communications. Other embodiments provide streamed data to the system 150 using a set-top box that delivers the data over the HDMI connection of the input block 172. Still other embodiments provide streamed data to the system 150 using the RF connection of the input block 172. As indicated above, variousembodiments provide data in a non-streaming manner. Additionally, various embodiments use wireless networks other than Wi-Fi, for example a cellular network or a Bluetooth network.

[0094] The system 150 can provide an output signal to various output devices, including a display 176, speakers 178, and other peripheral devices 180. The display 176 of various embodiments includes one or more of, for example, a touchscreen display, an organic light-emitting diode (OLED) display, a curved display, and / or a foldable display. The display 176 can be for a television, a tablet, a laptop, a cell phone (mobile phone), or other device. The display 176 can also be integrated with other components (for example, as in a smart phone), or separate (for example, an external monitor for a laptop). The other peripheral devices 180 include, in various examples of embodiments, one or more of a stand-alone digital video disc (or digital versatile disc) (DVR, for both terms), a disk player, a stereo system, and / or a lighting system. Various embodiments use one or more peripheral devices 180 that provide a function based on the output of the system 150. For example, a disk player performs the function of playing the output of the system 150.

[0095] In various embodiments, control signals are communicated between the system 150 and the display 176, speakers 178, or other peripheral devices 180 using signaling such as AV. Link, Consumer Electronics Control (CEC), or other communications protocols that enable device-to-device control with or without user intervention. The output devices can be communicatively coupled to system 150 via dedicated connections through respective interfaces 164, 166, and 168. Alternatively, the output devices can be connected to system 150 using the communications channel 162 via the communications interface 160. The display 176 and speakers 178 can be integrated in a single unit with the other components of system 150 in an electronic device such as, for example, a television. In various embodiments, the display interface 164 includes a display driver, such as, for example, a timing controller (T Con) chip.

[0096] The display 176 and speaker 178 can alternatively be separate from one or more of the other components, for example, if the RF portion of input 172 is part of a separate set-top box. In various embodiments in which the display 176 and speakers 178 are external components, the output signal can be provided via dedicated output connections, including, for example, HDMI ports, USB ports, or COMP outputs.

[0097] The system 150 may include one or more sensor devices 168. Examples of sensor devices that may be used include one or more GPS sensors, gyroscopic sensors, accelerometers, light sensors, cameras, depth cameras, microphones, and / or magnetometers. Such sensors may be used to determine information such as user's position and orientation. Where the system 150 is used as the control module for an extended reality display (such as control modules 124, 132), the user's position and orientation may be used in determining how to render image data such that the user perceives the correct portion of a virtual object or virtual scene from the correct point of view. In the case of head-mounted display devices, the position andorientation of the device itself may be used to determine the position and orientation of the user for the purpose of rendering virtual content. In the case of other display devices, such as a phone, a tablet, a computer monitor, or a television, other inputs may be used to determine the position and orientation of the user for the purpose of rendering content. For example, a user may select and / or adjust a desired viewpoint and / or viewing direction with the use of a touch screen, keypad or keyboard, trackball, joystick, or other input. Where the display device has sensors such as accelerometers and / or gyroscopes, the viewpoint and orientation used for the purpose of rendering content may be selected and / or adjusted based on motion of the display device.

[0098] The embodiments can be carried out by computer software implemented by the processor 152 or by hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments can be implemented by one or more integrated circuits. The memory 154 can be of any type appropriate to the technical environment and can be implemented using any appropriate data storage technology, such as optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory, as non-limiting examples. The processor 152 can be of any type appropriate to the technical environment, and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as non-limiting examples.Block-Based Video Coding

[0099] The systems and methods disclosed herein may be used in the coding of textured meshes, which may be dynamic textured meshes. In some embodiments, information representing the displacements of a dynamic mesh and / or information representing attributes of the mesh (e.g. texture information) may be coded using known video coding techniques. An overview of block-based video coding techniques that may be used in some embodiments is provided below.

[0100] Like HEVC, the VVC is built upon the block-based hybrid video coding framework. FIG. 2A gives the block diagram of a block-based hybrid video encoding system 200. Variations of this encoder 200 are contemplated, but the encoder 200 is described below for purposes of clarity without describing all expected variations.

[0101] Before being encoded, a video sequence may go through pre-encoding processing 204, for example, applying a color transform to an input color picture (e.g., conversion from RGB 4:4:4 to YCbCr 4:2:0), or performing a remapping of the input picture components in order to get a signal distribution more resilient to compression (for instance using a histogram equalization of one of the color components). Metadata can be associated with the pre-processing and attached to the bitstream.

[0102] The input video signal 202 including a picture to be encoded is partitioned 206 and processed block by block in units of, for example, CUs. Different CUs may have different sizes. In VTM-1 .0, a CU can be up to 128x128 pixels. However, different from the HEVC which partitions blocks only based on quad-trees, in the VTM-1 .0, a coding tree unit (CTU) is split into CUs to adapt to varying local characteristics based on quad / binary / ternary-tree. Additionally, the concept of multiple partition unit type in the HEVC is removed, such that the separation of CU, prediction unit (PU) and transform unit (TU) does not exist in the VVC-1.0 anymore; instead, each CU is always used as the basic unit for both prediction and transform without further partitions. In the multi-type tree structure, a CTU is firstly partitioned by a quad-tree structure. Then, each quad-tree leaf node can be further partitioned by a binary and ternary tree structure. Different splitting types may be used, such as quaternary partitioning, vertical binary partitioning, horizontal binary partitioning, vertical ternary partitioning, and horizontal ternary partitioning.

[0103] In the encoder of FIG. 2A, spatial prediction 208 and / or temporal prediction 210 may be performed. Spatial prediction (or "intra prediction”) uses pixels from the samples of already coded neighboring blocks (which are called reference samples) in the same video picture / slice to predict the current video block. Spatial prediction reduces spatial redundancy inherent in the video signal. Temporal prediction (also referred to as "inter prediction” or "motion compensated prediction”) uses reconstructed pixels from the already coded video pictures to predict the current video block. Temporal prediction reduces temporal redundancy inherent in the video signal. A temporal prediction signal for a given CU may be signaled by one or more motion vectors (MVs) which indicate the amount and the direction of motion between the current CU and its temporal reference. Also, if multiple reference pictures are supported, a reference picture index may additionally be sent, which is used to identify from which reference picture in the reference picture store 212 the temporal prediction signal comes.

[0104] The mode decision block 214 in the encoder chooses the best prediction mode, for example based on a rate-distortion optimization method. This selection may be made after spatial and / or temporal prediction is performed. The intra / inter decision may be indicated by, for example, a prediction mode flag. The prediction block is subtracted from the current video block 216 to generate a prediction residual. The prediction residual is de-correlated using transform 218 and quantized 220. (For some blocks, the encoder may bypass both transform and quantization, in which case the residual may be coded directly without the application of the transform or quantization processes.) The quantized residual coefficients are inverse quantized 222 and inverse transformed 224 to form the reconstructed residual, which is then added back to the prediction block 226 to form the reconstructed signal of the CU. Further in-loop filtering, such as deblocking / SAO (Sample Adaptive Offset) filtering, may be applied 228 on the reconstructed CU to reduce encoding artifacts before itis put in the reference picture store 212 and used to code future video blocks. To form the output video bitstream 230, coding mode (inter or intra), prediction mode information, motion information, and quantized residual coefficients are all sent to the entropy coding unit (108) to be further compressed and packed to form the bit-stream.

[0105] FIG. 2B gives a block diagram of a block-based video decoder 250. In the decoder 250, a bitstream is decoded by the decoder elements as described below. Video decoder 250 generally performs a decoding pass reciprocal to the encoding pass as described in FIG. 2A. The encoder 200 also generally performs video decoding as part of encoding video data.

[0106] In particular, the input of the decoder includes a video bitstream 252, which can be generated by video encoder 200. The video bit-stream 252 is first unpacked and entropy decoded at entropy decoding unit 254 to obtain transform coefficients, motion vectors, and other coded information. Picture partition information indicates how the picture is partitioned. The decoder may therefore divide 256 the picture according to the decoded picture partitioning information. The coding mode and prediction information are sent to either the spatial prediction unit 258 (if intra coded) or the temporal prediction unit 260 (if inter coded) to form the prediction block. The residual transform coefficients are sent to inverse quantization unit 262 and inverse transform unit 264 to reconstruct the residual block. The prediction block and the residual block are then added together at 266 to generate the reconstructed block. The reconstructed block may further go through in-loop filtering 268 before it is stored in reference picture store 270 for use in predicting future video blocks.

[0107] The decoded picture 272 may further go through post-decoding processing 274, for example, an inverse color transform (e.g. conversion from YCbCr 4:2:0 to RGB 4:4:4) or an inverse remapping performing the inverse of the remapping process performed in the pre-encoding processing 204. The post-decoding processing can use metadata derived in the pre-encoding processing and signaled in the bitstream. The decoded, processed video may be sent to a display device 276. The display device 276 may be a separate device from the decoder 250, or the decoder 250 and the display device 276 may be components of the same device.

[0108] Various methods and other aspects described in this disclosure can be used to modify modules of a video encoder 200 or decoder 250. Moreover, the systems and methods disclosed herein are not limited to VVC or HEVC, and can be applied, for example, to other standards and recommendations, whether preexisting or future-developed, and extensions of any such standards and recommendations (including WC and HEVC). Unless indicated otherwise, or technically precluded, the aspects described in this disclosure can be used individually or in combination.

[0109] Visual volumetric video-based coding (V3C) is described in ISO / IEC 23090-5:2021 , Information technology — Coded representation of immersive media — Part 5: Visual volumetric video-based coding (V3C) and video-based point cloud compression (V-PCC). Video-based dynamic mesh coding (V-DMC) is a framework for compressing dynamic meshes that is being developed by extending V3C. The V-DMC framework may involve different attributes specified for a dynamic mesh sequence. In V-DMC, the underlying static mesh codec may decode mesh attributes per face or per vertex. These attributes may provide additional information about the static mesh e.g., color, texture coordinates, normals, reflectance information, transparency information, and / or user-defined attributes.

[0110] For V-DMC, a framework is developed by extending V3C. V3C is described at ISO / IEC 23090- 5:2021 , Information technology — Coded representation of immersive media — Part 5: Visual volumetric video-based coding (V3C) and video-based point cloud compression (V-PCC).

[0111] FIG. 3 is a system diagram illustrating an example hierarchical structure for a V-DMC bitstream. The attributes from the static mesh codec may further be used by the basemesh codec. A basemesh bitstream is further encapsulated in a V3C bitstream. The hierarchical structure 300 of a V-DMC bitstream 302 is shown in FIG. 3. An extension mechanism in the V3C bitstream may provide information about the type of attributes that a V3C bitstream / framework will use from the underlying basemesh codec. Additionally, the basemesh bitstream 304 may provide a mechanism to provide information about the type of mesh attribute of interest from the underlying static mesh codec. FIG. 3 illustrates encapsulation of different subbitstreams 304, 306, 308, 310, 312, 314, 316 in a V-DMC bitstream 302.Overview of Mesh Coding

[0112] FIG. 4 is a functional block diagram of an MPEG V-DMC dynamic mesh encoder according to some embodiments. A source mesh model 402 is provided as an input mesh M(i) to the mesh encoding process. The source mesh model 402 is associated with a source texture map 404 that is proved as an input texture map A(i) to the encoding process. The input mesh is decimated at 406 to generate a base mesh m(i) with a reduced number of vertices, and a UV atlas is generated for the base mesh AT 408. The base mesh is quantized at 410 and encoded at 412, with the compressed base mesh data being multiplexed at 414 into a dynamic mesh bitstream. The compressed base mesh data is reconstructed at the encoder to generate reconstructed base mesh m’(i) with a static mesh decoder 416. The reconstructed base mesh is subdivided at 418 by adding new vertices. A subdivision surface fitting process is performed at 420 by comparing the subdivided base mesh with the input mesh M(i) to determine a set of displacements d(i) that deform the vertices of the subdivided base mesh to correspond more closely to the surfaces defined by the input mesh M(i). These displacements may be updated at 422 into updated displacements d’(i) based on differencebetween the original base mesh m(i) and the reconstructed base mesh m’(i). These updated displacements are encoded using a wavelet transform 424 that generates wavelet coefficients e’(i), which are quantized at 426 and packed at 428 into an image format. A time-varying series of images representing the wavelet coefficients may be encoded at 430 using conventional video encoding techniques, and the encoded video may be multiplexed at 414 with the data representing the compressed base mesh. At the encoder, the displacements are reconstructed from the encoded video through image unpacking 452, inverse quantization 454, and inverse wavelet transform 432 to generate a reconstructed set of displacements d”(i). A reconstructed base mesh M”(i) is obtained through inverse quantization at 434 of the reconstructed quantized base mesh m’(i), and the reconstructed base mesh M”(i) is subdivided at 436. A reconstructed deformed mesh DM(i) is generated at 438 by applying the reconstructed set of displacements d”(i) to the reconstructed base mesh m’(i). The reconstructed deformed mesh DM(i) is used as a destination mesh model 456 for the purpose of attribute transfer.

[0113] Using the reconstructed deformed mesh DM(i) (destination mesh model 456), the input mesh M(i) (source mesh model 402), and the input texture map A(i) (source texture map 404), an attribute transfer process 440 is performed to provide attribute values for a destination texture map A'(i) that is associated with the reconstructed deformed mesh DM(i). Pixels in the texture map A'(i) that are not associated with any triangle of the reconstructed deformed mesh DM(i) may be filled using a padding process 442. A color space conversion 444 may be performed, a time-varying series of texture maps A'(i) may be encoded using conventional video encoding techniques 446, and the encoded video may be multiplexed at 414 into a bitstream 450 with the data representing the displacements and the compressed base mesh. Patch information 448 may also be multiplexed in the bitstream.

[0114] FIG. 5 is a functional block diagram of a mesh decoder according to some embodiments. The mesh decoder 500 demultiplexes (via a DEMUX 502) different sub-bitstreams from, e.g. a V3C bitstream. The subbitstreams may include a sub-bitstream representing a static mesh, a sub-bitstream representing displacements, and one or more sub-bitstreams representing attributes. In the illustration of FIG. 5, the displacements sub-bitstream is illustrated as being decoded with a video decoder 506, but as discussed in greater detail below, different decoder configurations may be used depending on parameters received in the bitstream. For example, the decoder may be configured to use an arithmetic decoder in place of a video decoder for the coding of the displacements. In addition, where video coding is used, different decoder configurations may use different video codecs (such as AVC, HEVC, VVC, and the like).

[0115] For the examples shown in FIG. 5, a sub-stream representing a static mesh may go through a demux 502, then a static mesh decoder 504, and an inverse quantization 516. A decoded base mesh m"(i)is outputted by the inverse quantization 516 and inputted into a reconstruct deformed mesh process 518. Meanwhile, a sub-stream representing displacements may go through a video decoding process 506, an image unpacking process 510, an inverse quantization process 512, and an inverse wavelet transform process 514. Decoded displacements m"(i) are outputted by the inverse wavelet transform process 514 and inputted into the reconstruct deformed mesh process 518, which outputs the decoded meshOne or more sub-bitstreams representing attributes may go through a video decoding process 508 and then a color format / space conversion process 520 to output a decoded attribute map A"(i).

[0116] FIG. 6 is a functional block diagram of an example decoder according to some embodiments. For the sake of clarity, not all features and configurations disclosed herein are expressed graphically in FIG. 6. The decoder 600 of FIG. 6 receives a bitstream, which may be a V3C bitstream, and demultiplexes the bitstream via a DEMUX 602 into component sub-bitstreams. Profile information 604 may also be parsed from the bitstream, e.g. at the V3C level. The profile information 604 may be used to indicate a decoder configuration. This profile information 604 allows the decoder to instantiate tools as appropriate for the particular bitstream. For example, the profile information 604 may indicate which basemesh codec is to be used to decode the basemesh, and the decoder is configured accordingly to direct the basemesh subbitstream to the appropriate decoder module 606, 608. The profile information 604 may indicate whether the displacement sub-bitstream is to be decoded using an arithmetic decoder 610 or a video decoder 612, 614, 616 (and if the sub-bitstream is for a video decoder, which video decoder 612, 614, 616), and the decoder is configured accordingly to direct the displacement sub-bitstream to the appropriate decoder module 610, 612, 614, 616. The profile information 604 may indicate which video decoder is to be used to code the texture sub-bitstream, and the decoder is configured accordingly to direct the displacement sub-bitstream to the appropriate decoder module 612, 614, 616. The profile information 604 may include further information, such as bit depth information, that may be used to configure the individual decoder modules. The deformed mesh may be reconstructed from the basemesh and the displacements, and the reconstructed deformed mesh 618, together with the reconstructed texture 620, may be rendered or otherwise processed according to known techniques.

[0117] The basemesh codec specification, which is Annex H of WD 5.0, ISO / IEC 23090-29, V-DMC, available at: dms<dot>mpeg<dot>expert / doc_end_user / current_document<dot>php?id=90637&id_meeting=196 (“ISO / IEC 23090-29’), is understood to be mesh codec agnostic. The specification indicates that a basemesh bitstream may include coded mesh payload. In the basemesh bitstream, the mesh data may be coded using a mesh codec specified in MPEG or outside of MPEG.

[0118] The references Constraints Flags and Data Unit Size Signalling in the Basemesh Sub-Bitstream of V-DMC, Section EE 4.13, V-DMC, available at: dms<dot>mpeg<dot>expert / doc_end_user / documents / 144_Hannover / wg11 / m64784-v2-m64784<dot>zip ("EE 4.13 of V-DMC') and Proposed Updates to WD 4.0 of V-DMC, V-DMC, available at: dms<dot>mpeg<dot>expert / doc_end_user / documents / 143_Geneva / wg11 / m63983-v2-m63983<dot>zip ^‘Proposed Updates to WD 4.0') are understood to propose the inclusion of size information to indicate the size of the mesh payload carried in the basemesh bitstream.

[0119] Introducing syntax elements to indicate the size of the mesh payload may be unnecessary. Some existing mechanisms may be altered and leveraged to achieve a similar functionality.

[0120] In the Basemesh specification, the payload format for the submesh data unit is dependent upon the mesh codec used.

[0121] Hence, a mechanism is required to extract the coded mesh payload. The coded mesh payload is part of the submesh data unit, and the submesh data unit is embedded in the basemesh bitstream. The mesh codec needs to be known to decode the submesh data unit and in turn extract the coded mesh payload.

[0122] For some embodiments, extraction of coded mesh data from the basemesh bitstream may be streamlined. The approach described herein helps to clearly represent the mesh-codec agnostic nature of the basemesh codec.Raw Byte Sequence Payload (RBSP)

[0123] Sub-clause 8.4.5.2 of Visual Volumetric Video-Based Coding (V3C) and Video-Based Point Cloud Compression (V-PCC), ISO / IEC 23090-5:2021 , available at: www<dot>iso<dot>org / standard / 73025<dot>html (“ISO / IEC 23090-5:2021") specifies the raw byte payload (RBSP) as an ordered sequence of bytes. The RBSP contains an integer number of bytes that are encapsulated in a Network Abstraction Layer (NAL) unit. A syntax structure may have the form of a String Of Data Bits (SODB) containing the syntax elements followed by an RBSP stop bit and zero or more subsequent bits with a value of O.

[0124] If the boundaries of the RBSP are known, the decoder may extract the SODB from the RBSP by concatenating the bits of the bytes of the RBSP and discarding the bit "rbsp_stop_one_bit” and any less significant bits. The bit designated as "rbsp_stop_one_bit” is the last (right-most and least significant) bit and is equal to 1 . Any bits less significant and further to the right of the "rbsp_stop_one_bit” bit are equal to 0. The data necessary for the decoding process is contained in the SODB part of the RBSP. This functionalityenables determination of the total number of bytes corresponding to an RBSP. Syntax structures having these RBSP properties are denoted in the syntax tables of the specification with an "_rbsp” suffix. more_rbsp_data() Syntax Function

[0125] more_rbsp_data() is one of the syntax functions specified in Section 8.2 of ISO / IEC 23090-5:2021. The syntax function returns TRUE if there is more data in an RBSP sequence before encountering the rbsp_trailing_bits() syntax structure. If there is no more data in the raw byte sequence payload (RBSP), the function more_rbsp_data( ) returns a return value of FALSE.Use of rbsp_trailing_bits() Syntax Structure

[0126] An RBSP trailing bit syntax structure as described in Section 8.3.6.10 of ISO / IEC 23090-5:2021 has two syntax elements: a bit entitled "rbsp_stop_one_bit” and a bit entitled "rbsp_alignment_zero_bit”. The RBSP data is searched for the presence of the last bit equal to 1. Such a bit is also the first bit (rbsp_stop_one_bit) of the rbsp_trailing_bits() syntax structure. This search may be used to determine whether or not there is data / more data in an RBSP. bmesh_submesh_layer_rbsp() Syntax Structure

[0127] Table 1 shows a code listing for a basemesh submesh layer RBSP. Sub-clause H.8.1.3.3 ofISO / IEC 23090-29 has such a structure with three syntax structures as shown below in Table 1 .Table 1.

[0128] Since the basemesh submesh layer follows the RBSP properties, the function is denoted with the "_rbsp” suffix. As can be seen by the syntax structure shown in Table 1 , the bmesh_submesh_layer_rbsp() has a rbspjrail i ng_bits() syntax structure to signal the boundary of the RBSP.

[0129] The submesh_header() syntax structure corresponds to the syntax elements. The submesh header provides information such as the submesh ID, submesh type (smhjype), submesh frame order count, and submesh frame list index. The submesh header also may provide information specific to the submesh type. The size of the submesh_header() syntax structure is deterministic because the syntax element for the submesh header is specified in the basemesh specification.

[0130] The submesh_data_unit() function provides mesh payload for different submesh types as shown in Table 2. The payload format is not specified in the basemesh specification. However, the payload format is determined by the mesh codec used for the basemesh. The codec used to compress the mesh is signaled either in the basemesh sequence parameter set in bmsps_intra_codec_id for intra mesh codecs and in bmsps_inter_codec_id for inter mesh codecs. Alternatively, the basemesh profile codec group may provide an indication of which codec the intra or inter mesh payload conforms. The size of the mesh data payload contained within the submesh_data_unit() is dependent on the codec used to compress the mesh payload.

[0131] A basemesh bitstream specified in MPEG leverages two mesh codecs. An intra mesh codec is used to code static mesh data (for example, an "I” frame in video). An inter mesh codec is used to code motion information for the static mesh (for example, a “P” frame in video). This functionality is done because the basemesh is designed to be flexible and is kept mesh-codec agnostic. A basemesh bitstream may be generated with payloads from mesh codecs not specified in MPEG. For example, there are static mesh codecs available from sources such as Draco and TFAN.Table 2.

[0132] FIG. 7 is a schematic illustration showing an example portion of an example bitstream according to some embodiments. As shown in the example of FIG. 7, the bitstream 700 is shown as having a submesh header 702, submesh payload data 704, and RBSP trailing bits 706. The submesh payload data is of a variable size and is described in more detail below with regard to Eq. 1 .

[0133] The bmesh_submesh_layer_rbsp() syntax structure is carried in an NAL unit. For the different types of submesh (smh_type) carried in the bmesh_submesh_layer_rbsp(), there are different NAL unit types specified in the basemesh bitstream.

[0134] For example, for a submesh type (smhjype) of l_SUBMESH, there are different possible values of NAL unit types such as NAL_BLA_W_LP, NAL_BLA_W_RADL, NAL_BLA_N_LP, NAL_IDR_W_RADL, NAL_IDR_NL_LP, and NAL_CRA. These NAL unit types have integer values as indicated in sub-clause H.9.2.1.2 of the WD of ISO / IEC 23090-29. The accurate use of an NAL unit type depends on the coding structure of the basemesh bitstream and is driven by the encoder.

[0135] In a basemesh bitstream, the codec used to code the intra and inter submesh data, which are l_SUBMESH and P_SUBMESH, respectively, may be different. As mentioned above, the codecs are indicated using the syntax elements bmsps_intra_mesh_codec_id and bmsps_inter_mesh_codec_id, respectively in the basemesh sequence parameter set. Alternatively, the mesh codecs may be indicated using bmptl_profile_codec_group_idc. A basemesh codec is specified in Annex H of ISO / IEC 23090-29. The MPEG basemesh codec has two sub-codecs, namely the intra mesh codec and inter mesh codec.

[0136] The basemesh bitstream specification allows a mesh-codec agnostic architecture. Therefore, for different mesh codecs, the payload format of the coded mesh data may be different. However, the codec mesh data needs to be carried within the basemesh bitstream.

[0137] To extract the coded mesh data from the basemesh bitstream, some embodiments may use the more_rbsp_data() syntax function. For some embodiments, the more_rbsp_data() syntax function reads through the RBSP until the rbsp_trailing_bits() syntax function is detected.

[0138] For some embodiments, the RBSP data is searched for the last (least significant, right-most) bit equal to 1 that is present in the RBSP. Given the position of this bit, which is the first bit (rbsp_stop_one_bit) of the rbsp_trailing_bits() syntax structure, if there is more RBSP data before the RBSP trailing bits, then the more_rbsp_data() syntax function returns TRUE. Otherwise, the more_rbsp_data() syntax structure returns FALSE.

[0139] Since the bmesh_submesh_layer_rbsp() data is carried in an NAL unit, the size of the NAL unit size is determined by the syntax element ssnu_nal_unit_size in the sample_stream_nal_unit().

[0140] The size of submesh_header() may be determined based on the syntax elements as specified in Sub-clause H.8.3.1 .4 of ISO / IEC 23090-29. The rbsp_trailing_bits() syntax structure is present after the string of data bits (SODB).

[0141] The size of the submesh_data_unit() may be determined using Eq. 1 : sizeOf (submesh data unit) =(8 * sizeOf (NAL unit size)) — (8 * sizeOf (submesh header)) — (rbsp trailing bits) (V)

[0142] Table 3 shows the syntax of the function of sdu_intra_sub_mesh_unit(). The function sdu_intra_sub_mesh_unit() is invoked by / within the submesh_data_unit() syntax function.Table 3.

[0143] When the submesh type is equal to l_SUBMESH (which may be expressed as smhjype = l_SUBMESH for some embodiments), the sismu_intra_unit() function is invoked. In the sismu_intra_unit() syntax function, a new syntax function is introduced, as shown in Table 4. The new syntax function is called embedded_intra_data_unit().Table 4.

[0144] As shown in Table 5, within the embedded_intra_data_unit() syntax function, the basemesh decoder uses the more_rbsp_data() syntax function to read RBSP data until RBSP trailing bits are encountered.

[0145] To extract the data for the submesh data unit() from the basemesh bitstream as specified in the specification, the syntax function more_rbsp_data() may be used. The function submesh_data_unit() may be followed by a rbsp Jrail i ng_bits() syntax function. The basemesh decoder reads the RBSP data (for example, via the syntax function more_rbsp_data()) until the rbsp_trailing_bits() syntax function (which may be within the basemesh decoder for some embodiments) encounters the data for the rbsp_trailing_bits() syntax function in the basemesh bitstream. The basemesh decoder may extract the submesh data unit from the bitstream using information regarding NAL unit size, submesh header size, and RBSP trailing bits in the bitstream.

[0146] A basemesh decoder may read submesh mesh data based on the type of the submesh coded in the bitstream. For a scenario in which the submesh type is l_SUBMESH (which may be expressed as smhjype = l_SUBMESH for some embodiments), the sdu_intra_sub_mesh_unit() syntax function provides the coded data for the static mesh. For a scenario in which the submesh type is P_SUBMESH (which may be expressed as smhjype = PJSUBMESH for some embodiments), sdujnter_sub_mesh_unit() syntax function provides coded data for motion information of the mesh. The syntax functions sdu_inter_sub_mesh_unit() and sdu_intra_sub_mesh_unit() may be followed by rbsp_trailing_bits() syntax functions. A basemesh encoder signals / encodes the intra and inter coded data by sdu_intra_sub_mesh_unit() and sdujnter_sub_mesh_unit(), respectively. Similarly, a basemesh decoder signals / decodes the intra and inter coded data by sdu_intra_sub_mesh_unit() and sdu_inter_sub_mesh_unit(), respectively.

[0147] Table 5 shows an example implementation. For a submesh type equal to IJSUBMESH (which may be expressed as smhjype = IJSUBMESH for some embodiments), the byte alignment currently enforced in sdujntra_sub_mesh_unit() is not required.

[0148] The bit entitled “embeddedjntra_data_bit” may have any value. The embedded intra_data_bit is either 0 or 1 . Since the intra mesh codec is external to the basemesh codec, the sequence of bits is not specified within the basemesh codec. Its presence and value are specified based on the basemesh codec profile group identifier signaled through the elements bmptl_profile_codec_groupjdc. A basemesh codec profile group may provide identifier which groups an intra mesh codec and inter mesh codec. Alternatively, the inter mesh codec identifier for the intra mesh codec may be signaled with bmspsjntra_mesh_codecjd, which may be mapped to an inter mesh codec.Table 5.

[0149] For some embodiments, a basemesh encoder signals and embeds the intra mesh payload in a sismu_intra_unit() structure.

[0150] The basemesh decoder reads submesh data via the submesh_data_unit() function as long as the function more_rbsp_data() returns TRUE. While reading, if the function more_rbsp_data() returns FALSE, the decoder is able to determine the boundaries of the submesh data unit. The basemesh decoder reads the RBSP within the sismu_intra_unit() syntax structure and thereby the embedded_intra_data_unit() function. The basemesh decoder concatenates the sequence of bits from the embedded_intra_data_bit element to form the complete submesh data (which may be labeled as the intra mesh coded payload) for a submesh type equal to l_SUBMESH (which may be expressed as smh_type= l_SUBMESH for some embodiments).

[0151] With the knowledge of the boundaries of the submesh data unit, the decoder will be able to extract the coded mesh payload. The size of coded mesh payload will correspond to the size expressed in Eq. 1. The intra coded mesh payload may be decoded using the intra_mesh_codec. The function more_rbsp_data() is shown below in Table 8. The function sdu_inter_sub_mesh_unit() is invoked by / within the submesh_data_unit() syntax function.Table 6.

[0152] As shown in Table 7, the embedded_inter_data_unit() syntax function may be used by sismu_inter_unit() in submesh_data_unit() for the scenario in which smhjype is equal to P_SUBMESH.Table 7.

[0153] As shown in Table 8, a new syntax function is added embedded_inter_data_unit(). The bit entitled "embedded_inter_data_bit" may have any value. The embedded inter_data_bit is either 0 or 1 . Since the inter mesh codec is external to the basemesh codec, the sequence of bits is not specified within the basemesh codec. Its presence and value are specified based on the basemesh codec profile group identifier. The "embedded_inter_data_bit" bit is signaled through the elements bmptl_profile_codec_group_idc. A basemesh codec profile group may provide an identifier which groups an intra mesh codec and inter mesh codec. Alternatively, the inter mesh codec identifier for the inter mesh codec is signaled with bmsps_inter_mesh_codec_id, which may be mapped to an inter mesh codec.Table 8.

[0154] A basemesh encoder signals and embeds the inter mesh payload in the sismu_inter_unit(). A basemesh decoder reads via the submesh_data_unit() and thereby the sismu_inter_unit() syntax structure while the more_rbsp_data() syntax function returns TRUE. While reading, if the more_rbsp_data() returns FALSE, the decoder is able to determine the boundaries of the submesh data unit for submesh types equal to l_SUBMESH (which may be expressed as smhjype = l_SUBMESH for some embodiments). The basemesh decoder reads the RBSP within sismu_inter_unit() syntax structure and thereby the embedded_inter_data_unit() function. The basemesh decoder concatenates the sequence of bits from the embedded_inter_data_bit element to form the complete submesh data (which may be labeled as the intra mesh coded payload) for a submesh type equal to P_SUBMESH (which may be expressed as smh_type= P_SUBMESH) or others.

[0155] With the knowledge of the boundaries of the inter submesh data unit, the decoder is able to extract the coded mesh payload. The size of inter coded mesh payload corresponds to the size expressed in Eq. 1 . The inter coded mesh payload may be decoded using the inter mesh codec.

[0156] For some embodiments, a basemesh encoder / basemesh decoder may signal / decode a generic syntax structure for embedded data which is coded using other mesh codec. The generic syntax structure may be called embedded external data unit. In the basemesh specification, the syntax structure may be referred as embedded_external_data_unit(). Using the embedded_external_data_unit() syntax function, a basemesh decoder reads the RBSP data according to more_rbsp_data() syntax function. The basemesh encoder embeds the data from any mesh codec (intra mesh codec and inter mesh codec) in the basemesh bitstream whilst signaling that the embedded mesh coded data is followed by a rbsp_trailing_bits() syntax function. The embed coded mesh data may be coded mesh data from intra mesh coded or inter mesh codec for one bmesh_submesh_layer_rbsp() syntax function. Whether the coded mesh data is intra / inter is determined by the smhjype syntax element in the submesh_header() function.

[0157] The embedded_external_data_unit() may be invoked within the sismu_inter_unit() and / or sismu_intra_unit() syntax functions as shown below in Tables 9 and 10. The sismu_inter_unit() and sismu_intra_unit() syntax functions may be followed by a rbsp_trailing_bits() syntax function.Table 9.Table 10.

[0158] The syntax of the embedded_external_data_unit() is shown below in Table 11. A basemesh decoder reads RBSP data via the more_rbsp_data() syntax function while the more_rbsp_data() syntax function returns TRUE. While reading, if the more_rbsp_data() returns FALSE, the decoder is able to determine the boundaries of the submesh data unit for submesh types equal to l_SUBMESH, P_SUBMESH, or others (which may be expressed as smhjype = IJSUBMESH, PJSUBMESH or others). The basemeshdecoder reads the RBSP within sismuj ntrajj nit() syntax structure or sismujnterjj nit() syntax structure and thereby the embedded_external_data_unit() function. The basemesh decoder concatenates the sequence of bits from the embedded_external_data_bit to form the complete submesh data submesh types equal to l_SUBMESH, P_SUBMESH, or others (which may be expressed as smhjype = l_SUBMESH, P_SUBMESH or others).

[0159] The size of the intra or inter coded mesh payload corresponds to the size expressed in Eq, 1 . The coded mesh payload (intra or inter) may be decoded using their respective mesh codecs (intra mesh codec and inter mesh codec).Table 11.

[0160] In Table 11 , the embedded_external_data_bit may have any value. The presence and value of embedded_external_data_bit are specified based on the basemesh codec profile group signaled through bmptl_profile_codec_group_idc or codec used. A basemesh codec profile group may provide an identifier which groups an intra mesh codec and inter mesh codec. A codec identifier for the inter mesh codec may be signaled with bmsps_inter_mesh_codec_id, which may be mapped to an inter mesh codec. A codec identifier for the intra mesh codec is signaled with bmsps_intra_mesh_codec_id, which may be mapped to an intra mesh codec.

[0161] For some embodiments, no new syntax elements are added to the basemesh bitstream to represent the size of the intra / inter data unit compared with proposals shown in EE 4.13 of V-DMC and Proposed Updates to WD 4.0. For some embodiments, there is a clear representation / expression of the codec-agnostic nature of the basemesh codec. Furthermore, described herein is functionality that may be used to extract the coded mesh payload from the Basemesh bitstream.

[0162] FIG. 8 is a flowchart illustrating an example process for decoding a bitstream according to some embodiments. For some embodiments, an example process 800 may include obtaining 802 a visual volumetric video coding (V3C) bitstream. For some embodiments of the example process 800, the V3Cbitstream may include one or more raw byte payload (RBSP) bits. For some embodiments of the example process 800, the RBSP bits may include one or more stop bits; For some embodiments, the example process 800 may further include determining a location of a start of the one or more stop bits within the RBSP bits. For some embodiments, the example process 800 may further include determining 806 a codec used to encode the RBSP bits based on the determined location. For some embodiments, the example process 800 may further decoding 808 the RBSP bits using the determined codec.

[0163] FIG. 9 is a flowchart illustrating an example process for decoding a bitstream according to some embodiments. For some embodiments, an example process 900 may include obtaining 902 a bitstream. For some embodiments of the example process 900, the bitstream may include one or more payload bits. For some embodiments of the example process 900, the payload bits may include one or more stop bits; For some embodiments, the example process 900 may further include determining 904 a location of a first bit of the one or more stop bits. For some embodiments, the example process 900 may further include determining 906 a codec used to encode the payload bits based on the determined location. For some embodiments, the example process 900 may further decoding 908 the payload bits using the determined codec.

[0164] While the methods and systems in accordance with some embodiments are generally discussed in context of extended reality (XR), some embodiments may be applied to any XR contexts such as, e.g., virtual reality (VR) / mixed reality (MR) / augmented reality (AR) contexts. Also, although the term "head mounted display (HMD)” is used herein in accordance with some embodiments, some embodiments may be applied to a wearable device (which may or may not be attached to the head) capable of, e.g., XR, VR, AR, and / or MR for some embodiments.

[0165] A first example method in accordance with some embodiments may include: obtaining a visual volumetric video coding (V3C) bitstream, wherein the V3C bitstream includes one or more raw byte payload (RBSP) bits, and wherein the RBSP bits include one or more stop bits; determining a location of a start of the one or more stop bits within the RBSP bits; determining a codec used to encode the RBSP bits based on the determined location; and decoding the RBSP bits using the determined codec.

[0166] Some embodiments of the first example method may further include determining a size of the RBSP bits, wherein determining the codec is further based on the determined size of the RBSP bits.

[0167] In some embodiments of the first example method, determining the size of the RBSP bits includes: obtaining a Network Abstraction Layer (NAL) unit size; obtaining a submesh header size; determining a quantity of the one or more stop bits; and subtracting the submesh header size and the quantity of the one or more stop bits from the NAL unit size to obtain the size of the RBSP bits.

[0168] In some embodiments of the first example method, obtaining the NAL unit size includes: obtaining a submesh type corresponding to the bitstream; and using the submesh type to determine the NAL unit size.

[0169] Some embodiments of the first example method may further include extracting a string of one or more data bits from the RBSP bits, wherein decoding the RBSP bits is further based on the extracted string of one or more data bits.

[0170] In some embodiments of the first example method, determining the codec is further based on the extracted string of one or more data bits.

[0171] Some embodiments of the first example method may further include: extracting the RBSP bits from the V3C bitstream; and removing the one or more stop bits from the RBSP bits.

[0172] In some embodiments of the first example method, the codec is selected from the group consisting of an intra mesh codec and an inter mesh codec.

[0173] Some embodiments of the first example method may further include: extracting one or more header bits from the V3C bitstream; and determining the codec based on the extracted one or more header bits.

[0174] In some embodiments of the first example method, determining the location of the start of the one or more stop bits within the RBSP bits includes: determining a location of a last bit equal to one within the RBSP bits ; and setting the location of the start of the one or more stop bits to be equal to the determined location of the last bit equal to one.

[0175] In some embodiments of the first example method, determining the location of the last bit equal to one within the V3C bitstream includes searching within the RBSP bits for the last bit equal to one within the RBSP bits .

[0176] A first example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0177] A second example method in accordance with some embodiments may include: obtaining a visual volumetric video coding (V3C) bitstream, wherein the V3C bitstream includes one or more raw byte payload (RBSP) bits, and wherein the RBSP bits include one or more stop bits; determining a size of the RBSP bits; determining a codec used to encode the RBSP bits based on the determined size of the RBSP bits; and decoding the RBSP bits using the determined codec.

[0178] In some embodiments of the second example method, determining the size of the RBSP bits includes: obtaining an NAL unit size; obtaining a submesh header size; determining a quantity of the one ormore stop bits; and subtracting the submesh header size and the quantity of the one or more stop bits from the NAL unit size to obtain the size of the RBSP bits.

[0179] In some embodiments of the second example method, obtaining the NAL unit size includes: obtaining a submesh type corresponding to the bitstream; and using the submesh type to determine the NAL unit size.

[0180] Some embodiments of the second example method may further include extracting a string of one or more data bits from the RBSP bits, wherein decoding the RBSP bits is further based on the extracted string of one or more data bits.

[0181] In some embodiments of the second example method, determining the codec is further based on the extracted string of one or more data bits.

[0182] Some embodiments of the second example method may further include: extracting the RBSP bits from the V3C bitstream; and removing the one or more stop bits from the RBSP bits.

[0183] In some embodiments of the second example method, the codec is selected from the group consisting of an intra mesh codec and an inter mesh codec.

[0184] Some embodiments of the second example method may further include: extracting one or more header bits from the V3C bitstream; and determining the codec based on the extracted one or more header bits.

[0185] Some embodiments of the second example method may further include determining a location of the start of the one or more stop bits within the RBSP bits, wherein determining the location of the start of the one or more stop bits within the RBSP bits includes: determining a location of a last bit equal to one within the RBSP bits; and setting the location of the start of the one or more stop bits to be equal to the determined location of the last bit equal to one.

[0186] In some embodiments of the second example method, determining the location of the last bit equal to one within the RBSP bits includes searching within the RBSP bits for the last bit equal to one within the bitstream.

[0187] A second example apparatus in accordance with some embodiments may include: a processor; and non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0188] A third example method in accordance with some embodiments may include: obtaining a bitstream, wherein the bitstream includes one or more payload bits, and wherein the payload bits include one or morestop bits; determining a location of a first bit of the one or more stop bits; determining a size of the payload bits based on the location of the first bit of the one or more stop bits; determining a codec used to encode the payload bits based on the determined size of the payload bits; and decoding the payload bits using the determined codec.

[0189] A third example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0190] A fourth example method in accordance with some embodiments may include: obtaining a bitstream, wherein the bitstream includes one or more payload bits, and wherein the payload bits include one or more stop bits; determining a location of a first bit of the one or more stop bits; determining a codec used to encode the payload bits based on the determined location; and decoding the payload bits using the determined codec.

[0191] A fifth example method in accordance with some embodiments may include extracting a coded mesh payload from a basemesh bitstream, the coded mesh payload having been encoded into the basemesh bitstream using a codec, wherein the extraction of the coded mesh payload operates independently of the codec used to encode the coded mesh payload.

[0192] A fifth example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0193] A sixth example method in accordance with some embodiments may include: obtaining a codec to be used to encode one or more raw byte payload (RBSP) bits; obtaining a location of a start of the one or more stop bits within the RBSP bits; and encoding a visual volumetric video coding (V3C) bitstream using the obtained codec and the obtained location, wherein the V3C bitstream includes the one or more raw byte payload (RBSP) bits, and wherein the RBSP bits include one or more stop bits.

[0194] A sixth example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0195] A seventh example apparatus in accordance with some embodiments may include at least one processor configured to perform any one of the methods listed above.

[0196] An eighth example apparatus in accordance with some embodiments may include a computer- readable medium storing instructions for causing one or more processors to perform any one of the methods listed above.

[0197] A ninth example apparatus in accordance with some embodiments may include at least one processor and at least one non-transitory computer-readable medium storing instructions for causing the at least one processor to perform any one of the methods listed above.

[0198] An example signal in accordance with some embodiments may include a bitstream obtained according to any one of the methods listed above.

[0199] An example method of encoding a bitstream in accordance with some embodiments according to any one of the methods listed above.

[0200] A first example method in accordance with some embodiments may include: obtaining a visual volumetric video coding (V3C) bitstream, wherein the V3C bitstream includes one or more raw byte payload (RBSP) bits, and wherein the RBSP bits include one or more stop bits; determining a location of a start of the one or more stop bits within the RBSP bits; determining a codec used to encode the RBSP bits based on the determined location; and decoding the RBSP bits using the determined codec.

[0201] Some embodiments of the first example method may further include determining a size of the RBSP bits, wherein determining the codec is further based on the determined size of the RBSP bits.

[0202] For some embodiments of the first example method, determining the size of the RBSP bits may include: obtaining an NAL unit size; obtaining a submesh header size; determining a quantity of the one or more stop bits; and subtracting the submesh header size and the quantity of the one or more stop bits from the NAL unit size to obtain the size of the RBSP bits.

[0203] For some embodiments of the first example method, obtaining the NAL unit size may include: obtaining a submesh type corresponding to the bitstream; and using the submesh type to determine the NAL unit size.

[0204] Some embodiments of the first example method may further include extracting a string of one or more data bits (from the RBSP bits, wherein decoding the RBSP bits is further based on the extracted string of one or more data bits.

[0205] For some embodiments of the first example method, determining the codec is further based on the extracted string of one or more data bits.

[0206] Some embodiments of the first example method may further include: extracting the RBSP bits from the V3C bitstream; and removing the one or more stop bits from the RBSP bits.

[0207] For some embodiments of the first example method, the codec is selected from the group including an intra mesh codec and an inter mesh codec.

[0208] Some embodiments of the first example method may further include: extracting one or more header bits from the V3C bitstream; and determining the codec based on the extracted one or more header bits.

[0209] For some embodiments of the first example method, determining the location of the start of the one or more stop bits within the RBSP bits may include: determining a location of a last bit equal to one within the RBSP bits ; and setting the location of the start of the one or more stop bits to be equal to the determined location of the last bit equal to one.

[0210] For some embodiments of the first example method, determining the location of the last bit equal to one within the V3C bitstream includes searching within the RBSP bits for the last bit equal to one within the RBSP bits .

[0211] A first example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0212] A second example method in accordance with some embodiments may include: obtaining a visual volumetric video coding (V3C) bitstream, wherein the V3C bitstream includes one or more raw byte payload (RBSP) bits, and wherein the RBSP bits include one or more stop bits; determining a size of the RBSP bits; determining a codec used to encode the RBSP bits based on the determined size of the RBSP bits; and decoding the RBSP bits using the determined codec.

[0213] For some embodiments of the second example method, wherein determining the size of the RBSP bits may include: obtaining an NAL unit size; obtaining a submesh header size; determining a quantity of the one or more stop bits; and subtracting the submesh header size and the quantity of the one or more stop bits from the NAL unit size to obtain the size of the RBSP bits.

[0214] For some embodiments of the second example method, obtaining the NAL unit size may include: obtaining a submesh type corresponding to the bitstream; and using the submesh type to determine the NAL unit size.

[0215] Some embodiments of the second example method may further include: extracting a string of one or more data bits from the RBSP bits, wherein decoding the RBSP bits is further based on the extracted string of one or more data bits.

[0216] For some embodiments of the second example method, determining the codec is further based on the extracted string of one or more data bits.

[0217] Some embodiments of the second example method may further include: extracting the RBSP bits from the V3C bitstream; and removing the one or more stop bits from the RBSP bits.

[0218] For some embodiments of the second example method, the codec is selected from the group including an intra mesh codec and an inter mesh codec.

[0219] Some embodiments of the second example method may further include: extracting one or more header bits from the V3C bitstream; and determining the codec based on the extracted one or more header bits.

[0220] Some embodiments of the second example method may further include: determining a location of the start of the one or more stop bits within the RBSP bits. For some embodiments of the second example method, determining the location of the start of the one or more stop bits within the RBSP bits may include: determining a location of a last bit equal to one within the RBSP bits; and setting the location of the start of the one or more stop bits to be equal to the determined location of the last bit equal to one.

[0221] For some embodiments of the second example method, determining the location of the last bit equal to one within the RBSP bits may include searching within the RBSP bits for the last bit equal to one within the bitstream.

[0222] A second example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0223] A third example method in accordance with some embodiments may include: obtaining a bitstream, wherein the bitstream includes one or more payload bits, and wherein the payload bits include one or more stop bits; determining a location of a first bit of the one or more stop bits; determining a size of the payload bits based on the location of the first bit of the one or more stop bits; determining a codec used to encode the payload bits based on the determined size of the payload bits; and decoding the payload bits using the determined codec.

[0224] A third example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0225] A fourth example method in accordance with some embodiments may include: obtaining a bitstream, wherein the bitstream includes one or more payload bits, and wherein the payload bits include one or more stop bits; determining a location of a first bit of the one or more stop bits; determining a codec used to encode the payload bits based on the determined location; and decoding the payload bits using the determined codec.

[0226] A fifth example method in accordance with some embodiments may include extracting a coded mesh payload from a basemesh bitstream, the coded mesh payload having been encoded into the basemesh bitstream using a codec, wherein the extraction of the coded mesh payload operates independently of the codec used to encode the coded mesh payload.

[0227] A fifth example apparatus in accordance with some embodiments may include: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform any one of the methods listed above.

[0228] A sixth example apparatus in accordance with some embodiments may include at least one processor configured to perform any one of the methods listed above.

[0229] A seventh example apparatus in accordance with some embodiments may include a computer- readable medium storing instructions for causing one or more processors to perform the method of any one of the methods listed above.

[0230] An eighth example apparatus in accordance with some embodiments may include at least one processor and at least one non-transitory computer-readable medium storing instructions for causing the at least one processor to perform any one of the methods listed above.

[0231] An example signal in accordance with some embodiments may include a bitstream obtained according to any one of the methods listed above.

[0232] An example method of encoding a bitstream in accordance with some embodiments may be according to any one of the methods listed above.

[0233] This disclosure describes a variety of aspects, including tools, features, embodiments, models, approaches, etc. Many of these aspects are described with specificity and, at least to show the individual characteristics, are often described in a manner that may sound limiting. However, this is for purposes ofclarity in description, and does not limit the disclosure or scope of those aspects. Indeed, all of the different aspects can be combined and interchanged to provide further aspects. Moreover, the aspects can be combined and interchanged with aspects described in earlier filings as well.

[0234] The aspects described and contemplated in this disclosure can be implemented in many different forms. While some embodiments are illustrated specifically, other embodiments are contemplated, and the discussion of particular embodiments does not limit the breadth of the implementations. At least one of the aspects generally relates to video encoding and decoding, and at least one other aspect generally relates to transmitting a bitstream generated or encoded. These and other aspects can be implemented as a method, an apparatus, a computer readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the methods described, and / or a computer readable storage medium having stored thereon a bitstream generated according to any of the methods described.

[0235] In the present disclosure, the terms "reconstructed” and "decoded” may be used interchangeably, the terms "pixel” and "sample” may be used interchangeably, the terms "image,” "picture” and "frame” may be used interchangeably. Usually, but not necessarily, the term "reconstructed” is used at the encoder side while "decoded” is used at the decoder side.

[0236] The terms HDR (high dynamic range) and SDR (standard dynamic range) often convey specific values of dynamic range to those of ordinary skill in the art. However, additional embodiments are also intended in which a reference to HDR is understood to mean "higher dynamic range” and a reference to SDR is understood to mean "lower dynamic range.” Such additional embodiments are not constrained by any specific values of dynamic range that might often be associated with the terms "high dynamic range” and "standard dynamic range.”

[0237] Various methods are described herein, and each of the methods includes one or more steps or actions for achieving the described method. Unless a specific order of steps or actions is required for proper operation of the method, the order and / or use of specific steps and / or actions may be modified or combined. Additionally, terms such as "first”, "second”, etc. may be used in various embodiments to modify an element, component, step, operation, etc., such as, for example, a "first decoding” and a "second decoding”. Use of such terms does not imply an ordering to the modified operations unless specifically required. So, in this example, the first decoding need not be performed before the second decoding, and may occur, for example, before, during, or in an overlapping time period with the second decoding.

[0238] Various numeric values may be used in the present disclosure, for example. The specific values are for example purposes and the aspects described are not limited to these specific values.

[0239] Embodiments described herein may be carried out by computer software implemented by a processor or other hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments can be implemented by one or more integrated circuits. The processor can be of any type appropriate to the technical environment and can encompass one or more of microprocessors, general purpose computers, special purpose computers, and processors based on a multi-core architecture, as nonlimiting examples.

[0240] Various implementations involve decoding. "Decoding”, as used in this disclosure, can encompass all or part of the processes performed, for example, on a received encoded sequence in order to produce a final output suitable for display. In various embodiments, such processes include one or more of the processes typically performed by a decoder, for example, entropy decoding, inverse quantization, inverse transformation, and differential decoding. In various embodiments, such processes also, or alternatively, include processes performed by a decoder of various implementations described in this disclosure, for example, extracting a picture from a tiled (packed) picture, determining an upsampling filter to use and then upsampling a picture, and flipping a picture back to its intended orientation.

[0241] As further examples, in one embodiment "decoding” refers only to entropy decoding, in another embodiment "decoding” refers only to differential decoding, and in another embodiment "decoding” refers to a combination of entropy decoding and differential decoding. Whether the phrase "decoding process” is intended to refer specifically to a subset of operations or generally to the broader decoding process will be clear based on the context of the specific descriptions.

[0242] Various implementations involve encoding. In an analogous way to the above discussion about "decoding”, "encoding” as used in this disclosure can encompass all or part of the processes performed, for example, on an input video sequence in order to produce an encoded bitstream. In various embodiments, such processes include one or more of the processes typically performed by an encoder, for example, partitioning, differential encoding, transformation, quantization, and entropy encoding. In various embodiments, such processes also, or alternatively, include processes performed by an encoder of various implementations described in this disclosure.

[0243] As further examples, in one embodiment "encoding” refers only to entropy encoding, in another embodiment "encoding” refers only to differential encoding, and in another embodiment "encoding” refers to a combination of differential encoding and entropy encoding. Whether the phrase "encoding process” is intended to refer specifically to a subset of operations or generally to the broader encoding process will be clear based on the context of the specific descriptions.

[0244] When a figure is presented as a flow diagram, it should be understood that it also provides a block diagram of a corresponding apparatus. Similarly, when a figure is presented as a block diagram, it should be understood that it also provides a flow diagram of a corresponding method / process.

[0245] Various embodiments refer to rate distortion optimization. In particular, during the encoding process, the balance or trade-off between the rate and distortion is usually considered, often given the constraints of computational complexity. The rate distortion optimization is usually formulated as minimizing a rate distortion function, which is a weighted sum of the rate and of the distortion. There are different approaches to solve the rate distortion optimization problem. For example, the approaches may be based on an extensive testing of all encoding options, including all considered modes or coding parameters values, with a complete evaluation of their coding cost and related distortion of the reconstructed signal after coding and decoding. Faster approaches may also be used, to save encoding complexity, in particular with computation of an approximated distortion based on the prediction or the prediction residual signal, not the reconstructed one. A mix of these two approaches can also be used, such as by using an approximated distortion for only some of the possible encoding options, and a complete distortion for other encoding options. Other approaches only evaluate a subset of the possible encoding options. More generally, many approaches employ any of a variety of techniques to perform the optimization, but the optimization is not necessarily a complete evaluation of both the coding cost and related distortion.

[0246] The implementations and aspects described herein can be implemented in, for example, a method or a process, an apparatus, a software program, a data stream, or a signal. Even if only discussed in the context of a single form of implementation (for example, discussed only as a method), the implementation of features discussed can also be implemented in other forms (for example, an apparatus or program). An apparatus can be implemented in, for example, appropriate hardware, software, and firmware. The methods can be implemented in, for example, a processor, which refers to processing devices in general, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include communication devices, such as, for example, computers, cell phones, portable / personal digital assistants ("PDAs”), and other devices that facilitate communication of information between end-users.

[0247] Reference to "one embodiment” or "an embodiment” or "one implementation” or "an implementation”, as well as other variations thereof, means that a particular feature, structure, characteristic, and so forth described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of the phrase "in one embodiment” or "in an embodiment” or "in one implementation” or "in an implementation”, as well any other variations, appearing in various places throughout this disclosure are not necessarily all referring to the same embodiment.

[0248] Additionally, this disclosure may refer to "determining” various pieces of information. Determining the information can include one or more of, for example, estimating the information, calculating the information, predicting the information, or retrieving the information from memory.

[0249] Further, this disclosure may refer to "accessing” various pieces of information. Accessing the information can include one or more of, for example, receiving the information, retrieving the information (for example, from memory), storing the information, moving the information, copying the information, calculating the information, determining the information, predicting the information, or estimating the information.

[0250] Additionally, this disclosure may refer to "receiving” various pieces of information. Receiving is, as with "accessing”, intended to be a broad term. Receiving the information can include one or more of, for example, accessing the information, or retrieving the information (for example, from memory). Further, "receiving” is typically involved, in one way or another, during operations such as, for example, storing the information, processing the information, transmitting the information, moving the information, copying the information, erasing the information, calculating the information, determining the information, predicting the information, or estimating the information.

[0251] It is to be appreciated that the use of any of the following “ / ”, "and / or”, and "at least one of, for example, in the cases of “A / B”, "A and / or B” and "at least one of A and B”, is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of both options (A and B). As a further example, in the cases of "A, B, and / or C” and "at least one of A, B, and C”, such phrasing is intended to encompass the selection of the first listed option (A) only, or the selection of the second listed option (B) only, or the selection of the third listed option (C) only, or the selection of the first and the second listed options (A and B) only, or the selection of the first and third listed options (A and C) only, or the selection of the second and third listed options (B and C) only, or the selection of all three options (A and B and C). This may be extended for as many items as are listed.

[0252] Also, as used herein, the word "signal” refers to, among other things, indicating something to a corresponding decoder. For example, in certain embodiments the encoder signals a particular one of a plurality of parameters for region-based filter parameter selection for de-artifact filtering. In this way, in an embodiment the same parameter is used at both the encoder side and the decoder side. Thus, for example, an encoder can transmit (explicit signaling) a particular parameter to the decoder so that the decoder can use the same particular parameter. Conversely, if the decoder already has the particular parameter as well as others, then signaling can be used without transmitting (implicit signaling) to simply allow the decoder to know and select the particular parameter. By avoiding transmission of any actual functions, a bit savings is realized in various embodiments. It is to be appreciated that signaling can be accomplished in a variety ofways. For example, one or more syntax elements, flags, and so forth are used to signal information to a corresponding decoder in various embodiments. While the preceding relates to the verb form of the word "signal”, the word "signal” can also be used herein as a noun.

[0253] Implementations can produce a variety of signals formatted to carry information that can be, for example, stored or transmitted. The information can include, for example, instructions for performing a method, or data produced by one of the described implementations. For example, a signal can be formatted to carry the bitstream of a described embodiment. Such a signal can be formatted, for example, as an electromagnetic wave (for example, using a radio frequency portion of spectrum) or as a baseband signal. The formatting can include, for example, encoding a data stream and modulating a carrier with the encoded data stream. The information that the signal carries can be, for example, analog or digital information. The signal can be transmitted over a variety of different wired or wireless links, as is known. The signal can be stored on a processor-readable medium.

[0254] We describe a number of embodiments. Features of these embodiments can be provided alone or in any combination, across various claim categories and types. Further, embodiments can include one or more of the following features, devices, or aspects, alone or in any combination, across various claim categories and types:• Adapting residues at an encoder according to any of the embodiments discussed.• A bitstream or signal that includes one or more of the described syntax elements, or variations thereof.• A bitstream or signal that includes syntax conveying information generated according to any of the embodiments described.• Inserting in the signaling syntax elements that enable the decoder to adapt residues in a manner corresponding to that used by an encoder.• Creating and / or transmitting and / or receiving and / or decoding a bitstream or signal that includes one or more of the described syntax elements, or variations thereof.• Creating and / or transmitting and / or receiving and / or decoding according to any of the embodiments described.• A method, process, apparatus, medium storing instructions, medium storing data, or signal according to any of the embodiments described.• A TV, set-top box, cell phone, tablet, or other electronic device that performs adaptation of filter parameters according to any of the embodiments described.• A TV, set-top box, cell phone, tablet, or other electronic device that performs adaptation of filter parameters according to any of the embodiments described, and that displays (e.g. using a monitor, screen, or other type of display) a resulting image.• A TV, set-top box, cell phone, tablet, or other electronic device that selects (e.g. using a tuner) a channel to receive a signal including an encoded image, and performs adaptation of filter parameters according to any of the embodiments described.• A TV, set-top box, cell phone, tablet, or other electronic device that receives (e.g. using an antenna) a signal over the air that includes an encoded image, and performs adaptation of filter parameters according to any of the embodiments described.

[0255] Note that various hardware elements of one or more of the described embodiments are referred to as "modules” that carry out (i.e., perform, execute, and the like) various functions that are described herein in connection with the respective modules. As used herein, a module includes hardware (e.g., one or more processors, one or more microprocessors, one or more microcontrollers, one or more microchips, one or more application-specific integrated circuits (ASICs), one or more field programmable gate arrays (FPGAs), one or more memory devices) deemed suitable by those of skill in the relevant art for a given implementation. Each described module may also include instructions executable for carrying out the one or more functions described as being carried out by the respective module, and it is noted that those instructions could take the form of or include hardware (i.e., hardwired) instructions, firmware instructions, software instructions, and / or the like, and may be stored in any suitable non-transitory computer-readable medium or media, such as commonly referred to as RAM, ROM, etc.

[0256] Although features and elements are described above in particular combinations, one of ordinary skill in the art will appreciate that each feature or element can be used alone or in any combination with the other features and elements. In addition, the methods described herein may be implemented in a computer program, software, or firmware incorporated in a computer-readable medium for execution by a computer or processor. Examples of computer-readable storage media include, but are not limited to, a read only memory (ROM), a random access memory (RAM), a register, cache memory, semiconductor memory devices, magnetic media such as internal hard disks and removable disks, magneto-optical media, and optical media such as CD-ROM disks, and digital versatile disks (DVDs). A processor in association with software may be used to implement a radio frequency transceiver for use in a WTRU, UE, terminal, base station, RNC, or any host computer.

Claims

CLAIMS1. A method comprising: obtaining a visual volumetric video coding (V3C) bitstream, wherein the V3C bitstream comprises one or more raw byte payload (RBSP) bits, and wherein the RBSP bits comprise one or more stop bits; determining a location of a start of the one or more stop bits within the RBSP bits; determining a codec used to encode the RBSP bits based on the determined location; and decoding the RBSP bits using the determined codec.

2. The method of claim 1 , further comprising: determining a size of the RBSP bits, wherein determining the codec is further based on the determined size of the RBSP bits.

3. The method of claim 2, wherein determining the size of the RBSP bits comprises: obtaining a Network Abstraction Layer (NAL) unit size; obtaining a submesh header size; determining a quantity of the one or more stop bits; and subtracting the submesh header size and the quantity of the one or more stop bits from the NAL unit size to obtain the size of the RBSP bits.

4. The method of claim 3, wherein obtaining the NAL unit size comprises: obtaining a submesh type corresponding to the bitstream; and using the submesh type to determine the NAL unit size.

5. The method of any one of claims 1-4, further comprising: extracting a string of one or more data bits from the RBSP bits, wherein decoding the RBSP bits is further based on the extracted string of one or more data bits.

6. The method of claim 5, wherein determining the codec is further based on the extracted string of one or more data bits.

7. The method of any one of claims 1-6, further comprising: extracting the RBSP bits from the V3C bitstream; and removing the one or more stop bits from the RBSP bits.

8. The method of any one of claims 1-7, wherein the codec is selected from the group consisting of an intra mesh codec and an inter mesh codec.

9. The method of any one of claims 1-8, further comprising: extracting one or more header bits from the V3C bitstream; and determining the codec based on the extracted one or more header bits.

10. The method of any one of claims 1-9, wherein determining the location of the start of the one or more stop bits within the RBSP bits comprises: determining a location of a last bit equal to one within the RBSP bits ; and setting the location of the start of the one or more stop bits to be equal to the determined location of the last bit equal to one.

11. The method of claim 10, wherein determining the location of the last bit equal to one within the V3C bitstream comprises searching within the RBSP bits for the last bit equal to one within the RBSP bits .

12. An apparatus comprising: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform the method of any one of claims 1 through 11 .

13. A method comprising: obtaining a visual volumetric video coding (V3C) bitstream, wherein the V3C bitstream comprises one or more raw byte payload (RBSP) bits, and wherein the RBSP bits comprise one or more stop bits; determining a size of the RBSP bits; determining a codec used to encode the RBSP bits based on the determined size of the RBSP bits; and decoding the RBSP bits using the determined codec.

14. The method of claim 13, wherein determining the size of the RBSP bits comprises: obtaining an NAL unit size; obtaining a submesh header size; determining a quantity of the one or more stop bits; and subtracting the submesh header size and the quantity of the one or more stop bits from the NAL unit size to obtain the size of the RBSP bits.

15. The method of claim 14, wherein obtaining the NAL unit size comprises: obtaining a submesh type corresponding to the bitstream; and using the submesh type to determine the NAL unit size.

16. The method of any one of claims 13-15, further comprising: extracting a string of one or more data bits from the RBSP bits, wherein decoding the RBSP bits is further based on the extracted string of one or more data bits.

17. The method of claim 16, wherein determining the codec is further based on the extracted string of one or more data bits.

18. The method of any one of claims 13-17, further comprising: extracting the RBSP bits from the V3C bitstream; and removing the one or more stop bits from the RBSP bits.

19. The method of any one of claims 13-18, wherein the codec is selected from the group consisting of an intra mesh codec and an inter mesh codec.

20. The method of any one of claims 13-19, further comprising: extracting one or more header bits from the V3C bitstream; and determining the codec based on the extracted one or more header bits.21 . The method of any one of claims 13-20, further comprising determining a location of the start of the one or more stop bits within the RBSP bits, wherein determining the location of the start of the one or more stop bits within the RBSP bits comprises: determining a location of a last bit equal to one within the RBSP bits; and setting the location of the start of the one or more stop bits to be equal to the determined location of the last bit equal to one.

22. The method of claim 21 , wherein determining the location of the last bit equal to one within the RBSP bits comprises searching within the RBSP bits for the last bit equal to one within the bitstream.

23. An apparatus comprising: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform the method of any one of claims 13 through 22.

24. A method comprising: obtaining a bitstream, wherein the bitstream comprises one or more payload bits, and wherein the payload bits comprise one or more stop bits; determining a location of a first bit of the one or more stop bits; determining a size of the payload bits based on the location of the first bit of the one or more stop bits; determining a codec used to encode the payload bits based on the determined size of the payload bits; and decoding the payload bits using the determined codec.

25. An apparatus comprising: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform the method of claim 24.

26. A method comprising: obtaining a bitstream, wherein the bitstream comprises one or more payload bits, and wherein the payload bits comprise one or more stop bits; determining a location of a first bit of the one or more stop bits; determining a codec used to encode the payload bits based on the determined location; and decoding the payload bits using the determined codec.

27. A method of extracting a coded mesh payload from a basemesh bitstream, the coded mesh payload having been encoded into the basemesh bitstream using a codec, wherein the extraction of the coded mesh payload operates independently of the codec used to encode the coded mesh payload.

28. An apparatus comprising: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform the method of claim 26.

29. A method comprising: obtaining a codec to be used to encode one or more raw byte payload (RBSP) bits;obtaining a location of a start of the one or more stop bits within the RBSP bits; and encoding a visual volumetric video coding (V3C) bitstream using the obtained codec and the obtained location, wherein the V3C bitstream comprises the one or more raw byte payload (RBSP) bits, and wherein the RBSP bits comprise one or more stop bits.

30. An apparatus comprising: a processor; and a non-transitory computer-readable medium storing instructions operative, when executed by the processor, to cause the apparatus to perform the method of claim 29.31 . An apparatus comprising at least one processor configured to perform the method of any one of claims1-11 , 13-22, 24, 26, 27, and 29.

32. An apparatus comprising a computer-readable medium storing instructions for causing one or more processors to perform the method of any one of claims 1-11 , 13-22, 24, 26, 27, and 29.

33. An apparatus comprising at least one processor and at least one non-transitory computer-readable medium storing instructions for causing the at least one processor to perform the method of any one of claims 1-11 , 13-22, 24, 26, 27, and 29.

34. A signal including a bitstream obtained according to any one of claims 1-11 , 13-22, 24, 26, 27, and 29.

35. A method of encoding a bitstream according to any one of claims 1-11 , 13-22, 24, 26, 27, and 29.

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