Quantum error correction syndrome processing

Abstract

A computer-implemented quantum error correction method performed by a decoding system of a quantum computing system is disclosed Syndrome data is received that is representative of an error state of quantum devices in the quantum computing system. The syndrome data comprises a string of trivial values and non-trivial values, wherein non-trivial values represent symptoms associated with the error state. An index associated with each symptom is determined by loading a chunk of the string into a register and iterating an index determination subroutine that comprises determining a count of continuous trivial values in the register, determining the index associated with the symptom represented by any non-trivial value adjacent to the contiguous trivial values, and shifting values in register based on the count of contiguous trivial values. The syndrome data is then decoded using the determined index associated with each symptom to determine a correction for the error state.

Description

[0001] QUANTUM ERROR CORRECTION SYNDROME PROCESSING

[0002] Field of the invention

[0003] The invention relates to quantum error correction syndrome processing.

[0004] Background

[0005] Quantum computers have the potential to perform computations that would be intractable on even the most powerful classical computers.

[0006] Instead of representing information using classical bits, quantum computers generally use qubits that can be in a simultaneous superposition of multiple quantum states. Qubits exhibit much higher error rates than the bits used in classical computers, and quantum computers therefore require the use of quantum error correction in order to identify and correct qubit errors. The inherently delicate nature of quantum states means that quantum error correction is likely to be necessary even once quantum computing technology matures.

[0007] Quantum decoding algorithms are employed to process error syndromes and determine likely error occurrences and / or corrections. These algorithms are typically deployed on classical computing hardware with restricted memory and / or processing capabilities. A more accurate decoder will be more effective at determining corrections to physical qubit errors, which will result in lower logical error rates. The decoder is therefore a key element in the overall performance of the quantum computer.

[0008] For full quantum advantage to be realised, decoders will have to be capable of rapidly decoding errors in quantum systems that have a large number of qubits, which places onerous runtime requirements on decoder memory and processing capabilities. The nature of many decoding methods means that certain subroutines are repeated many times when correcting errors. Any reduction in processor clock cycles in one of these subroutines is amplified to provide an enormous performance improvement to the decoder and, in turn, the quantum computer as a whole. There is therefore a need for improved decoding methods that reduce decoder runtime processing requirements.

[0009] Summary of the invention

[0010] According to a first aspect of the invention, there is provided a computer-implemented quantum error correction method performed by a decoding system of a quantum computing system, the method comprising: receiving syndrome data representative of an error state of quantum devices (such as qubits) in the quantum computing system, the syndrome data comprising a string of trivial values and non-trivial values, wherein non-trivial values represent symptoms associated with the error state; determining an index associated with each symptom by loading a chunk of the string into a register and iterating an index determination subroutine comprising: determining a count of contiguous trivial values in the register; if there is a non-trivial value adjacent to the contiguous trivial values, determining the index associated with the symptom represented by the non-trivial value adjacent to the contiguous trivial values; and shifting values in the register based on the count of contiguous trivial values; and decoding the syndrome data using the determined index associated with each symptom to determine a correction for the error state.

[0011] The syndrome string may be a bitstring of zero and one values, and the trivial values may be zero values and the non-trivial values may be one values. Alternatively, the role of the zero values and one values may be reversed, or non-binary values (e.g. integers other than 0 and 1 , or even other characters such as letters) may be used to represent the trivial and non-trivial values.

[0012] Syndrome strings are generally sparse (i.e. most values in the bitstring are trivial values) but long: the size of the string scales with the number of physical qubits and the number of rounds of error correction included in the syndrome. The sparsity occurs because fault- tolerant quantum computing requires low qubit error rates, so the majority of data qubits will be in an error-free state and there will be relatively few symptoms (the number of symptoms generally scales with the number of errors). Many decoding methods only require the indices of symptoms (i.e. the location of each non-trivial value in the syndrome string). Conventional methods of incrementally cycling through the string by a single value (e.g. single bit / character) per cycle to determine symptom indices scale with the size (length) of the string and waste a lot of time processing unimportant trivial values. Due to the large size of the string, this wasted time accounts for a significant number of processor cycles during the decoding process.

[0013] The method of the first aspect improves decoding performance by effectively skipping trivial values. The count of contiguous trivial values and register shifting can be performed in a single cycle, meaning that the number of cycles required to determine symptom indices in a syndrome string scales primarily with the number of symptoms (non-trivial values) in the string rather than the total length of the string. As syndrome strings are sparse and long, this approach provides substantial improvements to decoding speed. Consequently, the quantum computing system can be operated with lower logical error rates, thereby increasing the accuracy of quantum computations performed on the quantum computing system.

[0014] The method of the first aspect operates at the architecture level of the quantum computer (the error correction occurs at the architecture level and is independent of the data being processed / applications being run) and makes the quantum computer run more efficiently and effectively as a computer (due to reduced logical error rates). A string is a sequence of values (which may also be referred to as characters). A bitstring is a sequence of binary digits. A chunk of a string is a subsequence of values of the string (the subsequence / chunk may optionally include the entire string, although chunks will generally be smaller than the string). The chunk may also be referred to as a substring.

[0015] The syndrome data comprise only the string (i.e. the syndrome data may be the string), or the syndrome data may include additional information such as measurement values or confidence intervals.

[0016] The symptoms in the syndrome data act as a signature of the error state (errors qubit errors manifest as symptoms when performing quantum error correction).

[0017] Various methods can be used to decode syndrome data using symptom indices. For example, a minimum-weight-perfect-matching algorithm or a clustering algorithm could be used to pair / group symptoms when using surface code error correction. The details how the syndrome data is decoded based on the indices can be performed using known techniques, and a person skilled in the art will select a suitable decoding technique depending upon the type of quantum error correction code being performed.

[0018] The decoding system is preferably a classical system comprising a classical processor configured to perform the method steps of the first aspect.

[0019] The method may further comprise splitting the string into chunks, wherein the index determination subroutine is iterated for each of the chunks. A chunk counter may optionally be maintained. The chunk counter indicates the index of the current chunk. The chunks are preferably non-overlapping and preferably have equal length.

[0020] The index determination subroutine may further comprise maintaining a position counter. The index of the symptom adjacent to the contiguous trivial values may be determined based on the position counter. The position counter may indicate (i.e. represent or be equal to) a current index position within the current chunk or within the string.

[0021] The index determination subroutine may further comprise incrementing (increasing the value of) the position counter using the count of contiguous trivial values. For example, the position counter may be incremented by at least the number of contiguous trivial values (e.g. by the number of contiguous trivial values plus one).

[0022] The index of the symptom adjacent to the contiguous trivial values may optionally be determined based on an offset value. The offset value may indicate the position of the chunk within the string and is preferably equal to the string index of the first value in the chunk. The offset value may either be calculated dynamically (e.g. based on the chunk counter and the number of values per chunk), maintained across the index determination subroutines (e.g. starting at zero and increasing by the number of values per chunk after each chunk has been processed), or used implicitly (e.g. the position counter may be set equal to the offset value when processing each chunk and the position counter may indicate a position within the overall string rather than within the chunk).

[0023] Determining the index of the symptom adjacent to the contiguous trivial values may optionally comprise summing the offset value and the position counter (optionally with other values in the summation, e.g. the sum of the offset value and position counter minus one). Alternatively, where an offset value is not explicitly used (e.g. where the position counter indicates the position within the string) the index of the symptom may be equal to one less than the value of the position counter.

[0024] Shifting the register based on the count of contiguous trivial values may comprise shifting the register by the count of contiguous trivial values plus one.

[0025] The register may be a multi-shift register, such as a barrel shifter. Alternatively, values in the register may be shifted using one or more multiplexers.

[0026] The count of contiguous trivial values may be determined using a leading zero counter. The contiguous trivial values may be leading zeros.

[0027] Alternatively, the count of contiguous trivial values may be determined using a plurality of fixed-length value sequences (also referred to as windows) in the chunk. For example, the count of contiguous trivial values may be determined using OR-reduction on each fixed- length value sequence. An OR-reduction is an operation on a string (or substring) that returns a trivial value (e.g. a zero value) if all values in the string (or substring) are trivial, and otherwise returns a non-trivial value (e.g. a one value).

[0028] The fixed-length value sequences are preferably processed in descending order by length, wherein the count of contiguous trivial values is determined to be the length of a longest value sequence of the fixed-length value sequences that contains only trivial value. Processing the value sequences in descending order by length is faster for sparse strings because it avoids unnecessary processing shorter value sequences (windows), which will generally contain all trivial values in most cases (because most values in the sparse string are trivial).

[0029] The quantum devices are preferably qubits, but they may also be quantum devices with additional states, such as qutrits or qudits.

[0030] According to a second aspect of the invention, there is provided a decoding system configured to perform the method of the first aspect. The decoding system may comprise a classical processor configured to perform the method the first aspect.

[0031] According to a third aspect of the invention, there is provided a computer-readable storage medium comprising instructions which, when executed by a decoding system, cause the decoding system to carry out the method of the first aspect. The computer-readable storage medium may be a non-transitory computer-readable storage medium.

[0032] The second and third aspects of the invention provide the same benefits as the first aspect of the invention.

[0033] Brief description of the drawings

[0034] Examples of the present invention will now be described in detail with reference to the accompanying drawings, in which:

[0035] Fig. 1 is a schematic of a quantum computing system;

[0036] Fig. 2 is a flowchart of a method for determining indices in a bitstring;

[0037] Fig. 3 shows examples of register states;

[0038] Fig. 4 is a flowchart of another method for determining indices in a bitstring;

[0039] Figs. 5a-d show further examples of register states; and

[0040] Fig. 6 is a flowchart of a quantum error correction method.

[0041] Detailed description

[0042] Quantum error correction (QEC) algorithms are used to detect and correct errors at the physical qubit level to mitigate against computational errors at the logical qubit level. QEC is expected to be essential for performing useful computations on early quantum computers, and the delicate nature of qubits means that QEC is likely to remain necessary even once quantum computing hardware matures.

[0043] The goal of QEC is to reduce the effect of noise within a quantum computer: building in redundancies to protect fragile quantum systems. This is achieved with QEC codes that encode a number of logical qubits (one or more) into a larger number of physical qubits. If the error rate of these physical qubits is below a certain threshold associated with the QEC code being used, the logical qubits will exhibit a reduced effective error rate compared to the error rate experienced by the physical qubits. Simply put, each logical qubit will outperform the sum of its parts.

[0044] The present disclosure focuses on quantum decoding. By interacting (non-destructively) with the encoded quantum state via auxiliary qubits (i.e. additional physical qubits that do not themselves encode logical states), it is possible to determine the signature of errors that have affected the logical state; this signature is known as the error syndrome. This process of obtaining this error syndrome, known as syndrome extraction, provides only partial information. As such, decoding algorithms are employed to determine most likely error occurrences and / or corrections (some decoding algorithms, such as some clustering algorithms, can determine a correction without determining likely error occurrences). These algorithms are typically deployed on classical computing hardware with restricted memory and / or processing capabilities. The output of a decoder is a probabilistic prediction. Given the syndrome observed, the decoder outputs a best guess for the error that caused it, or alternatively a likely correction that will correct the error. A given family of error correction codes may have a variety of decoding algorithms to choose from; selecting the decoder is a balance between accuracy, speed, and compute budget for decoding. A more accurate decoder will be more effective at producing a best guess for errors and corrections, and this will result in improved logical accuracy of the quantum computation. The decoder is therefore a key element in the performance of the QEC protocol (and therefore the quantum computation as a whole).

[0045] A schematic of an exemplary quantum computing system 100 for performing the method of the present disclosure is shown in Fig. 1. The quantum computing system 100 comprises a plurality of physical qubits 106 (unless specified otherwise, reference herein to qubits should be understood to refer to physical qubits rather than logical qubits). The qubits 106 may include data qubits used to encode logical qubit states, and auxiliary qubits (or syndrome qubits) used to perform syndrome measurements for QEC.

[0046] The qubits 106 are controlled by a classical control system 104. The control system 104 transmits control signals to the qubits 106 for performing operations on the qubits 106 (including measurement operations) and receives measurement information from the qubits 106. The measurement information will generally be analogue data signals, although the analogue signals may alternatively be converted to digital signals before being transmitted to the control system 104 in some implementations (e.g. the qubits 106 may be provided with one or more analogue to digital converters).

[0047] The control system 104 may receive high-level instructions from an algorithmic system or similar (not shown) and convert these high-level instructions (such as logic gates) into low- level qubit instructions (e.g. microwave pulses etc.), which may be in analogue format.

[0048] The quantum computing system 100 also comprises a decoding system 102 (also referred to herein as a decoder). The decoding system 102, which is generally a classical computing system, receives an error syndrome (also referred to as syndrome data) obtained from measurements of syndrome qubits. The error syndrome may comprise raw analogue measurement data, or it may alternatively be pre-processed (e.g. into digital format) by the control system 104. The decoding system 102 may be connected to the control system 104 and receive the error syndrome via the control system 104 as illustrated in Fig. 1 (potentially via one or more additional intermediary systems), or in alternative examples the decoding system 102 may be connected directly to the qubits 106 and receive the error syndrome from the qubits 106 (e.g. as raw analogue signals). The decoding system 102 uses a decoding process / algorithm to decode the error syndrome to determine a correction for an error state of the qubits 106 associated with the error syndrome (i.e. an error state that causes the measured error syndrome). One skilled in the art will appreciate that the quantum computing system 100 may also comprise additional intermediary components positioned between the illustrated components, and that the illustrated components may be connected in a different configuration (e.g. the decoding system 102 may be connected directly to the qubits 106 as previously described).

[0049] Error syndromes are often represented as bitstrings, which are ordered sequences (strings) of zero values and one values (bits). A one value in the bitstring represents a symptom. The position of symptoms (which may also be referred to as defects or detection events) in the bitstring provides a signature of an error state physical qubits 106 in the quantum computing system 100. In some QEC codes (such as surface codes), symptoms are associated with the ends of chains of errors and are generally indicative of a change in the value of a syndrome qubit measurement between successive rounds of syndrome measurement. However, one skilled in the art will appreciate that the nuances of symptom causes will vary between different QEC codes.

[0050] Syndrome bitstrings are generally sparse (i.e. they contain mostly zero values) but long: the size of the bitstring scales with the number of physical qubits and the number of rounds of error correction included in the syndrome. This is because fault-tolerant quantum computing requires low qubit error rates, so the majority of data qubits will be in an error-free state and there will be relatively few symptoms. Many decoding methods only require the index of the symptoms (i.e. the location of each one value in the syndrome bitstring). Conventional methods of incrementally cycling through the bitstring by a single bit per cycle to determine symptom indices therefore spend a lot of time processing unimportant zero values. Due to the large size of the bitstring, this accounts for a significant number of processor cycles during the decoding process.

[0051] The present invention improves decoding performance through the use of a by effectively skipping trivial values. The value skipping procedure can be performed in a single processor cycle, meaning that the number of cycles required to determine symptom indices in a syndrome bitstring scales primarily with the number of symptoms rather than the total length of the bitstring. As syndrome bitstrings are sparse and long, this approach provides substantial improvements to decoding speed.

[0052] Fig. 2 shows an example of a method for determining indices of one values (e.g. symptoms) in a bitstring by using a multi-shift register in combination with a leading zero counter (LZC). The present disclosure follows the convention that indices are counted from zero (i.e. the first element of a list of elements, such as a bitstring or bitstring chunk, has index zero). However, the methods described herein can also be implemented using indices that are counted from one by making suitable modifications that will be readily apparent to a person skilled in the art. Similarly, indices could be counted from the left or right sides of the string. While the method of Fig. 2 is described in relation to bitstrings, one skilled in the art will appreciate that the method can be applied to any string of trivial and non-trivial values.

[0053] A bitstring is received in step 201 , which may be a bitstring representing syndrome data for a QEC code. This size of the bitstring will generally depend upon the size of the QEC code. For simplicity, it will be assumed in this example that the bitstring contains 128 bits (although in practice syndrome bitstrings may be much longer).

[0054] If the bitstring is larger than the LZC and / or multi-shift register can process, then the bitstring is split into chunks in step 202 and an offset value coffsetand chunk counter cchunkare initialised to zero. The offset value coffsetis used to track the position of the chunk within the bitstring and is preferably equal to the bitstring index of the first bit in the chunk. The chunk counter cchunkis used to track the index of the current chunk (e.g. the first chunk will have index zero with cchunk= 0, the second chunk will have index one with cchunk= 1 etc.).

[0055] The chunks are preferably non-overlapping (i.e. each bit of the bitstring is included in only one chunk) and of equal length, e.g. there may be N chunks each containing n bits. A chunk length of 16 bits is used in this example (i.e. n = 16 and N = 8). One skilled in the art will appreciate that the bitstring could alternatively be processed as a single chunk if the bitstring is short enough for the LZC and multi-shift register to process (in which case step 202 could be skipped). Similarly, chunks of non-equal sizes could be used, or one or more chunks (e.g. the last chunk) could optionally be padded with additional zero values (e.g. at the end of the chunk) if the bitstring cannot be readily split into equal chunks of suitable sizes.

[0056] In step 203, the next chunk of the bitstring (i.e. the chunk having index cchunk) is loaded into the multi-shift register and a position counter cposis initialised to zero. The position counter cposis used to track index positions within the current chunk (i.e. a relative position within the current chunk rather than an overall position within the bitstring), although in alternative examples it could instead be used to track the current position within the overall bitstring (with suitable modifications to other steps in the method).

[0057] In step 204, the LZC is used to determine a value for a count of leading zeros czero, and the position counter cposis increased by czero+ 1 (i.e. cpos= cpos+ czero+ 1). The method then proceeds to step 205.

[0058] If the value of the position counter cposis less than or equal to the number of bits in the chunk (cpos< n) in step 205, the method proceeds to step 206 in which the index of the next one value (i.e. next symptom) in the bitstring is output as i = coffset+ cpos- 1 and the bits in the multi-shift register are shifted by czero+ 1 places. The method then returns to step 204.

[0059] One skilled in the art will appreciate that if cpos= n then the method could alternatively proceed to step 207 after the index value is returned in step 206 (rather than shifting the bits in the multi-shift register and returning to 204) because cpos= n necessarily means that cposwill be larger than n (cpos> n) following the next iteration of step 204 (because the value of cposalways increases by at least one during step 204). As will be apparent to one skilled in the art, such logic could be implemented in various ways, e.g. using additional comparisons of the values cposand n and splitting step 206 into separate steps of returning the index value and shifting bits in the multi-shift register. In addition, the value of czeromay be used in step 205 instead of cpos: if czero> n then the multi-shift register contains only zeros, so there are no further indices to process and the method can proceed to step 207 instead of 206.

[0060] If the value of the position counter position counter cposis larger than the number of bits per chunk (cpos> n) in step 205, the method proceeds to step 207.

[0061] If there are more chunks to process in step 207 (i.e. if cchunk+ 1 < N) then the method proceeds to step 208 in which the offset value is increased by the number of bits in the chunk that has just been processed (i.e. coffset= coffset+ n in the case of equal chunks), the chunk value is increased by one (cchunk= cchunk+ 1) and the method returns to step 203. One skilled in the art will be appreciate that the offset value could be calculated using alternative methods instead of initialising the offset value in step 202 and updating the offset value in step 208. For example, the offset value could be calculated dynamically (e.g. during step 206) when using equal chunks as coffset= cchunkx n. Alternatively, the offset value could be omitted entirely by setting cposequal to cchunkx n during step 203 rather than initialising it to zero, and modifying step 205 to use the condition cpos< (cchunk+ 1) x n. Consequently, one skilled in the art will appreciate that there are various ways that the method of the present disclosure can be used to determine index values using counts of leading zeros and / or position values (with or without offset values).

[0062] If there are no more chunks to process in step 207 (cchunk+ 1 > N) then the method ends.

[0063] Fig. 3 shows examples of register states resulting from applying the method of Fig. 2 to a bitstring chunk, such as a chunk of an error syndrome bitstring. In this example, the chunk is 0011000001000100, i.e. n = 16 bits per chunk. This chunk may be chunk number (chunk index) cchunkof N total chunks, where the complete bitstring has N x n bits in total. The offset value coffsetwhen processing this chunk will be equal to coffset= cchunkx n. For simplicity, it will be assumed that this is the first chunk so that cchunk= 0 and coffset= 0.

[0064] The chunk is loaded into the multi-shift register as in step 203 of Fig. 2, and the position counter cposis initialised to zero; the multi-shift register will then be in the state shown in the top row of Fig. 3. An LZC is then used to determine a count of the leading zeros for the current state of the multi-shift register czero= 2 (because there are two leading zeros in the top row of Fig. 3). The value of the position counter cposis then updated to cpos= cpos+ cZero + l = 0 + 2 + l = 3. At this point, an index value of i = cpos+ coffset- l = 3 + 0 - l = 2 is returned for the first symptom in the bitstring.

[0065] The value of cposis less than the value of n, so the bits in the multi-shift register are shifted left by czero+ 1 = 2 + 1 = 3 positions (as in step 206 of Fig. 2) into the state shown in the second row of Fig. 3.

[0066] The LZC is then used to determine a new count of the leading zeros for the updated state of the multi-shift register czero= 0 (because there are no leading zeros in the second row of Fig. 3). The value of the position counter cposis then updated to cpos= cpos+ czero+ 1 = 3 + 0 + 1 = 4. At this point, an index value of i = cpos+ coffset- l = 4 + 0 - l = 3 is returned for the second symptom in the bitstring. The value of cposis still less than the value of n, so the bits in the multi-shift register are shifted left by czero+ l = 0 + l = l positions into the state shown in the third row of Fig. 3.

[0067] This process is then repeated two more times for this chunk, resulting in values of czero= 5 and cpos= 10 for the state of the multi-shift register shown in the third row of Fig. 3 (giving an index value of i = 9 for the third symptom) and values of czero= 3 and cpos= 14 for the state of the multi-shift register shown in the fourth row of Fig. 3 (giving an index value of i = 13 for the fourth symptom).

[0068] At this point, the multi-shift register will be in the state shown in the fifth (bottom) row of Fig. 3. There are no one values in the multi-shift register at this point, so the LZC obtains a count of leading zeros czero= 16, leading to a value of cpos= 31. The value of cposis now larger than the value of n, so rather than proceeding to step 206 the method instead proceeds to process the next chunk of the bitstring (i.e. step 208 followed by step 203).

[0069] The above procedure returns symptom index values of 2, 3, 9 and 13 for the first chunk. The iterative method is repeated for each chunk until all chunks in the bitstring have been processed (and all symptom indices have been returned).

[0070] While the method shown in Fig. 3 uses a multi-shift register, it should be understood that other types of register may also be used. For example, a register may be used in combination with one or more multiplexers to shift the bits. In addition, alternative approaches (i.e. other than an LZC) may be used to determine the count of leading zeros (e.g. OR-reduction or similar on sequentially larger sequences of leading bits in the bitstring).

[0071] Fig. 4 shows another method for determining indices in a bitstring. Steps 401-403 are the same as steps 201-203 respectively of Fig. 2. In step 404, is it determined whether the next bit in the chunk (e.g. the leftmost or rightmost bit, depending upon which order the bits are being processed in) has value 1. If so, the method proceeds to step 405 and returns an index value equal to coffset+ cpos.

[0072] After step 405 (or after step 404, if the next bit in the chunk does not have value 1), the method proceeds to step 406 in which a count of contiguous zeros is determined for contiguous zeros adjacent to the next bit, and the value of the position counter cposis updated to cposcpos+ czero+ 1.

[0073] The count of contiguous zeros can be determined in various ways and does may not necessarily be a count of all contiguous zeros: it may count a subset of contiguous zeros (e.g. it may be a count of four contiguous zeros in a longer string of contiguous zeros).

[0074] For example, fixed-size windows (i.e. fixed-length sequences of values in the chunk, e.g. having sizes of 2, 4 and 8 bits) may be used to examine multiple substrings of the chunk to identify contiguous zeros. The windows can be processed in any order but are preferably processed in descending order by size. For each window, an OR-reduction (an operation that gives a single bit zero value if all bits in the window are 0 and otherwise gives a single bit one value) may be performed on the bits in the window; if the OR-reduction gives a value of zero then it can be ascertained that all values in the window are zero. The size of the largest window that returns an OR-reduction value of zero may then be used as the count of contiguous zeros. A more detailed example is given below in relation to Fig. 5.

[0075] In step 407, it is determined whether the value of the position counter cposis less than the number of bits in the chunk, n. If so, the method proceeds to step 408 in which the bits in the register are shifted by czero+ 1 places. This could be performed by using a multi-shift register, or it may alternatively be performed using one or more multiplexers configured to shift the bits in the register by a predetermined amount (this arrangement is especially suitable for the scenario in which fixed size windows are used to determine the count of contiguous zeros because a different respective multiplexer can be configured for each respective window size).

[0076] If in step 407 the value of the position counter cposis not less than the number of bits in the chunk, n, the method instead proceeds to step 409. Steps 409 and 410 of Fig. 4 are the same as steps 207 and 208 respectively in Fig. 2.

[0077] As with the method of Fig. 2, various modifications of the method shown in Fig. 4 will be apparent to one skilled in the art. For example, the offset value could be calculated using alternative methods instead of initialising the offset value in step 402 and updating the offset value in step 410 (e.g. those discussed in relation to Fig. 2), or the offset value may be omitted entirely (e.g. as discussed in relation to Fig. 2). In addition, as with the method of Fig. 2, there may be no need to split the bitstring into chunks (and therefore no need to maintain an offset value or chunk value) if the entire string can be loaded into the register. Figs. 5a-d show examples of register states resulting from applying the method of Fig. 4. In this example, the chunk is 1000001000 (with n = 10) and is processed from the right hand side (unlike the example in Fig. 3). This chunk is loaded into the register as in step 403, and the position counter cposis initialised to zero; the multi-shift register will then be in the state shown in Fig. 5a.

[0078] The method proceeds to step 404. The chunk is processed from the right hand side, so the next bit in the chunk in Fig. 5a has value 0 (the rightmost bit, highlighted), so the method proceeds from step 404 to step 406, and a count of contiguous zeros czerois determined. In the illustrated example, fixed size windows of 8, 4 and 2 are used. The windows are preferably processed in descending size order, and the windows do not include the rightmost bit (the next bit in the chunk) because this is processed separately in step 404 (in other words, the count of contiguous zeros is a count of continuous zeros adjacent to the next bit). Using an OR-reduction on the 8-bit window returns a value of 1 , from which it can be determined that there are not eight contiguous zeros adjacent to the next bit in the chunk. Likewise, an OR-reduction on the 4-bit window returns a 1 value. However, the 2-bit window returns a value of 0, so a count of contiguous zeros czero= 2 is determined, and the position counter cposis updated to cpos= cpos+ czero-4- 1 = 0 4- 2 + 1 = 3.

[0079] The method then proceeds to step 407, in which it is determined that the position counter value (3) is less than the number of bits in the chunk (n = 10), so the bits in the register are shifted right by czero+ 1 = 2 4- 1 = 3 positions (e.g. using a multiplexer configured to shift the bits by 3 bits) into the state shown in Fig. 5b, and the method returns to step 404.

[0080] The next bit in the chunk (rightmost bit) has a value of 1 , so the method proceeds from step 404 to step 405, and an index value of coffset+ cpos= 0 + 3 = 3 is returned. The method then proceeds to step 406, in which the fixed windows are used to determine an updated a count of contiguous zeros. An OR-reduction using the 8-bit window gives a value of 1 , but an OR-reduction on the 4-bit window gives a value of 0 for the register state shown in Fig. 5b, so a count of contiguous zeros czero= 4 is determined, and the position counter cposis updated to cpos= cpos+ czero+ l = 3 + 4 + l = 8. It should be noted that the use of fixed size windows means that the count of contiguous zeros did not count every zero adjacent to the next bit: the register state in Fig. 5b has five zeros adjacent to the next bit, but none of the windows have size five. The use of fixed size windows provides means that each iteration of the index determination subroutine requires fewer windows (and can therefore be processed faster) at the cost of requiring more total iterations of the index determination subroutine; the use of fixed size windows therefore allows the speed of the overall process to be optimised by adjusting the window sizes. The method then proceeds to step 407, in which it is determined that the position counter value (8) is still less than the number of bits in the chunk (n = 10), so the bits in the register are shifted right by czero+ 1 = 4 + 1 = 5 positions (e.g. using a multiplexer configured to shift the bits by 5 bits) into the state shown in Fig. 5c and the method again returns to step 404.

[0081] Repeating the process for the register states shown in Fig. 5c and Fig. 5d gives values

[0082] 0 + 9 = 9) and czero= 8 and cpos= cpos+ czero+ 1 = 9 + 8 = 17. The value of cposis no longer smaller than the chunk size (n = 10), so the next chunk can then be loaded into the register and the chunk and offset values updated in accordance with step 410 of Fig. 4. The iterative method is repeated for each chunk until all chunks in the bitstring have been processed (and all symptom indices have been returned).

[0083] Fig. 6 shows an example of using the method of Fig. 2 or Fig. 4 to decode syndrome data in a QEC procedure. The method in Fig. 6 may be performed by a decoding system, such as the decoding system 102 in Fig. 1.

[0084] In step 601 , syndrome data is received representative of an error state of qubits in a quantum computing system. The syndrome data comprises a string of trivial values (which in the above disclosure are represented by zero values) and non-trivial values (which in the above disclosure are represented by one values), wherein the non-trivial values represent symptoms (or defects) associated with the error sate. While the present disclosure uses zero values to represent trivial values and one values to represent non-trivial values, one skilled in the art will appreciate that this could be swapped, or alternative symbols (e.g. nonbinary symbols / characters, such as letters or integers other than zero and one) may be used.

[0085] In step 602, an index associated with each symptom is determined by loading a chunk of the string into a register (as in step 203 of Fig. 2 or 403 of Fig. 4) in step 602a and iterating an index determination subroutine in steps 602b-602d. The index determination subroutine may use the method of Fig. 2 (e.g. steps 203-206 of Fig. 2) or Fig. 4 (e.g. steps 403-408) and involves using determining a count of contiguous zeros in the register (as in step 204 of Fig. 2 or step 406 of Fig. 4) in step 602b, determining the index of a symptom adjacent to the contiguous zeros (as in step 206 of Fig. 2 or steps 404-405 of Fig. 4) in step 602c, and shifting the register based on the count of contiguous zeros (as in step 206 of Fig. 2 or step 408 of Fig. 4) in step 602d.

[0086] The order of the steps in the index determination subroutine may be changed. For example, when using the method of Fig. 4, the index of the symptom associated with the non-trivial value (if there is one) adjacent to the contiguous zeros is determined after the bits are shifted (i.e. when the method returns to steps 404 and 405 after step 408).

[0087] Once the indices of the symptoms in the syndrome data have been determined, these index values are used to decode the syndrome data and determine a correction for the error state in step 603. One skilled in the art will appreciate that there are various methods that can be used to decode syndrome data using symptom indices. For example, a minimum-weight- perfect-matching algorithm or a clustering algorithm could be used to pair / group symptoms when using surface code error correction. The details how the syndrome data is decoded based on the indices can be performed using known techniques, and a person skilled in the art will select a suitable decoding technique depending upon the type of QEC code being performed.

[0088] The method of Fig. 6 may be implemented in conjunction with any step of the methods described above in relation to Fig. 2 and Fig. 4. The method of Fig. 6 may further involve splitting the bitstring into chunks prior to step 602a and iterating the index determination subroutine 602b-602d for each chunk (optionally using a chunk counter cchunkas in steps 202, 207 and 208 of Fig. 2). The method of Fig. 6 may additionally involve maintaining a position counter, incrementing the position counter using the count of contiguous zeros, and determining the index of the symptom adjacent to the contiguous zeros based on the position counter (e.g. as described in relation to Fig. 2 or Fig. 4). The method of Fig. 6 may additionally involve determining the index of the symptom adjacent to the contiguous zeros based on an offset value (e.g. as described in relation to Fig. 2 and Fig. 4, in particular steps 206 and 405 respectively).

[0089] One skilled in the art will appreciate that the methods disclosed herein can be applied to any QEC method that involves processing a syndrome bitstring to identify non-trivial values (i.e. symptoms / defects).

[0090] Any reference herein to qubits should be understood to apply equally to other quantum devices such as qutrits or qudits.

[0091] It should be understood that any method of the present disclosure could include additional steps, and any device could include additional components. In addition, unless indicated otherwise or technically infeasible, the method steps disclosed herein may be performed in alternative orders, and any order described herein should be considered as exemplary rather than limiting. The illustrated steps and components could be split into multiple sub- steps / subcomponents.

[0092] Furthermore, while the decoding methods described herein are envisaged to be performed by a classical processing device, one skilled in the art will appreciate that any computation that can be performed by a classical processing device can also be performed by a quantum computing device. Accordingly, the decoding methods described herein can also be performed by a quantum processing device, such as a quantum processing unit (QPU) comprising a plurality of qubits.

Claims

CLAIMS1. A computer-implemented quantum error correction method performed by a decoding system of a quantum computing system, the method comprising: receiving syndrome data representative of an error state of quantum devices in the quantum computing system, the syndrome data comprising a string of trivial values and non-trivial values, wherein non-trivial values represent symptoms associated with the error state; determining an index associated with each symptom by loading a chunk of the string into a register and iterating an index determination subroutine comprising: determining a count of contiguous trivial values in the register; if there is a non-trivial value adjacent to the contiguous trivial values, determining the index associated with the symptom represented by the non-trivial value adjacent to the contiguous trivial values; and shifting values in the register based on the count of contiguous trivial values; and decoding the syndrome data using the determined index associated with each symptom to determine a correction for the error state.

2. The method of claim 1 , further comprising splitting the string into chunks, wherein the index determination subroutine is iterated for each of the chunks.

3. The method of claim 2, further comprising maintaining a chunk counter.

4. The method of any preceding claim, wherein the index determination subroutine further comprises maintaining a position counter, wherein the index of the symptom adjacent to the contiguous trivial values is determined based on the position counter.

5. The method of claim 4, wherein the index determination subroutine further comprises incrementing the position counter using the count of contiguous trivial values.

6. The method of any preceding claim, wherein the index of the symptom adjacent to the contiguous trivial values is determined based on an offset value.

7. The method of claim 6 when dependent upon either of claims 4 and 5, wherein determining the index of the symptom adjacent to the contiguous trivial values comprises summing the offset value and the position counter.

8. The method of any preceding claim, wherein shifting the register based on the count of contiguous trivial values comprises shifting the multi-shift register by the count of contiguous trivial values plus one.

9. The method of any preceding claim, wherein the register is a multi-shift register.

10. The method of any of claims 1 to 8, wherein values in the register are shifted using a multiplexer.

11. The method of any preceding claim, wherein the trivial values are zero values and the non-trivial values are one values.

12. The method of any preceding claim, wherein the count of contiguous trivial values is determined using a leading zero counter.

13. The method of any of claims 1 to 11 , wherein the count of contiguous trivial values is determined using a plurality of fixed-length value sequences in the chunk.

14. The method of claim 13, wherein the count of contiguous trivial values is determined using OR-reduction on each fixed-length value sequence.

15. The method of claim 13 or claim 14, wherein the fixed-length value sequences are processed in descending order by length, wherein the count of contiguous trivial values is determined to be the length of a longest value sequence of the fixed-length value sequences that contains only trivial values.

16. The method of any preceding claim, wherein the string is a bitstring and wherein the values are bits.

17. The method of any preceding claim, wherein the quantum devices are qubits.

18. A decoding system configured to perform the method of any preceding claim.

19. A computer-readable storage medium comprising instructions which, when executed by a decoding system, cause the decoding system to carry out the method of any of any of claims 1 to 17.

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