Method for driving semiconductor device, and semiconductor device

Abstract

This method for driving a semiconductor device (100) includes: a determination step (S10) for determining a lower limit for a target resistance value of a nonvolatile variable-resistance element (20); a measurement step (S11) for measuring the resistance value of the nonvolatile variable-resistance element (20); a determination step (S13) for determining whether the measured resistance value is lower than the lower limit for the target resistance value; and an application step (S21 and S23) for applying a second high-resistance voltage pulse that has a second energy greater than a first energy corresponding to application of a single cycle of a first high-resistance voltage pulse and imparts a positive potential to a second electrode (22) with reference to a first electrode (21), and a first low-resistance voltage pulse that continues after the second high-resistance voltage pulse, to the nonvolatile variable-resistance element (20) when it is determined that the measured resistance value is lower than the lower limit for the target resistance value.

Description

Semiconductor device driving method and semiconductor device

[0001] The present disclosure relates to a driving method for a semiconductor device and a semiconductor device, and more particularly to a driving method for writing a target resistance value to a nonvolatile variable resistance element.

[0002] Conventionally, a method for driving a nonvolatile variable resistance element has been proposed in which a weighting coefficient (hereinafter simply referred to as "weight") that takes an analog continuous value and is used in neural networks, etc., is stored as a resistance value (or its reciprocal, which is also referred to as a conductance value) (see, for example, Patent Document 1).

[0003] According to Patent Document 1, a weighting coefficient that takes an analog continuous value is written as a resistance value to a nonvolatile variable resistance element by controlling the area of ​​a filament formed in the variable resistance layer of the nonvolatile variable resistance element through forming on the nonvolatile variable resistance element. Here, forming refers to an initial process in which a relatively large voltage is applied to the nonvolatile variable resistance element after manufacturing, thereby transitioning the nonvolatile variable resistance element to a state in which it can reversibly assume a high resistance state and a low resistance state. Furthermore, a filament is a local region in the nonvolatile variable resistance element through which current flows.

[0004] The technology of Patent Document 1 improves the resistance variation during writing, the resistance fluctuation during reading, and the retention characteristics compared to conventional writing methods. Here, the resistance variation during writing refers to the variation in the resistance value after writing obtained when a target resistance value is repeatedly written, and the resistance fluctuation during reading refers to the change in the resistance value obtained when the resistance value after writing is repeatedly read. Furthermore, the retention characteristics refer to the retention characteristics of the written resistance value over time.

[0005] International Publication No. 2021 / 149780

[0006] However, with the technology of Patent Document 1, it is possible to increase the area of ​​the filament of the nonvolatile variable resistance element (i.e., to decrease the resistance value) by forming on the nonvolatile variable resistance element, but it is difficult to decrease the area of ​​the filament (i.e., to increase the resistance value). Note that in this specification, the area or size of the filament refers to the area or size of the filament in a planar view of the variable resistance layer.

[0007] For this reason, the technology of Patent Document 1 has the problem that, when applied to a machine learning model of a nonvolatile variable resistance element, it can be applied to a machine learning model for inference purposes in which it is sufficient to write a weight coefficient once, but it cannot be applied to a machine learning model for learning purposes in which it is necessary to repeatedly write the weight coefficient while changing it.

[0008] Therefore, the present disclosure aims to provide a semiconductor device driving method and a semiconductor device that improves the variation in resistance value during writing, the fluctuation in resistance value during reading, and retention degradation for nonvolatile variable resistance elements compared to conventional writing methods, and that, unlike the technology of Patent Document 1, is capable of analogically changing the resistance value in either the direction of increasing or decreasing the resistance.

[0009] In order to achieve the above object, a method for driving a semiconductor device according to one embodiment of the present disclosure is a method for driving a semiconductor device including a nonvolatile variable resistance element, wherein a resistance value of the nonvolatile variable resistance element is continuously and reversibly changed by applying a voltage pulse to the nonvolatile variable resistance element, the nonvolatile variable resistance element including a first electrode, a second electrode, and a variable resistance layer sandwiched between the first electrode and the second electrode and having a continuously changing resistance value, the nonvolatile variable resistance element transitions to a low resistance state when a first low-resistance voltage pulse is applied once, the first low-resistance voltage pulse applying a negative potential with respect to the second electrode with respect to the first electrode, and the nonvolatile variable resistance element transitions to a low resistance state when a first high-resistance voltage pulse is applied once, the first high-resistance voltage pulse applying a positive potential with respect to the second electrode with respect to the first electrode. and a characteristic of transitioning to a high-resistance state having a resistance value higher than the low-resistance state, and the method for driving the semiconductor device includes: a determination step of determining a lower limit of a target resistance value of the non-volatile variable resistance element; a measurement step of measuring a resistance value of the non-volatile variable resistance element; a determination step of determining whether the measured resistance value is smaller than the lower limit of the target resistance value; and an application step of applying to the non-volatile variable resistance element, when it is determined that the measured resistance value is smaller than the lower limit of the target resistance value, a second high-resistance voltage pulse having a second energy greater than a first energy corresponding to one application of the first high-resistance voltage pulse and applying a positive potential with respect to the second electrode with respect to the first electrode as a reference, followed by the first low-resistance voltage pulse.

[0010] In order to achieve the above object, a semiconductor device according to one embodiment of the present disclosure includes a nonvolatile resistance change element including a first electrode, a second electrode, and a resistance change layer sandwiched between the first electrode and the second electrode and having a resistance value that changes continuously and reversibly; and a drive circuit that drives the nonvolatile resistance change element, wherein the nonvolatile resistance change element has a characteristic of transitioning to a low resistance state when a first low-resistance voltage pulse that imparts a negative potential with respect to the second electrode with respect to the first electrode as a reference is applied once, and transitioning to a high resistance state having a resistance value higher than the low resistance state when a first high-resistance voltage pulse that imparts a positive potential with respect to the second electrode with respect to the first electrode as a reference is applied once, and the drive circuit applies to the nonvolatile resistance change element, when the resistance value of the nonvolatile resistance change element is smaller than a lower limit of a target resistance value, a second high-resistance voltage pulse that has a second energy greater than a first energy corresponding to a single application of the first high-resistance voltage pulse and that imparts a positive potential with respect to the second electrode with respect to the first electrode as a reference, followed by the first low-resistance voltage pulse.

[0011] The present disclosure provides a semiconductor device driving method and a semiconductor device that improves the variation in resistance value during writing, the fluctuation in resistance value during reading, and retention degradation for nonvolatile variable resistance elements compared to conventional writing methods, and that, unlike the technology of Patent Document 1, can change the resistance value in an analog manner in either the direction of increasing or decreasing the resistance.

[0012] FIG. 1A is a diagram showing variations in conductance values ​​obtained when multiple resistance values ​​are written to a single resistance variable element using a conventional method for driving a nonvolatile resistance variable element. FIG. 1B is a diagram showing changes in resistance values ​​(conductance fluctuations) and retention degradation results obtained when repeatedly reading resistance values ​​A, B, and C among the multiple resistance values ​​shown in FIG. 1A. FIG. 2A is a diagram explaining a method for driving a nonvolatile resistance variable element disclosed in Patent Document 1. FIG. 2B is a diagram showing analysis results of filament characteristics using experimental results obtained using the method for driving a nonvolatile resistance variable element disclosed in Patent Document 1 shown in FIG. 2A. FIG. 2C is a diagram explaining problems with the technology of Patent Document 1. FIG. 3 is a diagram showing reversible changes in filament area using a method for driving a semiconductor device according to the present disclosure. FIG. 4 is a block diagram showing a configuration of a semiconductor device according to an embodiment. FIG. 5A is a flowchart showing the operation of a semiconductor device according to an embodiment (i.e., a method for driving a semiconductor device). FIG. 5B is a diagram showing an example distribution of resistance values ​​corresponding to target weights. FIG. 6A shows voltage conditions used in an experiment to change a nonvolatile variable resistance element from a low resistance state toward a high resistance state and achieve multiple resistance states according to the flowchart shown in FIG. 5A, along with voltage conditions according to the prior art. FIG. 6B shows the distribution of conductance values ​​(after application of an LR voltage) obtained in multiple write experiments on a nonvolatile variable resistance element in cases A to E shown in FIG. 6A. FIG. 6C shows the analysis results of filament characteristics using the experimental results for cases A to E shown in FIG. 6A. FIG. 7 is a diagram illustrating the state of a filament in an intermediate resistance state after application of an LR voltage to a nonvolatile variable resistance element in a multi-value storage mode according to an embodiment. FIG. 8 is a flowchart illustrating the operation of a semiconductor device according to a modification of an embodiment (i.e., a method for driving a semiconductor device). FIG. 9 shows a state change model of a filament of a nonvolatile variable resistance element in driving methods according to an embodiment and the prior art. FIG. 10 is a block diagram showing a detailed configuration of a semiconductor device according to an embodiment.

[0013] (Discovery Obtained by the Inventors) Conventionally, in a driving method for a nonvolatile variable resistance element that stores a weighting coefficient, which takes a continuous analog value, as a conductance value and multiple resistance values, the conductance value varies greatly after writing. In particular, when storing an intermediate resistance value, that is, a resistance value (intermediate conductance value) between a high resistance value and a low resistance value, there is a problem that the reliability is reduced due to the occurrence of variations and fluctuations in the conductance value and the large deterioration of retention.

[0014] 1A is a diagram showing the variation in conductance values ​​obtained when multiple resistance values ​​are written to a single variable resistance element using a conventional driving method for nonvolatile variable resistance elements. The diagram shows the distribution of conductance values ​​obtained when multiple target resistance values, including a high resistance value ("high resistance state"), an intermediate resistance value ("intermediate resistance state"), and a low resistance value ("low resistance state"), are repeatedly written to a single nonvolatile variable resistance element. The horizontal axis represents the obtained conductance value, and the vertical axis represents the standard deviation of the obtained conductance values.

[0015] The variation is small in the high resistance state where the conductance value is small (see the leftmost part of FIG. 1A) and the low resistance state where the conductance value is large (see the rightmost part of FIG. 1A), but large variations are observed in the intermediate resistance states where the conductance value is intermediate between these two (other than the two extreme parts of FIG. 1A). In particular, the variation in the conductance value is large in the intermediate resistance states B and C where the conductance value is approximately halfway between low conductance and high conductance.

[0016] FIG. 1B is a diagram showing the change in resistance value (conductance value fluctuation) and retention degradation results obtained when multiple resistance values ​​A, B, and C written to one nonvolatile resistance change element shown in FIG. 1A are repeatedly read. More specifically, (a) of FIG. 1B shows the change in conductance value (conductance value fluctuation) when read from the low resistance state A and the intermediate resistance states B and C among the multiple resistance states. The horizontal axis shows the number of reads ("Read cycle"), and the vertical axis shows the read conductance value. (b) of FIG. 1B shows the retention degradation of the conductance value written to the low resistance value A and the intermediate resistance values ​​B and C among the multiple resistance values. The horizontal axis shows the elapsed time (hr) after writing, and the vertical axis shows the conductance value.

[0017] As can be seen from FIG. 1B, in the intermediate resistance states B and C, the fluctuation in the conductance value during repeated reads is large, and the retention degradation is also large.

[0018] Therefore, Patent Document 1 proposes a method for improving the problems of such conventional driving methods (large variations and fluctuations in conductance values, and large retention degradation) by controlling the area of ​​the filament of the nonvolatile variable resistance element through forming on the nonvolatile variable resistance element, thereby writing a conductance value that takes an analog continuous value to the nonvolatile variable resistance element.

[0019] 2A is a diagram illustrating the driving method of nonvolatile variable resistance element 10 disclosed in Patent Document 1. This diagram shows the internal changes in nonvolatile variable resistance element 10 when forming is performed by applying three voltages V1 to V3, each having a relationship of V1<V2<V3, to nonvolatile variable resistance element 10. (a) of FIG. 2A is a schematic diagram of the cross-sectional structure of nonvolatile variable resistance element 10 before forming, and (b) of FIG. 2A is a schematic diagram of the cross-sectional structure of nonvolatile variable resistance element 10 after forming.

[0020] 2A (a) and (b), the nonvolatile variable resistance element 10 includes a first electrode 11, a second electrode 13, and a variable resistance layer 12 sandwiched between the first electrode 11 and the second electrode 13 and having a continuously changing resistance value. As shown in (b) of Fig. 2A, the nonvolatile variable resistance element 10 is formed to form filaments 14a to 14c in the variable resistance layer 12. The filaments 14a to 14c are localized collections of oxygen defects in the metal oxide that constitutes the variable resistance layer 12, and form paths through which current flows.

[0021] Here, when attention is paid to the area of ​​the filament in a plan view of the resistance change layer 12, it can be seen that forming using a higher voltage results in the formation of a filament with a larger area, and a lower resistance value can be obtained.

[0022] 2B is a diagram showing the results of an analysis of filament characteristics using experimental results from the driving method of the nonvolatile variable resistance element 10 disclosed in Patent Document 1 shown in FIG. 2A. This diagram shows the results of an analysis of filament characteristics suitable for analog resistance values ​​based on experimental results of the filament characteristics and data retention characteristics of the nonvolatile variable resistance element 10. The horizontal axis represents the filament size, the vertical axis represents the oxygen defect density in the filament, and the density of the plot represents the data retention characteristics (the data retention characteristics improve as the grayscale becomes lighter). Quantitative modeling of filament characteristics has been established using parameters such as the area of ​​the filament and the density of oxygen defects in the filament, and it has already been found that there is a strong correlation with the data retention characteristics (see Patent Document: JP 2014-207046 A).

[0023] As shown by the line (1) in Figure 2B, the conventional driving method controls the analog resistance value to be written by controlling the oxygen defect density in the filament while maintaining the filament size. With this method, good data retention characteristics are exhibited for large conductance values ​​that can maintain a high oxygen defect density. However, conversely, for small conductance values ​​corresponding to low oxygen defect densities, oxygen defects with poor data retention characteristics are used due to the low oxygen defect density, which causes variations in the resistance value.

[0024] In contrast, as shown by the line (2) in Figure 2B, the technology of Patent Document 1 controls the size of the filament while maintaining a high oxygen defect density, resulting in a filament with excellent data retention characteristics, i.e., suppressing variations in resistance value.

[0025] In this way, according to the technology of Patent Document 1, by controlling the area of ​​the filament of the nonvolatile variable resistance element, a resistance value that takes on an analog continuous value is written to the nonvolatile variable resistance element, thereby improving the variation in resistance value after writing compared to conventional driving methods.

[0026] However, the present inventors have found that the technique of Patent Document 1 has the following problems.

[0027] 2C is a diagram illustrating the problems with the technology of Patent Document 1. As shown in this figure, with the technology of Patent Document 1, it is possible to increase the area of ​​the filament of the nonvolatile variable resistance element (i.e., to reduce the resistance value) by forming on the nonvolatile variable resistance element, but conversely, it is difficult to reduce the area of ​​the filament (i.e., to increase the resistance value).

[0028] For this reason, the technology of Patent Document 1 can be applied to machine learning models composed of nonvolatile variable resistance elements for inference purposes, in which weight coefficients only need to be written once, but has the problem that it cannot be applied to machine learning models for learning purposes, in which the weight coefficients need to be written repeatedly while being changed.

[0029] Therefore, the inventors have conducted extensive research to realize a semiconductor device driving method and a semiconductor device (i.e., to achieve the object of the present invention) that improves the variation in resistance value during writing, the fluctuation in resistance value during reading, and retention degradation of nonvolatile variable resistance elements compared to conventional writing methods, and that, unlike the technology of Patent Document 1, is capable of analogically changing the resistance value in either the higher or lower resistance direction.

[0030] As a result, we have devised a method for reversibly and analogically changing the effective filament area of ​​a filament without significantly changing the oxygen defect density in the filament, as shown in Figure 3, by providing a semiconductor device or method for driving a semiconductor device having the following characteristics. Figure 3 is a diagram showing the reversible change in filament area by the method for driving a semiconductor device according to the present disclosure. Note that the effective filament area is not the filament area on the outer shape defined by the outline, but the effective area of ​​the region that functions as a filament.

[0031] One embodiment of the method for driving a semiconductor device is a method for driving a semiconductor device including a nonvolatile variable resistance element, in which a resistance value of the nonvolatile variable resistance element is continuously and reversibly changed by applying a voltage pulse to the nonvolatile variable resistance element, the nonvolatile variable resistance element including a first electrode, a second electrode, and a variable resistance layer sandwiched between the first electrode and the second electrode and having a continuously changing resistance value, the nonvolatile variable resistance element transitions to a low resistance state when a first low-resistance voltage pulse that imparts a negative potential with respect to the second electrode with respect to the first electrode as a reference is applied once, and transitions to the low resistance state when a first high-resistance voltage pulse that imparts a positive potential with respect to the second electrode with respect to the first electrode as a reference is applied once. a measurement step of measuring the resistance value of the nonvolatile variable resistance element; a determination step of determining whether the measured resistance value is smaller than the lower limit of the target resistance value; and an application step of applying to the nonvolatile variable resistance element, when it is determined that the measured resistance value is smaller than the lower limit of the target resistance value, a second high-resistance voltage pulse having a second energy greater than a first energy corresponding to one application of the first high-resistance voltage pulse and applying a positive potential with respect to the second electrode with respect to the first electrode as a reference, followed by the first low-resistance voltage pulse.

[0032] One form of the semiconductor device comprises: a nonvolatile variable resistance element including a first electrode, a second electrode, and a variable resistance layer sandwiched between the first electrode and the second electrode, the variable resistance layer having a resistance value that changes continuously and reversibly; and a drive circuit that drives the nonvolatile variable resistance element, wherein the nonvolatile variable resistance element has a characteristic of transitioning to a low resistance state when a first low-resistance voltage pulse that imparts a negative potential with respect to the second electrode with respect to the first electrode as a reference is applied once, and transitioning to a high resistance state having a resistance value higher than the low resistance state when a first high-resistance voltage pulse that imparts a positive potential with respect to the second electrode with respect to the first electrode as a reference is applied once, and the drive circuit applies to the nonvolatile variable resistance element, when the resistance value of the nonvolatile variable resistance element is smaller than a lower limit of a target resistance value, a second high-resistance voltage pulse that has a second energy greater than a first energy corresponding to a single application of the first high-resistance voltage pulse and that imparts a positive potential with respect to the second electrode with respect to the first electrode as a reference, followed by the first low-resistance voltage pulse.

[0033] As a result, compared to conventional writing methods, it has become possible to improve the variation in resistance value during writing, the fluctuation in resistance value during reading, and retention degradation for nonvolatile variable resistance elements, and to realize a semiconductor device and a driving method for a semiconductor device that, unlike the technology of Patent Document 1, can change the resistance value in an analog manner in either the direction of increasing or decreasing the resistance.

[0034] (Embodiments) Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Note that each embodiment described below represents a specific example of the present disclosure. The numerical values, shapes, materials, components, component arrangement and connection configurations, steps, and step order shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Furthermore, each figure is not necessarily an exact illustration. In each figure, substantially identical configurations are assigned the same reference numerals, and redundant explanations are omitted or simplified. Furthermore, "connection" means electrical connection, and includes not only cases where two circuit elements are directly connected, but also cases where two circuit elements are indirectly connected with another circuit element inserted between them.

[0035] FIG. 4 is a block diagram showing a configuration of a semiconductor device 100 according to an embodiment.

[0036] The semiconductor device 100 comprises a nonvolatile variable resistance element 20 and a drive circuit 40 that drives the nonvolatile variable resistance element 20, and improves the variation in resistance value during writing, the fluctuation in resistance value during reading, and retention degradation of the nonvolatile variable resistance element 20, and is a device that can change the resistance value in either a high-resistance or low-resistance direction in an analog manner, unlike the technology of Patent Document 1.

[0037] The nonvolatile variable resistance element 20 includes a first electrode 21, a second electrode 22, and a variable resistance layer 25 sandwiched between the first electrode 21 and the second electrode 22 and having a resistance value that changes continuously and reversibly. The first electrode 21 is made of, for example, TaN. The second electrode 22 is made of, for example, at least one of Pt, Ir, and Pd. In this embodiment, the variable resistance layer 25 is made of TaO, which has a high oxygen deficiency. ｘ The first metal oxide layer 23 is made of Ta or the like, and Ta having a small oxygen deficiency. ２ O ５ The nonvolatile variable resistance element 20 has a laminated structure including a second metal oxide layer 24, and a first electrode 21, a second electrode 22, and a second metal oxide layer 24. The second metal oxide layer 24 is a local region where a current flows between the first electrode 21 and the second electrode 22, and has a filament 30 formed therein, the filament 30 having a different shape corresponding to the resistance value of the nonvolatile variable resistance element 20.

[0038] In a binary storage mode, this nonvolatile resistance change element 20 has the property that, when a first low-resistance voltage pulse is applied once, which gives a negative potential to the second electrode 22 with respect to the first electrode 21 as the reference, it transitions to a low-resistance state (also called a "set state"), and, on the other hand, when a first high-resistance voltage pulse is applied once, which gives a positive potential to the second electrode 22 with respect to the first electrode 21 as the reference, it transitions to a high-resistance state (also called a "reset state") whose resistance value is higher than that of the low-resistance state.

[0039] The drive circuit 40 is a circuit that can drive the nonvolatile variable resistance element 20 in either a binary storage mode or a multi-value storage mode, and is composed of a write circuit for writing a resistance value to the nonvolatile variable resistance element 20, a sense amplifier for reading the resistance value from the nonvolatile variable resistance element 20, a memory for storing a program for controlling them, a processor for executing the program, etc. In the multi-value storage mode, when the resistance value of the nonvolatile variable resistance element 20 is smaller than the lower limit of the target resistance value, the drive circuit 40 applies to the nonvolatile variable resistance element 20 a second high-resistance voltage pulse that has a second energy greater than the first energy corresponding to one application of the first high-resistance voltage pulse and that applies a positive potential to the second electrode 22 with respect to the first electrode 21, followed by a first low-resistance voltage pulse.

[0040] More specifically, the method of driving the nonvolatile variable resistance element 20 in the multi-value memory mode by the drive circuit 40 includes a determination step of determining or acquiring a lower limit of the target resistance value of the nonvolatile variable resistance element 20, a measurement step of measuring the resistance value of the nonvolatile variable resistance element 20, a determination step of judging whether the measured resistance value is smaller than the lower limit of the target resistance value, and an application step of applying to the nonvolatile variable resistance element 20, if it is determined that the measured resistance value is smaller than the lower limit of the target resistance value, a second high-resistance voltage pulse having a second energy greater than the first energy corresponding to one application of the first high-resistance voltage pulse and which imparts a positive potential to the second electrode 22 with respect to the first electrode 21, followed by a first low-resistance voltage pulse.

[0041] 5A is a flowchart showing the operation of the semiconductor device 100 according to the embodiment (i.e., a method of driving the semiconductor device 100). Here, the operation is shown when a resistance value is written to the nonvolatile variable resistance element 20 as a weight that takes an analog continuous value used in a neural network or the like (i.e., in a multi-value storage mode).

[0042] First, in order to change the weight Wi stored in the nonvolatile variable resistance element 20, the drive circuit 40 first determines an upper limit MAX(R(i)) and a lower limit MIN(R(i)) of the resistance value R(i) corresponding to the target weight Wi (determination step S10). FIG. 5B is a diagram showing an example distribution of the resistance value R(i) corresponding to the target weight Wi. Here, an example is shown in which the maximum value in an ideal distribution of the resistance value R(i) corresponding to the target weight Wi is set as the upper limit MAX(R(i)) and the minimum value is set as the lower limit MIN(R(i)).

[0043] 5A, in step S10, more specifically, the drive circuit 40 determines the upper limit MAX(R(i)) and the lower limit MIN(R(i)) of the resistance value R(i) by performing a predetermined calculation using the target weight Wi acquired from an external or built-in memory. Note that instead of determining the upper limit MAX(R(i)) and the lower limit MIN(R(i)), the drive circuit 40 may acquire the upper limit MAX(R(i)) and the lower limit MIN(R(i)) from an external or built-in memory.

[0044] Next, the drive circuit 40 measures the current resistance value R of the nonvolatile variable resistance element 20 (measurement step S11), and determines whether the resistance value R obtained by the measurement is greater than the upper limit MAX (R(i)) (S12). Note that if a measurement circuit for measuring the resistance value R is provided outside the drive circuit 40, the drive circuit 40 may obtain the resistance value R from the external measurement circuit.

[0045] If it is determined in step S12 that the resistance value R is greater than the upper limit MAX(R(i)) (Yes in S12), the drive circuit 40 first applies an HR pulse to the nonvolatile variable resistance element 20 to lower the resistance (S14). Here, the HR pulse is a high-resistance pulse in the binary storage mode, that is, a first high-resistance voltage pulse that applies a positive potential to the second electrode 22 with respect to the first electrode 21, in order to write one state (i.e., the reset state) in the binary storage mode.

[0046] Next, the drive circuit 40 determines whether the number of times the HR conversion pulse has been applied (S14) has reached a predetermined upper limit (S15), and if the upper limit has not been reached (No in S15), it applies a strong LR conversion pulse (S16).On the other hand, if the upper limit has been reached (Yes in S15), it increases the LR conversion voltage (S17) to further increase the possibility of low resistance, and then applies a strong LR conversion pulse (S16).

[0047] Here, the strong LR-state pulse is an example of a second low-resistance voltage pulse having greater energy (specifically, greater amplitude) than a single application of a first low-resistance voltage pulse that applies a negative potential to the second electrode 22 with respect to the first electrode 21, for low-resistance state in the binary storage mode, that is, for writing another state (i.e., set state) in the binary storage mode. Also, "increasing the LR-state voltage" means making the amplitude of the LR-state pulse larger than the previous one.

[0048] If the result of the judgment in step S12 is that the resistance value R is not greater than the upper limit MAX (R(i)) (No in S12), the drive circuit 40 judges that the condition regarding the upper limit MAX (R(i)) is satisfied, and then determines whether the resistance value R obtained by the measurement in step S11 is smaller than the lower limit MIN (R(i)) (judgment step S13).

[0049] If the result of the judgment in step S13 is that the resistance value R is not smaller than the lower limit MIN(R(i)) (No in S13), the resistance value R is judged to be an appropriate value between the lower limit MIN(R(i)) and the upper limit MAX(R(i)), and the driving circuit 40 terminates the process of writing the resistance value to the non-volatile variable resistance element 20, i.e., the weight change process.

[0050] On the other hand, if the result of the determination in step S13 is that the resistance value R is smaller than the lower limit MIN(R(i)) (Yes in S13), the drive circuit 40 determines whether the number of times the strong HR pulse and the LR pulse have been applied (S21 and S23) has reached a predetermined upper limit (S20). If the upper limit has not been reached (No in S20), the drive circuit 40 applies a strong HR pulse to the nonvolatile variable resistance element 20 (S21) and then an LR pulse to achieve high resistance (S23). On the other hand, if the upper limit has been reached (Yes in S20), the drive circuit 40 increases the HR voltage (change step S22) to further increase the possibility of achieving high resistance, and then applies a strong HR pulse to the nonvolatile variable resistance element 20 (S21) and then an LR pulse (S23).

[0051] Here, the strong HR pulse is an example of a second high-resistance voltage pulse having greater energy (here, greater amplitude) than a single application of a first high-resistance voltage pulse that applies a positive potential to the second electrode 22 with respect to the first electrode 21 as a reference, for high resistance in the binary storage mode, i.e., for writing one state (i.e., a reset state) in binary storage. Furthermore, "increasing the HR voltage" means increasing the amplitude of the HR pulse compared to the previous application. The combined process of steps S21 and S23 corresponds to a specific example of an application process in which a second high-resistance voltage pulse having a second energy greater than the first energy corresponding to a single application of the first high-resistance voltage pulse and applying a positive potential to the second electrode 22 with respect to the first electrode 21 as a reference, followed by a subsequent first low-resistance voltage pulse, is applied to the nonvolatile variable resistance element 20.

[0052] The drive circuit 40 stores and updates the number of times a voltage pulse is applied each time it is applied, and determines based on that number whether the number of times the voltage pulse has been applied has reached the upper limit (S15, S20).

[0053] In the flowchart of FIG. 5A, the increase in resistance by at least steps S20 to S23 is a characteristic procedure that improves the variation in resistance value during writing, the fluctuation in resistance value during reading, and retention degradation of nonvolatile variable resistance elements compared to conventional increase in resistance, and that makes it possible to change the resistance value in an analog manner in either the direction of increasing or decreasing the resistance, unlike the technology of Patent Document 1.

[0054] 6A is a diagram showing voltage conditions used when conducting an experiment to change the nonvolatile variable resistance element 20 from a low resistance state to a high resistance state and achieve multiple resistance states according to the flowchart shown in FIG. 5A , along with voltage conditions according to the prior art. This diagram shows examples of the voltage of the HR-state pulse (the “HR-state voltage” in FIG. 6A ) and the voltage of the LR-state pulse (the “LR-state voltage” in FIG. 6A ) used in writing in a binary storage mode (case “A” (low resistance state) in FIG. 6A ), writing in two types of high resistance (i.e., low conductance) in a multi-value storage mode according to the prior art (cases “B” and “C” (intermediate resistance state) in FIG. 6A ), and writing in two types of high resistance (i.e., low conductance) in the multi-value storage mode of the present embodiment (cases “D” and “E” (intermediate resistance state) in FIG. 6A ).

[0055] As shown in cases "B" and "C" in Figure 6A, in the case of high resistance in the intermediate resistance state in the multi-value storage mode according to the conventional technology, the voltage VH (1.7V) of the HR conversion pulse is the same as the voltage VH (1.7V) used for high resistance in the binary storage mode, and the voltage VL (-2.4V, -2.2V) of the LR conversion pulse is a weak LR conversion pulse with an amplitude smaller than the voltage VL (-2.8V) used for low resistance in the binary storage mode.

[0056] In contrast, as shown in cases "D" and "E" in Figure 6A, when the resistance is increased in the intermediate resistance state in the multi-value storage mode of this embodiment, the voltage VH (2.5V, 3.0V) of the strong HR pulse has a larger amplitude than the voltage VH (1.7V) used for increasing the resistance in the binary storage mode, and the voltage VL (-2.8V) of the LR pulse is the same as the voltage VL (-2.8V) used for decreasing the resistance in the binary storage mode.

[0057] 6B is a diagram showing the distribution of conductance values ​​(after application of LR voltage) obtained in multiple write experiments on the nonvolatile variable resistance element 20 in cases A to E shown in Fig. 6A. The horizontal axis represents the conductance value obtained by writing in the experiment, and the vertical axis represents the normal expected value of that conductance in the distribution of all conductance values ​​obtained in that case.

[0058] As can be seen from FIG. 6B, the distribution of conductance values ​​obtained in cases D and E of this embodiment has a narrower width on the horizontal axis of the conductance value distribution (i.e., the variation in conductance values) than cases B and C of the prior art.

[0059] FIG. 6C shows the results of analyzing filament characteristics using the experimental results for cases A to E shown in FIG. 6A. This figure shows the results of analyzing filament characteristics suitable for analog resistance values ​​from experimental results on the filament characteristics and data retention characteristics of the nonvolatile variable resistance element 20 using a method similar to that used to obtain the analytical results shown in FIG. 2B (see Patent Document: JP 2014-207046 A). More specifically, in (b) of FIG. 6C, similar to FIG. 2B, the horizontal axis represents the filament size, the vertical axis represents the oxygen defect density in the filament, and the density of the plot represents the data retention characteristics (the data retention characteristics improve as the grayscale becomes lighter). (a) of FIG. 6C shows the center of the distribution for cases A to E in (b) of FIG. 6C.

[0060] As shown in cases "B" and "C" in (a) of Figure 6C and the corresponding line (1) in (b) of Figure 6C, in the case of increasing the resistance in the multi-value storage mode according to the prior art, the analog resistance value to be written is controlled by controlling the oxygen defect density in the filament while maintaining (i.e., fixing) the size of the filament. With this method, good data retention characteristics are exhibited for large conductance values ​​that can maintain a high oxygen defect density, but conversely, for small conductance values ​​corresponding to low oxygen defect densities, oxygen defects with poor data retention characteristics are used due to the low oxygen defect density, causing variations in the resistance value.

[0061] In contrast, as shown in cases "D" and "E" in (a) of Figure 6C and the corresponding line (2) in (b) of Figure 6C, in the high resistance state in the multi-level storage mode of this embodiment, the filament size is controlled while maintaining (i.e., fixing) a high oxygen defect density, resulting in a filament with excellent data retention characteristics, i.e., suppressing variations in resistance value.

[0062] 7 is a diagram illustrating the state of the filament in the intermediate resistance state after application of an LR voltage to the nonvolatile variable resistance element 20 in the multi-value storage mode according to the embodiment. The structure of the nonvolatile variable resistance element 20 shown in this figure is basically the same as that shown in FIG. 4, but the inside of the filament 30 and the like are shown in more detail (i.e., as a filament change model).

[0063] In the binary storage mode, when a first low-resistance voltage pulse is applied that imparts a negative potential with respect to the second electrode 22 with respect to the first electrode 21 as a reference, oxygen in the filament 30 migrates to the first metal oxide layer 23 as oxygen ions 33, thereby increasing oxygen defects 31 in the filament 30, decreasing the resistance value of the filament 30, and decreasing the resistance value of the entire nonvolatile variable resistance element 20. On the other hand, in the binary storage mode, when a first high-resistance voltage pulse is applied that imparts a positive potential with respect to the second electrode 22 with respect to the first electrode 21 as a reference, oxygen ions 33 in the first metal oxide layer 23 migrate to the filament 30 and bond with the oxygen defects 31 in the filament 30, thereby decreasing the oxygen defects 31 in the filament 30, increasing the resistance value of the filament 30, and increasing the resistance value of the entire nonvolatile variable resistance element 20.

[0064] In the multi-value memory mode, when it is determined that the resistance value of the non-volatile variable resistance element 20 is smaller than the lower limit of the target resistance value, a second high-resistance voltage pulse having a second energy greater than the first energy corresponding to one application of the first high-resistance voltage pulse and imparting a positive potential to the second electrode 22 with respect to the first electrode 21, followed by a first low-resistance voltage pulse, are applied to the non-volatile variable resistance element 20 in order to increase the resistance (S21 and S23 in Figure 5A).

[0065] Here, when a second high-resistance voltage pulse having a large second energy is applied to nonvolatile variable resistance element 20 (S21 in FIG. 5A ), it is thought that not only do oxygen ions in first metal oxide layer 23 migrate to filament 30 and bond with oxygen defects 31 in filament 30, but also that the large energy applied generates numerous oxygen defect generation-difficult regions 32 in filament 30. As a result, the filament area on the outer shape defined by the outline remains almost unchanged, but the effective filament area becomes smaller. In other words, high resistance is possible without significantly reducing the oxygen defect density.

[0066] As described above, according to this embodiment, it is possible to reversibly and analogically change the effective filament area of ​​the filament without significantly changing the oxygen defect density in the filament (see FIG. 3), and a driving method is realized that can analogically change the resistance value in either the direction of increasing or decreasing the resistance.

[0067] FIG. 8 is a flowchart showing the operation of the semiconductor device 100 according to the modified embodiment (i.e., a method of driving the semiconductor device 100). Here, similar to FIG. 5A , the operation is shown when a resistance value is written to the nonvolatile variable resistance element 20 as a weight that takes an analog continuous value used in a neural network or the like (i.e., in a multi-value storage mode). However, compared to the flowchart shown in FIG. 5A , step S21 in FIG. 5A is replaced with step S21a in FIG. 8 , and step S22 in FIG. 5A is replaced with step S22a in FIG. 8 . The differences from the flowchart shown in FIG. 5A are described below.

[0068] 5A (S21), HR pulses are applied consecutively N (≧2) times (S21a). Here, each HR pulse is a third high-resistance voltage pulse that applies a positive potential to the second electrode 22 relative to the first electrode 21. For example, the HR pulse may be a high-resistance pulse in the binary storage mode (i.e., the first high-resistance voltage pulse), a strong HR pulse in the above embodiment (i.e., the second high-resistance voltage pulse), or a high-resistance pulse with any amplitude different from either of these. In other words, as long as the energy applied by the N third high-resistance voltage pulses is greater than the energy applied by a single first high-resistance voltage pulse, N may be any value equal to or greater than 2, and the amplitude of the third high-resistance voltage pulse may be any voltage.

[0069] In this modification, when the drive circuit 40 determines that the number of N applications of the HR conversion pulse (S21a) and the LR conversion pulse (S23) has reached the upper limit (Yes in S20), it increases the number of applications N of the HR conversion pulse to further increase the possibility of high resistance (change step S22a), applies the HR conversion pulse N times in succession to the nonvolatile variable resistance element 20 (S21a), and then applies the LR conversion pulse (S23). Note that the combined process of steps S21a and S23 corresponds to a specific example of an application process in which a second high-resistance voltage pulse having a second energy greater than the first energy corresponding to one application of the first high-resistance voltage pulse and applying a positive potential to the second electrode 22 with respect to the first electrode 21, followed by a subsequent first low-resistance voltage pulse, is applied to the nonvolatile variable resistance element 20.

[0070] Even when the resistance is increased in this manner, a second high-resistance voltage pulse having a large second energy is applied to the nonvolatile variable resistance element 20 (S21a in FIG. 8 ), and therefore, due to the large energy applied, many oxygen defect generation-difficult regions 32 are generated in the filament 30, and although the filament area on the outer shape defined by the outline remains almost unchanged, the effective filament area becomes smaller. In other words, the resistance can be increased without significantly reducing the oxygen defect density, and the same effect as the driving method according to the embodiment can be achieved.

[0071] 9 is a diagram showing a state change model of the filament of the nonvolatile variable resistance element 20 in the driving methods according to the embodiment and the prior art. The low resistance state of case "A" and the intermediate resistance states of "B" to "E" shown in this figure basically correspond to cases "A" to "E" in FIG. 6A, respectively. However, the transition from the low resistance state of case "A" to the intermediate resistance state of case "E" in this figure includes not only a strong HR pulse (a "3.0 V" strong HR pulse) corresponding to case "E" in FIG. 6A, but also an example of N HR pulses ("2.5 V × N" strong HR pulses) according to the modified example shown in step S21a in FIG. 8.

[0072] As shown in the filament change model for case "D" in Figure 9, in the two states of the high resistance state obtained by applying a strong HR pulse of 2.5 V to the nonvolatile resistance change element 20 in the low resistance state, and the intermediate resistance state obtained by subsequently applying an LR pulse of -2.8 V, the filament area on the outer shape defined by the contour remains almost unchanged, but the effective filament area changes.

[0073] Similarly, in case "E" in Figure 9, in two states, a high resistance state obtained by applying a strong HR pulse of 3.0 V, which is stronger than in case "D," or by applying the same strong HR pulse of 2.5 V as in case "D" multiple times (N times), and an intermediate resistance state obtained by subsequently applying an LR pulse of -2.8 V, the region 32 in the filament 30 where oxygen defects are difficult to form increases compared to case "D." However, as in case "D," the filament area on the outer shape defined by the contour remains almost unchanged, and the effective filament area changes.

[0074] It is also shown that at the transition point from the high resistance state of case "D" to the low resistance state of case "A", a strong LR pulse of -3.2 V is applied to the nonvolatile resistance change element 20, as shown in the figure, so that a transition from case "D" back to case "A" is possible.

[0075] Similarly, at the transition point from the high resistance state of case "E" to the low resistance state of case "A", as shown in the figure, it is also shown that a transition from case "E" back to case "A" is possible by applying a strong LR pulse of -3.6 V to the nonvolatile resistance change element 20.

[0076] From these facts, by using a strong HR pulse and a strong LR pulse, a reversible transition between case "A" and case "D" and a reversible transition between case "A" and case "E" are possible.

[0077] FIG. 10 is a block diagram showing a detailed configuration of the semiconductor device 200 according to the embodiment.

[0078] The semiconductor device 200 corresponds to a specific embodiment of the semiconductor device 100 shown in Fig. 4, and includes a memory main unit 201 on a semiconductor substrate (not shown). The memory main unit 201 includes a memory array 202 configured by two-dimensionally arranging 1T1R memory cells M11, M12, ... each including the nonvolatile variable resistance element 20 shown in Fig. 4, a row driver 207 including a row selection circuit 208, a word line driver WLD, and a source line driver SLD, a column selection circuit 203, a write circuit 206 for performing forming and data writing, a sense amplifier 204 for detecting the amount of current flowing through a selected bit line and determining a high resistance state as data "0" and a low resistance state as data "1", and a data input / output circuit 205 for performing input / output processing of input / output data DQ via a terminal DQ.

[0079] Furthermore, the semiconductor device 200 includes a write power supply 211, which includes a power supply 213 for HR (high resistance) change and a power supply 212 for LR (low resistance) change. The semiconductor device 200 also includes an address input circuit 209 that receives an address signal input from the outside, and a control circuit 210 that controls the operation of the memory main body 201 based on a control signal input from the outside. The drive circuit 40 in FIG. 4 corresponds to the peripheral circuit excluding the memory array 202 in FIG. 10.

[0080] The memory array 202 is formed on a semiconductor substrate and includes a plurality of word lines WL0, WL1, WL2, WL3, ... and a plurality of bit lines BL0, BL1, BL2, ... that are arranged to intersect with one another, and a plurality of NMOS transistors N11, N12, N13, N14, ..., N21, N22, N23, N24, ..., N31, N32, N33, N34, ... (hereinafter referred to as "transistors N11, N12 , ...") and a plurality of nonvolatile variable resistance elements R11, R12, R13, R14, ..., R21, R22, R23, R24, ..., R31, R32, R33, R34, ... (hereinafter referred to as "nonvolatile variable resistance elements R11, R12, ...") connected in series with transistors N11, N12, ... in a one-to-one relationship, and each constitutes a memory cell M11, M12, M13, M14, ..., M21, M22, M23, M24, ..., M31, M32, M33, M34, ... (hereinafter referred to as "memory cell M11, M12, ...").

[0081] As shown in FIG. 10, the gates of transistors N11, N21, N31, ... are connected to word line WL0, the gates of transistors N12, N22, N32, ... are connected to word line WL1, the gates of transistors N13, N23, N33, ... are connected to word line WL2, and the gates of transistors N14, N24, N34, ... are connected to word line WL3.

[0082] Furthermore, transistors N11, N21, N31... and transistors N12, N22, N32... are commonly connected to source line SL0, and transistors N13, N23, N33... and transistors N14, N24, N34... are commonly connected to source line SL2. That is, source lines SL0, SL2... are arranged parallel to word lines WL0, WL1, WL2, WL3... and intersect (perpendicular to) bit lines BL0, BL1, BL2... in the present embodiment. Note that in the above configuration example, the source lines are arranged parallel to the word lines, but they may also be arranged parallel to the bit lines. Furthermore, while the source lines are configured to apply a common potential to transistors connected as plate lines, a configuration may also be adopted in which a source line selection circuit / driver configured similar to the row selection circuit / driver is provided, and selected and unselected source lines are driven with different voltages (including polarities).

[0083] Furthermore, the nonvolatile variable resistance elements R11, R12, R13, R14, ... are connected to bit line BL0, the nonvolatile variable resistance elements R21, R22, R23, R24, ... are connected to bit line BL1, and the nonvolatile variable resistance elements R31, R32, R33, R34, ... are connected to bit line BL2. In this way, the memory array 202 in this embodiment is configured so that the nonvolatile variable resistance elements R11, R21, R31, ... are connected directly to the corresponding bit lines BL0, BL1, BL2, ... without going through the NMOS transistors N11, N21, N31, ....

[0084] The control circuit 210 is a processor or the like that has built-in programs for performing control in the binary storage mode and the multi-level storage mode, and in a data write cycle, outputs a write signal to the write circuit 206 that instructs the application of a write voltage in accordance with input data Din input to the data input / output circuit 205. On the other hand, in a data read cycle, the control circuit 210 outputs a read signal that instructs a read operation to the sense amplifier 204. In addition, in the multi-level storage mode, the control circuit 210 executes control procedures in accordance with the flowcharts shown in FIGS. 5A and 8.

[0085] The row selection circuit 208 receives a row address signal output from the address input circuit 209, and in response to this row address signal, the row driver 207 applies a predetermined voltage to the selected word line from the word line driver WLD corresponding to one of the multiple word lines WL0, WL1, WL2, WL3, ...

[0086] Similarly, the row selection circuit 208 receives a row address signal output from the address input circuit 209, and in response to this row address signal, the row driver 207 applies a predetermined voltage to the selected source line from the source line driver SLD corresponding to one of the multiple source lines SL0, SL2, ...

[0087] When the write circuit 206 receives a write signal output from the control circuit 210 , it applies a write voltage to the bit line selected by the column selection circuit 203 .

[0088] The write power supply 211 is composed of an LR power supply 212 for low resistance (i.e., LR pulse and strong LR pulse) and an HR power supply 213 for high resistance (i.e., HR pulse and strong HR pulse), and the output VL0 of the LR power supply 212 is input to the row driver 207, and the output VH0 of the HR power supply 213 is input to the write circuit 206.

[0089] According to the semiconductor device 200 configured as described above, a one-chip semiconductor device is realized that performs control in a multi-value storage mode according to the flowcharts shown in Figures 5A and 8 on a non-volatile variable resistance element selected from a plurality of non-volatile variable resistance elements 20 configured two-dimensionally.

[0090] As described above, the driving method of the semiconductor device 100 according to the present embodiment and the modified example is a driving method of the semiconductor device 100, in which the semiconductor device 100 including the nonvolatile variable resistance element 20 continuously and reversibly changes the resistance value of the nonvolatile variable resistance element 20 by applying a voltage pulse to the nonvolatile variable resistance element 20, wherein the nonvolatile variable resistance element 20 includes a first electrode 21, a second electrode 22, and a variable resistance layer 25 sandwiched between the first electrode 21 and the second electrode 22 and having a continuously changing resistance value, the nonvolatile variable resistance element 20 transitions to a low resistance state when a first low-resistance voltage pulse is applied once, the first low-resistance voltage pulse applying a negative potential with respect to the second electrode 22 with respect to the first electrode 21 as a reference, and a first high-resistance voltage pulse applying a positive potential with respect to the second electrode 22 with respect to the first electrode 21 as a reference, The nonvolatile variable resistance element 20 has a characteristic of transitioning to a high-resistance state having a resistance value higher than that of a low-resistance state when a voltage is applied thereto, and the driving method of the semiconductor device 100 includes a determination step S10 of determining a lower limit of a target resistance value of the nonvolatile variable resistance element 20, a measurement step S11 of measuring the resistance value of the nonvolatile variable resistance element 20, a determination step S13 of judging whether the measured resistance value is smaller than the lower limit of the target resistance value, and application steps S21 and S23 of applying to the nonvolatile variable resistance element 20 a second high-resistance voltage pulse having a second energy greater than a first energy corresponding to one application of the first high-resistance voltage pulse and applying a positive potential to the second electrode 22 with respect to the first electrode 21, and the subsequent first low-resistance voltage pulse, if it is judged that the measured resistance value is smaller than the lower limit of the target resistance value.

[0091] As a result, when nonvolatile variable resistance element 20 is changed in an analog manner to an intermediate resistance state between a high resistance state and a low resistance state, a second high-resistance voltage pulse having a second energy greater than the first energy corresponding to a single application of the first high-resistance voltage pulse and providing a positive potential with respect to second electrode 22 with respect to first electrode 21 as a reference, followed by a subsequent first low-resistance voltage pulse, is applied to nonvolatile variable resistance element 20. As a result, it is possible to reversibly and analogically change the effective filament area of ​​the filament of nonvolatile variable resistance element 20 without significantly changing the oxygen defect density in the filament. Therefore, compared to conventional writing methods, a method for driving a semiconductor device is realized that improves the variation in resistance value during writing, the fluctuation in resistance value during reading, and retention degradation for nonvolatile variable resistance elements, and is capable of analogically changing the resistance value in either the high-resistance or low-resistance direction.

[0092] Here, the measuring step S11, the determining step S13, and the applying steps S21 and S23, etc. may be repeated until it is determined in the determining step S13 that the measured resistance value is not smaller than the lower limit of the target resistance value. As a result, if the resistance value does not become equal to or greater than the lower limit of the target resistance value by one applying step S21, S23, etc., repeating the applying steps S21, S23, etc. may result in a resistance value equal to or greater than the lower limit of the target resistance value.

[0093] Furthermore, the method may further include a change step S22 of changing the second energy to a larger value when the application steps S21 and S23 are repeated a predetermined number of times and it is determined in the determination step S13 that the measured resistance value is smaller than the lower limit of the target resistance value. This increases the applied energy and then repeats the application steps S21 and S23, thereby increasing the possibility of achieving a resistance value equal to or greater than the lower limit of the target resistance value.

[0094] The second high-resistance voltage pulse may have an amplitude larger than that of the first high-resistance voltage pulse, thereby realizing the second high-resistance voltage pulse by increasing the amplitude of the applied voltage pulse.

[0095] Furthermore, the measuring step S11, the determining step S13, and the applying steps S21 and S23 are repeated until it is determined in the determining step S13 that the measured resistance value is not smaller than the lower limit of the target resistance value, and the driving method may further include a changing step S22 of changing the amplitude of the second high-resistance voltage pulse to a larger amplitude when the applying steps S21 and S23 are repeated a predetermined number of times and it is determined in the determining step S13 that the measured resistance value is smaller than the lower limit of the target resistance value. As a result, if the resistance value does not become equal to or greater than the lower limit of the target resistance value in a single application step S21 and S23, the applied amplitude is increased and the applying steps S21 and S23 are repeated, thereby increasing the possibility of achieving a resistance value equal to or greater than the lower limit of the target resistance value.

[0096] The second high-resistance voltage pulse may be composed of a plurality of consecutive third high-resistance voltage pulses that apply a positive potential to the second electrode 22 with respect to the first electrode 21. In this way, the second high-resistance voltage pulse can be realized by applying a plurality of voltage pulses.

[0097] Furthermore, the measuring step S11, the determining step S13, and the applying steps S21a and S23 are repeated until it is determined in the determining step S13 that the measured resistance value is not smaller than the lower limit of the target resistance value, and the driving method may further include a changing step S22a in which, when the applying steps S21a and S23 are repeated a predetermined number of times and it is determined in the determining step S13 that the measured resistance value is smaller than the lower limit of the target resistance value, the number of third high-resistance voltage pulses constituting the second high-resistance voltage pulse is increased. As a result, when the resistance value does not become equal to or greater than the lower limit of the target resistance value in a single application step S21a and S23, the number of applied voltage pulses is increased and the applying steps S21a and S23 are repeated, thereby increasing the possibility of achieving a resistance value equal to or greater than the lower limit of the target resistance value.

[0098] Furthermore, the resistance change layer 25 is a local region where a current flows between the first electrode 21 and the second electrode 22, and has a filament 30 having a different shape corresponding to the resistance value of the nonvolatile resistance change element 20, and the effective filament area of ​​the filament 30 in a plan view of the resistance change layer 25 may be changed by the application steps S21 and S23, etc. This makes it possible to reversibly and analogically change the effective filament area of ​​the filament without significantly changing the oxygen defect density in the filament of the nonvolatile resistance change element 20.

[0099] Furthermore, the semiconductor device 100 according to the present embodiment and the modified example includes a nonvolatile variable resistance element 20 including a first electrode 21, a second electrode 22, and a variable resistance layer 25 sandwiched between the first electrode 21 and the second electrode 22 and having a resistance value that changes continuously and reversibly, and a drive circuit 40 that drives the nonvolatile variable resistance element 20, and the nonvolatile variable resistance element 20 transitions to a low resistance state when a first low-resistance voltage pulse that applies a negative potential with respect to the second electrode 22 with respect to the first electrode 21 as a reference is applied once, and When the resistance value of the nonvolatile variable resistance element 20 is smaller than the lower limit of the target resistance value, the drive circuit 40 applies to the nonvolatile variable resistance element 20 a second high-resistance voltage pulse that has a second energy greater than the first energy corresponding to one application of the first high-resistance voltage pulse and that imparts a positive potential to the second electrode 22 with respect to the first electrode 21, followed by a first low-resistance voltage pulse.

[0100] As a result, when the drive circuit 40 analogically changes the nonvolatile variable resistance element 20 to an intermediate resistance state between the high-resistance state and the low-resistance state, the drive circuit 40 applies to the nonvolatile variable resistance element 20 a second high-resistance voltage pulse having a second energy greater than the first energy corresponding to a single application of the first high-resistance voltage pulse and applying a positive potential with respect to the second electrode 22 with respect to the first electrode 21 as a reference, followed by a first low-resistance voltage pulse. As a result, it is possible to reversibly and analogically change the effective filament area of ​​the filament of the nonvolatile variable resistance element 20 without significantly changing the oxygen defect density in the filament. Therefore, compared to conventional writing methods, a semiconductor device is realized that improves the variation in resistance value during writing, the fluctuation in resistance value during reading, and retention degradation of nonvolatile variable resistance elements, and, unlike the technology of Patent Document 1, is capable of analogically changing the resistance value in either the high-resistance or low-resistance direction.

[0101] While the semiconductor device and the driving method of the semiconductor device according to the present disclosure have been described above based on the embodiments and modifications, the present disclosure is not limited to these embodiments and modifications. As long as they do not deviate from the gist of the present disclosure, various modifications that a person skilled in the art would conceive of, or other forms constructed by combining some of the components in the embodiments and modifications, are also included within the scope of the present disclosure.

[0102] For example, in the above embodiment, when the nonvolatile variable resistance element 20 is made to have a high resistance, one strong HR pulse and one LR pulse are applied to the nonvolatile variable resistance element 20 in one cycle (S21 and S23 in Figure 5A), but the number of strong HR pulses and LR pulses is not limited to one each, and at least one of the strong HR pulses and LR pulses may be multiple.

[0103] Furthermore, when the number of applications reaches an upper limit in increasing the resistance of the nonvolatile resistance change element 20, in the above embodiment, the HR voltage is increased (S22), while in the above modified example, the number of applications N is increased (S22a). However, it is not limited to increasing either one of them, and both the HR voltage and the number of applications N may be increased.

[0104] In the above embodiment, the resistance change layer 25 of the nonvolatile resistance change element 20 is configured with a stacked structure of the first metal oxide layer 23 and the second metal oxide layer 24, but is not limited to such a structure and may be configured with a single layer. Furthermore, the resistance change layer 25 is not limited to tantalum oxide, but may be configured with NiO, TiO ２ , HfO ２ , ZrO ２ The oxide may be made of a transition metal oxide or aluminum oxide.

[0105] Furthermore, the driving method of a semiconductor device according to the above embodiments and variations may be realized as a program including each step constituting the driving method, or may be realized as a computer-readable recording medium such as a DVD on which the program is recorded.

[0106] The present disclosure provides a semiconductor device capable of analogically changing the resistance value of a nonvolatile variable resistance element in either a high-resistance or low-resistance direction, and can be used, for example, for multi-value recording in nonvolatile memory.It can also be used in neural networks and the like as a machine learning model used not only for inference purposes but also for learning purposes in which weight coefficients are changed analogically.

[0107] 100, 200 Semiconductor device 20, R11 to R34 Nonvolatile variable resistance element 21 First electrode 22 Second electrode 23 First metal oxide layer 24 Second metal oxide layer 25 Variable resistance layer 30 Filament 31 Oxygen defect 32 Oxygen defect generation difficult region 33 Oxygen ion 40 Drive circuit 201 Memory main body 202 Memory array 203 Column selection circuit 204 Sense amplifier 205 Data input / output circuit 206 Write circuit 207 Row driver 208 Row selection circuit 209 Address input circuit 210 Control circuit 211 Write power supply 212 LR (low resistance) change power supply 213 HR (high resistance) change power supply

Claims

1. A method for driving a semiconductor device including a nonvolatile resistance change element, the method continuously and reversibly changing a resistance value of the nonvolatile resistance change element by applying a voltage pulse to the nonvolatile resistance change element, the nonvolatile resistance change element comprising a first electrode, a second electrode, and a resistance change layer sandwiched between the first electrode and the second electrode and having a continuously changing resistance value, the nonvolatile resistance change element having a characteristic of transitioning to a low resistance state when a first low-resistance voltage pulse is applied once, the first electrode being a reference potential with respect to the second electrode, and transitioning to a high resistance state having a resistance value higher than that of the low resistance state when a first high-resistance voltage pulse is applied once, the first electrode being a reference potential with respect to the second electrode, the method for driving the semiconductor device comprising: a determination step of determining a lower limit of a target resistance value of the nonvolatile resistance change element; a measurement step of measuring a resistance value of the nonvolatile resistance change element; and a determination step of determining whether the measured resistance value is smaller than the lower limit of the target resistance value. a first energy corresponding to a first application of the first high-resistance voltage pulse and applying a positive potential to the second electrode relative to the first electrode, the second energy being greater than a first energy corresponding to a single application of the first high-resistance voltage pulse, and the first low-resistance voltage pulse being subsequent thereto, when the measured resistance value is determined to be smaller than a lower limit of the target resistance value, to the non-volatile resistance change element.

2. The method of driving a semiconductor device according to claim 1, wherein the measuring step, the judging step, and the applying step are repeated until it is judged in the judging step that the measured resistance value is not smaller than the lower limit of the target resistance value.

3. The method of driving a semiconductor device according to claim 2, further comprising a change step of changing the second energy to a larger value when the application step is repeated a predetermined number of times and it is determined in the determination step that the measured resistance value is smaller than the lower limit of the target resistance value.

4. The method of driving a semiconductor device according to claim 1, wherein the second high resistance voltage pulse has an amplitude larger than an amplitude of the first high resistance voltage pulse.

5. The method for driving a semiconductor device according to claim 4, wherein the measuring step, the judging step, and the applying step are repeated until it is judged in the judging step that the measured resistance value is not smaller than the lower limit of the target resistance value, and the driving method further includes a changing step of changing the amplitude of the second high resistance voltage pulse to a larger amplitude when the applying step is repeated a predetermined number of times and it is judged in the judging step that the measured resistance value is smaller than the lower limit of the target resistance value.

6. The method for driving a semiconductor device according to claim 1, wherein the second high-resistance voltage pulse is composed of a plurality of continuous third high-resistance voltage pulses that apply a positive potential to the second electrode with respect to the first electrode.

7. The method for driving a semiconductor device according to claim 6, wherein the measuring step, the judging step, and the applying step are repeated until it is judged in the judging step that the measured resistance value is not smaller than the lower limit of the target resistance value, and the driving method further includes a changing step of changing the number of the third high resistance voltage pulses constituting the second high resistance voltage pulse to a larger number when the applying step is repeated a predetermined number of times and it is judged in the judging step that the measured resistance value is smaller than the lower limit of the target resistance value.

8. The method for driving a semiconductor device according to claim 1, wherein the resistance change layer is a local region between the first electrode and the second electrode through which current flows, and has filaments having different shapes corresponding to the resistance value of the nonvolatile resistance change element, and an effective filament area of ​​the filaments in a planar view of the resistance change layer is changed by the application process.

9. A semiconductor device comprising: a nonvolatile resistance change element including a first electrode, a second electrode, and a resistance change layer sandwiched between the first electrode and the second electrode, the resistance change layer having a resistance value that changes continuously and reversibly; and a drive circuit that drives the nonvolatile resistance change element, wherein the nonvolatile resistance change element has a characteristic of transitioning to a low resistance state when a first low-resistance voltage pulse that imparts a negative potential with respect to the second electrode with the first electrode as a reference is applied once, and transitioning to a high resistance state having a resistance value higher than the low resistance state when a first high-resistance voltage pulse that imparts a positive potential with respect to the second electrode with the first electrode as a reference is applied once, and wherein the drive circuit applies to the nonvolatile resistance change element a second high-resistance voltage pulse that has a second energy greater than a first energy equivalent to one application of the first high-resistance voltage pulse and imparts a positive potential with respect to the second electrode with the first electrode as a reference, and the first low-resistance voltage pulse subsequent thereto, when the resistance value of the nonvolatile resistance change element is smaller than a lower limit of a target resistance value.

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