Computing device and method for operating a computing device

Abstract

According to various aspects, a computing device (100) is herein described. The computing device (100) is configured to determine a representation of a first number and a second number in a computing numeral system, the computing numeral system including a positional base system in which each position is associated with a numeral weight and a digit to represent a number in the computing numeral system, wherein the numeral weight is defined by a base of the positional base system and wherein each digit is associated with an amount of unique digit elements, wherein the amount of unique digit elements is greater by at least two than the base; and to execute one or more mathematical operations based on the first number and the second number in the computing numeral system and determining a computing result of the one or more mathematical operations in the computing numeral system.

Description

COMPUTING DEVICE AND METHOD FOR OPERATING A COMPUTING DEVICE Technical Field

[0001] Various aspects relate to a computing device and methods for operating a computing device. Background

[0002] In general, various mathematical calculations are based on mathematical operations, such as addition, subtraction, multiplication, division, for example, in a well defined numeral system. Standard numeral systems that are currently used for computer based calculations are position based numeral system, such as the binary system, the decimal system, or the hexadecimal system for example, and – in general, the respective mathematical operations, addition and multiplication for example, in such standard numerals systems include a so called carry propagation. The carry propagation may have the effect that such mathematical calculations cannot be digit-wise parallelized for efficiently computing with great numbers using standard computing devices. Brief Description of the Disclosure

[0003] Various aspects relate to a computing device and methods for operating a computing device employing a novel type of carrying out mathematical operations. The computing device and the methods for operating the computing device, as described herein, are configured to allow for a digit-wise parallel computing of addition calculation steps and subtraction calculation steps as well as of multiplication calculation steps and division calculation steps. The mathematical operations described herein are performed by a computing device in a computing numeral system that allows for a carry propagation free addition, a carry propagation free subtraction, and a carry propagation free multiplication and division of numbers in the computing numeral system. Therefore, a representation of a first number and a second number - that are used as arguments in the desired one or more of the mathematical operations - in the computing numeral system are determined. The computing numeral systemincludes (e.g., is) a positional base system in which each position (i) is associated with a numeral weight (b i) andwith a digit (di) to represent a number in the computing numeral system. The numeral weight is defined by a base (b) (the base may be also referred to as radix) of the positional base system and each digit (di) is associated with an amount (k) of unique digit elements (ek). According to various aspects, the computing numeral system described herein includes an amount (k) of unique digit elements (ek) that is greater by at least two than the base (b), i.e., k > b + 2. In some aspects, the amount (k) of unique digit elements (ek) is greater by two than the base (b) (i.e., k = b + 2) or greater by three than the base (b) (i.e., k = b + 3). The unique digit elements (ek) can be represented by integers to allow for mathematical calculations in an equivalent way as done in a standard numeral system. However, in a standard numeral system k equals b (i.e., k=b) and, moreover, the mathematical addition, subtraction, multiplication, and division of numbers is subjected to carry propagation and therefore the sub-operations included in such mathematical operations cannot be calculated digit-wise in parallel. According to various aspects, using signed integers (i.e., positive and negative integers) to represent the unique digit elements (ek) of the computingnumeral system allows for addition and subtraction operations based on a same addition / subtraction algorithm, as described herein. In the case that signed integers are used to represent signed digit elements, a digit-wise addition and subtraction of the signed digit elements can be done in a similar way as known from math of a standard numeral system (e.g., signed digit elements (+1) + (+1) = (+2); (+2) + (-1) = (+1); (-1) + (+2) = (+1); (-1) + (-1) = (-2); (-1) + ( -1) = (-2); etc.). However, other symbols including a signed characteristics can be used in a same way as long as addition, subtraction, and multiplication suboperations of the signed digit elements are defined in analogy to the math of a standard numeral. Brief Description of the Drawings

[0004] In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily to scale, emphasis instead generally being placed upon illustrating the principles of the invention. In the following description, various aspects of the invention are described with reference to the following drawings, in which: FIG.1 shows various aspects of a computing device and a calculation algorithm associated therewith; FIG.2 shows various aspects of a calculation algorithm associated with, for example, a computing device; FIG.3A to FIG.3F show various aspects of an addition / subtraction algorithm associated with, for example, a computing device; FIG.4A to FIG.4D show various examples of an addition / subtraction algorithm associated with, for example, a computing device; FIG.5A to FIG.5E show various aspects of a multiplication algorithm associated with, for example, a computing device; FIG.6A to FIG.6D show various examples of a multiplication algorithm associated with, for example, a computing device; FIG.7A to FIG.7E show various examples of a conversion algorithm between different numeral systems associated with, for example, a computing device; FIG.8A to FIG.8G show various examples of a reconversion algorithm between different numeral systems associated with, for example, a computing device; and FIG.9A and FIG.9B show a comparison of two algorithms for carrying out addition / subtraction operations. Description

[0005] The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details, and aspects in which the invention may be practiced. These aspects are described in sufficient detail to enable those skilled in the art to practice the invention. Other aspects may be utilized, and structural, logical, and electrical changes may be made without departing from the scope of the invention. Thevarious aspects are not necessarily mutually exclusive, as some aspects can be combined with one or more other aspects to form new aspects. Various aspects are described in connection with methods and various aspects are described in connection with devices (e.g., arrangements). However, it may be understood that aspects described in connection with methods may similarly apply to the devices, and vice versa.

[0006] According to various aspects, a computing device is described herein that is configured to carry out one or more calculations including, for example, mathematical operations such as addition, subtraction, and / or multiplication. The one or more calculations are based on a computing numeral system. The computing system is configured to allow for a carry propagation free calculation of the mathematical operations; therefore, a digit-wise calculation for one or more or each of the digits of numbers included in the calculations can be carried out in parallel to increase processing speed of calculations.

[0007] FIG.1 shows a computing device 100 according to various aspects. The computing device 100 may include one or more processors 100p. The one or more processors 100p may be any kind of data processing entity (among others, including memristors, for example) as described herein. The term “processor” as used herein may be understood as any kind of technological entity that allows handling of data (also referred to as data processing entity). The data may be handled according to one or more specific functions that the processor may execute. Further, a processor as used herein may be understood as any kind of circuit, e.g., any kind of analog or digital circuit. A processor may thus be or include an analog circuit, digital circuit, mixed-signal circuit, logic circuit (e.g., a hard-wired logic circuit or a programmable logic circuit), microprocessor (for example a Complex Instruction Set Computer (CISC) processor or a Reduced Instruction Set Computer (RISC) processor), Central Processing Unit (CPU), Graphics Processing Unit (GPU), Digital Signal Processor (DSP), Field Programmable Gate Array (FPGA), integrated circuit, Application Specific Integrated Circuit (ASIC), etc., or any combination thereof. A “processor” may also be a logic-implementing entity executing software, for example any kind of computer program, for example a computer program using a virtual machine code. A “processor” as used herein may also include any kind of cloud-based processing system that allows handling of data in a distributed manner, e.g., with a plurality of logic- implementing entities communicatively coupled with one another (e.g., over the internet) and each assigned to handling the data or part of the data. By way of illustration, an application running on a server and the server can also be a “processor”. References to “processor” included herein may thus be understood as referring to processors with non-linear current-voltage characteristic curves (e.g., electron tubes, transistors, memristors). Any other kind of implementation of the respective functions, which will be described below in further detail, may also be understood as a processor. It is understood that any two (or more) of the processors detailed herein may be realized as a single entity with equivalent functionality or the like, and conversely that any single processor detailed herein may be realized as two (or more) separate entities with equivalent functionality or the like.

[0008] The computing device 100 may include a memory 100m. The term “memory” as used herein may be understood as a computer-readable medium (e.g., a non-transitory computer-readable medium), in which data or information can be stored for retrieval. References to “memory” included herein may thus be understood as referring to volatile or non-volatile memory (e.g., resistive RAM, e.g., memristors), including random access memory (RAM), read-only memory (ROM), flash memory, solid-state storage, magnetic tape, hard disk drive, optical drive, among others, or any combination thereof. Furthermore, it is appreciated that registers, shift registers, processor registers, data buffers, among others, are also embraced herein by the term memory. It is also appreciated that asingle component referred to as “memory” or “a memory” may be composed of more than one different type of memory, and thus may refer to a collective component including one or more types of memory. It is readily understood that any single memory component may be separated into multiple collectively equivalent memory components, and vice versa. Furthermore, while memory may be depicted as separate from one or more other components (such as in the drawings), it is understood that memory may be integrated within another component, such as on a common integrated chip.

[0009] According to various aspects, the one or more processors 100p of the computing device 100 may be configured to receive first input data 110 representing a first number 110X (the first number may be a first argument X of a mathematical operation X∘Y) and second input data 120 representing a second number 120Y (the second number may be a second argument Y of the mathematical operation X∘Y). The first number 110X may be represented in a standard numeral system such as the decimal numeral system, hexadecimal numeral system, or the binary numeral system, only as examples.

[0010] The one or more processors 100p of the computing device 100 may be configured to create output data 130 as a function of the first input data 110 and the second input data 120, the output data 130 representing a third number 130R that is a result of one or more mathematical operations (R = X∘Y) associated with the first number 110X and the second number 120Y.

[0011] According to various aspects, the one or more processors 100p of the computing device 100 may be configured to create the output data 130 related to the one or more mathematical operations (R = X∘Y) based on one or more calculation algorithms 200 as described herein, see, for example, FIG.2 that shows a schematic diagram of an exemplary calculation algorithm 200, according to various aspects.

[0012] According to various aspects, the calculation algorithm 200 utilized in the computing device 100 may include determining a representation 210, 220 of the first number 110X and the second number 120Y in a computing numeral system CNS. According to various aspects, in the case that the input numbers (for example, the first number 110X and the second number 120Y) are already represented in the computing numeral system CNS, the process part of determining a representation 210, 220 of the first number 110X and the second number 120Y in a computing numeral system CNS is not necessary and therefore optional dependent of the used representation of the input numbers. According to various aspects, first number 110X and the second number 120Y can be results of one or more calculations carried out in the computing numeral system CNS (for example, computed by the computing device 100), therefore, being already represented in the computing numeral system CNS.

[0013] As illustrated in TAB.1, the computing numeral system CNS may include (e.g., may be) a positional base system in which each position (i) is associated with a numeral weight (bi) and a digit (di) to represent any number in the computing numeral system CNS. The numeral weight (bi) is defined by a base (b) (the base may be also referred to as radix) of the positional base system as a function of the position and each digit (di) is associated with an amount (k) of unique digit elements (ek). As such, the computing numeral system CNS represents any number in a positional base system like a standard numeral system SNS. In general, numbers in a positional base system such as in a standard numeral system SNS or in the computing numeral system CNS may be represented in the following form (Note that anan-1… and c1c2… represent a sequence of digits, not a multiplication):The notation – as shown above - can be extended into negative exponents of the base (b). Thereby the so-called radix point, denoted for example with a point “.” or any other suitable separator sign, is used as separator of the positions with non-negative from those with negative exponent. Illustratively, fractional values can be indicated by use of a separator. Usually this separator is a period, a full stop, or a comma. Digits to the right of it are multiplied by the base b raised to a negative power or exponent. The first position to the right of the separator indicates b−1, the second position b−2, and so on for each successive position. Digits to the left of it are multiplied by the base b raised to a positive power or exponent. The first position to the left of the separator indicates b1, the second position b2, and so on for each successive position. TAB.1 Position 4 3 2 1 0 -1 -2 -3 Weight (for specific b) b4b3b2b1b0b-1b-2b-3Digit a4a3a2a1a0a-1a-2a-3Example Weight b=2 16 8 4 2 1 1 / 2 1 / 4 1 / 8 Example digit element for SNS b=2 1 0 0 1 1 1 1 0 Example digit element for CNS b=2 2 -1 0 1 -2 1 1 -1 Example Weight b=3 81 27 9 3 1 1 / 3 1 / 9 1 / 27 Example digit element for SNS b=3 2 0 1 2 1 1 2 0 Example digit element for CNS b=3 2 -1 0 1 -2 1 1 -1 Example Weight b=4 256 64 16 4 1 1 / 4 1 / 16 1 / 64 Example digit element for SNS b=4 3 1 1 3 1 2 2 0 Example digit element for CNS b=4 3 -2 0 2 -3 1 1 -1 Example Weight b=10 10000 1000 100 10 1 1 / 10 1 / 100 1 / 1000 Example digit element for SNS b=10 9 3 0 2 1 8 4 5 Example digit element for CNS b=10 6 -5 5 2 -2 -4 1 -6

[0014] It is noted that a standard numeral system is in general based on a positional base system having positive integers as digit elements, wherein the amount of distinct digit elements equals the base (b). As an example, the decimal system (with b = 10) has 10 digit elements (i.e., the positive integers from 0 to 9); the hexadecimal system (with b = 16) has 16 digit elements (i.e., the 10 positive integers from 0 to 9 and the 6 letters from A to F), and the binary system (with b = 2) has 2 digit elements (i.e., the integers 0 and 1). It is noted, that even if a standard numeral system would include shifted integers (balanced integers) as unique digit elements the mathematical operations based thereon may not allow a subtraction calculation since the shifted integers may only be other reresentatives of the positive integers and not signed integers in the concept of a subtraction operation.

[0015] According to various aspects, the computing numeral system CNS that may be the fundament of the one or more calculation algorithms 200 described herein may include an amount (k) of unique digit elements (ek) that is greater by at least two than the base (b), i.e., k ≥ b + 2. Furthermore, the computing numeral system CNS that may be the fundament of the one or more calculation algorithms 200 described herein may include positive and negative (referred to as signed) unique digit elements (ek). It is noted that the signed unique digit elements and the corresponding algorithms described herein are configured to allow for a subtraction calcultaion in the same way as the addition calcultion, i.e., 0 = e-k+ ek, 0 = -e-k- ek,

[0016] According to various aspects, for an odd base (b), the computing numeral system CNS may include the integers from -c to +c with c = (b + 1) / 2 and, for an even base (b) greater than two, the computing numeral system CNS may include the integers from -c - 1 to +c + 1 with c = b / 2 and, for an even base (b) that equals two, the computing numeral system CNS may include the five integers from –2 to 2. Such a symmetric (with respect to the integer 0) configuration of signed unique digit elements (ek) is referred to herein as balanced configuration, however, other configurations may be used in an equivalent way as long as the mathematical subtraction concept is included in such other configurations.

[0017] According to various aspects, for sake of brevity, a list of exemplary sets of signed unique digit elements (ek) for exemplary bases (b) of the computing numeral system CNS described herein is summarized as follows: b = 2; ek{-2,-1,0,1,2} with k = 5; b = 3; ek{-2,-1,0,1,2} with k = 5; b = 4; ek{-3,-2,-1,0,1,2,3} with k = 7; b = 5; ek{-3,-2,-1,0,1,2,3} with k = 7; b = 6; ek{-4,-3,-2,-1,0,1,2,3,4} with k = 9; b = 7; ek{-4,-3,-2,-1,0,1,2,3,4} with k = 9; b = 8; ek{-5,-4,-3,-2,-1,0,1,2,3,4,5} with k = 11; b = 9; ek{-5,-4,-3,-2,-1,0,1,2,3,4,5} with k = 11; b = 10; ek{-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6} with k = 13; b = 11; ek{-6,-5,-4,-3,-2,-1,0,1,2,3,4,5,6} with k = 13; and so forth.

[0018] According to various aspects, the calculation algorithm 200 utilized in the computing device 100 may include executing the one or more mathematical operations applied to the first number 110X and the second number 120Y (for example, one or more addition operations, one or more subtraction operations, one or moremultiplication operations) in the computing numeral system CNS and determining a computing result 230R associated with the one or more mathematical operations in the computing numeral system CNS.

[0019] According to various aspects, the calculation algorithm 200 utilized in the computing device 100 may include determining the third number 130R (that is a result of one or more mathematical operations (R = X∘Y) associated with the first number 110X and the second number 120Y) based on the computing result 230R. It is noted that the third number 130R can be represented in a standard numeral system SNS, wherein a reconversion operation can be used to convert the computing result 230R associated with the one or more mathematical operations in the computing numeral system CNS into the third number 130R represented in a standard numeral system SNS. However, the computing result 230R represented in the computing numeral system CNS can be used for one or more other mathematical operations (e.g., as a new input) in the computing numeral system CNS by the computing device 100.

[0020] Illustratively, the computing numeral system CNS is configured to handle numbers (as arguments X, Y) for a mathematical operation (X∘Y) in such a way, that all sub-calculations for a respective position of the numbers, in other words for each of the corresponding digits of the numbers, associated with the mathematical operation can be carried out independently from one another to allow for a digit-wise parallel computing of the mathematical operation.

[0021] According to various aspects, the first input data 110 may represent the first number 110X in an input numeral system SNS and the second input data 120 may represent the second number 120Y in the same input numeral system SNS. However, the calculation algorithm 200 is configured to be independent of the representation of the numbers in numeral systems other than the computing numeral system CNS since the calculation is carried out in the computing numeral system CNS and numbers represented in numeral systems other than the computing numeral system CNS can be converted into the computing numeral system CNS and a number (e.g., a result) represented in the computing numeral system CNS can be converted into any desired output numeral system (e.g., usually the output numeral system may be the same as the input numeral system to allow for a user friendly operation of the computing device 100). Moreover, the calculation algorithm 200 itself (e.g., the addition / subtraction operation, e.g., the multiplication operation) is configured to operate with input numbers that are already represented in the computing numeral system CNS. In other words, multiple operations can be done subsequently in the computing numeral system CNS, wherein a result of a first operation (e.g., a first addition / subtraction operation, e.g., a first multiplication operation) in the computing numeral system CNS can be the input for a second operation (e.g., a second addition / subtraction operation, e.g., a second multiplication operation).

[0022] According to various aspects, the input numeral system SNS may differ from the computing numeral system CNS at least in the ratio (b / k; bcns / kcnsvs. bsns / ksns) of the base (b; bcns; bsns) and the amount (k; kcns; ksns) of unique digit elements (ek). However, the base (bsns) of the input numeral system SNS may be, according to various aspects, the same as the base (bcns) of the computing numeral system CNS. In other words, the representation of the numbers in the computing numeral system CNS may have an greater numerical space compared to a standard numeral system, for example, the input number system SNS. It is noted, that the base of the computing numeral system CNS can be changed at any desired point if necessary or desired, e.g., by use of a base transformation.

[0023] According to various aspects, the one or more mathematical operations carried out by the computing device 100 may include an addition operation and / or a subtraction operation and the addition operation and / or thesubtraction operation is carry propagation free in the computing numeral system. The addition operation and / or the subtraction operation are based on an addition / subtraction algorithm 300, as described herein in more detail.

[0024] According to various aspects, the addition / subtraction algorithm 300 may include two or three operation matrices for a respective addition / subtraction operation, as illustrated in FIG.3A, FIG.3B, and FIG.3E, FIG.3F respectively. According to various aspects, the two or three operation matrices for a respective addition / subtraction operation may be associated with two or three suboperations, as illustrated in FIG.3C and FIG.3D respectively. The two or three suboperations are referred to herein as stages, for example, two or three stages. The amount of stages (the stages are also referred to herein as sub-operations) of a respective addition / subtraction operation may be a function of the base (b), e.g., for a base (b = 2) a respective addition / subtraction operation may include three stages (see FIG.3B and FIG.3D) and for other bases (b > 2) a respective addition / subtraction operation may include two stages (see FIG.3A and FIG.3C).

[0025] In the following, a first addition / subtraction operation matrix may be denoted with “OP-Matrix Add / Sub Stage-1”, a second addition / subtraction operation matrix may be denoted with “OP-Matrix Add / Sub Stage-2”, and, if necessary (e.g., for b = 2) a third addition / subtraction operation matrix may be denoted with “OP-Matrix Add / Sub Stage-3”. According to various aspects, one or more of the addition / subtraction operation matrices may be represented accordingly by one or more lookup tables 310, 310a, 310b, 320 (e.g., stored in the memory 100m of the computing device 100). The one or more lookup tables 310, 310a, 310b, 320 may be stored as lookup data in any suitable form to be processed by the one or more processors 100p of the computing device 100. The one or more processors 100p of the computing device 100 are configured to receive the respective lookup data to carry out the addition / subtraction algorithm 300. It is noted that operation matrices may be dependent from the respetive base (b) of the computing numeral system CNS, therefore, for each base (b) the corresponding operation matrices may be provided to the one or more processors 100p, for example, being stored as one or more lookup tables 310, 310a, 310b, 320 in the memory 100m of the computing device 100.

[0026] According to various aspects, the one or more processors 100p of the computing device 100 may be configured to determined the respectively used addition / subtraction operation matrices to carry out the addition / subtraction algorithm 300. In this case, no lookup data may be transferred to the one or more processors from a memory 100m, as illustrated in FIG.3E and FIG.3F. According to various aspects, the one or more processors 100p (e.g., including one or more analog processing devices, such as memristors, for example) of the computing device 100 may be operated to add and / or subtract the respective input numbers in accordance with the addition / subtraction operation matrices in hardware.

[0027] According to various aspects, the one or more processors 100p of the computing device 100 may be configured to the receive lookup data, the lookup data representing the one or more lookup tables 310, 310a, 310b, 320. As illustrated in tables TAB.2A and TAB.2B (for an odd base b ≥ 3), tables TAB.2C and TAB.2D (for an even base b ≥ 4), tables TAB.2E and TAB.2F (for an even base b ≥ 6), and tables TAB.2G to TAB.2I (for even base b = 2) below, the one or more lookup tables 310, 310a, 310b, 320 may represent, for positions (i) of the computing numeral system, a first intermediate digit result (Zi) as a function of an addition / subtraction operation in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y). The one or more lookup tables 310, 310a, 310b, 320 may further represent, for positions (i) of the computing numeral system, a second intermediate digit result (Ti+1) as a function of theaddition / subtraction operation in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y). The first intermediate digit result (Zi) and the second intermediate digit result (Ti+1) may be calculated in a first sub-operation, e.g., referred to as a split operation since a result of the digit-wise addition / subtraction operation is split into a number (Zi) (associated with the same digit (i) as the corresponding digit (Xi) of the first number (X) and the corresponding digit (Yi) of the second number (Y)) and into a number Ti+1(associated with a subsequent digit (i+1) that is not the same as the corresponding digit (Xi) of the first number (X) and the corresponding digit (Yi) of the second number (Y)).

[0028] According to various aspects, in a split operation, a first intermediate digit result (Zi) is associated with a respective digit (i) in the computing numeral system and the second intermediate digit result (Ti+1) is associated with another respective digit (i+1) in the computing numeral system. According to various aspects, the other respective digit (i+1) of the second intermediate digit result (Ti+1) may a greater by one than the respective digit (i) of the first intermediate digit result (Zi) or the other respective digit (i-1) of the second intermediate digit result (Ti+1) may be less by one than the respective digit (i) of the first intermediate digit result (Zi).

[0029] The one or more lookup tables 310, 320, 330 may further represent, for positions (i) of the computing numeral system, a summation digit result (Si) as a function of the addition / subtraction operation in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y). The summation digit result (Si) may represent a sum (associated with signed digit elements, therefore a sum may include subtraction as well) of the first intermediate digit result (Zi) and the second intermediate digit result (Ti) and the sum may be calculated in a second sub-operation, e.g., referred to as a sum operation since intermediate results of the digit-wise addition / subtraction operation are merged into a number (Si). According to various aspects, for each position (i) of the computing numeral system the computing result in the computing numeral system is based on a summation (Si) of the first intermediate digit result (Zi) and a corresponding second intermediate digit result (Ti). The first intermediate digit result (Zi) and the corresponding second intermediate digit result (Ti) are associated with a same respective digit (i).

[0030] According to various aspects, the calculation algorithm 200 (e.g., the addition / subtraction algorithm 300) is performed in the computing numeral system CNS based on a first sub-operation and a second sub-operation as described herein; wherein, in the first sub-operation, the first intermediate digit result (Zi) and the second intermediate digit result (Ti+1) are calculated, and wherein, in the second sub-operation, the sum (Si) of the first intermediate digit result (Zi) and a corresponding second intermediate digit result (Ti) is calculated to provide the computing result 230R in the computing numeral system CNS.

[0031] TAB.2A shows an operation matrix of a split operation and TAB.2B shows an operation matrix of a sum operation for an odd base greater than 2 (b ≥ 3), according to various aspects. For an odd base greater than 2 (b ≥ 3), the addition / subtraction algorithm 300 may include (e.g., solely) two stages, therefore, two operation matrices (e.g., Op-Matrix Stage1 and Op-Matrix Stage2), wherein the two operation matrices may include a first operation matrix associated with the split operation (e.g., Op-Matrix Stage1) and a second operation matrix associated with the sum operation (e.g., Op-Matrix Stage2). TAB.2A Op-Matrix Stage 1 – odd base greater than 2 (b ≥ 3)Xi Yi Zi Ti+1 {-c,[…],c} {-c,[…],c} {-c+1,[…],c-1} {-1,0,1} TAB.2B Op-Matrix Stage 2 – odd base greater than 2 (b ≥ 3) Zi Ti+1 Si {-c+1,[…],c-1} {-1,0,1} {-c,[…],c}

[0032] TAB.2C shows an operation matrix of a split operation and TAB.2D shows an operation matrix of a sum operation for an even base greater than 2 (b ≥ 4), according to various aspects. For an even base greater than 2 (b ≥ 4), the addition / subtraction algorithm 300 may include (e.g., solely) two stages, therefore, two operation matrices (e.g., Op-Matrix Stage1 and Op-Matrix Stage2), wherein the two operation matrices may include a first operation matrix associated with the split operation (e.g., Op-Matrix Stage1) and a second operation matrix associated with the sum operation (e.g., Op-Matrix Stage2). TAB.2C Op-Matrix Stage 1 – even base greater than 2 (b ≥ 4) Xi Yi Zi Ti+1 {-c-1,[…],c+1} {-c-1,[…],c+1} {-c+1,[…],c} {-2,-1,0,1} TAB.2D Op-Matrix Stage 2 – even base greater than 2 (b ≥ 4) Zi Ti+1 Si {-c+1,[…],c} {-2,-1,0,1} {-c,[…],c+1}

[0033] TAB.2E shows an operation matrix of a split operation and TAB.2F shows an operation matrix of a sum operation for an even base greater than 5 (b ≥ 6), according to various aspects. For an even base greater than 5 (b ≥ 6), the addition / subtraction algorithm 300 may include (e.g., solely) two stages, therefore, two operation matrices (e.g., Op-Matrix Stage1 and Op-Matrix Stage2), wherein the two operation matrices may include a first operation matrix associated with the split operation (e.g., Op-Matrix Stage1) and a second operation matrix associated with the sum operation (e.g., Op-Matrix Stage2). TAB.2E Op-Matrix Stage 1 – even base greater than 5 (b ≥ 6) Xi Yi Zi Ti+1{-c-1,[…],c+1} {-c-1,[…],c+1} {-c+1,[…],c} {-1,0,1} TAB.2F Op-Matrix Stage 2 – even base greater than 5 (b ≥ 6) Zi Ti+1 Si {-c+1,[…],c} {-1,0,1} {-c,[…],c+1}

[0034] TAB.2G shows an operation matrix of a first split operation, and TAB.2H shows an operation matrix of a second split operation, and TAB.2I shows an operation matrix of a sum operation for an even base of 2 (b = 2), according to various aspects. For this (binary) base, the addition / subtraction algorithm 300 may include (e.g., solely) three stages, therefore, three operation matrices (e.g., Op-Matrix Stage1, Op-Matrix Stage2, and Op-Matrix Stage3), wherein the three operation matrices may include a first operation matrix associated with the first split operation (e.g., Op-Matrix Stage1), a second operation matrix associated with the second split operation (e.g., Op- Matrix Stage2), and a third operation matrix associated with the sum operation (e.g., Op-Matrix Stage3). TAB.2G Op-Matrix Stage 1 – base 2 (b = 2) Xi Yi Z1i T1i+1 {-2,[…],2} {-2,[…],2} {0,1} {-2,[…],2} TAB.2H Op-Matrix Stage 2 – base 2 (b = 2) Z1i T1i+1 Z2i T2i+1 {0,1} {-2,[…],2} {0,1} {-1,0,1} TAB.2I Op-Matrix Stage 3 – base 2 (b = 2) Z2iT2i+1Si{0,1} {-1,0,1} {-1,[…],2}

[0035] As exemplarily shown in the tables TAB.2G to TAB.2I above, the addition / subtraction algorithm 300 is performed in the computing numeral system based on a first sub-operation, a second sub-operation, and a third sub-operation; wherein, in the first sub-operation, the first intermediate digit result (Z1i) and the second intermediate digit result (T1i+1) are calculated, and wherein, in the second sub-operation, a third intermediate digit result (Z2i)and a fourth intermediate digit result (T2i+1) are calculated as a function of the first intermediate digit result (Z1i) and a corresponding second intermediate digit result (T1i), and wherein, in the third sub-operation, the sum (Si) of the third intermediate digit result (Z2i) and a corresponding fourth intermediate digit result (T2i) is calculated to provide the computing result in the computing numeral system. According to various aspects, the first intermediate digit result (Z1i) is associated with a respective digit (i) and the second intermediate digit result (T1i+1) is associated with another respective digit (i+1) different from the respective digit (i), wherein, according to various aspects, the other respective digit (i+1; i-1) of the second intermediate digit result (T1i+1) is greater by one or is less by one than the respective digit (i) of the first intermediate digit result (Z1i). According to various aspects, the third intermediate digit result (Z2i) is associated with a respective digit (i) and the fourth intermediate digit result (T2i+1) is associated with another respective digit (i+1) different from the respecive digit (i), wherein, according to various aspects, the other respective digit (i+1; i-1) of the fourth intermediate digit result (T2i+1) is greater by one or is less by one than the respective digit (i) of the third intermediate digit result (Z2i).

[0036] According to various aspects, for an odd base addition operation and / or an odd base subtractionoperation, the first sub-operation is based on the following equations for each of the operation digits ^^^^, ^^^^ ∈{^^^^ with k = −^^, .. , ^^} and c=(b+1) / 2 with i representing a respective digit position:and the second sub-operation is based on the following equation for the input^^^^ ∈ {^^−^^+1, .. , ^^^^−1} and ^^^^ ∈ {^^−1, ^^0, ^^+1}:^^^^ = ^^^^ + ^^^^ ∈ {^^−^^, .. , ^^^^}.

[0037] According to various aspects, for an even base addition operation and / or an even base subtraction operation with a base greater then three, the first sub-operation is based on the following equations for each of theoperation digits ^^^^, ^^^^ ∈ {^^^^ with k = −^^ − 1, .. , ^^ + 1} and c=b / 2 with i representing a respective digitposition:and the second sub-operation is based on the following equation for the input^^^^ ∈ {^^−^^+1, .. , ^^^^} and ^^^^ ∈ {^^−1, ^^0, ^^+1}:^^^^ = ^^^^ + ^^^^ ∈ {^^−^^, .. , ^^^^+1}.

[0038] According to various aspects, for an even base addition operation and / or an even base subtraction operation with a base greater then five, the first sub-operation is based on the following equations for each of theoperation digits ^^^^, ^^^^ ∈ {^^^^ with k = −^^ − 1, .. , ^^ + 1} and c=b / 2 with i representing a respective digitposition:and the second sub-operation is based on the following equation for the input^^^^ ∈ {^^−^^+1, .. , ^^^^} and ^^^^ ∈ {^^−1, ^^0, ^^+1}:^^^^ = ^^^^ + ^^^^ ∈ {^^−^^, .. , ^^^^+1}.

[0039] According to various aspects, for the unique digit elements ^^^^may be any suitable signed digit elements, for example, a number of k integers. According to various aspects, the unique digit elements{^^−1, ^^0, ^^+1} may be represented by the integers {−1,0,1}, the unique digit elements {^^−2, ^^−1, ^^0, ^^+1} maybe represented by the integers {−2,−1,0,1}, the unique digit elements {^^−^^+1, .. , ^^^^} may be represented bythe integers {−^^ + 1, [… ], ^^}, the unique digit elements {^^−^^ , .. , ^^^^} may be represented by the integers{−^^, [… ], ^^}, the unique digit elements {^^−^^, .. , ^^^^+1} may be represented by the integers {−^^, [… ], ^^ + 1},the unique digit elements {^^−^^+1, .. , ^^^^−1} may be represented by the integers {−^^ + 1, [… ], ^^ − 1}, asexamples, wherein, for an even base addition operation and / or an even base subtraction operation with a base (b) greater then three, c = b / 2; and wherein, for an odd base addition operation and / or an odd base subtraction operation, with the base (b), c = (b+1) / 2.

[0040] According to various aspects, for an addition operation and / or a subtraction operation with a base thatequals two, the first sub-operation is based on the following equations for each of the operation digits ^^^^, ^^^^ ∈{−2, .. ,,and the second sub-operation is based on the following equations for the input^^1,^^ ∈ {−1,0, 1} and ^^1,^^ ∈ {−2, .. , 2}:{, 1,^^ 1,^^ }the third sub-operation is based on the following equations for the input^^2,^^ ∈ {−1,0, 1} and ^^2,^^ ∈ {−1,0, 1}:^^^^ = ^^2,^^ + ^^2,^^ ∈ {−2, .. , 2}.

[0041] It is noted, that ^^ can be determined by a signed division operation in Z (referred to as division withsigned remainder, ^^ ^^^^^^^^^^^^ ^^, wherein ^^ is (^^^^ + ^^^^). Therefore, ^^^^+1 is may be defined and may bedetermined by the function: ^^^^+1 = (^^^^ + ^^^^) sgndiv b for an arbitrary base b, wherein examples and illustrationsthereof are shown above in exemplary examples in tables 2A to 2I. It is noted, that ^^^^may be defined and may bedetermined by the function: ^^^^ = (^^^^ + ^^^^) ^^^^^^^^^^^^ ^^ for an arbitrary base b, wherein examples and illustrationsthereof are shown above in exemplary examples in tables 2A to 2I. However, other unique digit elements ranges (e.g., other integer ranges) can be used, in particular larger bases create more freedom in the specific choice of unique digit elements ranges (e.g., other integer ranges) for ^^^^+1and ^^^^. Only as an example, (c.f., TAB.2D), ^^^^may be alternatively in the range {-c,[…],c} and therefore ^^^^+1may be alternatively in the range {-1,0,1}. However, the larges possible sum of ^^^^and ^^^^+1may not exceed {-c-1,[…],c+1} and the lowest possible sum of ^^^^and ^^^^+1may not be below {-c-1,[…],c+1}. Illustratively, the sum of ^^^^and ^^^^+1may be within the range of ^^^^and ^^^^, which assures that the respective b dependent range is valid for as many as desired subsequent addition / subtraction operations.

[0042] In the following, the validity of the addition / subtraction algorithm 300 is described, by way of a mathematical proof using standard mathematical expressions as understood by a person skilled in the art. BEGIN Mathematical ProofAssume ^^ ∈ ℕ, ^^ ≥ 2 is an arbitrary base,^^ ≔ ⌈^^ ⌉ 2^^ ≔ { {−^^ + 1,… , ^^ − 1}, if ^^ odd{−^^ + 1,… , ^^}, if ^^ evenThe following applies |^^| = { −2^^, If ^^ even } = ^^Theorem 1 (Division with signed remainder):∀^^ ∈ ℤ: ∃! (^^, ^^) ∈ ℤ × ^^|^^ = ^^ ⋅ ^^ + ^^Evidence of existence (constructive):Assuming ^^ ∈ ℤ.^^ ≔ max{^^ ∈ ℤ|^^ ⋅ ^^ < ^^ + ^^}^^ ≔ ^^ − ^^ ⋅ ^^Then applies:^^ = ^^ ⋅ ^^ + ^^.It remains to show: ^^ ∈ ^^.The following applies: ^^ = ^^ − ^^^^ > ^^ − (^^ + ^^) = −^^According to the definition of T, the following applies as well:(^^ + 1) ⋅ ^^ ≥ ^^ + ^^, i.e.: ^^ ⋅ ^^ ≥ ^^ + ^^ − ^^.It follows: ^^ = ^^ − ^^ ⋅ ^^ ≤ ^^ − ^^ − ^^ + ^^ = ^^ − ^^.In case b odd, the following follows: ^^ ≤ 2^^ − 1 − ^^ = ^^ − 1.In case b even, the following follows: ^^ ≤ 2^^ − ^^ = ^^.In any case ^^ ∈ ^^.Proof of Unambiguity:Assuming ^^ ∈ ℤ and (^^1, ^^1), (^^2, ^^2) ∈ ℤ × ^^ with ^^ = ^^1^^ + ^^1 = ^^2^^ + ^^2.Presumed (oBdA, without loss of generality) ^^1 ≥ ^^2If ^^ odd:^^ = ^^ + 12Then applies0 = 1 − 2 1 − 2 ≥ 1 − 2Because of ^^ > 0 follows: ^^1 − ^^2 ≤ 0 and (^^2 − ^^1)^^ ≤ 2^^ − 2also ^^1 ≤ ^^2 and (^^2 − ^^1)^^ ≤ 2^^ − 2Presumed: ^^1 < ^^2Then applies ^^ − 1 = 2^^ − 2 ≥ (^^2 − ^^1)^^ ≥ ^^ ↯It follows: ^^1 = ^^2 and therefrom:0 = ^^ − ^^ = ^^1^^ + ^^1 − ^^2^^ − ^^2 = ^^1 − ^^2,i.e.,^^^1 = ^^2If ^^ even:^^ =^^ 2Then appliesBecause of ^^ > 0 it follows: ^^1 − ^^2 ≤ 0 and(^^2 − ^^1)^^ ≤ 2^^ − 1so ^^1 ≤ ^^2 and (^^2 − ^^1)^^ ≤ 2^^ − 1Presumed: ^^1 < ^^2Then applies ^^ − 1 = 2^^ − 1 ≥ (^^2 − ^^1)^^ ≥ ^^ ↯It follows: ^^1 = ^^2 and therefrom:0 = ^^1^^ + ^^1 − ^^2^^ − ^^2 = ^^1 − ^^2,i.e.,^^^1 = ^^2Definition (Function Division with signed remainder):^^: ℤ → ℤ × ^^^^ ↦ (^^, ^^)We write the one-dimensional projections as binary operators:^^ ^^^^^^^^^^^^ ^^ ≔ ^^ (referred to as „a signed-div b“) and^^ ^^^^^^^^^^^^ ^^ ≔ ^^ (referred to as „a signed-mod b“).Because of Theorem 1 the function ^^ is well-defined, , odd {−2^^,… ,2^^}, if ^Assuming ^̅^ ≔ { {−^^ − 1,… , ^^ + 1}, ^^f ^^ even} and ^^ ^ odd+ ≔ { {−2^^ − 2,… ,2^^ + 2}, if ^^ even}The following applies:2^^ + 1, if ^^ odd ^^ + 2, if ^^ odd2^^ + 3, if ^^ even= { ^^ + 3, if ^^ even} Theorem 2:For odd base ^^ as well as even base ^^ ≥ 6 the following applies for the function ^^+:^^+ ^^^^^^^^^^^^ ^^ = {−1,0,1}.Proof of Theorem 2:Assuming ^^ ∈ ^^+because •If −2^^ ≤ ^^ ≤ −^^, then applies because ^^ ≥ 3 also ^^ ≥ 2, such that with the representation^^ = −1 ⋅ ^^ + (^^ + ^^) with ^^ = 2^^ − 1 because−^^ + 1 ≤ −1 = −2^^ + 2^^ − 1 = −2^^ + ^^ ≤ ^^ + ^^ ≤ −^^ + ^^ = −^^ + 2^^ − 1 = ^^ − 1from the unambiguousness of the representation (Theorem 1) follows: (^^ + ^^) = ^^ ^^^^^^^^^^^^ ^^, as well as −1 = ^^ ^^^^^^^^^^^^ ^^• If −^^ < ^^ < ^^, then applies because the unambiguousness of the representation^^ = 0 ⋅ ^^ + ^^^^ = ^^ ^^^^^^^^^^^^ ^^, as well as 0 = ^^ ^^^^^^^^^^^^ ^^• If ^^ ≤ ^^ ≤ 2^^, then applies because ^^ ≥ 3 also ^^ ≥ 2, such that with the representation^^ = 1 ⋅ ^^ + (^^ − ^^) with ^^ = 2^^ − 1 because−^^ + 1 = ^^ − 2^^ + 1 = ^^ − ^^ ≤ ^^ − ^^ ≤ 2^^ − ^^ = 2^^ − 2^^ + 1 = 1 ≤ ^^ − 1from the unambiguousness of the representation follows: (^^ − ^^) = ^^ ^^^^^^^^^^^^ ^^, as well as 1 = ^^ ^^^^^^^^^^^^ ^^−1, If ^^ ≤ −^^If b even: The following applies ^^ ^^^^^^^^^^^^ ^^ = { 0, If − ^^ < ^^ < ^^ + 1}, because 1, If ^^ ≥ ^^ + 1• If −2^^ − 2 ≤ ^^ ≤ −^^: Since additionally ^^ ≥ 6 is presumed, then also applies ^^ ≥ 3, so thatwith the representation ^^ = −1 ⋅ ^^ + (^^ + ^^) with ^^ = 2^^ because−^^ + 1 ≤ −2 = −2^^ − 2 + 2^^ = −2^^ − 2 + ^^ ≤ ^^ + ^^ ≤ −^^ + ^^ = −^^ + 2^^ = ^^from the unambiguousness of the representation follows: (^^ + ^^) = ^^ ^^^^^^^^^^^^ ^^, as well as −1 = ^^ ^^^^^^^^^^^^ ^^• If −^^ < ^^ < ^^ + 1, then applies because of the unambiguousness of the representation^^ = 0 ⋅ ^^ + ^^^^ = ^^ ^^^^^^^^^^^^ ^^, as well as 0 = ^^ ^^^^^^^^^^^^ ^^• If ^^ + 1 ≤ ^^ ≤ 2^^ + 2, one obtains with the representation^^ = 1 ⋅ ^^ + (^^ − ^^) with ^^ = 2^^ because−^^ + 1 = ^^ + 1 − 2^^ = ^^ + 1 − ^^ ≤ ^^ − ^^ ≤ 2^^ + 2 − ^^ = 2^^ + 2 − 2^^ = 2 ≤ ^^from the unambiguousness of the representation: (^^ − ^^) = ^^ ^^^^^^^^^^^^ ^^, as well as 1 = ^^ ^^^^^^^^^^^^ ^^Note 1: ^^ = 4 or ^^ = 2 may be particular cases to be considered, since:For ^^ = 4:The following applies ^^ = 2 and ^^ = {−1,… ,2}.For ^^:= −2^^ − 2 = −6 is in the representation ^^ = −1 ⋅ ^^ − 2−2 < −1 = −^^ + 1,i.e., because −2 ∉ ^^ it applies:well as −6 ^^^^^^^^^^^^ 4 ≠ −1.Rather, the following applies with ^^ = −2 ⋅ ^^ + 2 because −^^ + 1 = −1 ≤ 2 = ^^ : ^^ ∈ ^^, i.e.,−6 ^^^^^^^^^^^^ 4 = −2 and −6 ^^^^^^^^^^^^ 4 = 2.(The proof of Theorem 2 shows furthermore, that for ^^ ∈ ^^+ under the attional condition^^ > −2^^ − 2 (because −^^ + 1 = −1 = −2^^ − 1 + 2^^ = −2^^ − 1 + ^^ ≤ ^^ + ^^) it appliesagain: ^^ ^^^^^^^^^^^^ 4 ∈ {−1,0,1})For ^^ = 2:The following applies: ^^ = 1 and ^^ = {0; 1}.For ^^:= −2^^ − 2 = −4 is in the representation ^^ = −1 ⋅ ^^ − 2−2 < 0 = −^^ + 1, i.e., −2 ∉ ^^.Rather, with ^^ = −2 ⋅ ^^ + 0 because −^^ + 1 = 0 ≤ 1 = ^^ : ^^ ∈ ^^, i.e., −4 ^^^^^^^^^^^^ 2 = −2and −4 ^^^^^^^^^^^^ 2 = 0.Corresponding considerations show:Note 2: While ^^ is by definition for an odd Basis ^^ symmetric regarding 0 (referred to as ^^ „being balanced“ for an odd base), this does not apply to an even base. Definition (Addition matrix function for an arbitrary base ^^)^^^^^^^^^^: ^̅^ × ^̅^ → ^^ × ℤ(^^, ^^) ↦ ((^^ + ^^) ^^^^^^^^^^^^ ^^, (^^ + ^^) ^^^^^^^^^^^^ ^^),wherein „+“ stands for an addition operation in ℤ. If ^^ ∉ {2; 4}Assuming If ^^ = 4}.If ^^ = 2From Theorem 2 and the consideration of particular cases for base ^^ = 2 and ^^ = 4 follows:Theorem 3 (Function of the addition matrix for an arbitrary base ^^):^^^^^^^^^^(^̅^ × ^̅^) ⊆ ^^ × ^^Theorem 4 (Unity of the balanced cpf-addition / subtraction for ^^ > 2):For ^^ > 2, ^^1, ^^1, ^^2, ^^2 ∈ ^̅^ and (^^^^ , ^^^^): = ^^^^^^^^^^(^^^^, ^^^^)∀ ^^ ∈ {1,2} gilt: ^^1 + ^^2 ∈ ^̅^.Proof of Unity (Uniqueness): if ^^ odd: According to Theorem 3 applies according to the definition of ^^: −^^ + 1 ≤ ^^1 ≤ ^^ − 1 and −1 ≤ ^^2 ≤ 1 and therefore: −^^ ≤ ^^1 + ^^2 ≤ ^^,i.e., ^^1 + ^^2 ∈ ^̅^.If ^^ ≥ 6 and ^^ ^^^^^^^^: According to Theorem 3 applies according to the definition of ^^:−^^ + 1 ≤ ^^1 ≤ ^^ and −1 ≤ ^^2 ≤ 1 and therefore: −^^ ≤ ^^1 + ^^2 ≤ ^^ + 1,i.e., ^^1 + ^^2 ∈ ^̅^.If ^^ = 4: According to Theorem 3 applies according to the definition of ^^:−^^ + 1 ≤ ^^1 ≤ ^^ and −2 ≤ ^^2 ≤ 1 and therefore: −^^ − 1 ≤ ^^1 + ^^2 ≤ ^^ + 1,i.e., ^^1 + ^^2 ∈ ^̅^.Preparations:For ^^ ∈ ℕ0 assume ^^^^ ≔ {^^ ∈ ℕ0|^^ ≤ ^^}.For an arbitrary base ^^, consider the sets of finite sequences (Tuple) in ^^ and in ^̅^: AssumingBecause of ^^ ⊂ ^̅^ follows ^^∗ ⊂ ^^.Defining further:0 ∈ ^^ 0,Considering the polynomial function^^ ∶ ^^ → ℤ defined by^^, follows by iterated application of Theorem 1:^^(^^∗) = ℤ.^^ is in general not injective, however, the limitation ^^^^^^^^from ^^ to ^^∗is, because of the uniqueness according to Theorem 1, bijective.Definition (Carry-propagation-free addition and subtraction für ^^ > 2)Assuming ^^ > 2.Assuming ^^, ^^ ∈ ℤ and^^ , ^^. Step 1:Assuming ^^ ≔ 1 + max{^^, ^^}.Generating the finite sequences,^^0 ≔ 0(^^^^ , ^^^^+1):= ^^^^^^^^^^(^̂^^^, ^̂^^^) ∀ ^^ ∈ {0,… , ^^ − 1},^^^^ ≔ 0wherein, If ^^ ≤ ^^ ^^^^ , If ^^ ≤ ^^If i > m } and ^̂^^^ ≔ { 0, If i > n}(From Theorem 3 follows: (^^^^)^^∈^^^^ as well as∈ ^^ ∀ ^^ ∈ {0,… , ^^}.)Step 2: Generating the finite result sequence (^^^^)^^∈^^^^:^^^^ ≔ ^^^^ + ^^^^ ∀ ^^ ∈ {0,… , ^^} , where potentially occurring leading zeros are removed.It is shown: ^^^^ ∈ ^̅^ ∀ ^^ ∈ {0,… , ^^}Proof: Assuming ^^ ∈ {0,… , ^^}.Because of ^^^^ ∈ ^^ and ^^^^ ∈ ^^ followsa) if ^^ odd: The following applies −^^ + 1 ≤ ^^^^ ≤ ^^ − 1 and −1 ≤ ^^^^ ≤ 1, so that follows:−^^ ≤ ^^^^ + ^^^^ ≤ ^^, i.e., the following applies: ^^^^ ∈ ^̅^.b) If ^^ ≥ 6 even:The following applies −^^ + 1 ≤ ^^^^ ≤ ^^ and −1 ≤ ^^^^ ≤ 1, so that follows:−^^ ≤ ^^^^ + ^^^^ ≤ ^^ + 1, i.e., the following applies: ^^^^ ∈ ^̅^.c) If ^^ = 4:The following applies −^^ + 1 ≤ ^^^^ ≤ ^^ and −2 ≤ ^^^^ ≤ 1, so that follows:−^^ − 1 ≤ ^^^^ + ^^^^ ≤ ^^ + 1, i.e., the following applies: ^^^^ ∈ ^̅^.In order to show that the method presented is indeed an addition / subtraction, we may prove, that following applies:Proof: With the above notations for ^^^^and ^̂^^^this is equivalent to:The following applies:^^^^ = ^^^^ + ^^^^ ∀ ^^ ∈ {0,… , ^^},^^^^ = (^^^^ + ^̂^^^) ^^^^^^^^^^^^ ^^ ∀ ^^ ∈ {0,… , ^^} (also for ^^ = ^^, since 0 ^^^^^^^^^^^^ ^^ = 0) and^^^^ = (^^^^−1 + ^̂^^^−1) ^^^^^^^^^^^^ ^^ ∀ ^^ ∈ {1,… , ^^}, i.e.,^^^^+1 = (^^^^ + ^̂^^^) ^^^^^^^^^^^^ ^^ ∀ ^^ ∈ {0,… , ^^ − 1}.According to the definition of the operators ^^^^^^^^^^^^ and ^^^^^^^^^^^^ follows:^^^^ + ^̂^^^ = (^^^^ + ^̂^^^) ^^^^^^^^^^^^ ^^ + ^^ ⋅ (^^^^ + ^̂^^^) ^^^^^^^^^^^^ ^^ = ^^^^ + ^^ ⋅ ^^^^+1∀ ^^ ∈ {0,… , ^^ − 1}Because of ^^^^ = ^̂^^^ = 0 follows:∈^^−1(and because of ^^0 = 0 follows further)(and because of^^^^ = 0 further)Note 3: Zur Addition von^^ = ∑ ^^∈^^^^ ^^^^ ⋅ ^^^^and ^^ = ∑ ^^∈^^^^ ^^^^ ⋅ ^^^^ the classical position-wise addition method provides the unique, finite sequence of positionsfor which follows^^. However, this method is inefficient due to carry propagation. Furthermore, it is only applicable, if all positions (digits) (i.e., sequence elements) have the same signum or are zero. In more detail:Assuming(^^^^)^^∈^^^^ , (^^^^)^^∈^^^^ ∈ ^^,^^ ≔ 1 + max{^^, ^^},(^^^^)^^∈^^^^ , (^̂^^^)^^∈^^^^ ∈ ^^ are defined in the same way as above.The classic addition method requires the generation of a finite sequence of carries:(^^^^)^^∈^^^^with^^0 = 0 and^^^^ = (^^^^−1 + ^̂^^^−1 + ^^^^−1) ^^^^^^ ^^ ∀ ^^ ∈ {1,… , ^^},wherein ^^^^^^ is the operator of the integer division: ^^ ^^^^^^ ^^ = ⌊^^ / ^^⌋.The finite result sequenceis:^^^^ = (^^^^ + ^̂^^^ + ^^^^) ^^^^^^ ^^ ∀ ^^ ∈ {0,… , ^^}.The inefficiency here lies in the recursiveness of the procedure when determiningThe carriespropagating, i.e., because ^^^^ is a function of ^^^^−1, ^^^^ is a function of ^^0, ^̂^0, … , ^^^^, ^̂^^^. Accordingly, ^^^^can be determined only sequentially. With carry-propagation-free addition, however, the following applies:^^^^ = (^^^^−1 + ^̂^^^−1) ^^^^^^^^^^^^ ^^ ∀ ^^ ∈ {1,… , ^^} and,^^^^ = (^^0 + ^̂^0) ^^^^^^^^^^^^ ^^.The carries do not propagate. Instead, the carries only cause a potential single-digit shift in the result,i.e., ^^^^ is solely dependent on ^^^^−1, ^̂^^^−1,^̂^^^ . This enables the parallel determination of all elements^^^^of the finite result sequence. Furthermore, the balanced carry-free addition, as described herein, also implicitly covers subtraction through the use of balanced digits: Definition (negative finite sequence): The finite sequence(−^^^^)^^∈^^^^is described as negative sequence to(^^^^)and is written asNote 4Since ^̅^ is balanced, applies with (^^^^)^^∈^^^^ ∈ ^^ also: −(^^^^)^^∈^^^^ ∈ ^^.Apparently, this determines ^^ − ^^, by carrying out the steps of the carry-propagation-free additionwith the finite sequenceNote 5It is noted, that the balanced carry-propagation-free addition / subtraction, as described herein,generates (by the algorithm) a digit-sequence^^ ^^ ⋅ ^^, However, there are generally other sequences as well ∈^^ with ^^ + ^^ = ∑ ^^∈^^^^ ^̂^^^ ⋅ ^^^^ , i.e., the polynomial representation is generally not unique (some examples are shown herein).For ^^ = 2 the carry-free-propagation addition / subtraction, as described herein, may include anadditional stage (as already mentioned above):Definition (Carry-propagation-free addition and subtraction for ^^ = 2)assuming ^^, ^^ ∈ ℤ and^^ ,. Step 1Generating in the same way as in the case of ^^ > 2 the finite sequences, Step 2Deviating from the case ^^ > 2 proceeding as follows:Defining the sequences,^̆^0 ≔ 0, ,^̆^^^ ≔ 0Step 3 Generating the finite result sequence (^^^^)^^∈^^^^:^^^^ + ^̆^^^ ∀ ^^ ∈ {0,… , ^^} , wherein potentially occurring leading zeros are removed.It is to show that:(^^^^)^^∈^^^^ ∈ ^^ and^∈^^∈^^∈^^Proof: For Step 1 follows from Theorem 3:,By reapplying Theorem 3 to the pairs (^^^^, ^^^^) ∀ ^^ ∈ {0,… , ^^} follows:,For ^̆^^^ it is shown, that here even more stringent applies: ^̆^^^ ∈ {−1; 0; 1}:Assuming ^^ ∈ {0,… , ^^}. The following applies: ^^ =2= 1, ^̆^^^ ∈ ^^ = {0; 1} as well as for i>0:^̆^^^ = (^^^^−1 + ^^^^−1) ^^^^^^^^^^^^ 2. Consideration of Note 1 shows that−2 ≤ ^^^^−1 + ^^^^−1 ≤ 3, that applies:^̆^^^ ∈ {−1,0,1}. This also applies to ^^ = 0.For ^^^^ = ^̆^^^ + ^̆^^^ it followstherefore(if necessary after removing leading zero elements).The proof of the summation formula for ^^ > 2 can be adopted for the Step 1 and then reapplied, sothat with the same terms (^^^^)^^∈^^^^and (^̂^^^)^^∈^^^^follows:(and since ^̆^^^ = 0 it follows further)END Mathematical Proof

[0043] According to various aspects, just for illustration, FIG.4A to FIG.4D show various examples of a carry propagation free addition in accordance with the addition / subtraction algorithm 300 described herein for various bases (b) and exemplary numbers represented in the computing numeral system CNS.

[0044] According to various aspects, the one or more mathematical operations carried out by the computing device 100 may include a multiplication operation. The multiplication operation is carry propagation free in the computing numeral system. The multiplication operation is based on a multiplication algorithm 500, as described herein in more detail. According to various aspects, the multiplication operation may include one or more product operations (to create digit-wise product results based on an element-wise factor multiplication) associated with a product algorithm 500p of the multiplication algorithm 500 and one or more addition operations associated with an addition algorithm 500a of the multiplication algorithm 500, as illustrated in FIG.5A and FIG.5E respectively. The addition algorithm 500a of the multiplication algorithm 500 may be the same as described herein with reference to the addition / subtraction algorithm (e.g., addition / subtraction algorithm 300) for the same base as used in the product algorithm 500p of the multiplication algorithm 500.

[0045] According to various aspects, each product operation (Pk with k=1, …, K) of a respective multiplication operation may be associated with two product suboperations (MZk / MTk), as illustrated in FIG.5B and FIG.5C. The two product suboperations (MZk / MTk) are referred to herein as stages of the respective product operation (Pk). According to various aspects, the amount (K) of product operations (Pk) of the multiplication operation (X ◦ Y) may be a function of the amount of digits of the numbers (X, Y) to be multiplied with one another. As an example, the amount (K) of product operations (Pk) of the multiplication operation may be the same as the amount (IY) of digits of the second number (Y with digits Yi with i=1, …, IY) to be multiplied with a first number (X with digits Xi with i=1, …, IX). In the case that the second number (Y) has an amount (IY) of relevant digits (leading zeros may not be regarded as relevant digits but all other digits may be relevant), the amount (K) of product operations (Pk) of the multiplication operation is the same (K = IY). According to various aspects, the amount (J) of addition operations (Aj with j=1, …, J) of the multiplication operation may be a function of the amount (K) of product operations (Pk).

[0046] In the following, a product operation matrix associated with the multiplication algorithm may be denoted with “OP-Matrix prod”. According to various aspects, a respective product operation matrix may be represented accordingly by a lookup table 510 (e.g., stored in the memory 100m of the computing device 100). Furthermore, one or more lookup tables 310, 310a, 310b, 320, as described herein with reference to the addition / subtraction algorithm 300, may represent the respective addition operation matrices (denoted with “OP- Matrices add”) that are associated with the one or more addition operations of the multiplication operation.

[0047] According to various aspects, the one or more processors 100p of the computing device 100 may be configured to determined the respectively used product operation operation matrices and addition operationmatrices to carry out the multiplication algorithm 500. In this case, no lookup data may be transferred to the one or more processors from a memory 100m, as illustrated in FIG.5E. According to various aspects, the one or more processors 100p (e.g., including one or more analog processing devices, such as memristors, for example) of the computing device 100 may be operated to multiply the respective input numbers in accordance with the product operation operation matrices and addition operation matrices in hardware.

[0048] According to various aspects, the multiplication operation is carry propagation free in the computing numeral system.

[0049] According to various aspects, the multiplication algorithm 500 is performed in the computing numeral system based on a multiplication suboperation including a digit-wise multiplication in which a respective pair of multiplication intermediate digit result sets (MZ0 / MT0; MZ1 / MT1; …) is calculated for each multiplication of a respective digit (Y1; Y2, …) of the second number (Y) with every digit (Xi) of the first number (X). According to various aspects, the multiplication operation is performed in the computing numeral system based an addition suboperation subsequent to the multiplication suboperation, wherein in the addition suboperation a sum of all respective pairs of multiplication intermediate digit result sets (MZ0 / MT0; MZ1 / MT1; …) is calculated.

[0050] According to various aspects, the one or more processors 100p of the computing device 100 may be further configured to receive lookup data representing one or more lookup tables 310, 310a, 310b, 320, 510, see, for example, FIG.5A to 5D, wherein the one or more lookup tables representing, for positions (i) of the computing numeral system: a first intermediate digit result (MZi) as a function of the multiplication operation in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y), and a second intermediate digit result (MTi+1) as a function of the multiplication operation in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y).

[0051] TAB.3A shows an operation matrix of a split operation for a multiplication operation in the computing numeral system (also referred to as a product operation (Pk) of the multiplication operation) for an odd base greater than 2 (b ≥ 3), according to various aspects. TAB.3A OP-Matrix prod – odd base greater than 2 (b ≥ 3) XiYiMZiMTi+1{-c,[…],c} {-c,[…],c} {-c+1,[…],c-1} {-c+1,[…],c-1}

[0052] TAB.3B shows an operation matrix of a split operation for a multiplication operation in the computing numeral system (also referred to as a product operation (Pk) of the multiplication operation) for an even base greater than 2 (b ≥ 4), according to various aspects. TAB.3B OP-Matrix prod – even base greater than 2 (b ≥ 4) XiYiMZiMTi+1{-c-1,[…],c+1} {-c-1,[…],c+1} {-c,[…],c} {-c,[…],c}

[0053] TAB.3C shows an operation matrix of a split operation for a multiplication operation in the computing numeral system (also referred to as a product operation (Pk) of the multiplication operation) for an even base of 2 (b = 2), according to various aspects. TAB.3C OP-Matrix prod – even base of 2 (b = 2) Xi Yi MZi MTi+1 {-c-1,[…],c+1} {-c-1,[…],c+1} {-c-1,[…],c+1} {-c,[…],c}

[0054] According to various aspects, the one or more processors 100p of the computing device 100 may be configured to calculate in the computing numeral system a plurality of digit-wise suboperations at the same time by a parallel computing process, as illustrated in FIG.5B to FIG.5D.

[0055] According to various aspects, the amount (K) of product operations (Pk) of the multiplication operation (X ◦ Y) may generate K sets (MZ and MT) of multiplication intermediate digit results for respective digits (i) of the multiplication operation, as illustrated in FIG.5C. In the addition algorithm 500a of the multiplication algorithm 500 (X ◦ Y), a sum (S(i)) of all respective multiplication intermediate digit result sets (MZ and MT) of multiplication intermediate digit results is calculated for respective digits (i) of the multiplication operation, as illustrated in FIG.5D.

[0056] According to various aspects, just for illustration, FIG.6A and FIG.6B show an example of a carry propagation free multiplication in accordance with the multiplication algorithm 500 described herein for an exemplary base (b=5) and exemplary numbers (Xdec=407718 and Ydec=413) represented in the computing numeral system CNS (XCNS=101021333 and YCNS=3123). According to various aspects, just for illustration, FIG.6C and FIG.6D show an example of a carry propagation free multiplication in accordance with the multiplication algorithm 500 described herein for an exemplary base (b=4) and exemplary numbers (Xdec=70271 and Ydec=219) represented in the computing numeral system CNS (XCNS=101021333 and YCNS=3123). The operation matrices for the addition suboperation (see FIG.6B and FIG.6D) is shown in FIG.4A and FIG.4D accordingly.

[0057] According to various aspects, the computing device 100 may be configured to carry out one or more calculations in the computing numeral system CNS, wherein at least two numbers represented in the computing numeral system CNS are the input for the one or more calculations and wherein at least one numbers represented in the computing numeral system CNS is the output of the one or more calculations. It may be useful, to change the representation of a number in a standard numeral system SNS into the computing numeral system CNS and vice versa, as explained in more detail below.

[0058] According to various aspects, determining of a representation of a number (for example, of a first number (X) and a second number (Y) to perform a calculation in the computing numeral system) may include a conversion operation (CO), as illustrated in FIG.7A, FIG.7B, and FIG.7E. The conversion operation (CO) may be associated with a conversion algorithm 700 including, for example, a conversion split operation (SCO) (e.g., based on a conversion split algorithm 700s) to split a respective input number (X;Y) represented in an input numeralsystem (e.g., in a standard numeral system SNS) into a first conversion intermediate digit result (COZi) and a second conversion intermediate digit result (COTi+1); and a conversion addition operation (ACO) (e.g., based on a conversion addition algorithm 700a) to calculate for each position (e.g., each digit) in the computing numeral system a sum (S or referred to as COS) of the first conversion intermediate digit result (COZi) and a corresponding second conversion intermediate digit result (COTi).

[0059] The conversion addition algorithm 700a of the conversion algorithm 700 may be, for example, the same or similar as described herein with reference to the addition / subtraction algorithm (e.g., addition / subtraction algorithm 300) for the same base as used in the conversion split algorithm 700s of the conversion algorithm 700. In the following, a conversion split operation matrix associated with the conversion split algorithm 700s may be denoted with “OP-Matrix Split CO”.

[0060] According to various aspects, a respective conversion split operation matrix may be represented accordingly by a lookup table 710 (e.g., stored in the memory 100m of the computing device 100). Furthermore, one or more lookup tables 310, 310a, 310b, 320, as described herein with reference to the addition / subtraction algorithm 300, or a lookup table 720 may represent the respective addition operation matrices (denoted with “OP- Matrices add”) that are associated with the addition operation of the conversion operation.

[0061] According to various aspects, the one or more processors 100p of the computing device 100 may be configured to determined the respectively used conversion split operation matrices and addition operation matrices to carry out the conversion algorithm 700. In this case, no lookup data may be transferred to the one or more processors from a memory 100m, as illustrated in FIG.7E. According to various aspects, the one or more processors 100p (e.g., including one or more analog processing devices, such as memristors, for example) of the computing device 100 may be operated to convert the respective input number in accordance with the conversion split operation matrices and addition operation matrices in hardware.

[0062] According to various aspects, the conversion operation is not carry propagation free.

[0063] TAB.4A shows a split conversion operation (SCO) matrix and TAB.4B shows an addition operation (ACO) matrix for a conversion operation (CO) 700 for an even base greater than 2 (b ≥ 4), TAB.4A Op-Matrix Split CO – even base greater than 2 (b ≥ 4) Xi / YiCOZiCOTi+1{0,[…],b-1} {-c+1,[…],c} {0,1} TAB.4B Op-Matrix Add – even base greater than 2 (b ≥ 4) COZiCOTi+1COSi{-c+1,[…],c} {0,1} {-c+1,[…],c+1}

[0064] TAB.4C shows a split conversion operation (SCO) matrix and TAB.4D shows an addition operation (ACO) matrix for a conversion operation (CO) 700 for an odd base greater than 2 (b ≥ 3), TAB.4C Op-Matrix Split CO – odd base greater than 2 (b ≥ 3) Xi / YiCOZiCOTi+1{0,[…],b-1} {-c+1,[…],c-1} {0,1} TAB.4D Op-Matrix Add – odd base greater than 2 (b ≥ 3) COZiCOTi+1COSi{-c+1,[…],c-1} {0,1} {-c+1,[…],c}

[0065] According to various aspects, for a base of 2 (b = 2), no conversion from a standard numeral system SNS into the computing numeral system CNS is required, since a number represented in a binary system can be directly used as input for the computing algorithms described herein.

[0066] According to various aspects, just for illustration, FIG.7C and FIG.7D show examples of a conversion operation described herein for exemplary bases (b=8 and 9) and exemplary numbers (Xb=8(SNS) = 5557 and Yb=9(SNS) = 5587) from a standard numeral system SNS into the respective numbers (Xb=8(CNS) = +1-2-2-2-1 and Yb=9(CNS) = +1-3-3+0-2) represented in the computing numeral system CNS.

[0067] According to various aspects, the representation in the computing numeral system CNS includes signed integers as the unique digit elements (see examples above). According to various aspects, to convert a number (X(CNS) = +1-2-2-2-1) represented in the computing numeral system CNS into a corresponding number with opposite sign (X → -X) in the computing numeral system CNS (-X(CNS) = -1+2+2+2+1), the signs of all digit elements are reversed.

[0068] According to various aspects, determining of a representation of a number (for example, of a third number (R, 130R) that may be a result of one or more calculations and that may be, therefore, represented in the computing numeral system) in a standard numeral system (SNS) may include a reconversion operation (RO), as illustrated in FIG.8A, FIG.8B and FIG.8G. The reconversion operation (RO) may be associated with a reconversion algorithm 800 to (re)convert a respective number (for example, an output number RCNS) represented in the computing numeral system CNS into a number (for example, an output number RSNS) represented in the standard numeral system SNS.

[0069] According to various aspects, the reconversion operation may include, for example, a reconversion split operation (SRO) (e.g., based on an reconversion split algorithm 800s) to split the respective input number (RCNS) represented in the computing numeral system CNS into a first reconversion intermediate digit result (ROZi) and a second conversion intermediate digit result (ROTi+1); and a reconversion addition operation (ARO) (e.g., based on a reconversion addition algorithm 800a) to calculate for each position (e.g., each digit) in the computingnumeral system a sum (S or referred to as ROS) of the first reconversion intermediate digit result (ROZi) and a corresponding second reconversion intermediate digit result (ROTi).

[0070] The reconversion addition algorithm 800a of the reconversion algorithm 800 may be, for example, the same or similar as described herein with reference to the addition / subtraction algorithm (e.g., addition / subtraction algorithm 300) for the same base as used in the reconversion split algorithm 800s of the reconversion algorithm 800. In the following, a reconversion split operation matrix associated with the reconversion split algorithm 800s may be denoted with “OP-Matrix Split RO”. According to various aspects, the reconversion algorithm 800 may include a positive reconversion (PRO) to (re)convert a positive number from the computing numeral system CNS into the standard numeral system SNS and a negative reconversion (NRO) to (re)convert a negative number from the computing numeral system CNS into the standard numeral system SNS.

[0071] According to various aspects, a respective reconversion split operation matrix may be represented accordingly by a lookup table 810 (e.g., stored in the memory 100m of the computing device 100). Furthermore, one or more lookup tables 310, 310a, 310b, 320, as described herein with reference to the addition / subtraction algorithm 300, or a lookup table 820 may represent the respective addition operation matrices (denoted with “OP- Matrices add”) that are associated with the addition operation of the reconversion operation.

[0072] According to various aspects, the one or more processors 100p of the computing device 100 may be configured to determined the respectively used reconversion split operation matrices and addition / subtraction operation matrices to carry out the reconversion algorithm 800. In this case, no lookup data may be transferred to the one or more processors from a memory 100m, as illustrated in FIG.8G. According to various aspects, the one or more processors 100p (e.g., including one or more analog processing devices, such as memristors, for example) of the computing device 100 may be operated to reconvert the respective input number in accordance with the reconversion split operation matrices and addition / subtraction operation matrices in hardware.

[0073] According to various aspects, the reconversion operation is not carry propagation free.

[0074] TAB.5A shows a split reconversion operation (SRO) matrix and TAB.5B shows an addition operation (ARO) matrix for a negative reconversion (NRO) to (re)convert a negative number (R with digits Ri) from the computing numeral system CNS into the standard numeral system SNS for an arbitrary base (b). TAB.5A Op-Matrix Split NRO – arbitrary base b>2 RiNROZ1iNROT1i+1{-c-1,[…],c+1} {-b+1,[…],0} {0,1} TAB.5B Op-Matrix Add NRO – arbitrary base b>2 NROZ(k)iNROT(k)iNROZ(k+1)iNROT(k+1)i+1{-b+1,[…],0} {0,1} {-b+1,[…],0} {0,1}

[0075] According to various aspects, the negative reconversion operation may include, for example, a negative reconversion split operation (Split NRO) (e.g., as shown in TAB.5A) to split the respective input number (RCNS) represented in the computing numeral system CNS into a first negative reconversion intermediate digit result (NROZi) and a second negative conversion intermediate digit result (NROTi+1); and a negative reconversion addition operation (Add NRO) (e.g., as shown in TAB.5B) to calculate in k-stages for each position (e.g., each digit) in the computing numeral system a final negative result (NROZ(f)i) of the first negative reconversion intermediate digit result NROZ(k+1)i). The final negative result (NROZ(f)i) is obtained by applying the negative reconversion addition operation (Add NRO) (e.g., as shown in TAB.5B) for k-stages until all second negative conversion intermediate digit results (NROTi) are zero. In this case, the final negative result (NROZ(f)i) represents the output number (RSNS) of the negative reconversion split operation in the standard numeral system SNS. Note that the sum (S or referred to as ROS) of the first reconversion intermediate digit result (ROZi) and a corresponding second reconversion intermediate digit result (ROTi) is the same as the final negative result (NROZ(f)i) in the case that all second negative conversion intermediate digit results (NROTi) are zero.

[0076] TAB.5C shows a split reconversion operation (SRO) matrix and TAB.5D shows an addition operation (ARO) matrix for a positive reconversion (PRO) to (re)convert a positive number (R with digits Ri) from the computing numeral system CNS into the standard numeral system SNS for an arbitrary base (b). TAB.5C Op-Matrix Split PRO – arbitrary base b>2 RiPROZ1iPROT1i+1{-c-1,[…],c+1} {0,[…],b-1} {-1,0} TAB.5D Op-Matrix Add PRO – arbitrary base b>2 PROZ(k)iPROT(k)iPROZ(k+1)iPROT(k+1)i+1{0,[…],b-1} {-1,0} {0,[…],b-1} {-1,0}

[0077] According to various aspects, the same is valid for a base of two (b = 2) with PROT and NROT each ranging from {-1,0,1} instead of {-1,0} and {0,1}.

[0078] According to various aspects, the positive reconversion operation may include, for example, a positive reconversion split operation (Split PRO) (e.g., as shown in TAB.5C) to split the respective input number (RCNS) represented in the computing numeral system CNS into a first positive reconversion intermediate digit result (PROZi) and a second positive conversion intermediate digit result (PROTi+1); and a positive reconversion addition operation (Add PRO) (e.g., as shown in TAB.5D) to calculate in k-stages for each position (e.g., each digit) in the computing numeral system a final positive result (PROZ(f)i) of the first positive reconversion intermediate digit result PROZ(k+1)i). The final positive result (PROZ(f)i) is obtained by applying the positive reconversion addition operation (Add PRO) (e.g., as shown in TAB.5D) for k-stages until all second positive conversion intermediate digitresults (PROTi) are zero. In this case, the final positive result (PROZ(f)i) represents the output number (RSNS) of the positive reconversion split operation in the standard numeral system SNS. Note that the sum (S or referred to as ROS) of the first reconversion intermediate digit result (ROZi) and a corresponding second reconversion intermediate digit result (ROTi) is the same as the final positive result (PROZ(f)i) in the case that all second positive conversion intermediate digit results (PROTi) are zero.

[0079] According to various aspects, just for illustration, FIG.8C and FIG.8D show examples of a reconversion operation described herein for an exemplary base of ten (b=10) and an exemplary positive number (Rb=10 (CNS)= 10 -2 -1 -1) from a computing numeral system CNS into the respective number (Rdec (SNS)= 9789) represented in the standard decimal system. It is noted that the negative (re)conversion shown in FIG.8C fails, since in this example the number R to be (re)converted is positive. The positive (re)conversion shown in FIG.8D succeeds, since, from third stage on (k=3) all PROT(3)iare zero in the positive reconversion addition operation and the PROZ(3)irepresent the number (Rb=10 (CNS)= 10 -2 -1 -1) converted into the standard decimal system (Rdec (SNS)= 9789).

[0080] According to various aspects, just for illustration, FIG.8E and FIG.8F show examples of a reconversion operation described herein for an exemplary base of two (b=2) and an exemplary negative number (Rb=2 (CNS)= 1 -2 -1 -1) from a computing numeral system CNS into the respective number (Rbin (SNS)= -1 -1 =-(11) that is (Rdec (SNS)= -3) represented in the standard binary system. It is noted that the positive (re)conversion shown in FIG.8F fails, since in this example the number R to be (re)converted is negative. The negative (re)conversion shown in FIG.8E succeeds, since, from second stage on (k=2) all NROT(2)iare zero in the negative reconversion addition operation and the NROZ(2)irepresent the number (Rb=2 (CNS)= 1 -2 -1 -1) converted into the standard binary system (Rbin (SNS)= -1-1 =-(11)).

[0081] According to various aspects, as an example, for a base (b=10) (see FIG.8C and FIG.8D) it follows: c = b / 2 = 5 therefore: Input digits = {-c-1,..,c+1} = {-6,..,6} Output digits = {0,..,b-1}={0,..,9} Output RSNSwith digits Ri: I) either all Riout of {0,..,b-1} (positive (re)conversion) II) or all Riout of {-b+1,..,0} (negative (re)conversion)

[0082] According to various aspects, as an example, for a base (b=2) (see FIG.8E and FIG.8F) it follows: c = b / 2 = 1 therefore: Input digits = {-c-1,..,c+1} = {-2,..,2} Output digits = {0,..,b-1}={0,1} Output RSNSwith digits Ri: I) either all Riout of {0,..,b-1} (positive (re)conversion) II) or all Riout of {-b+1,..,0} (negative (re)conversion)

[0083] As illustrated in FIG.8D, the reconversion of the positive number 9789 can be achieved by use of the positive reconversion operation (PRO), as soon as all PROTiare zero, in this example in the third stage (PROT(k) with k=3), the decimal number 9789 is represented directly by the PROZiin this stage (PROZ(k) with k=3).

[0084] As illustrated in FIG.8E, the reconversion of the negative number -3 represented in the binary systemcan be achieved by use of the negative reconversion operation (PRO), as soon as all PROT i are zero, in thisexample in the third stage (PROT(k) with k=2), the binary number (-1-1) that is –(11) (which is -3 in the standard decimal system) is represented directly by the PROZiin this stage (PROZ(k) with k=2).

[0085] As illustrated in FIG.8C, the reconversion of the positive number 9789 by use of the negative reconversion operation (NRO) fails, since the algorithm does not lead to a stage in which all PROTiare zero. This is because the leading digit remains the same (in this case the digit element 1) for each of the stages and does not sum up to zero.

[0086] As illustrated in FIG.8F, the reconversion of the negative number Rbin (SNS)= -(11) by use of the positive reconversion operation (PRO) fails, since the algorithm does not lead to a stage in which all PROTiare zero. This is because the leading digit in PROT(k) remains the same (in this case the digit element -1) for each of the stages and does not sum up to zero.

[0087] For a reconversion with the base of the two (b = 2) there is a differentiation included between a leading Ri= -1 (the Riwith highest position, e.g., highest exponent) and a non-leading Ri= -1 in the positive split operation (Split PRO), wherein the leading Ri= -1 is split into PROZ1i= -1 and PROT1i= 0; and wherein the a non-leading Ri= -1 is split into PROZ1i= 1 and PROT1i= -1. For a reconversion with the base of the two (b = 2) there is a further differentiation included between a leading Ri= 1 (the Riwith highest position, e.g., highest exponent) and a non-leading Ri= 1 in the negative split operation (Split NRO), wherein the leading Ri= 1 is split into NROZ1i= 1 and PROT1i= 0; and wherein the a non-leading Ri= 1 is split into PROZ1i= -1 and PROT1i= 1.

[0088] According to various aspects, the sign of a number R(CNS)represented in the computing numeral system CNS with an arbitrary base may be determined based on testing whether the positive reconversion operation or the negative reconversion operation succeeds (or fails). However, a sign of a number R(CNS)represented in the computing numeral system CNS with a base greater than 2 (b > 2) may be determined based on the sign of the leading digit (i.e., the sign of the digit that has the highest exponent).

[0089] According to various aspects, the order of two number R1(CNS)and R2(CNS)represented in the computing numeral system CNS may be determined based on a subtraction operation R1(CNS)- R2(CNS). In the case that R1(CNS)is greater than R2(CNS), the difference R1(CNS)- R2(CNS)is a positive number and in the other case that R1(CNSis less than R2(CNS), the difference R1(CNS)- R2(CNS)is a negative number, and in the case that R1(CNS)is equal to R2(CNS), the difference R1(CNS)- R2(CNS)is zero.

[0090] According to various aspects, for a base greater than 2 (b > 2), the computing device 100 may be configured to determine, prior to carrying out a reconversion operation for a number R(CNS), the sign of the number R(CNS); and to select, based on the determined sign, whether the positive reconversion operation (PRO) (if a positive sign is determined for the number R(CNS)) or the negative reconversion operation (NRO) (if a negative sign is determined for the number R(CNS)) is used for the reconversion of the number R(CNS).

[0091] According to various aspects, the operation of the computing device 100 in accordance with the operations described herein based on the computing numeral system CNS and the corresponding algorithms that can be, for example, derived based on the mathematical proof provided herein. The use of the computing numeral system CNS allows for a more efficient calculation (for example, addition, subtraction, multiplication, and division), since for operations within the computing numeral system CNS the calculations are carry propagation free and, therefore, the calculations can be performed digit-wise in parallel. Furthermore, the number of staged associated, for example, with an addition and / or subtraction operation is reduced compared to a standard numeral system SNS(e.g., the standard decimal system, the standard hexadecimal system, the standard binary system, only as examples). FIG.9A shows an addition operation 900 with the numbers Xdec= 99999 and Ydec= 1 in the standard decimal system with base 10 and unique digit elements {0,[…],9} that has - due to carry propagation - five suboperation stages until the sum (S = X + Y) can be determined. FIG.9B shows the addition / subtraction algorithm 300 described herein with the same numbers Xdec= 99999 and Ydec= 1 in the computing numeral system CNS with base 10 and balanced unique digit elements {-6,[…],6} that has - due to the avoidance of carry propagation - only one suboperation stage and the sum (S = X + Y) can be determined directly in the subsequent sum stage.

[0092] According to various aspects, the operation matrices for the addition / subtraction operation, as described herein, may be configured with a lowest possible value for T, while the selection of Z and T assures that the addition / subtraction operation does not lead to a result that is outside the number range defined by with the respective base that corresponds to the operation matrices.

[0093] According to various aspects, the multiplication operation based on the computing numeral system CNS as described herein leads to a significant increase in computing speed and computing efficiency. Each product operation leads to a Z-line (a Z-line may include a set of Z-digits) and to a T-line (a T-line may include a set of T-digits) and the number of product operations is as a function of the number of digits of the second factor (e.g., the number of product operations is equal to the number of digits of the second factor), each of the Z-lines and each T-lines has a number of relevant digits as a function of the number of digits of the first factor (e.g., the number of relevant digits is equal to the number of digits of the first factor). The lines of Z and T are summed digit by digit, for example, all lines are added pair-wise (e.g., a Z-line and another Z-line, a T-line and another T-line, or a Z-line and a T-line) simultaneously in a parallel computing process for an addition stage. Therefore, the number of lines of Z and T is halved for each addition stage. It is noted that the addition stages itself may be computed serially, wherein each addition stage includes a plurality of simultaneously computed addition operations for the pairs of lines of Z and T. The product operations that generate the lines for Z and T can be processed digit-wise in parallel.

[0094] As described in various examples and, for example, illustrated in various figures (e.g., FIG.3A, FIG.3B, FIG.5A, FIG.7A, FIG.8A) the one or more processors 100p of the computing device 100 may be configured to receive lookup data representing one or more lookup tables representing operations matrices. In this case, the one or more processors 100p may be configured to be operated in accordance with a predefined operation scheme as defined in the lookup tables (e.g., in accordance with the operations matrices described herein). However, in the same way, the one or more processors 100p of the computing device 100 may be configured (for example, based on an analog and / or a digital circuit) to calculate results corresponding to the input numbers directly in hardware, i.e., without the need of receiving lookup data, as illustrated, for example, in FIG.3E, FIG.3F, FIG.5E, FIG.7E, FIG.8G. In this case, a dedicated analog and / or digital subcircuit of the one or more processors 100p may be configured to implement the operations as defined, for example, in the operation matrices described herein. However, the reception of the lookup data may be optional depending on the configuration of the one or more processors 100p.

[0095] Examples related to the aspects described are provided in the following.

[0096] Example 1 is a computing device (for example, computing device 100 as described herein) including: one or more processors (for example, one or more processors 100p) configured to receive first input datarepresenting a first number (e.g., a first argument; X) and second input data representing a second number (e.g., a second argument; Y) and to create output data as a function of the first input data and the second input data, the output data representing a third number (e.g., a result; R) that is a result of one or more mathematical operations (X∘Y) associated with the first number and the second number. The one or more processors may be configured to create the output data based representing the third number (e.g., a result; R) on: I) determining a representation of the first number and the second number in a computing numeral system (e.g., computing numeral system CNS), the computing numeral system including a positional base system in which each position (i) is associated with a numeral weight (bi) and a digit (di) to represent a number in the computing numeral system, wherein the numeral weight is defined by a base (b) of the positional base system and wherein each digit (di) is associated with an amount (k) of unique digit elements, wherein the amount (k) of unique digit elements (ek) is greater by at least two than the base (b); II) executing the one or more mathematical operations in the computing numeral system and determining a computing result in the computing numeral system; and III) determining the third number based on the computing result.

[0097] In Example 2, the computing device according to Example 1 may optionally further include that the one or more of the unique digit elements (ek) include signed digit elements (e.g., signed unique digit elements (e.g., e-kto ek) to allow for a subtraction operation.

[0098] In Example 3, the computing device according to Example 2 may optionally further include that the signed digit elements include one or more negative digit elements (ekwith k less than 0) and one or more positive digit elements (ekwith k greater than 0) and a zero digit element (ekwith k equals 0).

[0099] In Example 4, the computing device according to Example 3 may optionally further include that the one or more negative digit elements are represented by negative integers (e.g., c negative integers, wherein c is (b+1) / 2 for an odd base b and wherein c is b / 2+1 for an even base) and that the one or more positive digit elements are represented by positive integers (e.g., c positive integers with c =(b+1) / 2 for an odd base b and e.g., c+1 positive integers with c =b / 2 for an even base), and wherein the zero digit element is represented by the integer zero.

[0100] In Example 5, the computing device according to any one of Examples 1 to 4 may optionally further include that the first input data represent the first number in an input numeral system (SNS) and the second input data represent the second number in the input numeral system (SNS); and that the input numeral system (SNS) differs from the computing numeral system (cns) at least in the ratio (b / k; bcns / kcnsvs. bsns / ksns) of the base (b; bcns; bsns) and the amount (k; kcns; ksns) of unique digit elements (ek); wherein, preferably, the base (bsns) of the input numeral system (SNS) is the same as the base (bcns) of the computing numeral system (bcns).

[0101] In Example 6, the computing device according to any one of Examples 1 to 5 may optionally further include that the one or more mathematical operations include an addition operation and / or a subtraction operation and that the addition operation and / or the subtraction operation is carry propagation free in the computing numeral system.

[0102] In Example 7, the computing device according to any one of Examples 1 to 6 may optionally further include that the one or more processors are further configured to carry out the one or more mathematical operations based on a split operation, and that the split operation for corresponding digits x and y of the first number X andthe second number Y in the computing numeral system (CNS) is based on the following function for an arbitray base b: (^^, ^^) ↦ ((^^ + ^^) ^^^^^^^^^^^^ ^^, (^^ + ^^) ^^^^^^^^^^^^ ^^).

[0103] In Example 8, the computing device according to any one of Examples 1 to 7 may optionally further include that the one or more processors are further configured to receive lookup data representing one or more lookup tables, the one or more lookup tables representing for positions (i) of the computing numeral system or that the one or more processors are further configured (e.g., operated) to determine: I) a first intermediate digit result (Zi) as a function of the one or more mathematical operations in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y), and / or II) a second intermediate digit result (Ti+1) as a function of the one or more mathematical operations in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y).

[0104] In Example 9, the computing device according to Example 8 may optionally further include that the first intermediate digit result (Zi) is associated with a respective digit (i) in the computing numeral system and wherein the second intermediate digit result (Ti+1) is associated with another respective digit (i+1; i-1) in the computing numeral system. The other respective digit (i+1; i-1) may be greater by one or less by one than the respective digit (i).

[0105] In Example 10, the computing device according to any one of Examples 8 or 9 may optionally further include that for each position (i) of the computing numeral system the computing result in the computing numeral system is based on a summation (Si) of the first intermediate digit result (Zi) and a corresponding second intermediate digit result (Ti).

[0106] In Example 11, the computing device according to any one of Examples 8 to 10 may optionally further include that the first intermediate digit result (Zi) and the corresponding second intermediate digit result (Ti) are associated with a same respective digit (i).

[0107] In Example 12, the computing device according to any one of Examples 8 to 11 may optionally further include that each of the one or more mathematical operations is performed in the computing numeral system based on one or more first sub-operations and one or more second sub-operations; wherein, in the one or more first sub- operations, the first intermediate digit result (Zi) and the second intermediate digit result (Ti+1) are calculated, and wherein, in the one or more second sub-operation, the sum (Si) of the first intermediate digit result (Zi) and a corresponding second intermediate digit result (Ti) is calculated to provide the computing result in the computing numeral system.

[0108] In Example 13, the computing device according to any one of Examples 8 to 11 may optionally further include that each of the one or more mathematical operations is performed in the computing numeral system digit- wise based on a digit-wise first sub-operation and a digit-wise second sub-operation; wherein, in the digit-wise first sub-operation, the first intermediate digit result (Zi) and the second intermediate digit result (Ti+1) are calculated for a corresponding digit associated with the one or more mathematical operations, and wherein, in the digit-wise second sub-operation, the sum (Si) of the first intermediate digit result (Zi) and a corresponding second intermediate digit result (Ti) is calculated to provide the computing result in the computing numeral system.

[0109] In Example 14, the computing device according to any one of Examples 8 to 11 may optionally further include that each of the one or more mathematical operations is performed in the computing numeral system digit- wise based on a digit-wise first sub-operation, a digit-wise second sub-operation, and a digit-wise third sub- operation; wherein, in the digit-wise first sub-operation, the first intermediate digit result (Z1i) and the second intermediate digit result (T1i+1) are calculated for a corresponding digit associated with the one or more mathematical operations, and wherein, in the digit-wise second sub-operation, a third intermediate digit result (Z2i) and a fourth intermediate digit result (T2i+1) are calculated as a function of the first intermediate digit result (Z1i) and a corresponding second intermediate digit result (T1i), and wherein, in the digit-wise third sub-operation, the sum (Si) of the third intermediate digit result (Z2i) and a corresponding fourth intermediate digit result (T2i) is calculated to provide the computing result in the computing numeral system.

[0110] In Example 15, the computing device according to Example 14 may optionally further include that the third intermediate digit result (Z2i) is associated with a respective digit (i) and that the fourth intermediate digit result (T2i+1) is associated with another respective digit (i+1; i-1) different from the respective digit (i). According to various aspects, the other respective digit (i+1; i-1) may be greater by one or less by one than the respective digit (i).

[0111] In Example 16, the computing device according to Example 13 may optionally further include that, for an odd base addition operation and / or an odd base subtraction operation, the digit-wise first sub-operation is basedon the following equations for each of the operation digits ^^^^, ^^^^ ∈ {^^^^ with k = −^^, .. , ^^} and c=(b+1) / 2 with iand the digit-wise second sub-operation is based on the following equation for the input ^^^^∈{^^−^^+1, .. , ^^^^−1} and ^^^^ ∈ {^^−1, ^^0, ^^+1}:^^^^ = ^^^^ + ^^^^ ∈ {^^−^^, .. , ^^^^}.

[0112] In Example 17, the computing device according to Example 13 may optionally further include that, for an even base addition operation and / or an even base subtraction operation with a base greater than five, the digit- wise first sub-operation is based on the following equations for each of the operation digits^^^^ , ^^^^ ∈ {^^^^ with k = −^^ − 1,−^^.. , ^^, ^^ + 1} and c=b / 2 with i representing a respective digit position:^^^^ + ^^^^ , if − ^^ < ^^^^ + ^^^^ < ^^ + 1^^^^ = (^^^^ + ^^^^) ^^^^^^^^^^^^ ^^ = { ^^^^ + ^^^^ − ^^ , if ^^^^ + ^^^^ ≥ ^^ + 1 } ∈ {^^−^^+1, .. , ^^^^}, and^^^^ + ^^^^ + ^^ , if ^^^^ + ^^^^ ≤ −^^and the digit-wise second sub-operation is based on the following equation for the input ^^^^∈{^^−^^+1, .. , ^^^^} and ^^^^ ∈ {^^−1, ^^0, ^^+1}:^^^^ = ^^^^ + ^^^^ ∈ {^^−^^, .. , ^^^^+1}.

[0113] In Example 18, the computing device according to Example 13 may optionally further include that, for an even base addition operation and / or an even base subtraction operation with a base greater than three, the digit-wise first sub-operation is based on the following equations for each of the operation digits^^^^ , ^^^^ −^^ − ^^and the second sub-operation is based on the following equation for the input^^^^ ∈ {^^−^^+1, .. , ^^^^} and ^^^^ ∈ {^^−2, … , ^^+1}:^^^^ = ^^^^ + ^^^^ ∈ {^^−^^, .. , ^^^^+1}.

[0114] In Example 19, the computing device according to Example 13 may optionally further include that, for an even base addition operation and / or an even base subtraction operation, preferably with a base that equals two, the digit-wise first sub-operation is based on the following equations for each of the operation digits^^^^, ^^^^,and the digit-wise second sub-operation is based on the following equations for the input^^1,^^ ∈ {^^−1, ^^0, ^^+1} and ^^1,^^ ∈ {^^−2, … , ^^+2}:{, 1,^^ 1,^^ }the digit-wise third sub-operation is based on the following equations for the input^^2,^^ ∈ {^^−1, ^^0, ^^+1} and ^^2,^^ ∈ {^^−1, ^^0, ^^+1}:… ,

[0115] In Example 20, the computing device according to any one of Examples 1 to 19 may optionally further include that the one or more mathematical operations include a multiplication operation and that the multiplication operation is carry propagation free in the computing numeral system.

[0116] In Example 21, the computing device according to any one of Examples 1 to 20 may optionally further include that the multiplication operation is performed in the computing numeral system based on one or more (e.g., digit-wise) product operations in which a respective pair of multiplication intermediate digit result sets (MZ0 / MT0; MZ1 / MT1; …) is calculated for each element-wise multiplication of a respective digit (Y1; Y2, …) of the second number (Y) with every digit (Xi) of the first number (X).

[0117] In Example 22, the computing device according to Example 21 may optionally further include that the multiplication operation is performed in the computing numeral system based an addition operation subsequent to the one or more digit-wise product operations, wherein in the addition operation a sum of all respective pairs of multiplication intermediate digit result sets (MZ0 / MT0; MZ1 / MT1; …) is calculated.

[0118] In Example 23, the computing device according to Example 21 or 22 may optionally further include that the one or more processors are further configured to receive lookup data representing one or more lookup tables, the one or more lookup tables representing, for positions (i) of the computing numeral system or that the one or more processors are further configured (e.g., operated) to determine: I) a first intermediate digit result (MZi) as a function of the multiplication operation in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y), and / or II) va second intermediate digit result (MTi+1) as a function of the multiplication operation in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y).

[0119] In Example 24, the computing device according to any one of Examples 1 to 23 may optionally further include that the one or more processors are configured to calculate in the computing numeral system a plurality of digit-wise suboperations at the same time by a parallel computing process.

[0120] In Example 25, the computing device according to any one of Examples 1 to 24 may optionally further include that determining the representation of the first number (X) and the second number (Y) in the computing numeral system includes a conversion operation (CO), the conversion operation (CO) including: I) a split operation (SCO) to split a respective input number (X; Y) represented in an input numeral system (SNS) into a first intermediate digit (COZi) and a second intermediate digit (COTi+1); and II) an addition operation (ACO e.g., same as the addition sum (S) sub-operation) to calculate for each position in the computing numeral system a sum (S or COS) of the first intermediate digit (COZi) and a corresponding second intermediate digit (COTi).

[0121] In Example 26, the computing device according to any one of Examples 1 to 25 may optionally further include that determining the third number based on the computing result includes a reconversion operation (RO), the reconversion operation (RO) including: a positive reconversion operation (PRO) to reconvert a positive number (+N) and a negative reconversion operation (NRO) to reconvert a negative number (-N).

[0122] In Example 27, the computing device according to Example 26 may optionally further include that the positive reconversion operation (PRO) includes: I) a positive split operation (Split PRO) to split a respective number (N) represented in the computing numeral system into a first positive reconversion intermediate digit result (PROZi) and a second positive reconversion intermediate digit result (PROTi+1), and II) a positive addition operation (Add PRO) to calculate for each position in the computing numeral system a sum (SROi, PROZ(f)i) based on the first positive reconversion intermediate digit result (PROZi) and a corresponding second positive reconversion intermediate digit result (PROTi).

[0123] In Example 28, the computing device according to Example 26 or 27 may optionally further include that the negative reconversion operation (NRO) includes: I) a negative split operation (Split NRO) to split a respective input number (N) represented in the computing numeral system into a first negative reconversion intermediate digit result (NROZi) and a second first negative reconversion intermediate digit result (NROTi+1), and II) a negative addition operation (Add NRO) to calculate for each position in the computing numeral system a sum (SROi, NROZ(f)i) based on the first negative reconversion intermediate digit result (NROZi) and a corresponding second negative reconversion intermediate digit result (NROTi).

[0124] Example 29 is a computing device (100) including one or more processors (100p) configured to receive first input data representing a first number and second input data representing a second number and to create output data as a function of the first input data and the second input data, the output data representing a third number that is a result of one or more mathematical operations associated with the first number and the second number; wherein the one or more processors (100p) are configured to create the output data based on: executing the one or more mathematical operations in a computing numeral system and determining the third number as a computing result in the computing numeral system; the computing numeral system including a positional base system in which each position (i) is associated with a numeral weight (bi) and a digit (di) to represent a number in the computing numeral system, wherein the numeral weight is defined by a base (b) of the positional base system and wherein each digit (di) is associated with an amount (k) of unique digit elements, wherein the amount (k) of unique digit elements (ek) is greater by at least two than the base (b). It is noted that the aspectsdescribed herein (e.g., in Examples 1 to 28) may be applicable for the computing device according to Example 29 as well.

[0125] Example 30 is a method for determining a third number that is a result of one or more mathematical operations associated with a first number and a second number, the method including: executing the one or more mathematical operations in a computing numeral system and determining the third number as a computing result in the computing numeral system; the computing numeral system including a positional base system in which each position (i) is associated with a numeral weight (bi) and a digit (di) to represent a number in the computing numeral system, wherein the numeral weight is defined by a base (b) of the positional base system and wherein each digit (di) is associated with an amount (k) of unique digit elements, wherein the amount (k) of unique digit elements (ek) is greater by at least two than the base (b). It is noted that the aspects described herein (e.g., in Examples 1 to 28) may be applicable for the method according to Example 30 as well.

[0126] While the invention has been particularly shown and described with reference to specific aspects, it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. The scope of the invention is thus indicated by the appended claims and all changes, which come within the meaning and range of equivalency of the claims, are therefore intended to be embraced.

Claims

Claims What is claimed is:

1. A computing device (100) comprising: one or more processors (100p) configured to receive first input data representing a first number and second input data representing a second number and to create output data as a function of the first input data and the second input data, the output data representing a third number that is a result of one or more mathematical operations associated with the first number and the second number; wherein the one or more processors (100p) are configured to create the output data based on: determining a representation of the first number and the second number in a computing numeral system, the computing numeral system comprising a positional base system in which each position (i) is associated with a numeral weight (bi) and a digit (di) to represent a number in the computing numeral system, wherein the numeral weight is defined by a base (b) of the positional base system and wherein each digit (di) is associated with an amount (k) of unique digit elements, wherein the amount (k) of unique digit elements (ek) is greater by at least two than the base (b); executing the one or more mathematical operations in the computing numeral system and determining a computing result in the computing numeral system; and determining the third number based on the computing result.

2. The computing device (100) according to claim 1, wherein one or more of the unique digit elements (ek) comprise signed digit elements to allow for a subtraction operation.

3. The computing device (100) according to claim 2, the signed digit elements comprise one or more negative digit elements and one or more positive digit and a zero digit element; preferably, the one or more negative digit elements are represented by negative integers and the one or more positive digit elements are represented by positive integers, and wherein the zero digit element is represented by the integer zero.

4. The computing device (100) according to any one of claims 1 to 3, wherein the first input data represent the first number in an input numeral system (sns) and the second input data represent the second number in the input numeral system (sns); and wherein the input numeral system (sns) differs from the computing numeral system (cns) at least in the ratio (b / k) of the base (b) and the amount (k) of unique digit elements (ek); wherein, preferably, the base (bsns) of the input numeral system (sns) is the same as the base of the computing numeral system (bcns).

5. The computing device (100) according to any one of claims 1 to 4,wherein the one or more mathematical operations comprise an addition operation and / or a subtraction operation and wherein the addition operation and / or the subtraction operation is carry propagation free in the computing numeral system.

6. The computing device (100) according to any one of claims 1 to 5, wherein the one or more processors (100p) are further configured to carry out the one or more mathematical operations based on a split operation, and wherein the split operation for corresponding digits x and y of the first number X and the second number Y in the computing numeral system (CNS) is based on the following function for an arbitray base b: (^^, ^^) ↦ ((^^ + ^^) ^^^^^^^^^^^^ ^^, (^^ + ^^) ^^^^^^^^^^^^ ^^).

7. The computing device (100) according to any one of claims 1 to 6, wherein the one or more processors (100p) are further configured to receive lookup data representing one or more lookup tables, the one or more lookup tables representing for positions (i) of the computing numeral system or the one or more processors (100p) are further configured to determine: a first intermediate digit result (Zi) as a function of the one or more mathematical operations in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y); and / or a second intermediate digit result (Ti+1) as a function of the one or more mathematical operations in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y).

8. The computing device (100) according to claim 7, wherein the first intermediate digit result (Zi) is associated with a respective digit (i) in the computing numeral system and wherein the second intermediate digit result (Ti+1) is associated with another respective digit (i+1; i-1) in the computing numeral system; preferably the other respective digit (i+1; i-1) is greater by one or less by one than the respective digit (i).

9. The computing device (100) according to claims 7 or 8, wherein for each position (i) of the computing numeral system the computing result in the computing numeral system is based on a summation (Si) of the first intermediate digit result (Zi) and a corresponding second intermediate digit result (Ti).

10. The computing device (100) according to claim 9, wherein the first intermediate digit result (Zi) and the corresponding second intermediate digit result (Ti) are associated with a same respective digit (i).

11. The computing device (100) according to any one of claims 7 to 10,wherein the one or more processors (100p) are further configured to carry out each of the one or more mathematical operations in the computing numeral system based on one or more first sub-operations and one or more second sub-operations; wherein, in the one or more first sub-operations, the first intermediate digit result (Zi) and the second intermediate digit result (Ti+1) are calculated; and wherein, in the one or more second sub-operation, the sum (Si) of the first intermediate digit result (Zi) and a corresponding second intermediate digit result (Ti) is calculated to provide the computing result in the computing numeral system.

12. The computing device (100) according to any one of claims 7 to 10, wherein the one or more processors (100p) are further configured to carry out each of the one or more mathematical operations in the computing numeral system digit-wise based on a digit-wise first sub-operation and a digit-wise second sub-operation; wherein, in the digit-wise first sub-operation, the first intermediate digit result (Zi) and the second intermediate digit result (Ti+1) are calculated for a corresponding digit associated with the one or more mathematical operations; and wherein, in the digit-wise second sub-operation, the sum (Si) of the first intermediate digit result (Zi) and a corresponding second intermediate digit result (Ti) is calculated to provide the computing result in the computing numeral system.

13. The computing device (100) according to any one of claims 7 to 10, wherein the one or more processors (100p) are further configured to carry out each of the one or more mathematical operations in the computing numeral system digit-wise based on a digit-wise first sub-operation, a digit-wise second sub-operation, and a digit-wise third sub-operation; wherein, in the digit-wise first sub-operation, the first intermediate digit result (Z1i) and the second intermediate digit result (T1i+1) are calculated for a corresponding digit associated with the one or more mathematical operations, and wherein, in the second sub-operation, a third intermediate digit result (Z2i) and a fourth intermediate digit result (T2i+1) are calculated as a function of the first intermediate digit result (Z1i) and a corresponding second intermediate digit result (T1i), and wherein, in the third sub-operation, the sum (Si) of the third intermediate digit result (Z2i) and a corresponding fourth intermediate digit result (T2i) is calculated to provide the computing result in the computing numeral system.

14. The computing device (100) according to claim 13, wherein the third intermediate digit result (Z2i) is associated with a respective digit (i) and wherein the fourth intermediate digit result (T2i+1) is associated with another respective digit (i+1; i-1) different from the respective digit (i), preferably the other respective digit (i+1; i-1) is greater by one or less by one than the respective digit (i).

15. The computing device (100) according to any one of claims 1 to 18, wherein the one or more mathematical operations comprise a multiplication operation and wherein the multiplication operation is carry propagation free in the computing numeral system.

16. The computing device (100) according to claim 15, wherein the multiplication operation is performed in the computing numeral system based on one or more product operations in which a respective pair of multiplication intermediate digit result sets (MZ0 / MT0; MZ1 / MT1; …) is calculated for each element-wise multiplication of a respective digit (Y1; Y2, …) of the second number (Y) with every digit (Xi) of the first number (X).

17. The computing device (100) according to claim 15 or 16, wherein the multiplication operation is performed in the computing numeral system based an addition operation subsequent to the one or more digit-wise product operations, wherein in the addition operation a sum of all respective pairs of multiplication intermediate digit result sets (MZ0 / MT0; MZ1 / MT1; …) is calculated.

18. The computing device (100) according to claim 16 or 17, wherein the one or more processors (100p) are further configured to receive lookup data representing one or more lookup tables, the one or more lookup tables representing, for positions (i) of the computing numeral system or wherein the one or more processors (100p) are further configured to determine: a first intermediate digit result (MZi) as a function of the multiplication operation in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y), and / or a second intermediate digit result (MTi+1) as a function of the multiplication operation in the computing numeral system associated with a corresponding digit (Xi) of the first number (X) and a corresponding digit (Yi) of the second number (Y).

19. The computing device (100) according to any one of claims 1 to 18, wherein the one or more processors (100p) are configured to calculate in the computing numeral system a plurality of digit-wise suboperations at the same time by a parallel computing process.

20. The computing device (100) according to any one of claims 1 to 19, wherein determining the representation of the first number (X) and the second number (Y) in the computing numeral system comprises a conversion operation (CO), the conversion operation (CO) comprising: a split operation (SCO) to split a respective input number (X; Y) represented in an input numeral system (SNS) into a first intermediate digit (COZi) and a second intermediate digit (COTi+1); and an addition operation (ACO e.g., same as the addition sum (S) sub-operation) to calculate for each position in the computing numeral system a sum (S or COS) of the first intermediate digit (COZi) and a corresponding second intermediate digit (COTi).

21. The computing device (100) according to any one of claims 1 to 20, wherein determining the third number based on the computing result comprises a reconversion operation (RO), the reconversion operation (RO) comprising: a positive reconversion operation (PRO) to reconvert a positive number (+N) and a negative reconversion operation (NRO) to reconvert a negative number (-N).

22. The computing device (100) according to claim 21, wherein the positive reconversion operation (PRO) comprises: a positive split operation (Split PRO) to split a respective number (N) represented in the computing numeral system into a first positive reconversion intermediate digit result (PROZi) and a second positive reconversion intermediate digit result (PROTi+1), and a positive addition operation (Add PRO) to calculate for each position in the computing numeral system a sum (SROi, PROZ(f)i) based on the first positive reconversion intermediate digit result (PROZi) and a corresponding second positive reconversion intermediate digit result (PROTi); and wherein the negative reconversion operation (NRO) comprises: a negative split operation (Split NRO) to split a respective input number (N) represented in the computing numeral system into a first negative reconversion intermediate digit result (NROZi) and a second first negative reconversion intermediate digit result (NROTi+1), and a negative addition operation (Add NRO) to calculate for each position in the computing numeral system a sum (SROi, NROZ(f)i) based on the first negative reconversion intermediate digit result (NROZi) and a corresponding second negative reconversion intermediate digit result (NROTi).

23. A computing device (100) comprising: one or more processors (100p) configured to receive first input data representing a first number and second input data representing a second number and to create output data as a function of the first input data and the second input data, the output data representing a third number that is a result of one or more mathematical operations associated with the first number and the second number; wherein the one or more processors (100p) are configured to create the output data based on: executing the one or more mathematical operations in a computing numeral system and determining the third number as a computing result in the computing numeral system; the computing numeral system comprising a positional base system in which each position (i) is associated with a numeral weight (bi) and a digit (di) to represent a number in the computing numeral system, wherein the numeral weight is defined by a base (b) of the positional base system and wherein each digit (di) is associated with an amount (k) of unique digit elements, wherein the amount (k) of unique digit elements (ek) is greater by at least two than the base (b).

24. A method for determining a third number that is a result of one or more mathematical operations associated with a first number and a second number, the method comprising:executing the one or more mathematical operations in a computing numeral system and determining the third number as a computing result in the computing numeral system; the computing numeral system comprising a positional base system in which each position (i) is associated with a numeral weight (bi) and a digit (di) to represent a number in the computing numeral system, wherein the numeral weight is defined by a base (b) of the positional base system and wherein each digit (di) is associated with an amount (k) of unique digit elements, wherein the amount (k) of unique digit elements (ek) is greater by at least two than the base (b).

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