Position information detecting device and position information detecting method

Abstract

Provided is a position information detecting device capable of improving the S / N ratio of a radar device and suppressing image deterioration due to defocussing of a 3D image in synthetic aperture processing. The position information detecting device includes: a transmitting unit 44 that emits electromagnetic waves of a prescribed signal; a receiving unit 46 that receives reflected waves from a measurement object Ob to be measured; a mixer 54 that mixes a signal of a received code string and a reference signal to generate an IF signal; a low pass filter 56; a reference oscillator 90 that generates a reference clock; and a digital radar board 30 that includes an FPGA 60 for outputting signals in accordance with the reference clock, an RF output unit 62 for outputting an RF output signal to the transmitting unit 44 in accordance with the reference clock, a Lo output unit 64 for outputting a Lo signal to the mixer 54 in accordance with the reference clock, an A / D input unit 70 for accepting input of an IF signal output from the low pass filter 56, and an A / D converting unit 72 for transferring the IF signal input from the A / D input unit 70 to the FPGA 60 in accordance with the reference clock.

Description

Location information detection device and location information detection method

[0001] The present invention relates to a position information detecting device and a position information detecting method that obtain position information of a measurement object by irradiating the measurement object with electromagnetic waves and receiving reflected waves from the measurement object.

[0002] Radar devices are commonly used for the exploration of underground buried objects, the acquisition of underground information, the inspection and diagnosis of concrete structures, etc. Various radar devices using laser light have also been proposed. For example, Japanese Patent Laid-Open Publication No. 2010-169530 (hereinafter referred to as Patent Document 1) discloses a radar device that generates an M-sequence signal, irradiates the electromagnetic wave of this signal using a baseband system, and performs signal processing using the received signal.

[0003] In the radar device of Patent Document 1, a mixer mixes a received signal with a reference signal (Lo signal) to generate an IF signal, and then A / D converts the IF signal to measure the distance to a measurement target. Fig. 1( a) is a conceptual diagram of an IF signal in the time domain and the frequency domain when the timing of A / D conversion of the received signal and the reference signal coincides. Fig. 1( b) is a conceptual diagram of an IF signal in the time domain and the frequency domain when the timing of A / D conversion of the IF signal is delayed at one point compared to the received signal and the reference signal. The dashed line in the frequency domain of Fig. 1( b) represents the IF signal in Fig. 1( a). In this case, the frequency is shifted to a lower frequency side compared to the IF signal indicated by the dashed line in the frequency domain, and noise is generated due to discontinuity in the timing of A / D conversion of the IF signal. Fig. 1( c) is a conceptual diagram of an IF signal in the time domain and the frequency domain when the timing of A / D conversion of the IF signal is delayed at one point compared to the received signal and the reference signal. The dashed line in the frequency domain of Fig. 1(c) represents the IF signal in Fig. 1(a). In this case, compared to the IF signal represented by the dashed line in the frequency domain, the frequency is shifted to the higher frequency side, and noise is generated due to discontinuity in the timing of A / D conversion of the IF signal.

[0004] In digital radar, the IF signal is a high-speed analog signal, so if the A / D sampling timing and the IF signal are out of synchronization, the waveform will be distorted, as shown in Figures 1(b) and 1(c). Specifically, if the synchronization is lost, the S / N ratio of the IF signal in the frequency domain will deteriorate and a phase shift will occur. Such a deterioration in the S / N ratio and phase shift of the IF signal will cause a deterioration in the S / N ratio of the radar device and image degradation due to defocusing of 3D images in synthetic aperture processing.

[0005] In the radar device disclosed in Patent Document 1, at least the transmitting code generating unit and the receiving code generating unit each have an FPGA (Field Programmable Gate Array). Furthermore, a clock signal is input from a clock generator to each of the transmitting code generating unit and the receiving code generating unit. Therefore, the clocks of the transmitting code generating unit and the receiving code generating unit are synchronized. However, in the radar device disclosed in Patent Document 1, the clocks of the transmitting and receiving code generating units and the AD converters are not synchronized. This causes a deterioration in the S / N ratio of the radar device and image degradation due to defocusing of 3D images during synthetic aperture processing.

[0006] An object of the present invention is to provide a position information detection device and a position information detection method that can improve the S / N ratio of a radar device and suppress image degradation due to defocusing.

[0007] A first aspect of the present invention is a position information detection device that irradiates an object to be measured with electromagnetic waves, receives reflected waves from the object to be measured, and performs signal processing to determine position information of the object to be measured, comprising: a transmitter that emits electromagnetic waves of a predetermined signal to the object to be measured; a receiver that receives reflected waves from the object to be measured as a signal of a received code sequence; a mixer that mixes the signal of the received code sequence with a reference signal to generate an IF signal; a low-pass filter to which the IF signal generated by the mixer is input; a digital radar board comprising: a reference oscillator that generates a reference clock; an FPGA that outputs a signal in accordance with the reference clock; an RF output unit that outputs an RF output signal of an M-sequence signal to the transmitter in accordance with the reference clock; an Lo output unit that outputs an Lo signal of the M-sequence signal to the mixer in accordance with the reference clock; an A / D input unit that receives the IF signal output from the low-pass filter; and an A / D conversion unit that transfers the IF signal input from the A / D input unit to the FPGA in accordance with the reference clock. and a position information detection device having a digital radar board having the above.

[0008] A second aspect of the present invention is a position information detection method comprising: generating a reference clock; an FPGA outputting a signal in accordance with the reference clock; emitting an electromagnetic wave of a predetermined signal to an object to be measured based on an RF output signal of an M-sequence signal output in accordance with the reference clock; receiving a reflected wave from the object to be measured as a signal of a received code sequence; mixing the signal of the received code sequence with a reference signal of the M-sequence signal output in accordance with the reference clock to generate an IF signal; inputting the IF signal to a low-pass filter; and A / D converting the IF signal output from the low-pass filter in accordance with the reference clock and transferring it to the FPGA.

[0009] According to the position information detection device and the position information detection method of the present invention, the S / N ratio of the radar device can be improved, and image degradation due to defocusing of 3D images in synthetic aperture processing can be suppressed.

[0010] 1A is a conceptual diagram of an IF signal in the time domain and frequency domain when the timing of A / D conversion of a received signal and a reference signal coincides with the timing of A / D conversion of the IF signal; FIG. 1B is a conceptual diagram of an IF signal in the time domain and frequency domain when the timing of A / D conversion of the IF signal is delayed at one point compared to the received signal and the reference signal; and FIG. 1C is a conceptual diagram of an IF signal in the time domain and frequency domain when the timing of A / D conversion of the IF signal is advanced at one point compared to the received signal and the reference signal. A schematic diagram of a position information detection device according to an embodiment. A conceptual diagram of a digital radar board according to an embodiment. A clock configuration diagram of a digital radar board according to an embodiment. A timing chart according to an embodiment, n=4, j β Autocorrelation function for n = 5, j = 15 β IF signal output from the autocorrelation function mixer when =15 Waveform obtained by FFT processing the IF signal of FIG. 8 Waveform of IF signal obtained by inverse FFT processing of FFT data after window processing Timing chart of embodiment

[0011] Hereinafter, a position information acquisition device and a position information detection method according to embodiments will be described with reference to the drawings. The embodiments shown below are directed to a radar device that emits electromagnetic waves of a predetermined signal from an antenna, but the present invention can also be applied to a laser radar device that detects the position information of a measurement target using laser light (electromagnetic waves) modulated with a predetermined signal.

[0012] 2 is a schematic diagram of a radar device 10, which is an embodiment of a position information acquisition device of the present invention. The radar device 10 obtains position information related to the depth direction to the object of measurement Ob by using a reflected signal from the object of measurement Ob obtained by receiving reflected waves from the object of measurement Ob out of electromagnetic waves irradiated onto the object of measurement Ob. The radar device 10 has a radar main body 20 and an arithmetic unit (computer) 22.

[0013] The radar main body 20 generates an M-sequence signal, which is an electromagnetic wave signal to be irradiated to the measurement object Ob. The radar main body 20 also irradiates the electromagnetic wave of the M-sequence signal in a baseband system and performs signal processing using the received signal. The M-sequence signal is a signal in which a 1-bit signal value is coded, and is configured so that the signal before the shift and the signal after the shift are approximately orthogonal to each other by shifting the signal bit by bit in the bit direction. Ｍ It is a signal with a code length of -1 (M is a natural number). The baseband method is a method of directly emitting electromagnetic waves of an M-sequence signal, rather than emitting electromagnetic waves by intensity modulation, frequency modulation, phase modulation, etc. using a carrier signal.

[0014] The radar main body 20 has a digital radar board 30, an amplifier 40, a transmitting-side RF switch 42, a transmitting antenna (transmitting unit) 44, a receiving antenna (receiving unit) 46, a receiving-side RF switch 48, an amplifier 50, an amplifier 52, a mixer 54, a low-pass filter 56, and an amplifier 58. The digital radar board 30 has a digital radar unit 32, a switch control unit 34, and an A / D processing unit 36. The digital radar board 30 generates an M-sequence signal. The M-sequence signal generated by the digital radar board 30 is transmitted to the transmitting antenna 44 via the amplifier 40 and also to the mixer 54 via the amplifier 52.

[0015] The amplifier 40 amplifies the M-sequence signal with a predetermined gain. The M-sequence signal amplified by the amplifier 40 is transmitted to the transmitting antenna 44 as an RF output signal. The transmitting antenna 44 transmits the electromagnetic waves of the amplified M-sequence signal by a baseband system. The transmitting antenna 44 of this embodiment is a multipath array antenna in which multiple antennas are arranged. A transmitting-side RF switch 42 is disposed between the amplifier 40 and the transmitting antenna 44. The transmitting-side RF switch 42 selects one antenna from the multiple antennas based on a switch control output from the digital radar board 30. Note that the transmitting antenna 44 may be configured with a single antenna. In this case, the transmitting-side RF switch 42 can be omitted.

[0016] The receiving antenna 46 receives electromagnetic waves reflected by the object to be measured Ob. Like the transmitting antenna 44, the receiving antenna 46 is a multipath array antenna in which multiple antennas are arranged. The received code sequence signal received by the receiving antenna 46 is transmitted to a mixer 54 via an amplifier 50. The amplifier 50 amplifies the received code sequence signal from the receiving antenna 46 by a predetermined gain. A receiving-side RF switch 48 is disposed between the receiving antenna 46 and the amplifier 50. The receiving-side RF switch 48 selects one antenna from multiple antennas based on a switch control output from the digital radar board 30. Note that the receiving antenna 46 may be configured with a single antenna. In this case, the receiving-side RF switch 48 can be omitted.

[0017] The M-sequence signal transmitted from the digital radar board 30 to the amplifier 52 is input to the mixer 54 as a reference signal (Lo signal). The mixer 54 mixes the received code sequence signal amplified by the amplifier 50 with the reference signal (Lo signal) to generate an IF signal. The low-pass filter 56 removes noise components and the like from the IF signal. The amplifier 58 amplifies the IF signal by a predetermined gain. The IF signal amplified by the amplifier 58 is input to the A / D processing unit 36. The A / D processing unit 36 ​​converts the IF signal into a digital signal.

[0018] The arithmetic unit 22 sets various conditions for measuring the measurement object Ob. The various conditions are set based on instruction input using an input operation system (not shown) such as a mouse or keyboard. The arithmetic unit 22 also calculates a cross-correlation function from the IF signal and determines position information of the measurement object Ob based on the calculation result.

[0019] The digital radar board 30 will be described in detail below with reference to FIG. 3. FIG. 3 is a conceptual diagram of the digital radar board 30 of this embodiment. The digital radar board 30 includes an FPGA 60, an RF output unit 62, an Lo output unit 64, a transmitting-side switch control output unit 66, a receiving-side switch control output unit 68, an A / D input unit 70, an A / D conversion unit 72, and an encoder signal input unit 74. The FPGA 60, the RF output unit 62, and the Lo output unit 64 constitute the digital radar unit 32. The RF output unit 62 and the Lo output unit 64 each include a serializer. The FPGA 60, the transmitting-side switch control output unit 66, and the receiving-side switch control output unit 68 constitute the switch control unit 34. The FPGA 60, the A / D input unit 70, and the A / D conversion unit 72 constitute the A / D processing unit 36.

[0020] 4, a clock configuration diagram of the digital radar board 30 will be described. The clock generator 80 has an oscillator 82, a PLL circuit (Phase Locked Loop circuit) 84, a first frequency divider 86, and a second frequency divider 88.

[0021] First, a reference clock generated by a crystal oscillator 90 is input to the oscillator 82 of the clock generator 80. In this embodiment, the reference clock is 48 MHz. The PLL circuit 84 upconverts the reference clock to the GHz band. In this embodiment, the PLL circuit 84 upconverts the reference clock to 13.2 GHz. The clock from the PLL circuit 84 is divided to a first frequency by a first frequency divider 86. In this embodiment, the first frequency is 132 MHz. The clock divided to the first frequency by the first frequency divider 86 is referred to as the first clock. In addition, the clock from the PLL circuit 84 is divided to a second frequency by a second frequency divider 88. In this embodiment, the second frequency is 200 MHz. The clock divided to the second frequency by the second frequency divider 88 is referred to as the second clock.

[0022] The first clock is input to the digital radar unit 32 of the FPGA 60. The digital radar unit 32 has a PLL circuit 65, an RF output unit 62, and an Lo output unit 64. The PLL circuit 65 upconverts the input 132 MHz first clock to, for example, 6.6 GHz. In accordance with this clock, the RF output unit 62 and the Lo output unit 64 output signals at 6.6 Gbps. At this time, the digital radar unit 32 performs synchronization processing at approximately a 132 MHz cycle.

[0023] The second clock is input to the program area 38 of the FPGA 60. The FPGA 60 divides the input second clock to generate an A / D conversion clock, which is then sent to the A / D conversion unit 72. The A / D conversion clock in this embodiment is 20 MHz. The A / D conversion unit 72 measures the IF signal at 20 Ms / s in accordance with the 20 MHz clock. In this way, synchronization of the digital radar board 30 can be achieved using two PLL circuits 84, 65 and a single common reference oscillator (crystal oscillator) 90. Furthermore, by implementing the A / D conversion unit 72 on the digital radar board 30, the radar device 10 can be made smaller, improving the convenience of measurement.

[0024] The operating principle of the radar device 10 of this embodiment will now be described. The digital radar unit 32 sends an M-sequence signal to the transmitting antenna 44. The transmitting antenna 44 radiates the received M-sequence signal as microwaves. The receiving antenna 46 receives the signal reflected by the object to be measured Ob. The M-sequence signal received by the receiving antenna 46 is input to the RF port of the mixer 54. The digital radar unit 32 also sends an appropriately delayed M-sequence signal to the Lo port of the mixer 54. The mixer 54 multiplies the M-sequence signal input to the RF port by the M-sequence signal input to the Lo port, and outputs the result as an IF signal from the IF port. The analog value of the IF signal is measured by the A / D processing unit 36 ​​and stored as data within the PC. The arithmetic unit 22 performs autocorrelation processing on this data. As a result, the arithmetic unit 22 calculates the distance L from the transmitting antenna 44 to the object to be measured Ob.

[0025] The M-sequence code {x} transmitted by the digital radar unit 32 is given by the following equation: However, the sum is an exclusive OR (XOR).

[0026] For example, when the number of terms in the M sequence is n=4, the M sequence code has the following values. Equation (2) is the coefficient of the generating polynomial when n=4. Equation (3) is the initial value up to n=4. Equation (4) is the M sequence code generated from these two equations. At this time, the bit period T of the M sequence code of equation (4) is Ｍ Is T Ｍ =2 ｎ -1=2 ４ -1=15 bits.

[0027] When using an M-sequence code as an M-sequence signal in the radar device 10, it is desirable to use a signal with as small a DC offset as possible. For this reason, the M-sequence signal of the following equation (5) in which 0 is replaced by −1 is used.

[0028] In this case, the number of terms in the M sequence is n, and the bit period of the M sequence signal is T Ｍ , the period of the M-sequence signal is T, the period of one bit is Δt, and the M-sequence signal input to the RF port of the mixer 54 is m １ (t), the signal input to the Lo port of the mixer 54 is m ２ (t), m ２ If the delay time of (t) is α, the propagation speed of the microwave is c, and the distance to the measurement object Ob is L, the autocorrelation function S(α) is expressed by the following equations (6) to (8) based on the definition of the M-sequence code.

[0029] Here, it is reasonable to perform delay comparison for each bit (every Δt). α When is the number of delay bits of the Lo signal, Equation (8) becomes Equation (10) below.

[0030] If Δt is omitted from equation (10), the following equation (12) is obtained: β is the number of delay bits of the microwave reflected from the object to be measured Ob.

[0031] Fig. 5 shows a timing chart of the embodiment. In the embodiment shown in Fig. 5, the number of terms in the M sequence is n = 4. First, a trigger signal is input to the radar device 10, and distance measurement is started. It is assumed that there is no delay due to circuit wiring.

[0032] First, time domain sequence number j α =-1, the FPGA 60 synchronizes one period (T Ｍ The M-sequence signal of j bits is output to the RF output unit 62 and the Lo output unit 64. This is because when the distance to the measurement object Ob is L=0 (j β This is a dummy signal for compensating for the RF signal with a period T Ｍ The M-sequence signal is repeatedly output to the RF output section 62. The dummy signal for the first period output to the Lo output section 64 may all be -1.

[0033] Next, time domain sequence number j α At T = 0, the FPGA 60 outputs the same M-sequence signal for one period (T Ｍ bit), and outputs it to the Lo output unit 64. This is because when the distance to the measurement object Ob is L=0 (j β = 0). Next, the time domain sequence number j α At T = 1, the FPGA 60 delays the M-sequence signal by one bit for one period (T Ｍ 5 shows an example of an M-sequence signal for two periods. The Lo signal output here corresponds to the signal enclosed by the dashed line in FIG. 5. This is the case when the distance to the measurement object Ob is L=1×cΔt / 2 (j β =1).

[0034] Next, time domain sequence number j α At T = 2, the FPGA 60 delays the M-sequence signal by 2 bits for one period (T Ｍ 5. This is the case when the distance to the measurement object Ob is L=2×cΔt / 2 (j β =2).

[0035] Next, similarly, time domain sequence number j α In this case, the FPGA 60 α The M-sequence signal is bit delayed for one period (T Ｍ The maximum number of repetitions is T Ｍ =2 ｎ -1=2 ４ -1 = 15 times. At this time, the maximum detection distance L ｍａｘ is expressed by the following equation (13) from equation (11).

[0036] The detection distance L' required to measure the measurement object Ob ｍａｘ is the maximum detection distance L ｍａｘ If it is shorter than αｍａｘ After repeating this process, the measurement ends. This makes it possible to speed up repeated measurements. The above is the basic sequence of the M-sequence signal output from the FPGA 60 per measurement.

[0037] The mixer 54 outputs an IF signal from the IF port based on the input RF signal and Lo signal. The IF signal output from the mixer 54 corresponds to the product inside the autocorrelation function of equation (1). Therefore, the value of the IF signal is multiplied by a period T Ｍ Every T Ｍ By taking the sum of times, the autocorrelation function S[j α ] is obtained. β Autocorrelation function S[j α ]. As shown in FIG. 6, the autocorrelation function S[j α ] is a pulse-like time domain waveform.

[0038] Here, because the RF output of the radar device 10 is generally at a high speed of several GHz, it is not easy to prepare an A / D board capable of measuring at the timing of each bit. Therefore, the IF signal is passed through a low-pass filter 56 and measured at a frequency lower than the bit rate. In this way, an analog sum can be achieved by the integration effect (moving average effect) of the low-pass filter 56, making it possible to directly obtain position information. Below, verification will be performed for the case where the number of terms in the M sequence is n=5.

[0039] FIG. 7 shows the case where n=5, j β Autocorrelation function S[j α ] is shown. FIG. 8 shows the IF signal output from the mixer 54. FIG. 9 shows the waveform of the IF signal of FIG. 8 after FFT processing. In FIG. 9, a rectangular window function simulating the low-pass filter 56 is shown. FIG. 10 shows the waveform of the IF signal after inverse FFT processing of the windowed FFT data. This simulates the IF signal after passing through the low-pass filter 56.

[0040] Here, the cutoff frequency of the window function is fc. The pulse width required for the time domain waveform in FIG. 10 is obtained by the following equation (14). Therefore, in the 1024pt FFT processing shown in FIG. 10, fc=1024 / 2T Ｍ That is, the window function shown in FIG. 9 has fc=16 pt.

[0041] As shown in Figure 10, a clear time domain waveform can be obtained from the IF signal. In Figure 10, the half width of the pulse in the time domain waveform is 2T. Ｍ This is consistent with equation (14). On the other hand, the S / N ratio of the pulse in the time domain waveform of FIG. 10 is about 4. This is lower than the theoretically expected S / N ratio (T Ｍ It can be seen that the S / N ratio is deteriorated to 1 / 8 when compared with the case where the number of terms in the M sequence is n=31. Therefore, in order to make the S / N ratio of the radar device 10 500 or more, it is preferable to further improve the S / N ratio by about 128 times. Here, when the number of terms in the M sequence is n=12, T Ｍ =2１２ Since −1=4095>31×128, it is preferable to set the number of terms n of the M sequence of the radar device 10 to 12 or more.

[0042] Hereinafter, an embodiment in which the number of terms in the M sequence is n=12 will be described with reference to Fig. 11. Fig. 11 shows a timing chart of the embodiment. In the RF signal from the measurement object Ob, when transmission channel=1 and reception channel=1, J β = 2 delays (0.1 ns x 2 = 0.2 ns).

[0043] First, an encoder signal is input to the FPGA 60 from the encoder signal input unit 74. The encoder signal is output from the encoder 28 at preset intervals (e.g., 10 mm). Measurements are performed at predetermined intervals by dividing the output encoder signal. When the encoder signal is input in phase A or phase B, the direction of rotation is also determined. After the division, a switch changeover start trigger (a) is generated inside the FPGA 60. Starting from the switch changeover start trigger (a), the FPGA 60 transmits a transmission changeover signal (b) to the transmitting-side switch control output unit 66. Also, starting from the switch changeover start trigger (a), the FPGA 60 transmits a reception changeover signal (c) to the receiving-side switch control output unit 68. For example, at the start of the switch changeover, the transmit channel is set to 1 and the receive channel is set to 1. Thereafter, the receive channels are switched to 2, 3, ..., 8 while the transmit channel remains set to 1. Next, the receive channels are switched to 1, 2, ..., 8 while the transmit channel remains set to 2. Thereafter, the transmission channels are switched one by one, and finally transmission channel=8 and reception channel=8.

[0044] For example, Δt1=60 ns after switching between the transmission and reception channels, a distance measurement start signal (d) is generated inside the FPGA 60. Here, Δt1 is set to be equal to or longer than the settling time of the transmission-side RF switch 42 and the reception-side RF switch 48. The distance measurement start signal (d) is used as a starting point to start distance measurement by the radar device 10.

[0045] The FPGA 60 outputs an FPGA RF output signal (f) and an FPGA Lo output signal (h) synchronized with the distance measurement start signal (d) to the RF output unit 62 and the Lo output unit 64, respectively.Ｍ The 129-bit standard M-sequence code M is repeatedly output as an FPGA-RF output signal (f) a predetermined number of times (NL+1=129 times). The FPGA-RF output signal (f) passes through an amplifier 40, a transmitting RF switch 42, and a transmitting antenna 44, and is radiated into space as a microwave.

[0046] The microwaves reflected by the object to be measured Ob are received by the receiving antenna 46, pass through the receiving RF switch 48 and amplifier 50, and are input to the RF port of the mixer 54 as the mixer RF input (g).

[0047] The FPGA 60 operates in a cycle T Ｍ M-sequence code m(j α ) is repeated a predetermined number of times (NL+1=129 times) and output as the FPGA Lo output signal (h). Of these, only the M-sequence code m(-1) in the first period is a dummy code with all values ​​of 0. The FPGA Lo output signal (h) is amplified by the amplifier 52 and then input to the Lo port of the mixer 54. At this time, the FPGA 60 outputs the M-sequence code m(-1) in the first period as the FPGA Lo output signal (h). Ｍ The FPGA 60 outputs the Lo output switching signal (e) 129 times (NL+1 times).

[0048] The mixer RF input (g) is input to the RF port of the mixer 54. The mixer RF input (g) is a signal obtained by delaying the FPGA RF output signal (f) by a predetermined time. The delay time is the sum of the circuit delay time Δtc (up to 2 ns) and the round-trip propagation time Δtg of the microwaves radiated from the transmitting antenna 44 and reflected by the object to be measured Ob to the receiving antenna 46. １１ (0.2 ns). At this time, the mixer 54 outputs the mixer IF output (i) from the IF port as a result of multiplying the mixer RF input (g) and the FPGA Lo output signal (h). The input timing of the dummy code (j α =-1), there is no output from the mixer IF output (i). α At timings of NL=0 to (NL-1), NL (128) mixer IF outputs (i) are output from the mixer 54.

[0049] When the mixer IF output (i) output from the mixer 54 is input to the low-pass filter 56, a pulse waveform (j) is obtained, and then A / D measurement is performed. At this time, a delay Δt3 (0.82 μs) of about one cycle of the cutoff frequency fc of the low-pass filter 56 occurs. Therefore, the A / D sampling pulse (k) is delayed by Tt / 2+Δt3 from the Lo output switching signal (e). When A / D measurement is averaged, sampling is increased around the sampling pulse (k), as shown by the A / D sampling pulse (k'). In the example shown in FIG. 11, the pulse waveform (j) is j α = 2(j β = 2).

[0050] Immediately after the FPGA Lo output signal (h) ends, an unwanted ringing waveform caused by the low-pass filter 56 continues. The ringing duration is expected to be approximately six periods of the cutoff frequency fc of the low-pass filter 56 (6 × 0.82 μs = 4.92 μs). Therefore, one distance measurement is completed by adding Δt2 (= up to 6 μs) after the FPGA Lo output signal (h) ends.

[0051] From the above, if the duration of the FPGA RF output signal (f) and the FPGA Lo output signal (h) is TL2, the time required for one distance measurement is TL ｔｏｔａｌ ,TL ｔｏｔａｌ = Δt1 + TL2 + Δt2 = 60 ns + 52.8 μs + 6 μs = 58.9 μs. Also, the time T required for one switch changeover scan is ｓｃａｎ Is T ｓｃａｎ =TL ｔｏｔａｌ × 8ch × 8ch = 58.9 μs × 8 × 8 = 3.8 ms. Δt1 is determined by the specifications of the transmitting RF switch 42 and the receiving RF switch 48, etc. Δt1 also includes the delay of the switching signal. Δt3 and Δt2 are determined by the specifications of the low-pass filter 56 and the amplifier 58, etc. Δtc is mainly determined by the wiring length. Δtc is determined by an air radiation test when confirming the operation of the radar device 10.

[0052] Finally, while the embodiments of the location information detection device and location information detection method of the present invention have been described, these have been presented as examples and are not intended to limit the scope of the invention. The novel embodiments may be embodied in various other forms, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. Such embodiments and modifications are intended to be included within the scope and spirit of the invention, as well as within the scope of the claims and their equivalents.

[0053] REFERENCE SIGNS LIST 10 radar device 20 radar main body 22 arithmetic unit 28 encoder 30 digital radar board 32 digital radar unit 34 switch control unit 36 ​​A / D processing unit 38 program area 40 amplifier 42 transmitting side RF switch 44 transmitting antenna 46 receiving antenna 48 receiving side RF switch 50 amplifier 52 amplifier 54 mixer 56 low pass filter 58 amplifier 60 FPGA 62 RF output unit 64 Lo output unit 65 PLL circuit 66 transmitting side switch control output unit 68 receiving side switch control output unit 70 A / D input unit 72 A / D conversion unit 74 encoder signal input unit 80 clock generator 82 oscillator 84 PLL circuit 86 first frequency divider 88 second frequency divider 90 crystal oscillator Ob Measurement object

Claims

1. A position information detection device that irradiates a measurement object with electromagnetic waves, receives a reflected wave from the measurement object, performs signal processing, and obtains position information of the measurement object, comprising: a transmission unit that emits electromagnetic waves of a predetermined signal to the measurement object; a reception unit that receives the reflected wave from the measurement object as a signal of a reception code sequence; a mixer that mixes the signal of the reception code sequence and a reference signal to generate an IF signal; a low-pass filter to which the IF signal generated by the mixer is input; a digital radar board, comprising: a reference oscillator that generates a reference clock; an FPGA that outputs a signal according to the reference clock; an RF output unit that outputs an RF output signal of an M-sequence signal to the transmission unit according to the reference clock; a Lo output unit that outputs a Lo signal of the M-sequence signal to the mixer according to the reference clock; an A / D input unit to which the IF signal output from the low-pass filter is input; an A / D conversion unit that transfers the IF signal input from the A / D input unit to the FPGA according to the reference clock; and a digital radar board having the above components, and a position information detection device having the above components.

2. The digital radar board of claim 1, comprising: a clock generator, comprising: a first PLL circuit that up-converts the reference clock; and a first frequency divider that divides the clock from the first PLL circuit into a first clock of a first frequency.

3. The position information detection device of claim 2, wherein the FPGA is a second PLL circuit that up-converts the first clock, and has a second PLL circuit that outputs the up-converted clock to the RF output unit and the Lo output unit.

4. The position information detection device of claim 2 or 3, wherein the clock generator has a second frequency divider that divides the clock from the first PLL circuit into a second clock of a second frequency, and the FPGA sends the clock obtained by dividing the second clock to the A / D conversion unit.

5. A position information detection method, which generates a reference clock, the FPGA outputs a signal according to the reference clock, emits an electromagnetic wave of a predetermined signal to a measurement object based on an RF output signal of an M-sequence signal output according to the reference clock, receives a reflected wave from the measurement object as a signal of a received code sequence, mixes the signal of the received code sequence with a reference signal of the M-sequence signal output according to the reference clock to generate an IF signal, inputs the IF signal into a low-pass filter, and A / D converts the IF signal output from the low-pass filter according to the reference clock and transfers it to the FPGA.

6. The position information detection method according to claim 5, wherein the reference clock is up-converted by a first PLL circuit, and the clock from the first PLL circuit is divided into a first clock of a first frequency.

7. The position information detection method according to claim 6, wherein the first clock is up-converted by a second PLL circuit, and the RF output signal and the reference signal are output according to the up-converted clock.

8. The position information detection method according to claim 6 or 7, wherein the clock from the first PLL circuit is divided into a second clock of a second frequency, and A / D conversion is performed according to the clock obtained by dividing the second clock.

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