Semiconductor device

Abstract

This semiconductor device comprises a semiconductor substrate having a first main surface and a second main surface opposite from the first main surface, and an insulating film provided on the first main surface of the semiconductor substrate. The semiconductor substrate has a drift region that has a first conductivity type, a body region that is provided on the drift region and has a second conductivity type different from the first conductivity type, a source region that is provided on the body region so as to be separated from the drift region and has the first conductivity type, and a contact region that is provided on the body region and has the second conductivity type. The insulating film is provided with an opening that extends in a first direction parallel to the first main surface and exposes the source region and the contact region. The contact region has a unit structure. The unit structure includes a first region and a second region arranged in a two-fold rotational symmetry relationship, and a connection region connecting the first region and the second region.

Description

Semiconductor Devices

[0001] The present disclosure relates to semiconductor devices.

[0002] This application claims priority based on Japanese Application No. 2023-211963 filed on December 15, 2023, and incorporates by reference all of the contents of the aforementioned Japanese application.

[0003] A semiconductor device is known that has source regions and contact regions that extend in a stripe pattern in a first direction and are alternately arranged in a second direction perpendicular to the first direction (see, for example, Patent Document 1). The source regions and contact regions are covered with an insulating film. Contact holes extending along the first direction are provided in the insulating film. The contact regions and the source regions on both sides of the contact regions are exposed from the insulating film through the contact holes.

[0004] International Publication No. 2017 / 175460

[0005] The semiconductor device of the present disclosure comprises: a semiconductor substrate having a first main surface and a second main surface opposite to the first main surface; and an insulating film provided on the first main surface of the semiconductor substrate; the semiconductor substrate having a drift region having a first conductivity type; a body region provided on the drift region and having a second conductivity type different from the first conductivity type; a source region provided on the body region so as to be separated from the drift region and having the first conductivity type; and a contact region provided on the body region and having the second conductivity type; the insulating film has an opening extending in a first direction parallel to the first main surface and exposing the source region and the contact region; the contact region has a unit structure, and the unit structure includes a first region and a second region arranged in a relationship of two-fold rotational symmetry, and a connection region connecting the first region and the second region.

[0006] FIG. 1 is a plan view showing a silicon carbide semiconductor device according to a first embodiment. FIG. 2 is a cross-sectional view (part 1) showing the silicon carbide semiconductor device according to the first embodiment. FIG. 3 is a cross-sectional view (part 2) showing the silicon carbide semiconductor device according to the first embodiment. FIG. 4 is a view (part 1) explaining misalignment of contact regions in the silicon carbide semiconductor device of FIG. 1. FIG. 5 is a view (part 2) explaining misalignment of contact regions in the silicon carbide semiconductor device of FIG. 1. FIG. 6 is a plan view showing a silicon carbide semiconductor device according to a reference example. FIG. 7 is a view explaining misalignment of contact regions in the silicon carbide semiconductor device of FIG. 6. FIG. 8 is a plan view showing a silicon carbide semiconductor device according to a second embodiment. FIG. 9 is a plan view showing a silicon carbide semiconductor device according to a third embodiment. FIG. 10 is a plan view showing a silicon carbide semiconductor device according to a fourth embodiment. FIG. 11 is a plan view showing a silicon carbide semiconductor device according to a fifth embodiment.

[0007] In conventional semiconductor devices, if misalignment occurs between the source region and the contact region and the contact hole in the second direction, one of the source regions on either side of the contact region may not be exposed through the contact hole, which increases the resistance of the cell including the source region that is not exposed through the contact hole.

[0008] An object of the present disclosure is to provide a semiconductor device that can suppress an increase in resistance due to misalignment.

[0009] [Effects of the Present Disclosure] According to the present disclosure, it is possible to suppress high resistance due to misalignment.

[0010] The embodiments for carrying out the invention are described below.

[0011] [Description of the embodiments of the present disclosure] First, the embodiments of the present disclosure will be listed and described. In the following description, the same or corresponding elements will be denoted by the same reference numerals, and the same description will not be repeated.

[0012] [1] According to one aspect of the present disclosure, there is provided a semiconductor device comprising: a semiconductor substrate having a first main surface and a second main surface opposite the first main surface; and an insulating film provided on the first main surface of the semiconductor substrate, wherein the semiconductor substrate comprises: a drift region having a first conductivity type; a body region provided on the drift region and having a second conductivity type different from the first conductivity type; a source region provided on the body region so as to be spaced from the drift region and having the first conductivity type; and a contact region provided on the body region and having the second conductivity type, wherein the insulating film has an opening extending in a first direction parallel to the first main surface and exposing the source region and the contact region, the contact region having a unit structure, the unit structure including a first region and a second region arranged in a two-fold rotationally symmetric relationship, and a connection region connecting the first region and the second region. In this case, even if the position of the contact region is shifted in a second direction perpendicular to the first direction, the source regions on both sides of the contact region in the second direction are likely to be exposed from the opening. Therefore, it is possible to prevent the semiconductor device from becoming high in resistance due to misalignment.

[0013] [2] In [1], the unit features may be periodically arranged along the first direction, in which case the variation in characteristics of the semiconductor device in the first direction can be reduced.

[0014] [3] In [1] or [2], the length of the first region and the length of the second region in the first direction may be the same, in which case the characteristic variations of the semiconductor device can be reduced regardless of the direction of misalignment of the contact region with respect to the opening.

[0015] [4] In any of [1] to [3], the length of the unit feature in a second direction perpendicular to the first direction may be longer than the length of the opening. In this case, it is easy to maintain a constant area ratio between the source region exposed through the opening and the contact region exposed through the opening, regardless of the amount of misalignment of the contact region in the second direction. This makes it possible to suppress characteristic variations due to misalignment.

[0016] [5] In any of [1] to [4], the semiconductor substrate may be a silicon carbide substrate, which makes it easier to obtain an excellent breakdown voltage.

[0017] [Details of the Embodiments of the Present Disclosure] Hereinafter, the embodiments of the present disclosure will be described in detail, but the present disclosure is not limited thereto.

[0018] First Embodiment First, a semiconductor device according to a first embodiment will be described with reference to FIGS. 1 to 3. The following description will be given taking as an example a case where the semiconductor device is a silicon carbide semiconductor device having a silicon carbide substrate. In this case, excellent breakdown voltage is easily obtained. FIG. 1 is a plan view showing a silicon carbide semiconductor device 100A according to the first embodiment. FIGS. 2 and 3 are cross-sectional views showing the silicon carbide semiconductor device 100A according to the first embodiment. FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 1.

[0019] Silicon carbide semiconductor device 100A according to the first embodiment mainly has silicon carbide substrate 10, gate insulating film 81, gate electrode 82, interlayer insulating film 83, source electrode 60, and drain electrode 70. Source electrode 60 is not shown in Figure 1.

[0020] The silicon carbide substrate 10 includes a silicon carbide single crystal substrate 50 and a silicon carbide epitaxial layer 40 on the silicon carbide single crystal substrate 50. The silicon carbide substrate 10 has a first main surface 1 and a second main surface 2 opposite to the first main surface 1. The silicon carbide epitaxial layer 40 constitutes the first main surface 1. The silicon carbide single crystal substrate 50 constitutes the second main surface 2. The silicon carbide single crystal substrate 50 and the silicon carbide epitaxial layer 40 are made of, for example, hexagonal silicon carbide of polytype 4H. The silicon carbide single crystal substrate 50 contains n-type impurities such as nitrogen (N) and has an n-type. A semiconductor element is formed on the silicon carbide substrate 10.

[0021] In the first embodiment, a field effect transistor as an example of a semiconductor element is formed on a silicon carbide substrate 10. A silicon carbide epitaxial layer 40 mainly includes a drift region 11, a body region 12, a source region 13, and a contact region 18.

[0022] Drift region 11 contains n-type impurities such as nitrogen or phosphorus (P) and has an n-type conductivity. The n-type impurities are preferably added to drift region 11 not by ion implantation but by doping the impurities during epitaxial growth of drift region 11.

[0023] The body region 12 is provided on the drift region 11. The body region 12 contains p-type impurities such as aluminum (Al) and has p-type conductivity.

[0024] The source region 13 is provided on the body region 12 so as to be separated from the drift region 11 by the body region 12. The source region 13 contains n-type impurities such as nitrogen or phosphorus and has an n-type conductivity. The source region 13 constitutes the first main surface 1.

[0025] The contact region 18 contains a p-type impurity such as aluminum and has a p-type conductivity. The contact region 18 constitutes the first main surface 1. The contact region 18 penetrates the source region 13 and contacts the body region 12.

[0026] A gate trench 5 defined by a side surface 3 and a bottom surface 4 is provided in the first main surface 1. The side surface 3 passes through the source region 13 and the body region 12 to reach the drift region 11. The bottom surface 4 is continuous with the side surface 3. The bottom surface 4 is made of the drift region 11. The bottom surface 4 is, for example, a plane parallel to the second main surface 2. The side surface 3 is inclined with respect to a plane including the bottom surface 4. The gate trench 5 extends, for example, in a stripe shape along a first direction parallel to the first main surface 1. A plurality of gate trenches 5 are provided in a second direction perpendicular to the first direction.

[0027] The gate insulating film 81 contacts the side surface 3 and the bottom surface 4. The gate insulating film 81 is, for example, an oxide film. The gate insulating film 81 is made of, for example, a material containing silicon dioxide. The gate insulating film 81 contacts the drift region 11 at the bottom surface 4. The gate insulating film 81 contacts each of the source region 13, the body region 12, and the drift region 11 at the side surface 3. The gate insulating film 81 may contact the source region 13 at the first main surface 1.

[0028] The gate electrode 82 is provided on the gate insulating film 81. The gate electrode 82 is made of, for example, polysilicon containing conductive impurities. A part of the gate electrode 82 may be disposed on the first main surface 1.

[0029] The interlayer insulating film 83 is in contact with the gate insulating film 81 and the gate electrode 82. The interlayer insulating film 83 is made of a material containing, for example, silicon dioxide. The interlayer insulating film 83 electrically insulates the gate electrode 82 from the source electrode 60. Contact holes 90 are formed in the gate insulating film 81 and the interlayer insulating film 83 at regular intervals in the second direction. The contact holes 90 are provided so that the gate trench 5 is located between the contact holes 90 adjacent to each other in the second direction. The contact holes 90 extend in the first direction. The source region 13 and the contact region 18 are exposed from the gate insulating film 81 and the interlayer insulating film 83 through the contact holes 90.

[0030] The source electrode 60 is in contact with the first main surface 1. The source electrode 60 includes a contact electrode 61 and a source wiring 62.

[0031] The contact electrode 61 is in contact with the source region 13 and the contact region 18 on the first main surface 1. The contact electrode 61 is made of a material containing, for example, nickel silicide (NiSi). The contact electrode 61 may be made of a material containing titanium (Ti), aluminum, and silicon (Si). The contact electrode 61 forms an ohmic junction with the source region 13 and the contact region 18.

[0032] The source wiring 62 covers the upper surface of the contact electrode 61 and the upper surface and side surfaces of the interlayer insulating film 83. The source wiring 62 is in contact with both the contact electrode 61 and the interlayer insulating film 83. The source wiring 62 is made of a material containing aluminum or copper (Cu), for example. The source wiring 62 may also be made of a material containing aluminum and copper. The source electrode 60 is electrically insulated from the gate electrode 82 by the interlayer insulating film 83. The source electrode 60 may include a barrier metal film, such as a titanium nitride (TiN) film, between the source wiring 62 and the interlayer insulating film 83.

[0033] The drain electrode 70 is in contact with the second main surface 2. The drain electrode 70 is in contact with the silicon carbide single crystal substrate 50 at the second main surface 2. The drain electrode 70 is electrically connected to the drift region 11. The drain electrode 70 is made of a material containing nickel silicide, for example. The drain electrode 70 may be made of a material containing titanium, aluminum, and silicon. The drain electrode 70 forms an ohmic junction with the silicon carbide single crystal substrate 50.

[0034] 1 to 3, the arrangement of the contact region 18 will be described. As shown in FIG.

[0035] Unit structure 180 includes first region 181, second region 182, and connection region 183. First region 181 and second region 182 are arranged in a relationship of two-fold rotational symmetry with respect to center C of unit structure 180. In this case, even if the position of contact region 18 is shifted in the second direction, source region 13 on both sides of contact region 18 in the second direction is likely to be exposed from contact hole 90. Therefore, an increase in resistance of silicon carbide semiconductor device 100A due to misalignment can be suppressed.

[0036] Unit features 180 are arranged periodically along the first direction. In this case, it is possible to reduce the characteristic variation of silicon carbide semiconductor device 100A in the first direction. In a second direction perpendicular to the first direction, length L1 of unit feature 180 may be longer than length L2 of contact hole 90. In this case, it is easy to maintain a constant area ratio between source region 13 exposed from contact hole 90 and contact region 18 exposed from contact hole 90, regardless of the amount of misalignment of contact region 18 in the second direction. Therefore, it is possible to suppress characteristic variation due to misalignment.

[0037] In the first direction, the length of second region 182 may be the same as the length of first region 181. In this case, regardless of the direction of misalignment of contact region 18 with respect to contact hole 90, variation in the characteristics of silicon carbide semiconductor device 100A can be reduced.

[0038] The first region 181 has a rectangular shape when viewed in a plan view from a direction perpendicular to the first main surface 1. The first region 181 is provided on the negative X-axis side and the positive Y-axis side with respect to the center C of the unit feature 180. A first surface 181a on the positive X-axis side of the first region 181 is located on the same plane as a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction. A second surface 181b on the negative Y-axis side of the first region 181 is located on the same plane as a plane that passes through the center C of the unit feature 180 and is parallel to the X-axis direction.

[0039] The second region 182 has a rectangular shape when viewed in a planar view from a direction perpendicular to the first main surface 1. The first region 181 and the second region 182 are arranged in a non-symmetrical relationship with respect to a plane that passes through the center C of the unit feature 180 and is parallel to the X-axis direction. The first region 181 and the second region 182 are arranged in a non-symmetrical relationship with respect to a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction. The second region 182 is provided on the positive X-axis and negative Y-axis side of the center C of the unit feature 180. The second region 182 is provided on the positive X-axis and negative Y-axis side of the first region 181. A third surface 182a on the negative X-axis side of the second region 182 is located on the same plane as a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction. The third surface 182a is located on the same plane as the first surface 181a. A fourth surface 182b on the Y-axis positive side of the second region 182 is located on the same plane as a plane that passes through the center C of the unit feature 180 and is parallel to the X-axis direction. The fourth surface 182b is located on the same plane as the second surface 181b.

[0040] Connection region 183 connects first region 181 and second region 182 included in the same unit structure. Connection region 183 is arranged to include center C of unit structure 180. Connection region 183 may connect first region 181 included in one unit structure 180 to second region 182 included in a unit structure 180 adjacent to one unit structure 180 in the first direction. When first region 181 and second region 182 are connected by connection region 183, first region 181 and second region 182 are not brought into a floating state. This stabilizes the operation of silicon carbide semiconductor device 100A.

[0041] According to the first embodiment, the contact region 18 has a unit structure 180. The unit structure 180 includes a first region 181 and a second region 182 that are arranged in a relationship of two-fold rotational symmetry with respect to a center C of the unit structure 180, and a connection region 183 that connects the first region 181 and the second region 182.

[0042] 4 , even if the contact region 18 is shifted toward the positive X-axis direction, the source region 13 adjacent to the first region 181 on the positive X-axis direction side and the source region 13 adjacent to the second region 182 on the negative X-axis direction side are exposed from the contact hole 90. In other words, the source regions 13 on both sides of the contact region 18 in the second direction are exposed from the contact hole 90.

[0043] 5 , even when the contact region 18 is shifted in the negative X-axis direction, the source region 13 adjacent to the first region 181 on the positive X-axis direction side and the source region 13 adjacent to the second region 182 on the negative X-axis direction side are exposed from the contact hole 90. In other words, the source regions 13 on both sides of the contact region 18 in the second direction are exposed from the contact hole 90.

[0044] As described above, according to the first embodiment, even if the position of contact region 18 is shifted in the second direction, source region 13 on both sides of contact region 18 in the second direction is likely to be exposed from contact hole 90. Therefore, an increase in the resistance of silicon carbide semiconductor device 100A due to misalignment can be suppressed.

[0045] 6, if contact region 18 extends in a stripe pattern in the Y-axis direction, source region 13 adjacent to contact region 18 on the positive side of the X-axis may not be exposed if the position of contact region 18 is shifted toward the positive side of the X-axis as shown in FIG. 7. In this case, current does not flow through unexposed source region 13, and therefore the resistance on the positive side of contact region 18 in the X-axis direction increases and the temperature distribution within silicon carbide semiconductor device 100A deteriorates. The same applies when contact region 18 is shifted toward the negative side of the X-axis.

[0046] Second Embodiment A silicon carbide semiconductor device 100B according to a second embodiment will be described with reference to Figure 8. Silicon carbide semiconductor device 100B differs from silicon carbide semiconductor device 100A in that, when viewed in a plan view from a direction perpendicular to first main surface 1, connection region 183 has a circular shape centered on center C of unit feature 180. The other configuration may be the same as silicon carbide semiconductor device 100A.

[0047] According to the second embodiment, similarly to the first embodiment, even if the position of contact region 18 is shifted in the second direction, source region 13 on both sides of contact region 18 in the second direction is likely to be exposed from contact hole 90. Therefore, an increase in the resistance of silicon carbide semiconductor device 100B due to misalignment can be suppressed.

[0048] 9 , a silicon carbide semiconductor device 100C according to a third embodiment will be described. Silicon carbide semiconductor device 100C differs from silicon carbide semiconductor device 100A in that length L3 of connection region 183 passing through center C of unit feature 180 in the second direction is 0.5 to 1.0 times length L2 of contact hole 90. The other configuration may be the same as silicon carbide semiconductor device 100A.

[0049] According to the third embodiment, similarly to the first embodiment, even if the position of contact region 18 is shifted in the second direction, source region 13 on both sides of contact region 18 in the second direction is likely to be exposed from contact hole 90. Therefore, an increase in the resistance of silicon carbide semiconductor device 100C due to misalignment can be suppressed.

[0050] According to the third embodiment, in the second direction, the length L3 of the connection region 183 passing through the center C of the unit feature 180 is 0.5 to 1.0 times the length L2 of the contact hole 90. In this case, it is easy to prevent the first region 181 and the second region 182 from being in a floating state.

[0051] Fourth Embodiment A silicon carbide semiconductor device 100D according to a fourth embodiment will be described with reference to Figure 10. In silicon carbide semiconductor device 100D, first region 181 is shifted toward the negative side of the X-axis and second region 182 is shifted toward the positive side of the X-axis relative to silicon carbide semiconductor device 100A. The rest of the configuration may be the same as that of silicon carbide semiconductor device 100A.

[0052] The first surface 181a is located on the negative X-axis side of a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction.

[0053] The third surface 182a is located on the positive X-axis side of a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction. The third surface 182a is located on the positive X-axis side of the first surface 181a.

[0054] According to the fourth embodiment, similarly to the first embodiment, even if the position of contact region 18 is shifted in the second direction, source region 13 on both sides of contact region 18 in the second direction is likely to be exposed from contact hole 90. Therefore, an increase in the resistance of silicon carbide semiconductor device 100D due to misalignment can be suppressed.

[0055] According to the fourth embodiment, the first surface 181a is located on the negative X-axis side of a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction, and the third surface 182a is located on the positive X-axis side of a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction. In this case, the area of ​​the source region 13 exposed from the contact hole 90 is larger than the area of ​​the contact region 18 exposed from the contact hole 90. This makes it easier to reduce the contact resistance between the source region 13 and the contact electrode 61. The silicon carbide semiconductor device 100D according to the fourth embodiment is particularly effective when the contact resistance between the source region 13 and the contact electrode 61 is higher than the contact resistance between the contact region 18 and the contact electrode 61.

[0056] Fifth Embodiment A silicon carbide semiconductor device 100E according to a fifth embodiment will be described with reference to Figure 11 . In silicon carbide semiconductor device 100E, first region 181 is shifted in the positive direction of the X-axis and second region 182 is shifted in the negative direction of the X-axis relative to silicon carbide semiconductor device 100A. Part of first region 181 and part of second region 182 also serve as connection region 183. The rest of the configuration may be the same as that of silicon carbide semiconductor device 100A.

[0057] The first surface 181a is located on the positive X-axis side of a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction.

[0058] The third surface 182a is located on the negative X-axis side of a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction. The third surface 182a is located on the negative X-axis side of the first surface 181a.

[0059] According to the fifth embodiment, similarly to the first embodiment, even if the position of contact region 18 is shifted in the second direction, source region 13 on both sides of contact region 18 in the second direction is likely to be exposed from contact hole 90. Therefore, an increase in the resistance of silicon carbide semiconductor device 100E due to positional misalignment can be suppressed.

[0060] According to the fifth embodiment, the first surface 181a is located on the positive side of the X-axis from a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction, and the third surface 182a is located on the negative side of the X-axis from a plane that passes through the center C of the unit feature 180 and is parallel to the Y-axis direction. In this case, the area of ​​the contact region 18 exposed from the contact hole 90 is larger than the area of ​​the source region 13 exposed from the contact hole 90. This makes it easier to reduce the contact resistance between the contact region 18 and the contact electrode 61. The silicon carbide semiconductor device 100E according to the fifth embodiment is particularly effective when the contact resistance between the contact region 18 and the contact electrode 61 is higher than the contact resistance between the source region 13 and the contact electrode 61.

[0061] Although the embodiments have been described in detail above, the present invention is not limited to the specific embodiments, and various modifications and changes are possible within the scope of the claims.

[0062] DESCRIPTION OF SYMBOLS 1 First main surface 2 Second main surface 3 Side surface 4 Bottom surface 5 Gate trench 10 Silicon carbide substrate 11 Drift region 12 Body region 13 Source region 18 Contact region 40 Silicon carbide epitaxial layer 50 Silicon carbide single crystal substrate 60 Source electrode 61 Contact electrode 62 Source wiring 70 Drain electrode 81 Gate insulating film 82 Gate electrode 83 Interlayer insulating film 90 Contact hole 100A, 100B, 100C, 100D, 100E Silicon carbide semiconductor device 180 Unit structure 181 First region 181a First surface 181b Second surface 182 Second region 182a Third surface 182b Fourth surface 183 Connection region C Center

Claims

1. A semiconductor device comprising: a semiconductor substrate having a first main surface and a second main surface opposite to the first main surface; and an insulating film provided on the first main surface of the semiconductor substrate, wherein the semiconductor substrate has: a drift region having a first conductivity type; a body region provided on the drift region and having a second conductivity type different from the first conductivity type; a source region provided on the body region so as to be separated from the drift region and having the first conductivity type; and a contact region provided on the body region and having the second conductivity type, wherein the insulating film has an opening extending in a first direction parallel to the first main surface and exposing the source region and the contact region, and the contact region has a unit structure, and the unit structure includes: a first region and a second region arranged in a relationship of two-fold rotational symmetry; and a connection region connecting the first region and the second region.

2. The semiconductor device according to claim 1, wherein the unit structures are provided periodically along the first direction.

3. The semiconductor device according to claim 1 or 2, wherein the length of the first region and the length of the second region in the first direction are the same.

4. The semiconductor device according to claim 1, wherein the length of the unit feature is longer than the length of the opening in a second direction perpendicular to the first direction.

5. The semiconductor device according to claim 1, wherein the semiconductor substrate is a silicon carbide substrate.

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