Light detection device and electronic device

Abstract

[Problem] To provide a light detection device that enables miniaturization while suppressing deterioration in electrical characteristics. [Solution] A light detection device according to one embodiment of the present disclosure comprises: a photoelectric conversion element that performs photoelectric conversion of incident light; and a plurality of pixel transistors that are electrically connected to the photoelectric conversion element. One of the plurality of pixel transistors is a variable resistor element that is switched to a conductive state or a non-conductive state in accordance with an applied voltage. The variable resistor element is disposed in a layer that is different from a semiconductor layer in which the photoelectric conversion element is disposed.

Description

Photodetector and electronic equipment

[0001] The present disclosure relates to photodetection devices and electronic equipment.

[0002] One known example of a light detection device is a complementary metal oxide semiconductor (CMOS) sensor that includes a photoelectric conversion element that converts incident light into an electric signal. Various pixel transistors are electrically connected to the photoelectric conversion element.

[0003] JP 2018-50057 A

[0004] In CMOS sensors, pixels are often miniaturized to meet the demands for higher resolution and smaller area. In this case, reducing the area of ​​the pixel transistor can increase the variation in electrical characteristics. Furthermore, for example, RTS noise, which is the dominant cause of random noise, can worsen due to the reduction in the area of ​​the pixel transistor.

[0005] The present disclosure provides a photodetector and electronic device that can be miniaturized while suppressing deterioration of electrical characteristics.

[0006] A photodetector according to an embodiment of the present disclosure includes a photoelectric conversion element that photoelectrically converts incident light, and a plurality of pixel transistors electrically connected to the photoelectric conversion element, one of which is a variable resistance element that switches between a conductive state and a non-conductive state in response to an applied voltage, the variable resistance element being disposed in a semiconductor layer different from the semiconductor layer in which the photoelectric conversion element is disposed.

[0007] The variable resistance element may switch whether to output a pixel signal generated by photoelectric conversion of the photoelectric conversion element, depending on the applied voltage.

[0008] The photodetector may further include a charge accumulation region that generates a pixel signal based on the amount of charge photoelectrically converted by the photoelectric conversion element, and the variable resistance element may switch whether or not to reset the potential of the charge accumulation region depending on the applied voltage.

[0009] The photodetector may further include a charge accumulation region that generates a pixel signal based on the amount of charge photoelectrically converted by the photoelectric conversion element, and the variable resistance element may change the conversion efficiency of the charge accumulation region in accordance with the applied voltage.

[0010] The variable resistance element may also include a solid electrolyte, a first electrode disposed below the solid electrolyte, a second electrode disposed above the solid electrolyte, and a third electrode disposed below the solid electrolyte.

[0011] The variable resistance element may also include a solid electrolyte, a first electrode disposed below the solid electrolyte, and a second electrode disposed above the solid electrolyte.

[0012] The photodetector may further include a control transistor that controls a voltage applied to the second electrode.

[0013] The solid electrolyte may be an oxide.

[0014] The second electrode may also include an inert metal.

[0015] The photodetector may further include: a protective layer covering the second electrode; and a CAP film provided between the first electrode and the solid electrolyte.

[0016] The photodetector may further include an insulating layer provided on the semiconductor layer, and the variable resistance element may be disposed in the insulating layer.

[0017] According to an embodiment of the present disclosure, there is provided an electronic device including a photodetector including a photoelectric conversion element that photoelectrically converts incident light, and a plurality of pixel transistors electrically connected to the photoelectric conversion element, wherein one of the plurality of pixel transistors is a variable resistance element that switches between a conductive state and a non-conductive state in response to an applied voltage, and the variable resistance element is disposed in a semiconductor layer different from the semiconductor layer in which the photoelectric conversion element is disposed.

[0018] 1 is a chip layout diagram showing an example of a configuration of a photodetector according to the first embodiment. FIG. 2 is a block diagram showing an example of a configuration of a photodetector according to the first embodiment. FIG. 3 is a diagram showing an example of an equivalent circuit of a pixel according to the first embodiment. FIG. 4 is a cross-sectional view showing the structure of a main part of a pixel according to the first embodiment. FIG. 5 is a plan view showing the layout of a semiconductor layer in a pixel according to the first embodiment. FIG. 6 is a cross-sectional view showing the structure of a selection variable resistive element according to the first embodiment. FIG. 7 is a cross-sectional view for explaining the operation of a selection variable resistive element. FIG. 8 is a cross-sectional view showing a process of forming an element isolation film. FIG. 9 is a cross-sectional view showing a process of forming a photoelectric conversion element. FIG. 10 is a cross-sectional view showing a process of forming a pixel transistor. FIG. 11 is a cross-sectional view showing a process of forming an insulating layer and a contact plug. FIG. 12 is a cross-sectional view showing a process of forming a bottom-layer conductor. FIG. 13 is a cross-sectional view showing a process of covering a bottom-layer conductor with an insulating layer. FIG. 14 is a cross-sectional view showing a process of forming a hole. FIG. 15 is a cross-sectional view showing a process of forming a CAP film, a solid electrolyte, and a second electrode. FIG. 16 is a cross-sectional view showing a process of etching a portion of each of the CAP film, the solid electrolyte, and the second electrode. FIG. 17 is a cross-sectional view showing a process of forming a protective layer. FIG. 18 is a cross-sectional view showing a process of forming a conductive layer one layer above the bottom layer. FIG. 19 is an equivalent circuit of a pixel according to a comparative example. FIG. 19 is a plan view showing the layout of a semiconductor layer in a pixel according to the comparative example. FIG. 19 is an equivalent circuit of a pixel according to a second embodiment. FIG. 1 is a cross-sectional view showing the structure of a main part of a pixel according to a second embodiment. FIG. 2 is a diagram showing an equivalent circuit of a pixel according to a third embodiment. FIG. 3 is a cross-sectional view showing the structure of a main part of a pixel according to the third embodiment. FIG. 4 is a diagram showing an equivalent circuit of a pixel according to a fourth embodiment. FIG. 5 is a cross-sectional view showing the structure of a main part of a pixel according to the fourth embodiment. FIG. 6 is a cross-sectional view for explaining the operation of a selective variable resistance element according to the fourth embodiment. FIG. 7 is a timing chart showing an example of the operation timing of a selective variable resistance element according to the fourth embodiment. FIG. 8 is a diagram for explaining the operation of pixels belonging to a selected row at timing t1. FIG. 9 is a diagram for explaining the operation of pixels belonging to a non-selected row at timing t1. FIG. 10 is a diagram for explaining the operation of pixels belonging to a selected row at timing t2. FIG. 11 is a diagram for explaining the operation of pixels belonging to a non-selected row at timing t2. FIG. 12 is a diagram for explaining the operation of pixels belonging to a selected row at timing t3.10 is a diagram for explaining the operation of pixels belonging to a non-selected row at timing t3. FIG. 11 is a block diagram showing an example of the configuration of an electronic device according to a fifth embodiment. FIG. 12 is a block diagram showing an example of the schematic configuration of a vehicle control system. FIG. 13 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit.

[0019] First Embodiment Fig. 1 is a chip layout diagram showing an example of the configuration of a photodetector according to a first embodiment. As shown in Fig. 1, a photodetector 1 according to this embodiment is provided on a semiconductor chip 2. The semiconductor chip 2 has a pixel region 2A and a peripheral region 2B. The pixel region 2A is provided in the center of the semiconductor chip 2. On the other hand, the peripheral region 2B is provided on the outer periphery of the semiconductor chip 2 so as to surround the pixel region 2A.

[0020] The pixel region 2A is a light receiving region that receives incident light. The pixel region 2A is configured as a pixel array in which a plurality of pixels 3 are arranged in a matrix along the X direction (row direction) and the Y direction (column direction). In this embodiment, the X direction and the Y direction are orthogonal to each other. The direction orthogonal to both the X direction and the Y direction is the Z direction (thickness direction, stacking direction).

[0021] A plurality of bonding pads 14 are arranged in the peripheral region 2B. Each of the plurality of bonding pads 14 is arranged along each of the four sides of the rectangular pixel region 2A. Each of the plurality of bonding pads 14 is an input / output terminal used when electrically connecting the semiconductor chip 2 to an external device.

[0022] 2 is a block diagram showing an example of the configuration of the photodetector 1 according to the first embodiment. As shown in Fig. 2, the semiconductor chip 2 includes a logic circuit 13. The logic circuit 13 includes a vertical drive circuit 4, a column signal processing circuit 5, a horizontal drive circuit 6, an output circuit 7, and a control circuit 8. The logic circuit 13 is configured as a CMOS circuit having, for example, n-channel conductivity type MOS transistors and p-channel conductivity type MOS transistors as field effect transistors.

[0023] The vertical drive circuit 4 is configured, for example, by a shift register. The vertical drive circuit 4 sequentially selects a plurality of pixel drive lines 10 and supplies pulses to the selected pixel drive lines 10 to drive the pixels 3, thereby driving each pixel 3 row by row. Specifically, the vertical drive circuit 4 sequentially selects and scans each pixel 3 in the pixel region 2A row by row in the vertical direction. As a result, each pixel 3 generates a pixel signal based on a signal charge corresponding to the amount of light received. The generated pixel signal is input to the column signal processing circuit 5 via vertical signal lines 11.

[0024] A column signal processing circuit 5 is arranged for each column of pixels 3. The column signal processing circuit 5 performs signal processing such as noise removal for each pixel column on pixel signals output from one row of pixels 3. For example, the column signal processing circuit 5 performs signal processing such as CDS (Correlated Double Sampling) and AD (Analog-Digital) conversion to remove fixed pattern noise specific to the pixels. A horizontal selection switch (not shown) is provided at the output stage of the column signal processing circuit 5 and connected between the output stage and the horizontal signal line 12.

[0025] The horizontal drive circuit 6 is configured by, for example, a shift register. The horizontal drive circuit 6 sequentially outputs horizontal scanning pulses to the column signal processing circuits 5, thereby selecting each of the column signal processing circuits 5 in turn. As a result, pixel signals are output from each of the column signal processing circuits 5 to the horizontal signal line 12.

[0026] The output circuit 7 processes and outputs pixel signals sequentially input from each of the column signal processing circuits 5 via the horizontal signal line 12. This signal processing includes, for example, buffering, black level adjustment, column variation correction, various types of digital signal processing, and the like.

[0027] Based on the vertical synchronization signal, horizontal synchronization signal, and master clock signal, the control circuit 8 generates clock signals and control signals that serve as references for the operations of the vertical drive circuit 4, column signal processing circuit 5, horizontal drive circuit 6, etc. The control circuit 8 outputs the generated clock signals and control signals to the vertical drive circuit 4, column signal processing circuit 5, horizontal drive circuit 6, etc.

[0028] 3 is a diagram showing an example of an equivalent circuit of a pixel 3 according to the first embodiment. As shown in FIG. 3, the pixel 3 has a photoelectric conversion element PD and a pixel circuit 30 electrically connected to the photoelectric conversion element PD. The pixel circuit 30 includes a charge accumulation region (floating diffusion) FD, a transfer transistor TG, an amplification transistor AMP, and a selective variable resistance element VR. ＳＥＬ and a reset transistor RST.

[0029] Transfer transistor TG, amplification transistor AMP, selective variable resistance element VR ＳＥＬ , and the reset transistor RST are examples of pixel transistors. Each pixel transistor is made of, for example, a silicon oxide film (SiO ２ These transistors are configured as MOS transistors having a gate insulating film made of a silicon nitride film (Si film), a gate electrode, and a pair of main electrode regions that function as a source region and a drain region. ３ N ４ Alternatively, a metal insulator semiconductor field effect transistor (MISFET) made of a laminated film such as a silicon nitride film and a silicon oxide film may be used.

[0030] The photoelectric conversion element PD generates a signal charge according to the amount of light received. The generated signal charge is temporarily accumulated (held) in the photoelectric conversion element PD. The cathode side of the photoelectric conversion element PD is electrically connected to the source region of the transfer transistor TG, and the anode side is electrically connected to a reference potential line (e.g., ground). The photoelectric conversion element PD can be, for example, a photodiode.

[0031] The charge accumulation region FD temporarily accumulates and holds the signal charge transferred from the photoelectric conversion element PD via the transfer transistor TG, thereby generating a pixel signal based on the amount of charge photoelectrically converted by the photoelectric conversion element PD.

[0032] The drain region of the transfer transistor TG is electrically connected to the charge storage region FD, and the gate electrode of the transfer transistor TG is electrically connected to a transfer transistor driving line among the pixel driving lines 10 (see FIG. 2).

[0033] In the amplifier transistor AMP, the source region is a selective variable resistance element VR ＳＥＬ The gate electrode of the amplifier transistor AMP is electrically connected to one end of the charge storage region FD and the source region of the reset transistor RST, and the drain region is electrically connected to the power supply line VDD and the drain region of the reset transistor RST.

[0034] The source region of the reset transistor RST is electrically connected to the charge storage region FD and the gate electrode of the amplifier transistor AMP. The drain region of the reset transistor RST is electrically connected to the power supply line VDD and the drain region of the amplifier transistor AMP. The gate electrode of the reset transistor RST is electrically connected to a reset transistor drive line among the pixel drive lines 10 (see FIG. 2).

[0035] Selectable variable resistance element VR ＳＥＬ One end of the selective variable resistance element VR is electrically connected to the source region of the amplification transistor AMP. ＳＥＬ The other end of the selective variable resistance element VR is electrically connected to the vertical signal line 11 (VSL). ＳＥＬ is electrically connected to a selection transistor driving line that transmits a selection signal sel among the pixel driving lines 10 (see FIG. 2). ＳＥＬ is composed of an atomic switch. ＳＥＬ The structure of will be described later.

[0036] 4 is a cross-sectional view showing the structure of a main part of the pixel 3 according to the first embodiment. As shown in Fig. 4, the pixel 3 has a structure in which a stacked body 32 is provided on a semiconductor layer 31. The semiconductor layer 31 is made of, for example, a silicon substrate.

[0037] 5 is a plan view showing the layout of the semiconductor layer 31 in the pixel 3 according to the first embodiment. As shown in Fig. 5, the semiconductor layer 31 is provided with a photoelectric conversion element PD, a transfer transistor TG, an amplification transistor AMP, and a reset transistor RST. As shown in Fig. 4, the semiconductor layer 31 is also provided with an element isolation film 311. The element isolation film 311 is provided, for example, between the photoelectric conversion element PD and the amplification transistor AMP.

[0038] A plurality of insulating layers 321 are stacked in the stacked body 32. A plurality of contact plugs 322 penetrate the insulating layers 321. The contact plugs 322 electrically connect elements provided in the semiconductor layer 31 to conductors in the insulating layers 321. The contact plugs 322 also electrically connect conductors arranged in different layers. For example, as shown in FIG. 4 , the charge storage region FD and the FD wiring 324 are electrically connected by the contact plugs 322. The FD wiring 324 and the amplification transistor AMP are also electrically connected by another contact plug 322.

[0039] The conductor provided in the insulating layer 321 includes the selective variable resistance element VRSEL. ＳＥＬ The structure of is explained.

[0040] FIG. 6 shows the selective variable resistance element VR according to the first embodiment. ＳＥＬ 6 is a cross-sectional view showing the structure of the selective variable resistance element VR shown in FIG. ＳＥＬ has a first electrode 33, a second electrode 34, a third electrode 35, a solid electrolyte 36, a CAP film 37, and a protective layer 38. The first electrode 33 and the third electrode 35 are arranged in the same layer and below the solid electrolyte 36. The second electrode 34 is arranged above the solid electrolyte 36. That is, the selective variable resistance element VR according to this embodiment ＳＥＬ is a three-terminal atomic switch.

[0041] The first electrode 33 corresponds to the drain electrode of the transistor and is electrically connected to the source of the amplification transistor AMP via a contact plug 322.

[0042] The second electrode 34 corresponds to the source electrode of the transistor. The second electrode 34 is formed so as to cover the upper surface of the solid electrolyte 36. The second electrode 34 is electrically connected to the vertical signal line VSL via a contact plug 322. The vertical signal line VSL is disposed in the layer immediately above the bottom layer.

[0043] The third electrode 35 corresponds to the gate electrode of the transistor. The third electrode 35 is electrically connected to the pixel drive line 10 that transmits the selection signal sel via the contact plug 322. The pixel drive line 10 is disposed in the layer immediately above the bottom layer of the stacked body 32.

[0044] The solid electrolyte 36 is a solid that can move ions in response to a voltage applied between the second electrodes 34 .

[0045] The CAP film 37 is provided between the lower surface of the solid electrolyte 36 and the upper surface of the first electrode 33, and is also provided between the lower surface of the solid electrolyte 36 and the upper surface of the third electrode 35. The CAP film 37 can prevent the precipitation of metals contained in the first electrode 33 and the third electrode 35.

[0046] The protective layer 38 covers the exposed area of ​​the surface of the second electrode 34 except for the contact area with the contact plug 322. The protective layer 38 is also provided between the insulating layer 321 provided in the lowest layer and the insulating layer 321 provided in the layer immediately above the lowest layer. The protective layer 38 protects the second electrode 34.

[0047] Here, referring to FIG. 7, the selective variable resistance element VR according to the first embodiment ＳＥＬ The operation of the system will be explained below.

[0048] FIG. 7 shows the selective variable resistance element VR ＳＥＬ 7 is a cross-sectional view for explaining the operation of the three-terminal atomic switch.

[0049] Selectable variable resistance element VR ＳＥＬIn the initial state, a negative voltage −V is applied to the second electrode 34, which is the source electrode, through the vertical signal line VSL. At this time, in the solid electrolyte 36 made of porous silicon oxide with a relatively large number of defects, metal ions (specifically, copper ions) that have a weak bond with oxygen ions migrate from the first electrode 33, which is the drain electrode, toward the second electrode 34. As a result, a bridge made of metal ions 39 is formed in the solid electrolyte 36.

[0050] Thereafter, when a selection signal sel set to a negative voltage −V is applied to the second electrode 34, which is a gate electrode, through the pixel driving line 10, the bridge is broken. ＳＥＬ As a result, the pixel signal generated in the charge accumulation region FD is not output to the vertical signal line VSL.

[0051] Thereafter, when a selection signal sel set to a positive voltage +V is applied to the second electrode 34 through the pixel driving line 10, the bridge is formed again in the solid electrolyte 36. As a result, the selective variable resistance element VR ＳＥＬ As a result, the pixel signal generated in the charge storage region FD is output to the vertical signal line VSL.

[0052] 8A to 8K, a method for manufacturing the photodetector 1 according to this embodiment will be described below. Note that the manufacturing process of the pixel 3 will be described in detail here.

[0053] 8A, an element isolation film 311 is formed on the surface of the semiconductor layer 31. As the element isolation film 311, for example, an insulating film such as a silicon oxide film is formed.

[0054] 8B , a photoelectric conversion element PD is formed inside the semiconductor layer 31. For example, by forming a p-type impurity region 312 and an n-type impurity region 313 inside the semiconductor layer 31, an anode region and a cathode region of the photoelectric conversion element PD can be formed, respectively.

[0055] Next, as shown in Fig. 8C, a transfer transistor TG, an amplification transistor AMP, a charge storage region FD, and a reset transistor RST (not shown in Fig. 8C) are formed on the surface of the semiconductor layer 31. These transistors and the charge storage region FD are formed by a commonly used method. Note that in the steps from Fig. 8C onwards, the illustration of part of the semiconductor layer 31 is omitted.

[0056] Next, as shown in FIG. 8D , an insulating layer 321 and a contact plug 322 are formed on the semiconductor layer 31. For example, an insulating film such as a silicon oxide film is formed as the insulating layer 321. Next, a hole is formed by etching in the formed insulating layer 321 at a location where the contact plug 322 is to be formed. Next, a metal such as copper (Cu) is poured into the hole. This completes the contact plug 322.

[0057] 8E , the FD wiring 324, the second electrode 34, and the first electrode 33 are formed as the lowest layer conductors on the insulating layer 321. The FD wiring 324, the second electrode 34, and the first electrode 33 are formed using a metal such as copper. At this time, the FD wiring 324 and the first electrode 33 are joined to the contact plug 322.

[0058] Next, as shown in FIG. 8F, the conductors in the bottom layer, that is, the FD wiring 324, the second electrode 34, and the first electrode 33, are covered with an insulating layer 321.

[0059] Next, as shown in FIG. 8G, holes 323 are formed by etching in the insulating layer 321 at locations where the solid electrolyte 36 is to be formed.

[0060] Next, as shown in FIG. 8H , a CAP film 37 is formed on the inner surface of the hole 323 and on the upper surface of the insulating layer 321. Then, a solid electrolyte 36 is laminated on the upper surface of the CAP film 37. Then, a second electrode 34 is laminated on the upper surface of the solid electrolyte 36. The solid electrolyte 36 is made of, for example, silicon oxide (SiO ２ The second electrode 34 is formed of an oxide such as ruthenium (Ru).

[0061] 8I, portions of the CAP film 37, the solid electrolyte 36, and the second electrode 34 are each removed by etching. In this embodiment, the etching is performed so as to leave the CAP film 37, the solid electrolyte 36, and the second electrode 34 in a size that overlaps the hole 323.

[0062] 8J, a protective layer 38 is formed to cover the exposed portions of the insulating layer 321, the CAP film 37, the solid electrolyte 36, and the second electrode 34. The protective layer 38 is formed using an insulating material such as silicon nitride (SiN). This prevents the selective variable resistance element VR ＳＥＬ is completed.

[0063] Finally, as shown in FIG. 8K , a conductive layer one layer above the bottom layer is formed. Here, first, an insulating layer 321 is formed on the protective layer 38. Next, holes are formed in the insulating layer 321 by etching at locations where the second electrodes 34 and contact plugs 322 that contact the second electrodes 34 will be formed. Next, a metal such as copper is filled into the holes to complete the contact plugs 322. Next, the vertical signal lines VSL and pixel drive lines 10 are formed on the insulating layer 321 using a metal such as copper. This completes the pixels 3.

[0064] Here, a pixel 3a to be compared with the pixel 3 according to the first embodiment will be described with reference to FIGS. 9 and 10. FIG.

[0065] Fig. 9 is a diagram showing an equivalent circuit of a pixel 3a according to a comparative example. Fig. 10 is a plan view showing the layout of a semiconductor layer 31 in the pixel 3a according to the comparative example. In Fig. 9 and Fig. 10, the same components as those in the pixel 3 according to the first embodiment are denoted by the same reference numerals, and redundant description will be omitted.

[0066] The pixel 3a shown in FIG. ＳＥＬ10 , the pixel 31 differs from the pixel 3 of the first embodiment in that it includes a select transistor SEL instead of the select transistor SEL. The select transistor SEL is configured as an n-channel conductivity type MOS transistor, and is arranged in a semiconductor layer 31 as shown in FIG. 10 . In addition to the select transistor SEL, a transfer transistor TG, a reset transistor RST, and an amplification transistor AMP are also arranged in this semiconductor layer 31.

[0067] Therefore, in order to reduce the size of the pixel 3a, it is necessary to reduce the area of ​​the transistor disposed in the semiconductor layer 31. In this case, there is a concern that the electrical characteristics may deteriorate, such as the deterioration of RTS noise and the increase in the variation in the threshold voltage Vth.

[0068] In contrast, the pixel 3 according to this embodiment includes a selective variable resistance element VR that switches between a conductive state and a non-conductive state in response to an applied voltage. ＳＥＬ is provided in place of the selection transistor SEL that switches whether or not a pixel signal is output to the vertical signal line VSL. ＳＥＬ are formed in a stacked body 32 different from the semiconductor layer 31 in which the photoelectric conversion element PD and other pixel transistors are provided. Therefore, in the semiconductor layer 31 according to this embodiment, a space remains for the area in which the selection transistor SEL is disposed.

[0069] Therefore, in this embodiment, when reducing the size of the pixel 3, the above-mentioned space can be effectively utilized to limit the reduction in the transistor area. As a result, deterioration in electrical characteristics such as deterioration of RTS noise and increased variation in threshold voltage Vth can also be suppressed. Therefore, according to this embodiment, it is possible to miniaturize pixels while suppressing deterioration in the electrical characteristics of the pixel transistors.

[0070] Second Embodiment Fig. 11 is a diagram showing an equivalent circuit of a pixel according to a second embodiment. Fig. 12 is a cross-sectional view showing the structure of a main part of a pixel according to the second embodiment. In Fig. 11 and Fig. 12, the same components as those of the pixel 3 according to the first embodiment are denoted by the same reference numerals, and redundant explanations will be omitted.

[0071] As shown in FIG. 11, the pixel 3b according to this embodiment includes a reset variable resistance element VR ＲＳＴ is provided in place of the reset transistor RST, and the selection transistor SEL is provided in place of the selection variable resistance element VR ＳＥＬ It is provided instead of

[0072] Reset variable resistance element VR ＲＳＴ As shown in FIG. 12, the reset variable resistance element VR is disposed in the bottom layer of the laminated body 32. ＲＳＴ is the selective variable resistance element VR described in the first embodiment. ＳＥＬ It is composed of a three-terminal atomic switch, similar to the one in the previous section.

[0073] Reset variable resistance element VR ＲＳＴ In the pixel 32, the first electrode 33 functioning as a source electrode is made of a conductor integrated with the FD wiring 324. A reset signal rst is input to the second electrode 34 functioning as a gate electrode through the pixel drive line 10. ＲＳＴ is turned on or off depending on the potential of the reset signal rst.

[0074] When the potential of the reset signal rst is a positive voltage +V, a bridge made of metal ions is formed in the solid electrolyte 36 from the first electrode 33 side to the second electrode 34 side. ＲＳＴ becomes conductive, that is, turned on. As a result, the charge accumulated in the charge accumulation region FD is released, and the potential of the charge accumulation region FD is reset to the reference potential.

[0075] On the other hand, when the potential of the reset signal rst is a negative voltage −V, the above-mentioned bridge is not formed in the solid electrolyte 36. Therefore, the reset variable resistance element VR ＲＳＴ In this case, the potential of the charge storage region FD is not reset to the reference potential.

[0076] The pixel 3b according to this embodiment includes a reset variable resistance element VR that switches whether or not to reset the potential of the charge storage region FD depending on the applied voltage. ＲＳＴis provided in place of the reset transistor RST. ＲＳＴ is formed in the laminated body 32 as shown in FIG. ＲＳＴ is not formed in the semiconductor layer 31. Therefore, in the semiconductor layer 31 according to this embodiment, a space remains for the area where the reset transistor RST is to be disposed.

[0077] Therefore, in this embodiment, when reducing the size of pixel 3b, the above-mentioned space can be effectively utilized to limit the reduction in transistor area. As a result, deterioration in electrical characteristics such as deterioration of RTS noise and increased variation in threshold voltage Vth can also be suppressed. Therefore, according to this embodiment, it is possible to miniaturize pixels while suppressing deterioration in the electrical characteristics of the pixel transistors.

[0078] (Third embodiment) Fig. 13 is a diagram showing an equivalent circuit of a pixel according to a third embodiment. Fig. 14 is a cross-sectional view showing the structure of a main part of a pixel according to the third embodiment. In Fig. 13 and Fig. 14, the same components as those of the pixel 3 according to the first embodiment described above are denoted by the same reference numerals, and redundant explanations will be omitted.

[0079] As shown in FIG. 13, the pixel 3c according to this embodiment includes a conversion efficiency switching variable resistance element VR ＦＤＧ The selection transistor SEL is newly provided, and the selection variable resistance element VR ＳＥＬ It is provided instead of

[0080] Conversion efficiency switching variable resistance element VR ＦＤＧ As shown in FIG. 14, the conversion efficiency switching variable resistance element VR is disposed in the insulating layer 321. ＦＤＧ is the selective variable resistance element VR described in the first embodiment. ＳＥＬ It is composed of a three-terminal atomic switch, similar to the one in the previous section.

[0081] Conversion efficiency switching variable resistance element VR ＦＤＧIn the pixel 32, the first electrode 33 functioning as a source electrode is made of a conductor integrated with the FD wiring 324a. The drain electrode is made of a conductor integrated with the FD wiring 324b. A conversion efficiency switching signal FDG is input to the second electrode 34 functioning as a gate electrode through the pixel drive line 10. The conversion efficiency switching variable resistance element VR ＦＤＧ The conversion efficiency switching variable resistance element VR is turned on or off depending on the potential of the conversion efficiency switching signal FDG. ＦＤＧ The change in state of the charge storage region FD changes the conversion efficiency.

[0082] When the potential of the conversion efficiency switching signal FDG is a positive voltage +V, a bridge made of metal ions 39 is formed in the solid electrolyte 36 from the first electrode 33 side to the second electrode 34 side. ＦＤＧ In this case, the capacitance element C is electrically connected to the charge storage region FD via the FD wiring 324a and the FD wiring 324b, and therefore the conversion efficiency of the charge storage region FD decreases.

[0083] Conversely, when the potential of the conversion efficiency switching signal FDG is a negative voltage −V, the above-mentioned bridge is not formed in the solid electrolyte 36. Therefore, the conversion efficiency switching variable resistance element VR ＦＤＧ In this case, the capacitance element C and the charge storage region FD are not conductive, and the conversion efficiency of the charge storage region FD returns to the initial state and becomes high.

[0084] In the conventional pixel, the conversion efficiency switching variable resistance element VR ＦＤＧ A conversion efficiency switching transistor having the same function as the conversion efficiency switching variable resistance element VR is configured as a MOS transistor and is disposed in the semiconductor layer 31. On the other hand, in the pixel 3c according to this embodiment, ＦＤＧ is formed in the laminated body 32 as shown in FIG. ＲＳＴ is not formed in the semiconductor layer 31. Therefore, in the semiconductor layer 31 according to this embodiment, a space remains for the area where the conversion efficiency switching transistor is to be disposed.

[0085] Therefore, in this embodiment, when reducing the size of the pixel 3c, the above-mentioned space can be effectively utilized to limit the reduction in the transistor area. As a result, deterioration in electrical characteristics such as deterioration of RTS noise and increased variation in threshold voltage Vth can also be suppressed. Therefore, according to this embodiment, it is possible to miniaturize pixels while suppressing deterioration in the electrical characteristics of the pixel transistors.

[0086] (Fourth embodiment) Fig. 15 is a diagram showing an equivalent circuit of a pixel according to a fourth embodiment. Fig. 16 is a cross-sectional view showing the structure of a main part of a pixel according to the fourth embodiment. In Fig. 15 and Fig. 16, the same components as those of the pixel 3 according to the first embodiment are denoted by the same reference numerals, and redundant explanations will be omitted.

[0087] In the pixel 3 according to the first embodiment described above, the selective variable resistance element VR ＳＥＬ In contrast to this, in the pixel 3d according to this embodiment, the selective variable resistance element VR ＳＥＬ The two-terminal atomic switch is configured as a two-terminal atomic switch. In this two-terminal atomic switch, a solid electrolyte 36 is provided between a first electrode 33 and a second electrode 34. In other words, the two-terminal atomic switch does not have a gate electrode. Here, referring to FIG. 17, the selective variable resistance element VR according to the fourth embodiment will be described. ＳＥＬ The operation of the system will be explained below.

[0088] FIG. 17 shows a selective variable resistance element VR according to the fourth embodiment. ＳＥＬ 17 is a cross-sectional view for explaining the operation of the two-terminal atomic switch.

[0089] When a negative voltage −V is applied to the second electrode 34 through the vertical signal line VSL, metal ions (specifically, copper ions) that have a weak bond with oxygen ions move from the first electrode 33 side to the second electrode 34 side in the solid electrolyte 36. As a result, a bridge made of metal ions 39 is formed in the solid electrolyte 36. This causes the selective variable resistance element VR ＳＥＬ is in a conducting state, that is, an ON state.

[0090] Conversely, when a positive voltage +V is applied to the second electrode 34 through the vertical signal line VSL, the bridge is broken. ＳＥＬ is in a non-conducting state, i.e., an OFF state.

[0091] As described above, the two-terminal atomic switch does not have a gate electrode that controls the on and off states. Therefore, in this embodiment, the selective variable resistance element VR ＳＥＬ This operation timing will be explained below.

[0092] FIG. 18 shows a selective variable resistance element VR according to the fourth embodiment. ＳＥＬ 18 is a timing chart showing an example of the operation timing of the vertical drive circuit 4. Fig. 18 shows waveforms of the control signal SW, the power supply voltage Vdd, and the reset signal rst. The waveforms of the reset signal rst are shown for a selected row that the vertical drive circuit 4 selects as a pixel row from which a pixel signal is to be output, and for a non-selected row that the vertical drive circuit 4 selects as a pixel row not from which a pixel signal is to be output.

[0093] FIG. 19A is a diagram illustrating the operation of pixel 3d belonging to a selected row at timing t1 shown in FIG. 18. FIG. 19B is a diagram illustrating the operation of pixel 3d belonging to a non-selected row at timing t1 shown in FIG. 18. FIG. 20A is a diagram illustrating the operation of pixel 3d belonging to a selected row at timing t2 shown in FIG. 18. FIG. 20B is a diagram illustrating the operation of pixel 3d belonging to a non-selected row at timing t2 shown in FIG. 18. FIG. 21A is a diagram illustrating the operation of pixel 3d belonging to a selected row at timing t3 shown in FIG. 18. FIG. 21B is a diagram illustrating the operation of pixel 3d belonging to a non-selected row at timing t3 shown in FIG. 18. FIGS. 19A to 21B also show the distribution of potential at each timing.

[0094] 19A to 21B, a pixel 3d according to this embodiment is provided with a control transistor 40 configured as an n-channel nMOS transistor. The control transistor 40 temporarily fixes the potential of the vertical signal line VSL to an intermediate potential between the low level (Lo) and high level (Hi) of the power supply voltage Vdd.

[0095] The control transistor 40 is turned on and off according to the level of a control signal SW shown in FIG. 18. The control signal SW is input to the gate of the control transistor 40 from the vertical drive circuit 4 through the pixel drive line 10. When the control signal SW is at a high level, the control transistor 40 is turned on. As a result, the voltage of the vertical signal line VSL becomes the intermediate voltage Vddmid. Conversely, when the control signal SW is at a low level, the control transistor 40 is turned off. As a result, the voltage of the vertical signal line VSL becomes the high-level or low-level power supply voltage Vdd.

[0096] First, at timing t1 shown in FIG. 18, the control signal SW is at a low level, so the control transistor 40 is in an off state. Also, the power supply voltage Vdd is stepped down to a low level. Furthermore, in both the selected row and the non-selected row, the reset signal rst is at a high level, so the reset transistor RST is in an on state. At this time, the selective variable resistance element VR of the pixel 3d belonging to the selected row ＳＥＬ is in the OFF state, whereas the selective variable resistance element VR ＳＥＬ is in the ON state (see FIGS. 19A and 19B).

[0097] Next, at timing t2 shown in FIG. 18, the control signal SW is at a high level, so the control transistor 40 is in an on state. Also, the power supply voltage Vdd is boosted to a high level. Furthermore, the reset signal rst is maintained at a high level in the selected row, while the reset signal rst in the non-selected rows changes from a high level to a low level. At this time, the selective variable resistance element VR of the pixel 3d belonging to the selected row ＳＥＬ is in the ON state, whereas the selective variable resistance element VR ＳＥＬ is in the off state (see FIGS. 20A and 20B).

[0098] Next, at timing t3 shown in FIG. 18, the control signal SW is at a low level, so the control transistor 40 is in an off state. As a result, the source follower of the selected row and the vertical signal line VSL are at the same potential. Also, the power supply voltage Vdd is maintained at the intermediate voltage Vddmid. Furthermore, since the reset signal rst is at a high level in both the selected row and the non-selected row, a positive voltage is applied to the second electrode 34 in the non-selected row, so the selective variable resistance element VR of the pixel 3d belonging to the non-selected row ＳＥＬ is in the off state (see FIG. 21B).

[0099] On the other hand, in the selected row, a negative voltage is applied to the second electrode 34, and therefore the selective variable resistance element VR ＳＥＬ is in the ON state (see FIG. 21A).

[0100] According to the present embodiment described above, similarly to the first embodiment, the selective variable resistance element VR ＳＥＬ are disposed in the stacked body 32 rather than in the semiconductor layer 31. Therefore, in the semiconductor layer 31 according to this embodiment, a space remains for the area where the select transistor SEL is disposed.

[0101] Therefore, in this embodiment, when reducing the size of pixel 3d, the above-mentioned space can be effectively utilized to minimize the reduction in transistor area. As a result, deterioration in electrical characteristics such as deterioration of RTS noise and increased variation in threshold voltage Vth can also be suppressed. Therefore, according to this embodiment, it is possible to miniaturize pixels while suppressing deterioration in the electrical characteristics of the pixel transistors.

[0102] Furthermore, in this embodiment, the selective variable resistance element VR ＳＥＬ However, because it is configured as a two-pole terminal atomic switch, the third electrode 35 (gate electrode) is not required. Therefore, the number of electrodes is reduced compared to a three-pole terminal atomic switch, and robustness against misalignment between each electrode and the solid electrolyte 36 is increased. In addition, it is possible to eliminate current leakage from the third electrode 35.

[0103] Fifth Embodiment FIG. 22 is a block diagram showing an example of the configuration of an electronic device according to a fifth embodiment.

[0104] 22 is a video camera, a digital still camera, or the like. The electronic device 1000 includes a lens group 1001, a solid-state image sensor 1002, a DSP circuit 1003, a frame memory 1004, a display unit 1005, a recording unit 1006, an operation unit 1007, and a power supply unit 1008. The DSP circuit 1003, the frame memory 1004, the display unit 1005, the recording unit 1006, the operation unit 1007, and the power supply unit 1008 are interconnected via a bus line 1009.

[0105] The lens group 1001 takes in incident light (image light) from a subject and forms an image on the imaging surface of the solid-state imaging device 1002 .

[0106] The solid-state imaging device 1002 is any one of the photodetector devices according to the above-described embodiments. The solid-state imaging device 1002 converts the amount of incident light that is imaged on the imaging surface by the lens group 1001 into an electrical signal on a pixel-by-pixel basis and supplies the pixel signal to the DSP circuit 1003.

[0107] The DSP circuit 1003 performs predetermined image processing on the pixel signals supplied from the solid-state image sensor 1002, and supplies the processed image signals to a frame memory 1004 on a frame-by-frame basis for temporary storage.

[0108] The display unit 1005 is formed of a panel display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and displays an image based on pixel signals in frame units that are temporarily stored in the frame memory 1004 .

[0109] The recording unit 1006 is made up of a DVD (Digital Versatile Disk), a flash memory, or the like, and reads out and records the pixel signals in units of frames that are temporarily stored in the frame memory 1004 .

[0110] An operation unit 1007, under user operation, issues operation commands for various functions of the electronic device 1000. A power supply unit 1008 supplies power to the DSP circuit 1003, frame memory 1004, display unit 1005, recording unit 1006, and operation unit 1007.

[0111] The electronic device to which this technology can be applied may be any device that uses a photodetector in the image capture section (photoelectric conversion section), and in addition to the electronic device 1000, includes a portable terminal device with an imaging function and a copier that uses a photodetector in the image reading section.

[0112] The electronic device 1000 according to the present embodiment described above is equipped with any one of the photodetector devices according to the above-described embodiments as the solid-state imaging element 1002. This allows pixels to be miniaturized while suppressing degradation of the electrical characteristics of the pixel transistors. This allows the electronic device 1000 to be miniaturized while maintaining its performance.

[0113] <Application to a Mobile Body> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0114] FIG. 27 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0115] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 27, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0116] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0117] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0118] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0119] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0120] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0121] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0122] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0123] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0124] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying the passengers of the vehicle or the outside of the vehicle of information. In the example of Fig. 27, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0125] FIG. 28 is a diagram showing an example of the installation position of the imaging unit 12031.

[0126] In FIG. 28, a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0127] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by the imaging units 12101 and 12105 are mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0128] 28 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0129] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0130] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0131] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0132] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0133] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the image capture unit 12031 of the above-described configuration. Specifically, the image capture unit 12031 can be equipped with any of the photodetector devices according to the above-described embodiments. By applying the technology according to the present disclosure to the image capture unit 12031, the chip size can be reduced. As a result, the vehicle 12100 can be made smaller.

[0134] Note that the above-described embodiments are examples for realizing the present technology, and the matters in the embodiments correspond to the matters specifying the invention in the claims. Similarly, the matters specifying the invention in the claims correspond to the matters in the embodiments of the present technology having the same names. However, the present technology is not limited to the embodiments, and can be realized by applying various modifications to the embodiments within the scope of the gist of the present technology.

[0135] The present technology can be configured as follows:

[0136] (1) A light detection device comprising: a photoelectric conversion element that photoelectrically converts incident light; and a plurality of pixel transistors electrically connected to the photoelectric conversion element, wherein one of the plurality of pixel transistors is a variable resistance element that switches between a conductive state and a non-conductive state in response to an applied voltage, and the variable resistance element is disposed in a layer different from a semiconductor layer in which the photoelectric conversion element is disposed.

[0137] (2) The photodetector according to (1), wherein the variable resistance element switches whether or not to output a pixel signal generated by photoelectric conversion of the photoelectric conversion element, depending on the applied voltage.

[0138] (3) The photodetector according to (1), further comprising a charge accumulation region that generates a pixel signal based on the amount of charge photoelectrically converted by the photoelectric conversion element, wherein the variable resistance element switches whether or not to reset the potential of the charge accumulation region depending on the applied voltage.

[0139] (4) The photodetector according to (1), further comprising a charge accumulation region that generates a pixel signal based on the amount of charge photoelectrically converted by the photoelectric conversion element, wherein the variable resistance element changes the conversion efficiency of the charge accumulation region in response to the applied voltage.

[0140] (5) The photodetector according to any one of (1) to (4), wherein the variable resistance element has a solid electrolyte, a first electrode disposed below the solid electrolyte, a second electrode disposed above the solid electrolyte, and a third electrode disposed below the solid electrolyte.

[0141] (6) The photodetector according to (1) or (2), wherein the variable resistance element has a solid electrolyte, a first electrode disposed below the solid electrolyte, and a second electrode disposed above the solid electrolyte.

[0142] (7) The photodetector according to (6), further comprising a control transistor that controls the voltage applied to the second electrode.

[0143] (8) The photodetector according to (5) or (6), wherein the solid electrolyte is an oxide.

[0144] (9) The photodetector according to (5) or (6), wherein the second electrode includes an inert metal.

[0145] (10) The photodetector according to (5) or (6), further comprising: a protective layer covering the second electrode; and a CAP film provided between the first electrode and the solid electrolyte.

[0146] (11) The photodetector according to any one of (1) to (10), further comprising an insulating layer provided on the semiconductor layer, wherein the variable resistance element is disposed in the insulating layer.

[0147] (12) An electronic device including a photodetector having a photoelectric conversion element that photoelectrically converts incident light and a plurality of pixel transistors electrically connected to the photoelectric conversion element, wherein one of the plurality of pixel transistors is a variable resistance element that switches between a conductive state and a non-conductive state depending on an applied voltage, and the variable resistance element is arranged in a layer different from a semiconductor layer in which the photoelectric conversion element is arranged.

[0148] 1: Photodetector 31: Semiconductor layer 32: Laminate 33: First electrode 34: Second electrode 35: Third electrode 36: Solid electrolyte 37: CAP film 38: Protective layer 40: Control transistor 1000: Electronic device FD: Charge storage region PD: Photoelectric conversion element VR ＳＥＬ : Selectable variable resistance element VR ＲＳＴ : Reset variable resistance element VR ＦＤＧ : Conversion efficiency switching variable resistance element

Claims

1. A light detection device comprising: a photoelectric conversion element which converts incident light into an electric signal; and a plurality of pixel transistors electrically connected to the photoelectric conversion element, one of the plurality of pixel transistors being a variable resistance element which switches between a conductive state and a non-conductive state in response to an applied voltage, the variable resistance element being disposed in a semiconductor layer different from the semiconductor layer in which the photoelectric conversion element is disposed.

2. The photodetection device according to claim 1, wherein the variable resistance element switches whether or not to output a pixel signal generated by photoelectric conversion of the photoelectric conversion element, depending on the applied voltage.

3. The photodetection device according to claim 1, further comprising a charge accumulation region that generates a pixel signal based on the amount of charge photoelectrically converted by the photoelectric conversion element, wherein the variable resistance element switches between resetting and not resetting the potential of the charge accumulation region depending on the applied voltage.

4. The photodetection device according to claim 1, further comprising a charge accumulation region that generates a pixel signal based on the amount of charge photoelectrically converted by the photoelectric conversion element, and the variable resistance element changes the conversion efficiency of the charge accumulation region in response to the applied voltage.

5. The optical detection device of claim 1, wherein the variable resistance element has a solid electrolyte, a first electrode disposed below the solid electrolyte, a second electrode disposed on the solid electrolyte, and a third electrode disposed below the solid electrolyte.

6. The optical detection device according to claim 1, wherein the variable resistance element comprises: a solid electrolyte; a first electrode disposed below the solid electrolyte; and a second electrode disposed above the solid electrolyte.

7. The photodetection device according to claim 6, further comprising a control transistor for controlling the voltage applied to said second electrode.

8. The optical detection device of claim 5, wherein the solid electrolyte is an oxide.

9. The optical detection device of claim 5, wherein said second electrode comprises an inert metal.

10. The optical detection device according to claim 5, further comprising: a protective layer covering the second electrode; and a CAP film provided between the first electrode and the solid electrolyte.

11. The photodetector device according to claim 1, further comprising an insulating layer provided on said semiconductor layer, said variable resistance element being disposed in said insulating layer.

12. An electronic device equipped with a photodetector having a photoelectric conversion element that photoelectrically converts incident light, and a plurality of pixel transistors electrically connected to the photoelectric conversion element, wherein one of the plurality of pixel transistors is a variable resistance element that switches between a conductive state and a non-conductive state depending on an applied voltage, and the variable resistance element is disposed in a layer different from a semiconductor layer in which the photoelectric conversion element is disposed.

Images