Semiconductor device
The semiconductor device design addresses the challenge of mounting space inefficiency by using a configuration with separated islands and elements covered by a sealing resin, resulting in reduced mounting space and improved packaging efficiency.
Patent Information
- Application Number
- PCT/JP2024/042580
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-15
- Filing Date
- 2024-12-02
- Publication Date
- 2025-06-19
AI Technical Summary
Existing semiconductor devices require significant mounting space when multiple devices are mounted on a substrate, which can lead to inefficiencies in packaging and increased costs.
The semiconductor device design includes a first lead with a first island and a second lead with a second island, where a first semiconductor element is mounted on the first island and a second semiconductor element is mounted on the second island, all covered by a sealing resin. This configuration allows for reduced mounting space by separating the islands and elements in the z-direction.
This design effectively reduces the mounting space required for semiconductor devices, allowing for more efficient packaging and potentially lower production costs by enabling closer device placement on a substrate.
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Figure JP2024042580_19062025_PF_FP_ABST
Abstract
Description
Semiconductor Devices
[0001] The present disclosure relates to semiconductor devices.
[0002] Patent Document 1 discloses an example of a conventional semiconductor device. The semiconductor device disclosed in this document includes a first lead, a second lead, a semiconductor element, and a sealing resin. The semiconductor element is mounted on the first lead. The semiconductor element and the second lead are connected by a wire. The sealing resin covers the semiconductor element.
[0003] JP 2023-138181 A
[0004] [Summary] When mounting a plurality of semiconductor devices on a mounting board, a mounting space is required that can accommodate the plurality of semiconductor devices in a plan view.
[0005] An object of the present disclosure is to provide an improved semiconductor device compared to conventional semiconductor devices. In particular, in view of the above-mentioned circumstances, an object of the present disclosure is to provide a semiconductor device that can reduce the mounting space.
[0006] A semiconductor device provided by a first aspect of the present disclosure includes a first lead having a first island, a second lead having a second island, a first semiconductor element mounted on the first island, a second semiconductor element mounted on the second island, and a sealing resin. The sealing resin covers at least a portion of the first lead and the second lead, the first semiconductor element, and the second semiconductor element. The first island is located on a first side in a first direction relative to the second island. The first semiconductor element is located on a second side in the first direction relative to the first island. The second semiconductor element is located on the first side in the first direction relative to the second island.
[0007] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings.
[0008] FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a front view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 3 is a partial plan view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 4 is a partial plan view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 5 is a cross-sectional view taken along line V-V in FIG. 3. FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 3. FIG. 7 is a partially enlarged cross-sectional view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 8 is a partially enlarged cross-sectional view showing a first modified example of the semiconductor device according to the first embodiment of the present disclosure. FIG. 9 is a partial plan view showing a semiconductor device according to a second embodiment of the present disclosure. FIG. 10 is a cross-sectional view taken along line X-X in FIG. 9. FIG. 11 is a partial plan view showing a semiconductor device according to a third embodiment of the present disclosure. FIG. 12 is a partial plan view showing a semiconductor device according to a third embodiment of the present disclosure. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 11. FIG. 14 is a cross-sectional view taken along line XIV-XIV in FIG. 11. 15 is a cross-sectional view taken along line XV-XV in FIG. 11 . FIG. 16 is a partial plan view showing a first modified example of the semiconductor device according to the third embodiment of the present disclosure. FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. 16 . FIG. 18 is a partial plan view showing a semiconductor device according to the fourth embodiment of the present disclosure. FIG. 19 is a partial plan view showing a semiconductor device according to the fourth embodiment of the present disclosure. FIG. 20 is a cross-sectional view taken along line XX-XX in FIG. 18 . FIG. 21 is a cross-sectional view taken along line XXI-XXI in FIG. 18 . FIG. 22 is a cross-sectional view showing a semiconductor device according to a fifth embodiment of the present disclosure. FIG. 23 is a cross-sectional view showing a semiconductor device according to the fifth embodiment of the present disclosure.
[0009] DETAILED DESCRIPTION Preferred embodiments of the present disclosure will now be described in detail with reference to the drawings.
[0010] The terms "first," "second," "third," etc. in this disclosure are used for identification purposes only and are not intended to impose any ranking on their objects.
[0011] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on a certain object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on a certain object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on a certain object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on a certain object B" includes "a certain object A is located on a certain object B with a certain object A in contact with the certain object B" and "a certain object A is located on a certain object B with another object interposed between the certain object A and the certain object B." Unless otherwise specified, the phrase "an object A overlaps an object B when viewed in a certain direction" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B." In the present disclosure, "a surface A faces in (one side or the other side of) direction B" is not limited to the case where the angle of surface A with respect to direction B is 90°, but also includes the case where surface A is tilted with respect to direction B.
[0012] 1 to 7 show a semiconductor device according to a first embodiment of the present disclosure. The semiconductor device A1 of this embodiment includes a first lead 1, a second lead 2, a first semiconductor element 7, a second semiconductor element 8, and a sealing resin 9. The semiconductor device A1 may also include one or more third leads 3 and one or more fourth leads 4. The specific functions and uses of the semiconductor device A1 are not limited in any way.
[0013] In these figures, three mutually orthogonal directions (x direction, y direction, and z direction) are referred to as appropriate. As an example, the z direction may correspond to the first direction in this disclosure. The x direction may correspond to the second direction in this disclosure. The y direction is orthogonal to the z direction and the x direction.
[0014] The sealing resin 9 covers a portion of each of the first lead 1, the second lead 2, the one or more third leads 3, and the one or more fourth leads 4, as well as the first semiconductor element 7 and the second semiconductor element 8. There are no limitations on the material of the sealing resin 9, and it may be, for example, an epoxy resin.
[0015] The sealing resin 9 may have a first resin surface 91 , a second resin surface 92 , a third resin surface 93 , a fourth resin surface 94 , a fifth resin surface 95 , and a sixth resin surface 96 .
[0016] The resin first surface 91 is a surface facing the z1 side in the z direction. The resin second surface 92 is a surface facing the z2 side in the z direction. The resin third surface 93 is a surface facing the x1 side in the x direction. The resin fourth surface 94 is a surface facing the x2 side in the x direction. The resin fifth surface 95 is a surface facing the y1 side in the y direction. The resin sixth surface 96 is a surface facing the y2 side in the y direction. Each of the resin first surface 91, the resin second surface 92, the resin third surface 93, the resin fourth surface 94, the resin fifth surface 95, and the resin sixth surface 96 may be a flat surface, or may be an inclined surface, a curved surface, or the like.
[0017] The first lead 1 has a first island 11. The first lead 1 may have one or more first support portions 12 and a first extending portion 13. The first lead 1 may contain a metal such as Cu (copper), Ni (nickel), Fe (iron), or an alloy thereof. A metal layer containing Ag (silver) or the like may be formed in an appropriate position on the first lead 1 by plating or the like. The thickness of the first lead 1 is not particularly limited and is, for example, 400 μm or more and 600 μm or less.
[0018] The first island 11 is a portion whose thickness direction is the z direction and which extends along the x direction and y direction. The first island 11 has a first main surface 111 and a first back surface 112. The first main surface 111 faces the z2 side in the z direction and is flat in the illustrated example. The first back surface 112 faces the z1 side in the z direction and is flat in the illustrated example. In the illustrated example, the first back surface 112 is exposed from the resin first surface 91. The first back surface 112 may be flush with the resin first surface 91.
[0019] One or more first support portions 12 are connected to the first island 11. There is no limitation on the number of one or more first support portions 12, and in the illustrated example, there are two. The two first support portions 12 extend from the first island 11 to the y1 side and the y2 side in the y direction. The first support portion 12 has a first opposing portion 121. The first opposing portion 121 is located on the z2 side of the first island 11 in the z direction.
[0020] The first extension portion 13 is connected to the first island 11. In the illustrated example, the first extension portion 13 extends from the first island 11 to the x2 side in the x direction.
[0021] The second lead 2 has a first island 11. The second lead 2 may have one or more first support portions 12 and a first extending portion 13. The second lead 2 may contain a metal such as Cu (copper), Ni (nickel), Fe (iron), or an alloy thereof. A metal layer containing Ag (silver) or the like may be formed in an appropriate position on the second lead 2 by plating or the like. The thickness of the second lead 2 is not particularly limited and is, for example, 400 μm or more and 600 μm or less.
[0022] The second island 21 is a portion whose thickness direction is the z direction and which extends along the x direction and y direction. The second island 21 has a second main surface 211 and a second back surface 212. The second main surface 211 faces the z1 side in the z direction and is flat in the illustrated example. The second main surface 211 faces the first main surface 111. The second back surface 212 faces the z2 side in the z direction and is flat in the illustrated example. In the illustrated example, the second back surface 212 is exposed from the resin second surface 92. The second back surface 212 may be flush with the resin second surface 92.
[0023] The first island 11 is located on the z1 side in the z direction with respect to the second island 21. In other words, the second island 21 is located on the z2 side in the z direction with respect to the first island 11. The first island 11 and the second island 21 at least partially overlap with each other when viewed in the z direction.
[0024] One or more second support portions 22 are connected to the second island 21. There is no limitation on the number of the one or more second support portions 22, and in the illustrated example, there are two. The two second support portions 22 extend from the second island 21 to the y1 side and the y2 side in the y direction. The second support portion 22 has a second opposing portion 221. The second opposing portion 221 is located on the z1 side of the second island 21 in the z direction.
[0025] As shown in Fig. 6 , the first opposing portion 121 and the second opposing portion 221 are opposed to each other in the z direction. The first opposing portion 121 and the second opposing portion 221 may be spaced apart or in contact with each other. A bonding material may be interposed between the first opposing portion 121 and the second opposing portion 221. In the example shown in Fig. 7 , the first opposing portion 121 and the second opposing portion 221 are in direct contact with each other.
[0026] The second extending portion 23 is connected to the second island 21. In the illustrated example, the second extending portion 23 extends from the second island 21 to the x1 side in the x direction.
[0027] The one or more third leads 3 have a first island 11. The one or more third leads 3 may have one or more first support portions 12 and a first extending portion 13. The one or more third leads 3 may contain a metal such as Cu (copper), Ni (nickel), Fe (iron), or an alloy thereof. A metal layer containing Ag (silver) or the like may be formed in an appropriate position on the one or more third leads 3 by plating or the like. The thickness of the third leads 3 is not particularly limited and is, for example, 400 μm or more and 600 μm or less.
[0028] The number of third leads 3, which is one or more, is not limited in any way, and in the illustrated example, there are three. The three third leads 3 are located on the x1 side in the x direction with respect to the first island 11. The third lead 3 has a pad portion 31 and a third terminal portion 32. The pad portion 31 is covered with the sealing resin 9 and is used for conductive connection with the first semiconductor element 7. The pad portion 31 is located on the z2 side of the first island 11 in the z direction. The third terminal portion 32 protrudes from the resin third surface 93 toward the x1 side in the x direction. The tip portion of the third terminal portion 32 is in the same position as the first island 11 in the z direction.
[0029] The one or more fourth leads 4 have a first island 11. The one or more fourth leads 4 may have one or more first support portions 12 and a first extending portion 13. The one or more fourth leads 4 may include a metal such as Cu (copper), Ni (nickel), Fe (iron), or an alloy thereof. A metal layer including Ag (silver) or the like may be formed by plating or the like at appropriate positions on the one or more fourth leads 4. The thickness of the fourth leads 4 is not particularly limited and is, for example, 400 μm or more and 600 μm or less.
[0030] The number of the one or more fourth leads 4 is not limited in any way, and in the illustrated example, there are three. The three fourth leads 4 are located on the x2 side in the x direction with respect to the second island 21. The fourth lead 4 has a pad portion 41 and a terminal portion 42. The pad portion 41 is covered with the sealing resin 9 and is used for conductive connection with the second semiconductor element 8. The pad portion 41 is located on the z1 side with respect to the second island 21 in the z direction. The terminal portion 42 protrudes from the fourth resin surface 94 toward the x2 side in the x direction. The tip portion of the terminal portion 42 is located in the same position as the first island 11 and the third terminal portion 32 in the z direction.
[0031] The first semiconductor element 7 is mounted on the first main surface 111 of the first island 11. The first semiconductor element 7 is located on the z2 side in the z direction with respect to the first island 11. The first semiconductor element 7 is located on the z1 side in the z direction with respect to the second island 21. The type and function of the first semiconductor element 7 are not limited in any way. In the illustrated example, the first semiconductor element 7 is configured as, for example, an LDO (Low Dropout) regulator.
[0032] The first semiconductor element 7 may have a first body portion 71 and a plurality of first electrodes 72. The first body portion 71 includes a semiconductor and has, for example, a functional portion formed therein. The plurality of first electrodes 72 are located on the first body portion 71. Each of the plurality of first electrodes 72 is individually connected to each of the pad portions 31 of the three third leads 3 by a plurality of first wires 79. The plurality of first wires 79 extend from the first semiconductor element 7 to the x1 side in the x direction.
[0033] The second semiconductor element 8 is mounted on the second back surface 212 of the second island 21. The second semiconductor element 8 is located on the z1 side in the z direction with respect to the second island 21. The second semiconductor element 8 is located on the z2 side in the z direction with respect to the first island 11. In the example shown, the entire second semiconductor element 8 is located on the z2 side in the z direction with respect to the first semiconductor element 7. In the example shown, at least a portion of the first semiconductor element 7 and at least a portion of the second semiconductor element 8 overlap when viewed in the z direction. The type and function of the second semiconductor element 8 are not limited in any way. In the example shown, the second semiconductor element 8 is configured as, for example, an operational amplifier.
[0034] The second semiconductor element 8 may have a second body portion 81 and a plurality of second electrodes 82. The second body portion 81 includes a semiconductor and has, for example, a functional portion formed therein. The plurality of second electrodes 82 are located on the second body portion 81. Each of the plurality of second electrodes 82 is individually connected to each of the pad portions 41 of the three fourth leads 4 by a plurality of second wires 89. The plurality of second wires 89 extend from the second semiconductor element 8 to the x2 side in the x direction.
[0035] The manufacturing method of the semiconductor device A1 is not limited in any way. According to one example of the manufacturing method of the semiconductor device A1, a lead frame including a first lead 1 and one or more third leads 3 is prepared. A first semiconductor element 7 is mounted on the lead frame, and a plurality of first wires 79 are connected to it. Another lead frame including a second lead 2 and one or more fourth leads 4 is prepared. A second semiconductor element 8 is mounted on the other lead frame, and a plurality of second wires 89 are connected to it. Next, these two lead frames are overlapped on top of each other. At this time, these two lead frames are overlapped so that the first opposing portion 121 and the second opposing portion 221 abut against each other. Next, a sealing resin 9 is formed, and the two lead frames are appropriately cut at appropriate locations. This results in the semiconductor device A1.
[0036] Next, the operation of the semiconductor device A1 will be described.
[0037] In the semiconductor device A1, the first island 11 is located on the z1 side in the z direction with respect to the second island 21. The first semiconductor element 7 is located on the z2 side in the z direction with respect to the first island 11. The second semiconductor element 8 is located on the z1 side in the z direction with respect to the second island 21. In other words, the first island 11 and the second island 21 are spaced apart in the z direction, with the first semiconductor element 7 and the second semiconductor element 8 located between them. Therefore, when mounting the semiconductor device A1 on a mounting substrate S or the like, the mounting space can be reduced compared to when one semiconductor device including the first semiconductor element 7 and another semiconductor device including the second semiconductor element 8 are mounted on the mounting substrate S.
[0038] The third lead 3 is located on the x1 side in the x direction with respect to the first island 11. The fourth lead 4 is located on the x2 side in the x direction with respect to the second island 21. As a result, the third lead 3 and the fourth lead 4 are located on either side in the x direction, sandwiching the first island 11 and the second island 21 between them. Therefore, interference between the third lead 3 and the fourth lead 4 can be avoided. Similarly, interference between the first wire 79 and the second wire 89 can be avoided.
[0039] The first opposing portion 121 and the second opposing portion 221 face each other and are in contact with each other. This makes it possible to more accurately determine the positions of the two lead frames in the z direction when two lead frames are used in the manufacturing method of the semiconductor device A1. This makes it possible to more reliably and easily realize a configuration in which the first island 11 and the second island 21 are spaced apart in the z direction and the first semiconductor element 7 and the second semiconductor element 8 are located between them.
[0040] The first semiconductor element 7 and the second semiconductor element 8 at least partially overlap each other when viewed in the z direction, which allows the packaging space of the semiconductor device A1 to be further reduced.
[0041] 8 to 21 show modified examples and other embodiments of the present disclosure. In these figures, elements that are the same as or similar to those in the above-described embodiment are given the same reference numerals. The configurations of the various parts in each modified example and each embodiment can be combined with each other as appropriate within the scope of not causing technical contradictions.
[0042] 8 shows a first modification of the semiconductor device A1. In the semiconductor device A11 of this modification, a bonding material 99 is interposed between the first opposing portion 121 and the second opposing portion 221. The sealing resin 9 may function to bond the first opposing portion 121 and the second opposing portion 221. The bonding material 99 may be conductive or insulating.
[0043] This modification can reduce the mounting space for the semiconductor device A11. As can be understood from this modification, the specific configuration in which the first opposing portion 121 and the second opposing portion 221 face each other is not limited in any way.
[0044] 9 and 10 show a semiconductor device according to a second embodiment of the present disclosure. In a semiconductor device A2 of this embodiment, the first semiconductor element 7 and the second semiconductor element 8 are spaced apart from each other when viewed in the z direction. The first semiconductor element 7 and the second semiconductor element 8 at least partially overlap each other when viewed in the x direction.
[0045] In the illustrated example, when viewed in the z direction, at least a portion of the first semiconductor element 7 may overlap with the second lead 2, and the entire first semiconductor element 7 may overlap with the second lead 2. In the illustrated example, when viewed in the z direction, at least a portion of the second semiconductor element 8 may overlap with the first lead 1, and the entire second semiconductor element 8 may overlap with the first lead 1.
[0046] This embodiment can reduce the packaging space of the semiconductor device A2. The first semiconductor elements 7 and 7 are spaced apart from each other when viewed in the z direction, and at least partially overlap each other when viewed in the x direction, which allows the dimension of the semiconductor device A2 in the z direction to be reduced.
[0047] 11 to 15 show a semiconductor device according to a third embodiment of the present disclosure. A semiconductor device A3 of this embodiment includes a first lead 1, a second lead 2, a plurality of third leads 3, a plurality of fourth leads 4, one or more fifth leads 5, one or more sixth leads 6, and a sealing resin 9.
[0048] The first semiconductor element 7 and the second semiconductor element 8 of this embodiment are, for example, LED (Light Emitting Diode) drivers. The first electrodes 72 of the first semiconductor element 7 are individually connected to the pads 31 of the third leads 3 by a plurality of first wires 79. The second electrodes 82 of the second semiconductor element 8 are individually connected to the pads 41 of the fourth leads 4 by a plurality of second wires 89.
[0049] As shown in FIG. 15, in this embodiment, the first support portion 12 and the second support portion 22 are spaced apart from each other.
[0050] The one or more fifth leads 5 are not electrically connected to the first semiconductor element 7 and the second semiconductor element 8. The material and thickness of the one or more fifth leads 5 may be the same as, for example, the third lead 3. The number of the one or more fifth leads 5 is not limited in any way, and in the example shown, there are four. The arrangement of the four fifth leads 5 is not limited in any way, and in the example shown, two fifth leads 5 are located on both sides of one first support portion 12 in the x direction, and the other two fifth leads 5 are located on both sides of the other first support portion 12 in the x direction.
[0051] The fifth lead 5 may include a third opposing portion 51 and a separation portion 52. The separation portion 52 is located on the z2 side in the z direction with respect to the first island 11. The separation portion 52 may be located at the same position as the pad portion 31 in the z direction. The third opposing portion 51 is located on the z2 side in the z direction with respect to the first island 11 and the separation portion 52.
[0052] The one or more sixth leads 6 are not electrically connected to the first semiconductor element 7 and the second semiconductor element 8. The material and thickness of the one or more sixth leads 6 may be the same as, for example, the fourth lead 4. The number of the one or more sixth leads 6 is not limited in any way, and in the example shown, there are four. The arrangement of the four sixth leads 6 is not limited in any way, and in the example shown, two sixth leads 6 are located on both sides of one second support portion 22 in the x direction, and the other two sixth leads 6 are located on both sides of the other second support portion 22 in the x direction.
[0053] The sixth lead 6 may include a fourth opposing portion 61 and a separation portion 62. The separation portion 62 is located on the z1 side in the z direction with respect to the second island 21. The separation portion 62 may be located at the same position as the pad portion 41 in the z direction. The fourth opposing portion 61 is located on the z1 side in the z direction with respect to the second island 21 and the separation portion 62.
[0054] As shown in Fig. 14 , the third opposing portion 51 and the fourth opposing portion 61 are opposed to each other in the z direction. The third opposing portion 51 and the fourth opposing portion 61 may be spaced apart or in contact with each other. A bonding material may be interposed between the third opposing portion 51 and the fourth opposing portion 61. In the example shown in Fig. 14 , the third opposing portion 51 and the fourth opposing portion 61 are in direct contact with each other. In the illustrated example, the third opposing portion 51 and the fourth opposing portion 61 are covered with a sealing resin 9.
[0055] This embodiment can reduce the mounting space of the semiconductor device A3. By arranging the third opposing portion 51 of the fifth lead 5 and the fourth opposing portion 61 of the sixth lead 6 to face each other, it is possible to realize a configuration in which the first semiconductor element 7 and the second semiconductor element 8 are positioned at different positions in the z direction.
[0056] 16 and 17 show a first modification of the semiconductor device according to the third embodiment of the present disclosure. In the semiconductor device A31 of this modification, a portion of each of the third opposing portion 51 and the fourth opposing portion 61 protrudes from the sealing resin 9.
[0057] In the illustrated example, two each of the third opposing portions 51 and the fourth opposing portions 61 protrude from the third resin surface 93 toward the x1 side in the x direction. Another two each of the third opposing portions 51 and the fourth opposing portions 61 protrude from the fourth resin surface 94 toward the x2 side in the x direction.
[0058] This modification can reduce the mounting space for the semiconductor device A31. As can be understood from this modification, the specific configurations of the third opposing portion 51 and the fourth opposing portion 61 are not limited in any way.
[0059] 18 to 21 show a semiconductor device according to a fourth embodiment of the present disclosure. In a semiconductor device A4 of this embodiment, a first lead 1 has a first island 11, two first support portions 12, and a first terminal portion 14.
[0060] The two first support portions 12 extend from the first island 11 on both sides in the x direction. The first terminal portion 14 is connected to the first support portion 12 located on the x1 side in the x direction. The tip portion of the first terminal portion 14 is located at the same position as the first island 11 in the z direction.
[0061] The two first support portions 12 each have a first opposing portion 121. The first opposing portion 121 located on the x1 side in the x direction is located on the z2 side of the first island 11 in the z direction. The first opposing portion 121 may be located at the same position as the pad portions 31 of the multiple third leads 3 in the z direction.
[0062] The first opposing portion 121 located on the x2 side in the x direction is located on the z2 side in the z direction from the first island 11 and the other first opposing portion 121. The first opposing portion 121 is located on the z2 side from the first semiconductor element 7 in the z direction.
[0063] In the semiconductor device A4, the second lead 2 has a second island 21, two second support portions 22, and a second terminal portion 24.
[0064] The two second support portions 22 extend from the second island 21 on both sides in the x direction. The second terminal portion 24 is connected to the second support portion 22 located on the x2 side in the x direction. The tip portion of the second terminal portion 24 is located in the same position as the first island 11 and the first terminal portion 14 in the z direction.
[0065] The two second support portions 22 each have a second opposing portion 221. The second opposing portion 221 located on the x2 side in the x direction is located on the z1 side of the second island 21 in the z direction. The second opposing portion 221 may be located at the same position as the pad portions 41 of the multiple fourth leads 4 in the z direction.
[0066] The second opposing portion 221 located on the x1 side in the x direction is located on the z1 side in the z direction relative to the second island 21 and the other second opposing portion 221. The second opposing portion 221 is located on the z2 side in the z direction relative to the second semiconductor element 8.
[0067] The first opposing portion 121 and the second opposing portion 221 are opposed to each other in the z direction. The first opposing portion 121 and the second opposing portion 221 are opposed to each other in the z direction. The first opposing portion 121 and the second opposing portion 221 may be spaced apart or in contact with each other. A bonding material may be interposed between the first opposing portion 121 and the second opposing portion 221. In the example shown in FIG. 7 , the first opposing portion 121 and the second opposing portion 221 are in direct contact with each other.
[0068] This embodiment makes it possible to reduce the mounting space for the semiconductor device A4. By electrically connecting the first terminal 14 and the second terminal 24 to a wiring pattern (not shown) of the mounting substrate S, the first lead 1 and the second lead 2 can be electrically connected to appropriate locations on the mounting substrate S. Such first terminal 14 and second terminal 24 are electrically connected to, for example, a ground line (not shown) of the mounting substrate S.
[0069] 22 and 23 show a semiconductor device according to a fifth embodiment of the present disclosure. In a semiconductor device A5 of this embodiment, the sealing resin 9 includes a first resin portion 901 and a second resin portion 902.
[0070] The first resin part 901 covers the first lead 1, a portion of each of the one or more third leads 3, the first semiconductor element 7, and the first wire 79. The second resin part 902 covers the second lead 2, a portion of each of the one or more fourth leads 4, the second semiconductor element 8, and the second wire 89.
[0071] The first resin part 901 is located on the z1 side in the z direction relative to the second resin part 902. The first resin part 901 and the second resin part 902 face each other in the z direction. In the illustrated example, the first resin part 901 and the second resin part 902 are bonded together by a bonding material 99. This bonding material 99 is, for example, a resin bonding material.
[0072] In one example of a method for manufacturing the semiconductor device A5, a first semiconductor element 7 and a first wire 79 are connected to the first lead 1 and one or more third leads 3 to form a first resin portion 901. A second semiconductor element 8 and a second wire 89 are connected to the second lead 2 and one or more fourth leads 4 to form a second resin portion 902. Next, the first resin portion 901 and the second resin portion 902 are bonded together with a bonding material 99 to obtain the semiconductor device A5.
[0073] This embodiment can reduce the mounting space of the semiconductor device A5. As can be understood from this embodiment, the sealing resin 9 may be configured to be formed as a single unit, or may be configured by joining a first resin portion 901 and a second resin portion 902 that are formed separately.
[0074] The semiconductor device according to the present disclosure is not limited to the above-described embodiment. The specific configuration of each part of the semiconductor device according to the present disclosure can be freely designed in various ways. The present disclosure includes the embodiments described in the following appendices.
[0075] Supplementary Note 1. A semiconductor device (A1) comprising: a first lead (1) having a first island (11); a second lead (2) having a second island (21); a first semiconductor element (7) mounted on the first island (11); a second semiconductor element (8) mounted on the second island (21); and a sealing resin (9) covering at least a portion of each of the first lead (1) and the second lead (2), the first semiconductor element (7) and the second semiconductor element (8), wherein the first island (11) is located on a first side (z1) in a first direction (z) relative to the second island (21), the first semiconductor element (7) is located on a second side (z2) in the first direction (z) relative to the first island (11), and the second semiconductor element (8) is located on the first side (z1) in the first direction (z) relative to the second island (21). Supplementary Note 2. The semiconductor device (A1) according to Supplementary Note 1 further includes a third lead (3) electrically connected to the first semiconductor element (7) and a fourth lead (4) electrically connected to the second semiconductor element (8), wherein the third lead (3) is located on a first side (x1) of the first island (11) in a second direction (x) intersecting the first direction (z), and the fourth lead (4) is located on an x2 side of the second direction (x) of the second island (21).Supplementary Note 3. The semiconductor device (A1) according to Supplementary Note 2 further includes a first wire (79) connected to the first semiconductor element (7) and the third lead (3).Supplementary Note 4. The semiconductor device (A1) according to Supplementary Note 2 or 3 further includes a second wire (89) connected to the second semiconductor element (8) and the fourth lead (4).Supplementary Note 5. The semiconductor device (A1) according to any one of Supplementary Notes 2 to 4, wherein the third lead (3) has a terminal portion (32) protruding from the sealing resin (9) to the first side (x1) in the second direction (x).Supplementary Note 6. The semiconductor device (A1) according to any one of Supplementary Notes 2 to 5, wherein the fourth lead (4) has a terminal portion (42) protruding from the sealing resin (9) to the second side (x2) in the second direction (x).Supplementary Note 7. The semiconductor device (A1) according to any one of Supplementary Notes 1 to 6, wherein the first lead (1) has a first support portion (12) connected to the first island (11), the second lead (2) has a second support portion (22) connected to the second island (21), the first support portion (12) includes a first opposing portion (121), the second support portion (22) includes a second opposing portion (221), and the first opposing portion (121) and the second opposing portion (221) are opposed to each other in the first direction (z). Supplementary Note 8. The semiconductor device (A1) according to Supplementary Note 7, further comprising a bonding material (99) that bonds the first opposing portion (121) and the second opposing portion (221). Supplementary Note 9. The semiconductor device (A1) according to any one of Supplementary Notes 1 to 8, wherein the first semiconductor element (7) and the second semiconductor element (8) at least partially overlap each other when viewed in the first direction (z). Supplementary Note 10. The semiconductor device (A11) according to any one of Supplementary Notes 1 to 8, wherein the first semiconductor element (7) and the second semiconductor element (8) are spaced apart when viewed in the first direction (z). Supplementary Note 11. The semiconductor device (A11) according to Supplementary Note 10, wherein the first semiconductor element (7) and the second semiconductor element (8) at least partially overlap each other when viewed in a direction perpendicular to the first direction (z). Supplementary Note 12. The semiconductor device (A1) according to any one of Supplementary Notes 1 to 11, wherein the first island (11) is exposed from the sealing resin (9) to the first side (z1) in the first direction (z). Supplementary Note 13. The semiconductor device (A1) according to any one of Supplementary Notes 1 to 12, wherein the second island (21) is exposed from the sealing resin (9) to the second side (z2) in the first direction (z).Supplementary Note 14. The semiconductor device (A3) according to any one of Supplementary Notes 1 to 13, further comprising a fifth lead (5) having a third opposing portion (51) and a sixth lead (6) having a fourth opposing portion (61), wherein the third opposing portion (51) is located on the first side (z1) in the first direction (z) relative to the fourth opposing portion (61), and the third opposing portion (51) and the fourth opposing portion (61) are opposed to each other in the first direction (z).Appendix 15. The semiconductor device (A3) according to Appendix 14, wherein the fifth lead (5) and the sixth lead (6) are insulated from both the first semiconductor element (7) and the second semiconductor element (8).
[0076] A1, A11, A2, A3, A31, A4, A5: semiconductor device 1: first lead 2: second lead 3: third lead 4: fourth lead 5: fifth lead 6: sixth lead 7: first semiconductor element 8: second semiconductor element 9: sealing resin 11: first island 12: first support portion 13: first extension portion 14: first terminal portion 21: second island 22: second support portion 23: second extension portion 24: second terminal portion 31: pad portion 32: third terminal portion 41: pad portion 42: terminal portion 51: third opposing portion 52: separation portion 61: fourth opposing portion 62: separation portion 71: first main body portion 72: first electrode 79: first wire 81: second main body portion 82: second electrode 89: second wire 91: First resin surface 92: Second resin surface 93: Third resin surface 94: Fourth resin surface 95: Fifth resin surface 96: Sixth resin surface 99: Bonding material 111: First main surface 112: First back surface 121: First opposing portion 211: Second main surface 212: Second back surface 221: Second opposing portion 901: First resin portion 902: Second resin portion S: Mounting substrate z: Thickness direction
Claims
1. A semiconductor device comprising: a first lead having a first island; a second lead having a second island; a first semiconductor element mounted on the first island; a second semiconductor element mounted on the second island; and a sealing resin covering at least a portion of the first lead, the second lead, the first semiconductor element, and the second semiconductor element, wherein the first island is located on a first side in a first direction relative to the second island, the first semiconductor element is located on a second side in the first direction relative to the first island, and the second semiconductor element is located on the first side in the first direction relative to the second island.
2. The semiconductor device according to claim 1, further comprising: a third lead electrically connected to the first semiconductor element; and a fourth lead electrically connected to the second semiconductor element, wherein the third lead is located on a first side of the first island in a second direction intersecting the first direction, and the fourth lead is located on the x2 side of the second direction relative to the second island.
3. The semiconductor device according to claim 2, further comprising a first wire connected to said first semiconductor element and said third lead.
4. The semiconductor device according to claim 2 or 3, further comprising a second wire connected to said second semiconductor element and said fourth lead.
5. The semiconductor device according to claim 2, wherein said third lead has a terminal portion protruding from said sealing resin toward said first side in said second direction.
6. The semiconductor device according to claim 2, wherein the fourth lead has a terminal portion protruding from the sealing resin to the second side in the second direction.
7. A semiconductor device as described in any one of claims 1 to 6, wherein the first lead has a first support portion connected to the first island, the second lead has a second support portion connected to the second island, the first support portion includes a first opposing portion, the second support portion includes a second opposing portion, and the first opposing portion and the second opposing portion are opposed to each other in the first direction.
8. The semiconductor device according to claim 7, further comprising a bonding material that bonds said first opposing portion and said second opposing portion.
9. The semiconductor device according to claim 1, wherein the first semiconductor element and the second semiconductor element at least partially overlap each other when viewed in the first direction.
10. The semiconductor device according to claim 1, wherein the first semiconductor element and the second semiconductor element are spaced apart from each other when viewed in the first direction.
11. The semiconductor device according to claim 10, wherein the first semiconductor element and the second semiconductor element at least partially overlap each other when viewed in a direction perpendicular to the first direction.
12. The semiconductor device according to claim 1, wherein said first island is exposed from said sealing resin to said first side in said first direction.
13. The semiconductor device according to claim 1, wherein the second island is exposed from the sealing resin to the second side in the first direction.
14. A semiconductor device as described in any one of claims 1 to 13, further comprising a fifth lead having a third opposing portion and a sixth lead having a fourth opposing portion, the third opposing portion being located on the first side in the first direction relative to the fourth opposing portion, and the third opposing portion and the fourth opposing portion opposing each other in the first direction.
15. The semiconductor device according to claim 14, wherein the fifth lead and the sixth lead are insulated from both the first semiconductor element and the second semiconductor element.
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