Chip structure and manufacturing method therefor, and display substrate

Abstract

The present application belongs to the technical field of displays. Disclosed are a chip structure and a manufacturing method therefor, and a display substrate. The chip structure comprises: a first substrate, a light-emitting unit, a color conversion unit and a surrounding dam layer. The surrounding dam layer can be arranged around the light-emitting unit, and the maximum distance between the surface of the surrounding dam layer facing away from the color conversion unit and the first substrate is greater than or equal to the maximum distance between the surface of a first semiconductor layer in the light-emitting unit facing away from the first substrate and the first substrate. Therefore, after a light waveguide phenomenon occurs inside the first semiconductor layer, light transmitted transversely within the first semiconductor layer can be blocked by the surrounding dam layer after being emitted from any position on the edge, such that the probability of light leakage in the chip structure can be effectively reduced, resulting in a better display effect of the display substrate, which is integrated with the chip structure.

Description

Chip structure and manufacturing method thereof, and display substrate Technical Field

[0001] The present application relates to the field of display technology, and in particular to a chip structure and a manufacturing method thereof, and a display substrate. Background Art

[0002] With the development of display technology, LED chips have become the most advantageous new generation display media due to their advantages such as pure color, wide dynamic range, high brightness, high definition, low operating voltage, low power consumption, long life, impact resistance, wide viewing angle and stable and reliable operation. Therefore, display substrates integrated with LED chips have become the most advantageous new generation display media and have been widely used.

[0003] Summary of the Invention

[0004] The present invention provides a chip structure and a manufacturing method thereof, and a display substrate. The technical solution is as follows:

[0005] In one aspect, a chip structure is provided, comprising: a first substrate, a light-emitting unit, a color conversion unit, and a dam; the color conversion unit is located between the first substrate and the light-emitting unit, with the light-emitting unit's light-emitting side facing the first substrate; the dam is located on a side of the color conversion unit facing away from the first substrate, and the dam surrounds and surrounds the light-emitting unit.

[0006] The color conversion unit includes: a limiting dam and an optical function portion, the limiting dam has an opening area, the optical function portion is located in the opening area, and the optical function portion is used to convert the color of light entering the optical function portion;

[0007] The orthographic projection of the dam on the first substrate has a first outer contour, the orthographic projection of the limiting dam on the first substrate has a second outer contour, and the second outer contour is located in the area enclosed by the first outer contour.

[0008] Optionally, a cross section of the dam perpendicular to the first substrate and perpendicular to the extension direction of the dam includes: a first side facing the first substrate, and a second side facing away from the first substrate;

[0009] The length of the first side is greater than the length of the second side.

[0010] Optionally, the dam has a first surface facing the first substrate and a second surface facing away from the first substrate; the dam also has a first outer contour surface located between the first surface and the second surface, the angle between the first surface and the first outer contour surface is an acute angle, and the angle between the second surface and the first outer contour surface is an obtuse angle.

[0011] Optionally, the dam has a first surface facing the first substrate and a second surface facing away from the first substrate;

[0012] The orthographic projection of the second surface on the first substrate is located within the orthographic projection of the first surface on the first substrate.

[0013] Optionally, the dam has a first surface facing the first substrate and a second surface facing away from the first substrate; the dam further has a first inner contour surface located between the first surface and the second surface;

[0014] The chip structure further includes: a filling portion, at least a portion of which is located within the area enclosed by the dam;

[0015] Part of the filling portion is located between the light emitting unit and the first inner contour surface, and another part is located on a side of the light emitting unit away from the first substrate; the filling portion is respectively arranged in contact with the first inner contour surface and the light emitting unit.

[0016] Optionally, the filling portion includes: a first sub-filling portion and a second sub-filling portion;

[0017] At least a portion of the first sub-filling portion is located between the light emitting unit and the first inner contour surface; the second sub-filling portion is distributed on a side of the light emitting unit away from the first substrate;

[0018] The first sub-filling portion is arranged in contact with the first inner contour surface and in contact with the second sub-filling portion, and the second sub-filling portion is arranged in contact with the light-emitting unit.

[0019] Optionally, the minimum distance between the filling portion and the first substrate is greater than the distance between the first surface and the first substrate, or a portion of the filling portion is located on a side of the first surface close to the first substrate.

[0020] Optionally, the minimum distance between the filling portion and the first liner is greater than the distance between the light emitting unit and the first substrate, or a portion of the filling portion is located on a side of the light emitting unit close to the first substrate.

[0021] Optionally, the limiting dam is in direct contact with the surrounding dam, and / or the limiting dam is in direct contact with the light-emitting chip.

[0022] Optionally, the limiting dam has a third surface facing the first substrate and a fourth surface facing away from the first substrate;

[0023] A portion of the filling portion is located on a side of the first surface close to the first substrate, and the portion of the filling portion located on the side of the first surface close to the first substrate includes: a first subportion covered by the fourth surface, and a second subportion not covered by the fourth surface;

[0024] The second subsection surrounds the first subsection.

[0025] Optionally, the limiting dam has a third surface facing the first substrate and a fourth surface facing away from the first substrate;

[0026] The fourth surface includes: a first region and a second region, the first region is arranged opposite to the first surface and extends along the first surface, and the second region is arranged opposite to the light emitting unit and extends along the surface of the light emitting unit close to the first substrate;

[0027] The distance between the first region and the first substrate is greater than the distance between the second region and the first substrate, or the distance between the first region and the first substrate is smaller than the distance between the second region and the first substrate.

[0028] Optionally, the fourth surface also includes: a third region arranged opposite to a portion of the filling portion located between the light-emitting unit and the dam, and at least one of the distance between the third region and the first substrate, the distance between the first region and the first substrate, and the distance between the second region and the first substrate is different.

[0029] Optionally, the light-emitting unit includes a connecting electrode, and the connecting electrode is located on a side of the light-emitting unit that is farthest from the first substrate;

[0030] The distance between the surface of the connecting electrode away from the first substrate and the first substrate is greater than the distance between the second surface and the first substrate.

[0031] Optionally, the distance between the second surface and the first substrate is greater than the distance between a surface of a portion of the filling portion located between the dam and the light-emitting unit and away from the first substrate and the first substrate.

[0032] Optionally, the first surface includes: an inner contour edge close to the light-emitting unit, and an outer contour edge away from the light-emitting unit, and the distance between the contour edge and the first substrate is greater than the distance between the outer contour edge and the first substrate.

[0033] Optionally, the light-emitting unit includes a first semiconductor layer, and a distance between a first pair of feature points on a surface of the first semiconductor layer facing the first substrate that is farthest apart is a first distance D1;

[0034] A second pair of feature points corresponding to the first pair of feature points exists in an inner region enclosed by the orthographic projection of the first inner contour surface on the first substrate. The distance between the second pair of feature points is a second distance D2. The second pair of feature points is a pair of feature points obtained by intercepting a straight line on the orthographic projection of the first pair of feature points on the outer contour of the inner region enclosed by the orthographic projection of the first inner contour surface on the first substrate.

[0035] The second distance D2 and the first distance D1 satisfy: (D2-D1) is less than or equal to 30 micrometers.

[0036] Optionally, for the accommodation space enclosed by the dam for accommodating the light-emitting unit, each cross-sectional area inside the accommodation space parallel to the extension surface of the first substrate gradually decreases along the direction from the first substrate to the dam.

[0037] Optionally, a cross-sectional shape of the dam perpendicular to the first substrate and perpendicular to the extension direction of the dam is at least one of an inverted trapezoid, an inverted triangle, and an inverted arc relative to the first substrate.

[0038] Optionally, the limiting dam has a third surface facing the first substrate and a fourth surface facing away from the first substrate;

[0039] The orthographic projection of the fourth surface on the first substrate is located within the orthographic projection of the third surface on the first substrate.

[0040] Optionally, the limiting dam has a third surface facing the first substrate, a fourth surface facing away from the first substrate, and a second outer contour surface located between the third surface and the fourth surface;

[0041] Wherein, the second outer contour surface is in direct contact with the external environment.

[0042] Optionally, the color conversion unit further includes:

[0043] a first encapsulation layer located between the first substrate and the definition dam, a portion of the first encapsulation layer located within the opening area, and the optical function portion located between the first encapsulation layer and the first substrate;

[0044] The orthographic projection of the optical functional portion on the first substrate is located within the orthographic projection of the first encapsulation layer on the first substrate.

[0045] Optionally, the first encapsulation layer is in direct contact with the light-emitting unit.

[0046] Optionally, the color conversion unit further includes: a second encapsulation layer located between the first substrate and the first encapsulation layer, the optical functional portion is located between the first encapsulation layer and the second encapsulation layer, and the first encapsulation layer and the second encapsulation layer are in contact to seal the optical functional portion;

[0047] The color conversion unit further includes a light shielding layer located between the first substrate and the defining dam, the light shielding layer having a light through hole, and an orthographic projection of the opening area on the first substrate overlaps with an orthographic projection of the light through hole on the first substrate.

[0048] Optionally, the color conversion unit further includes: a filter unit located between the first substrate and the optical functional portion, and the orthographic projection of the filter unit on the first substrate overlaps with the orthographic projection of the corresponding light hole on the first substrate.

[0049] Optionally, the light shielding layer has a fifth surface facing the first substrate, a sixth surface facing away from the first substrate, and a third outer contour surface located between the fifth surface and the sixth surface;

[0050] Wherein, the third outer contour surface is in direct contact with the external environment.

[0051] Optionally, the chip structure further includes: a transparent connection layer, wherein the transparent connection layer is used to connect the first substrate and the color conversion unit.

[0052] Optionally, the orthographic projection of the transparent connecting layer on the first substrate is located inside the first substrate, and there is a distance between an outer contour of the orthographic projection of the transparent connecting layer on the first substrate and an outer contour of the first substrate.

[0053] Optionally, an outer contour of an orthographic projection of the transparent connecting layer on the first substrate extends parallel to the first outer contour.

[0054] Optionally, a surface of the optically functional portion facing the first substrate is a curved surface;

[0055] A surface of the optical function portion facing the first substrate extends along a surface of the light emitting unit close to the first substrate.

[0056] Optionally, the light-emitting unit includes: a plurality of sub-light-emitting functional layers, and a first semiconductor layer located on the light-emitting side of the plurality of sub-light-emitting functional layers, the first semiconductor layer includes: a plurality of connecting parts corresponding one-to-one to the plurality of sub-light-emitting functional layers, and an auxiliary part connected to the plurality of connecting parts, the connecting parts are connected to the corresponding sub-light-emitting functional layers, at least part of the auxiliary parts is located between adjacent connecting parts, and the auxiliary parts and the connecting parts are an integral structure.

[0057] Optionally, the color conversion unit includes: a plurality of the optical function parts, and the limiting dam has a plurality of the opening areas;

[0058] The plurality of optical functional parts correspond one-to-one to the plurality of opening areas, and each optical functional part is located in the corresponding opening area; and the plurality of optical functional parts correspond one-to-one to the plurality of sub-light-emitting functional layers, and the light-emitting side of each sub-light-emitting functional layer faces the corresponding optical functional part.

[0059] Optionally, the color conversion unit further includes: a light absorbing layer located between the limiting dam and the first substrate, the light absorbing layer having a plurality of light-through holes corresponding one-to-one to the plurality of opening areas, and the orthographic projections of the light-through holes on the first substrate overlap with the orthographic projections of the corresponding opening areas on the first substrate.

[0060] Optionally, the color conversion unit further includes: a plurality of filter units, the plurality of filter units corresponding one-to-one to the plurality of optical function parts and corresponding one-to-one to the plurality of light holes;

[0061] Each of the filter units is located between the corresponding optical functional portion and the first substrate, and the orthographic projection of each of the filter units on the first substrate overlaps with the orthographic projection of the corresponding light through hole on the first substrate.

[0062] Optionally, the plurality of sub-light-emitting functional layers include: a first sub-light-emitting functional layer, a second sub-light-emitting functional layer and a third sub-light-emitting functional layer;

[0063] The plurality of opening regions include: a first opening region, a second opening region, and a third opening region, wherein the first opening region is arranged opposite to the first sub-light-emitting functional layer, the second opening region is arranged opposite to the second sub-light-emitting functional layer, and the third opening region is arranged opposite to the third sub-light-emitting functional layer;

[0064] The first opening area and the second opening area are arranged in a row in a first direction, the second opening area and the third opening area are arranged in a row in a second direction, and the first direction intersects the second direction.

[0065] Optionally, the light emitting unit further includes: a first connecting electrode and a plurality of second connecting electrodes;

[0066] The first connecting electrode shown is electrically connected to the first semiconductor layer; the multiple second connecting electrodes correspond one-to-one to the multiple sub-light-emitting functional layers, and the second connecting electrodes are distributed on the side of the corresponding sub-light-emitting functional layer away from the first semiconductor layer, and are electrically connected to the corresponding sub-light-emitting functional layer.

[0067] Optionally, the plurality of second connection electrodes correspond to the plurality of connection portions one-to-one, and orthographic projections of the connection portions on the first substrate overlap with orthographic projections of corresponding second connection electrodes on the first substrate;

[0068] The auxiliary portion includes: a first auxiliary portion, a second auxiliary portion, and a third auxiliary portion; an orthographic projection of the first auxiliary portion on the first substrate overlaps with an orthographic projection of the first connecting electrode on the first substrate; a portion of the second auxiliary portion is located between adjacent connecting portions, and another portion is located between the first auxiliary portion and the connecting portion; the third auxiliary portion is arranged around the first auxiliary portion, the second auxiliary portion, and the plurality of connecting portions;

[0069] Wherein, the material of the auxiliary part is the same as that of the connecting part.

[0070] Optionally, the light emitting unit further includes: a common electrode layer connected to the auxiliary portion of the first semiconductor layer, wherein a side of the common electrode layer facing away from the first semiconductor layer is overlapped with the first connecting electrode;

[0071] The sub-light-emitting functional layer includes: a current spreading layer, a second semiconductor layer and a light-emitting layer stacked in a direction perpendicular to and toward the first substrate, the light-emitting layer is connected to the corresponding connecting portion in the first semiconductor layer on the side facing the first substrate, and the current spreading layer is overlapped with the second connecting electrode on the side facing away from the first substrate.

[0072] Optionally, the light-emitting unit further includes: an insulating protective layer located on a side of the common electrode layer and the multiple sub-light-emitting functional layers facing away from the first semiconductor layer, the orthographic projections of the multiple sub-light-emitting functional layers and the common electrode layer on the first semiconductor layer are all located within the orthographic projection of the insulating protective layer on the first semiconductor layer, and the first connecting electrode and the multiple second connecting electrodes are all located on a side of the insulating protective layer facing away from the first semiconductor layer;

[0073] In which, the insulating protective layer has: a first connection hole corresponding to the first connection electrode, and a plurality of second connection holes corresponding one-to-one to the plurality of second connection electrodes, the first connection electrode is overlapped with the common electrode layer through the first connection hole, and the second connection electrode is overlapped with the current expansion layer in the corresponding sub-light-emitting functional layer through the corresponding second connection hole.

[0074] Optionally, the first semiconductor layer includes: a first sublayer and a second sublayer stacked in a direction perpendicular to and toward the first substrate, the first sublayer being located between the second sublayer and the light-emitting layer, the first sublayer being made of N-type doped gallium nitride, and the second sublayer being a gallium nitride buffer layer;

[0075] The material of the second semiconductor layer includes P-type doped gallium nitride, and the light-emitting layer is a multi-quantum well layer.

[0076] In another aspect, a method for manufacturing a chip structure is provided, wherein the method is used to prepare the above-mentioned chip structure, and the method comprises:

[0077] forming a plurality of the light-emitting units and the dam surrounding the periphery of each of the light-emitting units on a temporary substrate;

[0078] forming a plurality of the color conversion units on a side of the plurality of light-emitting units away from the temporary substrate;

[0079] forming a second substrate on a side of the plurality of color conversion units facing away from the temporary substrate;

[0080] The temporary substrate is removed, and the second substrate is cut to obtain a plurality of the chip structures.

[0081] Optionally, forming the plurality of light-emitting units and the dam surrounding each of the light-emitting units on the temporary substrate includes:

[0082] Providing a plurality of the light-emitting units, wherein the plurality of light-emitting units are fixedly arranged on a third substrate;

[0083] Providing a first colloid, and aligning the third substrate with the temporary substrate so that the plurality of light-emitting units are in contact with the first colloid located between the third substrate and the temporary substrate, and removing the third substrate to form the plurality of light-emitting units on the temporary substrate;

[0084] removing the first colloid located between two adjacent light-emitting units;

[0085] A dam surrounding each of the light-emitting units is formed on the temporary substrate.

[0086] Optionally, forming the plurality of light-emitting units and the dam surrounding each of the light-emitting units on the temporary substrate includes:

[0087] forming a plurality of the dams on the temporary substrate;

[0088] A plurality of light-emitting units are formed, and at least a portion of the plurality of light-emitting units is transferred to the area surrounded by the corresponding dam using a transfer process.

[0089] Optionally, before forming the plurality of color conversion units on a side of the plurality of light-emitting units facing away from the temporary substrate, the method further includes:

[0090] A second colloid is used to fill at least the gap between each dam and the corresponding light-emitting unit to form a plurality of flat portions on the temporary substrate, each of the flat portions comprising: the dam and the corresponding light-emitting unit, and the second colloid located between the dam and the light-emitting unit.

[0091] Optionally, forming a plurality of color conversion units on a side of the plurality of light-emitting units away from the temporary substrate includes:

[0092] forming a defining dam on a side of each of the flat portions facing away from the temporary substrate, the defining dam having an opening area;

[0093] forming a first encapsulation layer on a side of the limiting dam facing away from the flat portion, wherein a portion of the first encapsulation layer extends into the opening area;

[0094] forming an optical function portion in the opening area;

[0095] A second encapsulation layer is formed on a side of the optical function portion facing away from the temporary substrate, and the second encapsulation layer is in contact with the first encapsulation layer to seal the optical function portion.

[0096] Optionally, forming a second substrate on a side of the plurality of color conversion units away from the temporary substrate includes:

[0097] forming a transparent connecting layer on one side of the second substrate;

[0098] The second substrate is bonded to a side of the plurality of color conversion units facing away from the temporary substrate through the transparent connecting layer.

[0099] Optionally, after removing the temporary substrate, the method further includes:

[0100] An ashing process is performed on a side of the second substrate facing the plurality of color conversion units to remove a portion of the transparent connection layer distributed between two adjacent color conversion units.

[0101] On the other hand, a display substrate is provided, comprising: a driving backplane, and a plurality of chip structures arranged in an array on one side of the driving backplane, wherein the chip structure is the above-mentioned chip structure.

[0102] The beneficial effects of the technical solutions provided in the embodiments of the present application include at least:

[0103] The chip structure of the embodiment of the present application includes: a first substrate, a light-emitting unit, a color conversion unit, and a dam layer. Since the dam layer can be arranged around the light-emitting unit, and the maximum distance between the side of the dam layer facing away from the color conversion unit and the first substrate is greater than or equal to the maximum distance between the side of the first semiconductor layer in the light-emitting unit facing away from the first substrate and the first substrate, after the light waveguide phenomenon occurs within the first semiconductor layer, the light transmitted laterally within the first semiconductor layer can be blocked by the dam layer after being emitted from any position on the edge. In this way, even if the light entering the first semiconductor generates the light waveguide phenomenon, the light emitted from the edge of the first semiconductor can be blocked by the dam layer, thereby effectively reducing the probability of light leakage in the chip structure, so that the display effect of the display substrate integrated with this chip structure is better. BRIEF DESCRIPTION OF THE DRAWINGS

[0104] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0105] FIG1 is a top view of a chip structure provided in an embodiment of the present application;

[0106] FIG2 is a schematic diagram of the film layer structure of the chip structure shown in FIG1 at AA';

[0107] FIG3 is a top view of a first semiconductor layer provided in an embodiment of the present application;

[0108] FIG4 is a diagram showing an effect of generating an optical waveguide phenomenon inside a first semiconductor layer according to an embodiment of the present application;

[0109] FIG5 is a schematic diagram of another film layer structure at AA' of the chip structure shown in FIG1;

[0110] 6 is a bottom view of a light-emitting chip according to an embodiment of the present application showing the positional relationship between a first semiconductor layer and a dam;

[0111] FIG7 is a schematic diagram of a film layer structure of a chip structure provided by another embodiment of the present application;

[0112] FIG8 is a schematic diagram of a film layer structure of another chip structure provided by another embodiment of the present application;

[0113] FIG9 is a schematic diagram of a film layer structure of another chip structure provided by another embodiment of the present application;

[0114] FIG10 is a schematic diagram of another film layer structure at AA' of the chip structure shown in FIG1;

[0115] FIG11 is a schematic diagram of another film layer structure at AA' of the chip structure shown in FIG1;

[0116] FIG12 is a top view of another chip structure provided in an embodiment of the present application;

[0117] FIG13 is a schematic diagram of the film layer structure of the chip structure shown in FIG12 at BB';

[0118] FIG14 is a schematic diagram of the film layer structure at CC' of the chip structure shown in FIG12;

[0119] FIG15 is a schematic diagram of a film layer structure of another chip structure provided in an embodiment of the present application;

[0120] FIG16 is a schematic diagram of a film layer structure of another chip structure provided in an embodiment of the present application;

[0121] FIG17 is a top view of a light-emitting unit provided in an embodiment of the present application;

[0122] FIG18 is a schematic diagram of the film structure of the light-emitting unit at position DD′ shown in FIG17 ;

[0123] FIG19 is a top view of another first semiconductor layer provided in an embodiment of the present application;

[0124] FIG20 is a top view of another light-emitting unit provided in an embodiment of the present application;

[0125] FIG21 is a schematic diagram of the film structure of the light-emitting unit at EE' shown in FIG20;

[0126] FIG22 is a schematic diagram of forming a debonding layer on a temporary substrate according to an embodiment of the present application;

[0127] FIG23 is a schematic diagram of forming a plurality of light-emitting units on a third substrate according to an embodiment of the present application;

[0128] FIG24 is a schematic diagram of a method after coating a first colloid provided in an embodiment of the present application;

[0129] FIG25 is a schematic diagram of forming a plurality of light-emitting units on a temporary substrate according to an embodiment of the present application;

[0130] FIG26 is a schematic diagram of removing a portion between two adjacent light-emitting units in a first colloid according to an embodiment of the present application;

[0131] FIG27 is a schematic diagram of forming a dam surrounding each light-emitting unit on a temporary substrate according to an embodiment of the present application;

[0132] FIG28 is a schematic diagram of forming a plurality of flat portions on a temporary substrate according to an embodiment of the present application;

[0133] FIG29 is a schematic diagram of forming a color conversion unit on a side of a flat portion facing away from a temporary substrate according to an embodiment of the present application;

[0134] FIG30 is a schematic diagram of forming a second substrate on a side of a plurality of color conversion units facing away from a temporary substrate according to an embodiment of the present application;

[0135] FIG31 is a schematic diagram of a method after removing a temporary substrate according to an embodiment of the present application;

[0136] FIG32 is a schematic diagram of forming multiple dams on a side of a debonding layer facing away from a temporary substrate according to an embodiment of the present application;

[0137] FIG33 is a schematic diagram of transferring at least part of a plurality of light-emitting units to an area enclosed by corresponding dams according to an embodiment of the present application;

[0138] FIG34 is a schematic diagram of using a second colloid to fill the gaps between each dam and the corresponding light-emitting unit according to an embodiment of the present application. DETAILED DESCRIPTION

[0139] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0140] Please refer to Figures 1 and 2. Figure 1 is a top view of a chip structure provided in an embodiment of the present application, and Figure 2 is a schematic diagram of the film layer structure of the chip structure shown in Figure 1 at AA'. The chip structure 000 may include: a first substrate 100, a light-emitting unit 300, and a color conversion unit 200.

[0141] The color conversion unit 200 in the chip structure 000 can be located between the first substrate 100 and the light-emitting unit 300, and the light-emitting side of the light-emitting unit 300 can face the first substrate. In this case, light emitted by the light-emitting unit 300 can be directed toward the color conversion unit 200, then pass through the color conversion unit 200 and the first substrate 100 before being emitted.

[0142] The light-emitting unit 300 in the chip structure 000 may include: a sub-light-emitting functional layer 300a, and a first semiconductor layer 301 located on the light-emitting side of the sub-light-emitting functional layer 300a. For example, the number of sub-light-emitting functional layers 300a in the light-emitting unit 300 may be multiple, and these sub-light-emitting functional layers 300a may be connected to the same first semiconductor layer 301. To more clearly see the structure of the first semiconductor layer 301, please refer to Figure 3, which is a top view of a first semiconductor layer provided in an embodiment of the present application. The first semiconductor layer 301 may include: a plurality of connecting portions 3011 corresponding one-to-one to the plurality of sub-light-emitting functional layers 300a, and an auxiliary portion 3012 connected to the plurality of connecting portions 3011.

[0143] In which, each connection portion 3011 in the first semiconductor layer 301 can be connected to the corresponding sub-light-emitting functional layer 300a, and the outer boundary of the orthographic projection of each connection portion 3011 on the first substrate 100 can completely coincide with the outer boundary of the orthographic projection of the corresponding sub-light-emitting functional layer 300a on the first substrate 100.

[0144] In the present application, the multiple connecting portions 3011 and the auxiliary portions 3012 in the first semiconductor layer 301 are integrally structured, and the material of the connecting portions 3011 in the first semiconductor layer 301 can be the same as the material of the auxiliary portions 3012. It is understood that the multiple connecting portions 3011 and the auxiliary portions 3012 in the first semiconductor layer 301 are arranged in a direction parallel to the extension surface of the first substrate 100, and the first semiconductor layer 301 is a planar structure arranged as a whole layer. All parts of the first semiconductor layer 301 except the multiple connecting portions 3011 are auxiliary portions 3012. The multiple connecting portions 3011 can be connected by the auxiliary portions 3012 in the first semiconductor layer 301.

[0145] In the embodiment of the present application, light emitted from the sub-light-emitting functional layer 300a in the light-emitting unit 300 first passes through the first semiconductor layer 301, and then sequentially passes through the color conversion unit 200 and the first substrate 100 before being emitted. Due to the difference in refractive index between the media layers, some light directed toward the interior of the first semiconductor layer 301 propagates along the extension direction of the first semiconductor layer 301, which can easily cause the light to eventually leak out from the side of the chip structure 000. This light can mix with the light emitted through the color conversion unit 200, causing abnormal colors displayed by the chip 000.

[0146] For example, when there are multiple sub-light-emitting functional layers 300a, the first semiconductor layer 301 is a planar structure arranged in an entire layer. Therefore, part of the light emitted into the interior of the first semiconductor layer 301 is very likely to generate a light waveguide phenomenon within the first semiconductor layer 301. For example, please refer to Figure 4, which is an effect diagram of a light waveguide phenomenon generated within the first semiconductor layer provided by an embodiment of the present application. Part of the light emitted into the first semiconductor layer 301 can undergo multiple total reflections back and forth between two oppositely arranged planes in the first semiconductor layer 301, and be transmitted laterally, and finally be emitted from the edge of the first semiconductor layer 301. After the light waveguide phenomenon is generated within the first semiconductor layer 301, the light emitted from the edge of the first semiconductor layer 301 may not be absorbed by the light shielding layer in the color conversion unit 200, thereby causing the chip structure 000 to be very prone to light leakage.

[0147] To this end, as shown in FIG2 , the chip structure 000 of the present application may further include a dam 400. The dam 400 may be located on a side of the color conversion unit 200 facing away from the first substrate 100 and may surround the periphery of the light-emitting unit 300. Specifically, the dam 400 may absorb and / or reflect at least blue light. For example, the dam 400 may absorb and / or reflect visible light.

[0148] For example, the dam 400 is an integrated structure, and the dam 400 can be a continuous structure distributed end to end around the periphery of the light-emitting unit 300. In this way, the dam 400 can block side light leakage in any direction of the chip 000.

[0149] Preferably, a maximum distance H1 between a surface of the dam 400 facing away from the color conversion unit 200 and the first substrate 100 may be greater than or equal to a maximum distance H2 between a surface of the first semiconductor layer 301 facing away from the first substrate 100 and the first substrate 100 .

[0150] For example, the dam 400 in the chip structure 000 is used to absorb the light emitted by the sub-light-emitting functional layer 300a that is laterally transmitted within the first semiconductor layer 301. That is, after the light emitted by the sub-light-emitting functional layer 300a enters the first semiconductor layer 301 and generates an optical waveguide phenomenon within the first semiconductor layer 301, the light that is laterally transmitted within the first semiconductor layer 301 can be absorbed by the dam 400.

[0151] For example, the material of the dam 400 in the chip structure 000 may include at least one of a light-reflecting organic material and a light-absorbing organic material. Here, when the material of the dam 400 includes a light-absorbing organic material, the material of the dam 400 is a black organic material that can absorb light laterally transmitted within the first semiconductor layer 301 in the light-emitting unit 300.

[0152] For example, the dam 400 may be a high molecular polymer mixed with a light absorbing material. The high molecular polymer may serve as a base material, and the light absorbing material is mixed inside the high molecular polymer.

[0153] For example, the dam 400 may be a high molecular polymer mixed with light absorbing material and scattering particles.

[0154] For example, the light absorbing material is carbon black; the scattering particles may be at least one of silicon dioxide particles, titanium dioxide particles, and a high molecular polymer having a refractive index different from that of the base material of the dam 400 .

[0155] Furthermore, because the dam 400 is disposed around the light-emitting unit 300, and the maximum distance H1 between the surface of the dam 400 facing away from the color conversion unit 200 and the first substrate 100 is greater than or equal to the maximum distance H2 between the surface of the first semiconductor layer 301 facing away from the first substrate 100 and the first substrate 100, light traveling laterally within the first semiconductor layer 301 can be blocked by the dam 400 after exiting from any edge position.

[0156] In this case, even if the light entering the first semiconductor 301 generates an optical waveguide phenomenon, the light emitted from the edge of the first semiconductor 301 can be blocked by setting a dam 400, thereby effectively reducing the probability of light leakage in the chip structure 000.

[0157] When the dam 400 is made of a reflective organic material, the reflectivity of the dam 400 can range from 40% to 80%. For example, the reflectivity of the dam 400 can be 63% ± 5%. It should be noted that when the reflectivity of the dam 400 is above 30%, the dam 400 can be considered to have a certain degree of reflectivity. When the reflectivity of the dam 400 is between 40% and 80%, after the first light beam propagating laterally within the first semiconductor layer 301 is emitted from the edge of the first semiconductor layer 301, the dam 400 can ensure that more of the first light beam is reflected back, thereby improving the edge light leakage phenomenon of the chip structure 000.

[0158] In the embodiment of the present application, the color conversion unit 200 in the chip structure 000 may include a defining dam 201 and an optically functional portion 202. The defining dam 201 may have an opening K1, and the optically functional portion 202 may be located within the opening K1. The optically functional portion 202 is configured to convert the color of light entering the optically functional portion 202.

[0159] For example, the defining dam 201 may have multiple opening areas K1, and the number of optical functional portions 202 in the color conversion unit 200 may also be multiple. Here, the multiple optical functional portions 202 may correspond one-to-one with the multiple opening areas K1, and each optical functional portion 202 may be located within a corresponding opening area K1. The multiple optical functional portions 202 may also correspond one-to-one with the sub-light-emitting functional layers 300a in the light-emitting unit 300. The light-emitting side of each sub-light-emitting functional layer 300a in the light-emitting unit 300 may face the corresponding optical functional portion 202, and the orthographic projection of each sub-light-emitting functional layer 300a on the first substrate 100 may overlap with the orthographic projection of the corresponding optical functional portion 202 on the first substrate 100. For example, the orthographic projection of each sub-light-emitting functional layer 300a in the light-emitting unit 300 on the first substrate 100 may be located within the orthographic projection of the corresponding optical functional portion 202 on the first substrate 100. In this way, the light emitted from each sub-light-emitting functional layer 300a in the light-emitting unit 300 can be directed to the corresponding optical functional part 202, and then converted into a color by the corresponding optical functional part 202 before being emitted through the first substrate 100.

[0160] It should be noted that each sub-light-emitting functional layer 300a in the light-emitting unit 300 can emit light of the same color, and the types of optical functional parts 202 filled in different opening areas K1 are different, so that the light emitted by the sub-light-emitting functional layer 300a can be converted into light of other different colors by different types of optical functional parts 202 after passing through different opening areas K1.

[0161] In the embodiment of the present application, the orthographic projection of the dam 400 in the chip structure 000 on the first substrate 100 may have a first outer contour, and the orthographic projection of the defining dam 201 in the color conversion unit 200 on the first substrate 100 may have a second outer contour.

[0162] Here, in the fabrication process of the chip structure 000 provided in this application, the dam 400 and the light-emitting unit 300 are first formed, the color conversion unit 200 is then formed on the dam 400 and the light-emitting unit 300, and finally the first substrate 100 is formed on the color conversion unit 200. Therefore, to ensure the stability of the chip structure 000, it is necessary to ensure that the second outer contour of the defining dam 201 is located within the area enclosed by the first outer contour of the dam 400. In other words, the orthographic projection of the defining dam 201 on the first substrate 100 must be located within the area enclosed by the first outer contour of the orthographic projection of the dam 400 on the first substrate 100.

[0163] It should be noted that to ensure high production efficiency of the chip structure 000, a chip motherboard including a second substrate, multiple color conversion units 200, multiple light-emitting units 300, and multiple dams 400 can be first formed. Then, the second substrate in the chip motherboard is divided to obtain multiple independent chip structures 000. Here, the second substrate refers to a substrate that is connected as a whole and has a large area, which can support multiple color conversion units 200, and the first substrate 100 in a single chip structure 000 is part of the second substrate.

[0164] Exemplarily, the method for fabricating chip structure 000 may include the following steps: Step S101: forming a plurality of light-emitting units and a dam surrounding each light-emitting unit on a temporary substrate. Step S102: forming a plurality of color conversion units on a side of the plurality of light-emitting units facing away from the temporary substrate. Step S103: forming a second substrate on a side of the plurality of color conversion units facing away from the temporary substrate. Step S104: removing the temporary substrate and cutting the second substrate to obtain a plurality of chip structures. Optionally, to ensure that the color conversion units are stably formed on the light-emitting units, before performing step S102, a second colloid may be used to fill the gaps between each dam and the corresponding light-emitting unit. This allows for the formation of a plurality of flat portions on the temporary substrate. Each flat portion may include a dam, a corresponding light-emitting unit, and the second colloid located therebetween. This allows for the subsequent stable formation of a color conversion unit on the side of each flat portion facing away from the temporary substrate. The specific details of each step in the fabrication process of chip structure 000 are not limited herein; the specific details of the fabrication process of chip structure 000 will be described in subsequent embodiments. It should be noted that the flatness of the side of the flat portion facing away from the temporary substrate is higher relative to that before the second colloid, that is, the overall outline of the light-emitting unit and the dam on the side of the flat portion facing away from the temporary substrate is flatter than that before the second colloid. Specifically, the second colloid fills the gap between the dam and the light-emitting unit; therefore, in the present application, it is not limited to that the side of the flat portion facing away from the temporary substrate extends parallel to the temporary substrate.

[0165] In the embodiment of the present application, as shown in FIG2 , since the dam 400 in the chip structure 000 is made of an organic material, is formed on a temporary substrate, and needs to have the required thickness to surround the light-emitting unit 200, for example, the thickness of the dam 400 can range from 4 microns to 15 microns, after the dam 400 is formed through exposure and development processes, the cross-section of the dam 400 perpendicular to the first substrate 100 and perpendicular to the extension direction of the dam 400 (e.g., the cross-section corresponding to the AA' line in FIG1 ) can be a trapezoidal shape positioned upright relative to the first substrate 100.

[0166] For example, a cross section of the dam 400 perpendicular to the first substrate 100 and perpendicular to the extension direction of the dam 400 may include: a first side facing the first substrate 101 and a second side away from the first substrate 101, and the length of the first side may be greater than the length of the second side.

[0167] In this application, please refer to Figure 5, which is a schematic diagram of another film layer structure at the AA' position of the chip structure shown in Figure 1. The dam 400 in the chip structure 000 may have: a first surface S1 facing the first substrate 100, and a second surface S2 facing away from the first substrate 100. The dam 400 may also have: a first outer contour surface S3 and a first inner contour surface S4 located between the first surface S1 and the second surface S2. The first outer contour surface S3 may be a surface that surrounds the dam 400 as a whole, that is, the first outer contour surface S3 may be the outer side surface of the dam 400. The first inner contour surface S4 refers to a surface that is opposite to the first outer contour surface S3 in the dam 400, that is, the first inner contour surface S4 may be the inner side surface of the dam 400.

[0168] Here, when the cross-section of the dam 400 perpendicular to the first substrate 100 and perpendicular to the extension direction of the dam 400 is a trapezoidal shape positioned upright relative to the first substrate 100, the angle ɑ1 between the first surface S1 of the dam 400 and the first outer contour surface S3 is acute, and the angle ɑ2 between the first surface S1 and the first inner contour surface S4 is also acute. The angle β1 between the second surface S2 of the dam 400 and the first outer contour S3 is obtuse, and the angle β2 between the second surface S2 of the dam 400 and the first inner contour S4 is also obtuse. Furthermore, the orthographic projection of the second surface S2 of the dam 400 on the first substrate 100 can be located within the orthographic projection of the first surface S1 of the dam 400 on the first substrate 100.

[0169] In an embodiment of the present application, as shown in FIG6 , FIG6 is a bottom view of the positional relationship between the first semiconductor layer and the dam of a light-emitting chip provided in an embodiment of the present application. The distance between the first pair of feature points on the surface of the first semiconductor layer 301 in the light-emitting unit 300 facing the first substrate 100 is the first distance D1. A second pair of feature points corresponding to the first pair of feature points exists on the outer contour of the inner region enclosed by the orthographic projection of the first inner contour surface S4 of the dam 400 on the first substrate 100, and the distance between the second pair of feature points is the second distance D2. The second distance D2 and the first distance D1 satisfy: (D2-D1) is less than or equal to 30 microns. The second pair of feature points refers to a pair of feature points on the outer contour of the inner region enclosed by the orthographic projection of the first inner contour surface S4 on the first substrate 100, obtained by intercepting the straight line on which the orthographic projection of the first pair of feature points on the first substrate 100 lies. Among them, the outer contour of the internal area enclosed by the orthographic projection of the first inner contour surface S4 on the first substrate 100 refers to the internal area enclosed by the orthographic projection of the first inner contour surface S4 on the first substrate 100, and does not include the part of the orthographic projection of the first inner contour surface S4 on the first substrate 100. This part has an outer contour edge, which is the outer contour of the internal area enclosed by the orthographic projection of the first inner contour surface S4 on the first substrate 100.

[0170] Specifically, during the preparation of the chip structure 000, corresponding to steps S301-S308 in the following embodiments, the dam 400 can be fixed on the temporary substrate before the light-emitting unit 300. In this way, when the light-emitting unit is subsequently transferred to the temporary substrate, the transfer accuracy of the light-emitting unit 300 can be improved, thereby avoiding the alignment deviation between the optical functional part 202 and the sub-light-emitting functional layer 300a in the subsequent production process of the color conversion unit 200, which affects the light-emitting effect of the chip structure 000.

[0171] Corresponding to different precision requirements, for example, (D2-D1) is less than or equal to 10 microns. For example, (D2-D1) is less than or equal to 5 microns. For example, (D2-D1) is less than or equal to 3 microns. For example, (D2-D1) is less than or equal to 2 microns. For example, (D2-D1) is less than or equal to 1 micron. For example, (D2-D1) is less than or equal to 0.8 microns. For example, (D2-D1) is less than or equal to 0.5 microns.

[0172] It should be noted that, when the shape of the cross section of the dam 400 perpendicular to the first substrate 100 and perpendicular to the extension direction of the dam 400 is a trapezoid that is upright relative to the first substrate 100, for the accommodating space enclosed by the dam 400 for accommodating the light-emitting unit 300, the cross-sectional areas of the accommodating space on the extension surface parallel to the first substrate 100 gradually increase from top to bottom (that is, along the direction from the first substrate 100 to the dam 400).

[0173] In other possible implementations, as shown in Figure 7, Figure 7 is a schematic diagram of the membrane structure of a chip structure provided by another embodiment of the present application. For the accommodating space enclosed by the dam 400 for accommodating the light-emitting unit 300, the cross-sectional areas of the interior of the accommodating space on the extension surface parallel to the first substrate 100 can gradually decrease along the direction from the first substrate 100 to the dam 400.

[0174] Exemplarily, the cross-section of the dam 400 perpendicular to the first substrate 100 and perpendicular to the extension direction of the dam 400 has a shape of at least one of an inverted trapezoid, an inverted triangle, and an inverted arc relative to the first substrate 100. Specifically, with reference to FIG7 , the inverted trapezoid can be understood as: the lower base of the trapezoid with shorter sides is closer to the first substrate 100 relative to the upper base with longer sides. With reference to FIG8 , FIG8 is a schematic diagram of the membrane layer structure of another chip structure provided in another embodiment of the present application, and the inverted triangle can be understood as: the vertex of the triangle is closer to the first substrate 100 relative to the base. With reference to FIG9 , FIG9 is a schematic diagram of the membrane layer structure of another chip structure provided in another embodiment of the present application, and the inverted arc can be understood as: the arc side of the arc shape is closer to the first substrate 100 relative to the base.

[0175] Thus, the dam 400 provides a "wide at the top and narrow at the bottom" accommodation space, which is conducive to effective placement during transfer. It can be understood that even if there is a position deviation during transfer, the light-emitting unit 300 can slide into the bottom of the accommodation space provided by the dam 400, achieving precise control of the transfer position of the light-emitting unit.

[0176] In an embodiment of the present application, as shown in FIG5 , the chip structure 000 may further include a filling portion 500 . At least a portion of the filling portion 500 may be located within the region enclosed by the dam 400 . A portion of the filling portion 500 may be located between the light-emitting unit 300 and the first inner contour surface S4 of the dam 400 , while another portion of the filling portion 500 may be located on a side of the light-emitting unit 300 away from the first substrate 100 . Furthermore, the filling portion 500 may be disposed in contact with both the first inner contour surface S4 of the dam 400 and the light-emitting unit 400 .

[0177] Illustratively, the filling portion 500 may be an integral structure, that is, the filling portion 500 is continuously distributed at any position inside the filling portion 500 without obvious material boundaries.

[0178] Exemplarily, the material of the filling portion 500 at any position therein is the same.

[0179] For example, the filling portion 500 has light absorption properties, such as black dye mixed in the substrate. For example, when there are multiple optical function parts 201, such a filling portion 500 can reduce or avoid the propagation of light therein, thereby reducing or avoiding color crosstalk.

[0180] For example, the filling portion 500 is reflective, for example, a reflective organic material is mixed into the substrate. For example, when there is only one optical function portion 201 , such a filling portion 500 can improve the light extraction efficiency of the chip structure 000 .

[0181] For example, the filling portion 500 in the chip structure 000 may include a first sub-filling portion 501 and a second sub-filling portion 502. Here, at least a portion of the first sub-filling portion 501 may be located between the light-emitting unit 300 and the first inner contour surface S4 of the dam 400, and the first sub-filling portion 501 may be disposed in contact with the first inner contour surface S4 of the dam 400. The second sub-filling portion 502 may be located on a side of the light-emitting unit 500 away from the first substrate 100, and the second sub-filling portion 502 may be disposed in contact with the light-emitting unit 400. The side of the first sub-filling portion 501 facing away from the first inner contour surface S4 may be disposed in contact with the second sub-filling portion 502.

[0182] It should be noted that the second sub-filling portion 502 can be distributed on the side of the first semiconductor layer 301 in the light-emitting unit 300 that is away from the first substrate 100, and the second sub-filling portion 502 can be arranged in contact with the side of the first semiconductor layer 301 that is away from the first substrate 100, or can be arranged in contact with the sub-light-emitting functional layer 300a in the light-emitting unit 300.

[0183] In one possible scenario, during the fabrication process of the chip structure 000, a first colloid is required to secure the light-emitting unit 300 to a temporary substrate. After the temporary substrate is subsequently peeled off, the cured product of the first colloid will remain on the light-emitting unit 300. Therefore, the second sub-filling portion 502 in the filling portion 500 is the cured product of the first colloid. For example, the first colloid is made of an organic material with adhesive properties, such as an epoxy resin-based organic adhesive material.

[0184] Furthermore, during the fabrication of chip structure 000, a second colloid is required to fill the gap between light-emitting unit 300 and dam 400. Therefore, the portion obtained after the second colloid is cured is the first sub-filling portion 501 within the filling portion 500. In other words, the first sub-filling portion 501 within the filling portion 500 can be the product of the second colloid being cured to fill the gap between light-emitting unit 300 and dam 400. For example, the material of the second colloid can be an organic resin material that is transparent to visible light. Therefore, the material of the first sub-filling portion 501 here is also an organic resin material that is transparent to visible light.

[0185] During the manufacturing process, the materials of the first colloid and the second colloid may be different, and thus the materials of the first sub-filling portion 501 and the second sub-filling portion 502 may be different.

[0186] For example, the first sub-filling portion 501 and the second sub-filling portion 502 may be made of the same material.

[0187] For example, at least one of the first sub-filling portion 501 and the second sub-filling portion 502 has light absorption properties, such as a black dye mixed in the substrate. For example, when there are multiple optical function portions 201, such an arrangement can reduce or prevent the propagation of light therein, thereby reducing or preventing color crosstalk.

[0188] For example, at least one of the first sub-filling portion 501 and the second filling portion 502 is reflective, for example, a reflective organic material is mixed into the substrate. For example, when the number of the optical function portion 201 is one, such a configuration can improve the light extraction efficiency of the chip structure 000.

[0189] In the embodiment of the present application, as shown in FIG5 , the definition dam 201 in the color conversion unit 200 may have a third surface S5 facing the first substrate 100, a fourth surface S6 facing away from the first substrate 100, and a second outer contour surface S7 located between the third surface S5 and the fourth surface S6. The second outer contour surface S7 may be a surface that entirely surrounds the periphery of the definition dam 201, that is, the second outer contour surface S7 may be the outer side surface of the definition dam 201.

[0190] Here, since the definition dam 201 in the color conversion unit 200 is composed of an organic material and is formed on the first surface S1 of the dam 400, rather than on the first substrate 100, and the thickness of the definition dam 201 meets the thickness requirement for defining the thickness of the optically functional portion 202, for example, the thickness of the definition dam 201 can range from 4 to 15 microns. Therefore, after the definition dam 201 is formed through an exposure and development process, the width of the third surface S5 of the definition dam 201 can be greater than the width of the fourth surface S6. For example, the orthographic projection of the fourth surface S6 of the definition dam 201 on the first substrate 100 can be within the orthographic projection of the third surface S5 of the definition dam 201 on the first substrate 100. Furthermore, the angle α3 between the third surface S5 of the definition dam 201 and the second outer contour surface S7 is an acute angle, while the angle β3 between the fourth surface S6 of the definition dam 201 and the second outer contour surface S7 is an obtuse angle.

[0191] In the embodiment of the present application, there are many possible situations for the positional relationship of the filling portion 500 in the chip structure 000 between the light-emitting unit 300 and the dam 400. The embodiment of the present application will be schematically described using the following four possible situations as examples:

[0192] In the first possible scenario, as shown in Figure 10, which is a schematic diagram of another film layer structure at the AA' position of the chip structure shown in Figure 1, the minimum distance between the filling portion 500 in the chip structure 000 and the first substrate 100 is greater than the distance between the first surface S1 of the dam 400 and the first substrate 100. In this case, the dam 400 in the chip structure 000 can directly contact the limiting dam 201 in the color conversion unit 200.

[0193] For example, during the fabrication of the chip structure 000, when a second colloid is used to fill the gap between the light-emitting unit 300 and the dam 400, the second colloid can be printed at least into the gap between the light-emitting unit 300 and the dam 400 through an inkjet printing process, without being printed onto the first surface S1 of the dam 400. Thus, in the fabricated chip structure 000, the minimum distance between the filling portion 500 and the first substrate 100 can be greater than the distance between the first surface S1 of the dam 400 and the first substrate 100. Of course, in other possible scenarios, the minimum distance between the filling portion 500 and the first substrate 100 can also be equal to the distance between the first surface S1 of the dam 400 and the first substrate 100.

[0194] Furthermore, since the second colloid used in the preparation process of the chip structure 000 can form the first sub-filling portion 501 in the filling portion 500 after curing, the first sub-filling portion 501 in the filling portion 500 will not be distributed on the first surface S1 of the dam 400, so that the first surface S1 of the dam 400 can directly contact the side of the limiting dam 201 in the color conversion unit 200 that is away from the first substrate 100.

[0195] In a second possible scenario, as shown in FIG10 , the minimum distance between the filling portion 500 in the chip structure 000 and the first substrate 100 is greater than the distance between the light-emitting unit 300 and the first substrate 100. In this case, the light-emitting unit 300 in the chip structure 000 can directly contact the defining dam 201 in the color conversion unit 200. Here, the distance between the light-emitting unit 300 and the first substrate 100 is the distance between the side of the first semiconductor layer 301 in the light-emitting unit 300 facing the first substrate 100 and the first substrate 100. To this end, the defining dam 201 in the color conversion unit 200 can directly contact the first semiconductor layer 301 in the light-emitting unit 300. In this case, the distance between the first semiconductor layer 301 and the optical functional portion 202 can be minimized, allowing more light emitted by the sub-light-emitting functional layer 300a to enter the corresponding optical functional portion 202, thereby improving the light extraction efficiency of the chip structure 000. Furthermore, when there are multiple sub-light-emitting functional layers 300a, the distance between the sub-light-emitting functional layer 300a and the corresponding optical functional part 202 is small, which can reduce or avoid the light of the sub-light-emitting functional layer 300a entering other optical functional parts 202, and reduce or avoid color crosstalk in the chip structure 000.

[0196] For example, during the fabrication of the chip structure 000, when a second colloid is used to fill the gap between the light-emitting unit 300 and the dam 400, the second colloid can be printed at least into the gap between the light-emitting unit 300 and the dam 400 using an inkjet printing process, without being printed onto the side of the first semiconductor layer 301 in the light-emitting unit 300 that faces the first substrate 100. Thus, in the fabricated chip structure 000, the minimum distance between the filling portion 500 and the first substrate 100 can be greater than the distance between the first semiconductor layer 301 in the light-emitting unit 300 and the first substrate 100. Of course, in other possible scenarios, the minimum distance between the filling portion 500 and the first substrate 100 can also be equal to the distance between the first semiconductor layer 301 and the first substrate 100.

[0197] Furthermore, since the second colloid used in the preparation process of the chip structure 000 can form the first sub-filling portion 501 in the filling portion 500 after curing, the first sub-filling portion 501 in the filling portion 500 is not distributed on the side of the first semiconductor layer 301 in the light-emitting unit 300 facing the first substrate 100, so that the side of the first semiconductor layer 301 facing the first substrate 100 can directly contact the side of the limiting dam 201 in the color conversion unit 200 facing away from the first substrate 100.

[0198] A third possible scenario is shown in FIG11 , which is a schematic diagram of another film layer structure at the AA' position of the chip structure shown in FIG1 . A portion of the filling portion 500 in the chip structure 000 may be located on the side of the first surface S1 of the dam 400 that is closer to the first substrate 100. In this case, the minimum distance between the filling portion 500 in the chip structure 000 and the first substrate 100 may be less than the distance between the first surface S1 of the dam 400 and the first substrate 100.

[0199] For example, during the fabrication of chip structure 000, when a second colloid is used to fill the gap between light-emitting unit 300 and dam 400, the second colloid can be printed at least into the gap between light-emitting unit 300 and dam 400 using an inkjet printing process. For example, the second colloid also remains on first surface S1 of dam 400. Furthermore, since the second colloid used during the fabrication of chip structure 000 forms the first sub-filling portion 501 of the filling portion 500 after curing, a portion of the first sub-filling portion 501 of the filling portion 500 is distributed on first surface S1 of dam 400.

[0200] For example, the second colloid is configured to be printed onto the first surface S1 of the dam 400, or, after being printed into the gap between the light-emitting unit 300 and the dam 400, overflow onto the first surface S1 of the dam 400. Consequently, a portion of the first sub-filling portion 501 of the filling portion 500 is distributed over the first surface S1 of the dam 400. Referring to FIG11 , the first sub-filling portion 501 includes a portion located on the first surface S1 of the dam 400 and a portion located on the surface of the first semiconductor layer 301 facing the first substrate 100. A smooth transition exists between these two portions, thereby reducing the topographical complexity of the color conversion unit 200 facing away from the first substrate 100 and preventing poor light output from the color conversion unit 200 due to topographical interference. Preferably, the portion of the first sub-filling portion 501 located on the first surface S1 of the dam 400 and the portion located on the surface of the first semiconductor layer 301 facing the first substrate 100 are both located in the same plane, or approximately in the same plane.

[0201] For example, the second colloid is configured to be printed onto the first surface S1 of the dam 400, which may also be caused by limitations in printing accuracy. For example, during the printing process of the second colloid, part of the second colloid will adhere to the first surface S1 and then be solidified. Furthermore, part of the second colloid will fall between the dams 400 corresponding to adjacent chip structures 000 and then be solidified. These second colloids that fall between the dams 400 corresponding to adjacent chip structures 000 and then be solidified can be removed through an ashing process in subsequent processes, thereby not affecting the segmentation of the chip motherboard. Therefore, from another perspective, due to the presence of the dam 400, the printing accuracy of the second colloid has little effect on the preparation of the chip structure 000. Preferably, to facilitate the entry of the second colloid into the gap between the light-emitting unit 300 and the dam 400, the first surface S1 includes an inner contour edge on the side proximal to the light-emitting unit 300 and an outer contour edge on the side distal to the light-emitting unit 300. The distance between the inner contour edge proximal to the light-emitting unit 300 and the first substrate 100 is greater than the distance between the outer contour edge distal to the light-emitting unit 300 and the first substrate. This allows the second colloid that lands on the first surface S1 during printing to slide into the gap between the light-emitting unit 300 and the dam 400. Preferably, the first surface S1 of the dam 400 includes at least one of an inclined surface, a stepped surface, and a curved surface that tilts toward the light-emitting unit 300. With this design, the dam 400 can be fabricated in a single pass using a semi-transparent mask process.

[0202] In a fourth possible scenario, as shown in FIG11 , a portion of the filling portion 500 in the chip structure 000 may be located on a side of the light-emitting unit 300 close to the first substrate 100. Here, a portion of the filling portion 500 in the chip structure 000 may be located on a side of the first semiconductor layer 301 in the light-emitting unit 300 close to the first substrate 100. In this case, the minimum distance between the filling portion 500 in the chip structure 000 and the first substrate 100 may be smaller than the distance between the first semiconductor layer 301 and the first substrate 100.

[0203] For example, during the fabrication of the chip structure 000, when a second colloid is used to fill the gap between the light-emitting unit 300 and the dam 400, the second colloid can be printed into the gap between the light-emitting unit 300 and the dam 400 and onto the side of the first semiconductor layer 301 close to the first substrate 100 through an inkjet printing process. Alternatively, the second colloid can be printed into the gap between the light-emitting unit 300 and the dam 400 and then overflow onto the side of the first semiconductor layer 301 close to the first substrate 100. Furthermore, since the second colloid used during the fabrication of the chip structure 000 can form the first sub-filling portion 501 in the filling portion 500 after curing, a portion of the first sub-filling portion 501 in the filling portion 500 can be distributed on the side of the first semiconductor layer 301 close to the first substrate 100.

[0204] Specifically, the thickness of the filling portion 500 located on the side of the light-emitting unit 300 close to the first substrate 100 can be set to be less than 1 micron, preferably less than 0.9 micron, for example, less than 0.8 micron or less than 0.5 micron. For example, it can be 0.9 micron, 0.8 micron, 0.7 micron, 0.6 micron, 0.5 micron, 0.4 micron, 0.3 micron, 0.2 micron, 0.1 micron, or even less than 0.1 micron. For example, the thickness of the filling portion 500 located on the side of the light-emitting unit 300 close to the first substrate 100 can be made as small as possible while maintaining a smooth transition between the first sub-filling portion 501 including: the portion located on the first surface S1 of the dam 400 and the portion located on the surface of the first semiconductor layer 301 facing the first substrate 100. In this case, the distance between the first semiconductor layer 301 and the optical functional portion 202 can be minimized, so that more light emitted by the sub-light-emitting functional layer 300a enters the corresponding optical functional portion 202, thereby improving the light extraction efficiency of the chip structure 000.

[0205] It is understandable that, due to the presence of the dam 400 , the thickness of the filling portion 500 located on the side of the light emitting unit 300 close to the first substrate 100 can be more accurately controlled by designing the difference between the thickness of the dam 400 and the thickness of the light emitting unit 300 .

[0206] It should be noted that the above embodiments are schematically illustrated using four possible scenarios. For example, when using the second colloid to fill the gap between the light-emitting unit 300 and the dam 400, the second colloid can be printed only within the gap between the light-emitting unit 300 and the dam 400 through an inkjet printing process, without being printed outside the gap. In this way, as shown in FIG10 , the limiting dam 201 in the color conversion unit 200 can directly contact not only the dam 400 but also the light-emitting unit 300. Of course, in the process of using the second colloid to fill the gap between the light-emitting unit 300 and the dam 400, the second colloid is not only printed into the gap between the light-emitting unit 300 and the dam 400 through the inkjet printing process, but also the second colloid is printed on the first surface S1 of the dam 400, and the second colloid is also printed on the side of the light-emitting unit 300 close to the first substrate 100. In this way, as shown in Figure 11, a part of the filling portion 500 in the chip structure 000 can be distributed not only on the first surface S1 of the dam 400, but also on the side of the light-emitting unit 300 close to the first substrate 100.

[0207] It should also be noted that, in other possible implementations, a portion of the filling portion 500 within the chip structure 000 may be distributed only on the first surface S1 of the dam 400, and not distributed on the side of the light-emitting unit 300 close to the first substrate 100; or, a portion of the filling portion 500 within the chip structure 000 may be distributed only on the side of the light-emitting unit 300 close to the first substrate 100, and not distributed on the first surface S1 of the dam 400.

[0208] In a specific implementation, a second colloid with high fluidity can be used to fully fill the gap between the light-emitting unit 300 and the dam 400, while not easily remaining on the first surface S1 of the dam 400 and the surface of the light-emitting unit 300 close to the first substrate 100.

[0209] In the present application, the material defining the dam 201 may include at least one of a light-reflecting organic material and a light-absorbing organic material. In this case, the distance between the first surface S1 of the dam 400 in the chip structure 000 and the first substrate 100 may be less than or equal to the distance between the first semiconductor layer 301 in the light-emitting unit 300 and the first substrate 100, or may be greater than the distance between the first semiconductor layer 301 in the light-emitting unit 300 and the first substrate 100. For example, the material defining the dam 201 may be the same as the material of the dam 400.

[0210] For example, when the distance between the first surface S1 of the dam 400 in the chip structure 000 and the first substrate 100 is less than or equal to the distance between the first semiconductor layer 301 in the light-emitting unit 300 and the first substrate 100, as shown in FIG11 , after an optical waveguide phenomenon occurs within the first semiconductor layer 301, light propagating laterally within the first semiconductor layer 301 may be blocked by the dam 400. When the distance between the first surface S1 of the dam 400 in the chip structure 000 and the first substrate 100 is greater than the distance between the first semiconductor layer 301 in the light-emitting unit 300 and the first substrate 100, as shown in FIG10 , after an optical waveguide phenomenon occurs within the first semiconductor layer 301, a portion of the light propagating laterally within the first semiconductor layer 301 may be blocked by the dam 400. However, because the dam 400 and the defining dam 201 may be stacked together, another portion of the light propagating laterally within the first semiconductor layer 301 may be blocked by the defining dam 201.

[0211] In an embodiment of the present application, as shown in Figures 5-7, there is an area S11 on the first surface S1 of the dam 200 that can be covered by the fourth surface S6 of the limiting dam 201, and there is also an area S12 that is not covered by the fourth surface S6 of the limiting dam 201, and the area S12 on the first surface S1 of the dam 200 that is not covered by the fourth surface S6 can be distributed around the area S11 on the first surface S1 of the dam 200 that is covered by the fourth surface S6.

[0212] In one specific embodiment, referring to FIG5 , the orthographic projection of the second surface S2 of the dam 400 on the first substrate 100 lies within the orthographic projection of the first surface S1 of the dam 400 on the first substrate 100. Therefore, the first outer contour of the orthographic projection of the dam 400 on the first substrate 100 can be: the outer boundary of the orthographic projection of the first surface S1 of the dam 400 on the substrate 100. Similarly, since the orthographic projection of the fourth surface S6 of the dam 201 on the first substrate 100 lies within the orthographic projection of the third surface S5 of the dam 201 on the first substrate 100, the second outer contour of the orthographic projection of the dam 201 on the first substrate 100 can be: the outer boundary of the orthographic projection of the third surface S5 of the dam 201 on the first substrate 100. Furthermore, the second outer contour of the orthographic projection of the dam 201 on the first substrate 100 lies within the region enclosed by the first outer contour of the orthographic projection of the dam 400 on the first substrate 100, and the fourth surface S6 of the dam 201 faces the second surface S2 of the dam 400.

[0213] In a specific embodiment, as shown in FIG11 , when a portion of the filling portion 500 in the chip structure 000 is located on a side of the first surface S1 of the dam 400 close to the first substrate 100, the portion of the filling portion 500 located on the first surface S1 of the dam 400 may include a first subportion covered by the fourth surface S6 of the dam 201 and a second subportion not covered by the fourth surface S6 of the dam 201. The second subportion may be distributed around the first subportion.

[0214] In the embodiment of the present application, as shown in Figures 10 and 11 , the fourth surface S6 of the dam 201 may include a first region S61 and a second region S62. The first region S61 of the fourth surface S6 of the dam 201 is a region disposed opposite the first surface S1 of the dam 400 and capable of extending along the first surface S1 of the dam 400. The second region S62 of the fourth surface S6 of the dam 201 is a region disposed opposite the light-emitting unit 300 and capable of extending along the surface of the light-emitting unit 300 adjacent to the first substrate 100. In other words, the orthographic projection of the first region S61 of the fourth surface S6 of the dam 201 onto the first substrate 100 may be within the orthographic projection of the dam 400 onto the first substrate 100, while the orthographic projection of the second region S62 of the fourth surface S6 of the dam 201 onto the first substrate 100 may be within the orthographic projection of the light-emitting unit 300 onto the first substrate 100.

[0215] In one possible scenario, as shown in FIG10 , the distance between the first region S61 of the fourth surface S6 of the dam 201 and the first substrate 100 may be greater than the distance between the second region S62 of the fourth surface S6 of the dam 201 and the first substrate 100. In this case, the distance between the first surface S1 of the dam 400 and the first substrate 100 may be greater than the distance between the side of the first semiconductor layer 301 in the light-emitting unit 300 facing the first substrate 100 and the first substrate 100. To this end, after the optical waveguide phenomenon occurs within the first semiconductor layer 301, a portion of the light laterally transmitted within the first semiconductor layer 301 can be blocked by the dam 400, while another portion of the light can be blocked by the dam 201.

[0216] In another possible scenario, the distance between the first region S61 of the fourth surface S6 defining the dam 201 and the first substrate 100 may be smaller than the distance between the second region S62 of the fourth surface S6 defining the dam 201 and the first substrate 100. In this case, the distance between the first surface S1 of the dam 400 and the first substrate 100 may be smaller than the distance between the side of the first semiconductor layer 301 in the light-emitting unit 300 facing the first substrate 100 and the first substrate 100. To this end, after the optical waveguide phenomenon is generated within the first semiconductor layer 301, all light transmitted laterally within the first semiconductor layer 301 can be blocked by the dam 400.

[0217] Of course, in other possible scenarios, the distance between the first region S61 of the fourth surface S6 defining the dam 201 and the first substrate 100 may also be equal to the distance between the second region S62 of the fourth surface S6 defining the dam 201 and the first substrate 100. That is, the first region S61 and the second region S62 of the fourth surface S6 defining the dam 201 are flush. In this case, the first surface S1 of the dam 400 may be flush with the side of the first semiconductor layer 301 in the light-emitting unit 300 that faces the first substrate 100. After the optical waveguide phenomenon is generated within the first semiconductor layer 301, all light transmitted laterally within the first semiconductor layer 301 may also be blocked by the dam 400.

[0218] In the embodiment of the present application, the fourth surface S6 of the dam 201 may further include a third region S63 disposed opposite the portion of the filling portion 500 located between the light-emitting unit 300 and the dam 400. Here, the third region S63 of the fourth surface S6 of the dam 201 may be located between the first region S61 and the second region S62. In other words, the orthographic projection of the third region S62 of the fourth surface S6 of the dam 201 onto the first substrate 100 may be located within the orthographic projection of the portion of the filling portion 500 located between the light-emitting unit 300 and the dam 400 onto the first substrate 100.

[0219] For example, at least one of the distance between the third area S63 in the fourth surface S6 of the dam 201 and the first substrate 100, the distance between the first area S61 in the fourth surface S6 of the dam 201 and the first substrate 100, and the distance between the second area S62 in the fourth surface S6 of the dam 201 and the first substrate 100 is different from the other two, or the three distances are different.

[0220] For example, the first region S61, the second region S62, and the third region S63 of the fourth surface S6 of the dam 201 are spaced apart from the first substrate 100, and are conformal to the surface in contact with the first region S61, the second region S62, and the third region S63. This is due to the process sequence for fabricating the chip structure 000, that is, after the filling portion 500 is fabricated in the gap between the light-emitting unit 300 and the dam 400 on the temporary substrate (which may also include filling in other positions disclosed in this application), the defining dam 201 is fabricated on the side of the light-emitting unit 300, the dam 400, and the filling portion 500 as a whole, away from the temporary substrate, thereby achieving a "bottom-up" fabrication process for the chip structure 000. In one possible case, as shown in FIG10 , when the filling portion 500 is not provided on the first surface S1 of the dam 400, nor on the side of the light-emitting unit 300 facing the first substrate 100, the first region S61 in the fourth surface S6 of the dam 201 may be in direct contact with the first surface S1 of the dam 400, and the distance between the first region S61 in the fourth surface S6 of the dam 201 and the first substrate 100 is equal to the distance between the first surface S1 of the dam 400 and the first substrate 100; the second region S62 in the fourth surface S6 of the dam 201 may be in direct contact with the side of the light-emitting unit 300 facing the first substrate 100, and the distance between the first region S61 in the fourth surface S6 of the dam 201 and the first substrate 100 is equal to the distance between the first surface S1 of the dam 400 and the first substrate 100; The distance between the second area S62 in the fourth surface S6 of the dam 201 and the first substrate 100 is: the distance between the side of the light-emitting unit 300 facing the first substrate 100 and the first substrate 100; the third area S63 in the fourth surface S6 of the dam 201 can be in direct contact with a part of the filling portion 500, and this part of the filling portion 500 is distributed between the light-emitting unit 300 and the dam 400. The distance between the third area S63 in the fourth surface S6 of the dam 201 and the first substrate 100 is: the distance between the side of the filling portion 500 distributed between the light-emitting unit 300 and the dam 400 facing the first substrate 100 and the first substrate 100.

[0221] In another possible scenario, as shown in FIG11 , when a portion of the filling portion 500 is distributed both on the first surface S1 of the dam 400 and on the side of the light-emitting unit 300 facing the first substrate 100, the filling portion 500 may not only be distributed within the gap between the light-emitting unit 300 and the dam 400, but may also cover both the light-emitting unit 300 and the dam 400. In this case, the defining dam 201 may be distributed on the side of the portion of the filling portion 500 located on the light-emitting unit 300 and the dam 400 facing the first substrate 100. That is, the fourth surface S6 of the defining dam 201 may be in direct contact with the portion of the filling portion 500 located on the light-emitting unit 300 and the dam 400. Therefore, the distances between the first region S61, the second region S62, and the third region S63 on the fourth surface S6 of the dam 201 and the first substrate 100 are related to the shape of the portion of the filling portion 500 located on the light emitting unit 300 and the dam 400 extending toward the surface of the first substrate 100. In an exemplary implementation, if the portion of the filling portion 500 located on the light emitting unit 300 and the dam 400 is flush with the surface of the first substrate 100, the first region S61, the second region S62, and the third region S63 on the fourth surface S6 of the dam 201 are also flush.

[0222] 10 and 11 , the light emitting unit 300 in the chip structure 000 may further include a connecting electrode 300 b . The connecting electrode 300 b in the light emitting unit 300 may be located on a side of the light emitting unit 300 that is farthest from the first substrate 100 .

[0223] Specifically, when chip structure 000 serves as a display pixel (or sub-pixel) of a display substrate, connecting electrode 300b is used to connect chip structure 000 to a drive circuit to achieve electrical control and fixation of the chip. For example, chip structure 000 can be electrically connected to the drive circuit by welding. For example, the drive circuit is located within a drive substrate, and chip structures 000 are arranged in an array on the drive substrate.

[0224] In a specific embodiment, the distance between the surface of the connecting electrode 300 b facing away from the first substrate 100 and the first substrate 100 may be greater than the distance between the second surface S2 of the dam 400 and the first substrate 100 .

[0225] For example, during the fabrication of the chip structure 000, the connecting electrode 300b in the light-emitting unit 300 needs to be fixed to the temporary substrate via a first colloid. After the temporary substrate is peeled off, the side of the connecting electrode 300b facing away from the first substrate 100 can be ashed to remove residual glue between the chips 000. Therefore, if the dam 400 also includes an organic material, a portion of the dam 400 facing away from the first substrate 100 will also be ashed and removed during the ashing process.

[0226] In one embodiment, a debonding layer exists between the temporary substrate and the chip structure 000, the connecting electrode 300b is in direct contact with the debonding layer, and the dam 400 is formed on the debonding layer. Therefore, after the temporary substrate is peeled off (the debonding layer is removed to separate the temporary substrate and the chip structure 000 from each other), and before the ashing process, the distance between the side of the connecting electrode 300b facing away from the first substrate 100 and the first substrate can be equal to the distance between the second surface S2 of the dam 400 and the first substrate 100. After the ashing process, since a portion of the side of the dam 400 facing away from the first substrate 100 is ashed and removed, the connecting electrode 300b is less susceptible to ashing erosion. Therefore, the distance between the surface of the connecting electrode 300b facing away from the first substrate 100 and the first substrate 100 can be greater than the distance between the second surface S2 of the dam 400 and the first substrate 100. In this case, the side of the connecting electrode 300b in the light-emitting unit 300 facing away from the first substrate 100 can be welded to the driving backplane through a welding process. Therefore, when the distance between the surface of the connecting electrode 300b facing away from the first substrate 100 and the first substrate 100 is greater than the distance between the second surface S2 of the dam 400 and the first substrate 100, the stability of the welding between the connecting electrode 300b and the driving backplane can be guaranteed to be higher.

[0227] In one embodiment, a debonding layer exists between the temporary substrate and the chip structure 000, and a product of the cured first colloid is further provided between the connecting electrode 300b and the debonding layer. The dam 400 is formed on the debonding layer. Therefore, after the connecting electrode 300b is peeled off from the temporary substrate (the debonding layer is removed to separate the temporary substrate and the chip structure 000 from each other), but before ashing, the distance between the side of the connecting electrode 300b facing away from the first substrate 100 and the first substrate 100 is less than the distance between the second surface S2 of the dam 400 and the first substrate 100. In this case, because a portion of the side of the dam 400 facing away from the first substrate 100 and the product of the cured first colloid are removed by ashing, the connecting electrode 300b is less susceptible to ashing erosion. Therefore, the distance between the surface of the connecting electrode 300b facing away from the first substrate 100 and the first substrate 100 can ultimately be greater than, equal to, or less than the distance between the second surface S2 of the dam 400 and the first substrate 100 (depending on the erosion rates of the dam 400 and the product of the cured first colloid during ashing). For example, the thickness of the product of the first colloid solidified between the connecting electrode 300b and the debonding layer can be designed so that the distance between the surface of the connecting electrode 300b facing away from the first substrate 100 and the first substrate 100 can be less than or equal to the distance between the second surface S2 of the dam 400 and the first substrate 100. In this way, the dam 400 can better protect the chip structure 000 from light leakage on the side. At the same time, good welding can be achieved by raising the pad corresponding to the supporting base of the chip structure 000, or by increasing the overall thickness of the conductive part of the connecting electrode area using the thickness of the solder.

[0228] In the embodiment of the present application, a debonding layer exists between the temporary substrate and the chip structure 000. The dam 400 is formed on the debonding layer, and the filling portion 500 is in direct contact with the debonding layer. Therefore, after the connection electrode 300b is peeled off from the temporary substrate (the debonding layer is removed to separate the temporary substrate and the chip structure 000), but before the ashing process, the distance between the side of the filling portion 500 facing away from the first substrate 100 and the first substrate is equal to the distance between the second surface S2 of the dam 400 and the first substrate 100.

[0229] In one case, during the ashing process, the ashing efficiency of the side of the dam 400 facing away from the first substrate 100 is lower than the ashing efficiency of the side of the filling portion 500 facing away from the first substrate 100. Therefore, as shown in FIG10 and FIG11 , the distance between the second surface S2 of the dam 400 and the first substrate 100 may be greater than the distance between the surface of the portion of the filling portion 500 located between the dam 400 and the light-emitting unit 300 and the first substrate 100.

[0230] In one embodiment, during the ashing process, the ashing efficiency of the side of the dam 400 facing away from the first substrate 100 is higher than the ashing efficiency of the side of the filling portion 500 facing away from the first substrate 100. Therefore, as shown in FIG10 and FIG11 , the distance between the second surface S2 of the dam 400 and the first substrate 100 may be smaller than the distance between the surface of the portion of the filling portion 500 located between the dam 400 and the light-emitting unit 300 and the first substrate 100.

[0231] In the present application, as shown in Figures 12, 13 and 14, Figure 12 is a top view of another chip structure provided in an embodiment of the present application, Figure 13 is a schematic diagram of the film layer structure of the chip structure shown in Figure 12 at B-B', and Figure 14 is a schematic diagram of the film layer structure of the chip structure shown in Figure 12 at C-C'. The multiple sub-light-emitting functional layers in the light-emitting unit 300 may include: a first sub-light-emitting functional layer 300a1, a second sub-light-emitting functional layer 300a2 and a third sub-light-emitting functional layer 300a3. Here, the first sub-light-emitting functional layer 300a1, the second sub-light-emitting functional layer 300a2 and the third sub-light-emitting functional layer 300a3 are all used to emit a first light in a working state.

[0232] Accordingly, the plurality of opening regions defined in the dam 201 may include a first opening region K11, a second opening region K12, and a third opening region K13. The first opening region K11 may be disposed opposite the first sub-light-emitting functional layer 300a1, the second opening region K12 may be disposed opposite the second sub-light-emitting functional layer 300a2, and the third opening region K13 may be disposed opposite the third sub-light-emitting functional layer 300a3.

[0233] Here, the first opening area K11 and the second opening area K12 are arranged in a row in the first direction X, and the second opening area K12 and the third opening area K13 are arranged in a row in the second direction Y. The first direction X intersects the second direction Y. For example, the first direction X can be perpendicular to the second direction Y. In this application, the area enclosed by the outer contour of the dam 201 is defined as a rectangle; the first opening area K11, the second opening area K12, and the third opening area K13 are all rectangular in shape.

[0234] The plurality of optical function portions 201 in the color conversion unit 200 may include a first optical function portion 201a, a second optical function portion 201b, and a third optical function portion 201c. The first optical function portion 201a may be located within the first opening area K11, the second optical function portion 201b may be located within the second opening area K12, and the third optical function portion 201c may be located within the third opening area K13.

[0235] In this case, the first light emitted by the first sub-light-emitting functional layer 300a1 can be directed toward the first optical functional portion 201a, and the first optical functional portion 201a converts the first light emitted by the first sub-light-emitting functional layer 300a1 into light of another color. The first light emitted by the second sub-light-emitting functional layer 300a1 can be directed toward the second optical functional portion 201b, and the second optical functional portion 201b converts the first light emitted by the second sub-light-emitting functional layer 300a2 into light of another color. The first light emitted by the third sub-light-emitting functional layer 300a3 can be directed toward the third optical functional portion 201c, and the first light can be transmitted through the third optical functional portion 201c or converted by the third optical functional portion 201c.

[0236] For example, the chip structure 000 may have a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B. The first light emitted by the first sub-light emitting functional layer 300a1, the second sub-light emitting functional layer 300a2, and the third sub-light emitting functional layer 300a3 in the light emitting unit 300 includes at least one of blue light and ultraviolet light.

[0237] Here, the first optical functional portion 201a is used to convert the first light into red light. For example, the first optical functional portion 201a includes red quantum dots that convert the first light into red light. Preferably, the first optical functional portion 201a also includes scattering particles for scattering the light. Here, after the first light emitted by the first sub-light-emitting functional layer 300a1 is emitted into the first optical functional portion 201a distributed within the first opening area K11, the red quantum dots can convert the first light into red light. The scattering particles can scatter the first light and red light, ensuring that more of the first light is converted into red light by the red quantum dots and that the output angle of the converted red light is larger, thereby ensuring a wider viewing angle for the display substrate integrated with this chip structure 000. To this end, the red sub-pixel R in the chip structure 000 may include: a first sub-light-emitting functional layer 300a2 and a first optical functional portion 201a.

[0238] The second optically functional portion 201b is configured to convert the first light into green light. For example, the second optically functional portion 201b includes green quantum dots that convert the first light into green light. Preferably, the second optically functional portion 201b also includes scattering particles for scattering the light. Here, after the first light emitted by the second sub-light-emitting functional layer 300a2 strikes the second optically functional portion 201b distributed within the second opening area K12, it is converted into green light by the green quantum dots. The scattering particles scatter the first and green light, ensuring that more of the first light is converted into green light by the green quantum dots. This also ensures that the emitted green light has a larger angle of emission, thereby increasing the viewing angle of the display substrate incorporating this chip structure 000. To this end, the red sub-pixel R in the chip structure 000 may include: the first sub-light-emitting functional layer 300a1 and the first optically functional portion 201a. To this end, the green sub-pixel G in the chip structure 000 may include: the second sub-light-emitting functional layer 300a2 and the second optically functional portion 201b.

[0239] The third optical functional portion 201c is used to convert the first light into blue light or maintain blue light emission. For example, when the first light only contains blue light, the third optical functional portion 201c can be a transparent portion or can include blue quantum dots; wherein the transparent portion is used to directly transmit the first light, and the blue quantum dots can be used to convert the first light into blue light of a different wavelength from the first light. Preferably, the third optical functional portion 201c also includes scattering particles that scatter light. Here, after the first light emitted by the third sub-light-emitting functional layer 300a3 is emitted to the third optical functional portion 201c distributed in the third opening area K13, the scattering particles can scatter the first light, thereby ensuring a larger emission angle of the blue light, thereby ensuring a larger viewing angle of the display substrate integrated with this chip structure 000. For another example, when the first light includes ultraviolet light, the third optically functional portion 201c includes blue quantum dots that convert the first light into blue light, or the third optically functional portion 201c includes both scattering particles for scattering light and blue quantum dots for converting ultraviolet light into blue light. Here, after the first light emitted by the second sub-light-emitting functional layer 300a2 strikes the third optically functional portion 201c distributed within the third opening area K13, the blue quantum dots convert the ultraviolet light in the first light into blue light. The scattering particles scatter the first light and the blue light, ensuring that more ultraviolet light is converted into blue light by the blue quantum dots. This also ensures that the output angle of the converted blue light is larger, thereby ensuring a wider viewing angle for a display substrate incorporating this chip structure 000. To this end, the blue sub-pixel B in the chip structure 000 may include: a third sub-light-emitting functional layer 300a3 and a third optically functional portion 201c.

[0240] In the present application, when the material of the defining dam 201 includes a reflective organic material, light emitted from the side of the optically functional portion 201 can be reflected back to the optically functional portion 201 by the defining dam 201, so that the quantum dots in the optically functional portion 201 can convert the blue or ultraviolet light in the reflected light into light of the corresponding color, thereby further improving the excitation efficiency of the quantum dots. In addition, the light reflected back by the defining dam 201 can be emitted from the side of the optically functional portion 201 toward the first substrate 100, thereby effectively improving the light extraction efficiency of the chip structure 000.

[0241] Optionally, the color conversion unit 200 in the chip structure 000 may further include an inorganic packaging structure for packaging the optical functional portion 202. Here, because the defining dam 201 in the color conversion unit 200 is formed on the first surface S1 of the dam 400 during the fabrication of the chip structure 000, the inorganic packaging structure in the color conversion unit 200 cannot entirely encapsulate the defining dam 201. Instead, the inorganic packaging structure may encapsulate the optical functional portion 202 within the opening K1 of the defining dam 201, thereby encapsulating the optical functional portion 202.

[0242] To this end, no inorganic packaging structure will be set on the outer side surface (i.e., the second outer contour surface S7) of the limiting dam 201 in the color conversion unit 200, and the second outer contour surface S7 of the limiting dam 201 can be directly in contact with the external environment, that is, the second outer contour surface S7 of the limiting dam 201 can be directly exposed to the external environment.

[0243] For example, as shown in FIG15 , FIG15 is a schematic diagram of the film layer structure of another chip structure provided in an embodiment of the present application. The color conversion unit 200 in the chip structure 000 may further include: a first encapsulation layer 203. The first encapsulation layer 203 may be located between the first substrate 100 and the defining dam 201, and a portion of the first encapsulation layer 203 may be located within the opening region K1 of the defining dam 201. The optically functional portion 202 located within the opening region K1 of the defining dam 201 may be distributed between the first encapsulation layer 203 and the first substrate 100, and the orthographic projection of the optically functional portion 203 on the first substrate 100 may be located within the orthographic projection of the first encapsulation layer 203 on the first substrate 100.

[0244] In this way, even if water and oxygen in the external environment can invade the opening area K1 through the limiting dam 201, these water and oxygen can be isolated by the part of the first packaging layer 203 that extends into the opening area K1 to ensure that these water and oxygen will not corrode the optical functional part 203 distributed in the opening area K1, thereby ensuring that the optical functional part 203 has a high reliability.

[0245] In the present application, during the fabrication process of the chip structure 000, after forming the definition dam 201 on the first surface S1 of the dam 400, the first encapsulation layer 203 may be formed on the side of the definition dam 201 facing away from the dam 400, and then the optically functional portion 202 may be formed within the opening K1 of the definition dam 201. To this end, the first encapsulation layer 203 may include a first encapsulation portion 2031 disposed on the side of the definition dam 201 facing the first substrate 100, and a second encapsulation portion 2032 connected to the first encapsulation portion 2031 and extending into the opening K1 of the definition dam 201.

[0246] Here, the second encapsulation portion 2032 in the first encapsulation layer 203 can cover the inner sidewalls of the opening area K1 and can cover the opening in the opening area K1 that faces away from the first substrate 100. The optical function portion 202 distributed in the opening area K1 of the defining dam 201 can be arranged in contact with the second encapsulation portion 2032. To this end, the second encapsulation portion 2032 in the first encapsulation layer 203 can isolate water and oxygen from the external environment from invading the opening area K1 through the defining dam 201.

[0247] Optionally, as shown in FIG15 , the color conversion unit 200 in the chip structure 000 may further include a second encapsulation layer 204. The second encapsulation layer 204 may be located between the first substrate 100 and the first encapsulation layer 203, and the optical function portion 202 in the color conversion unit 200 may be located between the first encapsulation layer 203 and the second encapsulation layer 204. The first encapsulation layer 203 and the second encapsulation layer 204 in the color conversion unit 200 may be arranged in contact with each other to seal the optical function portion 202.

[0248] Exemplarily, the second encapsulation layer 204 may include: a third encapsulation portion 2041 disposed in contact with the first encapsulation portion 2031 in the first encapsulation layer 203, and a fourth encapsulation portion 2042 connected to the third encapsulation portion 2041. The optically functional portion 202 may be distributed on a side of the fourth encapsulation portion 2042 in the second encapsulation layer 204 facing away from the first substrate 100, and the orthographic projection of the optically functional portion 202 on the first substrate 100 may be located within the orthographic projection of the fourth encapsulation portion 2042 on the first substrate 100.

[0249] To this end, the optically functional portion 202 can be distributed between the fourth encapsulation portion 2042 in the second encapsulation layer 204 and the second encapsulation portion 2032 in the first encapsulation layer 203. Through the fourth encapsulation portion 2042 in the second encapsulation layer 204 and the second encapsulation portion 2032 in the first encapsulation layer 203, each position in the optically functional portion 202 can be completely encapsulated, so that through the cooperation of the first encapsulation layer 203 and the second encapsulation layer 204, a good encapsulation effect of the optically functional portion 202 can be ensured, further improving the reliability of the optically functional portion 202.

[0250] In the embodiment of the present application, when the filling portion 500 in the chip structure 000 is not located on the side of the light-emitting unit 300 facing the first substrate 100, the side of the second encapsulation portion 2032 of the first encapsulation layer 203 that extends into the opening region K1 defining the dam 201 and faces away from the first substrate 100 can be directly in contact with the side of the first semiconductor layer 301 in the light-emitting unit 300 facing the first substrate 100. In this case, the distance between the sub-light-emitting functional layer 300a in the light-emitting unit 300 and the corresponding optical functional portion 202 can be reduced, allowing more light emitted by the sub-light-emitting functional layer 300a to enter the corresponding optical functional portion 202, thereby improving the light extraction efficiency of the chip structure 000. Furthermore, when there are multiple sub-light-emitting functional layers 300a, the distance between the sub-light-emitting functional layer 300a and the corresponding optical functional portion 202 is small, which can reduce or prevent light from the sub-light-emitting functional layer 300a from entering other optical functional portions 202, thereby reducing or preventing color crosstalk in the chip structure 000.

[0251] Optionally, both the first encapsulation layer 203 and the second encapsulation layer 204 in the color conversion unit 200 can be film structures that are continuously distributed at all locations. Optionally, both the first encapsulation layer 203 and the second encapsulation layer 204 in the color conversion unit 200 can include multiple sub-encapsulation layers stacked together. Optionally, both the first encapsulation layer 203 and the second encapsulation layer 204 in the color conversion unit 200 can be made of inorganic insulating materials. For example, the inorganic insulating material can include one or more of silicon oxide, silicon nitride, and silicon oxynitride. In this way, the cooperation between the second encapsulation layer 204 and the first encapsulation layer 203 can ensure that water and oxygen in the external environment will not corrode the optically functional portion 202.

[0252] It should be noted that, because the defining dam 201 in the present application has multiple opening areas K1, and each opening area K1 contains an optically functional portion 202, the first encapsulation layer 203 can extend into each opening area K1 in the defining dam 201. Furthermore, through the cooperation of the first encapsulation layer 203 and the second encapsulation layer 204, each optically functional portion 202 in the color conversion unit 200 can be completely encapsulated, thereby ensuring that each optically functional portion 202 in the color conversion unit 200 is not corroded by water and oxygen in the external environment.

[0253] In an embodiment of the present application, as shown in FIG15 , the color conversion unit 200 in the chip structure 000 may further include a light shielding layer 205. The light shielding layer 205 may be located between the first substrate 100 and the defining dam 203. For example, the light shielding layer 205 may be located between the second encapsulation layer 204 and the first substrate. For another example, the light shielding layer 205 may be located between the first encapsulation layer 203 and the second encapsulation layer 204.

[0254] The light shielding layer 205 may have light holes K2. The light shielding layer 205 may include multiple light holes K2, and the multiple light holes K2 in the light shielding layer 205 may correspond one-to-one to the multiple opening areas K1 in the defining dam 203. The orthographic projection of each light hole K2 on the first substrate 100 may overlap with the orthographic projection of the corresponding opening area K1 on the first substrate 100. For example, the orthographic projection of each opening area K1 in the defining dam 201 on the first substrate 100 may be located within the orthographic projection of the corresponding light hole K2 on the first substrate 100.

[0255] It should be noted that, since the light-emitting side of each sub-light-emitting functional layer 300a in the light-emitting unit 300 faces the corresponding opening area K1, and the orthographic projection of each sub-light-emitting functional layer 300a on the first substrate 100 is located within the orthographic projection of the corresponding opening area K1 on the first substrate 100, the orthographic projection of the sub-light-emitting functional layer 300a in the light-emitting unit 300 on the first substrate 100 can also be located within the orthographic projection of the optical functional portion 202 in the corresponding opening area K1 on the first substrate 100, so that the light emitted by the sub-light-emitting functional layer 300a can all be directed toward the optical functional portion 202 inside the corresponding opening area K1 in the defining dam 201. After the color of the light is converted by the optical functional portion 202, the color-converted light can pass through the corresponding light hole K2 and then be emitted through the first substrate 100.

[0256] Optionally, the color conversion unit 200 in the chip structure 000 may further include: a filter unit 206 located between the first substrate 100 and the optical function portion 202. The color conversion unit 200 may include multiple filter units, and the multiple filter units 206 may correspond one-to-one to the multiple light-through holes K2 in the light-shielding layer 205. The orthographic projection of each filter unit 206 on the first substrate 100 may overlap with the orthographic projection of the corresponding light-through hole K2 on the first substrate 100.

[0257] For example, as shown in Figures 13 and 14, the multiple filter units in the color conversion unit 200 may include a first filter unit 206a, a second filter unit 206b, and a third filter unit 206c. Here, the first filter unit 206a may be provided corresponding to the first optical function portion 201a, the second filter unit 206b may be provided corresponding to the second optical function portion 201b, and the third filter unit 206c may be provided corresponding to the third optical function portion 201c. To this end, the red sub-pixel R in the chip structure 000 may further include the first filter unit 206a; the green sub-pixel G in the chip structure 000 may further include the second filter unit 206b; and the blue sub-pixel B in the chip structure 000 may further include the third filter unit 206c.

[0258] For example, the first light emitted by the first sub-light-emitting functional layer 300a1, the second sub-light-emitting functional layer 300a2, and the third sub-light-emitting functional layer 300a3 in the light-emitting unit 300 is all blue light. The first filter unit 206a can be a red color block that transmits red light and absorbs light of other colors. In this way, the light emitted from the first optical functional portion 201a can pass through the first filter unit 206a before being emitted, and the first filter unit 206a can filter out light of other colors except red light, thereby ensuring that the red sub-pixel R in the chip structure 000 can filter out the blue light component. It should be noted that, in other possible implementations, the first filter unit 206a may also be: a film layer for transmitting red light and reflecting blue light. In this way, after the light emitted from the first optical functional portion 201a is emitted to the first filter unit 206a, the red light in these light rays can pass through the first filter unit 206a before being emitted, while the blue light in these light rays can be reflected back to the first optical functional portion 201a by the first filter unit 206a, so that the red quantum dots in the first optical functional portion 201a can excite the blue light into red light. In this way, the excitation efficiency of the red quantum dots can be further improved.

[0259] For example, the first light emitted by the first sub-light-emitting functional layer 300a1, the second sub-light-emitting functional layer 300a2, and the third sub-light-emitting functional layer 300a3 in the light-emitting unit 300 is all blue light. The second filter unit 206b can be a green color block that transmits green light and absorbs light of other colors. In this way, the light emitted from the second optical functional portion 201b can pass through the second filter unit 206b before being emitted. The second filter unit 206b can filter out light of other colors except green light, thereby ensuring that the green sub-pixel G in the chip structure 000 can filter out blue light components. It should be noted that, in other possible implementations, the second filter unit 206b may also be: a film layer for transmitting green light and reflecting blue light. In this way, after the light emitted from the second optical functional portion 201b is emitted to the second filter unit 206b, the green light in these light rays can pass through the second filter unit 206b before being emitted, while the blue light in these light rays can be reflected back to the second optical functional portion 201b by the second filter unit 206b, so that the green quantum dots in the second optical functional portion 201b can excite the blue light into green light. In this way, the excitation efficiency of the green quantum dots can be further improved.

[0260] It should be noted that the film structures of the first filter unit 206a and the second filter unit 206b can be the same and can be prepared through the same process; for example, the first filter unit 206a and the second filter unit 206b are both films that transmit red light and green light and reflect blue light.

[0261] For example, the first light emitted by the first sub-light-emitting functional layer 300a1, the second sub-light-emitting functional layer 300a2, and the third sub-light-emitting functional layer 300a3 in the light-emitting unit 300 is all blue light. The third filter unit 206c can be a blue color block that transmits blue light and absorbs light of other colors. In this way, the light emitted from the third optical functional portion 201c can pass through the third filter unit 206c before being emitted. The third filter unit 206c can filter out light of other colors except blue light, thereby ensuring that the blue sub-pixel B in the chip structure 000 can emit relatively pure blue light.

[0262] For example, the first light emitted by the first sub-light-emitting functional layer 300a1, the second sub-light-emitting functional layer 300a2 and the third sub-light-emitting functional layer 300a3 in the light-emitting unit 300 is blue light, and the third filter unit 206c can be a transparent block that can transmit blue light.

[0263] It should be noted that because the orthographic projections of the individual filter units 206 in the color conversion unit 200 on the first substrate 100 overlap with the orthographic projections of the corresponding light holes K1 in the light shielding layer 201 on the first substrate 100, a portion of the light shielding layer 201 is distributed between two adjacent filter units 206 in the color conversion unit 200 in a direction parallel to the extension surface of the first substrate 100. This allows light emitted from the side surfaces of a filter unit 206 in the color conversion unit 200 to be absorbed by the light shielding layer 201, effectively reducing the probability of color crosstalk in the chip structure 000.

[0264] In the embodiment of the present application, the second encapsulation layer 204 in the color conversion unit 200 can be located between the light shielding layer 201 and the limiting dam 201. The positional relationship between the second encapsulation layer 204 and the filter unit 206 in the color conversion unit 200 can be varied. The embodiment of the present application uses the following two optional implementations as examples for schematic illustration:

[0265] In a first optional implementation, as shown in FIG. 15 , the filter unit 206 in the color conversion unit 200 may be located on a side of the second encapsulation layer 204 facing away from the first substrate 100 .

[0266] In this case, during the preparation of the color conversion unit 200 in the chip structure 000, a limiting dam 201, a first encapsulation layer 203 and an optical functional part 202 can be formed in sequence on the dam 400, the light-emitting unit 300 and the filling part 500 located therebetween, and then a filter unit 206 and a second encapsulation layer 204 can be formed in sequence on the optical functional part 202. Finally, a light-shielding layer 205 can be formed on the side of the second encapsulation layer 204 facing away from the limiting dam 201.

[0267] In this way, the side of the filter unit 206 facing away from the first substrate 100 can be in direct contact with the side of the optical function portion 202 facing the first substrate 100. In addition, in this case, the first encapsulation layer 203 and the second encapsulation layer 204 in the color conversion unit 200 can simultaneously encapsulate the optical function portion 202 and the filter unit 206.

[0268] A second optional implementation is shown in FIG16 , which is a schematic diagram of a film structure of another chip structure provided by an embodiment of the present application. The filter unit 206 in the color conversion unit 200 may be located on the side of the second encapsulation layer 204 facing the first substrate 100 .

[0269] In this case, during the preparation of the color conversion unit 200 in the chip structure 000, a limiting dam 201, a first encapsulation layer 203 and an optical functional portion 202 can be formed in sequence on the dam 400, the light-emitting unit 300 and the filling portion 500 located therebetween, and then a second encapsulation layer 204 and a filter unit 206 can be formed in sequence on the optical functional portion 202. Finally, a light-shielding layer 205 can be formed on the side of the filter unit 206 facing away from the optical functional portion 202.

[0270] In this way, the side of the filter unit 206 facing away from the first substrate 100 may be in direct contact with the side of the second encapsulation layer 205 facing the first substrate 100 .

[0271] Optionally, the orthographic projection of each filter unit 206 in the color conversion unit 200 on the first substrate 100 may overlap the orthographic projection of the corresponding opening area K1 in the limiting dam 201 on the first substrate 100. In this way, all light emitted from the optically functional portion 202 distributed within the opening area K1 of the limiting dam 201 may be directed toward the corresponding filter unit 206, thereby ensuring that the filter unit 206 has a better filtering effect on the light, making the color of the light subsequently emitted from the corresponding light hole K2 in the light shielding layer 205 purer.

[0272] Furthermore, the orthographic projections of the respective filter units 206 in the color conversion unit 200 on the first substrate 100 can cover the corresponding light holes K2 in the light shielding layer 205. Thus, light emitted through the filter units 206 can only be emitted through the corresponding light holes K2 in the light shielding layer 205, and will not be emitted toward other adjacent light holes in the light shielding layer 205, further reducing the probability of color crosstalk in the output of the chip structure 000.

[0273] It should be noted that, during the fabrication process of the chip structure 000, the light shielding layer 205 within the color conversion unit 200 may be formed last. Therefore, as shown in FIG15 , when the light filter unit 206 is located on the side of the second packaging layer 204 facing away from the first substrate 100, no portion of the second packaging layer 204 at any position will extend into the light through hole K2 of the light shielding layer 205. As shown in FIG16 , when the light filter unit 206 is located on the side of the second packaging layer 204 facing the first substrate 100, the light filter unit 206 also will not extend into the light through hole K2 of the light shielding layer 205.

[0274] It should also be noted that during the fabrication of the color conversion unit 200 in the chip structure 000, the various film layers within the color conversion unit 200 are fabricated sequentially along the direction from the dam 400 to the first substrate 100. To this end, as shown in FIG15 , when the filter unit 206 is located on the side of the second encapsulation layer 204 facing away from the first substrate 100, the filter unit 206 can be fabricated after the optically functional portion 202 is fabricated within the opening K1 of the defining dam 201, such that at least a portion of the filter unit 206 can extend into the opening K1 of the defining dam 201. As shown in FIG16 , when the filter unit 206 is located on the side of the second encapsulation layer 204 facing the first substrate 100, the second encapsulation layer 204 can be fabricated after the optically functional portion 202 is fabricated within the opening K1 of the defining dam 201, such that a portion of the second encapsulation layer 204 can extend into the opening K1 of the defining dam 201.

[0275] In the embodiment of the present application, the light shielding layer 205 in the color conversion unit 200 may have: a fifth surface facing the first substrate 100, a sixth surface facing away from the first substrate 100, and a third outer contour surface located between the fifth surface S8 and the sixth surface S9. During the preparation process of the color conversion unit 200 in the chip structure 000, the light shielding layer 205 may be formed after the first encapsulation layer 203 and the second encapsulation layer 204 are formed. Therefore, neither the first encapsulation layer 203 nor the second encapsulation layer 204 covers the third outer contour surface of the light shielding layer 205. The third outer contour surface of the light shielding layer 205 can be directly in contact with the external environment, that is, the third outer contour surface of the light shielding layer 205 can be directly exposed to the external environment.

[0276] In this case, even if water and oxygen in the external environment penetrate into the interior of the light-shielding layer 205 through the third outer contour surface of the light-shielding layer 205, the optical functional part 202 in the color conversion unit 200 will be wrapped by the first encapsulation layer 203 and the second encapsulation layer 204, so the water and oxygen that penetrate into the interior of the light-shielding layer 205 will be isolated by the first encapsulation layer 203 and the second encapsulation layer 204, thereby ensuring that these water and oxygen will not corrode the optical functional part 202.

[0277] It should be noted that, during the fabrication process of the color conversion unit 200 in the chip structure 000, the first encapsulation layer 203, the second encapsulation layer 204, and the light-shielding layer 205 are all formed on the side of the definition dam 201 facing away from the dam 400 and the light-emitting unit 300. Therefore, to ensure high stability in the formation of the first encapsulation layer 203, the second encapsulation layer 204, and the light-shielding layer 205, the orthographic projections of the first encapsulation layer 203, the second encapsulation layer 204, and the light-shielding layer 205 on the first substrate 100 can all be located within the area enclosed by the first outer contour of the orthographic projection of the definition dam 201 on the first substrate 100.

[0278] In the embodiment of the present application, during the preparation process of the chip structure 000, it is necessary to first prepare the color conversion unit 200 on the dam 400 and the light-emitting unit 300 and the filling portion 500 located therebetween, and then adhere the first substrate 100 to the side of the color conversion unit 200 away from the dam 400 and the light-emitting unit 300.

[0279] To this end, as shown in Figures 15 and 16 , the chip structure 000 may further include a transparent connecting layer 600. The transparent connecting layer 600 is used to connect the first substrate 100 and the color conversion unit 200. Specifically, the transparent connecting layer 600 is transparent to visible light. For example, during the fabrication of the chip structure 000, after the color conversion unit 200 is formed, a transparent adhesive can be applied to the light-shielding layer 205 in the color conversion unit 200. The first substrate 100 is then placed on the transparent adhesive. After the transparent adhesive cures, the transparent connecting layer 600 is formed, ensuring that the first substrate 100 is securely fixed to the color conversion unit 200.

[0280] In this case, a portion of the transparent connection layer 600 may be distributed between the light shielding layer 205 in the color conversion unit 200 and the first substrate 100 , and another portion of the transparent connection layer 600 may be distributed in each light through hole K2 in the light shielding layer 205 .

[0281] For example, the first substrate 100 is a rigid substrate.

[0282] For example, the first substrate 100 is a flexible substrate.

[0283] For example, the material of the first substrate 100 is glass.

[0284] For example, the material of the first substrate 100 includes a high molecular polymer, such as PET.

[0285] For example, the material of the first substrate 100 is a PET film.

[0286] In an embodiment of the present application, the orthographic projection of the transparent connection layer 600 on the first substrate 100 can be located within the first substrate 100. For example, during the fabrication process of the chip structure 000, after forming the first substrate 100, the side of the first substrate 100 facing the color conversion unit 200 needs to be ashed. During the ashing process, the portion of the transparent connection layer 600 not covered by the color conversion unit 200 and the dam 400 is also removed. To this end, a gap exists between the outer contour of the orthographic projection of the transparent connection layer 600 on the first substrate 100 and the outer contour of the first substrate 100, and the outer contour of the orthographic projection of the transparent connection layer 600 on the first substrate 100 can extend parallel to the outer disk of the orthographic projection of the dam 400 on the first substrate 100. When the material of the first substrate 100 is glass, adjacent chip structures 000 on the chip motherboard can be divided by laser cutting (for example, laser cutting followed by separation by applying external force). Removing the transparent connecting layer 600 between adjacent chip structures 000 is beneficial to avoid adhesion of the chips 000 after cutting.

[0287] Optionally, since the optically functional portion 202 in the color conversion unit 200 is typically formed using an inkjet printing process, and during the inkjet printing process, the inkjet printing device needs to print from the side of the defining dam 201 facing away from the light-emitting unit 300, rather than from the side of the defining dam 201 facing away from the first substrate 100, in the chip structure 000, the optically functional portion 202 may exhibit the following morphology: the side of the optically functional portion 202 facing the first substrate 100 includes a curved surface (for example, forming a single curved surface as a whole), and the side of the optically functional portion 201 in the color conversion unit 200 facing the first substrate 100 extends along the surface of the light-emitting unit 300 on the side closest to the first substrate 100.

[0288] In this application, the surface of the optically functional portion 202 facing the first substrate 100 can be either a curved convex surface or a curved concave surface. The different surface shapes of the optically functional portion 202 are related to the material used for the defining dam 201. For example, when the defining dam 201 requires a lyophobic material, the surface of the optically functional portion 202 facing the first substrate 100 can be a curved convex surface; when the defining dam 201 requires a lyophilic material, the surface of the optically functional portion 202 facing the first substrate 100 can be a curved concave surface. The lyophobicity and lyophilicity herein refer to the ink used to prepare the optically functional portion 202.

[0289] Optionally, the light-emitting unit 300 in the chip structure 000 may include multiple light-emitting chips, and each light-emitting chip may have a sub-light-emitting functional layer 300a. Here, the light-emitting chip is an LED chip. It should be noted that the LED chip can be an LED chip of ordinary size, or a mini light-emitting diode (English: mini Light-Emitting Diode, referred to as: mini-LED) chip, or a micro LED (English: Micro Light-Emitting Diode, referred to as: Micro-LED) chip. The embodiments of the present application are not limited to this.

[0290] In the embodiment of the present application, please refer to Figures 17 and 18. Figure 17 is a top view of a light-emitting unit provided in the embodiment of the present application, and Figure 18 is a schematic diagram of the film layer structure of the light-emitting unit at the D-D' position shown in Figure 17. The light-emitting unit 300 may also include: a first connecting electrode 302 and a plurality of second connecting electrodes 303.

[0291] Among them, the first connecting electrode 302 in the light-emitting unit 300 can be electrically connected to the first semiconductor layer 301; the multiple second connecting electrodes 303 in the light-emitting unit 300 can correspond one-to-one to the multiple sub-light-emitting functional layers 300a, and each second connecting electrode 303 can be distributed on the side of the corresponding sub-light-emitting functional layer 300a away from the first semiconductor 301, and can be electrically connected to the corresponding sub-light-emitting functional layer 300a.

[0292] In the present application, each sub-light-emitting functional layer 300a in the light-emitting unit 300 may include: a current spreading layer 304, a second semiconductor layer 305, and a light-emitting layer 306 stacked in a direction perpendicular to and toward the first substrate 100. That is, the light-emitting layer 306 in the sub-light-emitting functional layer 300a is closer to the first semiconductor layer 301 than the current spreading layer 304.

[0293] The light-emitting layer 306 in each sub-light-emitting functional layer 300a can be connected to the first semiconductor layer 301. Here, since the first semiconductor layer 301 in the light-emitting unit 300 is located on the light-emitting side of each sub-light-emitting functional layer 300a, and the first semiconductor layer 301 is closer to the first substrate 100 than each sub-light-emitting functional layer 300a, the first semiconductor layer 301 can contact the side of the light-emitting layer 306 in each sub-light-emitting functional layer 300a that is away from the second semiconductor layer 305.

[0294] In the present application, one side of the current spreading layer 304 in each sub-light-emitting functional layer 300a can be in contact with the second semiconductor layer 305, and the other side can be overlapped with the second connection electrode 303. That is, the side of the current spreading layer 304 in each sub-light-emitting functional layer 300a that is away from the second semiconductor layer 305 can be overlapped with the corresponding second connection electrode 303. To this end, the electrical connection between the second pad electrode 303 and the sub-light-emitting functional layer 300a can be achieved by overlapping the current spreading layer 304 in the sub-light-emitting functional layer 300a with the second pad electrode 303. Optionally, the material of the current spreading layer 304 is ITO (indium tin oxide). Providing the current spreading layer 304 in the sub-light-emitting functional layer 300a is beneficial to the transmission of holes and improves the electrical performance of the chip structure 000.

[0295] In the embodiment of the present application, the light-emitting unit 300 may further include a common electrode layer 307 connected to the auxiliary portion 3012 in the first semiconductor layer 301. A side of the common electrode layer 307 facing away from the first semiconductor layer 301 may overlap the first connection electrode 302. To this end, one side of the common electrode layer 307 may be connected to the first semiconductor layer 301, and the other side may be connected to the first connection electrode 302, thereby achieving electrical connection between the first connection electrode 302 and the first semiconductor layer 302. Optionally, the common electrode layer 307 also functions to spread current.

[0296] In the present application, please refer to Figures 19, 20 and 21. Figure 19 is a top view of another first semiconductor layer provided in an embodiment of the present application, Figure 20 is a top view of another light-emitting unit provided in an embodiment of the present application, and Figure 21 is a schematic diagram of the film layer structure of the light-emitting unit shown in Figure 20 at E-E'. It should be noted that, for ease of viewing, the insulating protective layer 308, the first connecting electrode 302 and the second connecting electrode 304 in the light-emitting unit are not shown here. The multiple connecting portions 3011 in the first semiconductor layer 301 can correspond one-to-one to the multiple second connecting electrodes 303, and the orthographic projection of each connecting portion 3011 on the first substrate 100 can overlap with the orthographic projection of the corresponding second connecting electrode 303 on the first substrate 100. For example, the outer boundary of the orthographic projection of each connecting portion 3011 on the first substrate 100 coincides with the outer boundary of the orthographic projection of the corresponding second connecting electrode 303 on the first substrate 100.

[0297] The auxiliary portion 3012 in the first semiconductor layer 301 may include a first auxiliary portion 3012 a , a second auxiliary portion 3012 b , and a third auxiliary portion 3013 c .

[0298] The orthographic projection of the first auxiliary portion 3012a on the first substrate 100 may overlap with the orthographic projection of the first connection electrode 302 on the first substrate 100. For example, the outer boundary of the orthographic projection of the first auxiliary portion 3012a on the first substrate 100 coincides with the outer boundary of the orthographic projection of the first connection electrode 302 on the first substrate 100.

[0299] A portion of the second auxiliary portion 3012 b may be located between adjacent connecting portions 3011 , and another portion may be located between the first auxiliary portion 3012 a and the connecting portion 3011 .

[0300] The third auxiliary portion 3012 c may be disposed around the first auxiliary portion 3012 a , the second auxiliary portion 3012 b , and the plurality of connection portions 3011 .

[0301] To this end, the first auxiliary portion 3012 a , the second auxiliary portion 3012 b , the third auxiliary portion 3013 c and the plurality of connecting portions 3011 in the first semiconductor layer 301 may form a planar structure provided as a whole layer.

[0302] Optionally, in the light-emitting unit 300, the material of the second semiconductor layer 305 in each sub-light-emitting functional layer 300a may include P-type doped gallium nitride, and the light-emitting layer 306 in each sub-light-emitting functional layer 300a may be a multi-quantum well layer. As shown in Figures 18 and 21, the first semiconductor layer 301 may include a first sublayer 301a and a second sublayer 301b stacked perpendicularly and facing the first substrate 100. That is, the second sublayer 301b is closer to the connection layer 500 than the first sublayer 301a. It will be understood that the first semiconductor layer 301 can be divided into an auxiliary portion 3012 and a plurality of connection portions 3011 in a direction parallel to the extension surface of the first substrate 100, and can be divided into a first sublayer 301a and a second sublayer 301b in a direction perpendicular to the extension surface of the first substrate 100.

[0303] The first sublayer 301a in the first semiconductor layer 301 may be located between the second sublayer 301b and the light-emitting layer 306 in each sub-light-emitting functional layer 300a. That is, the first sublayer 301a is closer to the light-emitting layer 306 in each sub-light-emitting functional layer 300a than the second sublayer 301b. Here, the material of the first sublayer 301a in the first semiconductor layer 301 may be N-type doped gallium nitride, and the second sublayer 301b in the first semiconductor layer 301 may be a gallium nitride buffer layer.

[0304] In this case, in the light-emitting unit 300, after the first connecting electrode 302 is loaded with a cathode signal, if the second connecting electrode 303 in a sub-light-emitting functional layer 300a is loaded with an anode signal, the light-emitting layer 304 in this sub-light-emitting functional layer 300a can emit the first light.

[0305] In the embodiment of the present application, the light-emitting unit 300 may further include an insulating protective layer 308 located on a side of the common electrode layer 307 and each sub-light-emitting functional layer 300a facing away from the first semiconductor layer 301. Here, the orthographic projections of the multiple sub-light-emitting functional layers 300a and the common electrode layer 307 on the first semiconductor layer 301 are all located within the orthographic projection of the insulating protective layer 308 on the first semiconductor layer 301, and the first connecting electrode 302 and the multiple second connecting electrodes 303 are all located on a side of the insulating protective layer 308 facing away from the first semiconductor layer 301.

[0306] In the present application, the insulating protective layer 308 may have: a first connection hole V1 corresponding to the first connection electrode 302, and a plurality of second connection holes V2 corresponding one-to-one to the plurality of second connection electrodes 303. The first connection electrode 302 may overlap the side of the common electrode layer 307 facing away from the first semiconductor layer 301 through the first connection hole V1. The plurality of second connection holes V2 may also correspond one-to-one to the plurality of sub-light-emitting functional layers 300a. Each second connection electrode 303 may overlap the side of the current spreading layer 304 in the corresponding sub-light-emitting functional layer 300a facing away from the light-emitting layer 306 through the corresponding second connection hole V2.

[0307] In the present application, the thickness of the common electrode layer 307 can be significantly greater than that of the current spreading layer 304. For example, the side of the common electrode layer 307 facing away from the first semiconductor layer 301 can be flush with the side of the current spreading layer 304 facing away from the first semiconductor layer 301. That is, the thickness of the common electrode layer 307 can be equal to the sum of the thicknesses of the current spreading layer 304, the second semiconductor layer 305, and the light-emitting layer 306 in the sub-light-emitting functional layer 300a. In this way, the sides of the second connecting electrode 303 and the first connecting electrode 302 in the light-emitting unit 300 facing away from the connecting layer 500 are also flush. Because the second connecting electrode 303 and the first connecting electrode 302 in the chip structure 000 will need to be soldered to the driver backplane when the chip structure 000 is subsequently connected to the driver backplane, when the sides of the second connecting electrode 303 and the first connecting electrode 302 facing away from the connecting layer 500 are flush, the chip structure 000 can be stably fixed to the driver backplane.

[0308] In the embodiment of the present application, the common electrode layer 307 may include: a common electrode body 3071, a first support portion 3072 fixedly connected to the common electrode body 3071, and two second support portions 3073 fixedly connected to the first support portion 3072. The common electrode body 3071 may be electrically connected to the first connection electrode 302. The first support portions 3072 may be located around the common electrode body 3071. Each second support portion 3073 may be located on a side of the first support portion 3072 facing away from the common electrode body 3071. Of the two second support portions 3073, one may be located between two adjacent sub-light-emitting functional layers 300a in the row direction, while the other may be located between two adjacent sub-light-emitting functional layers 300a in the column direction. This ensures both high strength of the entire light-emitting unit 300 and a larger volume of the common electrode layer 307, thereby reducing the resistance required to transmit the common cathode signal within the light-emitting unit 300.

[0309] Optionally, in the light emitting unit 300 , the first connection electrode 302 may be provided in the same layer and made of the same material as the second connection electrodes 303 , that is, the first connection electrode 302 and the second connection electrodes 303 are formed by the same patterning process.

[0310] In summary, the chip structure of the embodiment of the present application includes: a first substrate, a light-emitting unit, a color conversion unit, and a dam layer. Since the dam layer can be arranged around the light-emitting unit, and the maximum distance between the side of the dam layer facing away from the color conversion unit and the first substrate is greater than or equal to the maximum distance between the side of the first semiconductor layer in the light-emitting unit facing away from the first substrate and the first substrate, after the optical waveguide phenomenon occurs within the first semiconductor layer, the light transmitted laterally within the first semiconductor layer can be blocked by the dam layer after being emitted from any position on the edge. In this way, even if the light entering the first semiconductor layer generates the optical waveguide phenomenon, the light emitted from the edge of the first semiconductor can be blocked by the dam layer, thereby effectively reducing the probability of light leakage in the chip structure, so that the display effect of the display substrate integrated with this chip structure is better.

[0311] The present application also provides a method for preparing a chip structure, which is used to prepare the chip structure in the above embodiment. The following embodiment will be schematically described using the chip structure prepared by this method as shown in Figure 16. The method for preparing the chip structure may include:

[0312] Step S201: forming a debonding layer on a temporary substrate.

[0313] In an embodiment of the present application, as shown in FIG22 , FIG22 is a schematic diagram of forming a debonding layer on a temporary substrate according to an embodiment of the present application. A debonding layer 002 can be uniformly coated on a temporary substrate 001. For example, the debonding layer 002 can be decomposed under irradiation with light of a specific wavelength (e.g., ultraviolet light and / or laser light), thereby separating the temporary substrate from the chip structure 000. For example, the debonding layer 002 can be decomposed under heating conditions, thereby separating the temporary substrate from the chip structure 000.

[0314] Step S202: providing a plurality of light-emitting units, wherein the plurality of light-emitting units are fixedly arranged on a third substrate.

[0315] For example, the third substrate can be a growth substrate for the light-emitting units. For example, the third substrate can be a silicon-based substrate or a sapphire substrate. In an embodiment of the present application, as shown in Figure 23, Figure 23 is a schematic diagram of forming multiple light-emitting units on a third substrate according to an embodiment of the present application. Multiple light-emitting units 300 can be grown on the third substrate 003. Here, the first semiconductor layer in each light-emitting unit 300 can be closer to the third substrate 003 than the welding electrode.

[0316] For example, the third substrate may also be a carrier substrate, and the plurality of light-emitting units are transferred from the growth substrate to the third substrate.

[0317] Step S203 , providing a first colloid; aligning the third substrate with the temporary substrate so that the plurality of light-emitting units are in contact with the first colloid located between the third substrate and the temporary substrate, and removing the third substrate to form a plurality of light-emitting units on the temporary substrate.

[0318] In the embodiment of the present application, there is no limitation on the order of covering the temporary substrate with the first colloid and aligning the third substrate with the temporary substrate. These two sub-steps can be performed in a certain order or simultaneously.

[0319] In one implementation, referring to Figure 24, Figure 24 is a schematic diagram of an embodiment of the present application after coating the first colloid, and a whole layer of the first colloid 004 can be evenly coated on the side of the debonding layer 002 facing away from the temporary substrate 001. Then, as shown in Figure 25, Figure 25 is a schematic diagram of an embodiment of the present application providing a plurality of light-emitting units formed on a temporary substrate. The third substrate 003 is aligned with the temporary substrate 001, and the side of the plurality of light-emitting units 300 facing away from the third substrate 003 is pressed into (or immersed in) the first colloid 004 formed on the temporary substrate 001, so that the plurality of light-emitting units 300 are connected to the temporary substrate 001. Then, the third substrate 003 is removed (for example, a wet etching process can be used). Here, the welding electrode in each light-emitting unit 300 is closer to the temporary substrate 001 relative to the first semiconductor layer.

[0320] In another implementation, the third substrate 003 can be aligned with the temporary substrate 001, and the gap between the third substrate and the temporary substrate can be filled with the first colloid 004, so that the multiple light-emitting units 300 are connected to the temporary substrate 001. Then, the third substrate 003 can be removed (for example, a wet etching process can be used). Here, the welding electrode in each light-emitting unit 300 is closer to the temporary substrate 001 than the first semiconductor layer.

[0321] Step S204 : removing the first colloid between two adjacent light-emitting units.

[0322] In an embodiment of the present application, as shown in FIG26 , which is a schematic diagram of removing a portion of the first colloid located between two adjacent light-emitting units, the first colloid 004 located between two adjacent light-emitting units 300 can be removed, leaving a gap between the two adjacent light-emitting units 300.

[0323] For example, the side of the temporary substrate 001 facing the light-emitting unit 300 can be ashed, so that the portion of the first colloid 004 not covered by the light-emitting unit 300 can be ashed and removed, while the portion of the first colloid 004 (or its cured product) covered by the light-emitting unit 300 will not be ashed and removed, thereby ensuring that each light-emitting unit 300 can still be firmly fixed to the side of the debonding layer 002 facing away from the temporary substrate 001 through the retained first colloid 004 (or its cured product).

[0324] It should be noted that the first colloid 004 distributed on the side of the light emitting unit 300 facing the temporary substrate 001 forms the second sub-filling portion 502 of the filling portion 500 in the above embodiment.

[0325] Step S205 : forming a dam surrounding each light-emitting unit on the temporary substrate.

[0326] In an embodiment of the present application, as shown in FIG27 , FIG27 is a schematic diagram of forming a dam surrounding each light-emitting unit on a temporary substrate according to an embodiment of the present application. Since the first colloid is no longer distributed between two adjacent light-emitting units 300 through step S205 , a dam 400 can be formed around each light-emitting unit 300 . Each dam 400 can be annular, and the light-emitting units 300 can be distributed within the area enclosed by adjacent dams 400 .

[0327] It should be noted that since the dam 400 is made of an organic material, if the dam 400 is relatively thick, after being formed through exposure and development processes, the cross-section of the dam 400 may be an inverted trapezoidal shape relative to the temporary substrate 001. In other words, the width of the dam 400 facing the temporary substrate 001 is smaller than the width of the dam 400 facing away from the temporary substrate 001.

[0328] Step S206: Use the second colloid to fill at least the gap between each dam and the corresponding light-emitting unit.

[0329] For example, the second colloid 005 can be a transparent organic resin with high fluidity. The second colloid 005 can be printed in the gap between the dam 400 and the light-emitting unit 300 using an inkjet printing process. After the second colloid 005 is printed in the gap between the dam 400 and the light-emitting unit 300, a curing process (e.g., thermal curing) can be used to cure the second colloid 005.

[0330] It should be noted that, when the second colloid 005 is printed in the gap between the dam 400 and the light-emitting unit 300 using the inkjet printing process, the second colloid 005 can be filled only in the gap between the dam 400 and the light-emitting unit 300, or the second colloid 005 can be distributed on the side of the dam 400 facing away from the temporary substrate 100, and / or on the side of the light-emitting unit 300 facing away from the temporary substrate 100. For example, the second colloid 005 can also be distributed between two adjacent dams 400. Here, the second colloid 005 (the cured product) distributed between the two adjacent dams 400 can be disposed of during a subsequent ashing process.

[0331] In an embodiment of the present application, as shown in FIG28 , FIG28 is a schematic diagram of forming multiple flat portions on a temporary substrate according to an embodiment of the present application. After the dam 400 surrounding the light-emitting unit 300 is formed in step S206, a certain gap will inevitably exist between the light-emitting unit 300 and the dam 400. Therefore, to facilitate the subsequent fabrication of the color conversion unit above, a second colloid 005 can be used to fill the gap between each dam 400 and the corresponding light-emitting unit 300. Here, after the second colloid 005 fills the gap between each dam 400 and the corresponding light-emitting unit 300 and cures, multiple flat portions are formed on the temporary substrate 001. Each flat portion can include: a dam 400 and a corresponding light-emitting unit 300, and a cured product of the second colloid 005 located between the two. Each flat portion can also include: a dam 400 and a corresponding light-emitting unit 300, and a cured product of the second colloid 005 located on at least one of the two sides facing away from the temporary substrate 001. Of course, each flat portion may further include: a first colloid 004 (or a cured product thereof) located between the light-emitting unit 300 and the temporary substrate 100. This ensures that the side of each flat portion facing away from the temporary substrate 001 is relatively flat, allowing for a more stable formation of a color conversion unit on the side of the flat portion facing away from the temporary substrate 001.

[0332] It should also be noted that, after the second colloid 005 distributed on the chip structure 000 is cured, at least a portion of the first sub-filling portion 501 of the filling portion 500 in the above embodiment is formed.

[0333] For example, after the plurality of light-emitting units 300 are in contact with the first colloid located between the third substrate 003 and the temporary substrate 001 in step S203 , the preparation method may further include: curing the first colloid 004 .

[0334] For example, after the plurality of light-emitting units 300 are in contact with the first colloid between the third substrate 003 and the temporary substrate 001 , the first colloid 004 may be cured, and then the third substrate 003 may be removed, so that the light-emitting units 300 are fixedly connected to the temporary substrate through the cured first colloid 004 .

[0335] It is understandable that curing the first colloid 004 can also be performed before or after other appropriate steps. For example, if the first colloid 004 is not highly fluid, the first colloid 004 and the second colloid 005 can be cured simultaneously to reduce process steps.

[0336] Therefore, in step S204, removing the portion of the first colloid located between two adjacent light-emitting units can be understood as removing the portion of the first colloid located between two adjacent light-emitting units after curing; when the curing step is not performed before this step, removing the portion of the first colloid located between two adjacent light-emitting units can be understood as removing the portion of the uncured first colloid located between two adjacent light-emitting units.

[0337] In some embodiments, when the first colloid 004 is not highly fluid, the first colloid 004 may not be solidified. In this case, the first colloid 004 is the second sub-filling portion 502 .

[0338] Step S207 : forming a color conversion unit on a side of each flat portion facing away from the temporary substrate.

[0339] In an embodiment of the present application, as shown in Figure 29, which is a schematic diagram of forming a color conversion unit on the side of a flat portion facing away from the temporary substrate, according to an embodiment of the present application. Since the flat portion comprising the dam 400 and the light-emitting unit 300 was formed in step S207, and the side of the flat portion facing away from the temporary substrate 100 is relatively flat, a color conversion unit 200 with high stability can be formed on each side of the flat portion facing away from the temporary substrate.

[0340] For example, the above step S207 may specifically include the following sub-steps:

[0341] Sub-step S2071 : forming a defining dam on a side of each flat portion facing away from the temporary substrate.

[0342] For example, a definition dam material layer may be formed entirely on the side of the plurality of flat portions facing away from the temporary substrate 001. This definition dam material layer is then patterned once to form the definition dam 201 on the side of each flat portion facing away from the temporary substrate 001. Furthermore, each definition dam 201 formed on the side of the flat portion facing away from the temporary substrate 001 has an opening K1, which may correspond to a sub-light-emitting functional layer within the light-emitting unit 300 in the corresponding flat portion.

[0343] Sub-step S2072 : forming a first encapsulation layer on a side of the dam facing away from the flat portion.

[0344] For example, a first inorganic thin film layer can be formed on the flat portion with the defining dam 201 by any of a variety of methods, such as deposition, coating, or sputtering. Then, a patterning process is performed on the first inorganic thin film layer to form the first encapsulation layer 203 on the side of the defining dam 201 facing away from the flat portion. Part of the first encapsulation layer 203 can extend into the opening K1 in the defining dam 201.

[0345] Sub-step S2073: forming an optical function portion in the opening area defined by the dam.

[0346] For example, the optical function portion 202 may be formed in the opening area K1 defining the dam 201 by using an inkjet printing process.

[0347] Sub-step S2074: forming a second encapsulation layer on the side of the optical functional portion facing away from the temporary substrate.

[0348] For example, a second inorganic thin film layer can be formed on the side of the first encapsulation layer 203 facing away from the temporary substrate 001 by any of a variety of methods, such as deposition, coating, and sputtering. Then, a patterning process is performed on the second inorganic thin film layer to form the second encapsulation layer 204 on the side of the first encapsulation layer 203 and the optically functional portion 202 facing away from the flat portion. The second encapsulation layer 204 can be disposed in contact with the first encapsulation layer 203 to seal the optically functional portion 202.

[0349] Sub-step S2075 , forming a filter unit and a light shielding layer in sequence on a side of the second packaging layer facing away from the temporary substrate.

[0350] For example, a filter unit 206 and a light shielding layer 205 may be formed on a side of the second encapsulation layer 203 facing away from the temporary substrate. The light shielding layer 205 may have a light through hole K2 corresponding to the filter unit 206, and the orthographic projection of the filter unit 206 on the temporary substrate 001 may overlap with the orthographic projection of the light through hole K2 on the temporary substrate 001.

[0351] In the embodiment of the present application, the color conversion unit 200 can be formed on each flat portion through the above-mentioned sub-steps S2071 to S2075. It should be noted that in order to ensure high stability of the first encapsulation layer 203, the second encapsulation layer 204, and the light shielding layer 204 formed on the definition dam 201, the orthographic projections of the first encapsulation layer 203, the second encapsulation layer 204, and the light shielding layer 204 on the temporary substrate 001 can be distributed within the area enclosed by the outer contour of the orthographic projection of the definition dam 201 on the temporary substrate 001.

[0352] Step S208 : forming a second substrate on a side of the plurality of color conversion units facing away from the temporary substrate.

[0353] In an embodiment of the present application, as shown in Figure 30, Figure 30 is a schematic diagram of forming a second substrate on the side of multiple color conversion units facing away from the temporary substrate, provided by an embodiment of the present application. First, a transparent connection layer 600 can be formed on one side of the second substrate 006. Then, the second substrate 006 is bonded to the side of the multiple color conversion units 200 facing away from the temporary substrate 001 via the transparent connection layer 600. The second substrate 006 is a larger, integrated substrate. The subsequently formed first substrate 100 in each chip structure 000 is part of this second substrate 006.

[0354] It should be noted that since the second substrate 006 and each color conversion unit 200 need to be bonded via the transparent connection layer 600 , part of the transparent connection layer 600 will fill the inside of the light hole K1 of the light shielding layer 205 in the color conversion unit 200 .

[0355] It should also be noted that the transparent connection layer 600 formed on one side of the second substrate 006 can be a solid film structure or a patterned film structure. When the transparent connection layer 600 is a patterned film structure, a transparent connection layer 600 corresponding to a plurality of color conversion units can be formed on one side of the second substrate 006, and each transparent connection layer 006 can be connected to the side of the corresponding color conversion unit 200 facing away from the temporary substrate 001. When the transparent connection layer 600 is a solid film structure, the excess portion of the transparent connection layer 600 between two adjacent color conversion units 200 can be removed during a subsequent ashing process to ensure that the solid transparent connection layer 600 formed on one side of the second substrate 006 does not interfere with the subsequent cutting process of the second substrate 006.

[0356] Step S209 : removing the temporary substrate and performing an ashing process on the side of the second substrate facing the multiple color conversion units.

[0357] In an embodiment of the present application, as shown in FIG31 , FIG31 is a schematic diagram of a temporary substrate after removal provided by an embodiment of the present application. For example, light of a specific wavelength can be used to irradiate the temporary substrate 001 from the side facing away from the debonding layer 002, so that the debonding layer 002 can be removed (e.g., decomposed) under the irradiation of the light of the specific wavelength, thereby allowing the temporary substrate 001 to be peeled off.

[0358] Afterwards, the side of the second substrate 006 facing the multiple color conversion units 200 can be ashed, thereby removing the portion of the transparent adhesive layer 600 located between two adjacent color conversion units 200. Here, all portions of the transparent adhesive layer 600 not covered by the color conversion units 200 and the flat portion are ashed and removed. Of course, during the ashing process on the side of the second substrate 006 facing the multiple color conversion units 200, excess colloid that may be present on the surface of the soldering electrode in the light-emitting unit 300 facing away from the second substrate 006 can also be removed. This excess colloid may be the first colloid or the colloid in the debonding layer. This ensures a better electrical connection between the driver backplane and the soldering electrodes in the chip structure after the chip structure is subsequently formed and secured to the driver backplane.

[0359] In addition, during the ashing process on the side of the second substrate 006 facing the multiple color conversion units 200, the side of the dam 400 facing away from the second substrate 006 and the side of the filling portion 500 facing away from the second substrate 005 may be partially removed by ashing, but the amount of the dam 400 and the filling portion 500 removed by ashing is relatively small.

[0360] Step S210: cutting the second substrate to obtain a plurality of chip structures.

[0361] It should be noted that after the above steps 201 to S210, a chip motherboard can be obtained. Here, after cutting the second substrate in the chip motherboard, multiple chip structures can be obtained. The specific structure of each chip structure can refer to the chip structure shown in Figure 16.

[0362] Exemplarily, the second substrate can be cut by laser hidden cutting. Here, during the cutting process, the laser cutting beam can be focused to the middle position of the second substrate in the thickness direction of the second substrate, so that the middle position of the second substrate can be melted or vaporized, and then a tool can be used to apply force to the upper surface and / or lower surface of the second substrate, so that the portion of the second substrate belonging to the first substrate 100 in the single chip structure 000 can be separated. It should be noted that in this process, because the laser cutting beam reaches the middle position of the second substrate, no extra debris (for example, cutting sparks) will be generated during the cutting process and splashed onto the light-emitting unit 200 or the color conversion unit 300, so that the chip structure 000 obtained by subsequent cutting has higher reliability.

[0363] The present application also provides another method for preparing a chip structure, which is used to prepare the chip structure in the above embodiment. The following embodiment will be schematically described using the chip structure prepared by this method as shown in Figure 16. The method for preparing the chip structure may include:

[0364] Step S301: forming a debonding layer on a temporary substrate.

[0365] This step can refer to the above-mentioned step S201 and will not be repeated here.

[0366] Step S302 : forming a plurality of dams on a side of the debonding layer facing away from the temporary substrate.

[0367] In an embodiment of the present application, as shown in Figure 32, which is a schematic diagram of forming multiple dams on the side of the debonding layer facing away from the temporary substrate, a plurality of dams 400 can be formed on the side of the debonding layer 002 facing away from the temporary substrate 001. Each dam 400 can be annular.

[0368] Step S303 : forming a plurality of light-emitting units, and using a transfer process to transfer at least part of the plurality of light-emitting units to the area surrounded by the corresponding dam.

[0369] In an embodiment of the present application, as shown in FIG33 , FIG33 is a schematic diagram of a method provided by an embodiment of the present application for transferring at least part of a plurality of light-emitting units to an area enclosed by a corresponding dam. A plurality of light-emitting units may be formed first. For example, a plurality of light-emitting units may be generated on a third substrate. For example, a plurality of light-emitting units may be produced on a growth substrate and then transferred to a third substrate. Of course, forming a plurality of light-emitting units also includes obtaining them through purchase, transfer, etc. Afterwards, a transfer process may be used to transfer at least part of the plurality of light-emitting units 300 to an area enclosed by a corresponding dam 400. During the transfer process, the dam 400 may act as a limiter, allowing the light-emitting unit 300 to fall accurately into the dam, thereby improving the transfer accuracy and preventing the alignment deviation between the optical functional portion 202 and the sub-light-emitting functional layer 300a from affecting the light-emitting effect of the chip structure 000 during the subsequent production of the color conversion unit 200.

[0370] For example, between step S301 and step S302, the process may further include forming an adhesive layer on the side of the debonding layer facing away from the temporary substrate 001. The adhesive layer serves to bond the transferred light-emitting unit to the debonding layer, thereby ensuring a more stable position of the light-emitting unit 300 on the temporary substrate. In subsequent steps, during the ashing process on the side of the second substrate 006 facing the multiple color conversion units 200, the adhesive layer may be removed by the ashing process.

[0371] In some embodiments, the transfer process in the above embodiments may be a mass transfer process, specifically, comprising forming a plurality of light-emitting units and transferring at least part of the plurality of light-emitting units to the area surrounded by the corresponding dam using the mass transfer process.

[0372] In some embodiments, a transfer process is used to transfer at least some of the plurality of formed light-emitting units to the area enclosed by the corresponding dam. The plurality of light-emitting units to be transferred are provided with a cured first colloid. After the light-emitting units are transferred to the area enclosed by the corresponding dam, the position of the cured first colloid can be described as being between the light-emitting units and the temporary substrate. Here, similar to step S203, the bonding and curing of the first colloid facilitates the detachment of the light-emitting units from the growth substrate. The cured first colloid then remains on the light-emitting units and proceeds with the light-emitting units into subsequent process steps.

[0373] Step S304: Use the second colloid to fill the gaps between each dam and the corresponding light-emitting unit.

[0374] For example, as shown in FIG34 , FIG34 is a schematic diagram of an embodiment of the present application providing a method of using a second colloid to fill the gaps between each dam and the corresponding light-emitting unit. The second colloid 005 can be a transparent organic resin with high fluidity. The second colloid 005 can be printed in the gap between the dam 400 and the light-emitting unit 300 using an inkjet printing process. After the second colloid 005 is printed in the gap between the dam 400 and the light-emitting unit 300, a curing process (e.g., thermal curing) can be used to cure the second colloid 005.

[0375] It should be noted that, when the second colloid 005 is printed in the gap between the dam 400 and the light-emitting unit 300 using the inkjet printing process, the second colloid 005 can be filled only in the gap between the dam 400 and the light-emitting unit 300, or the second colloid 005 can be distributed on the side of the dam 400 facing away from the temporary substrate 100, and / or on the side of the light-emitting unit 300 facing away from the temporary substrate 100. For example, the second colloid 005 can also be distributed between two adjacent dams 400. Here, the second colloid 005 (the cured product) distributed between the two adjacent dams 400 can be disposed of during a subsequent ashing process.

[0376] In particular, since the first colloid 004 (or its cured product) is not adhered to the light-emitting unit 300, the second colloid 005 is also distributed between the light-emitting unit 300 and the temporary substrate 100. That is, compared to steps S201 to S206, the filling portion 500 formed after the second colloid is cured is all prepared by the second colloid 005 in a single process and is continuously distributed in the gap between the dam 400 and the light-emitting unit 300 and between the light-emitting unit 300 and the temporary substrate 100.

[0377] Specifically, after the mass transfer process in step S303 is used to transfer at least a portion of the formed plurality of light-emitting units 300 to the area enclosed by the corresponding dams 400, certain gaps inevitably exist between the light-emitting units 300 and the dams 400. Therefore, to facilitate the subsequent fabrication of the color conversion unit above, a second colloid 005 can be used to fill the gaps between each dam 400 and the corresponding light-emitting unit 300, as well as the gaps between the light-emitting unit 300 and the temporary substrate 001. Here, after the second colloid 005 has completely filled the gaps between each dam 400 and the corresponding light-emitting unit 300, and between the light-emitting unit 300 and the temporary substrate 001, and has been cured, a plurality of flat portions are formed on the temporary substrate 001. Each flat portion can include: a dam 400 and the corresponding light-emitting unit 300, as well as the product of the cured second colloid 005. Each flat portion may further include a dam 400, a corresponding light-emitting unit 300, and a cured product of the second colloid 005 located on at least one side of the dam 400 and away from the temporary substrate 001. This ensures that the side of each flat portion facing away from the temporary substrate 001 is relatively flat, allowing for more stable formation of the color conversion unit on the side of the flat portion facing away from the temporary substrate 001.

[0378] Step S305 : forming a color conversion unit on a side of each flat portion facing away from the temporary substrate.

[0379] This step can refer to the above step S207 and will not be repeated here.

[0380] Step S306: forming a second substrate on a side of the plurality of color conversion units facing away from the temporary substrate.

[0381] This step can refer to the above-mentioned step S208 and will not be repeated here.

[0382] Step S307 : removing the temporary substrate and performing an ashing process on the side of the second substrate facing the multiple color conversion units.

[0383] This step can refer to the above-mentioned step S209 and will not be repeated here.

[0384] Step S308 : cutting the second substrate to obtain multiple chip structures.

[0385] This step can refer to the above-mentioned step S210 and will not be repeated here.

[0386] In the embodiment of the present application, the light emitting unit 300 can be transferred to the temporary substrate 001 by various mass transfer methods, which are not limited by the present application. For example, the transfer can be achieved by electrostatic force, van der Waals force, light (including laser light), magnetism, fluid, stamp, etc.

[0387] Specifically, in some embodiments, the mass transfer method mentioned in step S303 includes:

[0388] S3031: providing a plurality of light-emitting units, wherein the plurality of light-emitting units are fixedly arranged on a third substrate.

[0389] In one example, the third substrate is a carrier substrate, and the plurality of light-emitting units are transferred from the growth substrate to the third substrate. For example, the third substrate includes a functional adhesive layer on a side adjacent to the light-emitting units. For example, the functional adhesive layer may be made of a UV-resistant adhesive or a laser-debondable adhesive. The functional adhesive layer can be debonded or debonded under light, allowing the light-emitting units to be separated from the third substrate and thus transferred.

[0390] It should be noted that providing a plurality of light-emitting units may include providing a plurality of light-emitting units on a growth substrate and transferring the plurality of light-emitting units from the growth substrate to a third substrate. For example, the third substrate may be a silicon-based substrate or a sapphire substrate. For example, the arrangement density of the plurality of light-emitting units on the growth substrate may be greater than the arrangement density of the light-emitting units on the third substrate. This transfer step may fully utilize the light-emitting material on the growth substrate, thereby reducing overall costs.

[0391] S3032: Arrange the third substrate opposite to the temporary substrate, so that at least some of the plurality of light-emitting units are arranged opposite to the dam, wherein the light-emitting units and the dam are both located between the third substrate and the temporary substrate.

[0392] In the embodiment of the present application, the third substrate 003 is arranged opposite to the temporary substrate so that at least some of the multiple light-emitting units are arranged opposite to the dam. In one embodiment, the third substrate and the temporary substrate can be sufficiently close to each other so that the distance from the side of the light-emitting unit close to the temporary substrate to the temporary substrate is less than the distance between the first surface S1 of the dam 400 and the temporary substrate. In this way, the light-emitting unit enters the space defined by the dam, which can improve the position accuracy of the mass transfer. In one embodiment, the third substrate is closer to the temporary substrate, and the side of the light-emitting unit close to the temporary substrate contacts the film layer (such as the dissociation layer or the bonding layer) on the temporary substrate.

[0393] At least some of the multiple light-emitting units are arranged relative to the dam, which may include the following situations: in one case, the number of light-emitting units and the dam on the third substrate is the same, and the light-emitting units on the third substrate are arranged one-to-one with the dam, so that the transfer of the light-emitting units from the third substrate to the temporary substrate can be achieved at one time.

[0394] In another scenario, the arrangement density of the light-emitting units on the third substrate is greater than the arrangement density of the dam on the temporary substrate. In this way, through selective transfer, the light-emitting units positioned opposite the dam can be detached from the third substrate, while the light-emitting units not positioned opposite the dam remain. Furthermore, by adjusting the relative positions of the third substrate and the temporary substrate, at least some of the light-emitting units that remained on the third substrate can be repositioned opposite the dam on the new temporary substrate, thereby enabling mass transfer processing on the new temporary substrate. This can improve the utilization rate of the light-emitting units and reduce costs.

[0395] S3033: Separate at least part of the plurality of light-emitting units from the third substrate and leave them on the temporary substrate.

[0396] Specifically, the side of the third substrate close to the light-emitting unit includes a functional adhesive layer. For example, the material of the functional adhesive layer includes ultraviolet debonding adhesive. In conjunction with different situations in S3032, the functional adhesive layer can be debonded by overall or partial ultraviolet illumination, so that at least part of the multiple light-emitting units are detached from the third substrate and remain on the temporary substrate. For example, the material of the functional adhesive layer includes laser debonding adhesive. In conjunction with different situations in S3032, the functional adhesive layer can be debonded by overall or partial laser illumination, so that at least part of the multiple light-emitting units are detached from the third substrate and remain on the temporary substrate.

[0397] For example, during the process of reducing or dissociating the functional adhesive layer, pressure can be applied to the third substrate and the temporary substrate in opposite directions to achieve a better transfer effect. In particular, when an adhesive layer is provided on the temporary substrate, applying pressure can fully bond the light-emitting unit to the adhesive layer, thereby improving the transfer yield.

[0398] For example, during the process of reducing the viscosity or dissociating the functional adhesive layer, the third substrate and / or the temporary substrate may be heated simultaneously to achieve a better transfer effect.

[0399] The embodiment of the present application also provides a display substrate, which can be a display substrate in a mobile phone, a laptop computer, a television, an electronic watch or a flat-panel computer, or a display substrate for an advertising screen. The display substrate may include: a driving backplane, and a plurality of chip structures located on one side of the driving backplane. Here, each chip structure in the display substrate can be the chip structure in the above embodiment. And each second electrode pad and first electrode pad in the chip structure can be fixed on the driving backplane by welding to be electrically connected to the driving backplane. It should be noted that the driving backplane can provide corresponding driving signals to each chip structure, so that the light-emitting unit in the chip structure emits light, thereby allowing the display substrate to present a corresponding display screen.

[0400] The present application also provides a display module, which may include a housing, a drive assembly, and a display substrate. The display module may be a display module in a mobile phone, a laptop computer, a television, an electronic watch, or a tablet computer, or a display module for an advertising screen. The display substrate included in the display module may be the display substrate described in the above embodiments.

[0401] It should be noted that in the accompanying drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will also be understood that when an element or layer is referred to as being "on" another element or layer, it may be directly on the other element, or there may be an intermediate layer. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it may be directly under the other element, or there may be more than one intermediate layer or element. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it may be the only layer between the two layers or elements, or there may also be more than one intermediate layer or element. Similar reference numerals throughout the text indicate similar elements.

[0402] In this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. The term "plurality" refers to two or more than two, unless expressly limited otherwise.

[0403] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A chip structure, characterized in that, Comprising: A first substrate, a light-emitting unit, a color conversion unit, and a dam; The color conversion unit is located between the first substrate and the light-emitting unit, and the light-emitting side of the light-emitting unit faces the first substrate; The dam is located on the side of the color conversion unit away from the first substrate, and the dam is distributed around the periphery of the light-emitting unit; The color conversion unit includes: a defining dam and an optical functional part. The defining dam has an opening area, and the optical functional part is located within the opening area. The optical functional part is used to convert the color of the light entering the optical functional part; Wherein, the orthographic projection of the dam on the first substrate has a first outer contour, and the orthographic projection of the defining dam on the first substrate has a second outer contour. The second outer contour is located within the area enclosed by the first outer contour.

2. The chip structure according to claim 1, wherein The cross-section of the dam in a direction perpendicular to the first substrate and perpendicular to the extending direction of the dam includes: a first side on the side facing the first substrate, and a second side on the side away from the first substrate; The length of the first side is greater than the length of the second side.

3. The chip structure according to claim 2, characterized in that, The dam has a first surface on the side facing the first substrate and a second surface on the side away from the first substrate; the dam also has a first outer contour surface between the first surface and the second surface. The angle between the first surface and the first outer contour surface is an acute angle, and the angle between the second surface and the first outer contour surface is an obtuse angle.

4. The chip structure according to claim 1, wherein The dam has a first surface on the side facing the first substrate and a second surface on the side away from the first substrate; The orthographic projection of the second surface on the first substrate is located within the orthographic projection of the first surface on the first substrate.

5. The chip structure according to claim 1, wherein The dam has a first surface on the side facing the first substrate and a second surface on the side away from the first substrate; the dam also has a first inner contour surface between the first surface and the second surface; The chip structure further includes: a filling part, and at least a part of the filling part is located within the area enclosed by the dam; Wherein, a part of the filling part is located between the light-emitting unit and the first inner contour surface, and another part is located on the side of the light-emitting unit away from the first substrate; the filling part is in contact with the first inner contour surface and the light-emitting unit respectively.

6. The chip structure according to claim 5, characterized in that The filling part includes: a first sub-filling part and a second sub-filling part; At least a part of the first sub-filling part is located between the light-emitting unit and the first inner contour surface; the second sub-filling part is distributed on the side of the light-emitting unit away from the first substrate; Wherein, the first sub-filling part is in contact with the first inner contour surface and is in contact with the second sub-filling part, and the second sub-filling part is in contact with the light-emitting unit.

7. The chip structure according to claim 5, wherein, The minimum distance between the filling part and the first substrate is greater than the distance between the first surface and the first substrate, or a part of the filling part is located on the side of the first surface close to the first substrate.

8. The chip structure according to claim 5, wherein The minimum distance between the filling portion and the first substrate is greater than the distance between the light-emitting unit and the first substrate, or a part of the filling portion is located on a side of the light-emitting unit close to the first substrate.

9. The chip structure according to claim 5, characterized in that The defining dam is in direct contact with the surrounding dam, and / or the defining dam is in direct contact with the light-emitting chip.

10. The chip structure according to claim 5, characterized in that, The defining dam has a third surface facing the first substrate and a fourth surface facing away from the first substrate. A part of the filling portion is located on a side of the first surface close to the first substrate, and the part of the filling portion located on the side of the first surface close to the first substrate includes: a first sub-portion covered by the fourth surface and a second sub-portion not covered by the fourth surface. Wherein, the second sub-portion surrounds the first sub-portion.

11. The chip structure according to claim 5, characterized in that, The defining dam has a third surface facing the first substrate and a fourth surface facing away from the first substrate. The fourth surface includes: a first region and a second region, the first region is disposed opposite to the first surface and extends along the first surface, and the second region is disposed opposite to the light-emitting unit and extends along a surface of the light-emitting unit close to the first substrate. Wherein, the distance between the first region and the first substrate is greater than the distance between the second region and the first substrate, or the distance between the first region and the first substrate is less than the distance between the second region and the first substrate.

12. The chip structure according to claim 11, wherein, The fourth surface further includes: a third region disposed opposite to a part of the filling portion located between the light-emitting unit and the surrounding dam, and the distance between the third region and the first substrate is different from at least one of the distance between the first region and the first substrate and the distance between the second region and the first substrate.

13. The chip structure according to claim 5, characterized in that, The light-emitting unit includes a connecting electrode, and the connecting electrode is located on a side of the light-emitting unit farthest from the first substrate. Wherein, the distance between a surface of the connecting electrode away from the first substrate and the first substrate is greater than the distance between the second surface and the first substrate.

14. The chip structure according to claim 5, wherein, The distance between the second surface and the first substrate is greater than the distance between a surface of a part of the filling portion located between the surrounding dam and the light-emitting unit away from the first substrate and the first substrate.

15. The chip structure according to claim 5, characterized in that, The first surface includes: an inner contour edge close to the light-emitting unit and an outer contour edge away from the light-emitting unit, and the distance between the contour edge and the first substrate is greater than the distance between the outer contour edge and the first substrate.

16. The chip structure according to claim 5, characterized in that, The light-emitting unit includes a first semiconductor layer, and the distance between the first pair of feature points with the farthest distance on a surface of the first semiconductor layer facing the first substrate is a first distance D1. In the internal region enclosed by the positive projection of the first inner contour surface on the first substrate, there are second pairs of feature points corresponding to the first pairs of feature points. The distance between the second pairs of feature points is a second distance D2. The second pairs of feature points refer to: on the outer contour of the internal region enclosed by the positive projection of the first inner contour surface on the first substrate, a pair of feature points obtained by intercepting with the straight line where the positive projections of the first pairs of feature points on the first substrate are located; Wherein, the second distance D2 and the first distance D1 satisfy: (D2 - D1) is less than or equal to 30 micrometers.

17. The chip structure according to claim 1, characterized in that, For the accommodation space formed by the dam for accommodating the light-emitting unit, the cross-sectional areas of the interior of the accommodation space in each plane parallel to the extension plane of the first substrate gradually decrease along the direction from the first substrate to the dam.

18. The chip structure according to claim 17, wherein, The shape of the cross-section of the dam in a direction perpendicular to the first substrate and perpendicular to the extension direction of the dam is at least one of an inverted trapezoid, an inverted triangle, and an inverted arc with respect to the first substrate.

19. The chip structure according to claim 1, wherein, The defining dam has a third surface facing the first substrate side and a fourth surface facing away from the first substrate side; Wherein, the positive projection of the fourth surface on the first substrate is located within the positive projection of the third surface on the first substrate.

20. The chip structure according to claim 1, wherein The defining dam has a third surface facing the first substrate side, a fourth surface facing away from the first substrate side, and a second outer contour surface located between the third surface and the fourth surface; Wherein, the second outer contour surface is in direct contact with the external environment.

21. The chip structure according to claim 1, characterized in that, The color conversion unit further includes: A first encapsulation layer located between the first substrate and the defining dam. A part of the first encapsulation layer is located within the opening area. The optical functional part is located between the first encapsulation layer and the first substrate; Wherein, the positive projection of the optical functional part on the first substrate is located within the positive projection of the first encapsulation layer on the first substrate.

22. The chip structure according to claim 21, wherein, The first encapsulation layer is in direct contact with the light-emitting unit.

23. The chip structure according to claim 21, wherein The color conversion unit further includes: a second encapsulation layer located between the first substrate and the first encapsulation layer. The optical functional part is located between the first encapsulation layer and the second encapsulation layer. The first encapsulation layer and the second encapsulation layer are in contact to seal the optical functional part; The color conversion unit further includes: a light-shielding layer located between the first substrate and the defining dam. The light-shielding layer has a light-passing hole. The positive projection of the opening area on the first substrate overlaps with the positive projection of the light-passing hole on the first substrate.

24. The chip structure according to claim 23, characterized in that, The color conversion unit further includes: a light-filtering unit located between the first substrate and the optical functional part. The positive projection of the light-filtering unit on the first substrate overlaps with the positive projection of the corresponding light-passing hole on the first substrate.

25. The chip structure according to claim 21, characterized in that, The light-shielding layer has a fifth surface facing the first substrate side, a sixth surface facing away from the first substrate side, and a third outer contour surface located between the fifth surface and the sixth surface; Wherein, the third outer contour surface is in direct contact with the external environment.

26. The chip structure according to claim 1, characterized in that, The chip structure further includes: a transparent connection layer for connecting the first substrate and the color conversion unit.

27. The chip structure according to claim 26, wherein The orthographic projection of the transparent connection layer on the first substrate is located inside the first substrate, and there is a spacing between the outer contour of the orthographic projection of the transparent connection layer on the first substrate and the outer contour of the first substrate.

28. The chip structure according to claim 26, wherein The outer contour of the orthographic projection of the transparent connection layer on the first substrate extends parallel to the first outer contour.

29. The chip structure according to claim 1, wherein The surface of the optical functional part facing the first substrate is a curved surface; The surface of the optical functional part facing the first substrate extends along the surface of the light-emitting unit on the side close to the first substrate.

30. The chip structure according to any one of claims 1-29, characterized in that, The light-emitting unit includes: a plurality of sub-light-emitting functional layers, and a first semiconductor layer on the light-emitting side of the plurality of sub-light-emitting functional layers. The first semiconductor layer includes: a plurality of connection parts corresponding to the plurality of sub-light-emitting functional layers one by one, and an auxiliary part connected to the plurality of connection parts. The connection parts are connected to the corresponding sub-light-emitting functional layers, and at least part of the auxiliary part is located between adjacent connection parts, and the auxiliary part and the connection part are an integral structure.

31. The chip structure according to claim 30, wherein The color conversion unit includes: a plurality of the optical functional parts, and the defining dam has a plurality of the opening areas; The plurality of optical functional parts correspond to the plurality of opening areas one by one, and each optical functional part is located in a corresponding opening area; and the plurality of optical functional parts correspond to the plurality of sub-light-emitting functional layers one by one, and the light-emitting side of each sub-light-emitting functional layer faces the corresponding optical functional part.

32. The chip structure according to claim 31, characterized in that, The color conversion unit further includes: a light absorption layer located between the defining dam and the first substrate. The light absorption layer has a plurality of light passing holes corresponding to the plurality of opening areas one by one, and the orthographic projection of the light passing holes on the first substrate overlaps with the orthographic projection of the corresponding opening areas on the first substrate.

33. The chip structure according to claim 32, wherein The color conversion unit further includes: a plurality of light filtering units corresponding to the plurality of optical functional parts one by one and corresponding to the plurality of light passing holes one by one; Wherein, each light filtering unit is located between the corresponding optical functional part and the first substrate, and the orthographic projection of each light filtering unit on the first substrate overlaps with the orthographic projection of the corresponding light passing hole on the first substrate.

34. The chip structure according to any one of claims 31-33, characterized in that, The plurality of sub-light-emitting functional layers include: a first sub-light-emitting functional layer, a second sub-light-emitting functional layer, and a third sub-light-emitting functional layer; The plurality of opening areas include: a first opening area, a second opening area, and a third opening area. The first opening area is arranged opposite to the first sub-light-emitting functional layer, the second opening area is arranged opposite to the second sub-light-emitting functional layer, and the third opening area is arranged opposite to the third sub-light-emitting functional layer; The first opening area and the second opening area are arranged in a row in a first direction, and the second opening area and the third opening area are arranged in a row in a second direction, and the first direction intersects with the second direction.

35. The chip structure according to any one of claims 31-33, characterized in that, The light-emitting unit further includes: a first connection electrode and a plurality of second connection electrodes; The first connection electrode shown is electrically connected to the first semiconductor layer; the multiple second connection electrodes correspond to the multiple sub-light-emitting functional layers one by one, the second connection electrodes are distributed on a side of the corresponding sub-light-emitting functional layer facing away from the first semiconductor layer, and are electrically connected to the corresponding sub-light-emitting functional layer.

36. The chip structure according to claim 35, characterized in that, The multiple second connection electrodes correspond to the multiple connection portions one by one, and a positive projection of the connection portion on the first substrate overlaps a positive projection of the corresponding second connection electrode on the first substrate; The auxiliary portion includes: a first auxiliary portion, a second auxiliary portion, and a third auxiliary portion; a positive projection of the first auxiliary portion on the first substrate overlaps a positive projection of the first connection electrode on the first substrate; a part of the second auxiliary portion is located between adjacent connection portions, and another part is located between the first auxiliary portion and the connection portion; the third auxiliary portion is disposed around the first auxiliary portion, the second auxiliary portion, and the multiple connection portions; Wherein, the material of the auxiliary portion is the same as the material of the connection portion.

37. The chip structure according to claim 35, wherein, The light-emitting unit further includes: a common electrode layer connected to the auxiliary portion in the first semiconductor layer, and a side of the common electrode layer facing away from the first semiconductor layer is overlapped with the first connection electrode; The sub-light-emitting functional layer includes: a current spreading layer, a second semiconductor layer, and a light-emitting layer stacked in a direction perpendicular to and facing the first substrate, a side of the light-emitting layer facing the first substrate is connected to a corresponding connection portion in the first semiconductor layer, and a side of the current spreading layer facing away from the first substrate is overlapped with the second connection electrode.

38. The chip structure according to claim 36, wherein The light-emitting unit further includes: an insulating protective layer located on a side of the common electrode layer and the multiple sub-light-emitting functional layers facing away from the first semiconductor layer, positive projections of the multiple sub-light-emitting functional layers and the common electrode layer on the first semiconductor layer are all located within a positive projection of the insulating protective layer on the first semiconductor layer, and the first connection electrode and the multiple second connection electrodes are all located on a side of the insulating protective layer facing away from the first semiconductor layer; Wherein, the insulating protective layer has: a first connection hole corresponding to the first connection electrode, and multiple second connection holes corresponding to the multiple second connection electrodes one by one, the first connection electrode is overlapped with the common electrode layer through the first connection hole, and the second connection electrode is overlapped with the current spreading layer in the corresponding sub-light-emitting functional layer through the corresponding second connection hole.

39. The chip structure according to any one of claims 31-33, 35-38, characterized in that, The first semiconductor layer includes: a first sub-layer and a second sub-layer stacked in a direction perpendicular to and facing the first substrate, the first sub-layer is located between the second sub-layer and the light-emitting layer, the material of the first sub-layer is N-type doped gallium nitride, and the second sub-layer is a gallium nitride buffer layer; The material of the second semiconductor layer includes P-type doped gallium nitride, and the light-emitting layer is a multi-quantum well layer.

40. A manufacturing method of a chip structure, characterized in that, The method is used to prepare the chip structure according to any one of claims 1 to 39, and the method includes: Forming multiple of the light-emitting units on a temporary substrate, and the dam surrounding each of the light-emitting units; Form a plurality of the color conversion units on a side of the plurality of light emitting units facing away from the temporary substrate; Form a second substrate on a side of the plurality of color conversion units facing away from the temporary substrate; Remove the temporary substrate and cut the second substrate to obtain a plurality of the chip structures.

41. The method according to claim 40, wherein The forming of the plurality of light emitting units on the temporary substrate and the dams surrounding each of the light emitting units includes: Provide a plurality of the light emitting units, and fixedly arrange the plurality of light emitting units on a third substrate; Provide a first colloid, align the third substrate with the temporary substrate, make the plurality of light emitting units contact the first colloid located between the third substrate and the temporary substrate, and remove the third substrate to form the plurality of light emitting units on the temporary substrate; Remove the first colloid located between two adjacent light emitting units; Form dams surrounding each of the light emitting units on the temporary substrate.

42. The method according to claim 40, characterized in that, The forming of the plurality of light emitting units on the temporary substrate and the dams surrounding each of the light emitting units includes: Form a plurality of the dams on the temporary substrate; Form a plurality of light emitting units, and transfer at least part of the formed plurality of light emitting units to the areas surrounded by the corresponding dams by a transfer process.

43. The method according to any one of claims 40 to 42, characterized in that, Before forming the plurality of the color conversion units on a side of the plurality of light emitting units facing away from the temporary substrate, the method further includes: At least fill the gaps between each of the dams and the corresponding light emitting units with a second colloid to form a plurality of flat portions on the temporary substrate, and each flat portion includes: the dam and the corresponding light emitting unit, and the second colloid located between the dam and the light emitting unit.

44. The method according to claim 43, wherein Forming the plurality of the color conversion units on a side of the plurality of light emitting units facing away from the temporary substrate includes: Form a defining dam on a side of each of the flat portions facing away from the temporary substrate, and the defining dam has an opening area; Form a first encapsulation layer on a side of the defining dam facing away from the flat portion, and part of the first encapsulation layer extends into the opening area; Form an optical functional part in the opening area; Form a second encapsulation layer on a side of the optical functional part facing away from the temporary substrate, and the second encapsulation layer contacts the first encapsulation layer to seal the optical functional part.

45. The method according to any one of claims 40 to 42, characterized in that Forming the second substrate on a side of the plurality of color conversion units facing away from the temporary substrate includes: Form a transparent connection layer on a side of the second substrate; Bond the second substrate to a side of the plurality of color conversion units facing away from the temporary substrate through the transparent connection layer.

46. The method according to claim 45, characterized in that, After removing the temporary substrate, the method further includes: Perform ashing treatment on a side of the second substrate facing the plurality of color conversion units to remove a part of the transparent connection layer distributed between two adjacent color conversion units.

47. A display substrate, characterized in that, Includes: A driving backplane, and a plurality of chip structures arranged in an array on one side of the driving backplane, and the chip structure is the chip structure according to any one of claims 1 to 39.

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