Printed wiring board and power conversion device

Abstract

Provided are a printed wiring board and a power conversion device each comprising: an insulating substrate; an inner-layer conductor pattern formed on the insulating substrate; an interlayer insulating layer formed on the insulating substrate so as to cover the inner-layer conductor pattern; and an outer-layer conductor pattern which is formed on a surface of the interlayer insulating layer on the side opposite to the surface on the insulating substrate side, and which is provided so as to face the inner-layer conductor pattern in the plate thickness direction. The inner-layer conductor pattern has a surface region that is a surface on the outer-layer conductor pattern side. The outer-layer conductor pattern has an inner-layer surface that is a surface on the interlayer insulating layer side, and a side edge part that is a side surface with an edge formed thereon. An end part of the inner-layer surface of the outer-layer conductor pattern is formed at a position not overlapping the surface region of the inner-layer conductor pattern in the plane direction. A first distance in the plane direction between the end part of the inner-layer surface of the outer-layer conductor pattern and an end part of the surface region of the inner-layer conductor pattern is greater than a half of a second distance in the plate thickness direction between the outer-layer conductor pattern and the inner-layer conductor pattern. Voltages having mutually different potentials are applied to the outer-layer conductor pattern and the inner-layer conductor pattern.

Description

Printed wiring boards, power conversion devices

[0001] The present invention relates to a printed wiring board and a power conversion device.

[0002] To effectively utilize resources, promote energy conservation, and reduce greenhouse gas emissions, power conversion devices using power semiconductor elements are widely used in various fields, including consumer, automotive, railway, industrial, and infrastructure applications. For example, power conversion devices for automobiles include electric vehicles (EVs) driven by motors and hybrid vehicles (HEVs) that combine motor and engine drive. In particular, EVs run solely on the driving force of the motor, which is electrical power, and therefore require high-voltage power conversion devices that can handle large amounts of power. Furthermore, in the case of EVs, the battery size and weight increase due to the driving range, so there is a demand for smaller, lighter, and larger-capacity batteries. At the same time, there is also a demand for smaller, lighter, and larger-capacity power conversion devices.

[0003] For example, in the following Patent Document 1, a switching element is provided having a first heat sink, a second heat sink facing the first heat sink, a printed circuit board having a first circuit pattern formed on its front surface and a back surface facing the first heat sink, a first insulating member provided between the first heat sink and the printed circuit board, an electrode part made of a metal plate whose back surface is electrically joined to the first circuit pattern via a first joining member, a semiconductor chip electrically joined to the electrode part, and a resin part that seals a part of the front surface side of the electrode part and the semiconductor chip, a first fixing member bonded to the exposed surface of the switching element; one end of the first fixing member being bonded to the surface of the electrode portion and the other end being a surface of the resin portion of the switching element facing the second heat sink; a heat sink member provided between the second heat sink; a second insulating member sandwiched between the second heat sink and the heat sink; and an installation portion having one end bonded to the first heat sink and the other end bonded to the second heat sink, for fixing the first heat sink and the second heat sink together.

[0004] International Publication No. 2019 / 146402

[0005] In the configuration described in Patent Document 1, due to the need to handle high voltages and large currents, the wiring of the printed wiring board uses a conductor foil or conductor plate with a thickness of 100 μm or more. Therefore, the thicker the conductor foil, the sharper the lower end of the circuit conductor pattern formed by etching must be. This results in a sharper electric field at the tip of the sharp-angled lower end, increasing the field strength and making it more susceptible to partial discharges and insulation degradation due to migration. Therefore, there is a risk of insulation breakdown between conductor patterns that overlap in the thickness direction of the printed wiring board.

[0006] a first distance in the planar direction between the end of the inner layer surface of the outer layer conductor pattern and the end of the surface region of the inner layer conductor pattern is longer than half a second distance in the planar direction between the outer layer conductor pattern and the inner layer conductor pattern, and voltages having different potentials are applied to the outer layer conductor pattern and the inner layer conductor pattern.

[0007] It is possible to provide a printed wiring board and a power conversion device that can reduce the electric field strength and prevent dielectric breakdown.

[0008] Cross-sectional view of a printed wiring board according to an embodiment of the present invention First modified example Second modified example Comparative example 1 Comparative example 2 Electric field strength analysis results High temperature and high humidity bias test results

[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and some omissions and simplifications have been made as appropriate for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.

[0010] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0011] (One embodiment and overall configuration) (FIG. 1) A printed wiring board 100 provided in a power conversion device has an insulating substrate 1, an inner layer conductor pattern 2, an interlayer insulating layer 3, an outer layer conductor pattern 4, and a solder resist 5. Although not shown, the power conversion device is composed of a power module including power semiconductor elements such as IGBTs (Insulated Gate Bipolar Transistors) and SiC, the printed wiring board 100, bus bars, capacitors, etc.

[0012] The insulating substrate 1 is a substrate with a thickness of 250 μm, and has an inner layer conductor pattern 2 made of copper foil with a thickness of 210 μm formed on both sides. Although glass epoxy, which is glass cloth impregnated with epoxy resin, is used as the material for the insulating substrate 1, any organic insulating material, inorganic insulating material, or organic-inorganic composite insulating material may be used, and for example, insulating substrates made of organic materials such as glass phenol, which is glass cloth impregnated with phenol resin, inorganic-organic composite materials such as glass fiber reinforced polyamide, which is impregnated with polyamide resin, organic materials such as polyimide resin, and inorganic materials such as ceramics such as aluminum oxide and silicon nitride may also be used.

[0013] The inner layer conductor pattern 2 has a two-stage structure, with a first side edge portion 2a and a second side edge portion 2b having edges formed by etching provided on the side surfaces of each stage.

[0014] The method for forming the inner layer conductor pattern 2 will now be described. First, copper foil is formed on the surface of the insulating substrate 1, a dry film (not shown) is attached to the formed copper foil, and a mask on which the inner layer conductor pattern 2 is formed is placed over it, followed by exposure and development. Unnecessary copper foil portions other than the circuit of the inner layer conductor pattern 2 are then removed by chemical etching, and the dry film is then removed. This first forms the inner layer conductor pattern 2 having the first side edge portion 2a.

[0015] Next, a dry film is again formed on the surface of the inner layer conductor pattern 2, and a mask patterned so as to half-etch the inner layer conductor pattern 2 from the surface region 7, which is the surface facing the outer layer conductor pattern 4, is superimposed thereon, exposed, and developed. The inner layer conductor pattern 2 is then half-etched so that the remaining copper foil thickness after half-etching of the inner layer conductor pattern 2 is 100 μm, which is approximately half the copper foil thickness of 210 μm of the inner layer conductor pattern 2. As a result, a second side edge portion 2b is formed above the first side edge portion 2a, and a recess 6, which will be described later, is also formed. In this way, the inner layer conductor pattern 2 has a stepped structure with the step on the insulating substrate 1 side as the first step and the step on the outer side, that is, the outer side, facing the outer layer conductor pattern 4, as the second step.

[0016] The inner layer conductor pattern 2 has a surface region 7 which is a surface facing the surface on the insulating substrate 1 side. The inner layer conductor pattern 2 has a convex portion 7a which is a convex-shaped conductor portion in the second stage of the inner layer conductor pattern 2. The convex portion 7a protrudes in the plate thickness direction toward the outer layer conductor pattern 4 and has a protruding shape with the surface region 7 as its apex. The inner layer conductor pattern 2 also has a recess 6 formed around the convex portion 7a in the planar direction. The thickness of the inner layer conductor pattern 2 between the surface on the insulating substrate 1 side and the recess 6 in the plate thickness direction is smaller than the thickness between the surface on the insulating substrate 1 side and the surface region 7 in the plate thickness direction.

[0017] An interlayer insulating layer 3 is formed on both sides of the insulating substrate 1. A method for forming this interlayer insulating layer 3 will be described. Four sheets of glass epoxy prepreg, each 60 μm thick, are layered in order on the surface of the inner layer conductor pattern 2, which is copper foil with a thickness of 210 μm, and then heated and pressed using a laminating press, thereby forming interlayer insulating layers 3 on both sides of the insulating substrate 1, covering the inner layer conductor pattern 2 on the insulating substrate 1, as shown in the figure. The material of the interlayer insulating layer 3 may be an organic insulating material or an organic-inorganic composite insulating material.

[0018] An outer layer conductor pattern 4 is formed on the surface of the interlayer insulating layer 3 opposite the surface facing the insulating substrate 1, on the outer side facing the inner layer conductor pattern 2 in the plate thickness direction. The method for forming this outer layer conductor pattern 4 will be described. A four-layer laminate copper foil is formed on the surface of the interlayer insulating layer 3. The thickness of the formed copper foil is 210 μm. A dry film is attached to the surface of the formed copper foil, and a mask on which the outer layer conductor pattern 4 is formed is placed over it, followed by exposure and development. Subsequently, unnecessary copper foil other than that required for the circuit of the outer layer conductor pattern 4 is removed by chemical etching, and the dry film is then removed to form the outer layer conductor pattern 4 shown in the figure.

[0019] The outer layer conductor pattern 4 has an inner layer surface that faces the interlayer insulating layer 3 and a side edge portion 4a that is a side surface where an edge is formed. The wiring board 100 has a solder resist 5 on the interlayer insulating layer 3 so as to cover the outer layer conductor pattern 4. The solder resist 5 is formed by drilling the portions that will become through holes (not shown) with a drilling machine, removing smear from the hole walls, forming the through holes with copper plating, and connecting the patterns between layers. The solder resist 5 is then formed on the surface so as to cover the outer layer conductor pattern 4. Completion of the above processes allows the formation of a four-layer multilayer printed wiring board 100. Note that voltages with different potentials are applied to the outer layer conductor pattern 4 and the inner layer conductor pattern 2.

[0020] In the outer layer conductor pattern 4, the distance in the planar direction between the end 4b of the inner layer surface on the interlayer insulating layer 3 side and the end 2c of the surface region 7 of the inner layer conductor pattern 2 is defined as distance X (first distance). Furthermore, the distance in the plate thickness direction between the outer layer conductor pattern 4 and the inner layer conductor pattern 2 is defined as distance Z (second distance). The end 4b of the inner layer surface of the outer layer conductor pattern 4 is formed in a position that does not overlap with the surface region 7 of the inner layer conductor pattern 2 in the planar direction, and the distance X is formed to be longer than half the distance Z. The distance X shown in the figure is 200 μm, and the distance Z is 200 μm.

[0021] (First Modification) (Fig. 2) The inner layer conductor pattern 2 may be formed on the insulating substrate 1 so as to be wide in cross section in order to facilitate the flow of a large current. The outer layer conductor pattern 4 is the same as in the above-described embodiment. A recess 6 is formed in the center of each inner layer conductor pattern 2 at a position between two outer layer conductor patterns 4 in the planar direction, and at a position overlapping with the end 4b of each outer layer conductor pattern 4 in the planar direction.

[0022] Each recess 6 provided in the center of the inner layer conductor pattern 2 is formed so that the copper foil thickness after half etching is 100 μm, which is approximately half the copper foil thickness of 210 μm of the inner layer conductor pattern 2. In this modified example, the distance X is 150 μm and the distance Z is 200 μm.

[0023] (Second Modification) (FIG. 3) The width of the surface of the outer layer conductor pattern 4 on the interlayer insulating layer 3 side may be formed wider than the width of the surface region 7 of the inner layer conductor pattern 2. In this modification, the distance X is 250 μm and the distance Z is 200 μm.

[0024] (Electric field analysis of conductor patterns comparing the embodiment of the present invention with comparative examples 1 and 2) (FIGS. 4 to 6) In order to verify the effects of the present invention, an analysis of the electric field strength ratio was performed using the embodiment of the present invention and comparative examples 1 and 2. Comparative example 1 has the configuration shown in FIG. 4, and comparative example 2 has the configuration shown in FIG. 5, and the manufacturing method for each multilayer printed wiring board is the same as that of the embodiment of the present invention.

[0025] In the printed wiring board 100 of Comparative Example 1, as shown in Fig. 4, the end 4b of the inner layer surface of the outer layer conductor pattern and the end 2c of the surface region 7 of the inner layer conductor pattern 2 are formed at approximately the same position in the planar direction. In Comparative Example 1, the distance X was 0 µm and the distance Z was 200 µm. In the printed wiring board 100 of Comparative Example 2 of Fig. 5, the inner layer conductor pattern 2 is formed wide as in the embodiment shown in Fig. 2, but the end 4b of the inner layer surface of the outer layer conductor pattern and the end 2c of the surface region 7 of the inner layer conductor pattern 2 are formed at approximately the same position in the planar direction. In Comparative Example 2, the distance X was 0 µm and the distance Z was 200 µm.

[0026] The graph in Fig. 6 shows the results of an analysis of the electric field strength ratio using the embodiment of the present invention and comparative examples 1 and 2. The horizontal axis of this graph represents the calculated value of the formula X-Z / 2, which is established using the values ​​of distance X and distance Z. The vertical axis of this graph represents the electric field strength ratio calculated using the maximum electric field strengths of the end 4b on the inner surface of the outer layer conductor pattern 4 and the end 2c of the surface region 7 of the inner layer conductor pattern 2. Note that the maximum electric field strength ratio of the end 4b on the inner surface of the outer layer conductor pattern 4 when X-Z / 2 = 0 is set to 100%, and the respective electric field strengths relative to this are represented as field strength ratios.

[0027] In the graph of Figure 6, the configuration of the embodiment of the present invention is represented as (1), the configuration of the first modified example as (2), the configuration of the second modified example as (3), the configuration of comparative example 1 as (4), and the configuration of comparative example 2 as (5), and the maximum electric field strength ratio between the end 4b of the inner surface of the outer layer conductor pattern 4 and the end 2c of the surface region 7 of the inner layer conductor pattern 2 for each is plotted.

[0028] 6, the electric field strength at the end 2c of the surface region 7 of the inner layer conductor pattern 2 was 70.0% for (4) and 38.0% for (5). On the other hand, the electric field strength at the end 4b of the outer layer conductor pattern 4 was 122.5% for (4) and 145.0% for (5). As can be seen, high electric field strength was generated in Comparative Examples 1 and 2, causing partial discharge and migration degradation.

[0029] The electric field strength at the end 4b of the outer layer conductor pattern 4 in embodiments (1) to (3) of the present invention was 78.3% for (1), 88.7% for (2), and 68.5% for (3), respectively. Furthermore, the electric field at the end 4b of the surface region 7 of the inner layer conductor pattern 2 increased but was smaller than a field strength ratio of 100%. As such, the configurations of the present invention all had smaller electric field strengths than comparative examples 1 and 2. Therefore, the configuration of the present invention can reduce the electric field strength and prevent insulation deterioration due to partial discharge and migration.

[0030] (High-temperature, high-humidity bias test) (Fig. 7) Next, a high-temperature, high-humidity bias test was carried out on wiring board 100 using the embodiment of the present invention and comparative examples 1 and 2 used in the analysis of Fig. 6. Wiring board 100 having the configurations (1) to (5) representing the embodiment of the present invention and comparative examples 1 and 2, respectively, was placed in a high-temperature, high-humidity chamber at 85°C / 85% RH, a voltage of DC 500V or 1000V was applied between outer layer conductor pattern 4 and inner layer conductor pattern 2 of wiring board 100, and changes in insulation resistance between outer layer conductor pattern 4 and inner layer conductor pattern 2 were continuously measured.

[0031] This test was performed for 2000 hours, and the test was judged as passing if the insulation resistance remained at 1 MΩ or higher until 2000 hours after the test was completed (◯), and failing if the insulation resistance dropped below 1 MΩ earlier than 2000 hours (×). In the case of a failure, the time from the start of the test until the insulation dropped was recorded as the life of the printed wiring board 100 in the table of FIG.

[0032] According to the test results shown in Figure 7, when a test voltage of 500V was applied, the wiring boards (1) to (5) maintained an insulation resistance of 1 MΩ or more for 2000 hours, and all configurations were judged to pass. On the other hand, when a test voltage of 1000V was applied, (1) to (3) maintained an insulation resistance of 1 MΩ or more for 2000 hours, and were judged to pass. However, (4) and (5) dropped below 1 MΩ after 897.6 hours and 761.1 hours, respectively, from the start of the test, reaching the end of their service life. Therefore, at a test voltage of 1000V, Comparative Examples 1 and 2 failed the test. The above verification revealed that the configuration of the present invention maintains insulation resistance even at high voltages, demonstrating that it is possible to achieve high-voltage power conversion devices while maintaining the reliability required to prevent dielectric breakdown.

[0033] According to the embodiment of the present invention described above, the following advantageous effects are achieved.

[0034] (1) A printed wiring board 100 comprises an insulating substrate 1, an inner layer conductor pattern 2 formed on the insulating substrate 1, an interlayer insulating layer 3 formed on the insulating substrate 1 to cover the inner layer conductor pattern 2, and an outer layer conductor pattern 4 formed on the surface of the interlayer insulating layer 3 opposite to the surface on the insulating substrate 1 side and facing the inner layer conductor pattern 2 in the board thickness direction, the inner layer conductor pattern 2 having a surface region 7 which is the surface on the outer layer conductor pattern 4 side, and the outer layer conductor pattern 4 having an edge formed between the inner layer surface which is the surface on the interlayer insulating layer 3 side. an end 4b on the inner surface of the outer layer conductor pattern 4 is formed at a position that does not overlap with the surface region 7 of the inner layer conductor pattern 2 in the planar direction, a first distance X in the planar direction between the end 4b on the inner surface of the outer layer conductor pattern 4 and the end 2c of the surface region 7 of the inner layer conductor pattern 2 is longer than half a second distance Z in the plate thickness direction between the outer layer conductor pattern 4 and the inner layer conductor pattern 2, and voltages of different potentials are applied to the outer layer conductor pattern 4 and the inner layer conductor pattern 2. This makes it possible to reduce the electric field strength and prevent dielectric breakdown.

[0035] (2) The inner layer conductor pattern 2 has a recess 6 between the end of the surface facing the insulating substrate 1 and the end of the surface region 7, and the thickness of the inner layer conductor pattern 2 between the surface facing the insulating substrate 1 and the recess 6 is smaller than the thickness between the surface facing the insulating substrate 1 and the surface region 7. This creates a distance X, which contributes to reducing the electric field strength.

[0036] (3) The thickness of each of the inner layer conductor pattern 2 and the outer layer conductor pattern 4 is 100 μm or more. This makes it possible to realize a power conversion device that can handle large currents.

[0037] (4) The material of the interlayer insulating layer 3 is an organic insulating material or an organic-inorganic composite insulating material. By doing so, the effects of the present invention can be achieved.

[0038] (5) The insulating substrate 1 is made of an organic insulating material, an inorganic insulating material, or an organic-inorganic composite insulating material. By doing so, the effects of the present invention can be achieved.

[0039] (6) A power converter including the printed wiring board 100 having the above-described configuration is employed. In this way, a power converter can be provided that achieves a reduction in electric field strength and prevention of dielectric breakdown.

[0040] The present invention is not limited to the above-described embodiments, and various modifications and combinations of other configurations are possible without departing from the spirit of the present invention. Furthermore, the present invention is not limited to those having all of the configurations described in the above-described embodiments, and includes those in which some of the configurations are omitted.

[0041] DESCRIPTION OF SYMBOLS 1 insulating substrate 2 inner layer conductor pattern 2a first side edge portion of inner layer conductor pattern 2b second side edge portion of inner layer conductor pattern 2c end portion of surface region of inner layer conductor pattern 3 interlayer insulating layer 4 outer layer conductor pattern 4a side edge portion of outer layer conductor pattern 4b end portion of inner layer surface of outer layer conductor pattern 5 solder resist 6 recess 7 surface region of inner layer conductor pattern 7a convex portion 100 printed wiring board

Claims

1. A printed wiring board comprising: an insulating substrate; an inner layer conductor pattern formed on said insulating substrate; an interlayer insulating layer formed on said insulating substrate so as to cover said inner layer conductor pattern; and an outer layer conductor pattern formed on a surface of said interlayer insulating layer opposite to the surface facing said insulating substrate and facing said inner layer conductor pattern in a plate thickness direction, wherein said inner layer conductor pattern has a surface region which is the surface facing said outer layer conductor pattern, and said outer layer conductor pattern has an inner layer surface which is the surface facing said interlayer insulating layer and a side edge portion which is a side surface having an edge, an end of said inner layer surface of said outer layer conductor pattern is formed at a position so as not to overlap with said surface region of said inner layer conductor pattern in a planar direction, a first distance in a planar direction between an end of said inner layer surface of said outer layer conductor pattern and an end of said surface region of said inner layer conductor pattern is longer than half a second distance in a plate thickness direction between said outer layer conductor pattern and said inner layer conductor pattern, and voltages having different potentials are applied to said outer layer conductor pattern and said inner layer conductor pattern.

2. The printed wiring board according to claim 1, wherein the inner layer conductor pattern has a convex portion that protrudes in the plate thickness direction toward the outer layer conductor pattern and has a top surface in the surface region, and a concave portion that is formed around the convex portion in the planar direction, and the thickness between the surface of the inner layer conductor pattern facing the insulating substrate in the plate thickness direction and the concave portion is smaller than the thickness between the surface of the inner layer conductor pattern facing the insulating substrate in the plate thickness direction and the surface region.

3. The printed wiring board according to claim 1, wherein the thickness of said inner layer conductor pattern and said outer layer conductor pattern is 100 μm or more.

4. The printed wiring board according to claim 1, wherein the interlayer insulating layer is made of an organic insulating material or an organic-inorganic composite insulating material.

5. The printed wiring board according to claim 1, wherein the insulating substrate is made of an organic insulating material, an inorganic insulating material or an organic-inorganic composite insulating material.

6. A power conversion device comprising the printed wiring board according to any one of claims 1 to 5.

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