Method for manufacturing heteroepitaxial wafer

Abstract

The present invention is a method for manufacturing a heteroepitaxial wafer by epitaxially growing a 3C–SiC monocrystalline film on a monocrystalline silicon substrate. The method is characterized in that: the method includes a step in which a monocrystalline silicon substrate with a plane orientation of (111) is prepared, a step in which, using a flash lamp device, a native oxide film on a surface of the monocrystalline silicon substrate is removed by hydrogen baking, and a step in which a source gas that includes carbon and silicon is supplied into the flash lamp device and a SiC monocrystal is grown on the surface of the monocrystalline silicon substrate; in the step in which the native oxide film is removed, after preliminary heating at 300°C–600°C, hydrogen baking is performed at 900°C–1350°C; and, in the step in which the SiC monocrystal is grown, after preliminary heating at 300°C–600°C, SiC nucleation is performed at 900°C–1350°C. Due to this configuration, a method for manufacturing a heteroepitaxial wafer is provided by which a good-quality 3C–SiC monocrystalline film is epitaxially grown with good efficiency on a monocrystalline silicon substrate.

Description

Heteroepitaxial wafer manufacturing method

[0001] The present invention relates to a method for producing a heteroepitaxial wafer.

[0002] SiC has a wide band gap of 2.2 to 3.3 eV, which gives it high dielectric breakdown strength, and it also has high thermal conductivity, so it is a promising material for use as a semiconductor material in various semiconductor devices such as power devices and high-frequency devices.

[0003] Furthermore, while use as a platform for gallium nitride (GaN) growth (for example, Patent Document 1 and Non-Patent Document 1) is also progressing, small diameter SiC wafers are the norm, and larger diameters are required for power devices and high-frequency devices. If a high-quality 3C-SiC single crystal film could be formed on a large-diameter substrate, it would be possible to fabricate large-diameter heteroepitaxial wafers with high-quality GaN layers, in addition to using the 3C-SiC single crystal film itself.

[0004] Therefore, as a method for achieving this large diameter, epitaxial growth on silicon (hereinafter also referred to as Si) substrates, which are compatible with device processes, has been investigated (e.g., Patent Documents 1 and 2). These patent documents disclose that 3C-SiC single crystal films can be grown on silicon substrates, and that 3C-SiC single crystal films can be grown on large-diameter substrates, such as substrates with a diameter of 300 mm, by selecting the appropriate type of reactor. The formation of 3C-SiC single crystal films in these patent documents is characterized by introducing two types of source gases, a gas containing a carbon source precursor and a gas containing a silicon source precursor, into a reactor together with a carrier gas, and then decomposing these source gases by high-temperature treatment (up to 1200°C) or a combination of high-temperature treatment and plasma treatment to grow the film.

[0005] Furthermore, as an example of growing a 3C-SiC single crystal film on a silicon substrate, Patent Document 3 discloses the use of a single crystal silicon substrate with a (110) surface orientation as the single crystal silicon substrate in order to further reduce the lattice mismatch between silicon and SiC. While this is advantageous in terms of lattice mismatch, it is undesirable to limit the surface orientation to (110) when considering the production of heteroepitaxial wafers. Furthermore, the document also discloses the formation of a 3C-SiC single crystal layer containing hydrogen. However, it is conceivable that hydrogen will easily escape during the temperature rise process during the epitaxial growth sequence, and it is desirable that the conditions do not depend on the amount of hydrogen.

[0006] Furthermore, Patent Document 4 mentions the off-angle of the single crystal silicon substrate, but involves carbonization with propane and subsequent growth using propane and silane gas, which increases the number of source gas species and is disadvantageous for epitaxial growth.

[0007] Furthermore, Patent Document 5 discloses a method for growing a 3C-SiC single crystal layer on a single crystal silicon substrate with a (111) surface orientation and a diameter of less than 8 inches, using monomethylsilane as a source gas. The film formation conditions in this case are as follows: after the temperature of the single crystal silicon substrate reaches the film formation condition of 1050 to 1100°C, the pressure in the chamber is kept at 2×10 －４ ~3 x 10 －４ Torr (0.02 to 0.03 Pa), which is an extremely low pressure condition for forming the 3C-SiC single crystal layer, which results in a slow formation rate.

[0008] As described above, various formation methods have been developed and proposed, but when the lattice constants of silicon and SiC are taken into consideration, it is preferable to use a Si(111) substrate (the lattice constant of Si(111) is 3.84 Å, which is close to the lattice constant of 4.36 Å of 3C-SiC). However, even when Si(111) is used in consideration of the lattice constant as in the past and the growth conditions are devised, there are problems in improving the crystallinity of the 3C-SiC single crystal film.

[0009] JP-T-2018-522412 A JP-A-2021-20819 JP-A-2006-253617 JP-A-2008-184361 JP-A-2017-39622

[0010] Japanese Journal of Applied Physics 53, 05FL09 (2014) Japanese Journal of Crystal Growth Vol. 43, No. 4, 213 (2016)

[0011] As a cause of this, a more detailed study of the Si substrate surface structure, which had not previously been considered, revealed that the Si(111) substrate surface is known to undergo a phase transition in a narrow temperature range around 860°C (Non-Patent Document 2), and that the surface structure changes from a 7x7 structure on the low-temperature side to a 1x1 structure on the high-temperature side across this temperature range. Therefore, the surface structure changes as the temperature rises, making it difficult to form a clean 3C-SiC / Si interface. While it is possible to grow SiC at a low temperature low enough to cause a phase transition, this would result in island-like growth due to the low surface energy. Thus, problems specific to the Si(111) surface have hindered the growth of 3C-SiC single crystal films.

[0012] Furthermore, Si(110) is difficult to use as a substrate because it is even colder than Si(111) and various surface structures tend to appear. Furthermore, although Si(100) does not exhibit such a phase transition (more precisely, 4x4 structures have been reported, but this behavior occurs under high vacuum conditions), it is disadvantageous in terms of its lattice constant (5.4 Å, far from the lattice constant of 4.36 Å for 3C-SiC).

[0013] The present invention has been made to solve the above problems, and an object of the present invention is to provide a method for manufacturing a heteroepitaxial wafer that efficiently epitaxially grows a high-quality 3C-SiC single crystal film on a single crystal silicon substrate.

[0014] In order to solve the above-mentioned problems, the present invention provides a heteroepitaxial wafer manufacturing method for epitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, the method comprising the steps of: preparing a single crystal silicon substrate having a (111) plane orientation; removing a native oxide film on the surface of the single crystal silicon substrate by hydrogen baking using a flash lamp device; and growing a SiC single crystal on the surface of the single crystal silicon substrate by supplying a source gas containing carbon and silicon into the flash lamp device. The step of removing the native oxide film involves preheating at a temperature of 300°C to 600°C and then hydrogen baking at a temperature of 900°C to 1350°C. The step of growing the SiC single crystal involves preheating at a temperature of 300°C to 600°C and then nucleating SiC at a temperature of 900°C to 1350°C.

[0015] This heteroepitaxial wafer manufacturing method reliably forms 3C-SiC single crystal films by removing the native oxide film from the surface of the single crystal silicon substrate before growing the SiC single crystal. Furthermore, the use of a flash lamp device allows for fast temperature control and accommodates large-diameter substrates. Furthermore, the native oxide film removal process involves preheating at 300°C to 600°C, followed by hydrogen baking at 900°C to 1350°C. The SiC single crystal growth process involves preheating at 300°C to 600°C, followed by SiC nucleation at 900°C to 1350°C. Since both processes involve preheating at temperatures between 300°C and 600°C, i.e., temperatures well below the Si(111) phase transition temperature of 860°C, phase transitions can be prevented during preheating. Furthermore, the temperature range from 300°C or higher to 600°C or lower to 900°C or higher to 1350°C or lower can be moved in a short time using a flash lamp device, so the phase transition temperature can be passed through in an extremely short time, and control can be performed so that almost no phase transition occurs even during the temperature transition.

[0016] As described above, a heteroepitaxial wafer in which a high-quality 3C—SiC single crystal film is epitaxially grown can be efficiently manufactured using a simple manufacturing process while suppressing phase transition in the single crystal silicon substrate.

[0017] It is also preferable that the hydrogen baking time at 900° C. to 1350° C. is 10 ms to 100 ms, and the SiC nucleation time at 900° C. to 1350° C. is 1 ms to 20 ms.

[0018] This time allows the hydrogen baking time for removing the native oxide film and the nucleation time for growing the SiC single crystal to be kept as short as possible while still ensuring the necessary time for each. By shortening the residence time in a temperature range higher than 860°C, which is the phase transition temperature of Si(111), it is possible to minimize the phase transition during the residence time. Furthermore, since the shorter the residence time, the faster the temperature drops after heating, and therefore, it is possible to control the temperature so that almost no phase transition occurs during the temperature drop. Furthermore, because the residence time and the temperature change time are shortened, the time required for production can be shortened, allowing for efficient production of heteroepitaxial wafers having 3C-SiC single crystal films.

[0019] The source gas is preferably at least one of monomethylsilane and trimethylsilane.

[0020] Such a source gas contains both Si and C, which are the raw materials for SiC, and can supply both Si and C with a single gas. This eliminates the need for the conventional carbonization process prior to the growth of a 3C-SiC single crystal film, in which carbon atoms are deposited on the surface of a single crystal silicon substrate using a gas containing a carbon source precursor to form nuclei, making it possible to form a 3C-SiC single crystal film using an extremely simple process.

[0021] The heteroepitaxial wafer manufacturing method of the present invention reliably forms 3C-SiC single crystal films by removing the native oxide film from the surface of a single-crystal silicon substrate before growing a SiC single crystal. Furthermore, the use of a flash lamp device allows for fast temperature control and accommodates large-diameter substrates. Furthermore, the native oxide film removal process involves preheating at 300°C to 600°C, followed by hydrogen baking at 900°C to 1350°C. The SiC single crystal growth process involves preheating at 300°C to 600°C, followed by SiC nucleation at 900°C to 1350°C. Since both processes involve preheating at temperatures between 300°C and 600°C, i.e., temperatures well below the Si(111) phase transition temperature of 860°C, phase transitions can be prevented during preheating. Furthermore, the temperature range from 300°C or higher to 600°C or lower to 900°C or higher to 1350°C or lower can be moved in a short time using a flash lamp device, so the phase transition temperature can be passed through in an extremely short time, and control can be performed so that almost no phase transition occurs even during the temperature transition.

[0022] As described above, a heteroepitaxial wafer in which a high-quality 3C—SiC single crystal film is epitaxially grown can be efficiently manufactured using a simple manufacturing process while suppressing phase transition in the single crystal silicon substrate.

[0023] 1 is a flow diagram showing an example of a method for producing a heteroepitaxial wafer according to the present invention; FIG. 2 is a schematic diagram (a) of a process sequence of Example 1 and a graph (b) showing an XRD spectrum; and FIG. 3 is a schematic diagram (a) of a process sequence of Comparative Example 1 and a graph (b) showing an XRD spectrum.

[0024] The present invention will be described in detail below, but the present invention is not limited thereto.

[0025] As described above, there has been a need to provide a method for producing a heteroepitaxial wafer that efficiently epitaxially grows a high-quality 3C—SiC single crystal film on a single crystal silicon substrate.

[0026] As a result of extensive research into the above-mentioned problems, the inventors discovered that the surface of a Si(111) substrate undergoes a phase transition in a narrow temperature range around 860°C, changing from a 7x7 structure at the lower temperature side to a 1x1 structure at the higher temperature side across this temperature range. This phase transition contributes to the generation of defects. In other words, the conventional method of forming initial seeds for 3C-SiC growth using a Si(111) substrate, while flowing a carbonizing gas at a low temperature, makes good use of this phase transition. The unstable (high surface energy) portions of adjacent structures in the low-temperature 7x7 domains are used as the starting point (seed) for crystal growth, and the temperature is then raised to grow 3C-SiC. However, the surface structure transitions as the temperature increases, making it difficult to form a clean 3C-SiC / Si interface. While it is possible to grow 3C-SiC at a low temperature low enough to cause a phase transition, the low surface energy results in island-like growth. In order to solve these problems specific to the Si(111) surface, the inventors have investigated methods for rapidly passing through the phase transition temperature range, and as a result have discovered a method that makes it possible to control the temperature range so that almost no phase transition occurs by passing through the temperature range in a short period of time, and that also makes it possible to grow high-quality 3C-SiC single crystals with few defects, thereby completing the present invention.

[0027] That is, the method for manufacturing a heteroepitaxial wafer of the present invention is a method for epitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, the method comprising the steps of: preparing a single crystal silicon substrate having a (111) plane orientation; removing a native oxide film on the surface of the single crystal silicon substrate by hydrogen baking using a flash lamp device; and growing a SiC single crystal on the surface of the single crystal silicon substrate by supplying a source gas containing carbon and silicon into the flash lamp device. The step of removing the native oxide film involves preheating at a temperature of 300°C to 600°C and then hydrogen baking at a temperature of 900°C to 1350°C. The step of growing the SiC single crystal involves preheating at a temperature of 300°C to 600°C and then nucleating SiC at a temperature of 900°C to 1350°C.

[0028] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a flow diagram showing an example of a method for manufacturing a heteroepitaxial wafer according to the present invention. Each step of the manufacturing method will be described with reference to steps S1 to S3 in Fig. 1.

[0029] (Step S1) First, in step S1, a single crystal silicon substrate having a (111) crystal plane is prepared. The single crystal silicon substrate is placed in a flash lamp device.

[0030] (Step S2) Next, step S2 is a process of removing the native oxide film on the surface of the single crystal silicon substrate by hydrogen baking using a flash lamp device.

[0031] The natural oxide film on the surface is hydrogen baked (H ２ If the oxide film remains, it will be impossible to form nuclei of SiC on the single crystal silicon substrate, so this is to avoid this. ２ The annealing involves preheating the substrate at a temperature between 300°C and 600°C, which is sufficiently lower than the phase transition temperature of 860°C, and then removing the native oxide film from the surface of the single crystal silicon substrate at a temperature between 900°C and 1350°C. This is to prevent wafer damage due to thermal stress caused by a sudden rise in temperature when hydrogen baking is performed at a temperature between 900°C and 1350°C using a flash lamp device without preheating at a temperature between 300°C and 600°C.

[0032] Here, although not particularly limited, the temperature range can be more preferably 1000°C or more and 1200°C or less. If the temperature is low, the treatment time needs to be extended accordingly to prevent the natural oxide film from remaining, so it is more preferable to set the temperature at 1000°C or more. Conversely, if the temperature is high, there is a corresponding increase in the risk of slip generation, so it is more preferable to set the temperature at 1200°C or less. H at this time ２ There are no particular restrictions on the pressure and time of the annealing as long as the native oxide film can be removed.

[0033] Furthermore, it is preferable to set the hydrogen bake time at 900° C. to 1350° C. to 10 ms to 100 ms, which is the minimum time required for removing the native oxide film. This combination of temperature range and time allows the time required for the hydrogen bake to be kept as short as possible in a temperature range higher than 860° C., which is the phase transition temperature of Si(111).

[0034] When the temperature range is 1000° C. or more and 1200° C. or less, the time range can be, for example, 20 ms or more and 60 ms or less, although this is not particularly limited.

[0035] (Step S3) Next, in step S3, a source gas containing carbon and silicon is supplied into the flash lamp device to grow a SiC single crystal on the surface of the single-crystal silicon substrate. First, the substrate is preheated to a temperature of 300°C to 600°C, which is sufficiently lower than the Si(111) phase transition temperature of 860°C, and then SiC nucleation is performed at a temperature of 900°C to 1350°C. This is to prevent wafer damage due to thermal stress caused by a sudden temperature rise when nucleation is performed at a temperature of 900°C to 1350°C using a flash lamp device without preheating at a temperature of 300°C to 600°C.

[0036] The source gas is preferably at least one of monomethylsilane and trimethylsilane. Compared to Si, C atoms are smaller and more easily vaporized, so trimethylsilane is more preferable in terms of raw material efficiency, although this is not a particular limitation. Trimethylsilane is also easier to set conditions for.

[0037] It is preferable to set the time for SiC nucleation at 900° C. or higher and 1350° C. or lower to 1 ms or lower and 20 ms or lower. By using such a combination of temperature range and time, it is possible to minimize the residence time in a temperature range higher than 860° C., which is the phase transition temperature of Si(111), while ensuring the time required to grow a SiC single crystal.

[0038] Although not particularly limited, the temperature range can be more preferably 1100° C. or more and 1300° C. or less. Furthermore, when the temperature range is 1100° C. or more and 1300° C. or less, the time can be more preferably 5 ms or more and 10 ms or less, although not particularly limited.

[0039] As described above, the simple manufacturing process of steps S1 to S3 can suppress phase transition in the single crystal silicon substrate and efficiently manufacture heteroepitaxial wafers on which high-quality 3C—SiC single crystal films are epitaxially grown.

[0040] Although not particularly limited, it is more preferable to manufacture the SiC single crystal in step S3 while controlling the pressure, for example, by using a flash lamp device with a pressure reducing (RP) mechanism.

[0041] Specifically, it is more preferable to set the pressure to 100 Torr or less when preheating is performed at 300° C. or higher and 600° C. or lower, and to set the pressure to 10 Torr or less when subsequently performing SiC nucleation at 900° C. or higher and 1350° C. In this way, by performing SiC nucleation under pressure and temperature conditions that facilitate SiC nucleation, it becomes possible to more efficiently manufacture heteroepitaxial wafers having the desired 3C-SiC single crystal film thickness.

[0042] First, by setting the pressure to 100 Torr or less during preheating, it is possible to prevent secondary or higher-order reactions, such as the reaction of reactive species with the source gas in the gas phase, and therefore ensure the nucleation process of SiC.

[0043] Next, by setting the pressure to 10 Torr or less during SiC nucleation, a 3C-SiC single crystal film is grown while vacancies are formed in the silicon layer directly below the 3C-SiC single crystal film. The presence of these vacancies not only alleviates the lattice mismatch between 3C-SiC and silicon, but also relieves stress in the entire epitaxial layer, making it possible to form a 3C-SiC single crystal film free of crystal defects, even when a thick 3C-SiC single crystal film is subsequently grown.

[0044] As for the source gas, compared to a conventional two-stage method in which nuclei are formed by attaching carbon atoms to the surface of a single crystal silicon substrate using a gas containing a carbon source precursor, and then a 3C-SiC single crystal film is formed using a gas containing a carbon source precursor and a gas containing a silicon source precursor, this method makes it easier to control reactive species in the gas phase, ensures reliable growth, and enables the formation of a single crystal film without stopping the growth of the 3C-SiC single crystal.

[0045] In the above case, it is possible to form a thin 3C-SiC film with a thickness of about 2 nm. Furthermore, by using the 3C-SiC single crystal film grown in the above manner as a seed layer that also serves as a SiC nucleus formation layer, it becomes possible to further grow a high-quality, thick 3C-SiC crystal using an RP-CVD apparatus or the like.

[0046] EXAMPLES The present invention will be explained in more detail below by showing examples and comparative examples of the present invention, but the present invention is not limited to these examples.

[0047] [Example 1] The following description will be made with reference to Fig. 2. Fig. 2 shows (a) a schematic diagram of the processing sequence of Example 1 and (b) a graph showing an XRD spectrum.

[0048] A boron-doped single-crystal silicon substrate with a diameter of 300 mm (111) and a resistance of 10 Ω·cm was prepared. The single-crystal silicon substrate was placed in a flash lamp device, and the native oxide film on the surface was hydrogen baked (H ２ The H ２ For annealing, the substrate was preheated to 500° C., which is sufficiently lower than the phase transition temperature of 860° C., and then annealed at 1150° C. for 40 ms.

[0049] Next, trimethylsilane gas, a source gas containing carbon and silicon, was introduced at 100 sccm, the chamber pressure was set at 10 Torr, and the substrate was preheated to 500°C, which is sufficiently lower than the Si(111) phase transition temperature of 860°C. SiC was then grown on the single-crystal silicon substrate at 1300°C for 10 ms. The introduction of gas for 10 ms can be visualized as a narrow pulse, as shown in the schematic diagram of the processing sequence in Figure 2(a).

[0050] The crystallinity of the 3C-SiC single crystal film formed on the Si(111) substrate in this manner was evaluated by X-ray diffraction (XRD) using an in-plane configuration. The in-plane configuration is a technique that can obtain strong diffraction intensity even in thin films. Here, the Si(220) plane of the substrate is used as the reference, and by confirming the type of orientation plane of the 3C-SiC parallel to it, it is possible to determine whether the 3C-SiC is single crystal or polycrystalline, and information on the crystallinity can be obtained from the half-width of the 3C-SiC peak. In Example 1, as shown in FIG. 2(b), the only peak derived from the 3C-SiC was the (220) orientation. In other words, no peaks derived from other plane indices, which would indicate polycrystalline, were observed, confirming that a single-crystal 3C-SiC film had grown.

[0051] Comparative Example 1 will be described with reference to Fig. 3. Fig. 3 shows (a) a schematic diagram of the processing sequence of Comparative Example 1 and (b) a graph showing an XRD spectrum.

[0052] A boron-doped single crystal silicon substrate having a diameter of 300 mm (111) and a resistance of 10 Ω·cm was prepared and subjected to hydrogen baking at 1130° C. in an epitaxial furnace.

[0053] Next, while flowing trimethylsilane gas at 100 sccm, the temperature was increased from 300°C to 1100°C at a rate of 10°C / min. The pressure during this process was 100 Torr. The image of gas introduction here is a wide image, as shown in the schematic diagram of the processing sequence in Figure 3(a). The time during which Comparative Example 1 was exposed to temperatures higher than the phase transition temperature of 860°C was much longer than that of Example 1 (Figure 2(a)).

[0054] The crystallinity of the grown 3C-SiC film was then measured in plane by XRD. As shown in Figure 3(b), although only the 3C-SiC (220) peak parallel to the Si (220) appears, the peak is lower and wider than that of Example 1 (Figure 2(b)), resulting in a larger half-width. In other words, it can be seen that Comparative Example 1 has worse crystallinity than Example 1.

[0055] From the above, it can be seen that Example 1 of the present invention has better crystallinity of 3C-SiC than Comparative Example 1, and phase transition is suppressed.

[0056] The present invention is not limited to the above-described embodiments. The above-described embodiments are merely examples, and any configuration that is substantially identical to the technical idea described in the claims of the present invention and that provides similar effects is included within the technical scope of the present invention.

Claims

1. A method for manufacturing a heteroepitaxial wafer by epitaxially growing a 3C-SiC single crystal film on a single crystal silicon substrate, comprising the steps of: preparing a single crystal silicon substrate having a (111) surface orientation; removing a native oxide film on the surface of the single crystal silicon substrate by hydrogen baking using a flash lamp device; and supplying a source gas containing carbon and silicon into the flash lamp device to grow a SiC single crystal on the surface of the single crystal silicon substrate, wherein the step of removing the native oxide film comprises preheating at 300°C to 600°C and then hydrogen baking at 900°C to 1350°C, and the step of growing the SiC single crystal comprises preheating at 300°C to 600°C and then nucleating SiC at 900°C to 1350°C.

2. A method for producing a heteroepitaxial wafer as described in claim 1, characterized in that the hydrogen bake time at 900°C or higher and 1350°C or lower is 10 ms or longer and 100 ms or shorter, and the SiC nucleation time at 900°C or higher and 1350°C or lower is 1 ms or longer and 20 ms or shorter.

3. The method for producing a heteroepitaxial wafer according to claim 1 or 2, wherein the source gas is at least one of monomethylsilane and trimethylsilane.

Images