Systems and methods for determining an index of refraction of a material

Abstract

Systems and methods for measuring or determining the index of refraction of a material (100) using a clean (low jitter) digital clock signal. An electrical signal, the source clock, is generated and converted to an optical signal. The optical signal is transmitted through the material under test (100) and then detected with an optical sensor (130, 132) that converts the signal back to an electronic signal (the recovered signal). The difference in phase between the source clock and the recovered clock, as generated by a digital dual mixer time difference circuit DDMTD (30), is used to measure the velocity of light in the material under test (100). In some embodiments, the DDMTD (30) incorporates modem RF integrated circuits to achieve a high level of precision, capable of measuring a change in the optical path length of a signal to a precision of 100 femtoseconds, optionally to a precision of 10 femtoseconds.

Description

[0001] 2023-353 / U639.176.111 SYSTEMS AND METHODS FOR DETERMINING AN INDEX OF REFRACTION OF A MATERIAL Background

[0001] The present disclosure relates to material property measurements. More particularly, some embodiments of the present disclosure relate to the precise measurement of the index of refraction of a material in real time.

[0002] The understanding that light travels more slowly in a material than in a vacuum is a centuries-old idea. The definition of the index of refraction (“IoR”) or refractive index for a material is the ratio of the speed of light at the wavelength λ in a vacuum to the speed of light in the material. A material’s IoR indicates the degree of reflection of an incident beam of light off of the material’s surface (Fresnel coefficient), the change in angle of the trajectory of light at the material’s surface (Snell’s Law), and the value of the critical angle for light at the surface of the material.

[0003] Various methods for measuring IoR are used in industry. One method makes use of the physical principles of Snell’s Law. A beam of light is redirected through a medium and the deviation in the position is detected with a position-sensitive photodetector. Another approach entails splitting a beam of mono-chromatic light, directing one beam to pass though the material under review and the other to pass around the material. The two beams are then recombined and the amplitude of the combined beam is measured.

[0004] While available IoR measuring devices and techniques are well-accepted, they are generally characterized as being complex, expensive, difficult to calibrate, and in some instances may not provide a desired degree of precision. Summary

[0005] The inventors of the present disclosure recognized that a need exists for improved systems and methods for determining an index of refraction of a material. 2023-353 / U639.176.111

[0006] Some aspects of the present disclosure relate to systems and methods for measuring or determining the index of refraction of a material using a clean (low jitter) digital clock signal, whose frequency can be selected. In the system, an electrical signal, the source clock, is generated and converted to an optical signal (e.g., via a light emitting diode, a solid state laser, or similar transducer). The optical signal is then transmitted through the material under test and then detected with an optical sensor (e.g., transducer) that converts the signal back to an electronic signal (the recovered signal). Depending on the IoR of the material under test, the difference in phase between the source clock and the recovered clock, as generated by a digital dual mixer time difference circuit (DDMTD), can be used to measure the velocity of light in the material under test. In some non-limiting embodiments, the DDMTD incorporates modern RF integrated circuits to achieve a high level of precision, capable of measuring a change in the optical path length of a signal to a precision of better than 1e-13 second (100 femtoseconds (fs)), in some examples of at least 1e-14 second (10 fs) by taking repeated measurements over a period of 0.1 seconds. In some examples, a measurement precision on the order of 1e-14 seconds (10 fs) with an acquisition rate of 1 Hz is provided. Brief Description of the Drawings

[0007] FIG.1 is a block diagram of an IoR measuring system in accordance with principles of the present disclosure;

[0008] FIG.2 is a schematic diagram showing an example topology of a digital dual mixer time difference circuit useful with the systems and methods of the present disclosure;

[0009] FIG.3 is a schematic diagram showing portions of an example analyzer useful with the systems and methods of the present disclosure;

[0010] FIG 4 is a schematic diagram showing portions of an IoR measuring system in accordance with principles of the present disclosure; 2023-353 / U639.176.111

[0011] FIG.5 is functional block diagram showing an example topology of portions of an IoR measuring system in accordance with principles of the present disclosure;

[0012] FIG. 6 is a functional block diagram of portions of an IoR measuring system in accordance with principles of the present disclosure;

[0013] FIG. 7 is a functional block diagram of portions of an IoR measuring system in accordance with principles of the present disclosure;

[0014] FIG. 8 is a functional block diagram of portions of an IoR measuring system in accordance with principles of the present disclosure;

[0015] FIG. 9 is a functional block diagram of portions of an IoR measuring system in accordance with principles of the present disclosure;

[0016] FIGS.10-17 are graphs reporting results of testing described in the Examples section. Detailed Description

[0017] The present disclosure relates to systems and methods for determining or measuring an index of refraction (IoR) of a material, such as an optically transparent material. One example of an IoR measuring system 20 in accordance with principles of the present disclosure, and useful for performing methods of the present disclosure, is shown in block form in FIG. 1. The system 20 includes a digital dual mixer time difference (DDMTD) circuit 30, a clock signal generator 32, a transmitter module 34, a detector module 36, and an interface assembly 38. Details on the various components are provided below. In general terms, the clock signal generator 32 operates to generate an electric clock signal that is provided to the DDMTD circuit 30 and the transmitter module 34. The transmitter module 34 converts the electric clock signal to an optical clock signal. The optical signal is transmitted through the material under review and is received or detected by the detector module 36 as a recovered optical signal. In this regard, the material under review is arranged relative to transmitter and detector components of the modules 34, 36 by the interface assembly 38. The detector 2023-353 / U639.176.111 module 36 converts the recovered optical signal to an electrical signal that is delivered to the DDMTD circuit 30. The DDMTD circuit 30 operates to generate reference and test signals from which the IoR of the material under review can be determined, for example by operation of an analyzer 40. The system 20 can optionally include, or be connected to, a memory 42 and / or user interface components such as a user input component 46 (e.g., keyboard) and a display 48 for conveying the determined IoR and / or other information. The systems and methods of the present disclosure can determine or measure the IoR of a material in real time by measuring to a very high precision the velocity of light in the medium. For example, in some embodiments the DDMTD circuit 30 is capable of detecting phase differences in digital clocks to the level of a few tens of femtoseconds (fs); as light in vacuum travels 30 µm in 100 fs, measurements to that precision are available.

[0018] The DDMTD circuit 30 is generally configured to generate and measure the time difference between two digital clock signals (in some non-limiting examples, two out- of-phase digital clock signals) with very fine resolution (sub-picosecond) using a relatively low speed circuit. One example of the DDMTD circuit 30 is shown in FIG. 2 and is generally composed of a phase-locked-loop clock multiplier (PLL) and two flip-flops (FFref, FFtest). With the DDMTD circuit 30, a digital reference clock signal (uref) is an input to the first flip-flop FFref, and a digital test clock signal (utest) is an input to the second flip-flop FFtest. In some embodiments, the input digital clock signals are each fanned out to the corresponding flip-flop with a fan-out chip (Fan Out). The digital reference clock signal uref is also delivered to the PLL, for example via another fan-out chip Fan Out. The input digital clock signals are heterodyned at the corresponding flip-flop FFref, FFtest by mixing with an offset frequency clock (CLK PLL) generated by the “helper” PLL that is phase-locked to the reference clock signal uref. The heterodyned outputs of the two flip-flops are beat clocks designated as BEAT CLK A (the heterodyned reference clock signal) and BEAT CLK B (the heterodyned test clock signal). The relative phases of the two beat clocks can be compared to measure changes in the phase difference between the two input clock signals. In some 2023-353 / U639.176.111 non-limiting examples, the BEAT CLK A, BEAT CLK B, and CLK PLL are delivered to a sampling circuit or a controller (e.g., the analyzer 40 (FIG.1)) to count the number of CLK PLL cycles between the transitions of BEAT CLK A and BEAT CLK B. Other techniques for measuring or determining the phase difference between the beat clocks are also acceptable.

[0019] In some embodiments, a tunable parameter of the DDMTD circuit 30 is an offset factor (Noffset) that affects the sampling rate and the precision which are inversely related. Where the reference clock signal uref has a frequency vref and a period τref, and the test clock signal utesthas a frequency vtestand a period τtest, then the frequency of the offset clock, vddmtd, can be selected using Equation 1 as: ^^ ^^ௗௗ^௧ௗൌ^^^^^௧^^ ∙ ^^^^^ Eq.1^^^^ ^ 1where the offset number of input cycles required for a full phase cycle of the beat clock, whose frequency (vbeat) is given by Equation 2 as: 1 ^^ ^^௧ൌ ^^∙ ^^ ^^^^^^ ௗௗ^௧ௗ ൌ^ Eq.2 The time with a minimum sensitivity (tmin) that is given by Equation 3 as: 1 ^^ ^^ ^^ ^^ ∙^^^௧ ௗௗ^௧ௗ ^^^^^ ^^^^ By Δtbeat, the time difference between uref and utest (Δt) can be measured by Equation 4 as: ^^^^∆^^ ∙^௧ ^^^௧ 2023-353 / U639.176.111

[0020] One consideration of some methods of the present disclosure is set by the precision with which the helper phase-locked-loop clock multiplier PLL can accurately generate the offset clock, and can be determined by Equation 3 via known parameters of the input clock. As the time difference between the input clocks is determined from both the positive and negative edges of the beat clocks, the highest frequency that it can be measured is provided by Equation 5 as: 2^^^ି^^^ ^ௗ^ ൈ ^^^^ ^^^^௫^^ ^^^௧ൌ^^^2^ 1 Eq.5

[0021] When the edge of the input clocks, the setup and hold times may be violated and the output of the flip-flop becomes metastable. This instability can last for several clock cycles of the input clock. This metastability can be removed through various methods. One such method is to estimate the exact time of the transition using the average time of the first and last transitions. The length of the metastability can be determined by the setup and hold times of the flip-flops used. Other optional techniques and configurations for addressing metastability in accordance with the present disclosure are provided below.

[0022] Components useful with the DDMTD circuit 30 can assume various forms, and in some embodiments can be discrete, off-the-shelf radio frequency components. In some non-limiting examples, the flip-flops FFref, FFtestare high-performance D-type flip- flop chips, such as a differential D flip-flop with a maximum input clock frequency or clocking rate of at least 10 GHz, optionally on the order of 12 GHz, and setup and hold times optionally on the order of 15 picoseconds (ps). In some embodiments, the flip- flops FFref, FFtestcan be, or can be akin to, a flip-flop component available under the trade designation NB7V52M from ON Semiconductor Corp. The clock multiplier PLL can be a PLL-based jitter attenuator / clock multiplier integrated circuit, optionally with an RMS jitter on the order of 90 fs. In some embodiments, the clock multiplier PLL can be, or can be akin to, a jitter attenuating clock multiplier component available under the trade designation Si5344 from Silicon Labs. The fan-out chips Fan Out can 2023-353 / U639.176.111 be a high performance equalizer receiver (signal enhancer) package, optionally with a random jitter + deterministic jitter on the order of (0.2 + 3.0) ps. In some embodiments, the fan-out chips Fan Out can be, or can be akin to, a fan out buffer, equalizer receiver component available under the trade designation NBVQ1006M from ON Semiconductor Corp. With these and similar configurations, the DDMTD circuit 30 can, in some embodiments, be characterized by short set-up and hold times (e.g., on the order of 10ps), and is capable of detecting a phase change in a modulated digital pulse train by heterodyning it with a pulse train modulated at a frequency slightly offset by one one-hundred thousandth of the initial frequency (fhet= fin(1 – 1 / 100,000)). In yet other embodiments, 1 / 1,000,000 frequency offsets (or even smaller) may be available and can be employed. Regardless, the DDMTD circuit 30 can provide measurement precision of at least 100 femtoseconds in some examples; with other embodiments, precision can be improved by a factor of at least 10. With embodiments of the present disclosure, the DDMTD circuit 30 is capable of measuring the beat frequency with higher precision as compared to conventional components with setup and hold times on the order of 800 ps.

[0023] Returning to FIG. 1, the clock signal generator 32 can assume various forms appropriate for generating an oscillating clock signal (oscillating between a high and low state), and can be a precision clock generating system. In some non-limiting examples, the clock signal generator 30 incorporates any crystal or crystal resonator- based design, for example a crystal oscillator (XO). In some embodiments, the clock signal generator 32 can be an oven-controlled crystal oscillator (OCXO) or similar construction with high stability (low jitter) and accuracy. Other formats, such as Rubidium clocks, MEMS oscillators, ceramic resonators, etc. Regardless, in some embodiments, the clock signal generator 32 is configured such that an output frequency can be selected by a user.

[0024] The transmitter module 34 can have various constructions capable of converting an electric clock signal to an optical clock signal, and transmitting or emitting the optical 2023-353 / U639.176.111 signal. In some examples, the transmitter module 34 includes driver or converter electronics and a corresponding optical emitter, for example a laser driver and laser device (e.g., laser diode, solid state laser, etc.). Other optical emitter formats are also acceptable, for example light emitting diode or similar transducer. In some examples, the transmitter module 34 can include a high-bandwidth optical emitter, although other configurations / emitted radiation wavelengths are also acceptable. More generally, the transmitter module 34 can be selected or configured in accordance with the material to be tested, and in particular to emit radiation (i.e., the optical signal) at wavelengths to which the material under test is otherwise optically transparent (e.g., an emitter configured to emit radiation at wavelengths longer than 1.1 µm for measuring the IoR of a silicon wafer).

[0025] The detector module 36 can have various constructions of receiving or detecting an optical signal and converting the recovered optical signal to an electrical signal. In some examples, the detector module 34 includes a detector device and corresponding converter circuitry. A format of the detector device corresponds with a format of the emitter device of the transmitter module (i.e., the detector device is formatted to detect or sense radiation at the wavelengths being emitted by the emitter device), and can include an optical transducer or sensor such as a photodetector or photosensor.

[0026] The interface assembly 38 can assume various forms for arranging the emitter and detector components of the modules 34, 36 relative to the material under test, and vice- versa. For example, the interface assembly 38 can include or provide a fixture-type device that optically aligns the emitter and detector components along an optical path, and establishes a holding region that facilitates placement of the material under test across the optical path. The interface assembly 38 can optionally include one or more optical components that facilitate or enhance optical coupling between the emitter and the detector (e.g., lens, mirror, etc.).

[0027] The analyzer 40 can assume a wide of forms capable of determining or indicating the IoR of the material under review. For example, the analyzer 40 can be or include a 2023-353 / U639.176.111 conventional electronic instrumentation with signal processing (e.g., off-the-shelf digital / analog circuits, time-to-digital converters (with filters), field programmable gate arrays (FPGA), etc.). In other examples, the analyzer 40 can be or include a processor or microprocessor, embedded microprocessor, embedded controller, digital signal processor (DSP), etc., configured to execute program code stored as software in the memory 42. The program code, when executed by the processor, causes the processor to implement the IoR determination functions described herein. The processor can reside in any suitable computing equipment, such as a personal computer, laptop, mobile electronic device, server or cloud-based computational platform. The processor can further cooperate with the memory 42 to store data. Some of the computer implemented methods of the present disclosure operate one or more algorithms or equations described herein.

[0028] In some examples, the analyzer 40 can be formatted to address metastability of the outputs of the DDMITD flip-flops FFref, FFtest (FIG. 2). As mentioned above, metastability occurs when the edges of the clock and the offset clocks are precisely aligned and the output of the flip-flop is indeterminate and changes state rapidly. In some embodiments, the effect can be minimized by using flip-flops with short setup and hold times (e.g., on the order of 20 ps). In other embodiments, the analyzer 40 can include or be associated with circuitry components that operate to estimate a mid-point of the instability. For example, and as represented by FIG. 3, a sampling circuit or module 60 can be provided with, or electronically connected to, the analyzer 40 that includes an FPGA with digital filter data acquisition (DAQ) arrangement. The electronic filter(s) provided with the sampling circuit 60 can be designed to precisely determine the time difference between the phase changes of the flip-flops of the DDMTD circuit 30. For example, the sampling circuit or module 60 can optionally include one or more of low-pass filters (that can function to find the estimates of the true transition of the output clocks), a phase-locked loop (PLL) carrier board (that can function to attenuate the jitter in the two output clocks), a time-difference circuit (TDC), etc. In some examples, precise measurements can be objected with the TDC 2023-353 / U639.176.111 alone, and enhanced results can be obtained with the TDC and the PLL working in tandem.

[0029] One non-limiting example of sampling circuity or module 70 useful with the systems and methods of the present disclosure is provided in FIG.4. As generally reflected by FIG.4, two clocks ck_in0 and ck_in1 are converted from optical to electrical signals with small form-factor pluggable (SFP) optical transceivers 80. The offset clock is generated by a phased-locked loop carrier board (PLL) 82. The two outputs of the DDMTD circuit 30 are passed through to low pass filters (LPF) 84, 86, respectively; their outputs (beat clocks 0 and 1) are cleaned and stabilized by two PLLs 90, 92, whose output is sent to a time difference circuit (TDC ) 94 for enhanced measurements. Other circuity components or module configurations are also acceptable.

[0030] FIG. 5 illustrates, in simplified form, portions of one example of an IoR measuring system of the present disclosure arranged to measure or determine the IoR of a material under test 100. The IoR measuring system of FIG. 5 can have any of configurations described above with respect to the system 20 (FIG. 1), and includes the DDMTD circuit 30, the clock signal generator 32, the transmitter module 34, the detector module 36, and the interface assembly 38 (referenced generally). With the non- limiting example of FIG.5, the transmitter module 34 includes a laser driver 120 and a laser 122, and the detector module 36 includes a photodetector 130 and a photodetector converter circuit 132. The interface assembly 38 establishes optical alignment between the laser 122 and the photodetector 130 such that a beam 134 emitted by the laser 122 is received at the photodetector 130. When placed within the interface assembly 38, the material under test 100 is along the optical path 134. With the optional embodiment of FIG. 5, the interface assembly 38 further includes an upstream lens 140 and a downstream lens 142. The lenses 140, 142 are arranged in the optical path and are configured to collimate and focus the beams of optical signals emitted upstream and downstream of the material under test 100. Though not shown, 2023-353 / U639.176.111 the system can further include a controller or processor programmed to perform a measuring operation as described below.

[0031] During use, the clock signal generator 32 generates an electrical source clock signal that is distributed to both the laser driver 120 and the DDMTD circuit 30 (as the reference input signal (uref) to the DDMTD circuit 30). The laser driver 120 generates optical signals based off of the clock signal; the optical signals are than transmitted through the material under test 100 by the laser 122. After passing through the material under test 100, the optical signals are received or detected by the photodetector 130; the photodetector converter circuit 132 converts the received optical clock signal to an electrical signal that is distributed to the DDMTD circuit 30 (as the digital test clock signal (utest) to the DDMTD circuit 30). When traveling through the material under test 100, the optical clock signal will experience a delay that depends on both the refractive index of the material under test 100 and the path length. Thus, with the DDMTD circuit 30 operating as described above and outputting BEAT CLK A (the heterodyned reference clock signal), BEAT CLK B (the heterodyned test clock signal), and CLK PLL, the difference in phase between the heterodyned source clock and recovered or test clock can be used to measure the velocity of light in the material under test 100, for example by counting the number of CLK PLL cycles between the transitions of BEAT CLK A and BEAT CLK B.

[0032] In some examples, the phase difference between the heterodyned clocks can be calculated to a designated sensitivity. As a point of reference, the definition of refractive index of a medium is defined as the ratio of velocity of light in vacuum to the velocity of light in that particular medium. This is a well-known principle that constraints the length, refractive index and the delay of the light pulses in a medium that can be used to estimate one given the other two. With this in mind, refractive index n of the material under test 100 that has a path length of L that experiences a delay of Td for an optical signal of a given wavelength λ can be determined by Equation 6 as follows: 2023-353 / U639.176.111 ^^ ^^ ^ ^ ∙ ∆^^ௗ ^^∆^^ ^^ ൌ^^Eq.6where c is the velocity of between the refractive index with the medium and without the medium present in the cavity. A conversion factor Δt of the DDMTD circuit 30 for a given DDMTD offset parameter Noffset can be described by Equation 4 above. The conversion factor Δt can be the delay between the clocks uref and utest measured from the group delay or phase difference between the heterodyned clocks (Δtbeat). Δtbeatcan only be measured in steps of PLL clock period which leads to a theoretical sensitivity of tmin given by Equation 7 below where τref is the time period of the reference clock µref. ^^ ^^^^^^^^ൌ ^^Eq.7

[0033] In some embodiments, jitter of the clock (e.g., on the order of a ps) can assist in reducing the quantization distortions improving the sensitivity of the DDMTD circuit 30 over a larger interval at the cost of sampling rate. Averaging over a large interval can also mitigate the surface vibrations and other environmental noise which can be modeled through a symmetric distribution.

[0034] In some embodiments, the DDMTD circuit 30 can operate with a repetition rate of approximately 1 kHz. With these and related embodiments, the value of IoR can be repeatedly measured at that frequency with a precision determined by the thickness of the material under test. For example, for a material with an index of refraction of ¼ and a thickness of 5 mm, the IoR can be measure to a precision of 0.1% every 0.1 seconds with some systems and methods of the present disclosure. In yet other embodiments, precisions on the order of 1e-14 seconds (10 fs) at a sampling rate on the order of 1 Hz are provided, for example by employing one or more of the sampling circuitry schemes implicated by FIG. 3. The intrinsic precision can depend on the mechanical stability of the system, signal integrity of the clock through both the 2023-353 / U639.176.111 electrical and optical paths, and the stability of the clock. In some embodiments, the offset-factor Noffset can be adjusted, leading to an increase in the precision at the same sampling rate by extending the data collection over longer intervals to average out high frequency noise. Some estimated relationships between sampling rate and precision are provided in the Examples section below.

[0035] By way of further explanation, in some examples, precision of measurements provided by the systems and methods of the present disclosure can be determined as: ^^ ଶ ^ ∆^^ ^∙ ^^ଶ ^ ^ ଶ^ ^where l is the length speed of light; Δn is the difference in refractive index to the reference material; and Δt is the difference in time with respect to the reference material. With this in mind, some systems and methods of the present disclosure can be characterized as a linear system that is easy to calibrate to achieve very good accuracy. The effects of mechanical instability drop as Δn approaches small values. Precision improves as l increases. While thermal effects affect both σland σΔt, this can be mitigated by increasing l and implementing temperature stabilization techniques. Further, σΔt can be reduced by one or more of increasing the sampling rate and reducing uncorrelated clock jitter. Thus, some systems and methods of the present disclosure provide for the optimization of two major variables: sampling rate to improve Δt precision and the length l of the medium being evaluated.

[0036] The systems and methods of the present disclosure can be used for absolute IoR measurements (subject, in some examples, to rigidity and cross-calibration) and / or relative IoR measurements in a wide variety of end-use applications. For example, 2023-353 / U639.176.111 systems and methods of the present disclosure can be applied for direct measurement of real-time variations in the index of refraction of a material as would be beneficial in pharmaceutical, petroleum, food / beverage, and other manufacturing process. The systems and methods of the present disclosure are useful for IoR measurements of gases, liquids, and all materials that are transparent to the wavelength of the emitted optical clock signal.

[0037] The interface assembly 38 generally reflected by FIG. 5 is but one arrangement envisioned by the present disclosure. In other embodiments, the interface assemblies of the present disclosure can incorporate or implement various other optical components, can effect different arrangements of the emitter and detector components relative to a material under test, can incorporate additional emitters / detectors, etc. For example, FIG.6 illustrates, in simplified form, another interface assembly 150 useful with the IoR measuring systems and methods of the present disclosure. The interface assembly 150 maintains a laser (or other emitter device) 152 in optical alignment with a photodetector (or other detector device) 154, and establishes a holding region or cavity 156 (referenced generally) for placement of a material under test 158 relative to the optical path. In addition, the interface assembly 150 includes first and second concave mirrors 160, 162. The first mirror 160 is optically between the laser / emitter 152 and the material under test 158, and is configured to transmit in one direction while reflecting in the other through a window aligned with the optical beam. The second mirror 162 is optically between the material under test 158 and the detector / photodetector 154 and is configured to transmit only a fraction of the incident optical beam, characterized by a transmission coefficient T of the mirror 162 and reflects based on a reflection coefficient R of the mirror 162. By arranging the first and second mirrors 160, 162 as shown, there will be multiple reflections that go through the material under test 158 when placed in the cavity 156 defined by the concave mirrors 160, 162 (represented in FIG. 6 by a single beam 170 entering and exiting the cavity 156, and multiple reflected beams 172 within the cavity 156). The delay caused by the material under test 158 (that is otherwise in the optical path) is 2023-353 / U639.176.111 multiplied by the number of reflections that occur in the cavity 156. The number of reflections considered by the delay calculation can be adjusted by adjusting, for example, the voltage threshold of the photo-diode driver circuit. With these and similar embodiments, the refractive index of, for example, a gaseous medium can readily be characterized provided the values of R, T, and a length L of the cavity 156 are chosen correctly. The precision could improve by a factor that depends on the number of reflections, and this parameter is readily tunable. Additional features can be included with the arrangement of FIG.6 to provide for high mechanical stability (as mechanical noise may also be amplified by the arrangement). Notably, the topology of FIG.6 is very similar to that of a laser cavity, making it easier to realize.

[0038] Another interface assembly 200 useful with the IoR measuring systems and methods of the present disclosure is shown in simplified form in FIG.7. The interface assembly 200 is akin to the arrangement of FIG.5, arranging a material under test 202 along an optical path from a laser (or other emitter) 210 to a detector 212. In addition, a reference laser 220 and reference detector 222 are provided. The lasers 210, 220 and the detectors 212, 222 are identical, as is the path length / cavity between the corresponding components. Any optical components (e.g., lenses) provided between the laser 210 and the detector 212 are also provided and identically arranged between the reference laser 220 and the reference detector 222. During operation of the corresponding system, the refractive index of the material under test 202 is measured (including operation of the laser 210 to emit an optical clock signal that is sensed by the detector 212 as described above) simultaneously with that of the reference cavity / no material (including operation of the reference laser 220 to emit the identical optical clock signal that is sensed by the reference detector 222). The data or information from the reference arrangement can be used to cancel out any correlated fluctuations (e.g., arising due to environmental effects). Comparing the relative phases of the two recovered signals can be used to measure the absolute IoR value. 2023-353 / U639.176.111

[0039] Another interface assembly 250 useful with the IoR measuring systems and methods of the present disclosure is shown in simplified form in FIG. 8. The arrangement includes a first emitter 260 (e.g., laser), a first detector (e.g., photodiode) 262, a second emitter 270 and a second detector 272. The interface assembly 250 optically aligns the first emitter 260 with the first detector 262 as represented by a first beam 280, and the second emitter 270 with the second detector 272 as represented by a second beam 282. Further, the emitters 260, 270 are maintained relative to one other, and relative to a material under test 290, such the first and second beams 280, 282 pass through the material under test 290 and collectively define an intersection angle θ. The arrangement of FIG.8 can serve to reduce mechanical instability. Using the geometry of FIG. 8, the effects of mechanical instability can be rectified by correlating the delayed signal from both of the detectors 262, 272. For example, Equation 10 below accounts for the delayed signal from the first detector 262 (denoted by “+” in the equation) and from the second detector 272 (denoted by “–“ in the equation) and is uniquely solvable for n(λ) for rotation of the material test by a small, unknown angle α. േ^^ ∙ ^^^^^^^^ ൌEq.10

[0040] Another interface systems and methods of the present disclosure is shown in simplified form in FIG. 9. The arrangement of FIG. 9 includes an emitter (e.g., laser) 310 and detector (e.g., photodiode) 312 as described above, and a mirror 314. The interface assembly 300 maintains the emitter 310 relative to the detector 312 and the mirror 314 such that the mirror 314 reflects an emitted beam 316 to the detector 312, and provides a holding region within which a material under test is placed along the beam path. The configuration of FIG.9 locates the emitter 310 and the detector 312 on the same side of a material under test 320, facilitating same side measurements. 2023-353 / U639.176.111 EXAMPLES

[0041] Embodiments and advantages of features of the present disclosure are further illustrated by the following non-limiting examples. The particular materials and amounts thereof recited in these examples, as well as operating conditions and details, should not be construed to unduly limit the scope of the present disclosure.

[0042] An IoR measuring system was prepared in general accordance with the topology of FIG.5 and included the DDMTD circuit 30 of FIG.2. The flip-flops were each a D- type flip-flop NB7V52M from ON Semiconductor Corp. The clock multiplier PLL was a jitter attenuating clock multiplier Si5344 from Silicon Labs. The fan-out chips Fan Out were each a buffer, equalizer receiver fan-out NBVQ1006M from ON Semiconductor Corp. An oven-controlled crystal oscillator (OCXO) with a jitter attenuator Si5344 from Silicon Labs was used as the master clock generator to generate a very stable (low-jitter) reference clock signal. The transmission module included a laser driver and a laser; the receiver module included a photodetector (photodiode) and conversion circuitry. The laser transmitter and the photodiode receiver were provided as part of an SFP transceiver available under the trade designation FTLF1318P3BTL from Finisar Corp. Lens elements were placed in the optical path to both collimate and focus the beams of optical signals. Other off-the- shelf components were used to complete the various connections, including a fixed fiber-to-fiber coupler (FBC-1310-APC from Thorlabs) and optical fibers. The emitter, detector and other optical components were selected for experiments with optical light at a wavelength of 1310 nm for convenience / use of off-the-shelf components. Outputs from the DDMTD circuit (e.g., BEAT CLK A, BEAT CLK B, CLK PLL) were processed by a sampling circuit implemented on an Artix 7 FPGA to count the number of CLK PLL cycles between the transitions of BEAT CLK A and BEAT CLK B.

[0043] Tests were performed on a transparent cube of unknown refractive index with dimensions of 39.5 mm x 39.5 mm x 39.5 mm. The master clock was set to a frequency of 160 MHz with Noffset = 100k, giving a theoretical sensitivity of tmin = 62.5 fs. Data 2023-353 / U639.176.111 reported below were collected in bursts over a period of 30 – 35 minutes, with and without the test material inserted into the optical path through multiple acquisitions, acquiring approximately 200 milliseconds (ms) of data each time. After each burst, the data were analyzed, recorded and the measurement resumed. The total acquisition time for the data was approximately 10 seconds.

[0044] FIG.10 is a histogram used to determine the noise floor of the Δt measurement without the test material in the optical path, and reflects the delay Δt between uref and utest measured without material in the optical path for approximately 5 seconds worth of data and σΔt= 700 fs. FIG. 11 shows the expected precision as a function of the sampling rate with the data that were collected, showing stability σΔn(λ)as a function of the sampling rate. As a point of reference, lower σΔn(λ) implies better precision. The number of samples considered for the standard deviation is shown next to each data point in the plot of FIG.11.

[0045] FIG. 12 shows the effect on the signal phase when introducing the transparent cube into the optical path of the clock signal, and in particular the effect of the delay Δt between urefand utestmeasured with the test material in the optical path. The delay was averaged over 0.1 second and was acquired at a rate of 1.6 kHz. As a point of reference, the data was not acquired continuously, but approximately 30 – 35 minutes of data with and without the test material in the optical path was taken, out of which approximately 5 seconds worth of data was collected (both with and without the test material).

[0046] The plots of FIGS.13A and 13B show the stability of the measurements without the material inserted into the optical path at a sampling rate of approximately 10 Hz. FIG. 131A reports the delay Δt between uref and utest as a function of time of acquisition; FIG.13B provides a histogram of measurements from which it was concluded that the stability σΔtof the measurements without the test material in the optical path to be 90 fs. 2023-353 / U639.176.111

[0047] The plots of FIGS. 14A and 14B show the stability of the measurements with the material inserted into the optical path at a sampling rate of approximately 10 Hz. FIG. 14A reports the delay Δt between urefand utestas a function of time of acquisition; FIG. 14B provides a histogram of measurements from which it was concluded that the stability σΔt of the measurements with the test material in the optical path to be 120 fs. The increased fluctuations noticed with the test material in place (versus without the test material in the optical path) were attributed to environmental effects such as mechanical vibrations.

[0048] With the refractive index of air assumed to be 1, the refractive index of the test material was calculated to be 1.5719 ± 0.0001 averaging the full data sample. This represents a precision of 100 ppm or one part in 104at the sampling rate of approximately 0.2 Hz. At a sampling rate of 10 Hz, the precision becomes approximately 700 ppm for each measurement, increasing at 1.6 kHz acquisition rate to 5400 ppm.

[0049] Another IoR measuring system was prepared in accordance with the topology of FIG. 3 and included the DDMDT circuit as described in the Examples above. The offset clock generated by a PPL was shared between the DDMTD board and a low-pass filter board. The two outputs of the DDMTD board were passed through to the low-pass filters; their outputs (beat clocks 1 and 2) were sent to a TDC board. The clock generator board had an inbuilt delay chip capable of shifting the skew of the clock in steps of approximately 5 ps. After optimizing various factors such as the topology, PLL, and TDC configurations, a precision of approximately 10 fs at a sampling rate of approximately 1 Hz for the noise floor was achieved. For example, FIG.15 reports a single shot measurement, collecting 399 data-points in a time-window of approximately 1.3 seconds. µ of the distribution was 92.33 ± 0.01 ps with a σ of 210 fs. FIG.16 reports the repeated measurements showing the fluctuations in the single- shot measurements. The standard deviation (σ) fluctuations in the mean is 11.32 fs.

[0050] To further evaluate the above system’s ability to measure refractive index, the clock was routed through an optical cavity using two SFPs where were known to introduce 2023-353 / U639.176.111 jitter. The results of this test are reported in FIG. 17 that otherwise provide a single shot measurement of clock phase through the optical cavity averaged over an acquisition time window of 9.6 seconds to retrieve back the precision. µ of the distribution is 1518.910 ± 0.014 ps with a σ of 870 fs.

[0051] The systems and methods of the present disclosure provide a marked improvement over previous designs. Index of refraction of a medium or material (solid, liquid or gas) can be measured in real time at exceedingly high levels of precision. Unlike refractometers, the systems and methods of the present disclosure do not rely on a measurement of total internal reflection at a surface; instead, the refractive index across the material is measured (and which may not be the same as at the surface). Thus, surface deposits on the material or object under evaluation (e.g., unexpected deposits on a glass window) will not substantively affect measurements obtained by the systems and methods of the present disclosure. Further, the systems and methods of the present disclosure entail static measurement without any moving parts, rendering the systems simple to build, maintain, and calibrate. Moreover, a wide variety of light sources can be used with the systems and methods of the present disclosure as coherence is not required (unlike, for example, measuring delay using interference techniques).

[0052] Although the present disclosure has been described with reference to preferred embodiments, workers skilled in the art will recognize that changes can be made in form and detail without departing from the spirit and scope of the present disclosure.

Claims

2023-353 / U639.176.111 What is Claimed Is:

1. A system for measuring an index of refraction of a material, the system comprising: a clock signal generator configured to generate a digital reference clock signal; a transmitter module configured to convert an electrical signal to an optical signal and transmit the optical signal; a detector module configured to detect an optical signal and convert the optical signal to an electrical signal; an interface assembly configured to arrange a material under review along an optical path from an emitter of the transmitter module to a detector of the detector module; a clock signal generator configured to generate a digital reference clock signal; and a digital dual mixer time difference (DDMTD) circuit; wherein the system is configured to perform a measurement operation including: the digital reference clock signal is delivered to the DDMTD circuit and the transmitter module, the transmitter module converts the digital reference clock signal to an optical reference clock signal that is transmitted through the material under review to produce an optical test clock signal, the detector module senses the optical test clock signal and converts the optical test clock signal to a digital test clock signal that is delivered to the DDMTD circuit, the DDMTD circuit heterodynes the digital reference clock signal and the digital test clock signal; wherein a phase difference between the digital reference clock signal and the digital test clock signal is determined as a function of the heterodyned signals;2023-353 / U639.176.111 and further wherein the system is configured to determine the index of refraction of the material under review as a function of the phase difference.

2. The system of claim 1, wherein the DDMTD circuit is configured to heterodyne the digital reference clock signal and the digital test clock signal with a pulse train modulated at frequency offset from a frequency of the digital reference clock signal.

3. The system of claim 2, wherein the frequency offset is less than 1 / 1000 of the frequency of the digital reference clock signal.

4. The system of claim 2, wherein the frequency offset is 1 / 100,000 of the frequency of the digital reference clock signal.

5. The system of claim 2, wherein the DDMTD circuit is configured to provide a tunable frequency offset factor.

6. The system of claim 1, wherein the phase difference between the digital reference clock signal and the digital test clock signal is determined from a measured phase difference between the heterodyned signals.

7. The system of claim 1, wherein the system is configured to provide a measurement precision of at least 100 femtoseconds.

8. The system of claim 1, wherein the system is configured to provide a measurement precision of at least 10 femtoseconds.2023-353 / U639.176.111 9. The system of claim 1, wherein the clock signal generator is configured to generate a low-jitter clock signal.

10. The system of claim 9, wherein the clock signal generator is a precision clock generating system.

11. The system of claim 1, wherein the interface assembly further includes a first optical component configured and positioned to collimate the optical reference clock signal, and a second optical component configured and positioned to collimate the optical test clock signal.

12. A method of measuring an index of refraction of a material, the method comprising: arranging a material under review along an optical path from an emitter to a detector; operating a clock signal generator to deliver a digital reference clock signal to a digital dual mixer time difference (DDMTD) circuit; converting the digital reference clock signal to an optical reference clock signal; transmitting, via the emitter, the optical reference clock signal through the material under review to produce an optical test clock signal; sensing, via the detector, the optical test clock signal; converting the sensed optical test clock signal to a digital test clock signal; delivering the digital test clock signal to the DDMTD circuit; heterodyning the digital reference clock signal and the digital test clock signal; determining a phase difference between the digital reference clock signal and the digital test clock signal as a function of the heterodyned signals; and2023-353 / U639.176.111 determining an index of refraction of the material under review as a function of the determined phase difference.

13. The method of claim 12, wherein the step of heterodyning the digital reference clock signal and the digital test clock signal includes heterodyning the digital reference clock signal and the digital test clock signal with a pulse train modulated at frequency offset from a frequency of the digital reference clock signal.

14. The method of claim 13, wherein the frequency offset is less than 1 / 1000 of the frequency of the digital reference clock signal.

15. The method of claim 13, wherein the frequency offset is 1 / 100,000 of the frequency of the digital reference clock signal.

16. The method of claim 12, wherein the phase difference between the digital reference clock signal and the digital test clock signal is determined from a measured phase difference between the heterodyned signals.

17. The method of claim 12, wherein the determined phase difference is indicative of a velocity of light in the material under review.

18. The method of claim 12, wherein the material under review is one of a solid, liquid, and gas.

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