Balun, semiconductor device, and communication apparatus

Abstract

The present application provides a balun, a semiconductor device, and a communication apparatus, applied to the technical field of chips, and for use in solving the problem of poor higher harmonics suppression effect in existing communication circuits. The balun comprises a first inductor, a second inductor magnetically coupled to the first inductor, and two resonant circuits. A first end of the first inductor is coupled to a non-inverting input port of the balun, and a second end of the first inductor is coupled to an inverting input port of the balun. A first end of the second inductor is coupled to an inverting output port of the balun, and a second end of the second inductor is coupled to a non-inverting output port of the balun. One resonant circuit is separately coupled to the non-inverting input port, the inverting output port, the first end of the first inductor and the first end of the second inductor. The other resonant circuit is separately coupled to the inverting input port, the non-inverting output port, the second end of the first inductor and the second end of the second inductor. On this basis, high-frequency signals having opposite phases can cancel each other to suppress higher harmonics.

Description

Balun, semiconductor device and communication device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on December 29, 2023, with application number 202311864474.6 and application name “A balun, semiconductor device and communication device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of chip technology, and in particular to a balun, a semiconductor device, and a communication device. Background Art

[0003] During the communication process, the high-order harmonics present in the communication link can have a significant impact on the communication quality. To reduce the impact of high-order harmonics on communication quality, both the transmission link and the receiving link of the communication signal need to add filtering circuits to suppress the high-order harmonics. Among them, the current high-order harmonic suppression methods usually require the installation of a relatively complex harmonic suppression circuit between the amplifier and the off-chip antenna. However, this approach increases cost and wiring area. Therefore, some solutions have proposed a solution to suppress high-order harmonics by installing a harmonic suppression circuit inside the chip to reduce the impedance at the harmonic suppression frequency point. However, due to the limitations of the chip manufacturing process, the quality factor of passive components such as inductors and capacitors on the chip is low, resulting in poor suppression of high-order harmonics. Therefore, there is an urgent need to provide a solution to the above problems. Summary of the Invention

[0004] The present application provides a balun, a semiconductor device, and a communication device to solve the problem of poor high-order harmonic suppression in existing communication circuits.

[0005] In order to solve the above problems, the embodiments of the present application provide the following technical solutions.

[0006] In a first aspect, a balun is provided, comprising a differential non-inverting input port and a negative-inverting output port, a differential positive-inverting output port and a negative-inverting input port, a first inductor, a second inductor, a first resonant circuit, and a second resonant circuit. The first end of the first inductor is coupled to the non-inverting input port, and the second end of the first inductor is coupled to the negative-inverting input port. The first end of the second inductor is coupled to the negative-inverting output port, and the second end of the second inductor is coupled to the non-inverting output port. The first end of the first resonant circuit is coupled to the non-inverting input port and the first end of the first inductor, respectively. The second end of the first resonant circuit is coupled to the negative-inverting output port and the first end of the second inductor, respectively. The first end of the second resonant circuit is coupled to the negative-inverting input port and the second end of the first inductor, respectively. The second end of the second resonant circuit is coupled to the non-inverting output port and the second end of the second inductor, respectively. The first inductor and the second inductor in the balun can couple the signal on the input side to the output side by magnetic coupling, that is, the signal inputted by the inverting input port (including the inverting low-frequency signal and the inverting high-frequency signal) can be coupled to the inverting output port by the first inductor and the second inductor, and the signal inputted by the positive-phase input port (including the positive-phase low-frequency signal and the positive-phase high-frequency signal) can be coupled to the inverting output port by the first inductor and the second inductor. At the same time, the first resonant circuit and the second resonant circuit can resonate at the frequency of the high-frequency signal that needs to be suppressed. The positive-phase high-frequency signal inputted by the above-mentioned positive-phase input port can be transmitted to the above-mentioned inverting output port by the first resonant circuit. The inverted high-frequency signal inputted by the above-mentioned inverting input port can be transmitted to the above-mentioned positive-phase output port by the second resonant circuit. Among them, because the inverting high-frequency signal inputted by the inverting input port has the same frequency as the positive-phase high-frequency signal inputted by the positive-phase input port but has opposite phases, the two signals can cancel each other out, so that the signal outputted by the inverting output port only contains the inverting low-frequency signal, and the signal outputted by the positive-phase output port only contains the positive low-frequency signal. Based on this, the balun provided in the present application can remove useless signals by signal cancellation while retaining useful signals. At the same time, through signal cancellation, the first and second resonant circuits in the balun only need to resonate at the frequency to be suppressed. Compared with reducing the impedance at the harmonic suppression frequency, this method is less susceptible to the chip's inherent process and improves the suppression of higher-order harmonics.

[0007] In one possible implementation, the first resonant circuit includes a third inductor and a first capacitor connected in series between the first and second ends of the first resonant circuit. The second resonant circuit includes a fourth inductor and a second capacitor connected in series between the first and second ends of the second resonant circuit. Using this method, the LC series resonant circuit composed of the inductor and capacitor can cause the first and second resonant circuits to resonate at a desired frequency. Furthermore, because the LC series resonant circuit presents a high impedance to normally transmitted low-frequency signals, normally transmitted low-frequency signals can only be transmitted through the first and second inductors of the balun via magnetic coupling. Furthermore, because high-frequency signals can also be transmitted through the first and second inductors of the balun via magnetic coupling, the balun's inverting and non-inverting output ports each have two high-frequency signals with opposite phases. After these two high-frequency signals cancel each other out, the balun's inverting and non-inverting output ports only output the normally transmitted low-frequency signals.

[0008] In one possible implementation, the first capacitor and the second capacitor are adjustable capacitors, so that the first capacitor and the second capacitor can be adjusted synchronously to adjust the resonant frequency, thereby meeting more harmonic suppression requirements.

[0009] In one possible implementation, the third inductor and the fourth inductor are adjustable inductors. In this way, the resonant frequency can be adjusted by synchronously adjusting the third inductor and the fourth inductor, thereby meeting more harmonic suppression requirements.

[0010] In a second aspect, a balun is provided, comprising a differential non-inverting input port and a negative-inverting output port, a differential positive-inverting output port and a negative-inverting input port, a first inductor, a second inductor, a first capacitor, a second capacitor, and a third capacitor. The first end of the first inductor is coupled to the positive-inverting input port, the second end of the first inductor is coupled to the negative-inverting input port, and the first inductor has a first tap and a second tap. The first end of the second inductor is coupled to the negative-inverting output port, the second end of the second inductor is coupled to the positive-inverting output port, the first end of the first capacitor is coupled to the first tap of the first inductor, and the second end of the first capacitor is coupled to the negative-inverting output port and the first end of the second inductor, respectively. The first end of the second capacitor is coupled to the second tap of the first inductor, and the second end of the second capacitor is coupled to the positive-inverting output port and the second end of the second inductor, respectively. The third capacitor is coupled between the first tap and the second tap and is connected in parallel with the portion of the first inductor located between the first tap and the second tap. In the above manner, the first tap and the second tap can divide the first inductor into three parts, thereby utilizing part of the coil of the first inductor in the balun as the inductor in the LC series resonant circuit to reduce the use of components and thus reduce the wiring area.

[0011] In one possible implementation, the first, second, and third capacitors are adjustable capacitors, which can be adjusted synchronously based on the actual resonant frequency to meet more harmonic suppression requirements.

[0012] In a third aspect, a semiconductor device is provided, comprising an amplifier and a balun as described in any possible implementation of the first or second aspect. The non-inverting input of the amplifier is coupled to the non-inverting output of the balun. The inverting input of the amplifier is coupled to the inverting output of the balun. Alternatively, the non-inverting output of the amplifier is coupled to the non-inverting input of the balun. The inverting output of the amplifier is coupled to the inverting input of the balun.

[0013] In a fourth aspect, a communication device is provided, wherein the communication identification device includes the semiconductor device in the third aspect and a transceiver circuit coupled to the semiconductor device.

[0014] In a possible implementation, the communication device further includes: a baseband processor coupled to the transceiver circuit.

[0015] In a possible implementation, the communication device further includes an antenna coupled to the semiconductor device.

[0016] The technical effects brought about by the above-mentioned second to fourth aspects and possible implementation methods can be found in the description of the technical effects brought about by the above-mentioned first aspect and possible implementation methods, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] FIG1 is a schematic structural diagram of a communication device provided in an embodiment of the present application;

[0018] FIG2 is a schematic diagram of the structure of a balun provided in an embodiment of the present application;

[0019] FIG3 is a schematic diagram of the structure of another balun provided in an embodiment of the present application;

[0020] FIG4 is a schematic diagram of the structure of a balun provided in an embodiment of the present application;

[0021] FIG5 is a schematic diagram of the structure of another balun provided in an embodiment of the present application;

[0022] FIG6 is a schematic structural diagram of another balun provided in an embodiment of the present application;

[0023] FIG7 is a schematic structural diagram of a semiconductor device provided in an embodiment of the present application;

[0024] FIG8 is a schematic structural diagram of a communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0026] In the present application, "at least one" refers to one or more, and "plurality" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can represent: a, b, c, a and b, a and c, b and c or a, b and c, where a, b and c can be single or multiple. In addition, in the embodiments of the present application, words such as "first" and "second" do not limit the quantity and order.

[0027] It should be noted that, in this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0028] The present application is described in detail below with reference to the accompanying drawings and embodiments:

[0029] As shown in Figure 1, with the advancement of communication technology, many communication devices 100 are equipped with a baseband processor 110, a transceiver circuit 120, a low-noise amplifier (LNA), a power amplifier (PA), and an antenna 130. The transceiver circuit 120 includes a receiving circuit RX and a transmitting circuit TX. The antenna 130 includes a transmitting antenna ANT1 and a receiving antenna ANT2. The baseband processor 110 is coupled to the transmitting antenna ANT1 via the transmitting circuit TX and the power amplifier PA. Simultaneously, the baseband processor 110 is coupled to the receiving antenna ANT2 via the receiving circuit RX and the low-noise amplifier LNA. The communication device 100 can be a chip, module, or other device for Internet of Things (IoT) applications; or a device such as a mobile phone, server, or computer; or a radio frequency front-end (RFFE) module in a mobile phone, server, or computer. In some application scenarios, such as IoT applications, the power amplifier PA and the low-noise amplifier LNA can be integrated into the same chip as the transceiver circuit 120. In other scenarios, such as mobile phones, computers, and servers, the power amplifier PA and the low-noise amplifier LNA can also be set on the same semiconductor device as the transceiver circuit 120, antenna 130, etc., or on different semiconductor devices. When the baseband processor 110 needs to send a signal to an external device, the signal output by the baseband processor 110 can be frequency synthesized by the transmitting circuit TX to obtain a transmitting intermediate frequency signal TXIF. The transmitting intermediate frequency signal TXIF is then amplified by the power amplifier PA and transmitted from the transmitting antenna ANT1. When the receiving antenna ANT2 receives the signal sent by the external device, it can be amplified by the low-noise amplifier LNA. The amplified signal is then mixed, filtered, and analog-to-digital converted by the receiving circuit RX before being transmitted to the baseband processor 110 for subsequent processing. However, during actual transmission, the original signal normally transmitted is easily affected by high-frequency signals (i.e., higher harmonics) with a frequency higher than the original signal frequency, thereby affecting the communication quality. In order to suppress the higher harmonics in the signal, as shown in Figure 1, a harmonic suppression circuit 140 can be optionally set between the transceiver circuit 120 and the antenna 130. High-order harmonics can be suppressed by the harmonic suppression circuit 140. However, the use of the harmonic suppression circuit 140 in FIG1 requires the use of many external components, which increases the wiring area and cost of the circuit board.

[0030] In order to solve the above problems, a balun can be set on the input side or output side of an amplifier such as a power amplifier PA or a low noise amplifier LNA, and an impedance conversion circuit can be set on the balun to reduce the impedance at the harmonic suppression frequency point, thereby suppressing higher harmonics. For example, as shown in Figure 2, the balun 200 includes a positive input port INP, an inverting input port INN, a positive output port OUTP, an inverting output port OUTN, a first inductor L1, and a second inductor L2. The first inductor L1 can be used as an input side inductor, the second inductor L2 can be used as an output side inductor, and the first inductor L1 and the second inductor L2 can transmit the input side signal to the output side through magnetic coupling. The first end of the first inductor L1 is coupled to the positive input port INP. The second end of the first inductor L1 is coupled to the inverting input port INN. The first end of the second inductor L2 is coupled to the positive output port OUTP. The second end of the second inductor L2 is coupled to the inverting output port OUTN. An LC series resonant circuit 210 consisting of an inductor L3 and a capacitor C1 is also provided between the positive input port INP and the negative input port INN of the balun 200. The first end of the LC series resonant circuit 210 is coupled to the positive input port INP. The second end of the LC series resonant circuit 210 is coupled to the negative input port INN. The LC series resonant circuit 210 can filter out unwanted high-order harmonics on the input side of the balun by reducing the impedance of the harmonic suppression frequency point. However, in order to achieve adjustable frequency points, the capacitor C1 is usually made into a switched capacitor array, which has a large series resistance. Therefore, the equivalent series resistance of the LC series resonant circuit is large, the frequency selectivity is poor, the trapping effect is limited, it is difficult to meet the system requirements, and off-chip filtering is required. In addition, when the balun 200 is provided in the chip, the quality factor of the existing on-chip passive components such as inductors and capacitors is low due to the influence of the chip manufacturing process, resulting in poor on-chip harmonic suppression effect.

[0031] In another embodiment, as shown in FIG3 , a balun 300 includes a non-inverting input port INP, an inverting input port INN, a non-inverting output port OUTP, an inverting output port OUTN, a first inductor L1, a second inductor L2, a first parallel resonant circuit 310, and a second parallel resonant circuit 320. The first inductor L1 can serve as an input-side inductor, and the second inductor L2 can serve as an output-side inductor. The first inductor L1 and the second inductor L2 can transmit input-side signals to the output side via magnetic coupling. The first parallel resonant circuit 310 is an LC parallel resonant circuit consisting of an inductor L3 and a capacitor C1. The second parallel resonant circuit 320 is an LC parallel resonant circuit consisting of an inductor L4 and a capacitor C2. The first end of the first inductor L1 is coupled to the non-inverting input port INP. The second end of the first inductor L1 is coupled to the inverting input port INN. The first end of the second inductor L2 is coupled to the non-inverting output port OUTP via the first parallel resonant circuit 310. The second end of the second inductor L2 is coupled to the inverting output port OUTN through the second parallel resonant circuit 320. The first parallel resonant circuit 310 and the second parallel resonant circuit 320 can filter out high-order harmonics on the output side of the balun by reducing the impedance of the harmonic suppression frequency point. However, in order to achieve adjustable frequency points, the capacitors C1 and C2 are usually made into a switched capacitor array, which has a large series resistance. Therefore, the equivalent series resistance of the above-mentioned LC parallel resonant circuit is large, the frequency selectivity is poor, the trapping effect is limited, it is difficult to meet the system requirements, and off-chip filtering is required. In addition, when the above-mentioned balun 300 is set in the chip, affected by the chip manufacturing process, the quality factor of the existing on-chip passive components such as inductors and capacitors is low, resulting in poor on-chip harmonic suppression effect. At the same time, the LC parallel resonant circuit is connected in series on the signal path, and there is a large loss, which affects the circuit performance.

[0032] To further address the above-mentioned issues, as shown in FIG4 , an embodiment of the present application provides a balun 400. The balun 400 includes a differential non-inverting input port INP and an inverting output port OUTN, a differential non-inverting output port OUTP and an inverting input port INN, a first inductor L1, a second inductor L2, a first resonant circuit 410, and a second resonant circuit 420. A first end of the first inductor L1 is coupled to the non-inverting input port INP. A second end of the first inductor L1 is coupled to the inverting input port INN. A first end of the second inductor L2 is coupled to the inverting output port OUTN. A second end of the second inductor L2 is coupled to the non-inverting output port OUTP. A first end of the first resonant circuit 410 is coupled to the non-inverting input port INP and the first end of the first inductor L1, respectively. A second end of the first resonant circuit 410 is coupled to the inverting output port OUTN and the first end of the second inductor L2, respectively. The first end of the second resonant circuit 420 is coupled to the inverting input port INN and the second end of the first inductor L1, respectively, and the second end of the second resonant circuit 420 is coupled to the non-inverting output port OUTP and the second end of the second inductor L2, respectively. Through the above-mentioned balun 400, the first inductor L1 and the second inductor L2 can couple the input side signal to the output side by magnetic coupling, that is, the signal input to the inverting input port INN (including the inverting low-frequency signal and the inverting high-frequency signal) can be coupled to the inverting output port OUTN through the first inductor L1 and the second inductor L2, and the signal input to the non-inverting input port INP (including the non-inverting low-frequency signal and the non-inverting high-frequency signal) can be coupled to the non-inverting output port OUTP through the first inductor L1 and the second inductor L2. The first resonant circuit 410 and the second resonant circuit 420 can resonate at the frequency of the high-frequency signal to be suppressed. In this way, the non-inverting high-frequency signal input to the non-inverting input port INP of the balun 400 can be transmitted to the non-inverting output port OUTN through the first resonant circuit 410. The inverted high-frequency signal input to the inverting input port INN of the balun 400 can be transmitted to the positive-phase output port OUTP through the second resonant circuit 420. Among them, because the signal input to the inverting input port INN contains an inverted high-frequency signal. The inverted high-frequency signal has the same frequency as the positive-phase high-frequency signal input to the positive-phase input port INP, but the phase is opposite. Therefore, the two high-frequency signals can cancel each other out, so that the signal output from the inverting output port OUTN only contains a normal inverted low-frequency signal. Similarly, the signal output from the positive-phase output port OUTP also only contains a normal positive low-frequency signal. Based on this, useless signals can be removed by signal cancellation, while useful signals are retained. At the same time, by signal cancellation, it is only necessary for the first resonant circuit 410 and the second resonant circuit 420 to resonate at the frequency that needs to be suppressed. Compared with the method of reducing the impedance of the harmonic suppression frequency point, this method is not easily affected by the chip's own process, and improves the suppression effect of high-order harmonics.

[0033] In one embodiment, as shown in FIG5 , the first resonant circuit 410 includes a first LC series resonant circuit consisting of a third inductor Lp and a first capacitor Cp connected in series between the first and second ends of the first resonant circuit 410. The second resonant circuit 420 includes a second LC series resonant circuit consisting of a fourth inductor Ln and a second capacitor Cn connected in series between the first and second ends of the second resonant circuit 420. The third inductor Lp and the first capacitor Cp resonate at the frequency to be suppressed. The fourth inductor Ln and the second capacitor Cn also resonate at the frequency to be suppressed. Because the LC series resonant circuit presents a high-impedance state for low-frequency signals and a low-impedance state for high-frequency signals, the signal at the non-inverting output port OUTP includes both the signal (including the positive-phase high-frequency signal and the positive-phase low-frequency signal) coupled from the non-inverting input port INP to the non-inverting output port OUTP via the first inductor L1 and the second inductor L2 of the balun, and the negative-phase high-frequency signal transmitted from the negative-phase input port INN via the second LC resonant circuit consisting of the fourth inductor Ln and the second capacitor Cn. The positive-phase high-frequency signal and the negative-phase high-frequency signal are high-frequency signals with the same frequency but opposite phases. They can cancel each other out at the positive-phase output port OUTP, thereby achieving the function of harmonic suppression. Similarly, the signal at the negative-phase output port OUTN includes both the signal (including the negative-phase high-frequency signal and the negative-phase low-frequency signal) coupled to the negative-phase output port OUTN by the first inductor L1 and the second inductor L2 of the balun, and the positive-phase high-frequency signal transmitted from the positive-phase input port INP via the first LC resonant circuit composed of the third inductor Lp and the first capacitor Cp. Because the positive-phase high-frequency signal and the negative-phase high-frequency signal are high-frequency signals with the same frequency but opposite phases, they can also cancel each other out at the negative-phase output port OUTN, thereby achieving the function of harmonic suppression.

[0034] For example, assume that the frequency of the normally transmitted low-frequency signal is LO, and the frequency of the high-frequency signal to be suppressed is 3LO. The signals input to both the inverting input port INN and the non-inverting input port INP include a low-frequency signal with a frequency of LO and a high-frequency signal with a frequency of 3LO. The signals input to the two input ports are only in opposite phases. In this case, the positive-phase high-frequency signal with a frequency of 3LO can be transmitted to the inverting output port OUTN via the third inductor Lp and the first capacitor Cp. The signal input to the inverting input port INN (including the inverted low-frequency signal with a frequency of LO and the inverted high-frequency signal with a frequency of 3LO) is coupled to the inverting output port OUTN via the first inductor L1 and the second inductor L2. Because the two high-frequency signals have the same frequency but opposite phases, they cancel each other out, leaving only the inverted low-frequency signal with a frequency of LO at the inverting output port OUTN. Similarly, the inverted high-frequency signal with a frequency of 3LO can be transmitted to the non-inverting output port OUTP via the fourth inductor Ln and the second capacitor Cn. The signal input to the non-inverting input port INP (including a positive-phase low-frequency signal at frequency LO and a positive-phase high-frequency signal at frequency 3LO) is coupled to the non-inverting output port OUTP via the first inductor L1 and the second inductor L2. Because the two high-frequency signals have the same frequency but opposite phases, they cancel each other out, leaving only the positive-phase low-frequency signal at frequency LO at the non-inverting output port OUTP.

[0035] In one embodiment, considering that the resonant frequency of an LC resonant circuit is primarily affected by inductance and capacitance, the first capacitor Cp and the second capacitor Cn may be adjustable capacitors. For example, the first capacitor Cp and the second capacitor Cn may be configured as identical switched capacitor arrays, each comprising a plurality of switches and capacitors. By controlling the switches to be in the same on-state, the capacitance values ​​of the first capacitor Cp and the second capacitor Cn can be adjusted synchronously, thereby adjusting the resonant frequency of the first LC series resonant circuit and the second LC series resonant circuit.

[0036] In the above implementation process, the above-mentioned switched capacitor array can be any switched capacitor array, and the embodiment of the present application does not impose any specific limitation on this.

[0037] Furthermore, the third inductor Lp and the fourth inductor Ln may also be adjustable inductors. The inductance values ​​of the third inductor Lp and the fourth inductor Ln only need to remain the same during adjustment. Adjustable inductors can further increase the diversity of the resonant frequency of the resonant circuit, thereby meeting the harmonic suppression requirements in a wider range of application scenarios.

[0038] Furthermore, based on the above content, the balun 400 provided in the embodiment of the present application can also be coupled with a controller (not shown in the figure), which can control the adjustable capacitor and the switched capacitor array to adjust the inductance and / or the adjustable capacitor, thereby adjusting the resonant frequency of the resonant circuit to a frequency that meets the requirements. The above-mentioned controller can be a central processing unit (CPU), a general-purpose processor, a network processor (NP), a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or a system on chip (SoC), or any combination thereof. The embodiment of the present application does not impose any specific restrictions on this.

[0039] In one embodiment, as shown in FIG6 , the embodiment of the present application further provides a balun 600. The balun 600 includes a differential positive-phase input port INP and an inverting output port OUTN, a differential positive-phase output port OUTP and an inverting input port INN, a first inductor L1, a second inductor L2, a first capacitor Cp, a second capacitor Cn, and a third capacitor Cb. The first end of the first inductor L1 is coupled to the positive-phase input port INP, the second end of the first inductor L1 is coupled to the inverting input port INN, and the first inductor L1 has a first tap a and a second tap b. The first end of the second inductor L2 is coupled to the inverting output port OUTN, and the second end of the second inductor L2 is coupled to the positive-phase output port OUTP. The first end of the first capacitor Cp is coupled to the first tap a on the first inductor, and the second end of the first capacitor Cp is coupled to the inverting output port OUTN and the first end of the second inductor L2, respectively. The first end of the second capacitor Cn is coupled to the second tap b on the first inductor, and the second end of the second capacitor Cn is coupled to the positive phase output port OUTP and the second end of the second inductor L2, respectively. The third capacitor Cb is coupled between the first tap a and the second tap b, and is connected in parallel with the portion of the inductance of the first inductor L1 located between the first tap a and the second tap b. The first tap a and the second tap b can be a connection point or a connecting line extending from the first inductor L1 to divide the first inductor L1 into three parts (such as the first sub-inductor Lp, the second sub-inductor Lb, and the third sub-inductor Ln in Figure 6). In this manner, the first sub-inductor Lp and the first capacitor Cp can form a first LC series resonant circuit. The third sub-inductor Ln and the second capacitor Cn can form a second LC series resonant circuit. The second sub-inductor Lb and the third capacitor Cb can form an LC parallel resonant circuit. Among them, because the LC parallel resonant circuit presents a high-impedance state to high-frequency signals, the low-frequency signal of the first node a can be transmitted to the second node b through the LC parallel resonant circuit composed of the second sub-inductor Lb and the third capacitor Cb. The high-frequency signal of the first node a cannot be transmitted to the second node b through the LC parallel resonant circuit composed of the second sub-inductor Lb and the third capacitor Cb. The signal input by the inverting input port INN (including the inverted high-frequency signal and the inverted low-frequency signal) can be normally coupled to the inverting output port OUTN through the first inductor L1 and the second inductor L2. The signal input by the non-phase input port INP (including the positive-phase high-frequency signal and the positive-phase low-frequency signal) can also be normally coupled to the non-phase output port OUTP through the first inductor L1 and the second inductor L2.At the same time, because the LC series resonant circuit presents a high-impedance state for low-frequency signals and a low-impedance state for high-frequency signals, the signal at the positive-phase output port OUTP includes both the signal (including the positive-phase high-frequency signal and the positive-phase low-frequency signal) coupled to the positive-phase input port INP via the first inductor L1 and the second inductor L2, and the negative-phase high-frequency signal transmitted from the negative-phase input port INN via the second LC resonant circuit composed of the third sub-inductor Ln and the second capacitor Cn. The positive-phase high-frequency signal and the negative-phase high-frequency signal are high-frequency signals with the same frequency but opposite phases, and they can cancel each other out at the positive-phase output port OUTP, thereby achieving the function of harmonic suppression. Similarly, the signal at the negative-phase output port OUTN includes both the signal (including the negative-phase high-frequency signal and the negative-phase low-frequency signal) coupled to the negative-phase output port OUTN via the first inductor L1 and the second inductor L2, and the positive-phase high-frequency signal transmitted from the positive-phase input port INP via the first LC resonant circuit composed of the first sub-inductor Lp and the first capacitor Cp. Because the positive-phase high-frequency signal and the negative-phase high-frequency signal are high-frequency signals with the same frequency but opposite phases, the two can also cancel each other out at the negative-phase output port OUTN, thereby achieving the function of harmonic suppression.

[0040] In this way, part of the first inductor L1 can be used as the inductor in the resonant circuit, thereby reducing the wiring area and cost. Of course, in the above implementation process, the first inductor L1 can also be an equivalent inductor composed of three inductors connected in series, and this embodiment of the application does not impose any specific restrictions here.

[0041] For example, assume that the frequency of the normally transmitted low-frequency signal is LO, and the frequency of the high-frequency signal to be suppressed is 4LO. The signals input to both the inverting input port INN and the non-inverting input port INP include a low-frequency signal with a frequency of LO and a high-frequency signal with a frequency of 4LO, with the signals input to the two input ports only having opposite phases. In this case, the positive-phase high-frequency signal with a frequency of 4LO can be transmitted to the inverting output port OUTN via the first sub-inductor Lp and the first capacitor Cp. The signal input to the inverting input port INN (including the inverted low-frequency signal with a frequency of LO and the inverted high-frequency signal with a frequency of 4LO) is coupled to the inverting output port OUTN via the first inductor L1 and the second inductor L2. Because the two high-frequency signals have the same frequency but opposite phases, they cancel each other out, leaving only the inverted low-frequency signal with a frequency of LO at the inverting output port OUTN. Similarly, the inverted high-frequency signal with a frequency of 4LO can be transmitted to the non-inverting output port OUTP via the third sub-inductor Ln and the second capacitor Cn. The signal input to the non-inverting input port INP (including a positive-phase low-frequency signal at frequency LO and a positive-phase high-frequency signal at frequency 4LO) is coupled to the non-inverting output port OUTP via the first inductor L1 and the second inductor L2. Because the two high-frequency signals have the same frequency but opposite phases, they cancel each other out, leaving only the positive-phase low-frequency signal at frequency LO at the non-inverting output port OUTP.

[0042] In one embodiment, the first capacitor Cp, the second capacitor Cn, and the third capacitor Cb are adjustable capacitors. For example, the first capacitor Cp, the second capacitor Cn, and the third capacitor Cb can be configured as a switched capacitor array to meet the requirements for harmonic suppression at different frequencies. The switched capacitor array includes multiple switches and capacitors. By controlling the on-state of the switches, the capacitance values ​​of the first capacitor Cp, the second capacitor Cn, and the third capacitor Cb can be synchronously adjusted, thereby adjusting the resonant frequencies of the first LC resonant circuit, the second LC resonant circuit, and the parallel LC circuit to better meet the tuning requirements in actual application scenarios.

[0043] In the above implementation process, the above-mentioned switched capacitor array can be any switched capacitor array, and the embodiment of the present application does not impose any specific limitation on this.

[0044] In one embodiment, as shown in FIG7 , the present invention further provides a semiconductor device 700, which includes an amplifier 710 and the balun 400 described in any of the embodiments of FIG4 and FIG5 . The non-inverting input terminal of the amplifier 710 is coupled to the non-inverting output port OUTP of the differential balun 400. The inverting input terminal of the amplifier 710 is coupled to the inverting output port OUTN of the balun 400. The amplifier 710 can be a low-noise amplifier, a power amplifier, a preamplifier, or other types of differential amplifiers, and the present invention does not impose any specific limitations on this.

[0045] In another embodiment, the non-inverting output terminal of the amplifier 710 can be coupled to the non-inverting input port INP of the balun 400. The inverting output terminal of the amplifier 710 is coupled to the inverting input port INN of the balun 400. Of course, the above two solutions can also be combined, that is, a balun 400 can be optionally provided on the output side or the input side of the amplifier 710. This embodiment of the present application will not be described in detail here.

[0046] In an example, the semiconductor device 700 may also include a plurality of amplifiers 710 of different types (eg, a power amplifier PA, a low noise amplifier LNA) and a balun 400 coupled to each amplifier 710 .

[0047] Of course, the balun 400 in the semiconductor device 700 may also use the balun in FIG. 6 , which will not be described in detail in the embodiment of the present application.

[0048] In one embodiment, as shown in FIG8 , the embodiment of the present application further provides a communication device 800, which includes a semiconductor device 700 and a transceiver circuit 810 coupled to the semiconductor device 700. The communication device 800 can be a mobile terminal device (such as a mobile phone, a computer, a smart bracelet, a smart watch), a local area network device, a server and other devices, or a radio frequency front-end module in a mobile terminal device (such as a mobile phone, a computer, a smart bracelet, a smart watch), a local area network device, a server and other devices, or an integrated chip in an Internet of Things device, and the embodiment of the present application does not impose specific restrictions on this. The semiconductor device 700 and the transceiver circuit 810 can be integrated into the same chip or can be set separately.

[0049] In one embodiment, the communication device 800 may further include a baseband processor 820. The baseband processor 820 may be a central processing unit (CPU), a general-purpose processor, a network processor (NP), a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or a system-on-chip (SoC), or any combination thereof. The embodiment of the present application does not impose any specific restrictions on this. Furthermore, the communication device 800 may further include an antenna 830 coupled to the semiconductor device 700. The antenna 830 may be arranged in the same chip or radio frequency front-end module as the semiconductor device 700, or in different modules of the communication device 800, and the embodiment of the present application does not impose any specific restrictions on this.

[0050] Furthermore, in the above implementation process, the semiconductor devices or communication devices in the above examples may also include other types of devices, and the embodiments of the present application do not impose specific limitations on this.

[0051] Those skilled in the art will appreciate that the functions of the circuits described in the various examples of the embodiments disclosed herein can be implemented using electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0052] In the several embodiments provided in this application, it should be understood that the disclosed circuits and devices can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of modules is only a logical function division. In actual implementation, there may be other division methods, such as multiple modules or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interface, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0053] In addition, the chips in each embodiment of the present application may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0054] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A balun, characterized in that, Comprising: Differential positive input port and inverting output port, and differential positive output port and inverting input port; A first inductor, a first end of the first inductor is coupled to the positive input port, and a second end of the first inductor is coupled to the inverting input port; A second inductor, a first end of the second inductor is coupled to the inverting output port, and a second end of the second inductor is coupled to the positive output port; A first resonant circuit, a first end of the first resonant circuit is respectively coupled to the positive input port and the first end of the first inductor, and a second end of the first resonant circuit is respectively coupled to the inverting output port and the first end of the second inductor; A second resonant circuit, a first end of the second resonant circuit is respectively coupled to the inverting input port and the second end of the first inductor, and a second end of the second resonant circuit is respectively coupled to the positive output port and the second end of the second inductor.

2. The balun according to claim 1, wherein The first resonant circuit includes a third inductor and a first capacitor connected in series between the first end and the second end of the first resonant circuit; the second resonant circuit includes a fourth inductor and a second capacitor connected in series between the first end and the second end of the second resonant circuit.

3. The balun according to claim 2, wherein The first capacitor and the second capacitor are adjustable capacitors.

4. The balun according to claim 2 or 3, characterized in that, The third inductor and the fourth inductor are adjustable inductors.

5. A balun, characterized in that, Comprising: Differential positive input port and inverting output port, differential positive output port and inverting input port; A first inductor, a first end of the first inductor is coupled to the positive input port, a second end of the first inductor is coupled to the inverting input port, and the first inductor has a first tap and a second tap; A second inductor, a first end of the second inductor is coupled to the inverting output port, and a second end of the second inductor is coupled to the positive output port; A first capacitor, a first end of the first capacitor is coupled to the first tap on the first inductor, and a second end of the first capacitor is respectively coupled to the inverting output port and the first end of the second inductor; A second capacitor, a first end of the second capacitor is coupled to the second tap on the first inductor, and a second end of the second capacitor is respectively coupled to the positive output port and the second end of the second inductor; A third capacitor, coupled between the first tap and the second tap, and in parallel with a part of the inductance of the first inductor between the first tap and the second tap.

6. The balun according to claim 5, characterized in that, The first capacitor, the second capacitor and the third capacitor are adjustable capacitors.

7. A semiconductor device, characterized in that, Comprising an amplifier and a balun according to any one of claims 1-4, or a balun according to claim 5 or 6; a positive input terminal of the amplifier is coupled to the positive output port of the balun; a negative input terminal of the amplifier is coupled to the negative output port of the balun; or, a positive output terminal of the amplifier is coupled to the positive input port of the balun; a negative output terminal of the amplifier is coupled to the negative input port of the balun.

8. A communication device, characterized in that, Comprising a semiconductor device according to claim 7, and a transceiver circuit coupled to the semiconductor device.

9. The communication device according to claim 8, wherein Further comprising: A baseband processor coupled to the transceiver circuit.

10. The communication device according to claim 8 or 9, characterized in that, Further comprising: An antenna coupled to the semiconductor device.

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