Pressure sensor and preparation method therefor, and pressure sensing assembly

Abstract

A pressure sensor, comprising: a substrate (10), and at least one capacitor, which is arranged on the substrate (10), wherein one of the at least one capacitor comprises: a first electrode (11, 101) and a second electrode (12, 102), which are arranged opposite each other and insulated from each other, the second electrode (12, 102) is located on the side of the first electrode (11, 101) that is away from the substrate (10), a plurality of cavities (13, 103) are arranged between the first electrode (11, 101) and the second electrode (12, 102), the orthographic projection of the first electrode (11, 101) on the substrate (10) is at least partially overlapped with the orthographic projection of the second electrode (12, 102) on the substrate (10), the orthographic projection of an overlapping area of the first electrode (11, 101) and the second electrode (12, 102) on the substrate (10) is at least partially overlapped with the orthographic projections of the plurality of cavities (13, 103) on the substrate (10), and the second electrode (12, 102) is arranged in a way at least partially enclosing on the surfaces of the plurality of cavities (13, 103) that are away from the first electrode (11, 101). Further provided are a preparation method for a pressure sensor, and a pressure sensor assembly.

Description

Pressure sensor, preparation method thereof, and pressure sensing component

[0001] This application claims priority to the Chinese patent application filed on December 26, 2023, with application number PCT / CN2023 / 141987 and invention name “Pressure sensor, preparation method thereof, and pressure sensing assembly”, the contents of which should be understood as incorporated into this application by reference. Technical Field

[0002] The present disclosure relates to, but is not limited to, the field of sensor technology, and in particular to a pressure sensor, a preparation method thereof, and a pressure sensing assembly. Background Art

[0003] Pressure sensors, devices that convert pressure signals into electrical signals, are widely used in consumer electronics, medical monitoring, industrial control, automotive electronics, aerospace, and other fields. In micro-electromechanical systems (MEMS), pressure sensors can be divided into absolute pressure sensors, gauge pressure sensors, and differential pressure sensors based on the pressure value they output. Absolute pressure sensors output pressure relative to a vacuum, gauge pressure sensors output pressure after deducting atmospheric pressure, and differential pressure sensors output pressure differentials.

[0004] Absolute pressure sensors can be mainly divided into piezoresistive and capacitive types according to the signal conversion form. Among them, the technical principle of capacitive absolute pressure sensors is to use the capacitance effect to convert the pressure signal into a corresponding electrical signal, that is, a capacitor is formed by two parallel and opposite low-resistance films (upper plate and lower plate). Under the action of pressure, the upper plate is deformed, and the change in the relative distance between the upper plate and the lower plate causes the capacitance to change. Summary of the Invention

[0005] The following is an overview of the subject matter described in detail in this disclosure. This overview is not intended to limit the scope of the claims.

[0006] The present disclosure provides a pressure sensor, a preparation method thereof, and a pressure sensing assembly.

[0007] In a first aspect, the present disclosure provides a pressure sensor comprising: a substrate and at least one capacitor disposed on the substrate, the at least one capacitor comprising: a first electrode and a second electrode disposed opposite each other and insulated from each other, the second electrode being located on a side of the first electrode away from the substrate, and a plurality of cavities arranged in an array being disposed between the first electrode and the second electrode;

[0008] An orthographic projection of a first electrode of at least one capacitor on the substrate at least partially overlaps with an orthographic projection of a second electrode on the substrate, and an orthographic projection of an overlapping region of the first electrode and the second electrode on the substrate at least partially overlaps with an orthographic projection of the plurality of cavities on the substrate;

[0009] The second electrode is at least partially disposed around the surfaces of the plurality of cavities away from the first electrode.

[0010] In an exemplary embodiment, a length of at least one of the first electrode and the second electrode of the at least one capacitor along a first direction is smaller than a length along a second direction, and the first direction intersects the second direction.

[0011] In an exemplary embodiment, the at least one capacitor includes: at least one pressure-sensing capacitor and at least one reference capacitor, and the pressure sensor further includes: a plurality of pads, a sealing layer, and a pressure-resistant layer;

[0012] The sealing layer is disposed on the periphery of the plurality of cavities, and the sealing layer covers the surface of the second electrode of the at least one capacitor away from the substrate;

[0013] The plurality of pads are located on a side of the sealing layer away from the substrate, and the plurality of pads are electrically connected to the first electrode and the second electrode of the at least one capacitor respectively;

[0014] The pressure-resistant layer is located on a side of the multiple pads away from the substrate, and is provided with at least one pressure-sensitive hole exposing the sealing layer. The at least one pressure-sensitive hole corresponds one-to-one to at least one pressure-sensitive capacitor. The orthographic projection of the at least one pressure-sensitive hole on the substrate at least partially overlaps with the orthographic projection of the second electrode of the corresponding pressure-sensitive capacitor on the substrate. The orthographic projection of the at least one reference capacitor on the substrate is located within the range of the orthographic projection of the pressure-resistant layer on the substrate.

[0015] In an exemplary embodiment, the at least one capacitor includes: two pressure-sensing capacitors and two reference capacitors, and the plurality of pads include: a first pad, a second pad, a third pad, and a fourth pad;

[0016] The first pad is electrically connected to the second electrode of the first pressure-sensing capacitor and the second electrode of the first reference capacitor, respectively; the second pad is electrically connected to the first electrode of the second pressure-sensing capacitor and the first electrode of the first reference capacitor, respectively; the third pad is electrically connected to the second electrode of the second pressure-sensing capacitor and the second electrode of the second reference capacitor, respectively; and the fourth pad is electrically connected to the first electrode of the first pressure-sensing capacitor and the first electrode of the second reference capacitor, respectively.

[0017] In an exemplary embodiment, the first pressure-sensing capacitor, the second reference capacitor, the first reference capacitor, and the second pressure-sensing capacitor are arranged along the first direction.

[0018] In an exemplary embodiment, the pressure-resistant layer includes: a first pressure-resistant structure, a second pressure-resistant structure, a third pressure-resistant structure, and a fourth pressure-resistant structure that are spaced apart from each other, wherein the orthographic projections of at least two of the first pressure-resistant structure, the second pressure-resistant structure, the third pressure-resistant structure, and the fourth pressure-resistant structure on the substrate do not have an overlapping area, the orthographic projection of the first pressure-resistant structure on the substrate at least partially overlaps with the orthographic projection of the first pressure-sensitive capacitor on the substrate, the orthographic projection of the second pressure-resistant structure on the substrate at least partially overlaps with the orthographic projection of the second pressure-sensitive capacitor on the substrate, the orthographic projection of the third pressure-resistant structure on the substrate at least partially overlaps with the orthographic projection of the first reference capacitor on the substrate, and the orthographic projection of the fourth pressure-resistant structure on the substrate at least partially overlaps with the orthographic projection of the second reference capacitor on the substrate;

[0019] The first pressure-resistant structure and the second pressure-resistant structure are at least partially symmetrically arranged relative to a virtual straight line extending perpendicular to the substrate, and the third pressure-resistant structure and the fourth pressure-resistant structure are at least partially symmetrically arranged relative to a virtual straight line extending perpendicular to the substrate.

[0020] In an exemplary embodiment, the at least one capacitor includes: two pressure-sensing capacitors and two reference capacitors, and the plurality of pads include: a first pad, a second pad, a third pad, and a fourth pad;

[0021] The first pad is electrically connected to the second electrode of the second pressure-sensing capacitor and the second electrode of the second reference capacitor, respectively; the second pad is electrically connected to the first electrode of the second pressure-sensing capacitor and the first electrode of the first reference capacitor, respectively; the third pad is electrically connected to the second electrode of the first pressure-sensing capacitor and the second electrode of the first reference capacitor, respectively; and the fourth pad is electrically connected to the first electrode of the first pressure-sensing capacitor and the first electrode of the second reference capacitor, respectively.

[0022] In an exemplary embodiment, the first pressure-sensing capacitor, the second reference capacitor, the second pressure-sensing capacitor, and the first reference capacitor are arranged along the first direction.

[0023] In an exemplary embodiment, the pressure-resistant layer includes: a first pressure-resistant structure, a second pressure-resistant structure, a third pressure-resistant structure, and a fourth pressure-resistant structure that are spaced apart from each other, wherein the orthographic projections of at least two of the first pressure-resistant structure, the second pressure-resistant structure, the third pressure-resistant structure, and the fourth pressure-resistant structure on the substrate do not have an overlapping area, the orthographic projection of the first pressure-resistant structure on the substrate at least partially overlaps with the orthographic projection of the first pressure-sensitive capacitor on the substrate, the orthographic projection of the second pressure-resistant structure on the substrate at least partially overlaps with the orthographic projection of the second pressure-sensitive capacitor on the substrate, the orthographic projection of the third pressure-resistant structure on the substrate at least partially overlaps with the orthographic projection of the first reference capacitor on the substrate, and the orthographic projection of the fourth pressure-resistant structure on the substrate at least partially overlaps with the orthographic projection of the second reference capacitor on the substrate;

[0024] The first pressure-resistant structure and the second pressure-resistant structure are at least partially identical, and the third pressure-resistant structure and the fourth pressure-resistant structure are at least partially identical.

[0025] In an exemplary embodiment, the plurality of cavities in the at least one capacitor are arranged along the second direction, or arranged in a matrix along the first direction and the second direction.

[0026] In an exemplary embodiment, the number of cavities arranged along the second direction is N;

[0027] At least two of the N cavities have the same length along the second direction.

[0028] In an exemplary embodiment, the number of cavities arranged along the second direction is N;

[0029] The difference between the length of the nth cavity along the second direction and the length of the n-1th cavity along the second direction is 0 or a threshold difference, or the difference between the length of the n-1th cavity along the second direction and the length of the nth cavity along the second direction is 0 or a threshold difference.

[0030] In an exemplary embodiment, the number of cavities arranged along the second direction is N;

[0031] The ratio of the length of the nth cavity along the second direction to the length of the n-1th cavity along the second direction is 1 or a threshold ratio, or the ratio of the length of the n-1th cavity along the second direction to the length of the nth cavity along the second direction is 1 or a threshold ratio.

[0032] In an exemplary embodiment, further comprising: a temperature measuring device;

[0033] The temperature measuring device is formed in the substrate and located on a surface of the substrate, and is configured to obtain a temperature of the capacitor.

[0034] In an exemplary embodiment, the substrate is a P-type single crystal silicon substrate.

[0035] In an exemplary embodiment, the temperature measurement device includes: an N-type semiconductor layer, an emitter, a base, and a collector formed in the substrate;

[0036] The orthographic projections of the base and the emitter on the substrate are located within the range of the orthographic projection of the N-type semiconductor layer on the substrate. The base is a ring structure and surrounds the emitter. The collector is a ring structure, and the orthographic projection of the collector on the substrate surrounds the orthographic projection of the N-type semiconductor layer on the substrate.

[0037] In an exemplary embodiment, the plurality of pads include: a fifth pad and a sixth pad;

[0038] The fifth pad is electrically connected to the base and collector of the temperature measuring device, and the sixth pad is electrically connected to the emitter of the temperature measuring device.

[0039] In an exemplary embodiment, the fifth pad includes: a first pad body portion and a first pad connection portion, the first pad connection portion being electrically connected to the first pad body portion, the first pad connection portion including a recessed portion, the first pad connection portion being electrically connected to the base and collector of the temperature measurement device,

[0040] The sixth pad includes: a second pad body portion and a second pad connection portion, the second pad connection portion is electrically connected to the second pad body portion, the second pad connection portion includes: a protrusion portion, the second pad connection portion is electrically connected to the emitter of the temperature measurement device, and the recess portion surrounds the protrusion portion.

[0041] In an exemplary embodiment, further comprising: a shielding wire;

[0042] The shielding line is electrically connected to the fifth pad and at least partially surrounds the at least one capacitor.

[0043] In an exemplary embodiment, the shielding line includes: a first shielding structure and a second shielding structure, wherein the second shielding structure is electrically connected to the first shielding structure, and an orthographic projection of the second shielding structure on the substrate coincides with an orthographic projection of the first shielding structure on the substrate;

[0044] The first shielding structure is formed in the substrate, and the second shielding structure is disposed in the same layer as the plurality of pads.

[0045] In an exemplary embodiment, the second electrode of the at least one capacitor is disposed around the plurality of cavities to form sidewalls;

[0046] The second electrode of the at least one capacitor is provided with a release hole array, and the release hole array comprises: release holes arranged in an array;

[0047] The orthographic projection of the release hole array on the substrate is located within the range of the orthographic projections of the plurality of cavities on the substrate, and the aperture of the release hole is less than 1 micron.

[0048] In an exemplary embodiment, the at least one capacitor has a capacitance greater than 2 pico-Farads in a vacuum environment.

[0049] In a second aspect, the present disclosure further provides a pressure sensing assembly, comprising: the above-mentioned pressure sensors arranged in an array.

[0050] In a third aspect, the present disclosure further provides a method for preparing a pressure sensor, which is configured to prepare the above-mentioned pressure sensor, the method comprising:

[0051] providing a substrate;

[0052] At least one capacitor is formed on the substrate.

[0053] In an exemplary embodiment, forming at least one capacitor on the substrate includes:

[0054] At least one capacitance and temperature measurement device is formed on the substrate.

[0055] In an exemplary embodiment, forming at least one capacitance and temperature measurement device on a substrate includes:

[0056] forming at least one first electrode of a capacitor and a temperature measuring device on a substrate;

[0057] forming an insulating dielectric layer on a substrate on which at least one first electrode of a capacitor and a temperature measuring device are formed;

[0058] forming at least one second electrode of a capacitor on the insulating dielectric layer;

[0059] A plurality of cavities are formed between the first electrode and the second electrode of at least one capacitor.

[0060] In an exemplary embodiment, the first electrode and the temperature measuring device forming at least one capacitor on the substrate include:

[0061] forming an N-type semiconductor layer on a substrate;

[0062] An emitter, a base, a collector and a first electrode of at least one capacitor are formed on a substrate having an N-type semiconductor layer formed thereon.

[0063] In an exemplary embodiment, forming an N-type semiconductor layer on a substrate includes:

[0064] First ions are implanted into the substrate, and an N-type semiconductor layer is formed by an annealing process, wherein the first ions include: phosphorus;

[0065] Forming an emitter, a base, a collector, and a first electrode of at least one capacitor on a substrate having an N-type semiconductor layer includes:

[0066] Implanting second ions into the substrate and forming an emitter and a collector through an annealing process, wherein the second ions include boron;

[0067] The first ions are implanted into the substrate, and a base is formed through an annealing process.

[0068] Ions are implanted into the substrate to form at least one first electrode of a capacitor.

[0069] In an exemplary embodiment, after forming at least one capacitor on the substrate, the method further includes:

[0070] forming a sealing layer on the second electrode of the at least one capacitor by a patterning process;

[0071] forming a plurality of pads on the sealing layer by a patterning process;

[0072] A sealing layer is formed on the plurality of pads through a patterning process.

[0073] In an exemplary embodiment, the pressure sensor device includes a shielding wire, and the shielding wire includes a first shielding structure and a second shielding structure.

[0074] The first electrode and the temperature measuring device forming at least one capacitor in the substrate include:

[0075] forming a temperature measuring device, a first electrode of at least one capacitor, and a first shielding structure of a shielding line within a substrate;

[0076] The forming of a plurality of pads on the sealing layer by a patterning process comprises:

[0077] A plurality of pads and a second shielding structure are formed on the sealing layer through a patterning process.

[0078] Still other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description.

[0079] Summary of the Figures

[0080] The accompanying drawings are used to provide an understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation to the technical solution of the present disclosure.

[0081] FIG1 is a schematic structural diagram of a pressure sensor provided by an embodiment of the present disclosure;

[0082] FIG2 is a top view of the second electrode;

[0083] FIG3A is a schematic diagram of a pressure sensor;

[0084] FIG3B is a second schematic diagram of a pressure sensor;

[0085] FIG3C is a third schematic diagram of a pressure sensor;

[0086] FIG4A is a first schematic diagram of another pressure sensor;

[0087] FIG4B is a second schematic diagram of another pressure sensor;

[0088] FIG4C is a third schematic diagram of another pressure sensor;

[0089] FIG5 is a schematic structural diagram of another pressure sensor;

[0090] FIG6 is a schematic diagram of a connection of a pressure sensor;

[0091] FIG7 is a connection diagram of another pressure sensor;

[0092] FIG8 is a structural schematic diagram of a pressure sensor including two capacitors;

[0093] FIG9A is a second structural diagram of a pressure sensor including two capacitors;

[0094] FIG9B is a third structural diagram of a pressure sensor including two capacitors;

[0095] FIG10 is a fourth structural diagram of a pressure sensor including two capacitors;

[0096] FIG11A is a fifth structural diagram of a pressure sensor including two capacitors;

[0097] FIG11B is a sixth structural diagram of a pressure sensor including two capacitors;

[0098] FIG12 is a first schematic diagram of the film layer where the second electrode of the pressure-sensing capacitor is located;

[0099] FIG13 is a second schematic diagram of the film layer where the second electrode of the pressure-sensing capacitor is located;

[0100] FIG14 is a connection diagram of another pressure sensor;

[0101] FIG15 is a first structural diagram of a pressure sensor including four capacitors;

[0102] FIG16A is a second structural diagram of a pressure sensor including four capacitors;

[0103] FIG16B is a third structural diagram of a pressure sensor including four capacitors;

[0104] FIG17 is a fourth structural diagram of a pressure sensor including four capacitors;

[0105] FIG18A is a fifth structural diagram of a pressure sensor including two capacitors;

[0106] FIG18B is a sixth structural diagram of a pressure sensor including two capacitors;

[0107] FIG19 is a top view of a conductive film layer of a pressure sensor including four capacitors;

[0108] FIG20 is a schematic diagram of one of the conductive film layers in FIG19;

[0109] FIG21 is a schematic diagram of another conductive film layer in FIG19;

[0110] FIG22 is a schematic diagram 1 of the film layer where the second electrodes of the two pressure-sensing capacitors are located;

[0111] FIG23 is a second schematic diagram of the film layer where the second electrodes of the two pressure-sensing capacitors are located;

[0112] 24a to 24h are flowcharts of the preparation of the pressure sensor provided in FIG8;

[0113] 25a to 25d are flowcharts of the preparation of the pressure sensor provided in FIG9;

[0114] 26a to 26e are flowcharts of the preparation of the pressure sensor provided in FIG10;

[0115] 27a to 27c are flowcharts of the preparation of the pressure sensor provided in FIG11;

[0116] FIG28 is a schematic structural diagram of a pressure sensor provided by another embodiment of the present disclosure;

[0117] FIG29 is a top view of the structure of at least one capacitor;

[0118] FIG30 is a first connection diagram of a pressure sensor including multiple capacitors;

[0119] FIG31 is a top view of the pressure sensor corresponding to FIG30 ;

[0120] FIG32 is a cross-sectional view of the pressure sensor corresponding to FIG30;

[0121] FIG33 is a second connection diagram of a pressure sensor including multiple capacitors;

[0122] FIG34 is a top view of the pressure sensor corresponding to FIG33 ;

[0123] FIG35 is a cross-sectional view of the pressure sensor corresponding to FIG33;

[0124] FIG36 is a second top view of the structure of at least one capacitor;

[0125] FIG37 is a top view of at least one capacitor;

[0126] FIG38 is a top view of at least one capacitor;

[0127] FIG39 is a cross-sectional view taken along line AA of FIG38;

[0128] FIG40 is a cross-sectional view taken along line BB in FIG38;

[0129] FIG41 is a cross-sectional view taken along line CC of FIG38;

[0130] FIG42 is another schematic structural diagram of a pressure sensor provided by an exemplary embodiment;

[0131] FIG43 is a top view corresponding to FIG42;

[0132] FIG44 is another schematic structural diagram of a pressure sensor provided by an exemplary embodiment;

[0133] Figure 45 is a top view corresponding to Figure 44;

[0134] FIG46 is another schematic structural diagram of a pressure sensor provided by an exemplary embodiment;

[0135] FIG47A is a top view 1 corresponding to FIG46;

[0136] FIG47B is a second top view corresponding to FIG46 ;

[0137] Figures 48a to 48i are flow charts for preparing the pressure sensor provided in Figure 46.

[0138] Details

[0139] In order to make the purpose, technical solutions and advantages of the present disclosure clearer, the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Note that the embodiments can be implemented in a variety of different forms. A person of ordinary skill in the art can easily understand the fact that the methods and contents can be transformed into various forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the contents described in the following embodiments. Unless there is a conflict, the embodiments in the present disclosure and the features in the embodiments can be arbitrarily combined with each other. In order to keep the following description of the embodiments of the present disclosure clear and concise, the present disclosure omits detailed descriptions of some known functions and known components. The drawings of the embodiments of the present disclosure only involve structures related to the embodiments of the present disclosure. Other structures can refer to the general design

[0140] The scales of the figures in this disclosure can be used as a reference for actual processes, but are not limited to such. For example, the width-to-length ratio of the channel, the thickness and spacing of the various film layers, and the width and spacing of the various signal lines can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the numbers shown in the figures. The figures described in this disclosure are merely schematic structural diagrams, and one embodiment of this disclosure is not limited to the shapes or values ​​shown in the figures.

[0141] In this specification, ordinal numbers such as “first”, “second” and “third” are provided to avoid confusion among constituent elements, and are not intended to limit the number.

[0142] In this specification, for convenience, words and phrases indicating orientation or positional relationships, such as "middle," "upper," "lower," "front," "back," "vertical," "horizontal," "top," "bottom," "inside," and "outside," are used to illustrate the positional relationships of constituent elements with reference to the accompanying drawings. This is merely for the purpose of facilitating the description of this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limiting the present disclosure. The positional relationships of constituent elements may be appropriately changed depending on the direction in which each constituent element is described. Therefore, the present disclosure is not limited to the words and phrases described in the specification and may be appropriately replaced according to the circumstances.

[0143] In this specification, unless otherwise specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they can refer to fixed, removable, or integral connections; mechanical or electrical connections; direct connections, indirect connections through intermediaries, or internal communication between two components. Those skilled in the art will understand the specific meanings of these terms in this disclosure.

[0144] In this specification, "electrically connected" includes components connected together via an element having some electrical function. There are no particular limitations on the "element having some electrical function" as long as it enables the transfer of electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with various functions.

[0145] In this specification, "parallel" refers to a state where the angle formed by two straight lines is greater than -10° and less than 10°, and thus also includes a state where the angle is greater than -5° and less than 5°. Furthermore, "perpendicular" refers to a state where the angle formed by two straight lines is greater than 80° and less than 100°, and thus also includes a state where the angle is greater than 85° and less than 95°.

[0146] In this specification, the terms "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced with "conductive film." Similarly, "insulating film" may be replaced with "insulating layer."

[0147] In this specification, the term "same-layer arrangement" refers to a structure formed by patterning two (or more) structures using the same patterning process. The materials of these structures can be the same or different. For example, the precursor materials for forming the multiple structures arranged in the same layer can be the same, and the materials of the final structures can be the same or different.

[0148] The triangles, rectangles, trapezoids, pentagons or hexagons in this specification are not in the strict sense, but may be approximate triangles, rectangles, trapezoids, pentagons or hexagons, etc. There may be some small deformations caused by tolerances, and there may be chamfers, arc edges and deformations.

[0149] The term "about" in the present disclosure refers to a numerical value that is not strictly defined and allows for process and measurement errors.

[0150] Absolute pressure sensors require an independently sealed cavity, and the pressure within the cavity is typically low. The manufacturing process for absolute pressure sensors involves forming a lower plate, depositing a sacrificial layer on the lower plate, depositing an upper plate on the sacrificial layer, forming a release hole in the upper plate, etching the sacrificial layer to form a cavity, and then using thin film deposition technology to seal the release hole to form a vacuum reference cavity. The formation of this cavity requires strict control of the sacrificial layer release time and the design of a sufficient number and density of release holes, resulting in low precision control of the pressure sensor's cavity size and poor product consistency.

[0151] Figure 1 is a schematic diagram of the structure of a pressure sensor provided by an embodiment of the present disclosure. As shown in Figure 1, the pressure sensor provided by an embodiment of the present disclosure may include: a substrate 10 and at least one capacitor disposed on substrate 10, wherein one of the at least one capacitor may include: a first electrode 11 and a second electrode 12 disposed oppositely and insulated from each other, with second electrode 12 located on a side of first electrode 11 away from substrate 10, and a cavity 13 disposed between first electrode 11 and second electrode 12.

[0152] As shown in Figure 1, the orthographic projection of the first electrode 11 on the substrate 10 at least partially overlaps with the orthographic projection of the second electrode on the substrate 10, and the orthographic projection of the overlapping area of ​​the first electrode 11 and the second electrode 12 on the substrate at least partially overlaps with the orthographic projection of the cavity 13 on the substrate. That is, the orthographic projection of the first electrode 11 on the substrate 10 at least partially overlaps with the orthographic projection of the cavity 13 on the substrate 10, and the orthographic projection of the second electrode 12 on the substrate 10 at least partially overlaps with the orthographic projection of the cavity 13 on the substrate 10, so that a capacitor is formed between the first electrode 11 and the second electrode 12.

[0153] In the present disclosure, under the action of pressure, the capacitor in the pressure sensor causes the second electrode 12 to deform toward the cavity 13, and the distance between the first electrode 11 and the second electrode 12 becomes smaller. Since the capacitance value is negatively correlated with the distance between the first electrode 11 and the second electrode 12, as the distance between the first electrode 11 and the second electrode 12 becomes smaller, the capacitance value of the pressure sensor becomes larger, and the pressure value can be obtained through the correspondence between the capacitance value and the pressure value.

[0154] In an exemplary embodiment, the cavity 13 may be a sealed cavity, for example, a vacuum cavity.

[0155] In an exemplary embodiment, the cross-section of the cavity 13 may be square, rectangular, circular, or any other shape that meets design requirements, and the present disclosure does not impose any limitation thereto.

[0156] In an exemplary embodiment, as shown in FIG1 , the second electrode 12 is disposed around the cavity 13 to form a sidewall, and is at least partially disposed on the surface of the cavity 13 away from the first electrode. By disposing the second electrode 12 around the cavity 13 to form a sidewall, and at least partially surrounding the surface of the cavity 13 away from the first electrode, the second electrode can be used to define the pattern of the cavity boundary, eliminating the need to control the release time of the sacrificial layer and design a sufficient number and density of release holes. This ensures that the pattern of the cavity boundary is not affected by the release process, thereby improving the cavity size control accuracy and product consistency of the pressure sensor.

[0157] In an exemplary embodiment, as shown in FIG. 1 , the first electrode 11 may be formed within the substrate 10 and positioned on a surface of the substrate 10 .

[0158] In an exemplary embodiment, the substrate 10 may be made of a material including single crystal silicon.

[0159] In an exemplary embodiment, the present disclosure can form a first electrode by implanting ions into a substrate 10. By controlling implantation process parameters, such as power and time, the implantation depth can be controlled, thereby controlling the thickness of the first electrode. For example, the ions can include boron, phosphorus, and arsenic.

[0160] In an exemplary embodiment, the shape of the top view of the first electrode may be a square, a rectangle, a circle, or a pattern that meets design requirements, and the present disclosure does not impose any limitation on this.

[0161] The first electrode disclosed in the present invention is arranged in the substrate, which not only reduces the thickness of the pressure sensor, but also avoids the deposition of a conductive film used to form the first electrode. The first electrode is formed by a patterning process, which simplifies the preparation steps of the pressure sensor and reduces the production cost.

[0162] 1 , the pressure sensor may further include an insulating dielectric layer 20 disposed between the first electrode 11 and the second electrode 12 of the at least one capacitor. The insulating dielectric layer 20 serves as an insulating layer between the first electrode 11 and the second electrode 12.

[0163] In an exemplary embodiment, the insulating dielectric layer 20 may be made of an insulating material that is non-reactive with the etchant of the sacrificial layer. For example, the insulating dielectric layer 20 may be made of silicon nitride or silicon oxide.

[0164] In an exemplary embodiment, the sacrificial layer may be made of silicon oxide, low-temperature glass, polycrystalline silicon, or phosphosilicate glass. When the sacrificial layer is made of phosphosilicate glass, low-temperature glass, or phosphosilicate glass, the etchant for the sacrificial layer may include an aqueous solution of hydrogen fluoride. When the sacrificial layer is made of polycrystalline silicon, the etchant for the sacrificial layer may be an aqueous solution of potassium hydroxide or an aqueous solution of tetramethylammonium hydroxide. For example, when the insulating dielectric layer is made of silicon oxide, the insulating dielectric layer is etched to form a cavity. The sacrificial layer may be made of low-temperature glass, polycrystalline silicon, or phosphosilicate glass.

[0165] Figure 2 is a top view of the second electrode. As shown in Figure 2, the second electrode 12 is provided with a release hole array 120. Release hole array 120 includes release holes 121 arranged in an array. The orthographic projection of release hole array 120 on the substrate is within the range of the orthographic projection of the cavity on the substrate.

[0166] In an exemplary embodiment, the top view of the second electrode may be in the shape of a square, a rectangle, a circle, or any other shape that meets design requirements, and this disclosure does not impose any limitation thereto. FIG2 takes a rectangle as an example.

[0167] In an exemplary embodiment, the number of release holes in the release hole array and the distance between the release holes can control the speed of cavity formation, which is specifically determined according to the process of the pressure sensor and is not limited in this disclosure.

[0168] In an exemplary embodiment, the release hole array provided on the second electrode can not only form a cavity but also prevent a decrease in the yield of the pressure sensor caused by an excessively large cross-sectional area of ​​the second electrode.

[0169] 1 and 2 , the orthographic projection of the release hole array 120 on the substrate 10 is within the range of the orthographic projection of the cavity 13 on the substrate 10 . The etchant of the sacrificial layer can be released through the release holes 121 .

[0170] 1 , the pressure sensor may further include a sealing layer 30, which is at least partially located on a side of the second electrode 12 of the at least one capacitor away from the substrate 10. The sealing layer 30 may make the cavity 13 a sealed cavity.

[0171] In an exemplary embodiment, as shown in FIG1 , the orthographic projection of the cavity 13 of at least one capacitor on the substrate 10 is located within the orthographic projection of the sealing layer 30 on the substrate 10, and the sealing layer 30 at least partially fills the release hole 121. For example, the sealing layer 30 may cover the substrate 10.

[0172] In an exemplary embodiment, the sealing layer 30 may be made of a material including at least one of silicon oxide and silicon nitride.

[0173] In an exemplary embodiment, FIG3A is a schematic diagram of a pressure sensor, FIG3B is a schematic diagram of a pressure sensor, FIG4A is a schematic diagram of another pressure sensor, and FIG4B is a schematic diagram of another pressure sensor. As shown in FIG3A, FIG3B, FIG4A, and FIG4B, the boundary of the cavity 13 is in contact with the insulating dielectric layer 20, the second electrode 22, and the sealing layer 30. That is, the insulating dielectric layer 20 serves as the lower boundary of the cavity 13, a portion of the second electrode 12 serves as the side boundary of the cavity 13, and another portion of the second electrode 12 and the sealing layer filled in the release hole serve as the upper boundary of the cavity 13. FIG3A illustrates an example in which the entire area of ​​the release hole is filled with the sealing layer. FIG3B illustrates an example in which a portion of the release hole is filled with the sealing layer. The boundary of the cavity in FIG3A and FIG3B is determined by the shape of the second electrode.

[0174] In an exemplary embodiment, FIG3C is a third schematic diagram of a pressure sensor, and FIG4C is a third schematic diagram of another pressure sensor. As shown in FIG3C and FIG4C , the sealing layer 30 may include: a first sealing structure 30A and a second sealing structure 30B. The first sealing structure 30A and the second sealing structure 30B may be an integral structure. The first sealing structure 30A is located on the side of the second electrode 12 away from the substrate 10 and at least partially fills the release hole. The orthographic projection of the cavity 13 of at least one capacitor on the substrate 10 is located within the orthographic projection of the first sealing structure 30A on the substrate 10; illustratively, the first sealing structure 30A may cover the substrate 10.

[0175] In an exemplary embodiment, as shown in Figures 3C and 4C , second sealing structure 30B is located between second electrode 12 and insulating dielectric layer 20, and cavity 13 is formed within second sealing structure 30B. The boundary of the second sealing structure is defined by second electrode 12, while the boundary of cavity 13 is defined by the boundary of second sealing structure 30B. In other words, the boundary of cavity 13 is defined by second electrode 12.

[0176] In an exemplary embodiment, as shown in FIG1 and FIG3A to FIG3C , the second electrode 12 may include a first sub-electrode 12A and a second sub-electrode 12B. The first sub-electrode 12A and the second sub-electrode 12B are disposed in the same layer and formed using the same patterning process. The orthographic projection of the first sub-electrode 12A on the substrate 10 does not overlap with the orthographic projection of the second sub-electrode 12B on the substrate 10.

[0177] In an exemplary embodiment, as shown in Figures 1 and 3A to 3C, the first sub-electrode 12A is arranged around the side wall of the cavity 13, the second sub-electrode 12B is arranged on the side of the cavity away from the substrate 10, the orthographic projection of the cavity 13 on the substrate 10 and the orthographic projection of the second sub-electrode 12B on the substrate 10 at least partially overlap, and the release hole array is arranged on the second sub-electrode 12B.

[0178] In an exemplary embodiment, the pressure sensor provided in Figures 3A to 3C also includes: a first conductive layer and a second conductive layer, the first conductive layer includes at least: a first electrode of at least one capacitor, the second conductive layer includes at least: a second electrode of at least one capacitor, the first conductive layer is located on a side of the insulating dielectric layer close to the substrate, the second conductive layer is located on a side of the cavity away from the substrate, and the second conductive layer is at least partially in direct contact with the insulating dielectric layer.

[0179] 4A to 4C , the pressure sensor may further include a second dielectric layer 14 , and the second electrode 12 may include a first sub-connection portion 12C and a second sub-connection portion 12D. The second dielectric layer 14 is located on a side of the second electrode 12 close to the substrate 10 .

[0180] In an exemplary embodiment, as shown in Figures 4A to 4C, the orthographic projection of the second dielectric layer 14 on the substrate 10 at least partially overlaps with the orthographic projection of the second electrode 12 on the substrate 10, the second dielectric layer 14 is arranged around the sidewall of the cavity 13, the second electrode 12 is arranged on the side of the cavity 13 away from the substrate 10, the orthographic projection of the first sub-connector 12C on the substrate 10 at least partially overlaps with the orthographic projection of the second dielectric layer 14 on the substrate 10, the orthographic projection of the cavity 13 on the substrate 10 at least partially overlaps with the orthographic projection of the second sub-connector 12D on the substrate 10, and the release hole array is arranged on the second sub-connector 12D.

[0181] In an exemplary embodiment, the pressure sensor provided in Figures 4A to 4C also includes: a first conductive layer, a second conductive layer and a third conductive layer, the first conductive layer includes at least: a first electrode of at least one capacitor, the second conductive layer includes at least: a first sub-electrode of the second electrode of at least one capacitor, the third conductive layer includes at least: a second sub-electrode of the second electrode of at least one capacitor, the first conductive layer is located on a side of the insulating dielectric layer close to the substrate, the second conductive layer is arranged around the cavity to form a sidewall, and is located on a side of the insulating dielectric layer away from the substrate, and the third conductive layer is located on a side of the second conductive layer away from the substrate.

[0182] In an exemplary embodiment, the material of the first electrode 11 may include single crystal silicon doped with ions, and the ions include boron, phosphorus, and arsenic.

[0183] In an exemplary embodiment, the second electrode 12 may be made of a material including low-resistance polysilicon or metal.

[0184] In an exemplary embodiment, as shown in FIG. 3A to FIG. 3C , the pressure sensor may further include: a plurality of pads, the plurality of pads being located on a side of the sealing layer 30 away from the substrate 10 , the plurality of pads being respectively connected to a first electrode and a second electrode of at least one capacitor.

[0185] In an exemplary embodiment, the material of the plurality of pads may include aluminum or gold.

[0186] The provision of the pad layer in the present disclosure can realize the input and detection of the pressure sensor signal without the need to flatten the surface away from the sealing layer 30, thereby greatly reducing the process steps and improving the yield of the pressure sensor.

[0187] In an exemplary embodiment, Figure 5 is a schematic diagram of the structure of another pressure sensor. As shown in Figure 5, the pressure sensor may further include an adhesive layer 50, the adhesive layer including a plurality of adhesive structures. The sealing layer defines a plurality of grooves, the plurality of adhesive structures corresponding one-to-one with the plurality of grooves and one-to-one with the plurality of pads. The adhesive structures are disposed within the corresponding grooves and connected to the corresponding pads and the electrodes to which they are connected.

[0188] In an exemplary embodiment, an orthographic projection of at least one adhesive structure on the substrate coincides with an orthographic projection of a corresponding pad on the substrate.

[0189] In an exemplary embodiment, the adhesion layer 50 may include a conductive film layer, and the resistivity of the material making the adhesion layer may be greater than the resistivity of the material making the pads. The provision of the adhesion layer in the present disclosure can improve the stability of the multiple pads and the connected electrodes, thereby improving the reliability of the pressure sensor.

[0190] In an exemplary embodiment, the adhesion layer may be made of a metal. For example, the adhesion layer may be made of titanium, chromium, or tantalum.

[0191] Figure 6 is a schematic diagram of a pressure sensor connection. In this exemplary embodiment, the at least one capacitor in the pressure sensor includes a pressure-sensing capacitor FC, meaning the pressure sensor includes only one pressure-sensing capacitor. The second electrode in the pressure-sensing capacitor deforms under pressure, and one of the first and second electrodes 11, 12 in the pressure-sensing capacitor is connected to interface K1, while the other of the first and second electrodes 11, 12 in the pressure-sensing capacitor is connected to interface K2.

[0192] In an exemplary embodiment, a DC voltage signal or an AC voltage signal is input to one of the interfaces K1 or K2, and a pressure-sensitive capacitance signal is detected at one of the interfaces K1 or K2. The pressure sensor can obtain a pressure value based on the pressure-sensitive capacitance signal.

[0193] In the exemplary embodiment, Figures 3A to 3C and 4A to 4C illustrate a pressure sensor including a single pressure-sensing capacitor. As shown in Figures 3A to 3C and 4A to 4C, when the pressure sensor includes a single pressure-sensing capacitor, the multiple pads may include a first pad P11 and a second pad P12. First pad P11 is connected to first electrode 11 of the pressure-sensing capacitor, and second pad P12 is connected to second electrode 12 of the pressure-sensing capacitor.

[0194] In an exemplary embodiment, when the first electrode 11 in the pressure-sensing capacitor is connected to the interface K1 and the second electrode 12 in the pressure-sensing capacitor is connected to the interface K2, the first pad P11 serves as the interface K1 and the second pad P12 serves as the interface K2; or when the first electrode 11 in the pressure-sensing capacitor is connected to the interface K2 and the second electrode 12 in the pressure-sensing capacitor is connected to the interface K1, the first pad P11 serves as the interface K2 and the second pad P12 serves as the interface K1.

[0195] Taking into account the inherent large parasitic capacitance of a single pressure-sensing capacitor and its significant influence on packaging stress, the at least one capacitor in the pressure sensor of the present disclosure may further include: at least one pressure-sensing capacitor and at least one reference capacitor. The deformation rate of the second electrode of the reference capacitor under the action of pressure is 0.1% to 0.3% of the deformation rate of the pressure-sensing capacitor under the action of pressure, that is, the second electrode of the pressure-sensing capacitor is deformed under the action of pressure, and the second electrode of the reference capacitor is basically not deformed under the action of pressure. The present disclosure offsets the parasitic capacitance of the pressure-sensing capacitor through the parasitic capacitance of the reference capacitor, which can improve the detection accuracy of the pressure sensor. Exemplarily, the at least one capacitor may include: a pressure-sensing capacitor and a reference capacitor, or the at least one capacitor includes: two pressure-sensing capacitors and two reference capacitors. The present disclosure does not impose any limitation on this.

[0196] In an exemplary embodiment, the number of release holes included in the release hole array of the second electrode of the pressure-sensing capacitor and the number of release holes included in the release hole array of the second electrode of the reference capacitor can be the same, or the number of release holes included in the release hole array of the second electrode of the pressure-sensing capacitor can be greater than the number of release holes included in the release hole array of the second electrode of the reference capacitor.

[0197] In an exemplary embodiment, a first electrode of at least one pressure-sensing capacitor and a first electrode of at least one reference capacitor are disposed on the same layer, and a second electrode of at least one pressure-sensing capacitor and a second electrode of at least one reference capacitor are disposed on the same layer.

[0198] In an exemplary embodiment, the at least one capacitor in the pressure sensor may further include: at least one pressure-sensing capacitor and at least one reference capacitor, which can minimize the size of the pressure sensor while not increasing the number of process steps.

[0199] Figure 7 is a schematic diagram of another pressure sensor connection. As shown in Figure 7, when the at least one capacitor includes a pressure-sensing capacitor FC and a reference capacitor RC, the pressure-sensing capacitor FC and the reference capacitor RC are connected in series. Specifically, the first electrode 21 of the pressure-sensing capacitor FC and the first electrode 31 of the reference capacitor RC are connected to interface K2, the second electrode 22 of the pressure-sensing capacitor FC is connected to interface K1, and the second electrode 32 of the reference capacitor RC is connected to interface K3. A DC voltage signal or an AC voltage signal is input to interfaces K1 and K3, and the pressure-sensing capacitor signal is detected at interfaces K1 and K2. According to the principle of charge conservation, the charge Q of the pressure-sensing capacitor FC and the reference capacitor RC is equal. The voltage output by the pressure-sensing capacitor FC satisfies U = Q / C, where C is the capacitance of the pressure-sensing capacitor FC. Under pressure, the second electrode 22 of the pressure-sensing capacitor FC deforms, while the second electrode 32 of the reference capacitor RC remains substantially unchanged. This increases the capacitance of the pressure-sensing capacitor FC and reduces the voltage between interfaces K1 and K2, which are connected to the pressure-sensing capacitor FC, thereby reflecting the magnitude of the pressure. The pressure sensor includes: a pressure-sensing capacitor and a reference capacitor connected in series, which can make the parasitic capacitance of the reference capacitor and the parasitic capacitance of the pressure-sensing capacitor cancel each other out, and the stress introduced by the sealing layer applied to the reference capacitor and the pressure-sensing capacitor with basically the same processing technology, causing the capacitance changes to cancel each other out, thereby improving the product stability and measurement accuracy of the pressure sensor.

[0200] FIG8 is a schematic diagram of the structure of a pressure sensor including two capacitors, FIG9A is a schematic diagram of the structure of a pressure sensor including two capacitors, FIG9B is a schematic diagram of the structure of a pressure sensor including two capacitors, FIG10 is a schematic diagram of the structure of a pressure sensor including two capacitors, FIG11A is a schematic diagram of the structure of a pressure sensor including two capacitors, and FIG11B is a schematic diagram of the structure of a pressure sensor including two capacitors. As shown in FIG8, FIG9A, FIG9B, FIG10, FIG11A and FIG11B, when there is one pressure-sensing capacitor and one reference capacitor, the plurality of pads include: a first pad P21, a second pad P22 and a third pad P23. The first pad P21 is connected to the second electrode 22 of the pressure-sensing capacitor FC, the second pad P22 is connected to the second electrode 32 of the reference capacitor RC, and the third pad P23 is connected to the first electrode 21 of the pressure-sensing capacitor FC and the first electrode 31 of the reference capacitor RC. Figures 8 and 9A are explained using the structure of the capacitor as Figure 3A as an example, and Figure 9B is explained using the structure of the capacitor as Figure 3C as an example. The structure of the capacitor can also be as shown in Figure 3B. Figures 10 and 11A are explained using the structure of the capacitor as Figure 4A as an example, and Figure 11B is explained using the structure of the capacitor as Figure 4C as an example. The structure of the capacitor can also be as shown in Figure 4B. The present disclosure does not impose any limitations on this.

[0201] In an exemplary embodiment, the first pad 21 serves as the interface K1 , the second pad 22 serves as the interface K3 , and the third pad serves as the interface K2 .

[0202] In an exemplary embodiment, the first electrode 21 of the pressure-sensing capacitor FC and the first electrode 31 of the reference capacitor RC are integrally implanted but spatially isolated. The first electrode 21 of the pressure-sensing capacitor FC and the first electrode 31 of the reference capacitor RC may be connected via a pad metal wire.

[0203] In an exemplary embodiment, sealing layer 30 defines a via hole exposing second electrode 22 of pressure-sensing capacitor FC and a via hole exposing second electrode 32 of reference capacitor RC. First pad P21 is connected to second electrode 22 of pressure-sensing capacitor FC via the via hole exposing second electrode 22 of pressure-sensing capacitor FC, and second pad P22 is connected to second electrode 32 of reference capacitor RC via the via hole exposing second electrode 32 of reference capacitor RC.

[0204] In the exemplary embodiment, vias exposing the first electrode 21 of the pressure-sensing capacitor FC and the first electrode 31 of the reference capacitor RC are formed in the dielectric layer 20 and the sealing layer 30. The third pad P23 is connected to the first electrode 21 of the pressure-sensing capacitor FC and the first electrode 31 of the reference capacitor RC through the vias exposing the first electrode 21 of the pressure-sensing capacitor FC and the first electrode 31 of the reference capacitor RC.

[0205] In order to ensure that the second electrode of the pressure-sensing capacitor deforms under pressure while the second electrode of the reference capacitor remains substantially unchanged under pressure, as shown in Figures 8 and 10, the pressure sensor may further include: a pressure-resistant layer 60, which is located on the side of the plurality of pads away from the substrate 10 and covers the substrate 10. The orthographic projection of at least one reference capacitor on the substrate is within the orthographic projection of the pressure-resistant layer 60 on the substrate 10. The pressure-resistant layer 60 is provided with at least one pressure-sensing hole exposing the sealing layer 30, and the at least one pressure-sensing hole corresponds one-to-one with at least one pressure-sensing capacitor, that is, the pressure-resistant layer in the present disclosure may include a pressure-sensing hole K, the orthographic projection of the pressure-sensing hole K on the substrate 10 at least partially overlapping with the orthographic projection of the second electrode 22 of the pressure-sensing capacitor FC on the substrate 10. The provision of the pressure-sensing hole K in the present disclosure can enable the second electrode 22 of the pressure-sensing capacitor FC to deform under pressure, while the provision of the pressure-resistant layer 60 can ensure that the second electrode 32 of the reference capacitor RC remains substantially unchanged under pressure.

[0206] In an exemplary embodiment, the thickness of the pressure-resistant layer 60 may be greater than the thickness of the cavity of the at least one capacitor.

[0207] In an exemplary embodiment, the material of the stress-resistant layer 60 may include at least one of silicon oxide or silicon nitride.

[0208] In an exemplary embodiment, as shown in FIG8 , the pressure-resistant layer 60 further defines a plurality of pad holes that expose a plurality of pads. The plurality of pad holes include a first pad hole V11, a second pad hole V12, and a third pad hole V13. The first pad hole V11 exposes the first pad P21, the second pad hole V12 exposes the second pad P22, and the third pad hole V13 exposes the third pad P23.

[0209] In an exemplary embodiment, Figure 12 is a first schematic diagram of the film layer where the second electrode of the pressure-sensing capacitor is located. As shown in Figure 12, the number of release holes included in the release hole array 220 of the second electrode 22 of the pressure-sensing capacitor FC is the same as the number of release holes included in the release hole array 220 of the second electrode 32 of the reference capacitor RC. For example, the number and arrangement of release holes 221 included in the release hole array of the second electrode 22 of the pressure-sensing capacitor FC is the same as the number and arrangement of release holes 321 included in the release hole array of the second electrode 32 of the reference capacitor RC. Figure 12 is a schematic diagram of the film layer where the second electrode of the pressure-sensing capacitor is located when the pressure sensor includes a pressure-resistant layer.

[0210] In order to achieve deformation of the second electrode of the pressure-sensing capacitor under the action of pressure, while the second electrode of the reference capacitor is basically not deformed under the action of pressure, as shown in Figures 9A, 9B, 11A and 11B, the reference capacitor may further include: a support structure 34, which is arranged between the second electrode 32 of the reference capacitor RC and the insulating dielectric layer 20. The orthographic projection of the support structure 34 on the substrate 10 overlaps with the orthographic projection of the second electrode 32 of the reference capacitor RC on the substrate 10, and the cavity 33 of the reference capacitor RC is arranged around the support structure 34. The present disclosure achieves deformation of the pressure-sensing capacitor FC under the action of pressure, while the reference capacitor RC does not deform under the action of pressure by providing the support structure 34 in the reference capacitor RC and not providing the support structure in the pressure-sensing capacitor FC.

[0211] In an exemplary embodiment, as shown in FIG9A and FIG11A , when the capacitor structure is as shown in FIG3A , FIG3B , FIG4A and FIG4B , the sealing layer is not disposed around the sidewall of the support structure of the reference capacitor.

[0212] In an exemplary embodiment, as shown in FIG. 9B and FIG. 11B , when the capacitor structure is as shown in FIG. 3C or FIG. 4C , the second sealing structure of the sealing layer is disposed around the sidewall of the support structure of the reference capacitor.

[0213] In an exemplary embodiment, the support structure 34 and the cavity of the reference capacitor RC are formed using the same process, and the support structure 34 is a sacrificial layer that is not corroded. The support structure 34 is made of materials including silicon oxide, low-temperature glass, phosphosilicate glass, or polysilicon.

[0214] In an exemplary embodiment, Figure 13 is a second schematic diagram of the film layer where the second electrode of the pressure-sensing capacitor is located. As shown in Figure 13, the number of release holes 221 included in the release hole array 220 of the second electrode 22 of the pressure-sensing capacitor FC is greater than the number of release holes 321 included in the release hole array 220 of the second electrode 32 of the reference capacitor RC. This allows the sacrificial layer in the pressure-sensing capacitor FC to be etched away during the same period of time, while the sacrificial layer in the reference capacitor RC is not completely etched. The unetched portion serves as a support structure 34 to support the second electrode of the reference capacitor RC, ensuring that the reference capacitor RC remains substantially unchanged under pressure. Figure 13 is a schematic diagram of the film layer where the second electrode of the pressure-sensing capacitor is located when the reference capacitor includes a support structure.

[0215] In an exemplary embodiment, in order to achieve deformation of the second electrode of the pressure-sensing capacitor under the action of pressure and the basic non-deformation of the second electrode of the reference capacitor under the action of pressure, when the pressure sensor may include a pressure-resistant layer, the reference capacitor may also include a support structure 34.

[0216] FIG14 is a connection diagram of another pressure sensor. As shown in FIG14 , when the at least one capacitor includes two pressure-sensing capacitors and two reference capacitors, the two pressure-sensing capacitors and the two reference capacitors can be connected in series and parallel to form a Wheatstone bridge. The two pressure-sensing capacitors are a first pressure-sensing capacitor FC1 and a second pressure-sensing capacitor FC2, and the two reference capacitors are a first reference capacitor RC1 and a second reference capacitor RC2. The second electrode 42 of the first pressure-sensing capacitor FC1 and the second electrode 52 of the first reference capacitor RC1 are respectively connected to interface K1. The first electrode 41 of the first pressure-sensing capacitor FC1 and the first electrode 71 of the second reference capacitor RC2 are respectively connected to interface K2. The second electrode 62 of the second pressure-sensing capacitor FC2 and the second electrode 72 of the second reference capacitor RC2 are respectively connected to interface K3. The first electrode 61 of the second pressure-sensing capacitor FC2 and the first electrode 51 of the first reference capacitor RC1 are respectively connected to interface K4. A DC voltage signal or an AC voltage signal is input to interface K1 and interface K3, and the pressure-sensing capacitor signals are detected at interfaces K2 and K4. The signal strength of the pressure-sensitive capacitor signal detected by the pressure sensor including two pressure-sensitive capacitors and two reference capacitors is twice the signal strength of the pressure-sensitive capacitor signal detected by the pressure sensor including one pressure-sensitive capacitor and one reference capacitor, that is, the detection sensitivity of the pressure sensor including two pressure-sensitive capacitors and two reference capacitors is significantly higher than the detection sensitivity of the pressure sensor including one pressure-sensitive capacitor and one reference capacitor. The pressure sensor including two pressure-sensitive capacitors and two reference capacitors has better measurement accuracy and better product stability. Since multiple capacitors are only connected to four interfaces, the difficulty of signal processing is further reduced.

[0217] Figure 15 is a schematic diagram of the structure of a pressure sensor including four capacitors, Figure 16A is a schematic diagram of the structure of a pressure sensor including four capacitors, Figure 16B is a schematic diagram of the structure of a pressure sensor including four capacitors, Figure 17 is a schematic diagram of the structure of a pressure sensor including four capacitors, Figure 18A is a schematic diagram of the structure of a pressure sensor including four capacitors, Figure 18B is a schematic diagram of the structure of a pressure sensor including four capacitors, and Figure 19 is a top view of the conductive film layer of the pressure sensor including four capacitors. Figures 15, 16A, and 16B are cross-sectional views of Figure 19 along the AA direction. As shown in Figures 15, 16A, 16B, and 19, in an exemplary embodiment, when the number of pressure-sensing capacitors is two and the number of reference capacitors is two, the multiple pads include: a first pad P31, a second pad P32, a third pad P33, and a fourth pad P44. The first pad P31 is connected to the second electrode 42 of the first pressure-sensing capacitor FC1 and the second electrode 52 of the first reference capacitor RC1, respectively. The second pad P32 is connected to the second electrode 62 of the second pressure-sensing capacitor FC2 and the second electrode 72 of the second reference capacitor RC2, respectively. The third pad P33 is connected to the first electrode 41 of the first pressure-sensing capacitor FC1 and the first electrode 72 of the second reference capacitor RC2, respectively. The fourth pad P34 is connected to the first electrode 51 of the first reference capacitor RC1 and the first electrode 61 of the second pressure-sensing capacitor FC2, respectively. Figures 15 and 16A are described using the structure of the capacitor as Figure 3A as an example, and Figure 16B is described using the structure of the capacitor as Figure 3C as an example. The structure of the capacitor can also be Figure 3B. Figures 17 and 18A are described using the structure of the capacitor as Figure 4A as an example, and Figure 18B is described using the structure of the capacitor as Figure 4C as an example. The structure of the capacitor can also be Figure 4B. The present disclosure does not impose any limitations on this. In an exemplary embodiment, the second electrodes of the two reference capacitors and the two pressure-sensing capacitors are provided with a release hole array. To simplify FIG. 19 , FIG. 19 does not show the release hole array.

[0218] In an exemplary embodiment, the first pad P31 serves as the interface K1 , the second pad P32 serves as the interface K3 , the third pad P33 serves as the interface K2 , and the fourth pad P34 serves as the interface K4 .

[0219] In an exemplary embodiment, as shown in FIG19 , the first pressure-sensing capacitor FC1, the second reference capacitor RC2, the first reference capacitor RC1, and the second pressure-sensing capacitor FC2 are arranged along a first direction D1. Exemplarily, the first pressure-sensing capacitor FC1, the second reference capacitor RC2, the first reference capacitor RC1, and the second pressure-sensing capacitor FC2 are arranged in sequence along the first direction D1, but this disclosure does not impose any limitation on this.

[0220] In an exemplary embodiment, Figure 20 is a schematic diagram of one of the conductive film layers in Figure 19 . As shown in Figure 20 , the first electrode 41 of the first pressure-sensing capacitor FC1 and the first electrode 71 of the second reference capacitor RC2 are integrally implanted but spatially separated. The first electrode 41 of the first pressure-sensing capacitor FC1 and the first electrode 71 of the second reference capacitor RC2 are connected via a pad metal lead. The first electrode 61 of the second pressure-sensing capacitor FC2 and the first electrode 51 of the first reference capacitor RC1 are integrally implanted but spatially separated. The first electrode 61 of the second pressure-sensing capacitor FC2 and the first electrode 51 of the first reference capacitor RC1 are connected via a pad metal lead.

[0221] In an exemplary embodiment, Figure 21 is a schematic diagram of another conductive film layer in Figure 19. As shown in Figure 21, the second electrode 42 of the first pressure-sensing capacitor FC1, the second electrode 62 of the second pressure-sensing capacitor FC2, the second electrode 52 of the first reference capacitor RC1, and the second electrode 72 of the second reference capacitor RC2 are provided separately.

[0222] In an exemplary embodiment, as shown in Figures 20 and 21, the first and second electrodes of at least one capacitor each include a main portion and a connecting portion. The main portion is rectangular in shape, and the connecting portion is located on one side of the main portion and connected to the main portion. The area of ​​the connecting portion is smaller than that of the main portion. The orthographic projection of the main portion of the first electrode 41 of the first pressure-sensing capacitor FC1 on the substrate at least partially overlaps with the orthographic projection of the main portion of the second electrode 42 of the first pressure-sensing capacitor FC1 on the substrate. The orthographic projection of the main portion of the first electrode 61 of the second pressure-sensing capacitor FC2 on the substrate at least partially overlaps with the orthographic projection of the main portion of the second electrode 62 of the second pressure-sensing capacitor FC2 on the substrate. The orthographic projection of the main portion of the first electrode 51 of the first reference capacitor RC1 on the substrate at least partially overlaps with the orthographic projection of the main portion of the second electrode 52 of the first reference capacitor RC1 on the substrate. The orthographic projection of the main portion of the first electrode 71 of the second reference capacitor RC2 on the substrate at least partially overlaps with the orthographic projection of the main portion of the second electrode 72 of the second reference capacitor RC2 on the substrate.

[0223] In an exemplary embodiment, the sealing layer 30 is provided with a via hole exposing the second electrode 42 of the first pressure-sensing capacitor FC, a via hole exposing the second electrode 62 of the second pressure-sensing capacitor FC2, a via hole exposing the second electrode 52 of the first reference capacitor RC1, and a via hole exposing the second electrode 72 of the second reference capacitor RC2. The first pad P31 is connected to the second electrode 42 of the first pressure-sensing capacitor FC1 through the via hole exposing the second electrode 42 of the first pressure-sensing capacitor FC, and is connected to the second electrode 52 of the first reference capacitor RC1 through the via hole exposing the second electrode 52 of the first reference capacitor RC1. The second pad P32 is connected to the second electrode 62 of the second pressure-sensing capacitor FC2 through the via hole exposing the second electrode 62 of the second pressure-sensing capacitor FC2, and is connected to the second electrode 72 of the second reference capacitor RC2 through the via hole exposing the second electrode 72 of the second reference capacitor RC2.

[0224] In an exemplary embodiment, the sealing layer 30 and the dielectric layer 20 are provided with a via hole exposing the integral structure of the first electrode 41 of the first pressure-sensing capacitor FC1 and the first electrode 72 of the second reference capacitor RC2, and a via hole exposing the integral structure of the first electrode 51 of the first reference capacitor RC1 and the first electrode 61 of the second pressure-sensing capacitor FC2. The third pad P33 is connected to the first electrode 41 of the first pressure-sensing capacitor FC1 and the first electrode 72 of the second reference capacitor RC2 via the integral structure of the via hole exposing the first electrode 41 of the first pressure-sensing capacitor FC1 and the first electrode 72 of the second reference capacitor RC2. The fourth pad P34 is connected to the first electrode 51 of the first reference capacitor RC1 and the first electrode 61 of the second pressure-sensing capacitor FC2 via the integral structure of the via hole exposing the first electrode 41 of the first pressure-sensing capacitor FC1 and the first electrode 72 of the second reference capacitor RC2.

[0225] To ensure that the second electrode 42 of the first pressure-sensing capacitor FC1 and the second electrode 62 of the second pressure-sensing capacitor FC2 deform under pressure, while the second electrode 52 of the first reference capacitor RC1 and the second electrode 72 of the second reference capacitor RC2 remain substantially unchanged under pressure, the pressure sensor may further include a pressure-resistant layer 60, as shown in Figures 15 and 17. The pressure-resistant layer 60 is located on a side of the sealing layer away from the substrate 10 and covers the substrate 10. The pressure-resistant layer 60 is provided with at least one pressure-sensitive hole that exposes the sealing layer 30. As shown in Figures 15 and 17, the at least one pressure-sensitive hole includes a first pressure-sensitive hole K1 and a second pressure-sensitive hole K2. The orthographic projection of the first pressure-sensitive hole K1 on the substrate 10 at least partially overlaps with the orthographic projection of the second electrode 42 of the first pressure-sensing capacitor FC1 on the substrate 10. The orthographic projection of the second pressure-sensitive hole K2 on the substrate 10 at least partially overlaps with the orthographic projection of the second electrode 62 of the second pressure-sensing capacitor FC2 on the substrate 10. The setting of the first pressure-sensing hole K1 and the second pressure-sensing hole K2 in the present disclosure can make the second electrode 42 of the first pressure-sensing capacitor and the second electrode 62 of the second pressure-sensing capacitor deform under the action of pressure, and the setting of the pressure-resistant layer 60 can make the second electrode 52 of the first reference capacitor and the second electrode 72 of the second reference capacitor basically not deformed under the action of pressure.

[0226] In an exemplary embodiment, as shown in FIG15 , the pressure-resistant layer 60 further has a plurality of pad holes that expose a plurality of pads. The plurality of pad holes include a first pad hole V21, a second pad hole V22, a third pad hole V23, and a fourth pad hole V24. The first pad hole V21 exposes the first pad P31, the second pad hole V22 exposes the second pad P32, the third pad hole V23 exposes the third pad P33, and the fourth pad hole V24 exposes the fourth pad P34.

[0227] In an exemplary embodiment, Figure 22 is a schematic diagram of the film layer where the second electrodes of two pressure-sensing capacitors are located. As shown in Figure 22, the number of release holes included in the release hole array of the second electrode of at least one pressure-sensing capacitor is the same as the number of release holes included in the release hole array of the second electrode of at least one reference capacitor. For example, the number and arrangement of release holes 421 included in the release hole array 420 of the second electrode 42 of the first pressure-sensing capacitor FC1 and the release hole array 621 included in the release hole array 620 of the second electrode 62 of the second pressure-sensing capacitor FC2 are the same as the number and arrangement of release holes 521 included in the release hole array 520 of the second electrode 52 of the first reference capacitor RC1 and the release hole array 720 of the second electrode 72 of the second reference capacitor RC2. Figure 22 is a schematic diagram of the film layer where the second electrodes of the pressure-sensing capacitors are located when the pressure sensor includes a pressure-resistant layer.

[0228] In order to achieve deformation of the second electrode of the pressure-sensing capacitor under the action of pressure, while the second electrode of the reference capacitor does not deform substantially under the action of pressure, at least one reference capacitor may include: a support structure. The support structure is arranged between the second electrode of the reference capacitor and the insulating dielectric layer 20. The orthographic projection of the support structure on the substrate 10 overlaps with the orthographic projection of the second electrode of the reference capacitor on the substrate 10, and the cavity of the reference capacitor is arranged around the support structure. For example, as shown in Figures 16A, 16B, 18A and 18B, the first reference capacitor RC1 may further include: a support structure 54, and the second reference capacitor RC2 may further include: a support structure 74, the support structure 54 is arranged between the second electrode 52 of the first reference capacitor RC1 and the insulating dielectric layer 20. The orthographic projection of the support structure 54 on the substrate 10 overlaps with the orthographic projection of the second electrode 52 of the first reference capacitor RC1 on the substrate 10, and the cavity 53 of the first reference capacitor RC1 is arranged around the support structure 54. The support structure 74 is arranged between the second electrode 72 of the second reference capacitor RC2 and the insulating dielectric layer 20. The orthographic projection of the support structure 74 on the substrate 10 overlaps with the orthographic projection of the second electrode 72 of the second reference capacitor RC2 on the substrate 10, and the cavity 73 of the second reference capacitor RC2 is arranged around the support structure 74. In the present disclosure, by providing the support structure 34 in at least one reference capacitor and omitting the support structure in at least one pressure-sensing capacitor, the second electrode of at least one reference capacitor deforms under pressure, while the second electrode of at least one reference capacitor does not deform under pressure.

[0229] In an exemplary embodiment, as shown in FIG16A and FIG18A , when the capacitor structure is as shown in FIG3A , FIG3B , FIG4A and FIG4B , the sealing layer is not disposed around the sidewall of the support structure of the reference capacitor.

[0230] In an exemplary embodiment, as shown in FIG. 16B and FIG. 18B , when the capacitor structure is as shown in FIG. 3C or FIG. 4C , the second sealing structure of the sealing layer is disposed around the sidewall of the support structure of the reference capacitor.

[0231] In an exemplary embodiment, the support structure of at least one reference capacitor and the cavity are formed using the same process, and the support structure is a sacrificial layer that is not corroded. The support structure is made of materials including silicon oxide, low-temperature glass, phosphosilicate glass, or polysilicon.

[0232] In an exemplary embodiment, Figure 23 is a second schematic diagram of the film layer containing the second electrodes of two pressure-sensing capacitors. As shown in Figure 23, the number of release holes included in the release hole array of the second electrode of at least one pressure-sensing capacitor is greater than the number of release holes included in the release hole array of the second electrode of at least one reference capacitor. For example, the number of release holes 421 included in the release hole array 420 of the second electrode 42 of the first pressure-sensing capacitor FC1 and the number of release holes 621 included in the release hole array 620 of the second electrode 62 of the second pressure-sensing capacitor FC2 are greater than the number of release holes 521 included in the release hole array 520 of the second electrode 52 of the first reference capacitor RC1 and the number of release holes 721 included in the release hole array 720 of the second electrode 72 of the second reference capacitor RC2. The release hole array of the second electrode of at least one pressure-sensing capacitor includes a greater number of release holes than the release hole array of the second electrode of at least one reference capacitor. This allows, during the same period of time, the sacrificial layer in the at least one pressure-sensing capacitor to be etched away, while the sacrificial layer in the at least one reference capacitor is not completely etched. The unetched portion serves as a support structure to support the second electrode of the at least one reference capacitor, ensuring that the reference capacitor RC remains substantially unchanged under pressure. Figure 22 is a schematic diagram of the film layer where the second electrode of the pressure-sensing capacitor is located when the at least one reference capacitor includes a support structure.

[0233] In an exemplary embodiment, in order to achieve deformation of the second electrode of at least one pressure-sensing capacitor under the action of pressure, and the basic non-deformation of the second electrode of at least one reference capacitor under the action of pressure, when the pressure sensor may include a pressure-resistant layer, at least one reference capacitor may also include a support structure.

[0234] In an exemplary embodiment, the area of ​​the surface of the cavity in at least one capacitor near the second electrode is within a range of 20 to 100 times the thickness of the cavity. In the present disclosure, the area of ​​the surface of the cavity in at least one capacitor near the second electrode is within a range of 20 to 100 times the thickness of the cavity, which ensures that the capacitor can have a large deformation, thereby ensuring that the pressure sensor has a high sensitivity.

[0235] In an exemplary embodiment, when at least one reference capacitor in the pressure sensor is provided with a supporting structure, since the pressure sensor is relatively thin, the pressure sensor may be touched during transportation, packaging, and testing. An appropriate unstructured blank area is reserved outside the capacitor area to enable transportation and packaging without direct contact with the capacitor.

[0236] The following is an illustrative example of the pressure sensor fabrication process. The "patterning process" referred to in this disclosure includes processes such as photoresist coating, mask exposure, development, etching, and photoresist stripping for metal, inorganic, or transparent conductive materials. For organic materials, it includes processes such as organic material coating, mask exposure, and development. Deposition can be performed by any one or more of sputtering, evaporation, and chemical vapor deposition; coating can be performed by any one or more of spray coating, spin coating, and inkjet printing; and etching can be performed by any one or more of dry etching and wet etching, although this disclosure does not limit this. A "thin film" refers to a thin layer of a material deposited on a substrate using deposition, coating, or other processes. If the thin film does not require a patterning process during the entire fabrication process, it can also be referred to as a "layer." If the thin film requires a patterning process during the entire fabrication process, it is referred to as a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process contains at least one "pattern." The phrase "A and B are arranged in the same layer" in this disclosure means that A and B are formed simultaneously through the same patterning process. In an exemplary embodiment of the present disclosure, "the orthographic projection of the membrane is within the range of the orthographic projection of A" or "the orthographic projection of B includes the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary range of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B.

[0237] The method for preparing the pressure sensor provided in FIG8 includes steps S11 to S18 .

[0238] Step S11: providing a substrate 10, coating a photoresist 71 on the substrate 10, and forming regions H1 and H2 on the photoresist 71 through a patterning process, as shown in FIG. 24 a .

[0239] In an exemplary embodiment, the substrate 10 is single crystal silicon.

[0240] Step S12: ions are implanted into the regions H1 and H2. The substrates implanted with ions serve as the first electrode 21 of the pressure-sensing capacitor and the first electrode 31 of the reference capacitor, and the photoresist is stripped off, as shown in FIG24 b.

[0241] In an exemplary embodiment, low-temperature, high-concentration ion implantation is performed using an ion implanter, and the implantation dose may be 3E15 to 1E16 per square centimeter.

[0242] Illustratively, the ions may be boron, phosphorus, or arsenic.

[0243] Step S13: An insulating dielectric film and a sacrificial film are sequentially deposited on the substrate on which the first electrode of the pressure-sensing capacitor and the first electrode of the reference capacitor are formed, and the sacrificial film is patterned through a patterning process to form an insulating dielectric layer 20 covering the substrate 10 and a sacrificial layer 72 located on the insulating dielectric layer 20 and at least one capacitor, as shown in FIG24c.

[0244] In an exemplary embodiment, the shape of the sacrificial layer 72 may be a boss structure, and the three-dimensional morphology of the sacrificial layer 72 determines the morphology of the inner wall of the cavity.

[0245] In an exemplary embodiment, the insulating dielectric layer 20 may be made of silicon nitride. The insulating dielectric layer 20 does not react with the etchant of the sacrificial layer.

[0246] In an exemplary embodiment, the sacrificial layer 72 may be made of a material including silicon oxide, low-temperature glass, or phosphosilicate glass.

[0247] Step S14: depositing a first conductive film on the substrate on which the sacrificial layer 72 is formed, and patterning the first conductive film through a patterning process to form the second electrode 22 of the pressure-sensing capacitor and the second electrode 32 of the reference capacitor. The second electrode 22 of the pressure-sensing capacitor is provided with release holes 221 arranged in an array, and the second electrode 32 of the reference capacitor is provided with release holes 321 arranged in an array, as shown in FIG24d.

[0248] In an exemplary embodiment, the material of the first conductive film may include low-resistance polysilicon.

[0249] In an exemplary embodiment, the number and arrangement of the release holes 221 in the second electrode 22 of the pressure-sensing capacitor are the same as the number and arrangement of the release holes 321 in the second electrode 32 of the reference capacitor.

[0250] Step S15: Immerse the substrate on which the second electrode of the pressure-sensing capacitor and the second electrode of the reference capacitor are formed in an etchant, and use the etchant to corrode and release the sacrificial layer to form the cavity 23 of the pressure-sensing capacitor and the cavity 33 of the reference capacitor. Dry the substrate on which the cavity 23 of the pressure-sensing capacitor and the cavity 33 of the reference capacitor are formed, as shown in FIG24e.

[0251] In an exemplary embodiment, since the sacrificial layer is surrounded by low-resistance polysilicon, which is not corroded by the etchant, the substrate on which the second electrode of the pressure-sensing capacitor and the second electrode of the reference capacitor are formed can be immersed in the etchant for a long time, and the sacrificial layer can be completely corroded by shaking to ensure that no cavity remains.

[0252] In an exemplary embodiment, the etchant is an aqueous solution of hydrogen fluoride.

[0253] Step S16: depositing a sealing film on the substrate where the pressure-sensing capacitor cavity 23 and the reference capacitor cavity 33 are formed, and patterning the sealing film through a patterning process to form a sealing layer 30, as shown in FIG24f.

[0254] In an exemplary embodiment, the sealing layer 30 covers the release hole of the second electrode of the pressure-sensing capacitor and the release hole of the second electrode of the reference capacitor, thereby sealing the cavity of the pressure-sensing capacitor and the cavity of the reference capacitor.

[0255] In an exemplary embodiment, the sealing layer 30 includes a plurality of vias, including a first electrode exposure hole EV1, a second electrode exposure hole EV2, and a third electrode exposure hole EV3. The first electrode exposure hole EV1 exposes the second electrode of the pressure-sensing capacitor, the second electrode exposure hole EV2 exposes the second electrode of the reference capacitor, and the dielectric layer within the third electrode exposure hole EV3 is etched to expose the first electrode of the pressure-sensing capacitor and the first electrode of the reference capacitor.

[0256] In an exemplary embodiment, the sealing layer 30 may be formed of a material including at least one of silicon oxide and silicon nitride.

[0257] Step S17: depositing a second conductive film on the substrate with the sealing layer 30 formed thereon, and patterning the second conductive film through a patterning process to form a plurality of pads, as shown in FIG. 24 g .

[0258] In an exemplary embodiment, the plurality of pads include a first pad P21, a second pad P22, and a third pad P23. The first pad P21 is connected to the second electrode of the pressure-sensing capacitor through a first electrode exposure hole, the second pad P22 is connected to the second electrode of the reference capacitor through a second electrode exposure hole, and the third pad P23 is connected to the first electrode of the pressure-sensing capacitor and the first electrode of the reference capacitor through a third electrode exposure hole.

[0259] In an exemplary embodiment, the pad may be made of a metal, such as aluminum or gold, that is, the film layer where the pad is located is a metal conductive layer.

[0260] In an exemplary embodiment, the metal conductive film needs to be annealed after deposition to enable the metal conductive layer to form a good ohmic contact.

[0261] In an exemplary embodiment, an adhesive film may be deposited before depositing the second conductive film on the substrate having the sealing layer 30 formed thereon. The adhesive film and the second conductive film are patterned by a patterning process to form an adhesive layer and a pad layer on the adhesive layer.

[0262] In an exemplary embodiment, the adhesion layer may be a metal conductive layer, and the material of the adhesion layer may be a metal, such as titanium, chromium, or tantalum.

[0263] Step S18: depositing a pressure-resistant film on the substrate with the pad layer formed thereon, and patterning the pressure-resistant film through a patterning process to form a pressure-resistant layer 60 covering the substrate, as shown in FIG24h.

[0264] In an exemplary embodiment, the pressure-resistant layer 60 may include a pressure-resistant hole K and first to third via holes V11 to V13. The pressure-resistant hole K exposes the sealing layer, and its orthographic projection on the substrate at least partially overlaps with the orthographic projection of the second electrode of the pressure-sensitive capacitor on the substrate. The first via hole V11 exposes the first pad, the second via hole V12 exposes the second pad, and the third via hole V13 exposes the third pad.

[0265] The method for preparing the pressure sensor provided in FIG9 includes steps S21 to S27 .

[0266] Step 21 is the same as step S11 , step S22 is the same as step S12 , and step S23 is the same as step S13 .

[0267] Step S24: depositing a first conductive film on the substrate on which the sacrificial layer is formed, and patterning the first conductive film through a patterning process to form a second electrode 22 of the pressure-sensing capacitor and a second electrode 32 of the reference capacitor. The second electrode 22 of the pressure-sensing capacitor is provided with release holes 221 arranged in an array, and the second electrode 32 of the reference capacitor is provided with release holes 321 arranged in an array, as shown in FIG25a.

[0268] In an exemplary embodiment, the material of the first conductive film may include low-resistance polysilicon.

[0269] In an exemplary embodiment, the number of release holes 221 in the second electrode 22 of the pressure-sensing capacitor is greater than the number of release holes 321 in the second electrode 32 of the reference capacitor.

[0270] Step S25: Immerse the substrate on which the second electrode of the pressure-sensing capacitor and the second electrode of the reference capacitor are formed in an etchant, and use the etchant to corrode and release the sacrificial layer to form the cavity 23 of the pressure-sensing capacitor and the cavity 33 and support structure 34 of the reference capacitor. Dry the substrate on which the cavity 23 of the pressure-sensing capacitor and the cavity 33 of the reference capacitor are formed, as shown in FIG25b.

[0271] In an exemplary embodiment, because the sacrificial layer is surrounded by low-resistance polysilicon, which is not corroded by the etchant, the substrate on which the second electrode of the pressure-sensing capacitor and the second electrode of the reference capacitor are formed can be immersed in the etchant within the allowable release time to ensure that the cavity of the pressure-sensing capacitor is not retained. The cavity of the reference capacitor is also provided with a support structure 34. In an exemplary embodiment, the allowable release time can be obtained by calculating the release rate of the release hole array of the second electrode of the pressure-sensing capacitor and the release rate of the release hole array of the second electrode of the reference capacitor, and observing through a microscope.

[0272] Step S26: depositing a sealing film on the substrate with the cavity of the pressure-sensing capacitor, the cavity of the reference capacitor, and the support structure, and patterning the sealing film through a patterning process to form a sealing layer 30, as shown in FIG25c.

[0273] In an exemplary embodiment, the sealing layer 30 covers the release hole of the second electrode of the pressure-sensing capacitor and the release hole of the second electrode of the reference capacitor, thereby sealing the cavity of the pressure-sensing capacitor and the cavity of the reference capacitor.

[0274] In an exemplary embodiment, the sealing layer 30 includes a plurality of vias, including a first electrode exposure hole EV1, a second electrode exposure hole EV2, and a third electrode exposure hole EV3. The first electrode exposure hole EV1 exposes the second electrode of the pressure-sensing capacitor, the second electrode exposure hole EV2 exposes the second electrode of the reference capacitor, and the dielectric layer within the third electrode exposure hole EV3 is etched to expose the first electrode of the pressure-sensing capacitor and the first electrode of the reference capacitor.

[0275] In an exemplary embodiment, the sealing layer 30 may be formed of a material including at least one of silicon oxide and silicon nitride.

[0276] Step S27 , depositing a second conductive film on the substrate with the sealing layer 30 formed thereon, and patterning the second conductive film through a patterning process to form a pad layer, as shown in FIG. 25 d .

[0277] In an exemplary embodiment, the pad layer includes a first pad P21, a second pad P22, and a third pad P23. The first pad P21 is connected to the second electrode of the pressure-sensing capacitor through a first electrode exposure hole, the second pad P22 is connected to the second electrode of the reference capacitor through a second electrode exposure hole, and the third pad P23 is connected to the first electrode of the pressure-sensing capacitor and the first electrode of the reference capacitor through a third electrode exposure hole.

[0278] In an exemplary embodiment, the pad may be made of a metal, such as aluminum or gold, that is, the film layer where the pad is located is a metal conductive layer.

[0279] In an exemplary embodiment, the metal conductive film needs to be annealed after deposition to enable the metal conductive layer to form a good ohmic contact.

[0280] In an exemplary embodiment, an adhesive film may be deposited before depositing the second conductive film on the substrate having the sealing layer 30 formed thereon. The adhesive film and the second conductive film are patterned by a patterning process to form an adhesive layer and a pad layer on the adhesive layer.

[0281] In an exemplary embodiment, the adhesion layer may be a metal conductive layer, and the material of the adhesion layer may be a metal, such as titanium, chromium, or tantalum.

[0282] The method for preparing the pressure sensor provided in FIG10 includes steps S31 to S37 .

[0283] Step S31 is the same as step S11 , and step S32 is the same as step S12 .

[0284] Step S33, depositing an insulating dielectric film and a sacrificial film on the substrate on which the first electrode 21 of the pressure-sensing capacitor and the first electrode 31 of the reference capacitor are formed, coating the sacrificial film with photoresist, and forming an area on the photoresist through a patterning process, injecting ions into the area to form an insulating dielectric layer 20 and a sacrificial layer 72, and stripping the photoresist. The sacrificial layer includes a doped area and a non-doped area. After stripping the photoresist, rapid thermal annealing or furnace annealing is performed to activate the ions located in the doped area, so that the doped area is conductive, serving as the first sub-electrode 22A of the second electrode of the pressure-sensing capacitor and the first sub-electrode 32A of the second electrode of the reference capacitor, as shown in Figure 26a.

[0285] In an exemplary embodiment, the region where the non-doped region is located is a cavity region of the capacitor, and the height of the non-doped region determines the height of the cavity of the capacitor.

[0286] In an exemplary embodiment, the material forming the sacrificial thin film may include polysilicon.

[0287] In an exemplary embodiment, the insulating dielectric layer 20 may be made of silicon oxide or silicon nitride. The insulating dielectric layer 20 does not react with the etchant of the sacrificial film.

[0288] In an exemplary embodiment, the etchant for the sacrificial thin film in the non-doped region is an aqueous solution of potassium hydroxide or an aqueous solution of tetramethylammonium hydroxide.

[0289] Step S34: depositing a first conductive film on the substrate on which the sacrificial layer 72 is formed, and patterning the first conductive film through a patterning process to form a second sub-electrode 22B of the second electrode of the pressure-sensing capacitor and a second sub-electrode 32B of the second electrode of the reference capacitor. The second sub-electrode 22B of the second electrode of the pressure-sensing capacitor is provided with an array-arranged release hole 221, and the second sub-electrode 32B of the second electrode 32 of the reference capacitor is provided with an array-arranged release hole 321, as shown in FIG26b.

[0290] In an exemplary embodiment, the first conductive film may be made of a material including low-resistance polysilicon or metal. When the first conductive film is made of a metal, the metal may be platinum or chromium.

[0291] In an exemplary embodiment, the number of release holes 221 in the second sub-electrode 22B of the second electrode of the pressure-sensing capacitor is the same as the number of release holes 321 in the second sub-electrode 32B of the second electrode of the reference capacitor.

[0292] Step S35: Immerse the substrate on which the second sub-electrode of the second electrode of the pressure-sensing capacitor and the second sub-electrode of the second electrode of the reference capacitor are formed in an etchant, and use the etchant to corrode and release the non-doped area of ​​the sacrificial layer to form the cavity 23 of the pressure-sensing capacitor and the cavity 33 of the reference capacitor. Dry the substrate on which the cavity 23 of the pressure-sensing capacitor and the cavity 33 of the reference capacitor are formed, as shown in FIG26c.

[0293] In this exemplary embodiment, the etchant in the undoped region of the sacrificial layer etches the doped region of the sacrificial layer at a rate of only 1% to 2% of the rate in the undoped region of the sacrificial layer. When the etchant etches the undoped region of the sacrificial layer, the etching stops automatically when it encounters the doped region of the sacrificial layer, allowing the boundary dimensions of the cavity to be precisely controlled. Therefore, the substrate forming the second sub-electrode of the second electrode of the pressure-sensing capacitor and the second sub-electrode of the second electrode of the reference capacitor can be immersed in the etchant for a long time, and the sacrificial layer can be completely etched away by shaking, ensuring that no cavity remains.

[0294] Step S36 , depositing a sealing film on the substrate where the pressure-sensing capacitor cavity 23 and the reference capacitor cavity 33 are formed, and patterning the sealing film through a patterning process to form a sealing layer 30 , as shown in FIG26 d .

[0295] In an exemplary embodiment, the sealing layer 30 covers the release hole of the second electrode of the pressure-sensing capacitor and the release hole of the second electrode of the reference capacitor, thereby sealing the cavity of the pressure-sensing capacitor and the cavity of the reference capacitor.

[0296] In an exemplary embodiment, the sealing layer 30 may be formed of a material including at least one of silicon oxide and silicon nitride.

[0297] Step S37 : depositing a pressure-resistant film on the substrate with the sealing layer formed thereon, and patterning the pressure-resistant film through a patterning process to form a pressure-resistant layer 60 covering the substrate, as shown in FIG26 e .

[0298] In an exemplary embodiment, the pressure-resistant layer 60 includes a pressure-resistant hole K. The pressure-resistant hole K exposes the sealing layer, and an orthographic projection of the pressure-resistant hole K on the substrate at least partially overlaps with an orthographic projection of the second electrode of the pressure-sensitive capacitor on the substrate.

[0299] The method for preparing the pressure sensor provided in FIG11 includes steps S41 to S46 .

[0300] Step S41 is the same as step S31 , step S42 is the same as step S32 , and step S43 is the same as step S33 .

[0301] Step S44: depositing a first conductive film on the substrate on which the sacrificial layer is formed, and patterning the first conductive film through a patterning process to form a second sub-electrode 22B of the second electrode of the pressure-sensing capacitor and a second sub-electrode 32B of the second electrode of the reference capacitor. The second sub-electrode 22B of the second electrode of the pressure-sensing capacitor is provided with release holes 221 arranged in an array, and the second sub-electrode 32B of the second electrode of the reference capacitor is provided with release holes 321 arranged in an array, as shown in FIG27a.

[0302] In an exemplary embodiment, the material of the first conductive film may include low-resistance polysilicon.

[0303] In an exemplary embodiment, the number of release holes 221 in the second sub-electrode 22B of the second electrode of the pressure-sensing capacitor is greater than the number of release holes 321 in the second sub-electrode 32B of the second electrode of the reference capacitor.

[0304] Step S45: Immerse the second sub-electrode substrate of the second electrode of the pressure-sensing capacitor and the second sub-electrode substrate of the second electrode of the reference capacitor in an etchant, and use the etchant to corrode and release the non-doped area of ​​the sacrificial layer to form the cavity 23 of the pressure-sensing capacitor and the cavity 33 and support structure 34 of the reference capacitor. Dry the substrate on which the cavity 23 of the pressure-sensing capacitor and the cavity 33 of the reference capacitor are formed, as shown in FIG27b.

[0305] In an exemplary embodiment, the substrate on which the second sub-electrode of the second electrode of the pressure-sensing capacitor and the second sub-electrode of the second electrode of the reference capacitor are formed is immersed in an etchant within an allowable release time to ensure that the cavity of the pressure-sensing capacitor is not retained. The cavity of the reference capacitor is also provided with a support structure 34. In an exemplary embodiment, the allowable release time can be obtained by calculating the release rate of the release hole array of the second electrode of the pressure-sensing capacitor and the release rate of the release hole array of the second electrode of the reference capacitor, as well as by fiber observation.

[0306] Step S46: depositing a sealing film on the substrate with the cavity of the pressure-sensing capacitor and the cavity of the reference capacitor and the supporting structure, and patterning the sealing film through a patterning process to form a sealing layer 30, as shown in FIG27c.

[0307] In an exemplary embodiment, the sealing layer 30 covers the release hole of the second electrode of the pressure-sensing capacitor and the release hole of the second electrode of the reference capacitor, thereby sealing the cavity of the pressure-sensing capacitor and the cavity of the reference capacitor.

[0308] In an exemplary embodiment, the deposition process may include a plasma enhanced chemical vapor deposition process, a low temperature chemical vapor deposition process, or a physical vapor deposition process, which is not limited in the present disclosure.

[0309] The embodiment of the present disclosure further provides a pressure sensing assembly, comprising: pressure sensors arranged in an array.

[0310] The pressure sensor is the pressure sensor provided in any of the aforementioned embodiments, and the present disclosure does not impose any limitation on this.

[0311] The present disclosure also provides a method for manufacturing a pressure sensor, which is configured to manufacture the pressure sensor provided by any of the aforementioned embodiments. The method for manufacturing the pressure sensor may include:

[0312] Step S100: forming a first electrode of at least one capacitor.

[0313] Step S200: forming a second electrode of at least one capacitor.

[0314] Step S300: forming a cavity between a first electrode and a second electrode of at least one capacitor.

[0315] In an exemplary embodiment, step S100 may include:

[0316] Step S110: providing a substrate.

[0317] Step S120 : implanting ions into a partial area of ​​the substrate to form at least one first electrode of a capacitor.

[0318] In an exemplary embodiment, before step S200, the method for preparing a pressure sensor may further include:

[0319] Step S400: forming an insulating dielectric layer on a first electrode of at least one capacitor.

[0320] In an exemplary embodiment, after step S300, the method for preparing a pressure sensor may further include:

[0321] Step S500: forming a sealing layer on the second electrode of at least one capacitor by a patterning process.

[0322] In an exemplary embodiment, step S200 may include:

[0323] Step S210 : forming a sacrificial layer on the insulating dielectric layer through a patterning process.

[0324] Step S220 : forming a second electrode of at least one capacitor on the sacrificial layer by a patterning process, wherein a release hole array is provided on the second electrode of the at least one capacitor.

[0325] In an exemplary embodiment, step S300 may include: etching the sacrificial layer through the release hole array using an etchant to form a cavity.

[0326] In an exemplary embodiment, the etchant may include: an aqueous solution of hydrofluoric acid;

[0327] In an exemplary embodiment, step S200 may include:

[0328] Step S230 : forming a sacrificial layer on the insulating dielectric layer through a patterning process.

[0329] Step S240 : implanting ions into a partial region of the sacrificial layer to form a first sub-electrode of a second electrode of at least one capacitor.

[0330] In an exemplary embodiment, the ions include boron, phosphorus, and arsenic, and the implantation dose is in the range of 3E15 per square centimeter to 1E16 per square centimeter.

[0331] Step S250: forming a second sub-electrode of the second electrode on the ion-implanted sacrificial layer by a patterning process, wherein a release hole array is provided on the second sub-electrode, and the orthographic projection of the release hole array on the substrate partially overlaps with the orthographic projection of the non-ion-implanted sacrificial layer on the substrate.

[0332] In an exemplary embodiment, step S300 may include:

[0333] Step S330: using an etchant to etch the sacrificial layer into which ions are not implanted through the release hole array to form a cavity.

[0334] In an exemplary embodiment, the etchant may include an aqueous solution of tetramethylammonium hydroxide or an aqueous solution of potassium hydroxide.

[0335] In an exemplary embodiment, after step S300, the method for preparing a pressure sensor may further include:

[0336] Step S600: forming a plurality of pads on the sealing layer through a patterning process.

[0337] In an exemplary embodiment, after step S300, the method for preparing a pressure sensor may further include:

[0338] Step S700: forming an adhesion layer and a plurality of pads on the sealing layer by a patterning process in sequence.

[0339] In an exemplary embodiment, when the pressure sensor includes at least one pressure-sensing capacitor and at least one reference capacitor, after step S600 or step S700, the method for preparing the pressure sensor further includes forming a pressure-resistant layer on the plurality of pads by a patterning process.

[0340] In an exemplary embodiment, the pressure-resistant layer is provided with at least one pressure-sensitive hole, and the at least one pressure-sensitive hole corresponds one-to-one with at least one pressure-sensitive capacitor, and the orthographic projection of the pressure-sensitive hole on the substrate at least partially overlaps with the orthographic projection of the second electrode of the corresponding pressure-sensitive capacitor on the substrate.

[0341] In an exemplary embodiment, when the pressure sensor includes: at least one pressure-sensitive capacitor and at least one reference capacitor, after step S500, the method for preparing the pressure sensor further includes: forming a pressure-resistant layer on the sealing layer through a composition process, the pressure-resistant layer having at least one pressure-sensitive hole, the at least one pressure-sensitive hole corresponding one-to-one to the at least one pressure-sensitive capacitor, and the orthographic projection of the pressure-sensitive hole on the substrate at least partially overlaps with the orthographic projection of the second electrode of the corresponding pressure-sensitive capacitor on the substrate.

[0342] In an exemplary embodiment, when the pressure sensor includes: at least one pressure-sensing capacitor and at least one reference capacitor, step S300 may include: forming a cavity between a first electrode and a second electrode of the at least one pressure-sensing capacitor, and forming a cavity and a support structure between a first electrode and a second electrode of the at least one reference capacitor.

[0343] At least one capacitor in the pressure sensor has only one cavity, and the number of release holes on a single cavity is relatively large. The sealing success rate of a single cavity can only be achieved when the sealing pass rate of the sealing layer meets certain requirements, which makes the manufacturing process of the pressure sensor more difficult. In addition, when the cavity body is damaged, the external air pressure will affect the capacitance value of the pressure sensor, reducing the reliability of the pressure sensor.

[0344] Figure 28 is a schematic diagram of the structure of a pressure sensor provided in another embodiment of the present disclosure. As shown in Figure 28, the pressure sensor provided in another embodiment of the present disclosure may include: a substrate 10 and at least one capacitor disposed on substrate 10. The at least one capacitor includes: a first electrode 101 and a second electrode 102 disposed opposite each other and insulated from each other, with the second electrode 102 located on a side of the first electrode 101 away from the substrate 10, and a plurality of cavities 103 arranged in an array disposed between the first electrode 101 and the second electrode 102.

[0345] In an exemplary embodiment, the orthographic projection of the first electrode 101 of at least one capacitor on the substrate 10 at least partially overlaps with the orthographic projection of the second electrode 102 on the substrate 10, the orthographic projection of the overlapping area of ​​the first electrode 101 and the second electrode 102 on the substrate 10 at least partially overlaps with the orthographic projection of the multiple cavities 103 on the substrate 10, and the second electrode 102 is at least partially enclosed on the surface of the multiple cavities 103 away from the first electrode 101.

[0346] The present disclosure divides a cavity in at least one capacitor to form a plurality of cavities.

[0347] In an exemplary embodiment, the number of cavities 103 may be any value greater than two, and may be ten.

[0348] In an exemplary embodiment, the cross-section of the at least one cavity 103 along a direction parallel to the substrate may be rectangular or square, which is not limited in the present disclosure.

[0349] In an exemplary embodiment, the second electrode 102 of the at least one capacitor may be disposed around the plurality of cavities 103 to form sidewalls.

[0350] In an exemplary embodiment, as shown in FIG28 , the second electrode 102 is provided with a plurality of release hole arrays, at least one of which includes arrayed release holes 104. The orthographic projection of the at least one release hole array on the substrate is within the range of the orthographic projection of the at least one cavity on the substrate.

[0351] In an exemplary embodiment, the shape of the top view of the second electrode may be a square, a rectangle, a circle, or a pattern that meets design requirements, and the present disclosure does not impose any limitation on this.

[0352] In an exemplary embodiment, the number of release holes in the release hole array and the distance between the release holes can control the speed of cavity formation, which is specifically determined according to the process of the pressure sensor and is not limited in this disclosure.

[0353] In an exemplary embodiment, for example, if at least one capacitor includes 400 release holes, and at least one capacitor includes 10 cavities, then at least one cavity may have 40 corresponding release holes. For example, the number of release holes corresponding to different cavities may be the same or different, and this disclosure is not limited thereto.

[0354] The present disclosure provides multiple cavities in at least one capacitor, thereby reducing the impact of external air pressure on the capacitance value of the pressure sensor caused by damage to some cavities, thereby improving the reliability of the pressure sensor. In addition, the area of ​​a single cavity among the multiple cavities is smaller, so that the number of release holes provided on a single cavity is smaller, which easily improves the sealing success rate of a single cavity and reduces the difficulty of manufacturing the pressure sensor.

[0355] In an exemplary embodiment, the at least one capacitor includes at least one pressure-sensing capacitor and at least one reference capacitor.

[0356] As shown in Figure 28, the pressure sensor further includes: a plurality of pads, a sealing layer 30, and a pressure-resistant layer 60. The plurality of pads in Figure 28 include: a pad P1 connected to a first electrode of at least one capacitor and a pad P2 connected to a second electrode of at least one capacitor.

[0357] In an exemplary embodiment, as shown in FIG. 28 , the sealing layer 30 is disposed around the periphery of the plurality of cavities 103 , and the sealing layer 30 covers a surface of the second electrode 102 of at least one capacitor away from the substrate 10 .

[0358] In an exemplary embodiment, as shown in FIG. 28 , a plurality of pads are located on a side of the sealing layer 30 away from the substrate, and the plurality of pads are electrically connected to a first electrode and a second electrode of at least one capacitor, respectively.

[0359] In an exemplary embodiment, as shown in FIG28 , the pressure-resistant layer 60 is located on a side of the plurality of pads away from the substrate and is provided with at least one pressure-sensitive hole exposing the sealing layer 30. The at least one pressure-sensitive hole corresponds one-to-one with at least one pressure-sensitive capacitor. The orthographic projection of the at least one pressure-sensitive hole on the substrate at least partially overlaps with the orthographic projection of the second electrode of the corresponding pressure-sensitive capacitor on the substrate. The orthographic projection of at least one reference capacitor on the substrate is within the orthographic projection of the pressure-resistant layer 60 on the substrate. The capacitors shown in FIG28 are illustrated using the reference capacitor as an example.

[0360] Figure 29 is a top view of the structure of at least one capacitor. As shown in Figure 29, at least one of the first and second electrodes 102 of the at least one capacitor has a length W1 along a first direction D1 that is shorter than a length W2 along a second direction D2. The first direction D1 intersects the second direction D2. For example, the first direction D1 may be perpendicular to the second direction D2.

[0361] In an exemplary embodiment, Figure 30 is a connection diagram 1 of a pressure sensor including multiple capacitors, Figure 31 is a top view of the pressure sensor corresponding to Figure 30, and Figure 32 is a cross-sectional view of the pressure sensor corresponding to Figure 30. As shown in Figures 30 to 32, the at least one capacitor includes: two pressure-sensing capacitors and two reference capacitors. The two pressure-sensing capacitors are a first pressure-sensing capacitor FC1 and a second pressure-sensing capacitor FC2, and the two reference capacitors are a first reference capacitor RC1 and a second reference capacitor RC2. The multiple pads include: a first pad P51, a second pad P52, a third pad P53, and a fourth pad P54.

[0362] In an exemplary embodiment, as shown in Figures 30 to 32, the first pad P51 is electrically connected to the second electrode 42 of the first pressure-sensing capacitor FC1 and the second electrode 52 of the first reference capacitor RC1, respectively, the second pad P52 is electrically connected to the first electrode 61 of the second pressure-sensing capacitor FC2 and the first electrode 51 of the first reference capacitor RC1, respectively, the third pad P53 is electrically connected to the second electrode 62 of the second pressure-sensing capacitor FC2 and the second electrode 72 of the second reference capacitor RC2, respectively, and the fourth pad P54 is electrically connected to the first electrode 41 of the first pressure-sensing capacitor FC1 and the first electrode 71 of the second reference capacitor RC2, respectively.

[0363] In an exemplary embodiment, a DC voltage signal or an AC voltage signal is input to the first pad P51 and the third pad P53, and a pressure-sensitive capacitor signal is detected at the second pad P52 and the fourth pad P54. The signal strength of the pressure-sensitive capacitor signal detected by the pressure sensor including two pressure-sensitive capacitors and two reference capacitors is twice the signal strength of the pressure-sensitive capacitor signal detected by the pressure sensor including one pressure-sensitive capacitor and one reference capacitor. That is, the detection sensitivity of the pressure sensor including two pressure-sensitive capacitors and two reference capacitors is significantly higher than the detection sensitivity of the pressure sensor including one pressure-sensitive capacitor and one reference capacitor. The pressure sensor including two pressure-sensitive capacitors and two reference capacitors has better measurement accuracy and product stability. Moreover, because multiple capacitors are connected to only four interfaces, the difficulty of signal processing is further reduced.

[0364] In an exemplary embodiment, as shown in FIG. 31 and FIG. 32 , the first pressure-sensing capacitor FC1 , the second reference capacitor RC2 , the first reference capacitor RC1 , and the second pressure-sensing capacitor FC2 are arranged along a first direction D1 .

[0365] In an exemplary embodiment, as shown in Figure 32, the pressure-resistant layer 60 includes: a first pressure-resistant structure 61, a second pressure-resistant structure 62, a third pressure-resistant structure 63 and a fourth pressure-resistant structure 64 arranged at intervals from each other, and there is no overlapping area in the orthographic projections of at least two structures among the first pressure-resistant structure 61, the second pressure-resistant structure 62, the third pressure-resistant structure 63 and the fourth pressure-resistant structure 64 on the substrate 10, the orthographic projection of the first pressure-resistant structure 61 on the substrate 10 at least partially overlaps with the orthographic projection of the first pressure-sensitive capacitor FC1 on the substrate 10, the orthographic projection of the second pressure-resistant structure 62 on the substrate 10 at least partially overlaps with the orthographic projection of the second pressure-sensitive capacitor FC2 on the substrate 10, the orthographic projection of the third pressure-resistant structure 63 on the substrate 10 at least partially overlaps with the orthographic projection of the first reference capacitor RC1 on the substrate 10, and the orthographic projection of the fourth pressure-resistant structure 64 on the substrate 10 at least partially overlaps with the orthographic projection of the second reference capacitor RC2 on the substrate 10.

[0366] In an exemplary embodiment, as shown in FIG. 32 , the pressure-resistant layer 60 may further include a plurality of pad holes for a plurality of pads.

[0367] In an exemplary embodiment, the first pressure-resistant structure 61 includes a first pressure-sensing hole H1 corresponding to the first pressure-sensing capacitor, and a pad hole exposing the first pad P51 and the fourth pad P54 .

[0368] In an exemplary embodiment, the second pressure-resistant structure 62 includes a second pressure-sensing hole H2 corresponding to the second pressure-sensing capacitor, and a pad hole exposing the second pad P52 and the third pad P53 .

[0369] In an exemplary embodiment, the third pressure-resistant structure 63 includes a pad hole exposing the first pad P51 and the second pad P52 .

[0370] In an exemplary embodiment, the fourth pressure-resistant structure 64 includes: and a pad hole exposing the third pad P53 and the fourth pad P54 .

[0371] In an exemplary embodiment, as shown in Figure 32, the first pressure-resistant structure 61 and the second pressure-resistant structure 62 are at least partially symmetrically arranged relative to the virtual straight line O extending in a direction perpendicular to the substrate 10, and the third pressure-resistant structure 63 and the fourth pressure-resistant structure 64 are at least partially symmetrically arranged relative to the virtual straight line O extending in a direction perpendicular to the substrate 10.

[0372] In the pressure sensor provided by the present disclosure, since the first pressure-resistant structure and the second pressure-resistant structure are at least partially symmetrically arranged relative to a virtual straight line extending in a direction perpendicular to the substrate, and the third pressure-resistant structure and the fourth pressure-resistant structure are at least partially symmetrically arranged relative to a virtual straight line extending in a direction perpendicular to the substrate, the tensile stress at various locations of the pressure-sensitive layer is relatively balanced, which can improve the performance of the pressure sensor.

[0373] In an exemplary embodiment, Figure 33 is a second connection diagram of a pressure sensor including multiple capacitors, Figure 34 is a top view of the pressure sensor corresponding to Figure 33, and Figure 35 is a cross-sectional view of the pressure sensor corresponding to Figure 33. As shown in Figures 33 to 35, the at least one capacitor includes: two pressure-sensing capacitors and two reference capacitors, the two pressure-sensing capacitors being a first pressure-sensing capacitor FC1 and a second pressure-sensing capacitor FC2, and the two reference capacitors being a first reference capacitor RC1 and a second reference capacitor RC2. The multiple pads include: a first pad P61, a second pad P62, a third pad P63, and a fourth pad P64.

[0374] In an exemplary embodiment, as shown in Figures 33 to 35, the first pad P61 is electrically connected to the second electrode 62 of the second pressure-sensing capacitor FC2 and the second electrode 72 of the second reference capacitor RC2, respectively, the second pad P62 is electrically connected to the first electrode 61 of the second pressure-sensing capacitor FC2 and the first electrode 51 of the first reference capacitor RC1, respectively, the third pad P63 is electrically connected to the second electrode 42 of the first pressure-sensing capacitor FC1 and the second electrode 52 of the first reference capacitor RC1, respectively, and the fourth pad P64 is electrically connected to the first electrode 41 of the first pressure-sensing capacitor FC1 and the first electrode 71 of the second reference capacitor RC2, respectively.

[0375] In an exemplary embodiment, a DC voltage signal or an AC voltage signal is input to the first pad P61 and the third pad P63, and a pressure-sensitive capacitor signal is detected at the second pad P62 and the fourth pad P64. The signal strength of the pressure-sensitive capacitor signal detected by the pressure sensor including two pressure-sensitive capacitors and two reference capacitors is twice the signal strength of the pressure-sensitive capacitor signal detected by the pressure sensor including one pressure-sensitive capacitor and one reference capacitor. That is, the detection sensitivity of the pressure sensor including two pressure-sensitive capacitors and two reference capacitors is significantly higher than the detection sensitivity of the pressure sensor including one pressure-sensitive capacitor and one reference capacitor. The pressure sensor including two pressure-sensitive capacitors and two reference capacitors has better measurement accuracy and product stability. Moreover, since multiple capacitors are connected to only four interfaces, the difficulty of signal processing is further reduced.

[0376] In an exemplary embodiment, as shown in FIG. 34 and FIG. 35 , the first pressure-sensing capacitor FC1 , the second reference capacitor RC2 , the second pressure-sensing capacitor FC2 , and the first reference capacitor RC1 are arranged along a first direction D1 .

[0377] In an exemplary embodiment, as shown in Figure 35, the pressure-resistant layer includes: a first pressure-resistant structure 61, a second pressure-resistant structure 62, a third pressure-resistant structure 63 and a fourth pressure-resistant structure 64 arranged at intervals from each other, and there is no overlapping area in the orthographic projections of at least two structures among the first pressure-resistant structure 61, the second pressure-resistant structure 62, the third pressure-resistant structure 63 and the fourth pressure-resistant structure 64 on the substrate, the orthographic projection of the first pressure-resistant structure 61 on the substrate at least partially overlaps with the orthographic projection of the first pressure-sensitive capacitor FC1 on the substrate, the orthographic projection of the second pressure-resistant structure 62 on the substrate at least partially overlaps with the orthographic projection of the second pressure-sensitive capacitor FC2 on the substrate, the orthographic projection of the third pressure-resistant structure 63 on the substrate at least partially overlaps with the orthographic projection of the first reference capacitor RC1 on the substrate, and the orthographic projection of the fourth pressure-resistant structure 64 on the substrate at least partially overlaps with the orthographic projection of the second reference capacitor RC2 on the substrate.

[0378] In an exemplary embodiment, as shown in FIG. 35 , the pressure-resistant layer 60 may further include a plurality of pad holes for a plurality of pads.

[0379] In an exemplary embodiment, the first pressure-resistant structure 61 includes a first pressure-sensing hole H1 corresponding to the first pressure-sensing capacitor, and a pad hole exposing the third pad P63 and the fourth pad P64 .

[0380] In an exemplary embodiment, the second pressure-resistant structure 62 includes a second pressure-sensing hole H2 corresponding to the second pressure-sensing capacitor, and a pad hole exposing the first pad P61 and the second pad P62 .

[0381] In an exemplary embodiment, the third pressure-resistant structure 63 includes pad holes exposing the second pad P62 and the third pad P63 .

[0382] In an exemplary embodiment, the fourth pressure-resistant structure 64 includes: and a pad hole exposing the first pad P61 and the fourth pad P64 .

[0383] In an exemplary embodiment, the first and second compression resistant structures 61 and 62 are at least partially identical, and the third and fourth compression resistant structures 63 and 64 are at least partially identical.

[0384] In an exemplary embodiment, at least one pressure-sensitive capacitor in the pressure sensor provided by the present disclosure is arranged between two reference capacitors, and the third pressure-resistant structure and the fourth pressure-resistant structure are at least partially identical. Therefore, the tensile stress exerted on the pressure-resistant structure corresponding to the pressure-sensitive capacitor due to temperature changes or stress is relatively balanced.

[0385] In an exemplary embodiment, Figure 36 is a top view structural diagram of at least one capacitor, and Figure 37 is a top view structural diagram of at least one capacitor. As shown in Figures 29, 36 and 37, the multiple cavities 103 in at least one capacitor are arranged along the second direction D2, or arranged in a matrix along the first direction D1 and the second direction D2. Figures 29 and 36 are illustrated by taking the multiple cavities 103 in at least one capacitor arranged along the second direction D2 as an example, and Figure 37 is illustrated by taking the multiple cavities 103 in at least one capacitor arranged in a matrix along the first direction D1 and the second direction D2 as an example. Figures 29, 36 and 37 are illustrated by taking four capacitors as an example. Figures 29 and 37 are illustrated by taking the shape of at least one cavity 103 parallel to the substrate direction as a rectangle as an example, and Figure 36 is illustrated by taking the shape of at least one cavity 103 parallel to the substrate direction as a square as an example. FIG29 illustrates an example in which the length of at least one cavity 103 along the first direction D1 is greater than the length along the second direction D2, and FIG30 illustrates an example in which the length of at least one cavity 103 along the first direction D1 is less than the length along the second direction D2.

[0386] In an exemplary embodiment, the lengths of the multiple cavities of at least one capacitor in the pressure sensor along the second direction may be the same, or the lengths of the multiple cavities along the second direction may be different. Figures 29, 36 and 37 are illustrated by taking the example of the multiple cavities of at least one capacitor having the same length along the second direction.

[0387] FIG38 is a top view of at least one capacitor, FIG39 is a cross-sectional view of FIG38 along the AA direction, FIG40 is a cross-sectional view of FIG38 along the BB direction, and FIG41 is a cross-sectional view of FIG38 along the CC direction. FIG38 is illustrated by taking four capacitors as an example. The lengths of the multiple cavities along the second direction D2 in the first capacitor and the fourth capacitor in FIG38 are the same, and the lengths of at least two of the multiple cavities along the second direction D2 in the second capacitor and the third capacitor in FIG38 are different. As shown in FIG38

[0388] In an exemplary embodiment, as shown in FIG38 and FIG39 , the number of cavities arranged along the second direction in at least one capacitor is N. In the first capacitor and the fourth capacitor, at least two of the N cavities 103 have the same length along the second direction D2. For example, the length L1 of the first cavity 103 along the second direction D2 is equal to the length L1 of the Nth cavity 103 along the second direction D2. N At least two of the cavities 103 have the same length along the second direction D2. For example, taking the length of the second electrode of at least one capacitor along the first direction as 123 microns and the length along the second direction as N=10 as an example, the length L1 of the first cavity 103 along the second direction D2 to the length L of the tenth cavity 103 along the second direction D2 are equal. 10It can be 54 microns.

[0389] In an exemplary embodiment, as shown in FIG38 and FIG40, the number of cavities arranged along the second direction D2 in at least one capacitor is N. In the second capacitor, the length K of the nth cavity 103 along the second direction D2 is n The length K of the n-1th cavity 103 along the second direction D2 n-1 The difference is 0 or the threshold difference, that is, the lengths of the plurality of cavities in the at least one capacitor along the second direction D2 gradually increase in equal steps. For example, taking the length of the second electrode of the at least one capacitor along the first direction as 123 microns, the length along the second direction as 624 microns, N=10, and the threshold difference as 1 micron as an example, the length K1 of the first cavity 103 along the second direction D2 to the length K of the tenth cavity 103 along the second direction D2 are 10 They are 50 microns, 51 microns, 52 microns, 53 microns, 54 microns, 54 microns, 55 microns, 56 microns, 57 microns, and 58 microns, respectively.

[0390] In an exemplary embodiment, as shown in FIG38 and FIG41, the number of cavities arranged along the second direction D2 in at least one capacitor is N. In the third capacitor, the length R of the n-1th cavity 103 along the second direction D2 is n-1 The length R of the n-th cavity 103 along the second direction D2 n The difference is 0 or the threshold difference, that is, the lengths of the plurality of cavities in the at least one capacitor along the second direction D2 gradually decrease in equal steps. For example, taking the length of the second electrode of the at least one capacitor along the first direction as 123 microns and the length along the second direction as 624 microns, N=10, and the threshold difference as 1 micron as an example, the length R of the tenth cavity 103 along the second direction D2 is 10 The lengths R1 to the first cavity 103 along the second direction D2 are 50 micrometers, 51 micrometers, 52 micrometers, 53 micrometers, 54 micrometers, 54 micrometers, 55 micrometers, 56 micrometers, 57 micrometers, and 58 micrometers, respectively.

[0391] In an exemplary embodiment, the threshold difference refers to a difference in lengths of at least two adjacent cavities along the second direction in at least one capacitor that can eliminate or alleviate instability of pressure values ​​of the pressure sensor caused by oscillation of multiple cavities.

[0392] In an exemplary embodiment, the threshold difference may also be 0.5 micrometers, 0.6 micrometers, 0.7 micrometers, 0.8 micrometers, 0.9 micrometers, 1.1 micrometers, 1.2 micrometers, or 1.3 micrometers, which is not limited in the present disclosure.

[0393] In an exemplary embodiment, the number of cavities 103 arranged along the second direction D2 in at least one capacitor is N, and the ratio of the length of the nth cavity 103 along the second direction D2 to the length of the n-1th cavity 103 along the second direction D2 is 1 or a threshold ratio, that is, the lengths of the multiple cavities in the at least one capacitor along the second direction D2 gradually increase in equal proportion.

[0394] In an exemplary embodiment, the number of cavities 103 arranged along the second direction D2 in at least one capacitor is N, and the ratio of the length of the n-1th cavity 103 along the second direction D2 to the length of the nth cavity 103 along the second direction D2 is 1 or a threshold ratio, that is, the lengths of the multiple cavities in the at least one capacitor along the second direction D2 gradually decrease in equal proportion.

[0395] In an exemplary embodiment, the threshold ratio may be 1.05, which is not limited in the present disclosure.

[0396] In an exemplary embodiment, capacitors having the same length along the second direction D2 of at least two cavities 103 among the N cavities may be reference capacitors.

[0397] In an exemplary embodiment, the capacitors having different lengths of at least two cavities 103 in the N cavities along the second direction D2 may be pressure-sensitive capacitors.

[0398] In an exemplary embodiment, the use of a plurality of cavities in at least one capacitor with a gradual length change along the second direction can quickly deplete the forced vibration of the pressure-resistant layer caused by the sampling of the high-frequency AC square wave signal of the capacitor bridge. Assume that when a 100kHz square wave excitation signal is applied to both ends of a Wheatstone bridge comprising two pressure-sensitive capacitors and two reference capacitors, the pressure-resistant layer will oscillate at the steep rising edge of the signal. When the lengths of the plurality of cavities along the second direction are consistent, the oscillation frequency and amplitude of all cavities are the same. The superposition of the amplitudes of the plurality of cavities will cause long-term oscillation of the capacitance value, which seriously affects the signal reading accuracy. When the lengths of the plurality of cavities along the second direction are gradually changed, the oscillation frequencies and amplitudes of different cavities are slightly different. After the oscillations of the plurality of cavities are superimposed, the amplitudes can be subtracted, which can quickly weaken the capacitance value oscillation to basically no oscillation, so that the capacitance value tends to be stable, greatly improving the reading accuracy of the pressure sensor.

[0399] In an exemplary embodiment, Figure 42 is another schematic diagram of the structure of a pressure sensor provided in an exemplary embodiment. As shown in Figure 42, the pressure sensor provided in this embodiment of the present disclosure further includes a temperature measuring device 200. Temperature measuring device 200 is formed within substrate 10 and located on the surface of substrate 10. The temperature measuring device is configured to detect the temperature of the capacitor.

[0400] The pressure sensor disclosed in the present invention can greatly improve the output accuracy of the pressure sensor by reading the pressure value and temperature value and performing least squares fitting.

[0401] In an exemplary embodiment, the substrate is a P-type single crystal silicon substrate, that is, the substrate can serve as a P-type semiconductor layer.

[0402] In an exemplary embodiment, Figure 43 is a top view corresponding to Figure 42. As shown in Figures 42 and 43, the temperature measurement device 200 includes an N-type semiconductor layer 201, an emitter 202, a base 204, and a collector 203 formed in a substrate 10.

[0403] In example embodiments, the N-type semiconductor layer may include phosphorus ions, and a sheet resistance of the N-type semiconductor layer may be in a range of 600 ohms to 1200 ohms.

[0404] In an exemplary embodiment, as shown in FIG. 42 and FIG. 43 , the orthographic projections of the base 204 and the emitter 202 on the substrate 10 are located within the range of the orthographic projection of the N-type semiconductor layer 201 on the substrate 10 .

[0405] In an exemplary embodiment, as shown in FIG. 42 and FIG. 43 , the emitter 202 has a square structure.

[0406] In an exemplary embodiment, as shown in FIG. 42 and FIG. 43 , the base 204 is a ring-shaped structure and surrounds the emitter 202 .

[0407] In an exemplary embodiment, as shown in FIG. 42 and FIG. 43 , the collector electrode 203 is a ring structure, and the orthographic projection of the collector electrode 203 on the substrate 10 surrounds the orthographic projection of the N-type semiconductor layer 201 on the substrate 10 .

[0408] In an exemplary embodiment, the emitter 202 is located at the center of the N-type semiconductor layer 201 .

[0409] In an exemplary embodiment, the emitter 202 and the collector 204 are formed by the same process. The sheet resistance of at least one of the emitter 202 and the collector 204 is less than or equal to 30 ohms.

[0410] In an exemplary embodiment, at least one of the emitter 202 and the collector 204 may include boron ions.

[0411] In an exemplary embodiment, the base 204 may include phosphorus ions.

[0412] In an exemplary embodiment, the temperature measurement device in the present disclosure is a PN junction.

[0413] In an exemplary embodiment, FIG44 is another schematic structural diagram of a pressure sensor provided in an exemplary embodiment, and FIG45 is a top view corresponding to FIG44 . FIG44 and FIG45 illustrate an example in which the pressure sensor includes four capacitors, namely a first pressure-sensing capacitor FC1, a second pressure-sensing capacitor FC2, a first reference capacitor RC1, and a second reference capacitor RC2, with the first pressure-sensing capacitor FC1, the second reference capacitor RC2, the first reference capacitor RC1, and the second pressure-sensing capacitor FC2 arranged sequentially along a first direction D1. In this case, the multiple pads may include first pads P51 to fourth pads P54. Alternatively, the first pressure-sensing capacitor FC1, the second reference capacitor RC2, the second pressure-sensing capacitor FC2, and the first reference capacitor RC1 may be arranged sequentially along the first direction D1. In this case, the multiple pads may include first pads P61 to fourth pads P64. As shown in FIG44 and FIG45 , the multiple pads also include fifth pads P5 and sixth pads P6.

[0414] As shown in FIG. 44 , the fifth pad P5 is electrically connected to the base 204 and the collector 203 of the temperature measuring device, and the sixth pad P6 is electrically connected to the emitter 202 of the temperature measuring device.

[0415] In an exemplary embodiment, as shown in FIG. 45 , the fifth pad P5 includes a first pad main portion P501 and a first pad connecting portion P502 , and the first pad connecting portion P502 is electrically connected to the first pad main portion P501 .

[0416] In an exemplary embodiment, as shown in FIG. 45 , the first pad connection portion P502 includes a recessed portion 520 , and the first pad connection portion P502 is electrically connected to the base 204 and the collector 203 of the temperature measurement device.

[0417] In an exemplary embodiment, as shown in FIG. 45 , the first pad-connected portion P502 may have a “C” shape.

[0418] 45 , the sixth pad P6 includes a second pad main portion P601 and a second pad connecting portion P602. The second pad connecting portion P602 is electrically connected to the second pad main portion P601.

[0419] In an exemplary embodiment, as shown in FIG. 45 , the second pad-connection portion P602 includes a protrusion 620 , the second pad-connection portion P602 is electrically connected to the emitter 202 of the temperature measurement device, and the recess 520 surrounds the protrusion 620 .

[0420] In an exemplary embodiment, the fifth pad P5 and the sixth pad P6 constitute the positive / negative pole of the PN junction, and a constant current signal is applied to the fifth pad P5 or the sixth pad P6, where the current value of the current signal can be, for example, 0.1 microamperes, 1 microampere, or 10 microamperes, so that a voltage of several hundred millivolts can be formed between the fifth pad P5 and the sixth pad P6. The voltage between the fifth pad P5 and the sixth pad P6 decreases as the temperature increases, and the linearity is very high. Depending on the process, the sensitivity of the temperature measuring device is approximately 1.8 mV / °C to 2.3 mV / °C.

[0421] In an exemplary embodiment, FIG46 is another schematic structural diagram of a pressure sensor provided in an exemplary embodiment, FIG47A is a top view corresponding to FIG46 , and FIG47B is a top view corresponding to FIG46 . FIG46 , FIG47A , and FIG47B illustrate an example in which the pressure sensor includes four capacitors, namely a first pressure-sensing capacitor FC1, a second pressure-sensing capacitor FC2, a first reference capacitor RC1, and a second reference capacitor RC2, with the first pressure-sensing capacitor FC1, the second reference capacitor RC2, the first reference capacitor RC1, and the second pressure-sensing capacitor FC2 arranged sequentially along a first direction D1. In this case, the multiple pads may include first pads P51 to fourth pads P54. Alternatively, the first pressure-sensing capacitor FC1, the second reference capacitor RC2, the second pressure-sensing capacitor FC2, and the first reference capacitor RC1 may be arranged sequentially along the first direction D1. In this case, the multiple pads may include first pads P61 to fourth pads P64. The pressure sensor also includes a shielding wire 80. The shielding line 80 is electrically connected to the fifth pad P5 and at least partially surrounds at least one capacitor.

[0422] In an exemplary embodiment, as shown in FIG46 , the shielding line includes: a first shielding structure 81 and a second shielding structure 82 , wherein the second shielding structure 82 is electrically connected to the first shielding structure 81 , and its orthographic projection on the substrate coincides with that of the first shielding structure 81 on the substrate.

[0423] In an exemplary embodiment, the shape of the shielding wire is adapted to the shapes of the plurality of pads, which is not limited in the present disclosure.

[0424] As shown in FIG. 46 , the first shielding structure 81 is formed in the substrate 10 , and the second shielding structure 82 is disposed on the same layer as the plurality of pads.

[0425] In an exemplary embodiment, shield wire 80 is grounded.

[0426] In an exemplary embodiment, the first shielding structure 81 may include boron ions.

[0427] In an exemplary embodiment, the first shielding structure 81 may be electrically connected to the second shielding structure 82 through a via hole between the insulating dielectric layer and the sealing layer.

[0428] In an exemplary embodiment, the setting of the shielding wire in the present disclosure can effectively isolate the signal leakage and mutual inductance effect between at least one capacitor in the pressure sensor, improve the pressure sensor's anti-interference ability to external signals, and ensure the stability and accuracy of the pressure sensor's output signal.

[0429] In an exemplary embodiment, the second electrode of at least one capacitor is provided with a release hole array, and the release hole array includes: release holes arranged in an array.

[0430] In an exemplary embodiment, the release hole array of at least one capacitor may include 350 to 500 release holes. Exemplarily, the release hole array of at least one capacitor may include 400 release holes.

[0431] In an exemplary embodiment, in actual manufacturing, considering the reliability of sealing, the release hole diameter can be submicron. When the release hole is circular, the release hole diameter refers to the diameter of the release hole; when the release hole is square, the release hole diameter refers to the length of the diagonal.

[0432] In an exemplary embodiment, the pore size of the release hole can be sub-0.25 micron, 0.3 micron, 0.35 micron, 0.4 micron, 0.45 micron, 0.5 micron, 0.6 micron to 0.8 micron or any other pore size less than or equal to 1 micron, and the present disclosure does not impose any limitation on this.

[0433] In an exemplary embodiment, the at least one capacitor has a capacitance greater than 2 picofarads in a vacuum environment.

[0434] In an exemplary embodiment, the capacitance value of the at least one capacitor in a vacuum environment may be within at least one of a range of 2 picofarads to 3 picofarads, a range of 3 picofarads to 5 picofarads, a range of 5 picofarads to 8 picofarads, a range of 8 picofarads to 12 picofarads, and a range of 12 picofarads to 20 picofarads. Exemplarily, the capacitance value of the at least one capacitor in a vacuum environment may be 4 pF.

[0435] In an exemplary embodiment, the greater the capacitance value of the at least one capacitor, the larger the area of ​​at least one of the first electrode and the second electrode in the at least one capacitor.

[0436] In an exemplary embodiment, the length of at least one capacitor along the first direction is shorter than the length along the second direction. For example, the length of the second electrode of at least one capacitor along the first direction may be in the range of 100 microns to 150 microns, and for example, the length of the second electrode of at least one capacitor along the first direction may be 123 microns. For example, the length of the second electrode of at least one capacitor along the second direction may be in the range of 600 microns to 650 microns, and for example, the length of the second electrode of at least one capacitor along the second direction may be 624 microns.

[0437] In an exemplary embodiment, the number of cavities in at least one capacitor is one, the length of the second electrode of at least one capacitor along the first direction may be 123 microns, and the length of the second electrode of at least one capacitor along the second direction may be 624 microns, the length of the cavity along the first direction may be 113 microns, and the length of the cavity along the second direction may be 614 microns.

[0438] In an exemplary embodiment, the first electrode of at least one capacitor and the first shielding structure of the shielding line may be manufactured using the same process as the emitter and the collector, or the same process as the base, which is not limited in the present disclosure.

[0439] Figures 48a to 48i are flowcharts of the preparation process of the pressure sensor provided in Figure 46. As shown in Figures 48a to 48i, the preparation process of the pressure sensor provided in Figure 46 may include the following steps.

[0440] Step S2001: Provide a substrate 10, apply a photoresist 91 on the substrate 10, and form a first opening region R1 on the photoresist 91 through a patterning process. As shown in FIG48a,

[0441] In an exemplary embodiment, the substrate is a P-type single crystal silicon substrate.

[0442] Step S2002: First ions are implanted into the first region of the substrate corresponding to the first opening region, and an N-type semiconductor layer 201 is formed by an annealing process, as shown in FIG48b.

[0443] Step S2003: Coat a photoresist 92 on the substrate 10, and form a second opening region R2 and a third opening region R3 on the photoresist 92 through a patterning process, as shown in FIG48c.

[0444] Step S2004: second ions are implanted into the second region of the substrate corresponding to the second opening region and the third region of the substrate corresponding to the third opening region, and an emitter 202 and a collector 203 are formed by annealing, as shown in FIG48d.

[0445] Step S2003: coating a photoresist 93 on the substrate 10, and forming a fourth opening region R4, a fifth opening region R5, and a sixth opening region R6 on the photoresist 93 through a patterning process, as shown in FIG48e.

[0446] Step S2004: inject first ions into the fourth region of the substrate corresponding to the fourth opening region, inject ions into the fifth region of the substrate corresponding to the fifth opening region, and inject second ions into the sixth region of the substrate corresponding to the sixth opening region. Through an annealing process, a base 204 is formed in the fourth region, a first electrode 101 of at least one capacitor is formed in the fifth region, and a first shielding structure 81 is formed in the sixth region, as shown in Figure 48f.

[0447] Step S2005: depositing an insulating dielectric film on the substrate, and patterning the sacrificial film through a patterning process to form an insulating dielectric layer 20 covering the substrate, as shown in FIG48g.

[0448] Step S2006: depositing a sacrificial film on the insulating dielectric layer, patterning the sacrificial film through a patterning process to form a sacrificial layer located at at least one capacitor, depositing a conductive film on the substrate formed with the sacrificial layer, patterning the conductive film through a patterning process to form the second electrode 103 of at least one capacitor, the second electrode of at least one capacitor is provided with an array-arranged release hole, immersing the substrate formed with the second electrode of at least one capacitor in an etchant, corroding and releasing the sacrificial layer with the etchant to form a cavity 103 of at least one capacitor, and drying the substrate formed with the cavity 103 of at least one capacitor, as shown in FIG48h.

[0449] Step S2007: depositing a sealing film on the substrate forming the cavity of at least one capacitor, and patterning the sealing film through a patterning process to form a sealing layer 30, as shown in FIG48i.

[0450] Step S2008 , depositing a metal film on the substrate on which the sealing layer is formed, and patterning the metal film through a patterning process to form a plurality of pads and a second shielding structure, as shown in FIG46 .

[0451] In an exemplary embodiment, when the pressure sensor includes at least one pressure-sensing capacitor and at least one reference capacitor, the method for preparing the pressure sensor may further include:

[0452] Step S2009 : depositing a pressure-sensitive film on the substrate having the plurality of pads and the second shielding structure formed thereon, and patterning the pressure-sensitive film through a patterning process to form a pressure-resistant layer.

[0453] In an exemplary embodiment, the present disclosure implants ions by using an ion implanter to complete the ion implantation.

[0454] In an exemplary embodiment, the concentration of ion implantation when forming the emitter, the collector, and the base is greater than the concentration of ion implantation when forming the N-type semiconductor layer.

[0455] In an exemplary embodiment, the pad may be made of a metal, such as aluminum or gold, that is, the film layer where the pad is located is a metal conductive layer.

[0456] In an exemplary embodiment, the metal conductive film needs to be annealed after deposition to enable the metal conductive layer to form a good ohmic contact.

[0457] In an exemplary embodiment, an adhesive film may be deposited before depositing the second conductive film on the substrate having the sealing layer 30 formed thereon. The adhesive film and the second conductive film are patterned by a patterning process to form an adhesive layer and a pad layer on the adhesive layer.

[0458] In an exemplary embodiment, the adhesion layer may be a metal conductive layer, and the material of the adhesion layer may be a metal, such as titanium, chromium, or tantalum.

[0459] An embodiment of the present disclosure also provides a pressure sensing assembly, comprising: pressure sensors arranged in an array as provided in any one of the embodiments of Figures 28 to 47 .

[0460] The present disclosure also provides a method for preparing a pressure sensor, which is configured to prepare a pressure sensor as provided in any one of the embodiments of FIG. 28 to FIG. 47 . The method for preparing the pressure sensor may include the following steps:

[0461] Step S1001: provide a substrate.

[0462] Step S1002: forming at least one capacitor on the substrate.

[0463] In an exemplary embodiment, step S1002 may include:

[0464] At least one capacitance and temperature measurement device is formed on the substrate.

[0465] In an exemplary embodiment, forming at least one capacitance and temperature measurement device on a substrate includes:

[0466] forming at least one first electrode of a capacitor and a temperature measuring device on a substrate;

[0467] forming an insulating dielectric layer on a substrate on which at least one first electrode of a capacitor and a temperature measuring device are formed;

[0468] forming at least one second electrode of a capacitor on the insulating dielectric layer;

[0469] A plurality of cavities are formed between a first electrode and a second electrode of at least one capacitor.

[0470] In an exemplary embodiment, forming a first electrode of at least one capacitor and a temperature measurement device on a substrate includes:

[0471] forming an N-type semiconductor layer on a substrate;

[0472] An emitter, a base, a collector and a first electrode of at least one capacitor are formed on a substrate having an N-type semiconductor layer formed thereon.

[0473] In an exemplary embodiment, forming the N-type semiconductor layer on the substrate includes implanting first ions into the substrate and forming the N-type semiconductor layer through an annealing process.

[0474] In an exemplary embodiment, the first ion includes phosphorus.

[0475] In an exemplary embodiment, forming an emitter, a base, a collector, and a first electrode of at least one capacitor on a substrate having an N-type semiconductor layer formed thereon includes: implanting second ions into the substrate, forming the emitter and the collector through an annealing process, implanting first ions into the substrate, forming the base through an annealing process, and implanting ions into the substrate to form the first electrode of at least one capacitor.

[0476] In an exemplary embodiment, the second ion includes boron.

[0477] In an exemplary embodiment, the annealing process may be a furnace annealing process.

[0478] In an exemplary embodiment, after step S1002, the method for preparing a pressure sensor may further include:

[0479] Step S1003: forming a sealing layer on the second electrode of at least one capacitor by a patterning process.

[0480] Step S1005 : forming a plurality of pads on the sealing layer through a patterning process.

[0481] Step S1005 : forming a sealing layer on the plurality of pads through a patterning process.

[0482] In an exemplary embodiment, the pressure sensor device includes: a shielding wire, the shielding wire including: a first shielding structure and a second shielding structure, wherein forming a first electrode of at least one capacitor and a temperature measuring device within a substrate includes: forming a temperature measuring device, a first electrode of at least one capacitor, and the first shielding structure of the shielding wire within the substrate;

[0483] In an exemplary embodiment, forming the plurality of pads on the sealing layer through a patterning process includes forming the plurality of pads and a second shielding structure on the sealing layer through a patterning process.

[0484] The drawings of the embodiments of the present disclosure only involve the structures involved in the embodiments of the present disclosure, and other structures may refer to general designs.

[0485] For the sake of clarity, the thickness and size of layers or microstructures are exaggerated in the drawings used to describe the embodiments of the present disclosure. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "under" another element, the element can be "directly on" or "under" the other element, or intervening elements may be present.

[0486] Although the embodiments disclosed in this disclosure are as described above, the contents described are merely embodiments adopted to facilitate understanding of the disclosure and are not intended to limit the disclosure. Any person skilled in the art to which the disclosure belongs may make any modifications and changes in the form and details of the implementation without departing from the spirit and scope of the disclosure. However, the scope of patent protection of the disclosure shall still be based on the scope defined by the attached claims.

Claims

1. A pressure sensor, comprising: A substrate and at least one capacitor disposed on the substrate, the at least one capacitor comprising: a first electrode and a second electrode which are oppositely disposed and insulated from each other, the second electrode being located on a side of the first electrode away from the substrate, and a plurality of cavities arranged in an array being provided between the first electrode and the second electrode; The orthographic projection of the first electrode of at least one capacitor on the substrate and the orthographic projection of the second electrode on the substrate at least partially overlap, and the orthographic projection of the overlapping region of the first electrode and the second electrode on the substrate and the orthographic projection of the plurality of cavities on the substrate at least partially overlap; The second electrode at least partially surrounds the surface of the plurality of cavities away from the first electrode.

2. The pressure sensor according to claim 1, wherein, The length of at least one of the first electrode and the second electrode of the at least one capacitor in a first direction is less than the length in a second direction, and the first direction intersects the second direction.

3. The pressure sensor according to claim 2, wherein, At least one capacitor comprises: at least one pressure-sensitive capacitor and at least one reference capacitor, and the pressure sensor further comprises: a plurality of pads, a hole-sealing layer and a pressure-resistant layer; The hole-sealing layer is disposed around the plurality of cavities, and the hole-sealing layer covers the surface of the second electrode of the at least one capacitor away from the substrate; The plurality of pads are located on a side of the hole-sealing layer away from the substrate, and the plurality of pads are respectively electrically connected to the first electrode and the second electrode of the at least one capacitor; The pressure-resistant layer is located on a side of the plurality of pads away from the substrate, and at least one pressure-sensitive hole exposing the hole-sealing layer is provided, and at least one pressure-sensitive hole corresponds to at least one pressure-sensitive capacitor one by one. The orthographic projection of the at least one pressure-sensitive hole on the substrate and the orthographic projection of the second electrode of the corresponding pressure-sensitive capacitor on the substrate at least partially overlap, and the orthographic projection of the at least one reference capacitor on the substrate is located within the orthographic projection of the pressure-resistant layer on the substrate.

4. The pressure sensor according to claim 3, wherein The at least one capacitor comprises: two pressure-sensitive capacitors and two reference capacitors, and the plurality of pads comprise: a first pad, a second pad, a third pad and a fourth pad; The first pad is respectively electrically connected to the second electrode of the first pressure-sensitive capacitor and the second electrode of the first reference capacitor, the second pad is respectively electrically connected to the first electrode of the second pressure-sensitive capacitor and the first electrode of the first reference capacitor, the third pad is respectively electrically connected to the second electrode of the second pressure-sensitive capacitor and the second electrode of the second reference capacitor, and the fourth pad is respectively electrically connected to the first electrode of the first pressure-sensitive capacitor and the first electrode of the second reference capacitor.

5. The pressure sensor according to claim 4, wherein, The first pressure-sensitive capacitor, the second reference capacitor, the first reference capacitor and the second pressure-sensitive capacitor are arranged in the first direction.

6. The pressure sensor according to claim 5, wherein, The compression layer includes: a first compression structure, a second compression structure, a third compression structure, and a fourth compression structure that are arranged at intervals from each other. At least two of the first compression structure, the second compression structure, the third compression structure, and the fourth compression structure have no overlapping area in the orthographic projection on the substrate. The orthographic projection of the first compression structure on the substrate at least partially overlaps with the orthographic projection of the first pressure-sensitive capacitor on the substrate. The orthographic projection of the second compression structure on the substrate at least partially overlaps with the orthographic projection of the second pressure-sensitive capacitor on the substrate. The orthographic projection of the third compression structure on the substrate at least partially overlaps with the orthographic projection of the first reference capacitor on the substrate. The orthographic projection of the fourth compression structure on the substrate at least partially overlaps with the orthographic projection of the second reference capacitor on the substrate; The first compression structure and the second compression structure are at least partially symmetrically arranged with respect to a virtual straight line extending in a direction perpendicular to the substrate. The third compression structure and the fourth compression structure are at least partially symmetrically arranged with respect to a virtual straight line extending in a direction perpendicular to the substrate.

7. The pressure sensor according to claim 3, wherein, The at least one capacitor includes: two pressure-sensitive capacitors and two reference capacitors. The plurality of pads includes: a first pad, a second pad, a third pad, and a fourth pad; The first pad is electrically connected to the second electrode of the second pressure-sensitive capacitor and the second electrode of the second reference capacitor respectively. The second pad is electrically connected to the first electrode of the second pressure-sensitive capacitor and the first electrode of the first reference capacitor respectively. The third pad is electrically connected to the second electrode of the first pressure-sensitive capacitor and the second electrode of the first reference capacitor respectively. The fourth pad is electrically connected to the first electrode of the first pressure-sensitive capacitor and the first electrode of the second reference capacitor respectively.

8. The pressure sensor according to claim 7, wherein The first pressure-sensitive capacitor, the second reference capacitor, the second pressure-sensitive capacitor, and the first reference capacitor are arranged along the first direction.

9. The pressure sensor according to claim 8, wherein, The compression layer includes: a first compression structure, a second compression structure, a third compression structure, and a fourth compression structure that are arranged at intervals from each other. At least two of the first compression structure, the second compression structure, the third compression structure, and the fourth compression structure have no overlapping area in the orthographic projection on the substrate. The orthographic projection of the first compression structure on the substrate at least partially overlaps with the orthographic projection of the first pressure-sensitive capacitor on the substrate. The orthographic projection of the second compression structure on the substrate at least partially overlaps with the orthographic projection of the second pressure-sensitive capacitor on the substrate. The orthographic projection of the third compression structure on the substrate at least partially overlaps with the orthographic projection of the first reference capacitor on the substrate. The orthographic projection of the fourth compression structure on the substrate at least partially overlaps with the orthographic projection of the second reference capacitor on the substrate; The first compression structure and the second compression structure are at least partially the same. The third compression structure and the fourth compression structure are at least partially the same.

10. The pressure sensor according to claim 2, wherein, The plurality of cavities in the at least one capacitor are arranged along the second direction, or arranged in a matrix along the first direction and the second direction.

11. The pressure sensor according to claim 10, wherein, The number of cavities arranged along the second direction is N; At least two of the N cavities have the same length in the second direction.

12. The pressure sensor according to claim 10, wherein, The number of cavities arranged in the second direction is N; The difference between the length of the nth cavity in the second direction and the length of the (n - 1)th cavity in the second direction is 0 or a threshold difference, or the difference between the length of the (n - 1)th cavity in the second direction and the length of the nth cavity in the second direction is 0 or a threshold difference.

13. The pressure sensor according to claim 10, wherein, The number of cavities arranged in the second direction is N; The ratio of the length of the nth cavity in the second direction to the length of the (n - 1)th cavity in the second direction is 1 or a threshold ratio, or the ratio of the length of the (n - 1)th cavity in the second direction to the length of the nth cavity in the second direction is 1 or a threshold ratio.

14. The pressure sensor according to claim 3 further comprises: Temperature measurement device; The temperature measurement device is formed in the substrate and located on the surface of the substrate, and the temperature measurement device is configured to obtain the temperature of the capacitor.

15. The pressure sensor according to claim 14, wherein, The substrate is a P-type single-crystalline silicon substrate.

16. The pressure sensor according to claim 15, wherein, The temperature measurement device includes: an N-type semiconductor layer formed in the substrate, an emitter, a base, and a collector; The orthographic projections of the base and the emitter on the substrate are within the orthographic projection of the N-type semiconductor layer on the substrate. The base is a ring structure and surrounds the emitter. The collector is a ring structure, and the orthographic projection of the collector on the substrate surrounds the orthographic projection of the N-type semiconductor layer on the substrate.

17. The pressure sensor according to claim 16, wherein, The plurality of pads includes: a fifth pad and a sixth pad; The fifth pad is electrically connected to the base and the collector of the temperature measurement device, and the sixth pad is electrically connected to the emitter of the temperature measurement device.

18. The pressure sensor according to claim 17, wherein, The fifth pad includes: a first pad main body portion and a first pad connection portion. The first pad connection portion is electrically connected to the first pad main body portion. The first pad connection portion includes: a recessed portion. The first pad connection portion is electrically connected to the base and the collector of the temperature measurement device. The sixth pad includes: a second pad main body portion and a second pad connection portion. The second pad connection portion is electrically connected to the second pad main body portion. The second pad connection portion includes: a protruding portion. The second pad connection portion is electrically connected to the emitter of the temperature measurement device. The recessed portion surrounds the protruding portion.

19. The pressure sensor according to claim 18 further comprises: Shielding wire; The shielding wire is electrically connected to the fifth pad and at least partially surrounds the at least one capacitor.

20. The pressure sensor according to claim 19, wherein, The shielding wire includes: a first shielding structure and a second shielding structure. Among them, the second shielding structure is electrically connected to the first shielding structure, and the orthographic projection of the second shielding structure on the substrate coincides with the orthographic projection of the first shielding structure on the substrate. The first shielding structure is formed in the substrate, and the second shielding structure is provided on the same layer as the plurality of pads.

21. The pressure sensor according to claim 1, wherein, The second electrode of the at least one capacitor surrounds the plurality of cavities to form a side wall; The second electrode of the at least one capacitor is provided with a release hole array, and the release hole array includes: release holes arranged in an array; The orthographic projection of the release hole array on the substrate is within the orthographic projection of the plurality of cavities on the substrate, and the aperture of the release hole is less than 1 micron.

22. The pressure sensor according to claim 1, wherein, The capacitance value of the at least one capacitor in a vacuum environment is greater than 2 picofarads.

23. A pressure sensing component, comprising: A pressure sensor arranged in an array, as described in any one of claims 1 to 22.

24. A method for manufacturing a pressure sensor, configured to manufacture a pressure sensor as described in any one of claims 1 to 22, the method comprising: Providing a substrate; Forming at least one capacitor on the substrate.

25. The pressure sensor according to claim 24, wherein, The forming of at least one capacitor on the substrate includes: Forming at least one capacitor and a temperature measuring device on the substrate.

26. The pressure sensor according to claim 25, wherein, The forming of at least one capacitor and a temperature measuring device on the substrate includes: Forming a first electrode of at least one capacitor and a temperature measuring device on the substrate; Forming an insulating dielectric layer on the substrate on which the first electrode of at least one capacitor and the temperature measuring device are formed; Forming a second electrode of at least one capacitor on the insulating dielectric layer; Forming a plurality of cavities between the first electrode and the second electrode of at least one capacitor.

27. The pressure sensor according to claim 26, wherein, The forming of a first electrode of at least one capacitor and a temperature measuring device on the substrate includes: Forming an N-type semiconductor layer on the substrate; Forming an emitter, a base, a collector, and a first electrode of at least one capacitor on the substrate on which the N-type semiconductor layer is formed.

28. The pressure sensor according to claim 27, wherein, The forming of an N-type semiconductor layer on the substrate includes: Injecting a first ion into the substrate and forming an N-type semiconductor layer through an annealing process, the first ion including: phosphorus; The forming of an emitter, a base, a collector, and a first electrode of at least one capacitor on the substrate on which the N-type semiconductor layer is formed includes: Injecting a second ion into the substrate and forming the emitter and the collector through an annealing process, the second ion including: boron; Injecting a first ion into the substrate and forming the base through an annealing process, Injecting ions into the substrate to form a first electrode of at least one capacitor.

29. The method according to claim 24, wherein After forming at least one capacitor on the substrate, the method further includes: Forming a sealing layer on the second electrode of the at least one capacitor through a patterning process; Forming a plurality of pads on the sealing layer through a patterning process; Forming a sealing layer on the plurality of pads through a patterning process.

30. The method according to claim 29, wherein, The pressure sensor device includes: a shield wire, when the shield wire includes: a first shielding structure and a second shielding structure, The forming of a first electrode of at least one capacitor and a temperature measuring device in the substrate includes: Forming a temperature measuring device, a first electrode of at least one capacitor, and a first shielding structure of the shield wire in the substrate; The forming of a plurality of pads on the sealing layer through a patterning process includes: Forming a plurality of pads and a second shielding structure on the sealing layer through a patterning process.

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