Display apparatus and electronic device

Abstract

Provided is a display apparatus with high light outcoupling efficiency. The present invention provides a display element having a plano-convex lens on a light-emitting element, wherein the plano-convex lens has a substantially rectangular shape in a top view, and the curvature of the convex side is different in a first direction parallel to a first side of the substantially rectangular shape and in a second direction perpendicular to the first side. Each of a cross section including the optical axis in the first direction and a cross section including the optical axis in the second direction has, in the following order proceeding from the apex of the convex side to the planar side of the plano-convex lens, a first region, a second region, and a third region with different surface curvatures, and the second region has the smallest radius of curvature. By using a plano-convex lens with such a shape, light emitted by the light-emitting element can be efficiently cast in a frontal direction.

Description

Display devices and electronic devices

[0001] One embodiment of the present invention relates to a display device and an electronic device.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. The technical field of one embodiment of the invention disclosed in this specification and the like relates to an object, a method, or a manufacturing method. Alternatively, one embodiment of the present invention relates to a process, a machine, manufacture, or a composition of matter. Therefore, more specifically, examples of the technical field of one embodiment of the present invention disclosed in this specification include a semiconductor device, a display device, a liquid crystal display device, a light-emitting device, a lighting device, a power storage device, a memory device, an imaging device, and an operation method thereof or a manufacturing method thereof.

[0003] Note that in this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. A transistor and a semiconductor circuit are examples of a semiconductor device. In addition, a memory device, a display device, an imaging device, and an electronic device may include a semiconductor device.

[0004] Goggle-type devices and eyeglass-type devices have been developed as electronic devices for XR (a collective term for virtual reality (VR), augmented reality (AR), mixed reality (MR), etc.).

[0005] Representative display panels used in these electronic devices include display devices equipped with liquid crystal elements, and display devices equipped with organic EL (Electro Luminescence) elements or light-emitting diodes (LEDs: Light Emitting Diodes).

[0006] A display device equipped with an organic EL element does not require a backlight, which is necessary in a liquid crystal display device, and therefore can realize a thin, lightweight, high-contrast, and low-power display device. For example, an example of a display device using an organic EL element is described in Patent Document 1.

[0007] JP 2018-107444 A

[0008] Catadioptric systems used in VR devices and the like utilize selective reflection of polarized light, resulting in insufficient light utilization efficiency. Furthermore, AR devices require high display visibility even in strong external light. Therefore, XR devices require increased display brightness. Increasing the brightness of display devices increases power consumption and reduces the reliability of display devices. Therefore, a display device with high light extraction efficiency is desired.

[0009] Therefore, an object of one embodiment of the present invention is to provide a display device with high light extraction efficiency, a display device with high color-emitting performance, a display device with low power consumption, a display device with high visibility, an electronic device including the display device, or a novel electronic device.

[0010] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become clear from the description of the specification, drawings, claims, etc., and it is possible to extract other problems from the description of the specification, drawings, claims, etc.

[0011] One embodiment of the present invention relates to a display device with high light extraction efficiency.

[0012] One embodiment of the present invention is a display device including a light-emitting element, a first insulating layer, and a plano-convex lens. The first insulating layer is provided between the light-emitting element and the plano-convex lens. The plano-convex lens has a substantially rectangular shape in a top view. In the plano-convex lens, a direction parallel to a first side of the substantially rectangular shape is defined as a first direction, and a direction perpendicular to the first side is defined as a second direction. When a cross section including an optical axis in the first direction is defined as the first cross section and a cross section including the optical axis in the second direction is defined as the second cross section, the relationship in magnitude between the length of the flat side in the first cross section and the length of the flat side in the second cross section and the relationship in magnitude between the radius of curvature of the convex side in the first cross section and the radius of curvature of the convex side in the second cross section are equal. Each of the first and second cross sections has, in that order, a first region, a second region, and a third region whose surface curvatures are different from each other from a top of the convex side to the flat side. Of the first to third regions, the radius of curvature of the second region is the smallest.

[0013] It is preferable that the radius of curvature increases in the order of the second region, the first region, and the third region.

[0014] The first insulating layer is preferably made of the same material as the plano-convex lens, or the refractive index of the first insulating layer may be greater than the refractive index of the plano-convex lens.

[0015] The thickness of the first insulating layer between the light emitting element and the plano-convex lens is preferably 1 μm or more and 3 μm or less.

[0016] Another embodiment of the present invention includes a first light-emitting element, a second light-emitting element, a first plano-convex lens, and a second plano-convex lens, the first light-emitting element and the second light-emitting element having different emission colors and element areas, the first plano-convex lens being provided over the first light-emitting element, the second plano-convex lens being provided over the second light-emitting element, the first plano-convex lens and the second plano-convex lens having different shapes in a top view, each of the first and second plano-convex lenses having a substantially rectangular shape in a top view, and the first and second plano-convex lenses having a first direction and a second direction parallel to a first side of the substantially rectangular shape in the first and second plano-convex lenses. When the direction perpendicular to the side of the display panel is defined as the second direction, a cross section including the optical axis in the first direction is defined as the first cross section, and a cross section including the optical axis in the second direction is defined as the second cross section, the relationship in magnitude between the length of the flat side in the first cross section and the length of the flat side in the second cross section, and the relationship in magnitude between the radius of curvature of the convex side in the first cross section and the radius of curvature of the convex side in the second cross section are equal, and each of the first and second cross sections has, in that order, a first region, a second region, and a third region, which have different surface curvatures from the apex of the convex side to the flat side, and of the first to third regions, the radius of curvature of the second region is the smallest.

[0017] It is preferable that the radius of curvature increases in the order of the second region, the first region, and the third region.

[0018] The first plano-convex lens may have a different height from the second plano-convex lens, and the first plano-convex lens may be cemented to the second plano-convex lens.

[0019] An electronic device using the above-described display device as a light source and provided with a catadioptric system on the display surface side of the display device is also one embodiment of the present invention.

[0020] According to one embodiment of the present invention, a display device with high light extraction efficiency can be provided. Alternatively, a display device with high color-emitting performance can be provided. Alternatively, a display device with low power consumption can be provided. Alternatively, a display device with high visibility can be provided. Alternatively, an electronic device including the display device can be provided. Alternatively, a novel electronic device can be provided.

[0021] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of these effects. Effects other than these can be extracted from the description in the specification, drawings, and claims.

[0022] FIG. 1 is a diagram illustrating a pixel of a display device. FIGS. 2A and 2B are diagrams illustrating a pixel of a display device. FIGS. 3A and 3B are diagrams illustrating a pixel of a display device. FIGS. 4A and 4B are diagrams illustrating a pixel of a display device. FIGS. 5A and 5B are diagrams illustrating a simulation model. FIGS. 6A and 6B are diagrams illustrating a simulation model. FIGS. 7A and 7B are diagrams illustrating simulation results. FIGS. 8A and 8B are diagrams illustrating simulation results. FIGS. 9A and 9B are diagrams illustrating simulation results. FIGS. 10A and 10B are diagrams illustrating a display device. FIGS. 11A and 11B are diagrams illustrating a display device. FIG. 12 is a diagram comparing the current efficiency of organic EL elements. FIG. 13A is a photograph of a pixel. FIGS. 13B and 13C are SEM photographs of a pixel. FIGS. 14A to 14C are diagrams illustrating the luminance-current density characteristics of an organic EL element. FIGS. 15A to 15E are diagrams illustrating a display panel. Fig. 16A to Fig. 16C are diagrams illustrating a glasses-type device. Fig. 17A and Fig. 17B are diagrams illustrating an example of the configuration of a display panel. Fig. 18 is a diagram illustrating an example of the configuration of a display panel. Fig. 19 is a diagram illustrating an example of the configuration of a display panel. Fig. 20 is a diagram illustrating an example of the configuration of a display panel. Fig. 21 is a diagram illustrating an example of the configuration of a display panel. Fig. 22 is a diagram illustrating an example of the configuration of a display panel. Fig. 23 is a diagram illustrating an example of the configuration of a display panel. Figs. 24A and 24B are diagrams illustrating transistors.

[0023] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art will readily understand that various modifications in form and detail may be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same parts or parts having similar functions will be designated by the same reference numerals in different drawings, and repeated description thereof may be omitted. Hatching of the same elements constituting the drawings may be omitted or changed as appropriate in different drawings.

[0024] Furthermore, even if a circuit diagram shows a single element, that element may be configured as multiple elements as long as there is no functional problem. For example, multiple transistors operating as switches may be connected in series or parallel. Also, a capacitor may be divided and placed in multiple locations.

[0025] Furthermore, one conductor may have multiple functions, such as wiring, electrode, and terminal, and in this specification, multiple names may be used for the same element. Also, even when elements are shown as being directly connected to each other on a circuit diagram, in reality, the elements may be connected via one or more conductors, and in this specification, such a configuration is also included in the category of direct connection.

[0026] In this specification, "connection" includes, as an example, "electrical connection." Note that the term "electrical connection" is sometimes used to define the connection relationship between circuit elements as a physical entity. Furthermore, "electrical connection" includes "direct connection" and "indirect connection." "A and B are directly connected" means that A and B are connected without the intervention of a circuit element (e.g., a transistor, a switch, etc.; wiring is not considered a circuit element). On the other hand, "A and B are indirectly connected" means that A and B are connected via one or more circuit elements.

[0027] For example, assuming that a circuit including A and B is operating, if there is a time during the operation of the circuit when an electrical signal is exchanged or an interaction of electrical potential occurs between A and B, then it can be defined that "A and B are indirectly connected" as objects. Note that even if there is a time during the operation of the circuit when no electrical signal is exchanged or an interaction of electrical potential occurs between A and B, it can still be defined that "A and B are indirectly connected" as long as there is a time during the operation of the circuit when an electrical signal is exchanged or an interaction of electrical potential occurs between A and B.

[0028] An example of a case where "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors. On the other hand, an example of a case where it cannot be said that "A and B are indirectly connected" is when an insulator is present in the path from A to B. Specifically, there are cases where a capacitive element is connected between A and B, and cases where a gate insulating film of a transistor is present between A and B. Therefore, it cannot be said that "the gate (A) of a transistor and the source or drain (B) of the transistor are indirectly connected."

[0029] Another example of a case where it cannot be said that "A and B are indirectly connected" is when multiple transistors are connected via their sources and drains to the path from A to B, and a constant potential V is supplied to a node between one transistor and another transistor from a power supply, GND, etc.

[0030] Embodiment 1 In this embodiment, a display device and an electronic device according to one embodiment of the present invention will be described.

[0031] One embodiment of the present invention is a display device with high light extraction efficiency. The display device includes a light-emitting element (also referred to as a light-emitting device) as a display element, and a plano-convex lens having a substantially rectangular shape in a top view over the light-emitting element. In the plano-convex lens, it is preferable that the relationship between the length of the planar surface of each cross section including an optical axis in a first direction parallel to a first side of the substantially rectangular shape and the radius of curvature of the convex surface of each cross section be equal to the relationship between the length of the planar surface of each cross section and the radius of curvature of the convex surface of each cross section.

[0032] Furthermore, each of the cross section including the optical axis in the first direction and the cross section including the optical axis in the second direction has a first region, a second region, and a third region, in that order, with different surface curvatures from the apex of the convex side of the plano-convex lens to the planar side, and the second region has the smallest radius of curvature.

[0033] By using a plano-convex lens of this shape, light emitted by the light-emitting element can be efficiently emitted in the forward direction. Furthermore, this plano-convex lens can be used in pixel arrays where the shapes of each sub-pixel are different, such as an S-stripe array, in which hemispherical lenses cannot be used.

[0034] By using the plano-convex lens of one embodiment of the present invention, loss of light emitted from a light-emitting element due to divergence and reflection can be suppressed, and the light extraction efficiency of a display device can be increased. This action also makes it possible to suppress the voltage applied to the light-emitting element, thereby increasing the reliability of the light-emitting element and reducing the power consumption of the light-emitting element. Furthermore, by using the display device, the visibility of XR equipment and the like can be improved.

[0035] FIG. 1 is a perspective view of a pixel included in a display device of one embodiment of the present invention, and shows an example of lenses 102 (lenses 102R, 102G, and 102B) provided over light-emitting elements included in a stack 100. The pixel 101 includes a subpixel 105R having a light-emitting element that emits red light, a subpixel 105G having a light-emitting element that emits green light, and a subpixel 105B having a light-emitting element that emits blue light. The lens 102R is provided over the subpixel 105R, the lens 102G is provided over the subpixel 105G, and the lens 102B is provided over the subpixel 105B. Note that the stack 100 includes elements that constitute the pixel 101.

[0036] The lens 102 is a plano-convex lens, and is also called a microlens because it has a minute size corresponding to the size of the pixel. Furthermore, a configuration in which the plano-convex lenses are regularly arranged on a surface is also called an MLA (microlens array).

[0037] In one embodiment of the present invention, the plano-convex lens has a structure in which it is separated between sub-pixels. Therefore, the plano-convex lens has a structure that is easily applicable even when the sub-pixels of a pixel have different shapes. In this embodiment, an example using pixels with an S-stripe arrangement will be described as a representative example of sub-pixels with different shapes, but it is also possible to apply a stripe arrangement such as that shown in FIG. 2A, a delta arrangement, a zigzag arrangement, a pentile arrangement, a diamond arrangement, etc.

[0038] The plano-convex lens can also be applied to a pixel having a light-receiving element. Fig. 2B shows an example of a pixel having subpixels 105R, 105G, 105B, and 105S. Note that Fig. 2B illustrates an example in which subpixel 105S is added to a pixel having an S-stripe arrangement, but subpixel 105S may also be added to a pixel having any of the other arrangements described above.

[0039] The subpixel 105S has a light-receiving element, and a lens 102S is provided on the light-receiving element. The light-receiving element can be used, for example, as a scanner, for authentication by capturing an image of a fingerprint, palm print, face, etc., as a touch sensor, for detecting the number of blinks, or for detecting line of sight. The inclusion of the lens 102S makes it possible to efficiently capture light incident from outside or reflected light emitted by a subpixel having a light-emitting element, thereby improving the sensitivity of the above-mentioned functions.

[0040] Here, the S-stripe arrangement will be described. A pixel in the S-stripe arrangement has first to third subpixels that emit light of different colors. The first and second subpixels are arranged adjacent to each other in a first direction, and the third subpixel is arranged adjacent to both the first and second subpixels in a second direction perpendicular to the first direction.

[0041] The S-stripe arrangement allows for a smaller area between sub-pixels than, for example, a stripe structure, making it easier to increase the aperture ratio and advantageous for achieving higher brightness in display panels. On the other hand, when pixels use light-emitting elements, the reliability of the light-emitting elements must also be taken into consideration.

[0042] 3A is an example of a top view of a pixel 101 in an S-stripe arrangement. The pixel 101 has a sub-pixel 105R having a light-emitting element that emits red light, a sub-pixel 105G having a light-emitting element that emits green light, and a sub-pixel 105B having a light-emitting element that emits blue light.

[0043] Since the lifetime of a light-emitting element is correlated with the current density during light emission, a sub-pixel having a light-emitting element with relatively high reliability can obtain the required brightness by reducing the area (element area) it occupies in the pixel and increasing the current density, whereas a sub-pixel having a light-emitting element with relatively low reliability can obtain the required brightness by increasing the area it occupies in the pixel and decreasing the current density.

[0044] 3A, the area occupied by the sub-pixel 105R having the red light emitting element with the highest reliability is set to be the smallest, and the area occupied by the sub-pixel 105R having the blue light emitting element with the lowest reliability is set to be the largest. By varying the area occupied by the sub-pixels according to the emitted color in this way, it is preferable to devise a way to extend the overall lifespan.

[0045] Catadioptric systems used in VR devices and the like utilize selective reflection of polarized light, resulting in insufficient light utilization efficiency. AR devices also require high display visibility even in strong external light. Display panels used in XR devices require a resolution of, for example, 2000 ppi or higher to avoid the screen door effect. Meanwhile, smaller pixel sizes result in lower aperture ratios, resulting in an insufficient amount of light entering the optical system. Therefore, display panels are required to have even higher brightness.

[0046] To increase the front brightness of a display panel, it is effective to provide a convex lens on the light-emitting element. A portion of the light emitted from the light-emitting element is emitted in an oblique direction and cannot be extracted to the outside due to total reflection at the interfaces within the display panel and reflection or absorption by structures. By providing a convex lens, the light emitted in an oblique direction from the light-emitting element can be refracted toward the upper surface of the display panel. In other words, the front brightness can be increased.

[0047] Ideally, a hemispherical lens would be used as a convex lens, as it provides a large refraction. However, in the S-stripe arrangement, as mentioned above, the shapes of the sub-pixels provided within a pixel are different, making it difficult to arrange a hemispherical lens.

[0048] 3A, if the hemispherical lenses HL included in each subpixel are arranged separately, the adjacent hemispherical lenses HL will be joined together, resulting in a loss of some of their lens function.Furthermore, the path of light emitted from the subpixel will become complicated, causing light to intrude into adjacent pixels and resulting in color mixing.

[0049] Therefore, in one embodiment of the present invention, as shown in Figure 3B, the shape in top view is made approximately quadrangular depending on the shape of each subpixel, and adjacent lenses are separated from each other. Note that the "approximately quadrangular" refers to one or a combination of two or more of the following: a quadrangle, a quadrangle with corners deformed to have curvature, and a quadrangle with one or more sides deformed to have curvature. Furthermore, the shape in top view specifically refers to the outer shape of the planar portion of the plano-convex lens.

[0050] 3B , in each of lenses 102 having a substantially rectangular upper surface, the direction parallel to a first side of the substantially rectangular shape is defined as the x direction, and the direction perpendicular to the first side is defined as the y direction. In this case, it is preferable that the relationship in magnitude between the lengths of the flat surface sides of lens 102 and the relationship in magnitude between the radii of curvature of the convex surface sides of lens 102 are equal in cross sections including the optical axis in the x direction and the y direction.

[0051] Fig. 4A is a diagram showing a cross section of lens 102R taken in the y direction at a position including optical axis LA. Fig. 4B is a diagram showing a cross section of lens 102R taken in the x direction at a position including optical axis LA. Here, as shown in Fig. 3B, when the lengths of lens 102R in the x direction and y direction are Lx and Ly, respectively, Lx>Ly.

[0052] In one aspect of the present invention, the convex portions in each cross section of lens 102R have a shape that combines multiple curvatures, and at least the curvature C1 near the apex of the convex portion in the y direction is made larger than the curvature C2 near the apex of the convex portion in the x direction. In other words, at least the radius of curvature C1 near the apex of the convex portion in the y direction is made smaller than the radius of curvature C2 near the apex of the convex portion in the x direction.

[0053] That is, when Lx>Ly, it is preferable that the curvature of the convex portion near the apex in the y direction be greater than the curvature of the x direction. By making the shape near the apex in the y direction have a large curvature, the effect as a lens can be enhanced, while making the shape near the apex in the x direction have a small curvature, which can reduce the height of the lens and facilitate the manufacturing process.

[0054] 4A and 4B show the lens 102R as an example, the lenses 102G and 102B can also be configured in a similar manner according to the relationship between Lx and Ly. If Ly>Lx, then x and y can be interchanged in the above description. Furthermore, if Lx=Ly, the curvature of the convex side of the lens 102 can be the same in the x and y directions.

[0055] Next, we will explain a simulation for finding an appropriate shape for lens 102. Fig. 5A is a diagram illustrating model 102M used in the simulation corresponding to lens 102. Model 102M is a model constructed based on a shape obtained by reflowing a rectangular parallelepiped resin.

[0056] The model 102M is composed of a model 102M_x in which the curvature in the x direction is extracted from the base model, and a model 102M_y in which the curvature in the y direction is extracted from the base model. Note that the model 102M_t shown in FIG. 5A is a top view of an image composed of the model 102M_x and the model 102M_y.

[0057] Model 102M_x is a three-dimensional model extracted by fitting the shape in the x direction from the base model using a hemisphere Bx1 with a curvature radius of x1, a hemisphere Bx2 with a curvature radius of x2, and a frustum with a trapezoidal cross section. Model 102M_y is a three-dimensional model extracted by fitting the shape in the y direction from the base model using a hemisphere By1 with a curvature radius of y1, a hemisphere By2 with a curvature radius of y2, and a frustum with a trapezoidal cross section.

[0058] From model 102M_x and model 102M_y, as shown in model 102M_t, region 131 having two types of radii of curvature (x1, y1), region 132 having two types of radii of curvature (x2, y1), and region 133 having two types of radii of curvature (x2, y2) are assumed. Also, outside region 133, region 134 is assumed to have a larger radius of curvature than both radius of curvature x2 and radius of curvature y2 and can be considered a plane.

[0059] FIG. 5B is another diagram showing model 102M_x, illustrating the details of region 134. Region 134 is considered to be a trapezoid, with the bottom edge of the model being the lower base BL, the bottom edge of region 133 being the upper base UL, and the distance from the lower base BL to the upper base UL being the height H. The distance from the bottom edge of hemisphere Bx1 to the lower base BL is the second offset length ofs1, and the distance from the lower base BL to the bottom edge of hemisphere Bx2 is the first offset length ofs2. The spacing between adjacent lenses is also defined as SP. Similar settings are also made for model 102M_y.

[0060] Note that the curvature of region 131 can be considered to be the curvature of hemisphere Bx1, and the curvature of region 132 can be considered to be the curvature of hemisphere Bx2, but the curvature gradually decreases from the curvature of hemisphere Bx2 from region 133 to region 134. In other words, when regions 133 and 134 are considered to be one region 135, the lens 102 of one embodiment of the present invention has a first region (corresponding to region 131), a second region (corresponding to region 132), and a third region (corresponding to region 135) in this order on the wall surface extending from the apex on the convex side to the flat portion, and among the first to third regions, the radius of curvature of the second region is smallest.

[0061] 6A is a model diagram showing the model 102M represented by a lens LEN, its positional relationship with elements other than the lens LEN, and the refractive index n of each element. The lens LEN is located on a light-transmitting insulating resin RE1 provided on the light-emitting surface LS of the light-emitting element, and a light-transmitting insulating resin RE2 is disposed on the lens LEN and the insulating resin RE1. A film FLM is disposed on the insulating resin RE2. The light-receiving surface LR is disposed on the film FLM, with air assumed to be present between them.

[0062] The refractive index n of the insulating resin RE1 and the lens LEN is 1.58, the refractive index n of the insulating resin RE2 is 1.41, the refractive index n of the film FLM is 1.5, and the refractive index n of air is 1. The distance between the upper surface of the film FLM and the light receiving surface LR is 350 mm.

[0063] Using the above-described models of FIGS. 5A, 5B, and 6A, the distance t ＲＥ１ , and the front luminance when the taper angle of the region 134 is changed, were calculated for each of the lenses 102R, 102G, and 102B shown in FIG. ＲＥ１ corresponds to the thickness of the planarization insulating film provided between the light emitting element and the lens.

[0064] The calculations were performed using LightTools, a lighting analysis simulator manufactured by Synopsys. As shown in Fig. 6B, the pixel size was assumed to be 7.92 µm on a side, and a display panel with a resolution of 3207 ppi was assumed. The light source for each subpixel was assumed to be an organic EL element, and the emission spectrum and orientation pattern of an actual element configuration were calculated and used using Setofos, an organic EL device simulator manufactured by Fluxim.

[0065] Strictly speaking, the sidewall of region 134 is a curved surface continuing from region 133, making it difficult to set the tangent. Therefore, the taper angle of region 134 was set to the angle θ between the line connecting the end points of the wall surface of region 135 and the perpendicular to the bottom surface of the model, as shown in FIG. 5B . The height H was set to a fixed value, which was the average value measured from multiple base models. Furthermore, as shown in FIG. 3B , a curvature with a radius of curvature r was assigned to each corner of lens 102R, lens 102G, and lens 102B. The parameters are as shown in Tables 1 and 2 (all in μm).

[0066]

[0067]

[0068] FIG. 7A shows the relationship between the front radiance ratio and the distance t ＲＥ１ The figure shows the results of a simulation showing the relationship between the radiance ratio and the front luminance of the display panel, and shows values ​​when the taper angle θ is changed from 65° to 90°. Note that the shape of the lens portion is the same, and the reference (ref.) corresponds to a lens that does not have a frustum region with a trapezoidal cross section. The front radiance ratio is a relative value when the value when a hemispherical lens is used is set to 1, and it can be said that the larger the value, the higher the front luminance of the display panel.

[0069] From the results shown in FIG. 7A, first, the distance t ＲＥ１ It can be seen that by setting the taper angle θ to 1 μm to 3 μm, the front radiance ratio can be increased compared to when a hemispherical lens is used. It can also be seen that by setting the taper angle θ to a relatively large value of about 65° to 75°, the front radiance ratio can be increased.

[0070] FIG. 7B shows the distance t ＲＥ１ 7B is a graph showing the relationship between the front radiance ratio and the taper angle θ, which is a simulation result when the distance t ＲＥ１ It can be seen that when the taper angle θ is between 65° and 80°, the front radiance ratio has a maximum value when the taper angle θ is between 1 μm and 3 μm.

[0071] FIG. 8A shows the relationship between the front radiance ratio and the distance t ＲＥ１The graph shows the simulation results for the relationship between the radiance and the angle of incidence, and the values ​​are shown when the taper angle θ is changed from 65° to 90°. The lens portion has the same shape, and ref. corresponds to a lens with no frustum region, which has a trapezoidal cross section. The front radiance ratio is a relative value when the value when a hemispherical lens is used is set to 1.

[0072] From the results shown in FIG. 8A, the distance t ＲＥ１ When the value of is large, the dependence of the taper angle θ becomes large, and there is a taper angle θ at which the front radiance ratio becomes large, but there is also a taper angle θ at which the front radiance ratio becomes lower than that of a hemispherical lens. ＲＥ１ When the distance t is between 1 μm and 3 μm, there are many taper angles that result in a higher front radiance ratio than when a hemispherical lens is used, and the dependency of the taper angle θ tends to be small. ＲＥ１ In the range of 1 μm to 3 μm, the front radiance ratio is high and is less susceptible to variations.

[0073] FIG. 8B shows the distance t ＲＥ１ 8B is a graph showing the relationship between the front radiance ratio and the taper angle θ, which is a simulation result when the distance t ＲＥ１ It can be seen that when the taper angle θ is between 65° and 80°, the front radiance ratio has a maximum value when the taper angle θ is between 1 μm and 3 μm.

[0074] FIG. 9A shows the relationship between the front radiance ratio and the distance t ＲＥ１ The graph shows the simulation results for the relationship between the radiance and the angle of incidence, and the values ​​are shown when the taper angle θ is changed from 65° to 90°. The lens portion has the same shape, and ref. corresponds to a lens with no frustum region, which has a trapezoidal cross section. The front radiance ratio is a relative value when the value when a hemispherical lens is used is set to 1.

[0075] From the results shown in FIG. 9A, it can be seen that the distance t ＲＥ１ 9B shows that the distance t ＲＥ１10 is a diagram showing the relationship between the front radiance ratio and the taper angle θ, which is a simulation result when the taper angle θ is set to 1 μm to 3 μm. The front radiance ratio tends to improve as the taper angle θ becomes smaller.

[0076] Considering the results of FIGS. 7A to 9B and the fact that the lenses 102R, 102G, and 102B are manufactured in the same process, the distance t ＲＥ１ is 1 μm to 3 μm, preferably 2 μm to 3 μm, and the taper angle θ is 65° to 80°, preferably 70° to 75°. By adopting such a configuration, it can be said that it is easy to increase the front brightness of the display panel.

[0077] Note that a light-emitting element that can be used in one embodiment of the present invention preferably has an MML (metal maskless) structure in which a light-emitting layer is separately formed using a lithography process without using a FMM (fine metal mask). A light-emitting element with an MML structure can have a higher aperture ratio than a light-emitting element manufactured using an FMM, and can emit light with high luminance or low power consumption. One embodiment of the present invention has a structure in which a light-emitting element with an MML structure is combined with a convex lens to further increase the light extraction efficiency.

[0078] Fig. 10A shows a cross section corresponding to A1-A2 shown in Fig. 3B. As described above, pixel 101 has subpixels 105R, 105G, and 105B. However, the description of subpixel 105R will be omitted here, and only subpixels 105G and 105B will be described. Note that the description of subpixels 105G and 105B can be referred to for the subpixel 105R.

[0079] The light emitting element 110G of the sub-pixel 105G and the light emitting element 110B of the sub-pixel 105B are provided on a substrate 161. The substrate 161 includes a support, as well as elements of a pixel circuit.

[0080] It is preferable to use, for example, an OLED (organic light-emitting diode) or a QLED (quantum-dot light-emitting diode) as the light-emitting element 110G and the light-emitting element 110B. As the light-emitting substance contained in the EL element, not only an organic compound but also an inorganic compound (such as a quantum dot material) can be used.

[0081] The light-emitting element 110G has a pixel electrode 111G, an organic layer 112G, a common layer 114, and a common electrode 113. The light-emitting element 110B has a pixel electrode 111B, an organic layer 112B, a common layer 114, and a common electrode 113. The common layer 114 and the common electrode 113 are provided in common to the light-emitting element 110G and the light-emitting element 110B.

[0082] The organic layer 112G of the light-emitting element 110G contains a light-emitting organic compound that emits at least green light. The organic layer 112B of the light-emitting element 110B contains a light-emitting organic compound that emits at least blue light. The organic layer 112G and the organic layer 112B can also be called EL layers, and each include at least a layer containing a light-emitting substance (light-emitting layer).

[0083] Hereinafter, when describing matters common to light emitting element 110G and light emitting element 110B, they may be referred to as light emitting element 110. Similarly, when describing matters common to components distinguished by alphabets, such as organic layer 112G and organic layer 112B, they may be described using symbols without the alphabets.

[0084] The organic layer 112 and the common layer 114 can each independently have one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer. For example, the organic layer 112 can have a stacked structure of a hole injection layer, a hole transport layer, a light-emitting layer, and an electron transport layer from the pixel electrode 111 side, and the common layer 114 can have an electron injection layer.

[0085] The pixel electrode 111G and the pixel electrode 111B are provided for each light-emitting element. The common electrode 113 and the common layer 114 are provided as a continuous layer common to each light-emitting element. A conductive film that is translucent to visible light is used for either the pixel electrode or the common electrode 113, and a conductive film that is reflective is used for the other. By making each pixel electrode translucent and the common electrode 113 reflective, a bottom-emission display device can be obtained. Conversely, by making each pixel electrode reflective and the common electrode 113 translucent, a top-emission display device can be obtained. Incidentally, by making both the pixel electrodes and the common electrode 113 translucent, a dual-emission display device can also be obtained.

[0086] A protective layer 121 is provided on the common electrode 113 to cover the light emitting elements 110G and 110B. The protective layer 121 has a function of preventing impurities such as water from diffusing from above into each light emitting element.

[0087] The edge of the pixel electrode 111 preferably has a tapered shape. When the edge of the pixel electrode 111 has a tapered shape, the organic layer 112 provided along the edge of the pixel electrode 111 can also have an inclined portion. By tapering the edge of the pixel electrode 111, the coverage of the organic layer 112 provided over the edge of the pixel electrode 111 can be improved. Furthermore, by tapering the side surface of the pixel electrode 111, foreign matter (for example, also referred to as dust or particles) during the manufacturing process can be easily removed by a process such as cleaning, which is preferable.

[0088] In this specification and the like, the term "tapered shape" refers to a shape in which at least a part of a side surface of a structure is inclined with respect to a substrate surface. For example, it is preferable that the structure has a region in which the angle between the inclined side surface and the substrate surface (also referred to as the taper angle) is less than 90°.

[0089] The organic layer 112 is processed into an island shape using, for example, a resist mask formed by lithography. As a result, the organic layer 112 has a shape in which the angle between the top surface and the side surface is close to 90 degrees at its edge. On the other hand, an organic film formed using FMM (Fine Metal Mask) or the like tends to be gradually thinner toward the edge, and the top surface is formed in a sloped shape over a range of, for example, 1 μm to 10 μm, making it difficult to distinguish between the top surface and the side surface.

[0090] Between two adjacent light emitting elements, an insulating layer 124, an insulating layer 125 and a resin layer 126 are provided.

[0091] Between two adjacent light-emitting elements, the side surfaces of the organic layers 112 face each other with the resin layer 126 sandwiched therebetween. The resin layer 126 is located between the two adjacent light-emitting elements and is provided so as to fill the ends of each organic layer 112 and the region between the two organic layers 112. The resin layer 126 has a smooth, convex upper surface, and a common layer 114 and a common electrode 113 are provided to cover the upper surface of the resin layer 126.

[0092] The resin layer 126 functions as a planarizing film that fills in the step between two adjacent light-emitting elements. By providing the resin layer 126, it is possible to prevent the common electrode 113 from being separated by the step at the end of the organic layer 112 (also called step disconnection), which would otherwise occur and result in insulation of the common electrode on the organic layer 112.

[0093] Furthermore, the organic layers 112 of the adjacent light-emitting elements 110 are insulated from each other by the resin layer 126. This reduces leakage current between the adjacent light-emitting elements via the organic layers 112, thereby suppressing unnecessary light emission due to crosstalk.

[0094] An insulating layer containing an organic material can be suitably used as the resin layer 126. For example, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimideamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenolic resin, precursors of these resins, etc. can be used as the resin layer 126. Alternatively, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin can be used as the resin layer 126.

[0095] Furthermore, a photosensitive resin can be used as the resin layer 126. A photoresist can be used as the photosensitive resin. The photosensitive resin can be a positive-type material or a negative-type material.

[0096] The resin layer 126 may contain a material that absorbs visible light. For example, the resin layer 126 itself may be made of a material that absorbs visible light, or the resin layer 126 may contain a pigment that absorbs visible light. For example, the resin layer 126 may be a resin that can be used as a color filter that transmits red, blue, or green light and absorbs other light, or a resin that contains carbon black as a pigment and functions as a black matrix.

[0097] The resin layer 126 absorbs light emitted from the light-emitting element in an oblique direction, thereby suppressing light leakage (stray light) from the light-emitting element to an adjacent light-emitting element through the resin layer 126. This improves the display quality of the display device. Furthermore, since the display quality can be improved without using a polarizing plate in the display device, the display device can be made lighter and thinner.

[0098] The insulating layer 125 is provided in contact with the side surface of the organic layer 112. The insulating layer 125 is also provided to cover the upper end portion of the organic layer 112. A portion of the insulating layer 125 is provided in contact with the upper surface of the substrate 161.

[0099] The insulating layer 125 is located between the resin layer 126 and the organic layer 112, and functions as a protective film to prevent the resin layer 126 from contacting the organic layer 112. If the organic layer 112 and the resin layer 126 come into contact with each other, the organic layer 112 may be dissolved by an organic solvent or the like used when forming the resin layer 126. Therefore, by providing the insulating layer 125 between the organic layer 112 and the resin layer 126, it is possible to protect the side surfaces of the organic layer 112.

[0100] The insulating layer 125 can be an insulating layer containing an inorganic material. For example, an inorganic insulating film such as an insulating oxide film, a nitride insulating film, an oxynitride insulating film, or a nitride oxide insulating film can be used for the insulating layer 125. The insulating layer 125 may have a single-layer structure or a stacked-layer structure. Examples of oxide insulating films include a silicon oxide film, an aluminum oxide film, a magnesium oxide film, an indium gallium zinc oxide film, a gallium oxide film, a germanium oxide film, an yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, a neodymium oxide film, a hafnium oxide film, and a tantalum oxide film. Examples of nitride insulating films include a silicon nitride film and an aluminum nitride film. Examples of oxynitride insulating films include a silicon oxynitride film and an aluminum oxynitride film. Examples of nitride oxide insulating films include a silicon nitride oxide film and an aluminum nitride oxide film. In particular, by using a metal oxide film such as an aluminum oxide film or a hafnium oxide film formed by an ALD method, or an inorganic insulating film such as a silicon nitride film or a silicon oxide film, as the insulating layer 125, an insulating layer 125 with few pinholes and excellent protection of the EL layer can be formed.

[0101] In this specification and elsewhere, an oxynitride refers to a material whose composition contains more oxygen than nitrogen, and a nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0102] The insulating layer 125 can be formed by a sputtering method, a CVD method, a PLD method, an ALD method, or the like. The insulating layer 125 is preferably formed by an ALD method because it has good coverage.

[0103] Furthermore, a reflective film (e.g., a metal film containing one or more selected from silver, palladium, copper, titanium, aluminum, etc.) may be provided between the insulating layer 125 and the resin layer 126, so that the light emitted from the light-emitting layer is reflected by the reflective film, thereby improving the light extraction efficiency.

[0104] The insulating layer 124 is a portion of a protective layer (also referred to as a mask layer or a sacrificial layer) that protects the organic layer 112 when the organic layer 112 is etched. The insulating layer 124 can be made of the same material as can be used for the insulating layer 125. In particular, it is preferable to use the same material for the insulating layer 124 and the insulating layer 125 because this allows the use of common processing equipment and the like.

[0105] In particular, metal oxide films such as aluminum oxide films and hafnium oxide films, or inorganic insulating films such as silicon nitride films and silicon oxide films formed by the ALD method have few pinholes and are therefore excellent in the function of protecting the EL layer, and can be suitably used for the insulating layer 125 and the insulating layer 124.

[0106] The protective layer 121 may have, for example, a single-layer structure or a stacked structure including at least an inorganic insulating film. Examples of the inorganic insulating film include oxide films or nitride films such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, and a hafnium oxide film. Alternatively, the protective layer 121 may be made of a semiconductor material or a conductive material such as indium gallium oxide, indium zinc oxide, indium tin oxide, or indium gallium zinc oxide.

[0107] Furthermore, a planarization film 127 is provided on the protective layer 121. For example, the organic material that can be used for the resin layer 126 can be used as the planarization film 127. By forming the planarization film 127, the influence of uneven shapes caused by the underlying structure can be reduced, making it easier to form structures such as a lens array. The configuration from the substrate 161 to the planarization film 127 corresponds to the stacked body 100 shown in FIG. 1.

[0108] Lenses 102 (lenses 102G and 102B), which are plano-convex lenses, are provided on the planarization film 127 so as to overlap the light-emitting element 110. Furthermore, a layer 128 is provided on the lenses 102. The lenses 102 are provided in pairs with the light-emitting element 110. In other words, one lens 102 is provided for each sub-pixel.

[0109] The lens 102 is provided above the light-emitting element 110 (in the direction in which the light is emitted). Since the light emitted by the light-emitting element 110 has a certain degree of divergence, light that is not extracted to the outside of the display device is lost. Therefore, it is preferable for the display device to have high front luminance. Since the lens 102 has a convex lens shape, it can act in a direction to converge light. In other words, it can suppress the divergence of light emitted by the light-emitting element, thereby increasing the light extraction efficiency of the display device. The lens 102 can be manufactured using the same material and process as the resin layer 126.

[0110] The layer 128 is an adhesive layer provided between the substrate 163 and the substrate 163, and is preferably made of an organic material. For example, an optical adhesive having a refractive index close to that of the glass or film that can be used as the substrate 163 can be used.

[0111] The above is a description of an example of the configuration of the light emitting element and its vicinity.

[0112] 10A shows an example in which the lenses 102G and 102B have the same height, but this is not limiting. For example, as shown in FIG. 10B, the heights of the lenses 102G and 102B may be different. The shape of the sub-pixels in a top view may differ depending on the emitted color, and lenses of an appropriate shape may be provided depending on the light emitted by each sub-pixel.

[0113] 11A, the lens 102G and the lens 102B may be joined near their respective ends. To prevent stray light, it is preferable that adjacent lenses are separated. However, by joining adjacent lenses, the width of the lenses increases, allowing for a larger amount of light to be incident on the lens 102 from the light-emitting element 110. This increases the light extraction efficiency of the display panel. To suppress stray light, it is preferable to make the height of the lens joint as low as possible.

[0114] 11B, the planarization film 127 and the lens 102 may be formed from materials with the same refractive index. For example, by forming the planarization film 127 and the lens 102 from the same resin material, it is possible to improve adhesion at the interface. Furthermore, by using the same material and sharing manufacturing equipment, it is possible to reduce manufacturing costs.

[0115] 10A, the planarization film 127, the lens 102, and the layer 128, which are the paths of light emitted by the light emitting element 110, may be configured so that the refractive index gradually decreases. For straight light that does not undergo refraction, providing steps so that the refractive index gradually decreases in the direction of light propagation can reduce the refractive index step at each interface, thereby reducing reflection at the interface. Therefore, it can be said that the extraction efficiency of straight light can be improved. This effect can be derived from Fresnel's equation.

[0116] The configurations shown in FIGS. 10A to 11B can be combined as appropriate.

[0117] Although it has been described above that the light extraction efficiency from a display panel can be improved by providing a lens of one embodiment of the present invention over a light-emitting element, using a light-emitting element with higher emission efficiency is also effective in improving the front luminance of a display panel. In principle, the luminance of a tandem organic EL element increases depending on the number of layers stacked at the same current density, and a two-layer tandem organic EL element can achieve twice the luminance of a single light-emitting element.

[0118] Furthermore, because the lifespan of an organic EL element depends on the current density, even if the brightness of a tandem organic EL element is doubled, the lifespan will be equivalent to that of a single organic EL element if the current density is the same. In other words, tandem organic EL elements are an effective technology for increasing the brightness and reliability of organic EL elements.

[0119] 12 is a diagram comparing the current efficiency of organic EL elements with different structures. The comparison targets are a white light-emitting element + CF (color filter) structure, a single SBS element with an MML structure, a tandem SBS element (two stages) with an MML structure, and a tandem SBS element (two stages) with an MML structure using a lens according to one embodiment of the present invention + MLA (microlens array). Note that SBS (Side By Side) refers to a structure in which at least the light-emitting layers are separately fabricated in light-emitting devices with different emission wavelengths.

[0120] Table 3 also shows the all-white luminance and current efficiency of each organic EL element structure. The current efficiency was calculated based on the results of displaying D65 white using the R (red), G (green), and B (blue) subpixels on a test piece fabricated at over 3000 ppi. Figure 13A is a photograph of a pixel with an S-stripe arrangement in which an MLA has been added to an organic EL element with an MML structure. Figure 13B is a planar SEM photograph of the pixel with an S-stripe arrangement after the MLA has been formed. Figure 13C is a bird's-eye view SEM photograph of the pixel with an S-stripe arrangement after the MLA has been formed.

[0121]

[0122] The white light emitting element + CF structure is an organic EL element with a two-stage tandem structure of blue / yellow, and is fabricated by vacuum deposition using a metal mask. The total white luminance is 5000 cd / m ２ The current efficiency at 10 cd / A was about 10 cd / A, and the current density of the light-emitting element of each color was 100 mA / cm ２ This current density value is considered to be too large to ensure sufficient reliability in a typical organic EL element, and is insufficient from the viewpoints of high brightness and high reliability.

[0123] The advantages of the MML structure SBS single element are that the performance of each light-emitting element can be optimized with SBS and there is no light attenuation due to CF. ２ The current efficiency at 1000 cd / A is over 20 cd / A, and the current density of the light-emitting element of each color is 50 to 75 mA / cm ２ This current density value can be said to be within the range that can ensure the reliability required for the product.

[0124] In the SBS tandem organic EL element of the MML structure, the R (red) subpixel has an organic EL element with a red / red two-stage tandem structure, the G (green) subpixel has an organic EL element with a green / green two-stage tandem structure, and the B (blue) subpixel has an organic EL element with a blue / blue two-stage tandem structure.

[0125] The tandem organic EL element of SBS with MML structure has a total white luminance of 15,000 cd / m ２ The current efficiency at 15,000 cd / m exceeds 40 cd / A, which is approximately 3.5 times higher than that of the white light-emitting element + CF structure. This is because the current efficiency is doubled compared to a single SBS element with an MML structure. ２ Even at such high brightness, the current density is the same as that of a single SBS element with an MML structure, and it can be said that this is within the range in which reliability can be ensured.

[0126] When MLA is added to a tandem-type organic EL device of SBS with an MML structure, the total white luminance is increased to 15,000 cd / m due to the improvement of light extraction efficiency by MLA. ２ The current density at ２ The current efficiency is improved by approximately six times compared to the white light-emitting element + CF structure. Simulation results have also shown that the use of an MLA in an S-stripe arrangement can improve brightness by approximately 1.3 to 1.5 times. Furthermore, it is expected that the required current can be significantly reduced to achieve the same brightness as without an MLA. Therefore, it can be said that it is possible to provide products with higher reliability or brightness compared to products without an MLA.

[0127] 14A to 14C are graphs comparing the luminance-current density characteristics of SBS tandem elements with and without MLA in an MML structure. Fig. 14A shows the characteristics of a red (R) light-emitting element, Fig. 14B shows the characteristics of a green (G) light-emitting element, and Fig. 14C shows the characteristics of a blue (B) light-emitting element. The aperture ratios of R, G, and B are 13.2%, 13.2%, and 27.0%, respectively.

[0128] Here, the luminance is the effective luminance including the influence of the aperture ratio, and white 15,000 cd / m ２ In this case, the sum of the luminance of R, G, and B is 15,000 cd / m ２ For each of the R, G, and B elements, white 15,000 cd / m without MLA ２ A high current density is required to obtain a luminance of 40 mA / cm with MLA. ２ This is within a range that can ensure sufficient reliability.

[0129] Table 4 shows white 15,000 cd / m ２ The results of calculating the current efficiency of each color when the following conditions are met are shown below. The numerical values ​​in parentheses for the improvement rate are values ​​obtained from simulations.

[0130]

[0131] The actual improvement in current efficiency was about 1.5 to 1.7 times, which is higher than the simulation result. This is because the simulation only considers optical factors, but in reality, it is necessary to take into account changes in characteristics due to the brightness of the OLED.

[0132] 14A to 14C, it can be seen that the slope is smaller in the high-brightness region. This is called the roll-off of the current efficiency of the organic EL element, and indicates that light emission is somewhat inefficient in the high-brightness region where the current density is high. While driving in the roll-off region is necessary without the MLA, with the MLA, the current efficiency is improved, making it possible to drive outside the roll-off region where the current density is low. Therefore, better results than those obtained by simulation may be obtained.

[0133] As can be seen from this example, even when high brightness is required, it is effective to drive the OLED element in its efficient region, and optical technology such as MLA is extremely important.

[0134] 15A is a block diagram illustrating a display device according to one embodiment of the present invention. The display device 20 includes a pixel array 74, a circuit 75, and a circuit 76. The pixel array 74 includes pixels 40 arranged in a column direction and a row direction.

[0135] The pixel 40 can have a plurality of sub-pixels 71. The sub-pixels 71 have the function of emitting light for display. By assigning colors such as R (red), G (green), and B (blue) to the light emitted by the sub-pixels 71, a full-color display can be achieved.

[0136] The subpixel 71 has a light-emitting device that emits unpolarized visible light. As the light-emitting device, it is preferable to use an EL element such as an OLED (organic light-emitting diode) or a QLED (quantum-dot light-emitting diode). Examples of light-emitting materials that the EL element has include fluorescent materials, phosphorescent materials, thermally activated delayed fluorescence (TADF) materials, and inorganic compounds (quantum dot materials). Alternatively, an LED such as a micro LED can be used as the light-emitting device.

[0137] The circuit 75 and the circuit 76 are driver circuits for driving the sub-pixel 71. The circuit 75 can function as a source driver circuit, and the circuit 76 can function as a gate driver circuit. The circuits 75 and 76 can be, for example, shift register circuits.

[0138] The display device 20 may be divided into a plurality of regions vertically and horizontally, and pixels may be driven for each divided region.

[0139] 15B , the circuit 75 and the circuit 76 can be separately arranged below the pixel array 74. In this case, the display device 20 has a laminated structure of a layer 77 and a layer 78, and a plurality of the circuits 75 and a plurality of the circuits 76 are provided on the layer 77, and the pixel array 74 is provided on the layer 78 so as to overlap the circuits 75 and the circuits 76.

[0140] By dividing the circuit 75 and the circuit 76, the pixel array 74 can be driven for each divided area. For example, the pixel array 74 can be operated at different frame rates in parts. The pixel array 74 can be displayed at different resolutions in parts, and can also be made compatible with foveated rendering.

[0141] Furthermore, by providing the driver circuit below the pixel array 74, the wiring length can be shortened and the wiring capacitance can be reduced. This allows the display device 20 to operate at high speed and with low power consumption. Furthermore, the display device 20 can have a narrow frame.

[0142] 15B is an example and can be changed as appropriate. Part of the circuit 75 and the circuit 76 can be formed in the same layer as the pixel array 74. The layer 77 may also include circuits such as a memory circuit, an arithmetic circuit, and a communication circuit.

[0143] In this structure, for example, the layer 77 is provided on a single crystal silicon substrate, the circuits 75 and 76 are formed using transistors having silicon in their channel formation regions (hereinafter referred to as Si transistors), and the pixel circuits included in the pixel array 74 provided in the layer 78 are formed using transistors having metal oxide in their channel formation regions (hereinafter referred to as OS transistors). The OS transistor can be formed using a thin film and can be stacked on the Si transistor.

[0144] 15C , a structure may be adopted in which a layer 79 including an OS transistor is provided between the layer 77 and the layer 78. The layer 79 may include an OS transistor that forms part of a pixel circuit included in the pixel array 74. Alternatively, the layer 79 may include an OS transistor that forms part of the circuit 75 and the circuit 76. Alternatively, the layer 77 may include an OS transistor that forms part of a circuit such as a memory circuit, an arithmetic circuit, or a communication circuit.

[0145] Furthermore, the shape of the display device 20 when viewed from above is not limited to a rectangle, but may be a circle as shown in Fig. 15D, or a polygon such as an octagon as shown in Fig. 15E.

[0146] 16A is a diagram showing an example of an eyeglass-type device having a display device and an optical device according to one embodiment of the present invention. Here, a combination of a display device 20 and an optical device 21 is shown by a dashed line as a display unit 60. FIG. 16C is a diagram illustrating elements of the display unit 60.

[0147] The user can view the image displayed on the display device 20 by bringing their eyes close to the optical device 21 provided on the display surface side of the display device 20. The user can view the image with the viewing angle widened by the optical device 21, which gives the user a sense of immersion and realism.

[0148] A linear polarizer 62 and a retardation film 63 can be attached to the display surface of the display device 20. The optical device 21 can have a configuration including, for example, a half mirror 64, a lens 65, a retardation film 66, a reflective polarizer 67, and a lens 68.

[0149] The optical device 21 converts the light emitted by the display device 20 into linearly polarized light or circularly polarized light and utilizes it to selectively reflect or transmit light at elements arranged on the optical path. This allows the optical path length to be secured within a limited space, and the focal length of the optical device to be shortened. This type of optical system is called a catadioptric system. It is also sometimes called a pancake lens due to its thin shape.

[0150] The two display units 60 are incorporated into the housing 30 so that the surfaces of the lenses 68 are exposed on the inside. One display unit 60 is for the right eye, and the other display unit 60 is for the left eye, and by displaying images corresponding to the parallax on each display unit 60, the user can feel the three-dimensionality of the image.

[0151] Furthermore, the housing 30 or the holder 35 may be provided with an input terminal and an output terminal. The input terminal can be connected to a cable that supplies a video signal from a video output device or the like, power for charging the battery, etc. The output terminal, for example, functions as an audio output terminal, and can be connected to earphones, headphones, etc. Note that if the device is configured to be able to output audio data via wireless communication, or if audio is output from an external video output device, the audio output terminal need not be provided.

[0152] Furthermore, a wireless communication module and a storage module may be provided inside the housing 30 or the holder 35. The wireless communication module performs wireless communication, and the content to be viewed can be downloaded and stored in the storage module. This allows the user to view the downloaded content offline.

[0153] 16B , a line-of-sight detection sensor 41 may be provided within the housing 30. The line-of-sight detection sensor 41 detects the position of the gaze by detecting changes in the reflected light due to iris movement using light emitted from a light source 42 provided within the housing 30. The light emitted by the light source 42 is preferably near-infrared light, which has extremely low visibility. For example, operation buttons such as power on, power off, sleep, volume adjustment, channel change, menu display, selection, decision, and back, as well as operation buttons such as video play, stop, pause, fast forward, and fast rewind, may be displayed, and the respective operations can be performed by visually recognizing the operation buttons. Furthermore, the user's level of fatigue may be detected based on the number of blinks, and an alert may be displayed.

[0154] By using the display device of one embodiment of the present invention for a glasses-type device, the electronic device can have low power consumption and high reliability.

[0155] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification.

[0156] Embodiment 2 In this embodiment, a structural example of a display panel that can be used as a display device according to one embodiment of the present invention will be described.

[0157] The display panel of this embodiment is a high-definition display panel, and is particularly suitable for use as the display section of VR devices such as head-mounted displays, and wearable devices that can be worn on the head, such as eyeglass-type AR devices.

[0158] 17A shows a perspective view of a display module 280. The display module 280 has a display panel 200A and an FPC 290. Note that the display panel included in the display module 280 is not limited to the display panel 200A, and may be any of display panels 200B to 200G described below.

[0159] The display module 280 has a substrate 291 and a substrate 292. The display module 280 has a display unit 281. The display unit 281 is an area for displaying an image.

[0160] 17B is a perspective view schematically illustrating the configuration on the substrate 291 side. A circuit portion 282, a pixel circuit portion 283 on the circuit portion 282, and a pixel portion 284 on the pixel circuit portion 283 are stacked on the substrate 291. A terminal portion 285 for connecting to the FPC 290 is provided in a portion of the substrate 291 that does not overlap with the pixel portion 284. The terminal portion 285 and the circuit portion 282 are electrically connected by a wiring portion 286 composed of a plurality of wirings.

[0161] The pixel section 284 has a plurality of periodically arranged pixels 284a. An enlarged view of one pixel 284a is shown on the right side of Fig. 17B. The pixel 284a has a light-emitting element 110R that emits red light, a light-emitting element 110G that emits green light, and a light-emitting element 110B that emits blue light.

[0162] The pixel circuit portion 283 has a plurality of pixel circuits 283a arranged periodically. Each pixel circuit 283a is a circuit that controls the light emission of three light-emitting devices included in one pixel 284a. One pixel circuit 283a may be configured to have three circuits that control the light emission of one light-emitting device. For example, the pixel circuit 283a may be configured to have at least one selection transistor, one current control transistor (drive transistor), and a capacitor for each light-emitting device. In this case, a gate signal is input to the gate of the selection transistor, and a source signal is input to the source. This realizes an active matrix display panel.

[0163] The circuit portion 282 includes a circuit for driving each pixel circuit 283a in the pixel circuit portion 283. For example, it is preferable that the circuit portion 282 includes one or both of a gate line driver circuit and a source line driver circuit. In addition, the circuit portion 282 may include at least one of an arithmetic circuit, a memory circuit, a power supply circuit, and the like. Furthermore, a transistor provided in the circuit portion 282 may constitute a part of the pixel circuit 283a. That is, the pixel circuit 283a may be composed of a transistor included in the pixel circuit portion 283 and a transistor included in the circuit portion 282.

[0164] The FPC 290 functions as wiring for supplying a video signal, a power supply potential, etc. from the outside to the circuit portion 282. An IC may be mounted on the FPC 290.

[0165] The display module 280 can be configured such that one or both of the pixel circuit unit 283 and the circuit unit 282 are provided overlapping below the pixel unit 284, thereby enabling the aperture ratio (effective display area ratio) of the display unit 281 to be extremely high. For example, the aperture ratio of the display unit 281 can be set to 40% or more and less than 100%, preferably 50% or more and 95% or less, and more preferably 60% or more and 95% or less. Furthermore, the pixels 284a can be arranged at an extremely high density, enabling the pixel density of the display unit 281 to be extremely high. For example, it is preferable that the pixels 284a be arranged in the display unit 281 at a pixel density of 2000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and even more preferably 6000 ppi or more, and 20,000 ppi or less, or 30,000 ppi or less.

[0166] Because such a display module 280 has extremely high resolution, it can be suitably used in VR devices such as head-mounted displays, or eyeglass-type AR devices. For example, even in a configuration in which the display unit of the display module 280 is viewed through lenses, the display module 280 has an extremely high-resolution display unit 281, so even if the display unit is enlarged with the lenses, the pixels are not visible, allowing for a highly immersive display. Furthermore, the display module 280 is not limited to this, and can be suitably used in electronic devices with relatively small display units. For example, it can be suitably used in the display unit of a wearable electronic device such as a wristwatch.

[0167] [Display Panel 200A] The display panel 200A shown in FIG. 18 includes a substrate 301, light-emitting elements 110R, 110G, and 110B, a capacitor 240, and a transistor 310.

[0168] Substrate 301 corresponds to substrate 291 in FIGS. 17A and 17B.

[0169] The transistor 310 has a channel formation region in a substrate 301. The substrate 301 can be, for example, a semiconductor substrate such as a single crystal silicon substrate. The transistor 310 includes a part of the substrate 301, a conductive layer 311, a low-resistance region 312, an insulating layer 313, and an insulating layer 314. The conductive layer 311 functions as a gate electrode. The insulating layer 313 is located between the substrate 301 and the conductive layer 311 and functions as a gate insulating layer. The low-resistance region 312 is a region in which the substrate 301 is doped with impurities and functions as one of a source and a drain. The insulating layer 314 is provided to cover a side surface of the conductive layer 311.

[0170] An element isolation layer 315 is provided between two adjacent transistors 310 so as to be embedded in the substrate 301 .

[0171] In addition, an insulating layer 261 is provided to cover the transistor 310 , and a capacitor 240 is provided over the insulating layer 261 .

[0172] The capacitor 240 has a conductive layer 241, a conductive layer 245, and an insulating layer 243 located therebetween. The conductive layer 241 functions as one electrode of the capacitor 240, the conductive layer 245 functions as the other electrode of the capacitor 240, and the insulating layer 243 functions as a dielectric of the capacitor 240.

[0173] The conductive layer 241 is provided over the insulating layer 261 and is buried in the insulating layer 254. The conductive layer 241 is electrically connected to one of the source and drain of the transistor 310 by a plug 271 buried in the insulating layer 261. The insulating layer 243 is provided to cover the conductive layer 241. The conductive layer 245 is provided in a region overlapping with the conductive layer 241 with the insulating layer 243 interposed therebetween.

[0174] An insulating layer 255a is provided to cover the capacitor 240, an insulating layer 255b is provided over the insulating layer 255a, and an insulating layer 255c is provided over the insulating layer 255b.

[0175] An inorganic insulating film can be preferably used for each of the insulating layers 255a, 255b, and 255c. For example, it is preferable to use a silicon oxide film for the insulating layer 255a and the insulating layer 255c, and a silicon nitride film for the insulating layer 255b. This allows the insulating layer 255b to function as an etching protection film. In this embodiment, an example is shown in which part of the insulating layer 255c is etched to form a recess, but the insulating layer 255c does not necessarily have to have a recess.

[0176] The light-emitting elements 110G and 110B are provided over the insulating layer 255c. Embodiment 1 can be referred to for the structures of the light-emitting elements 110G and 110B.

[0177] In the display panel 200A, a separate light-emitting device is fabricated for each emitted color, resulting in minimal change in chromaticity between light emitted at low and high luminance. Furthermore, because the organic layers 112G and 112B are spaced apart from each other, crosstalk between adjacent subpixels can be suppressed even in a high-resolution display panel. This makes it possible to realize a high-resolution display panel with high display quality.

[0178] An insulating layer 125 and a resin layer 126 are provided in the region between adjacent light emitting elements.

[0179] The pixel electrode 111G and the pixel electrode 111B of the light-emitting element are electrically connected to one of the source and drain of the transistor 310 via a plug 256 embedded in the insulating layers 255a, 255b, and 255c, a conductive layer 241 embedded in the insulating layer 254, and a plug 271 embedded in the insulating layer 261. The height of the top surface of the insulating layer 255c and the height of the top surface of the plug 256 are the same or approximately the same. Various conductive materials can be used for the plug.

[0180] A protective layer 121 is provided on the light emitting elements 110G and 110B. A substrate 163 is attached to the protective layer 121 with a layer 128 that functions as an adhesive layer.

[0181] There is no insulating layer covering the upper end of each pixel electrode 111 between two adjacent pixel electrodes 111. This allows the distance between adjacent light-emitting elements to be extremely narrow, resulting in a high-definition or high-resolution display panel.

[0182] 19 has a configuration in which a transistor 310A and a transistor 310B, each having a channel formed in a semiconductor substrate, are stacked. Note that in the following description of the display panel, descriptions of parts that are the same as those of the display panel described above may be omitted.

[0183] The display panel 200B has a structure in which a substrate 301B provided with a transistor 310B, a capacitor 240, and a light-emitting device and a substrate 301A provided with a transistor 310A are bonded together.

[0184] Here, an insulating layer 345 is provided on the lower surface of the substrate 301B, and an insulating layer 346 is provided on the insulating layer 261 provided on the substrate 301A. The insulating layers 345 and 346 function as protective layers and can suppress the diffusion of impurities into the substrates 301B and 301A. The insulating layers 345 and 346 can be made of an inorganic insulating film that can be used for the protective layer 121.

[0185] The substrate 301B is provided with a plug 343 that penetrates the substrate 301B and an insulating layer 345. Here, it is preferable to provide an insulating layer 344 that covers the side surface of the plug 343 and functions as a protective layer.

[0186] Furthermore, in the substrate 301B, a conductive layer 342 is provided below the insulating layer 345. The conductive layer 342 is embedded in the insulating layer 335, and the lower surfaces of the conductive layer 342 and the insulating layer 335 are flattened. The conductive layer 342 is electrically connected to a plug 343.

[0187] On the other hand, in the substrate 301A, a conductive layer 341 is provided on an insulating layer 346. The conductive layer 341 is embedded in the insulating layer 336, and the upper surfaces of the conductive layer 341 and the insulating layer 336 are flattened.

[0188] It is preferable to use the same conductive material for the conductive layers 341 and 342. For example, a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or a metal nitride film containing the above elements (titanium nitride film, molybdenum nitride film, tungsten nitride film), etc., can be used. In particular, it is preferable to use copper for the conductive layers 341 and 342. This allows for the application of Cu-Cu (copper-copper) direct bonding technology (technology that achieves electrical conductivity by connecting Cu (copper) pads together).

[0189] [Display Panel 200C] A display panel 200C shown in FIG. 20 has a configuration in which a conductive layer 341 and a conductive layer 342 are bonded via a bump 347.

[0190] 20 , by providing a bump 347 between the conductive layer 341 and the conductive layer 342, the conductive layer 341 and the conductive layer 342 can be electrically connected. The bump 347 can be formed using a conductive material containing, for example, gold (Au), nickel (Ni), indium (In), tin (Sn), or the like. Alternatively, for example, solder may be used as the bump 347. An adhesive layer 348 may be provided between the insulating layer 345 and the insulating layer 346. When the bump 347 is provided, the insulating layer 335 and the insulating layer 336 may not be provided.

[0191] [Display Panel 200D] The display panel 200D shown in FIG. 21 differs from the display panel 200A mainly in the configuration of the transistors.

[0192] The transistor 320 is a transistor (OS transistor) in which a metal oxide (also referred to as an oxide semiconductor) is used for a semiconductor layer in which a channel is formed.

[0193] The transistor 320 includes a semiconductor layer 321 , an insulating layer 323 , a conductive layer 324 , a pair of conductive layers 325 , an insulating layer 326 , and a conductive layer 327 .

[0194] Substrate 331 corresponds to substrate 291 in FIGS. 17A and 17B.

[0195] An insulating layer 332 is provided over a substrate 331. The insulating layer 332 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 331 to the transistor 320 and prevents oxygen from being released from the semiconductor layer 321 toward the insulating layer 332. The insulating layer 332 can be, for example, a film through which hydrogen or oxygen is less likely to diffuse than a silicon oxide film, such as an aluminum oxide film, a hafnium oxide film, or a silicon nitride film.

[0196] A conductive layer 327 is provided over the insulating layer 332, and an insulating layer 326 is provided to cover the conductive layer 327. The conductive layer 327 functions as a first gate electrode of the transistor 320, and part of the insulating layer 326 functions as a first gate insulating layer. An oxide insulating film such as a silicon oxide film is preferably used for at least a portion of the insulating layer 326 that is in contact with the semiconductor layer 321. The top surface of the insulating layer 326 is preferably planarized.

[0197] The semiconductor layer 321 is provided over the insulating layer 326. The semiconductor layer 321 preferably includes a metal oxide (also referred to as an oxide semiconductor) film exhibiting semiconductor characteristics. A pair of conductive layers 325 is provided on and in contact with the semiconductor layer 321 and functions as a source electrode and a drain electrode.

[0198] An insulating layer 328 is provided to cover top surfaces and side surfaces of the pair of conductive layers 325 and side surfaces of the semiconductor layer 321, and an insulating layer 264 is provided over the insulating layer 328. The insulating layer 328 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the insulating layer 264 or the like into the semiconductor layer 321 and prevents oxygen from being released from the semiconductor layer 321. The insulating layer 328 can be an insulating film similar to the insulating layer 332.

[0199] An opening reaching the semiconductor layer 321 is provided in the insulating layer 328 and the insulating layer 264. An insulating layer 323 in contact with the top surface of the semiconductor layer 321 and a conductive layer 324 are buried in the opening. The conductive layer 324 functions as a second gate electrode, and the insulating layer 323 functions as a second gate insulating layer.

[0200] The upper surfaces of the conductive layer 324, the insulating layer 323, and the insulating layer 264 are planarized so that their heights are the same or approximately the same, and insulating layers 329 and 265 are provided to cover them.

[0201] The insulating layer 264 and the insulating layer 265 function as interlayer insulating layers. The insulating layer 329 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the insulating layer 265 or the like to the transistor 320. The insulating layer 329 can be formed using an insulating film similar to the insulating layer 328 and the insulating layer 332.

[0202] A plug 274 electrically connected to one of the pair of conductive layers 325 is provided so as to be embedded in the insulating layer 265, the insulating layer 329, and the insulating layer 264. Here, the plug 274 preferably has a conductive layer 274a covering the side surfaces of the openings of the insulating layer 265, the insulating layer 329, the insulating layer 264, and the insulating layer 328 and a part of the upper surface of the conductive layer 325, and a conductive layer 274b in contact with the upper surface of the conductive layer 274a. In this case, it is preferable to use a conductive material through which hydrogen and oxygen do not easily diffuse as the conductive layer 274a.

[0203] Note that the structure of the transistor included in the display panel of this embodiment is not particularly limited. For example, a planar transistor, a staggered transistor, an inverted staggered transistor, or the like can be used. Furthermore, either a top-gate transistor or a bottom-gate transistor structure may be used. Alternatively, gates may be provided above and below a semiconductor layer in which a channel is formed.

[0204] The transistor 320 has a structure in which a semiconductor layer in which a channel is formed is sandwiched between two gates. The two gates may be connected and the transistor may be driven by supplying the same signal to them. Alternatively, the threshold voltage of the transistor may be controlled by applying a potential for controlling the threshold voltage to one of the two gates and a potential for driving to the other.

[0205] The crystallinity of a semiconductor material used for a semiconductor layer of a transistor is not particularly limited, and any of an amorphous semiconductor, a single-crystal semiconductor, and a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part) may be used. The use of a single-crystal semiconductor or a crystalline semiconductor is preferable because it can suppress deterioration of transistor characteristics.

[0206] The band gap of the metal oxide used for the semiconductor layer of the transistor is preferably 2 eV or more, more preferably 2.5 eV or more. Use of a metal oxide with a wide band gap can reduce the off-state current of the OS transistor.

[0207] The metal oxide preferably contains at least indium or zinc, and more preferably contains indium and zinc. For example, the metal oxide preferably contains indium, M (M is one or more selected from gallium, aluminum, yttrium, tin, silicon, boron, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and cobalt), and zinc.

[0208] Alternatively, the semiconductor layer of the transistor may contain silicon, such as amorphous silicon or crystalline silicon (such as low-temperature polysilicon or single-crystal silicon).

[0209] Examples of metal oxides that can be used in the semiconductor layer include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably contains two or three elements selected from indium, element M, and zinc. The element M is one or more elements selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium. In particular, the element M is preferably one or more elements selected from aluminum, gallium, yttrium, and tin.

[0210] When a metal oxide is used for the semiconductor layer, the metal oxide is preferably formed by a sputtering method or an ALD method. When the metal oxide is formed by a sputtering method, productivity and film density can be increased. When the metal oxide is formed by an ALD method, film coverage can be increased.

[0211] In particular, as the metal oxide used in the semiconductor layer, it is preferable to use an oxide containing indium, gallium, and zinc (also referred to as IGZO). Alternatively, it is preferable to use an oxide containing indium, tin, and zinc (also referred to as ITZO (registered trademark)). Alternatively, it is preferable to use an oxide containing indium, gallium, tin, and zinc. Alternatively, it is preferable to use an oxide containing indium, aluminum, and zinc (also referred to as IAZO). Alternatively, it is preferable to use an oxide containing indium, aluminum, gallium, and zinc (also referred to as IAGZO).

[0212] When the metal oxide used in the semiconductor layer is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably equal to or greater than the atomic ratio of M. Examples of atomic ratios of metal elements in such an In-M-Zn oxide include a composition of In:M:Zn=1:1:1 or thereabouts, In:M:Zn=1:1:1 or thereabouts, In:M:Zn=1:1:1.2 or thereabouts, In:M:Zn=1:3:2 or thereabouts, In:M:Zn=1:3:4 or thereabouts, In:M:Zn=2:1:3 or thereabouts, In:M:Zn=3:1:2 or thereabouts, In:M:Zn=4:2: Examples of such compositions include a composition of In:M:Zn=4:2:4.1 or a composition of In:M:Zn=5:1:3 or a composition of In:M:Zn=5:1:6 or a composition of In:M:Zn=5:1:7 or a composition of In:M:Zn=5:1:8 or a composition of In:M:Zn=6:1:6 or a composition of In:M:Zn=5:2:5 or a composition of In:M:Zn=5:2:5. Note that a composition of a similar ratio includes a range of ±30% of the desired atomic ratio.

[0213] Furthermore, it is preferable to use gallium or tin as the element M. Note that the element M may be a combination of two or more of the above elements. It is also preferable to use In:M:Zn=40:1:10 or a metal oxide thereof in the semiconductor layer. Specifically, it is preferable to use In:Sn:Zn=40:1:10 or a metal oxide thereof in the semiconductor layer.

[0214] For example, when describing a composition having an atomic ratio of In:Ga:Zn=4:2:3 or thereabout, this includes a case where, when In is taken as 4, Ga is 1 to 3 and Zn is 2 to 4. Furthermore, when describing a composition having an atomic ratio of In:Ga:Zn=5:1:6 or thereabout, this includes a case where, when In is taken as 5, Ga is more than 0.1 and 2 or less and Zn is 5 to 7. Furthermore, when describing a composition having an atomic ratio of In:Ga:Zn=1:1:1 or thereabout, this includes a case where, when In is taken as 1, Ga is more than 0.1 and 2 or less and Zn is more than 0.1 and 2 or less.

[0215] The semiconductor layer may also have two or more metal oxide layers with different compositions. For example, a stacked structure of a first metal oxide layer having an In:M:Zn=1:3:4 (atomic ratio) or a composition similar thereto and a second metal oxide layer having an In:M:Zn=1:1:1 (atomic ratio) or a composition similar thereto provided on the first metal oxide layer is preferably used. Gallium or aluminum is particularly preferably used as the element M.

[0216] Alternatively, for example, a stacked structure of any one selected from indium oxide, indium gallium oxide, and IGZO and any one selected from IAZO, IAGZO, and ITZO (registered trademark) may be used.

[0217] Examples of crystalline oxide semiconductors include c-axis-aligned crystalline (CAAC)-OS, nanocrystalline (nc)-OS, and the like.

[0218] An OS transistor has significantly higher field-effect mobility than a transistor using amorphous silicon. Furthermore, an OS transistor has significantly lower source-drain leakage current (also referred to as off-state current) in an off state, and can hold charge accumulated in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of an OS transistor can reduce the power consumption of a display panel.

[0219] Furthermore, to increase the emission luminance of a light-emitting device included in a pixel circuit, it is necessary to increase the amount of current flowing through the light-emitting device. To achieve this, it is necessary to increase the source-drain voltage of a driving transistor included in the pixel circuit. Since an OS transistor has a higher source-drain withstand voltage than a Si transistor, a high voltage can be applied between the source and drain of the OS transistor. Therefore, by using an OS transistor as the driving transistor included in a pixel circuit, it is possible to increase the amount of current flowing through the light-emitting device and increase the emission luminance of the light-emitting device.

[0220] Furthermore, when the transistor operates in the saturation region, the change in source-drain current of an OS transistor is smaller than that of a Si transistor in response to a change in gate-source voltage. Therefore, by using an OS transistor as a driving transistor included in a pixel circuit, the current flowing between the source and drain can be precisely controlled by changing the gate-source voltage, thereby controlling the amount of current flowing through the light-emitting device. This allows for a larger number of gray levels to be displayed in the pixel circuit.

[0221] Furthermore, in terms of the saturation characteristics of the current that flows when a transistor operates in the saturation region, an OS transistor can pass a more stable current (saturation current) than a Si transistor, even when the source-drain voltage gradually increases. Therefore, by using an OS transistor as a driving transistor, a stable current can be passed through a light-emitting device, even when the current-voltage characteristics of an EL device vary. In other words, when an OS transistor operates in the saturation region, the source-drain current of the OS transistor remains almost unchanged even when the source-drain voltage increases, thereby stabilizing the light-emitting luminance of the light-emitting device.

[0222] As described above, by using an OS transistor for a driving transistor included in a pixel circuit, it is possible to achieve "reduced power consumption," "increased light emission luminance," "multiple gray levels," "suppressed variations in light-emitting devices," and the like.

[0223] [Display Panel 200F] A display panel 200F shown in FIG. 22 has a stacked structure of a transistor 310 in which a channel is formed in a substrate 301 and a transistor 320 in which a channel is formed and a semiconductor layer containing metal oxide is formed.

[0224] An insulating layer 261 is provided to cover the transistor 310, and a conductive layer 251 is provided over the insulating layer 261. An insulating layer 262 is provided to cover the conductive layer 251, and a conductive layer 252 is provided over the insulating layer 262. The conductive layers 251 and 252 each function as wirings. An insulating layer 263 and an insulating layer 332 are provided to cover the conductive layer 252, and the transistor 320 is provided over the insulating layer 332. An insulating layer 265 is provided to cover the transistor 320, and a capacitor 240 is provided over the insulating layer 265. The capacitor 240 and the transistor 320 are electrically connected by a plug 274.

[0225] The transistor 320 can be used as a transistor that forms a pixel circuit. The transistor 310 can be used as a transistor that forms a pixel circuit or a driver circuit (gate line driver circuit, source line driver circuit) that drives the pixel circuit. The transistors 310 and 320 can be used as transistors that form various circuits such as an arithmetic circuit or a memory circuit.

[0226] With this configuration, not only pixel circuits but also driving circuits etc. can be formed directly below the light-emitting device, which makes it possible to make the display panel smaller than when driving circuits are provided around the periphery of the display area.

[0227] [Display Panel 200G] The display panel 200G shown in Fig. 23 has a configuration in which the transistor 320 of the display panel 200F shown in Fig. 22 is replaced with a transistor 320A (vertical transistor). Note that the configuration in which the transistor 320 is replaced with the transistor 320A can also be applied to the display panel 200D shown in Fig. 21.

[0228] 24A shows a cross-sectional view of the transistor 320A in the XZ plane, and FIG. 24B shows a cross-sectional view of the transistor 320A in the XY plane including the wiring 440.

[0229] The transistor 320A includes an oxide semiconductor 470, an insulator 430, and a conductor 420. The oxide semiconductor 470 functions as a semiconductor layer, the insulator 430 functions as a gate insulator, and the conductor 420 functions as a gate electrode. The wiring 450 has a region that functions as one of a source electrode and a drain electrode of the transistor 320A. The wiring 440 has a region that functions as the other of the source electrode and the drain electrode of the transistor 320A.

[0230] An opening 490 is provided through the wiring 440 and the insulator 480, reaching the wiring 450. The opening 490 has a columnar shape with a substantially circular upper surface. This structure allows for miniaturization or high integration of memory cells. Note that the side surface of the opening 490 is preferably perpendicular to the upper surface of the wiring 450.

[0231] At least a part of the oxide semiconductor 470 is disposed in the opening 490. Note that the oxide semiconductor 470 has a region in contact with the top surface of the wiring 450, a region in contact with the side surface of the wiring 440, and a region in contact with the side surface of the insulator 480 in the opening 490.

[0232] The insulator 430 is disposed so that at least a portion thereof covers the opening 490. The conductor 420 is disposed so that at least a portion thereof is located in the opening 490. Note that the conductor 420 is preferably provided so as to fill the opening 490, and preferably has a substantially circular shape in top view in order to increase the degree of integration.

[0233] As illustrated in FIG. 24A, the oxide semiconductor 470 includes a region 470i and regions 470na and 470nb that sandwich the region 470i.

[0234] The region 470na is a region of the oxide semiconductor 470 that is in contact with the wiring 450. At least a portion of the region 470na functions as one of the source region and the drain region of the transistor 320A. The region 470nb is a region of the oxide semiconductor 470 that is in contact with the wiring 440. At least a portion of the region 470nb functions as the other of the source region and the drain region of the transistor 320A. As shown in FIG. 24B , the wiring 440 is in contact with the entire periphery of the oxide semiconductor 470. Therefore, the other of the source region and the drain region of the transistor 320A can be formed along the entire periphery of a portion of the oxide semiconductor 470 that is formed in the same layer as the wiring 440.

[0235] The region 470i is a region sandwiched between the regions 470na and 470nb in the oxide semiconductor 470. At least part of the region 470i functions as a channel formation region of the transistor 320A. That is, the channel formation region of the transistor 320A is formed in a part of the oxide semiconductor 470 located between the wiring 450 and the wiring 440. It can also be said that the channel formation region of the transistor 320A is located in a region of the oxide semiconductor 470 that is in contact with the insulator 480 or in a region in the vicinity of the insulator 480.

[0236] The channel length of the transistor 320A is the distance between the source region and the drain region. In other words, the channel length of the transistor 320A can be determined by the thickness of the insulator 480 on the wiring 450. In FIG. 24A , the channel length L of the transistor 320A is indicated by a dashed double-headed arrow. The channel length L is the distance between the end of the region where the oxide semiconductor 470 and the wiring 450 contact each other and the end of the region where the oxide semiconductor 470 and the wiring 440 contact each other in a cross-sectional view. In other words, the channel length L corresponds to the length of the side surface of the insulator 480 on the opening 490 side in a cross-sectional view.

[0237] In a planar transistor, the channel length is limited by the exposure limit of photolithography, making further miniaturization difficult. However, in one embodiment of the present invention, the channel length can be set by the film thickness of the insulator 480. Therefore, the channel length of the transistor 320A can be made into an extremely fine structure that is equal to or less than the exposure limit of photolithography (for example, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less, and 1 nm or more, or 5 nm or more). This allows the on-state current of the transistor 320A to be increased.

[0238] Furthermore, as described above, the channel formation region, the source region, and the drain region can be formed in the opening 490. This allows the area occupied by the transistor 320A to be reduced compared to a conventional transistor in which the channel formation region, the source region, and the drain region are provided separately on the XY plane, thereby increasing the pixel density.

[0239] A transistor having a channel formation region along the side surface of the insulator 480 in the opening 490 is also called a vertical transistor.

[0240] 24B , the oxide semiconductor 470, the insulator 430, and the conductor 420 are arranged concentrically in the XY plane including the channel formation region of the oxide semiconductor 470. Therefore, the side surface of the conductor 420 located at the center faces the side surface of the oxide semiconductor 470 with the insulator 430 interposed therebetween. In other words, the entire periphery of the oxide semiconductor 470 forms the channel formation region in a top view. In this case, for example, the channel width of the transistor 320A is determined by the perimeter of the oxide semiconductor 470. In other words, the channel width of the transistor 320A can be determined by the maximum width of the opening 490 (the maximum diameter when the opening 490 is circular in a top view). In FIGS. 24A and 24B , the maximum width D of the opening 490 is indicated by a double-headed, dashed arrow. In FIG. 24B , the channel width W of the transistor 320A is indicated by a double-headed, dashed arrow. By increasing the maximum width D of the opening 490, the channel width per unit area can be increased, and the on-current can be increased.

[0241] When the opening 490 is formed by photolithography, the maximum width D of the opening 490 is limited by the exposure limit of photolithography. The maximum width D of the opening 490 is set depending on the film thicknesses of the oxide semiconductor 470, the insulator 430, and the conductor 420 provided in the opening 490. The maximum width D of the opening 490 is, for example, 5 nm or more, 10 nm or more, or 20 nm or more, and preferably 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, or 30 nm or less. When the opening 490 has a circular shape in top view, the maximum width D of the opening 490 corresponds to the diameter of the opening 490, and the channel width W can be calculated as "D × π".

[0242] In the memory device of one embodiment of the present invention, the channel length L of the transistor 320A is preferably at least shorter than the channel width W of the transistor 320A. The channel length L of the transistor 320A of one embodiment of the present invention is 0.1 to 0.99 times, preferably 0.5 to 0.8 times, the channel width W of the transistor 320A. With such a structure, a transistor with favorable electrical characteristics and high reliability can be realized.

[0243] Furthermore, by forming the opening 490 to have a substantially circular shape in top view, the oxide semiconductor 470, the insulator 430, and the conductor 420 are arranged concentrically. This makes the distance between the conductor 420 and the oxide semiconductor 470 substantially uniform, allowing a gate electric field to be applied to the oxide semiconductor 470 substantially uniformly.

[0244] The channel formation region of a transistor using an oxide semiconductor for a semiconductor layer preferably has fewer oxygen vacancies or a lower concentration of impurities such as hydrogen, nitrogen, or metal elements than the source and drain regions. For example, the aluminum concentration in the channel formation region of the oxide semiconductor is preferably 1×10 ２２ atoms / cm ３ Preferably, 1×10 ２１ atoms / cm ３ More preferably, 1×10 ２０ atoms / cm ３ Less than 5 x 10 is more preferable. １９ atoms / cm ３ More preferably, 1×10 １９ atoms / cm ３ Less than 5 x 10 is more preferable. １８ atoms / cm ３ More preferably, 1×10 １８ atoms / cm ３ The following is even more preferred:

[0245] In addition, hydrogen atoms near the oxygen vacancies are converted into defects where hydrogen atoms have entered the oxygen vacancies (hereinafter referred to as V Ｏ H) and generate electrons that become carriers. Therefore, in the channel formation region, V Ｏ It is preferable that H is also reduced. In this way, the channel formation region of the transistor is a high-resistance region with a low carrier concentration. Therefore, the channel formation region of the transistor can be said to be i-type (intrinsic) or substantially i-type.

[0246] In addition, the source and drain regions of a transistor using an oxide semiconductor for a semiconductor layer have more oxygen vacancies than the channel formation region. ＯThe source and drain regions of a transistor are n-type regions with a high carrier concentration and low resistance compared to the channel formation region, due to a high concentration of H or a high concentration of impurities such as hydrogen, nitrogen, and metal elements.

[0247] 24A and other drawings, the opening 490 is provided so that the side surface of the opening 490 is perpendicular to the upper surface of the wiring 450, but the present invention is not limited to this. For example, the side surface of the opening 490 may be tapered.

[0248] This embodiment mode can be implemented by appropriately combining at least a part thereof with other embodiment modes described in this specification.

[0249] 20: Display device, 21: Optical device, 30: Housing, 35: Holder, 40: Pixel, 41: Line-of-sight detection sensor, 42: Light source, 60: Display unit, 62: Linear polarizer, 63: Retardation plate, 64: Half mirror, 65: Lens, 66: Retardation plate, 67: Reflective polarizer, 68: Lens, 71: Subpixel, 74: Pixel array, 75: Circuit, 76: Circuit, 77: Layer, 78: Layer, 79: Layer, 100: Laminate, 101: Pixel, 102: Lens, 102B: Lens, 102G: Lens, 102M: Model, 102M_t: Model, 102M_x: Model, 102M_y: Model, 10 2R: lens, 102S: lens, 102y: model, 105B: sub-pixel, 105G: sub-pixel, 105R: sub-pixel, 105S: sub-pixel, 110: light-emitting element, 110B: light-emitting element, 110G: light-emitting element, 110R: light-emitting element, 111: pixel electrode, 111B: pixel electrode, 111G: pixel electrode, 112: organic layer, 112B: organic layer, 112G: organic layer, 113: common electrode, 114: common layer, 121: protective layer, 124: insulating layer, 125: insulating layer, 126: resin layer, 127: planarization film, 128: layer, 131: region, 132: region, 133: region, 134: region, 1 35: region, 161: substrate, 163: substrate, 200A: display panel, 200B: display panel, 200C: display panel, 200D: display panel, 200F: display panel, 200G: display panel, 200H: display panel, 240: capacitor, 241: conductive layer, 243: insulating layer, 245: conductive layer, 251: conductive layer, 252: conductive layer, 254: insulating layer, 255a: insulating layer, 255b: insulating layer, 255c: insulating layer, 256: plug, 261: insulating layer, 262: insulating layer, 263: insulating layer, 264: insulating layer, 265: insulating layer, 271: plug, 274: plug, 274a: Conductive layer, 274b: conductive layer, 280: display module, 281: display section, 282: circuit section, 283: pixel circuit section, 283a: pixel circuit, 284: pixel section, 284a: pixel, 285: terminal section, 286: wiring section, 290: FPC, 291: substrate, 292: substrate, 301: substrate, 301A: substrate, 301B: substrate, 310: transistor, 310A: transistor, 310B: transistor, 311: conductive layer, 312: low resistance region, 313: insulating layer, 314: insulating layer, 315: element isolation layer, 320: transistor, 320A: transistor, 321: semiconductor layer,323: insulating layer, 324: conductive layer, 325: conductive layer, 326: insulating layer, 327: conductive layer, 328: insulating layer, 329: insulating layer, 331: substrate, 332: insulating layer, 335: insulating layer, 336: insulating layer, 341: conductive layer, 342: conductive layer, 343: plug, 344: insulating layer, 345: insulating layer, 346: insulating layer, 347: bump, 348: adhesive layer, 420: conductor, 430: insulator, 440: wiring, 450: wiring, 470: oxide semiconductor, 470i: region, 470na: region, 470nb: region, 480: insulator, 490: opening,

Claims

It has a light-emitting element, a first insulating layer, and a plano-convex lens, The first insulating layer is provided between the light-emitting element and the plano-convex lens, The plano-convex lens has a substantially square shape in a top view, In the plano-convex lens, When the direction parallel to the first side of the substantially square shape is defined as the first direction and the direction perpendicular to the first side is defined as the second direction, and the cross-section including the optical axis in the first direction is defined as the first cross-section and the cross-section including the optical axis in the second direction is defined as the second cross-section, The magnitude relationship between the length on the planar side in the first cross-section and the length on the planar side in the second cross-section, and the magnitude relationship between the radius of curvature on the convex side in the first cross-section and the radius of curvature on the convex side in the second cross-section are equal, Each of the first and second cross-sections has a first region, a second region, and a third region in order, where the curvature of the surface varies from the top of the convex side to the planar side, A display device in which the radius of curvature of the second region is the smallest in the first to third regions. 　 In claim 1, A display device in which the radius of curvature increases in the order of the second region, the first region, and the third region. 　 In claim 1, A display device in which the first insulating layer is formed of the same material as the plano-convex lens. 　 In claim 1, A display device in which the refractive index of the first insulating layer is greater than the refractive index of the plano-convex lens. 　 In claim 1, A display device in which the film thickness of the first insulating layer between the light-emitting element and the plano-convex lens is 1 μm or more and 3 μm or less. 　 It has a first light-emitting element, a second light-emitting element, a first plano-convex lens, and a second plano-convex lens, The first light-emitting element and the second light-emitting element have different emission colors and element areas, respectively, The first plano-convex lens is provided on the first light-emitting element, The second plano-convex lens is provided on the second light-emitting element, The first plano-convex lens and the second plano-convex lens have different shapes in a top view, respectively, Each of the first and second plano-convex lenses has a substantially square shape in a top view, In the first and second plano-convex lenses, When the direction parallel to the first side of the substantially square shape is defined as the first direction and the direction perpendicular to the first side is defined as the second direction, and the cross-section including the optical axis in the first direction is defined as the first cross-section and the cross-section including the optical axis in the second direction is defined as the second cross-section, The magnitude relationship between the length on the planar side in the first cross section and the length on the planar side in the second cross section, and the magnitude relationship between the radius of curvature on the convex side in the first cross section and the radius of curvature on the convex side in the second cross section are equal. Each of the first and second cross sections successively has a first region, a second region, and a third region in which the surface curvature varies from the top on the convex side to the planar side. A display device in which the radius of curvature of the second region is the smallest in the first to third regions. 　 In claim 6, A display device in which the radius of curvature increases in the order of the second region, the first region, and the third region. 　 In claim 6, A display device in which the first plano-convex lens has a different height from the second plano-convex lens. 　 In claim 6, A display device in which the first plano-convex lens is joined to the second plano-convex lens. 　 An electronic device using the display device according to any one of claims 1 to 9 as a light source, and having a reflective and refractive optical system provided on the display surface side of the display device.

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