Optical detection device, method for producing optical detection device, and electronic device

Abstract

Provided is an optical detection device that, in trench shape processing, can reduce, via a simple step, depth variations which depend on a processing pattern. The optical detection device comprises a semiconductor layer, a plurality of pixels, and a pixel separation part. The semiconductor layer has a light-receiving surface, on which light is incident, and an element formation surface which is positioned on the opposite side from the light-receiving surface. The plurality of pixels are disposed in a matrix on the semiconductor layer and generate an electric signal in accordance with light that is incident from the light-receiving surface. The pixel separation part extends from the light-receiving surface of the semiconductor layer in a depth direction toward the element formation surface, and separates adjacent pixels. A hollowed region that has a first depth and that, in a planar view, extends in the row direction or in the column direction is formed with a first line width in the pixel separation part. A hollowed region that has a second depth differing from the first depth is formed with a second line width that differs from the first line width so as to match the hollowed region of the first depth.

Description

Photodetector, method of manufacturing photodetector, and electronic device

[0001] The technology according to the present disclosure (the present technology) relates to a photodetector, a method for manufacturing a photodetector, and an electronic device including a photodetector.

[0002] Conventionally, electronic devices with an imaging function, such as digital still cameras and digital video cameras, use solid-state imaging elements, such as charge-coupled devices (CCDs) and complementary metal oxide semiconductor (CMOS) image sensors, as photodetectors. The photodetector has pixels that combine photodiodes (photoelectric conversion elements) that perform photoelectric conversion with transistors, and an image is constructed based on pixel signals output from a plurality of planarly arranged pixels.

[0003] However, when strong light is incident on a pixel, the charge stored in the photodiode of that pixel may saturate and overflow, causing a phenomenon called blooming. For this reason, a solid-state imaging device has been proposed in which pixels are separated by through trenches and non-through trenches are formed in the locations where elements such as transistors are located across the pixels.

[0004] However, when processing deep trench shapes such as through trenches and non-through trenches, or when processing by dry etching, a phenomenon known as microloading occurs, in which the processing depth varies depending on the processing pattern. This microloading phenomenon increases the difficulty of process design in order to ensure light-shielding performance. Furthermore, in the case of a through-trench structure, the microloading phenomenon makes it impossible to ensure a break margin to the lower layer. Furthermore, in a structure in which a photodiode and a MEM (memory) are stacked vertically, the light-shielding band width increases depending on the microloading thickness, creating a problem from the perspective of pixel design.

[0005] Japanese Patent Application Laid-Open No. 2006-129999 discloses an image sensor that reduces the microloading phenomenon by arranging isolation regions that isolate multiple pixels and forming non-isolation regions at the corners of the pixels. In other words, the image sensor disclosed in Japanese Patent Application Laid-Open No. 2006-129999 eliminates the intersecting portions in order to avoid variations in processing depth that occur at the intersecting portions where processing patterns overlap when processing light-shielding trenches between photoelectric conversion elements.

[0006] Japanese Patent Application Laid-Open No. 2021-48158

[0007] In recent years, there has been a strong demand for a method for reducing the microloading phenomenon in light-shielding trench processing using a simple process without removing the orthogonal portions of the processing pattern.

[0008] The present disclosure has been made in consideration of the above circumstances, and aims to provide a photodetector, a method for manufacturing a photodetector, and an electronic device that can reduce depth variations that depend on processing patterns using simple steps when processing trench shapes.

[0009] One aspect of the present disclosure is a photodetector device comprising: a semiconductor layer having a light-receiving surface onto which light is incident and an element-forming surface located on the opposite side of the light-receiving surface; a plurality of pixels arranged in a matrix in the semiconductor layer and capable of generating an electrical signal in response to light incident from the light-receiving surface; and a pixel separation section extending in a depth direction from the light-receiving surface of the semiconductor layer to the element-forming surface and separating adjacent pixels, wherein the pixel separation section extends in a row direction or a column direction in a planar view, and an engraved region having a first depth is formed with a first line width, and an engraved region having a second depth different from the first depth is formed with a second line width different from the first line width so as to be aligned with the engraved region of the first depth.

[0010] Another aspect of the present disclosure is a method for manufacturing a photodetector including: a semiconductor layer having a light-receiving surface onto which light is incident and an element formation surface located on the opposite side of the light-receiving surface; a plurality of pixels arranged in a matrix in the semiconductor layer, each capable of generating an electrical signal in response to light incident from the light-receiving surface; and a pixel separation portion extending in a depth direction from the light-receiving surface to the element formation surface of the semiconductor layer and separating adjacent pixels, the method comprising: forming an engraved region having a first depth and a first line width in the pixel separation portion extending in a row direction or a column direction in a plan view; forming an engraved region having a second depth different from the first depth and a second line width different from the first line width so as to match the engraved region of the first depth; forming a buried film in the engraved region; forming a hard mask opening pattern in the engraved region having a line width wider than the first line width; and removing the buried film in the engraved region based on the hard mask opening pattern.

[0011] Furthermore, another aspect of the present disclosure is an electronic device including a photodetector device comprising: a semiconductor layer having a light-receiving surface onto which light is incident and an element-forming surface located on the opposite side of the light-receiving surface; a plurality of pixels arranged in a matrix in the semiconductor layer and capable of generating an electrical signal in response to light incident from the light-receiving surface; and a pixel separation section extending in a depth direction from the light-receiving surface of the semiconductor layer to the element-forming surface and separating adjacent pixels, wherein the pixel separation section extends in a row direction or a column direction in a plan view, and an engraved region having a first depth is formed with a first line width, and an engraved region having a second depth different from the first depth is formed with a second line width different from the first line width so as to match the engraved region of the first depth.

[0012] 6A ; FIG. 6B is a chip layout diagram showing a configuration example of a photodetector according to a first embodiment of the present disclosure; FIG. 6C is a block diagram showing a configuration example of a photodetector according to a first embodiment of the present disclosure; FIG. 6D is a schematic cross-sectional view showing a cross-sectional structure of a pixel array section; FIG. 6E is a schematic plan view showing a planar pattern of an isolation region in a pixel array section; FIG. 6F is a cross-sectional view of a straight pattern of an isolation region in a comparative example of the first embodiment; FIG. 6G is a cross-sectional view of a straight pattern of an isolation region shown by a dashed line in FIG. 5A; FIG. 6H is a cross-sectional view of a cross-pattern of an isolation region in a comparative example of the first embodiment; FIG. 6I is a cross-sectional view of a straight pattern of an isolation region in the first embodiment of the present disclosure; FIG. 6I is a cross-sectional view of an example of a structure of a stopper layer for a trench in the first embodiment of the present disclosure; FIG. 6I is a plan view (part 1) showing a process of forming an active pattern from a trench pattern in the first embodiment of the present disclosure; FIG. 6I is a plan view (part 2) showing a process of forming an active pattern from a trench pattern in the first embodiment of the present disclosure; FIG. 6I is a plan view (part 3) showing a process of forming an active pattern from a trench pattern in the first embodiment of the present disclosure; FIG. 1 is a cross-sectional view (part 1) showing a process procedure of a method for forming an isolation region and an isolation portion of a photodetector according to a first embodiment of the present disclosure. FIG. 2 is a cross-sectional view (part 2) showing a process procedure of a method for forming an isolation region and an isolation portion of a photodetector according to a first embodiment of the present disclosure. FIG. 3 is a cross-sectional view (part 3) showing a process procedure of a method for forming an isolation region and an isolation portion of a photodetector according to a first embodiment of the present disclosure. FIG. 4 is a cross-sectional view (part 5) showing a process procedure of a method for forming an isolation region and an isolation portion of a photodetector according to a first embodiment of the present disclosure. FIG. 1 is a cross-sectional view (part 1) showing a process procedure of a method for backfilling an insulating film in an isolation region of a photodetector according to a first modified example of the first embodiment of the present disclosure with a metal film. FIG. 2 is a cross-sectional view (part 2) showing a process procedure of a method for backfilling an insulating film in an isolation region of a photodetector according to a first modified example of the first embodiment of the present disclosure with a metal film.FIG. 1 is a cross-sectional view (part 3) showing a process procedure of a method for backfilling an insulating film in an isolation region of a photodetector device according to a first modified example of the first embodiment of the present disclosure with a metal film. FIG. 2 is a cross-sectional view (part 4) showing a process procedure of a method for backfilling an insulating film in an isolation region of a photodetector device according to a first modified example of the first embodiment of the present disclosure with a metal film. FIG. 3 is a plan view showing an example of an arrangement pattern of holes in a first modified example of the first embodiment of the present disclosure. FIG. 4 is a plan view showing, as a comparative example of a second modified example of the first embodiment of the present disclosure, a state in which the opening area of ​​a corner portion of an intersection of isolation regions is increased due to lithography. FIG. 5 is a plan view and a cross-sectional view (part 1) showing a process procedure of a method for forming an intersection of isolation regions of a photodetector device according to a second modified example of the first embodiment of the present disclosure. FIG. 6 is a plan view and a cross-sectional view (part 2) showing a process procedure of a method for forming an intersection of isolation regions of a photodetector device according to a second modified example of the first embodiment of the present disclosure. FIG. 7 is a plan view and a cross-sectional view (part 3) showing a process procedure of a method for forming an intersection of isolation regions of a photodetector device according to a second modified example of the first embodiment of the present disclosure. FIG. 8 is a partial cross-sectional view showing an example of a photodetector device according to a second embodiment of the present disclosure. FIG. 1 is a cross-sectional view (part 1) illustrating an example of a manufacturing process for a photodetector according to a second embodiment of the present disclosure. FIG. 2 is a cross-sectional view (part 3) illustrating an example of a manufacturing process for a photodetector according to a second embodiment of the present disclosure. FIG. 4 is a cross-sectional view (part 5) illustrating an example of a manufacturing process for a photodetector according to a second embodiment of the present disclosure. FIG. 6 is a cross-sectional view (part 7) illustrating an example of a manufacturing process for a photodetector according to a second embodiment of the present disclosure. FIG. 8 is a cross-sectional view (part 9) illustrating an example of a manufacturing process for a photodetector according to a second embodiment of the present disclosure. FIG. 10 is a cross-sectional view (part 11) illustrating an example of a manufacturing process for a photodetector according to a second embodiment of the present disclosure.Fig. 12 is a cross-sectional view (part 12) showing an example of a manufacturing process of a light detection device according to a second embodiment of the present disclosure. Fig. 13 is a block diagram showing an example of a configuration of an electronic device to which the present technology is applied. Fig. 14 is a block diagram showing an example of a schematic configuration of an endoscopic surgery system. Fig. 15 is a block diagram showing an example of a functional configuration of a camera head and a CCU. Fig. 16 is a block diagram showing an example of a schematic configuration of a vehicle control system. Fig. 17 is an explanatory diagram showing an example of installation positions of an outside-vehicle information detection unit and an imaging unit.

[0013] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In the drawings referred to in the following description, identical or similar parts will be designated by identical or similar reference numerals, and redundant description will be omitted. However, it should be noted that the drawings are schematic, and the relationship between thickness and planar dimensions, the thickness ratio of each device and each component, etc., may differ from the actual ones. Therefore, specific thicknesses and dimensions should be determined with reference to the following description. Furthermore, it goes without saying that the drawings may include parts with different dimensional relationships and ratios.

[0014] In this specification, the "first conductivity type" refers to either p-type or n-type, and the "second conductivity type" refers to either p-type or n-type, which is different from the "first conductivity type." Furthermore, the "+" or "-" attached to "n" or "p" means that the semiconductor region has a relatively high or low impurity density, respectively, compared to a semiconductor region without the "+" or "-" attached. However, even if the semiconductor regions have the same "n" and "n" attached, this does not mean that the impurity densities of the respective semiconductor regions are strictly the same.

[0015] Furthermore, the definitions of directions such as up and down in the following description are merely for the convenience of explanation and do not limit the technical concept of the present disclosure. For example, if an object is rotated 90 degrees and observed, up and down are converted to left and right and read as such, and if it is rotated 180 degrees and observed, up and down are inverted and read as such. Note that the effects described in this specification are merely examples and are not limiting, and other effects may also be present.

[0016] First Embodiment In a first embodiment of the present disclosure, an example in which the present technology is applied to a solid-state imaging device that is a back-illuminated complementary metal oxide semiconductor (CMOS) image sensor as a photodetector will be described.

[0017] (Overall Configuration of Photodetector) First, the overall configuration of the photodetector 1A will be described. As shown in Fig. 1 , the photodetector 1A according to the first embodiment of the present disclosure is mainly composed of a semiconductor chip 2 having a rectangular two-dimensional planar shape when viewed in a plan view. That is, the photodetector 1A is mounted on the semiconductor chip 2.

[0018] As shown in FIG. 1, the semiconductor chip 2 on which the photodetector 1A is mounted includes, in a two-dimensional plane including an X direction and a Y direction which are orthogonal to each other, a rectangular pixel array section 2A provided in the center, and a peripheral section 2B provided outside the pixel array section 2A so as to surround the pixel array section 2A.

[0019] The pixel array section 2A is a light receiving surface that receives condensed light. In the pixel array section 2A, a plurality of pixels 3 are arranged in a matrix on a two-dimensional plane including the X direction and the Y direction. In other words, the pixels 3 are repeatedly arranged in each of the X direction and the Y direction that are orthogonal to each other on the two-dimensional plane.

[0020] 1, a plurality of bonding pads 14 are arranged in the peripheral portion 2B. Each of the plurality of bonding pads 14 is arranged, for example, along each of the four sides in a two-dimensional plane of the semiconductor chip 2. Each of the plurality of bonding pads 14 is an input / output terminal used when electrically connecting the semiconductor chip 2 to an external device.

[0021] The semiconductor chip 2 includes a logic circuit 13 shown in Fig. 2. As shown in Fig. 2, the logic circuit 13 includes a vertical drive circuit 4, a column signal processing circuit 5, a horizontal drive circuit 6, an output circuit 7, and a control circuit 8. The logic circuit 13 is configured with a CMOS (Complementary MOS) circuit having, as field effect transistors, for example, n-channel conductivity type MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) and p-channel conductivity type MOSFETs.

[0022] The vertical drive circuit 4 is configured with, for example, a shift register. The vertical drive circuit 4 sequentially selects desired pixel drive lines 10, supplies pulses to the selected pixel drive lines 10 for driving the pixels 3, and drives each pixel 3 row by row. That is, the vertical drive circuit 4 sequentially selects and scans each pixel 3 in the pixel array section 2A row by row in the vertical direction, and supplies pixel signals from the pixels 3 based on signal charges generated by the photoelectric conversion elements of each pixel 3 in accordance with the amount of light received to the column signal processing circuit 5 via vertical signal lines 11.

[0023] The column signal processing circuits 5 are arranged, for example, for each column of pixels 3, and perform signal processing such as noise removal for each pixel column on signals output from one row of pixels 3. For example, the column signal processing circuits 5 perform signal processing such as CDS (Correlated Double Sampling) and AD (Analog-Digital) conversion to remove fixed pattern noise specific to each pixel.

[0024] The horizontal drive circuit 6 is configured by, for example, a shift register. The horizontal drive circuit 6 sequentially outputs horizontal scanning pulses to the column signal processing circuits 5, thereby selecting each of the column signal processing circuits 5 in turn and causing each column signal processing circuit 5 to output a pixel signal that has undergone signal processing to a horizontal signal line 12.

[0025] The output circuit 7 processes and outputs pixel signals sequentially supplied from each of the column signal processing circuits 5 through the horizontal signal line 12. The signal processing may include, for example, buffering, black level adjustment, column variation correction, various types of digital signal processing, etc.

[0026] Based on the vertical synchronization signal, horizontal synchronization signal, and master clock signal, the control circuit 8 generates clock signals and control signals that serve as references for the operations of the vertical drive circuit 4, column signal processing circuit 5, horizontal drive circuit 6, etc. Then, the control circuit 8 outputs the generated clock signals and control signals to the vertical drive circuit 4, column signal processing circuit 5, horizontal drive circuit 6, etc.

[0027] Each of the plurality of pixels 3 includes a photoelectric conversion region 27 shown in FIG. 3 and a plurality of pixel transistors (not shown). The plurality of pixel transistors may include, for example, four transistors: a transfer transistor, a reset transistor, a selection transistor, and an amplification transistor. Alternatively, the plurality of pixel transistors may include, for example, three transistors excluding the selection transistor.

[0028] <Specific Configuration of the Photodetector> Next, a specific configuration of the photodetector 1A will be described. As shown in FIG. 3 , the semiconductor chip 2 includes a semiconductor layer 20 having a plurality of photoelectric conversion regions 27 and a color filter layer 40 disposed on the light incident surface side, which is the second surface S2 side of the first surface S1 and the second surface S2 located opposite each other in the thickness direction (Z direction) of the semiconductor layer 20. The semiconductor chip 2 also includes a plurality of microlenses 45 (on-chip lenses, wafer lenses) disposed on the light incident surface side of the color filter layer 40 (the side opposite the semiconductor layer 20 side). The semiconductor chip 2 also includes a multilayer wiring layer 30 disposed on the first surface S1 side of the semiconductor layer 20 and a support substrate 34 disposed on the side of the multilayer wiring layer 30 opposite the semiconductor layer 20 side.

[0029] The semiconductor layer 20 is configured with a p-type semiconductor substrate made of, for example, single-crystal silicon. Each of the photoelectric conversion regions 27 is arranged in a matrix in the pixel array section 2A, corresponding to each of the plurality of pixels 3. Each photoelectric conversion region 27 is partitioned by an isolation region 24 (an example of a pixel isolation region) provided in the semiconductor layer 20. The isolation region 24 extends from the second surface S2 side of the semiconductor layer 20 toward the first surface S1 side, electrically and optically isolating adjacent photoelectric conversion regions 27 in a planar view. The isolation region 24 includes a trench 22 (an example of a recessed region) extending from the second surface S2 side of the semiconductor layer 20 toward the first surface S1 side, and an insulating film 23 (an example of a buried film) embedded in the trench 22. The insulating film 23 may be, for example, a silicon oxide film. The isolation region 24 of this first embodiment extends across the second surface S2 and the first surface S1 of the semiconductor layer 20, although this is not a limitation.

[0030] Here, the first surface S1 of the semiconductor layer 20 is sometimes referred to as the element formation surface or main surface, and the second surface S2 side is sometimes referred to as the light incident surface (an example of a light receiving surface) or back surface. The photodetector 1A of this first embodiment photoelectrically converts light incident from the second surface (light incident surface, back surface) S2 side of the semiconductor layer 20 in a photoelectric conversion region 27 provided in the semiconductor layer 20. Furthermore, a planar view refers to a view from a direction along the thickness direction (Z direction) of the semiconductor layer 20. Furthermore, a cross-sectional view refers to a view of a cross section along the thickness direction (Z direction) of the semiconductor layer 20 from a direction (X direction or Y direction) perpendicular to the thickness direction (Z direction) of the semiconductor layer 20.

[0031] The isolation region 24 may have a sandwich structure in the trench 22 in which a metal film is sandwiched between insulating films on both sides.

[0032] As shown in FIG. 3 , each of the photoelectric conversion regions 27 includes a p-type well region 21, e.g., a p-type semiconductor region, and an n-type semiconductor region 21a. Furthermore, each of the photoelectric conversion regions 27 includes a photoelectric conversion element, e.g., a photodiode (PD), and a transfer transistor, though not shown in detail. That is, the pixel array section 2A includes a plurality of pixels 3, each including a photoelectric conversion element and a transfer transistor embedded in the semiconductor layer 20, arranged in a matrix (two-dimensional matrix). In the photoelectric conversion region 27, signal charges corresponding to the amount of incident light are generated and accumulated. The n-type semiconductor region 21a is provided within the p-type well region 21. The photodiode PD includes the p-type well region 21 and the n-type semiconductor region 21a.

[0033] 3, the multilayer wiring layer 30 is disposed on the first surface S1 side opposite to the light incident surface (second surface S2) side of the semiconductor layer 20, and is configured such that wiring layers including wiring 32 are stacked in multiple stages with interlayer insulating films 31 interposed between them. The pixel transistors that constitute each pixel 3 are driven via the wiring 32 in each wiring layer. Because the multilayer wiring layer 30 is disposed on the side opposite to the light incident surface side (second surface S2 side) of the semiconductor layer 20, the layout of the wiring 32 can be freely set.

[0034] The color filter layer 40 includes, for example, but is not limited to, a first red (R) color filter portion 41, a second green (G) color filter portion 42, and a third blue (B) color filter portion 43. The first to third color filter portions 41 to 43 are arranged in a matrix in the pixel array portion 2A corresponding to each of the plurality of pixels 3, i.e., each of the plurality of photoelectric conversion regions 27. The first to third color filter portions 41 to 43 are configured to transmit specific wavelengths of incident light that are to be received by the photoelectric conversion region 27 and allow the transmitted incident light to enter the photoelectric conversion region 27.

[0035] Each of the microlenses 45 is arranged in a matrix in the pixel array section 2A corresponding to each of the pixels 3, i.e., each of the photoelectric conversion regions 27. The microlenses 45 condense irradiated light and allow the condensed light to efficiently enter the photoelectric conversion region 27 of the semiconductor layer 20 via the color filter layer 40. The microlenses 45 form a microlens array on the light incident surface side of the color filter layer 40.

[0036] The support substrate 34 is provided on the surface of the multilayer wiring layer 30 opposite to the surface facing the semiconductor layer 20. The support substrate 34 is a substrate for ensuring the strength of the semiconductor layer 20 during the manufacturing stage of the photodetector 1A. The support substrate 34 may be made of, for example, silicon (Si).

[0037] As shown in FIG. 3, a planarizing film 36 and an adhesive film 38 are stacked in this order from the semiconductor layer 20 side between the semiconductor layer 20 and the color filter layer 40 .

[0038] The planarization film 36 covers the entire light incident surface side of the semiconductor layer 20 in the pixel array section 2A so that the light incident surface side of the semiconductor layer 20 is a flat surface without any irregularities. As the planarization film 36, for example, a silicon oxide (SiO2) film can be used.

[0039] The adhesive film 38 is disposed between the planarizing film 36 and the color filter layer 40. The adhesive film 38 is made of, for example, a silicon oxide film.

[0040] In the photodetector 1A having the above configuration, light is irradiated from the microlens 45 side of the semiconductor chip 2, the irradiated light is transmitted individually through the microlens 45 and the color filter portions 41, 42, and 43, and the transmitted light is photoelectrically converted in the photoelectric conversion region 27 to generate signal charges. The generated signal charges are then output as pixel signals by the vertical signal lines 11 made up of the wiring 32 of the multilayer wiring layer 30 via pixel transistors formed on the first surface S1 side of the semiconductor layer 20. Furthermore, the distance to the subject is calculated based on the difference between the signal charges generated in the photoelectric conversion region 27.

[0041] <Isolation Region and Photoelectric Conversion Region> Next, the specific configurations of the isolation region 24 and the photoelectric conversion region 27 will be described.

[0042] As shown in FIG. 4 , the isolation region 24 includes a first portion 24x extending in the X direction with a line width a1 in a plan view and a second portion 24y extending in the Y direction. The first portion 24x and the second portion 24y extend perpendicularly to each other. Each of the photoelectric conversion regions 27 is partitioned at both ends in the X direction by two second portions 24y of the isolation region 24 and at both ends in the Y direction by two first portions 24x of the isolation region 24. Each of the first portion 24x and the second portion 24y included in the isolation region 24 extends across the second surface S2 and the first surface S1 of the semiconductor layer 20. Each of the first portion 24x and the second portion 24y includes a trench 22 extending across the second surface S2 and the first surface S1 of the semiconductor layer 20 and an insulating film 23 embedded in the trench 22.

[0043] Comparative Example of First Embodiment Fig. 5A is a plan view of the linear pattern of the isolation region 24 in a comparative example of the first embodiment. Fig. 5B is a cross-sectional view of the linear pattern of the isolation region 24 indicated by the dashed line in Fig. 5A. In the first portion 24x of the isolation region 24, both ends of the linear pattern have a depth b2 that is shallower by t1 than the depth b1 at the center of the linear pattern due to the microloading phenomenon. Therefore, the isolation region 24 becomes non-penetrating, allowing light to leak in and reducing the light-blocking properties.

[0044] 6A is a plan view of the intersection pattern of the isolation region 24 in a comparative example of the first embodiment. FIG. 6B is a cross-sectional view of the intersection pattern of the isolation region 24 indicated by the dashed line in FIG. 6A. The depth b3 of the intersection point (hereinafter referred to as intersection point 25) between the first portion 24x and the second portion 24y of the isolation region 24 is deeper by t2 than the depth b1 of the non-intersection point due to the microloading phenomenon. Therefore, there is a risk that the isolation region 24 may damage the underlying layer, exposing the metal of the multilayer wiring layer 30.

[0045] <Solution According to First Embodiment> Fig. 7 is a plan view of a cross pattern of the separation region 24 according to the first embodiment of the present disclosure. Fig. 8 is a plan view of a straight pattern of the separation region 24 according to the first embodiment of the present disclosure.

[0046] 7 , in the first embodiment of the present disclosure, the line width a3 of the intersection 25 between the first portion 24x and the second portion 24y of the isolation region 24 is formed to be narrower than the line width a1 of the non-intersection portion, and the depth b3 of the intersection 25 is made to match the depth b1 of the non-intersection portion. In other words, the area of ​​the portion where the microloading phenomenon occurs corresponds to the area of ​​the processed portion of the isolation region 24. Also, in the first embodiment of the present disclosure, the line width a2 at both ends of the intersection pattern is formed to be wider than the line width a1. Note that the ranges where the line width a2 is narrower and wider than the line width a1 are within the range where an insulating film 23 such as silicon oxide (SiO2) can be embedded in the trench 22 of the isolation region 24.

[0047] In addition, in the first embodiment of the present disclosure, as shown in FIG. 8, the line width a2 at both ends of the linear pattern of the isolation region 24 is formed to be thicker than the line width a1, and the depth b2 at both ends is made to match the depth b1.

[0048] In the first embodiment of the present disclosure, when the isolation region 24 is formed from the second surface S2 side, it is necessary to form a trench penetrating the photoelectric conversion region 27. However, penetrating the PMD (Pre-Metal Direct Layer) exposes the metal of the multilayer wiring layer 30, raising concerns about contamination. Therefore, as shown in FIG. 9 , a stopper layer 50 must be formed in advance. The stopper layer 50 must be formed of different types of films, such as a first silicon oxide film 51, a silicon nitride film 52, and a second silicon oxide film 53. The stopper layer 50 can act as a light leakage path, but by suppressing the microloading phenomenon, the film thickness of the stopper layer 50 can be minimized, thereby minimizing light leakage into, for example, an MEM (an example of a charge storage unit).

[0049] 10A to 10C are plan views showing the process of forming an active pattern from a trench pattern. The process of forming the isolation region 24 can be performed not only in a process position after the backside illumination type image sensor is turned to the backside, but also in a FEOL (Front End Of Line) process for forming transistors, etc.

[0050] When trenches 22 are formed in the FEOL process, the trench pattern may be used as an active pattern. In FIG. 10A , a non-isolation region 26 is formed between a first portion 24x and a second portion 24y of an isolation region 24. At an intersection 25 of the isolation region 24, the isolation region 24 becomes deeper due to the microloading phenomenon. Furthermore, in the non-isolation region 26, the edge of the first portion 24x of the isolation region 24 and the edge of the first portion 24y become shallower due to the microloading phenomenon.

[0051] 10B , at intersection 25 of isolation region 24, first portion 24x and second portion 24y are formed by narrowing line width a1 to line width a3. Furthermore, at non-isolation region 26, line width a1 at the end of each of first portion 24x and second portion 24y is formed by widening line width a2. However, there are concerns about characteristic degradation due to stress concentration and electric field concentration at convex portion 551 at the boundary between line width a1 and line width a2, and at convex portion 552 at the boundary between line width a1 and line width a3.

[0052] 10C, the trench 22 in the isolation region 24 is first planarized, and an active pattern 54 is formed by overlapping the trench 22. The active pattern 54 is formed by arranging a hard mask opening pattern (described later) in an area of ​​line width a2 in the isolation region 24. In addition, an element isolation portion (STI) 56 is formed within the pixel 3 surrounded by the active pattern 54. This makes it possible to avoid characteristic degradation.

[0053] 11A to 11E are cross-sectional views showing the process steps of a method for forming the isolation region 24 and the element isolation portion 56 of the photodetector 1A according to the first embodiment of the present disclosure. The photodetector 1A is manufactured using various types of equipment, such as a film formation apparatus (including a CVD (Chemical Vapor Deposition) apparatus and a sputtering apparatus), an ion implantation apparatus, a heat treatment apparatus, an etching apparatus, a CMP (Chemical Mechanical Polishing) apparatus, and a bonding apparatus. Hereinafter, these apparatuses will be collectively referred to as manufacturing apparatuses.

[0054] 11A, a semiconductor chip 2 is prepared, and the manufacturing equipment stacks an insulating film 61 made of, for example, silicon oxide (SiO2) on the second surface S2 (light incident surface) of the semiconductor layer 20 of the semiconductor chip 2, stacks a planarization film 36 on the upper surface of the insulating film 61, and forms the planarization film 36 penetrating from the second surface S2 to the trench 22. The manufacturing equipment then fills the trench 22 with an insulating film 23 made of, for example, Poly-Si. The insulating film 23 covers the upper surface of the planarization film 36.

[0055] 11B, the manufacturing equipment removes the insulating film 23 covering the upper surface of the planarization film 36 through an etch-back process. Subsequently, in FIG. 11C, the manufacturing equipment stacks, for example, a coating film 62 in the area in the trench 22 where the insulating film 23 has been removed. The coating film 62 is a fluid film-forming material formed by a coating process or the like.

[0056] 11D , the manufacturing equipment forms an anti-reflection film 63 on the upper surface of the planarization film 36 and the upper surface of the coating film 62, and then, in a lithography process, patterns a resist 64 on the anti-reflection film 63. Here, the resist 64 is formed in an area having a line width a2 of the isolation region 24, and a hard mask opening pattern is arranged.

[0057] Next, in FIG. 11E, the manufacturing equipment removes the anti-reflection film 63 and the resist 64 in a dry etching process, forms the active pattern 54, and forms the element isolation portion 56.

[0058] <Effects of First Embodiment> As described above, according to the first embodiment, it is possible to control the microloading phenomenon by increasing the line width in the isolation region 24 at a location where the trench 22 is shallow and decreasing the line width at a location where the trench 22 is deep. Therefore, by mitigating the influence of the microloading phenomenon, flexibility in the potential design of the structure of the pixel 3 and the photoelectric conversion region 27 is obtained, and characteristics can be improved.

[0059] Furthermore, according to the first embodiment, if the line width of the isolation region 24 is changed in order to reduce the microloading phenomenon, stress will be concentrated on the convex portions 551 and 552 of the active area, and there will be concerns about deterioration of characteristics due to electric field concentration. Therefore, by first flattening the isolation region 24, arranging a hard mask opening pattern in the region of the isolation region 24 with a thick line width, and then forming the active pattern 54 so as to overlap the isolation region 24, it is possible to avoid deterioration of characteristics.

[0060] <First Modification of First Embodiment> A first modification of the first embodiment of the present disclosure relates to removing the insulating film 23 in the trench 22 after backside conversion in the FEOL process and backfilling with a metal film. In the FEOL process, a metal film that is expected to have high light-shielding properties cannot be used from the viewpoint of contamination, and an insulating film 23 made of silicon dioxide (SiO2), Poly-Si, or the like is filled in. Therefore, when the isolation region 24 is formed in the FEOL process, in order to fill the trench 22 of the isolation region 24 with a metal film, it is necessary to remove the insulating film 23 in the trench 22 after backside conversion and backfill with a metal film.

[0061] (Method of Manufacturing Photodetector) FIGS. 12A to 12D are cross-sectional views showing the process steps of a method of backfilling the insulating film 23 in the isolation region 24 of the photodetector 1A in the first modified example of the first embodiment of the present disclosure with a metal film.

[0062] 12A, the manufacturing equipment forms a resist 71 such as silicon oxide (SiO2) as a hard mask on the second surface S2 of the semiconductor layer 20 in which an insulating film 23 made of, for example, Poly-Si is buried in the trench 22. Next, in FIG. 12B, the manufacturing equipment performs patterning of a hole shape or the like on the trench 22 in a lithography process to form a hole 72.

[0063] 12C, the manufacturing equipment uses a wet etching process to remove the insulating film 23 buried in the trench 22. Then, in FIG. 12D, the manufacturing equipment removes the resist 71.

[0064] The holes 72 are arranged at the intersections 25 of the first and second portions 24x and 24y of the isolation region 24, taking into consideration misalignment of the etching pattern of the insulating film 23. However, thinning the intersections 25 reduces the alignment margin. Therefore, in a first modification of the first embodiment of the present disclosure, as shown in FIG. 13 , the holes 72 are arranged in regions 24x1 and 24x2 that correspond to the line width a1 of the first portion 24x of the isolation region 24. The holes 72 are also arranged in regions 24y1 and 24y2 that correspond to the line width a1 of the second portion 24y of the isolation region 24. This relaxes design constraints.

[0065] <Second Modification of First Embodiment> The second modification of the first embodiment of the present disclosure is a measure to address the problem of deterioration of microloading due to the increased opening area at the corners of the intersections 25 of the isolation regions 24 caused by lithography, as shown in FIG. 14 .

[0066] 15A to 15C are plan views and cross-sectional views showing the process steps of a method for forming intersections 25 of separation regions 24 of a photodetector 1A according to a second modified example of the first embodiment of the present disclosure. (1) in Fig. 15A to 15C is a plan view, and (2) in Fig. 15A to 15C is a cross-sectional view of separation regions 24 indicated by the dashed dotted line in (1).

[0067] 15A , the manufacturing equipment deposits a resist 81 as a hard mask on the second surface S2 of the semiconductor layer 20 in order to form the first portion 24x of the isolation region 24 in a lithography process. Then, the manufacturing equipment forms an opening 82 in the first portion 24x of the isolation region 24 along the direction indicated by the arrow X in FIG.

[0068] 15B , the manufacturing equipment deposits a resist 83 as a hard mask on the second surface S2 of the semiconductor layer 20 in a lithography process to form the second portion 24y of the isolation region 24. Then, the manufacturing equipment forms an opening 84 in the second portion 24y of the isolation region 24 along the direction indicated by the arrow Y in FIG.

[0069] Next, in FIG. 15C, the manufacturing equipment removes silicon from the semiconductor layer 20 along the openings 82 and 83 by a wet etching process or the like to form trenches 22.

[0070] <Action and effect of the second modified example of the first embodiment> According to the second modified example of the first embodiment, since the opening area of ​​the intersection 25 of the separation region 24 becomes large due to lithography, which deteriorates microloading, the rectangularity of the intersection 25 can be improved by processing the first portion 24x and the second portion 24y of the separation region 24 separately.

[0071] Second Embodiment A photodetector 1B according to a second embodiment of the present disclosure will be described. The photodetector 1B is, for example, a global shutter back-illuminated image sensor including a complementary metal oxide semiconductor (CMOS) image sensor or the like.

[0072] (Configuration of Light Detecting Device) FIG. 16 is a partial cross-sectional view showing an example of a light detecting device 1B according to a second embodiment of the present disclosure.

[0073] The first substrate 30-1 is configured by laminating an insulating layer 32-1 on a semiconductor substrate 31-1 (an example of a semiconductor layer). That is, the insulating layer 32-1 is formed in contact with the upper surface of the semiconductor substrate 31-1. A first transfer transistor TRX, a second transfer transistor TRM, a charge holding unit MEM, a third transfer transistor TRG, a floating diffusion FD, and a discharge transistor OFG are formed on the upper surface of the semiconductor substrate 31-1. The charge holding unit MEM is formed near the upper surface of the semiconductor substrate 31-1. Therefore, the upper surface of the semiconductor substrate 31-1 serves as a formation surface 31B-1 for the first transfer transistor TRX and the like.

[0074] The insulating layer 32-1 includes the gate electrodes of the first transfer transistor TRX, the second transfer transistor TRM, the third transfer transistor TRG, and the discharge transistor OFG, as well as wiring connected to these gate electrodes. The gate electrodes of the first transfer transistor TRX, the second transfer transistor TRM, the third transfer transistor TRG, and the discharge transistor OFG, as well as wiring connected to these gate electrodes, are formed of, for example, a metal material. The gate electrode (vertical gate electrode VG) of the first transfer transistor TRX may be formed of polysilicon.

[0075] The semiconductor substrates 31-1 and 41-1 are, for example, silicon substrates. The semiconductor substrate 31-1 is, for example, a silicon (111) substrate. A silicon (111) substrate is a single-crystal silicon substrate having a (111) crystal orientation. The semiconductor substrate 31-1 has an N-type semiconductor region 32B-1 in a part of its upper surface (formation surface 31B-1 (an example of an element formation surface)) and in its vicinity, and an N-type semiconductor region 32A-1 in a region deeper than the N-type semiconductor region 32B-1. The semiconductor substrate 31-1 further has a floating diffusion FD and a charge retention unit MEM. The gate electrode (vertical gate electrode VG) of the first transfer transistor TRX is formed extending from the upper surface (formation surface 31B-1) of the semiconductor substrate 31-1 in the thickness direction (normal direction) of the semiconductor substrate 31-1. The gate electrode (vertical gate electrode VG) of the first transfer transistor TRX extends from the formation surface 31B-1 to a depth that reaches the N-type semiconductor region 32A (photodiode PD). The gate electrode (vertical gate electrode VG) of the first transfer transistor TRX has, for example, a rod shape that extends in the thickness direction (normal direction) of the semiconductor substrate 31-1.

[0076] The first substrate 30-1 further includes, for example, a fixed charge film 38-1 in contact with the back surface (light-receiving surface 31A-1) of the semiconductor substrate 31-1. The fixed charge film 38-1 has a negative fixed charge to suppress the generation of dark current due to interface states on the light-receiving surface 31A-1 side of the semiconductor substrate 31-1. The fixed charge film 38-1 is formed, for example, of an insulating film having a negative fixed charge. Examples of materials for such insulating films include hafnium oxide, zirconium oxide, aluminum oxide, titanium oxide, and tantalum oxide. The electric field induced by the fixed charge film 38-1 forms a hole accumulation layer at the interface on the light-receiving surface 31A-1 side of the semiconductor substrate 31-1. This hole accumulation layer suppresses the generation of electrons from the interface. The first substrate 30-1 further includes, for example, a color filter 39-1. The color filter 39-1 is provided on the light-receiving surface 31A-1 side of the semiconductor substrate 31-1. The color filter 39-1 is provided, for example, in contact with the fixed charge film 38-1 and is provided at a position facing the pixel 11-1 with the fixed charge film 38-1 interposed therebetween.

[0077] Each pixel 11-1 has a light-receiving lens 50-1 on the back surface (light-receiving surface 31A-1) side of the semiconductor substrate 31-1. In other words, the photodetector 1B has a plurality of light-receiving lenses 50-1, one for each pixel 11-1. The plurality of light-receiving lenses 50-1 are provided one for each photodiode PD and are positioned opposite the photodiode PD. In other words, the photodetector 1B is a back-illuminated imaging device. The light-receiving lens 50-1 is provided, for example, in contact with the color filter 39-1 and is positioned opposite the pixel 11-1 with the color filter 39-1 and fixed charge film 38-1 interposed therebetween.

[0078] The first substrate 30-1 has element isolation portions 34-1 and 36-1 that electrically and optically isolate two adjacent pixels 11-1. The element isolation portions 34-1 and 36-1 are formed extending in the normal direction (thickness direction) of the semiconductor substrate 31-1. The element isolation portions 34-1 and 36-1 are stacked within the semiconductor substrate 31-1 in the normal direction (thickness direction) of the semiconductor substrate 31-1. In other words, the element isolation portions 34-1 and 36-1 are connected to each other. A structure made up of the element isolation portions 34-1 and 36-1 is formed extending from the light-receiving surface 31A-1 to the formation surface 31B-1. In other words, the structure made up of the element isolation portions 34-1 and 36-1 penetrates the semiconductor substrate 31-1 and the semiconductor layer 33-1.

[0079] The element isolation portion 34-1 is formed so as to surround the pixel 11-1 (particularly the photodiode PD) in the horizontal plane direction, and further extends in the normal direction (thickness direction) of the semiconductor substrate 31-1. The element isolation portion 34-1 is formed between two adjacent photodiodes PD. The element isolation portion 34-1 is composed of, for example, a metal embedded portion 34A-1 and a P-type semiconductor portion 34B-1.

[0080] The metal-embedded portion 34A-1 and the P-type semiconductor portion 34B-1 both surround the pixel 11-1 (particularly the photodiode PD) in the horizontal plane direction and extend in the normal direction (thickness direction) of the semiconductor substrate 31-1. The P-type semiconductor portion 34B-1 is formed in contact with the side surface of the metal-embedded portion 34A-1 and is formed between the metal-embedded portion 34A-1 and the photodiode PD. The metal-embedded portion 34A-1 is formed, for example, using CVD (Chemical Vapor Deposition). The metal-embedded portion 34A-1 is formed, for example, from aluminum or an aluminum alloy. The P-type semiconductor portion 34B-1 is formed from a semiconductor with a P-type conductivity.

[0081] The element isolation portion 36-1 is formed so as to surround the pixel 11-1 (in particular, the first transfer transistor TRX, the second transfer transistor TRM, the charge holding portion MEM, the third transfer transistor TRG, the floating diffusion FD, and the discharge transistor OFG) in the horizontal plane direction, and is further formed so as to extend in the normal direction (thickness direction) of the semiconductor substrate 31-1. The element isolation portion 36-1 is provided at a position opposite the element isolation portion 34-1 in the normal direction (thickness direction) of the semiconductor substrate 31-1. The element isolation portion 36-1 is composed of, for example, a metal embedded portion 36A and an insulating film 36B.

[0082] The metal-embedded portion 36A-1 and the insulating film 36B-1 together surround the pixel 11-1 (particularly, the first transfer transistor TRX, the second transfer transistor TRM, the charge holding portion MEM, the third transfer transistor TRG, the floating diffusion FD, and the discharge transistor OFG) in the horizontal plane direction and extend in the normal direction (thickness direction) of the semiconductor substrate 31-1. The insulating film 36B-1 is formed in contact with the side surface of the metal-embedded portion 36A-1 and is formed between the metal-embedded portion 36A-1 and the pixel 11-1. The metal-embedded portion 36A-1 is formed using, for example, CVD. The metal-embedded portion 36A is formed from, for example, aluminum or an aluminum alloy. The insulating film 36B-1 is, for example, an oxide film formed by thermally oxidizing the semiconductor substrate 31-1, and is formed from, for example, silicon oxide.

[0083] The upper part of the element isolation portion 34-1 and the lower part of the element isolation portion 36-1 are connected to each other in the normal direction (thickness direction) of the semiconductor substrate 31-1. A complex formed of the element isolation portion 34-1 and the element isolation portion 36-1 corresponds to a specific example of an "isolation portion" in the present disclosure. The complex formed of the element isolation portion 34-1 and the element isolation portion 36-1 electrically and optically isolates each pixel 11-1. The complex formed of the element isolation portion 34-1 and the element isolation portion 36-1 is formed extending from the light-receiving surface 31A-1 to the formation surface 31B-1. In other words, the complex formed of the element isolation portion 34-1 and the element isolation portion 36-1 penetrates the semiconductor substrate 31-1.

[0084] The first substrate 30-1 further includes a light-shielding portion 37-1 formed to extend within the layer between the photodiode PD and the charge holding portion MEM. The light-shielding portion 37-1 blocks light incident through the light-receiving surface 31A-1 from reaching the charge holding portion MEM. The light-shielding portion 37-1 is composed of, for example, a metal-embedded portion 37A-1 and an insulating film 37B-1. The insulating film 37B-1 is formed in contact with the top, bottom, and side surfaces of the metal-embedded portion 37A-1, and is formed to cover the metal-embedded portion 37A-1.

[0085] The metal-embedded portion 37A-1 is formed, for example, using CVD. The metal-embedded portion 37A-1 is formed, for example, from aluminum or an aluminum alloy. The insulating film 37B-1 is, for example, an oxide film formed by thermally oxidizing the semiconductor substrate 31-1, and is formed, for example, from silicon oxide. The insulating film 37B-1 may be composed of a multilayer film including a SiO2 film (silicon oxide film). The insulating film 37B-1 may have a layered structure composed, for example, of a SiO2 film (silicon oxide film), an SCF film, and a SiO2 film (silicon oxide film). The SCF film is composed, for example, of hafnium oxide, zirconium oxide, aluminum oxide, titanium oxide, or tantalum oxide. The insulating film 37B-1 may be a single-layer film composed of SiO2 (silicon oxide). The metal-embedded portion 37A-1 corresponds to a specific example of a "light-shielding portion" in the present disclosure. The insulating film 37B-1 corresponds to a specific example of a "charge-shielding portion" in the present disclosure.

[0086] The metal-embedded portion 37A-1 is formed in contact with the upper portion of the metal-embedded portion 34A-1 of the element isolation portion 34-1. The metal-embedded portion 37A-1 blocks light incident through the back surface (light-receiving surface 31A-1) of the semiconductor substrate 31-1 from entering the charge retention portion MEM. The metal-embedded portion 37A-1 is disposed in a layer between the photodiode PD and the charge retention portion MEM. The metal-embedded portion 37A-1 is a sheet-shaped metal layer extending in the normal direction (thickness direction) of the semiconductor substrate 31-1. The metal-embedded portion 37A-1 is formed in contact with the upper portion of the metal-embedded portion 34A-1 of the element isolation portion 34-1 and the lower portion of the metal-embedded portion 36A-1 of the element isolation portion 36-1. The insulating film 37B-1 is formed in contact with the insulating film 36B-1 of the element isolation portion 36-1. That is, the element isolation portions 34-1 and 36-1 are connected to the light shielding portion 37-1.

[0087] The metal-embedded portion 37A-1 has an opening 37H-1 through which the vertical gate electrode VG penetrates. In other words, the metal-embedded portion 37A-1 blocks light incident through the back surface (light-receiving surface 31A-1) of the semiconductor substrate 31-1 from entering the charge holding portion MEM at locations other than the opening 37H-1. A part of the semiconductor substrate 31-1 (semiconductor portion 31C) is present in the opening 37H-1, and this semiconductor portion 31C functions as a transfer path for transferring charges to the first transfer transistor TRX. An insulating film 37B-1 covers the metal-embedded portion 37A-1 and electrically isolates the metal-embedded portion 37A-1 from the vertical gate electrode VG. Both the metal-embedded portion 37A-1 and the vertical gate electrode VG are formed in contact with the insulating film 37B-1. The insulating film 37B-1 blocks the transfer of charges to the first transfer transistor TRX through the gap between the edge of the opening 37H-1 closer to the charge retention unit MEM and the vertical gate electrode VG. Therefore, no transfer path for transferring charges to the first transfer transistor TRX exists between the edge of the opening 37H-1 closer to the charge retention unit MEM (i.e., the edge of the metal-embedded portion 37A-1 closer to the charge retention unit MEM) and the vertical gate electrode VG. In other words, there is no or almost no path for light incident through the light-receiving surface 31A-1 to penetrate into the charge retention unit MEM between the edge of the opening 37H-1 closer to the charge retention unit MEM (i.e., the edge of the metal-embedded portion 37A-1 closer to the charge retention unit MEM) and the vertical gate electrode VG. In addition, a transfer path for transferring charges to the first transfer transistor TRX exists between the edge of the opening 37H-1 far away from the charge holding portion MEM (i.e., the edge of the metal-embedded portion 37A-1 far away from the charge holding portion MEM) and the vertical gate electrode VG.

[0088] (Manufacturing Method) Next, a method for manufacturing the photodetector 1B will be described. Figures 17A to 17L show an example of a manufacturing process for the photodetector 1B.

[0089] First, a semiconductor substrate 31-1 is prepared, on which a photodiode PD, a P-type semiconductor portion 34B-1, a floating diffusion FD, a charge storage portion MEM, etc. are formed ( FIG. 17A ). Next, a hard mask 110-1 is formed on the upper surface (formation surface 31B-1) of the semiconductor substrate 31-1, selectively covering the formation surface 31B-1 ( FIG. 17A ). The hard mask 110-1 has an opening H1 at a position where the element isolation portion 36-1 is to be formed, and is made of an insulating material such as SiN (silicon nitride) or SiO (silicon oxide).

[0090] Next, by dry etching using the hard mask 110-1, the portion of the Si(111) constituting the semiconductor substrate 31-1 exposed at the opening H1 is dug down to form a trench H2 at the location where the element isolation portion 36-1 is to be formed ( FIG. 17B ). The depth of the trench H2 at this time corresponds to the depth dimension of the element isolation portion 36-1 to be formed later. Note that when wet etching is performed on the semiconductor substrate 31-1 (described below), the etching process also progresses slightly in the <111> direction, so it is advisable to adjust the depth of the trench H2 taking this into consideration.

[0091] Next, sidewalls 33s-1 are formed to cover the side surfaces of trench H2 (FIG. 17C). When forming the sidewalls 33s-1, an insulating film made of, for example, SiN or SiO2 is formed to cover the inner surface of trench H2, i.e., the side and bottom surfaces of trench H2, and then only the insulating film covering the bottom surface of trench H2 is removed by dry etchback. At this time, in order to leave the hard mask 110-1 that selectively covers the upper surface (formation surface 31B-1) of semiconductor substrate 31-1 without being removed by dry etchback, it is preferable to use a material different from that of hard mask 110-1 for the sidewalls 33s-1.

[0092] Next, the Si(111) constituting the semiconductor substrate 31-1 is partially removed by dry etch-back so as to further dig down the bottom surface of the trench H2 ( FIG. 17D ). At this time, the bottom surface of the trench H2 is further dug down by an amount corresponding to the thickness of the light-shielding portion 37-1, for example. In this case, too, when wet etching is performed on the semiconductor substrate 31-1 (described later), the etching process progresses slightly in the <111> direction, so it is advisable to adjust the digging depth from the bottom surface of the trench H2 taking this into consideration.

[0093] Next, a predetermined alkaline aqueous solution is poured into the trench H2, and wet etching is performed to partially remove the Si(111) constituting the semiconductor substrate 31-1 (FIG. 17E). As the alkaline aqueous solution, inorganic solutions such as KOH, NaOH, or CsOH can be used, and organic solutions such as EDP (ethylenediaminepyrocatechol aqueous solution), NH (hydrazine), NH OH (ammonium hydroxide), or TMAH (tetramethylammonium hydroxide) can be used.

[0094] Here, crystal anisotropic etching is performed, taking advantage of the property that the etching rate varies depending on the Si(111) plane orientation. Specifically, in a Si(111) substrate, the etching rate in the <110> direction is sufficiently higher than the etching rate in the <111> direction. Therefore, in the second embodiment of the present disclosure, etching proceeds in a predetermined direction (first direction) parallel to the upper surface (formation surface 31B-1) of the semiconductor substrate 31-1, while etching hardly proceeds in a second direction parallel to the upper surface (formation surface 31B-1) of the semiconductor substrate 31-1 and perpendicular to the first direction, or in a third direction perpendicular to the upper surface (formation surface 31B-1) of the semiconductor substrate 31-1. As a result, a cavity 51-1 is formed inside the semiconductor substrate 31-1, which is a Si(111) substrate, surrounded by crystal planes 31D-1, 31E-1, and 31F-1, and communicating with trench H2 (FIG. 17E). At this time, the semiconductor portion 31C is formed in the same layer of the semiconductor substrate 31-1 as the cavity portion 51-1.

[0095] Here, if the influence of the microloading phenomenon is large, the thickness of the cavity 51-1 also increases, which reduces the volume of the PD and lowers Qs, and the transfer path also narrows, raising concerns about deterioration of transfer efficiency. Therefore, in the second embodiment of the present disclosure, the line width at the intersection of the trench H2 is formed to be narrow, thereby minimizing the thickness of the cavity 51-1. Furthermore, if the thickness of the cavity 51-1 becomes thin due to the microloading phenomenon, the line width of the trench H2 can be formed to be thick, thereby increasing the thickness of the cavity 51-1. This improves the degree of freedom in designing the pixel 11-1.

[0096] After forming the cavity 51-1, the hard mask 110-1 and the sidewalls 33s-1 are removed by, for example, wet etching. It may also be possible to remove the hard mask 110-1 and the sidewalls 33s-1 by isotropic dry etching. For wet etching, if the hard mask 110-1 or the like is made of SiO 2 , a chemical solution containing HF (hydrofluoric acid), such as dilute hydrofluoric acid (DHF) or buffered hydrofluoric acid (BHF), may be used. If the hard mask 110-1 or the like is made of SiN, a chemical solution containing hot phosphoric acid or HF may be used. It is not necessary to remove the hard mask 110-1 and the sidewalls 33s-1.

[0097] Next, an insulating film 37B-1 is formed to cover the side surfaces of trench H2, the inner surfaces of cavity 51-1, and the upper surface (formation surface 31B-1) of semiconductor substrate 31-1, and further, an embedded portion 35-1 is formed to fill trench H2 and cavity 51-1 (Figure 17F).

[0098] Next, a trench H3 is formed in the semiconductor substrate 31-1, penetrating the semiconductor portion 31C-1 (FIG. 17G). At this time, the trench H3 is formed so that the insulating film 37B-1 is exposed on the side surface of the trench H3. Furthermore, the trench H3 is formed to a depth such that the bottom surface of the trench H3 reaches the N-type semiconductor region 32A-1 (photodiode PD). As shown in FIG. 17G, the insulating film 37B-1 may protrude from the side surface of the trench H3.

[0099] Next, a vertical gate electrode VG is formed so as to fill the trench H3 (FIG. 17H). At this time, the vertical gate electrode VG may be formed of a metal material or polysilicon. Next, the first transfer transistor TRX, the second transfer transistor TRM, the third transfer transistor TRG, and the discharge transistor OFG are formed, and an insulating layer 32-1 that fills these transistors is also formed (FIG. 17I).

[0100] Next, using, for example, dry etching, a trench H4 is formed in the P-type semiconductor portion 34B-1 from the light-receiving surface 31A-1 side of the semiconductor substrate 31-1 ( FIG. 17J ). At this time, the trench H4 is formed deep enough that the bottom surface of the trench H4 reaches the buried portion 35-1. Subsequently, the buried portion 35-1 is removed by wet etching using a predetermined chemical solution. As a result, a cavity 53-1 is formed at the location where the buried portion 35-1 was removed, extending in the in-plane direction of the stack and connecting to the trench H4 ( FIG. 17K ). The chemical solution used here is, for example, hydrofluoric acid. Here, the insulating film 37B-1 remains unetched, so the insulating film 37B-1 remains between the vertical gate electrode VG and the cavity 53-1.

[0101] Next, for example, by CVD, metal-filled portions 34A-1, 36A-1, and 37A-1 are formed so as to fill trench H4 and cavity 53-1 ( FIG. 17L ). The surface is then polished by CMP to flatten the surface. Subsequently, a second substrate 40-1 is bonded to the light-receiving surface 31A-1 of the semiconductor substrate 31-1, and a light-receiving lens 50-1 is bonded to the light-receiving surface 31A-1. In this manner, the photodetector 1B according to the second embodiment of the present disclosure is manufactured.

[0102] <Effects of the Second Embodiment> As described above, according to the second embodiment, the thickness of the light-shielding portion after wet etching increases as the microloading during processing of the trench H2 increases, and the area of ​​the photodiode PD or the charge storage portion (MEM) decreases. Therefore, by changing the line width of the trench H2, the thickness can be minimized. This improves the degree of freedom in the design of the pixel 11-1.

[0103] <Other Embodiments> As described above, the present technology has been described using the first and second embodiments and the first and second modified examples of the first embodiment. However, the descriptions and drawings that form part of this disclosure should not be understood to limit the present technology. Upon understanding the gist of the technical content disclosed in the first and second embodiments, it will be clear to those skilled in the art that various alternative embodiments, examples, and operational techniques can be included in the present technology. Furthermore, the configurations disclosed in the first and second embodiments and the first and second modified examples of the first embodiment can be appropriately combined within a range that does not cause contradictions. For example, configurations disclosed in multiple different embodiments may be combined, or configurations disclosed in multiple different modified examples of the same embodiment may be combined.

[0104] <Application Example to Electronic Devices> The above-described photodetector device can be applied to various electronic devices, such as imaging devices such as digital still cameras and digital video cameras, mobile phones with imaging functions, and other devices with imaging functions. Fig. 18 is a block diagram showing a configuration example of an imaging device as an electronic device to which the present technology is applied.

[0105] The imaging device 2201 shown in Figure 18 is configured with an optical system 2202, a shutter device 2203, a solid-state imaging element 2204 as a photodetector, a control circuit 2205, a signal processing circuit 2206, a monitor 2207, and two memories 2208, and is capable of capturing still images and moving images.

[0106] The optical system 2202 is configured with one or more lenses, and guides light (incident light) from a subject to the solid-state image sensor 2204, forming an image on the light receiving surface of the solid-state image sensor 2204. The shutter device 2203 is disposed between the optical system 2202 and the solid-state image sensor 2204, and controls the light irradiation period and light blocking period of the solid-state image sensor 2204 under the control of the control circuit 2205.

[0107] The solid-state imaging element 2204 is configured by a package including the above-mentioned solid-state imaging element. The solid-state imaging element 2204 accumulates signal charges for a certain period of time in response to light that is imaged on the light-receiving surface via the optical system 2202 and the shutter device 2203. The signal charges accumulated in the solid-state imaging element 2204 are transferred in accordance with a drive signal (timing signal) supplied from the control circuit 2205.

[0108] The control circuit 2205 outputs a drive signal that controls the transfer operation of the solid-state image sensor 2204 and the shutter operation of the shutter device 2203 , thereby driving the solid-state image sensor 2204 and the shutter device 2203 .

[0109] The signal processing circuit 2206 performs various signal processing on the signal charges output from the solid-state imaging element 2204. The image (image data) obtained by performing the signal processing by the signal processing circuit 2206 is supplied to a monitor 2207 for display, or supplied to a memory 2208 for storage (recording). In the imaging device 2201 configured in this manner, the photodetector 1 can also be applied in place of the solid-state imaging element 2204 described above.

[0110] <Application Example to Endoscopic Surgery System> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0111] Fig. 19 is a diagram showing an example of the schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied. Fig. 19 shows a state in which an operator (doctor) 11131 is performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0112] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the example shown, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may also be configured as a so-called flexible scope having a flexible lens barrel.

[0113] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an object to be observed inside the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0114] An optical system and an image sensor are provided inside the camera head 11102, and light reflected from the object of observation (observation light) is collected by the optical system onto the image sensor. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The image signal is sent to a camera control unit (CCU) 11201 as RAW data.

[0115] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and comprehensively controls the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives image signals from the camera head 11102 and performs various image processing on the image signals, such as development processing (demosaic processing), to display images based on the image signals. Under the control of the CCU 11201, the display device 11202 displays images based on the image signals that have been subjected to image processing by the CCU 11201.

[0116] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode) and supplies illumination light to the endoscope 11100 when photographing the surgical site, etc. The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of illumination light, magnification, focal length, etc.) of the endoscope 11100.

[0117] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 inflates the body cavity of the patient 11132 through the insufflation tube 11111 in order to ensure a clear field of view for the endoscope 11100 and a working space for the surgeon. The recorder 11207 is a device capable of recording various types of information related to the surgery. The printer 11208 is a device capable of printing various types of information related to the surgery in various formats such as text, images, or graphs.

[0118] The light source device 11203, which supplies illumination light to the endoscope 11100 when photographing the surgical site, can be configured from a white light source, such as an LED, a laser light source, or a combination of these. When the white light source is configured from a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, allowing the light source device 11203 to adjust the white balance of the captured image. In this case, it is also possible to time-share images corresponding to each RGB by irradiating the object of observation with laser light from each RGB laser light source and controlling the drive of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, color images can be obtained without providing a color filter to the image sensor.

[0119] Furthermore, the light source device 11203 may be controlled to change the intensity of light it outputs at predetermined time intervals. By controlling the driving of the image sensor of the camera head 11102 in synchronization with the timing of the change in light intensity to acquire images in a time-division manner and combining the images, it is possible to generate an image with a high dynamic range that is free from so-called blocked-up shadows and blown-out highlights.

[0120] The light source device 11203 may also be configured to supply light in a predetermined wavelength band corresponding to special light observation. Special light observation, for example, utilizes the wavelength dependence of light absorption in body tissues to irradiate light in a narrower band than the light irradiated during normal observation (i.e., white light) to capture high-contrast images of specific tissues, such as blood vessels on the surface of mucous membranes, in what is known as narrow band imaging. Alternatively, special light observation may involve fluorescence observation, in which images are obtained using fluorescence generated by irradiating excitation light. Fluorescence observation may involve irradiating excitation light onto body tissues and observing the fluorescence from the tissues (autofluorescence observation), or may involve locally injecting a reagent such as indocyanine green (ICG) into the body tissue and irradiating the tissues with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0121] Fig. 20 is a block diagram showing an example of the functional configuration of the camera head 11102 and CCU 11201 shown in Fig. 19. The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other via a transmission cable 11400 so as to be able to communicate with each other.

[0122] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is composed of a combination of multiple lenses including a zoom lens and a focus lens.

[0123] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be a single (so-called single-chip type) or multiple (so-called multi-chip type). When the imaging unit 11402 is composed of a multi-chip type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining these signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (dimensional) display. The 3D display allows the surgeon 11131 to more accurately grasp the depth of the biological tissue at the surgical site. Note that when the imaging unit 11402 is composed of a multi-chip type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0124] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately behind the objective lens. The driving unit 11403 is composed of an actuator, and moves the zoom lens and focus lens of the lens unit 11401 a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be adjusted as appropriate.

[0125] The communication unit 11404 is configured by a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0126] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of imaging, and / or information specifying the magnification and focus of the captured image.

[0127] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by the user, or may be automatically set by the control unit 11413 of the CCU 11201 based on the acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0128] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404. The communication unit 11411 is configured by a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0129] The communication unit 11411 also transmits to the camera head 11102 a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, etc. The image processing unit 11412 performs various types of image processing on the image signal, which is RAW data transmitted from the camera head 11102.

[0130] The control unit 11413 performs various controls related to the imaging of the surgical site, etc. by the endoscope 11100 and the display of the captured image obtained by imaging the surgical site, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0131] Furthermore, the control unit 11413 displays the captured image showing the surgical site, etc., on the display device 11202 based on the image signal subjected to image processing by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological parts, bleeding, mist generated when using the energy treatment tool 11112, etc., by detecting the shape and color of the edges of objects included in the captured image. When displaying the captured image on the display device 11202, the control unit 11413 may use the recognition results to superimpose various surgical support information on the image of the surgical site. By superimposing the surgical support information and presenting it to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0132] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for electrical signal communication, an optical fiber for optical communication, or a composite cable of these. In the illustrated example, communication is performed by wire using the transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0133] The above describes an example of an endoscopic surgery system to which the technology according to the present disclosure can be applied. The technology according to the present disclosure can be applied to, for example, the endoscope 11100, the imaging unit 11402 of the camera head 11102, the image processing unit 11412 of the CCU 11201, and the like, among the above-described configurations. Specifically, the light detection device 1A in FIG. 1 can be applied to the imaging unit 10402. Note that, although the endoscopic surgery system has been described as an example here, the technology according to the present disclosure may also be applied to other systems, such as a microsurgical system.

[0134] <Application to a Mobile Body> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0135] Fig. 21 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied. The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 21, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. The functional configuration of the integrated control unit 12050 also includes a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0136] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0137] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0138] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0139] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0140] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0141] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0142] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0143] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0144] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 21, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0145] Fig. 22 is a diagram showing an example of the installation position of the image capturing unit 12031. In Fig. 22, a vehicle 12100 has image capturing units 12101, 12102, 12103, 12104, and 12105 as the image capturing unit 12031.

[0146] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by the imaging units 12101 and 12105 are mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0147] 22 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0148] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0149] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0150] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0151] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0152] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the image capturing unit 12031 of the above-described configuration. Specifically, the technology can be applied to the photodetector 1A in FIG. 1 .

[0153] The present disclosure may also have the following configuration: (1) A photodetector comprising: a semiconductor layer having a light-receiving surface onto which light is incident and an element-forming surface located on the opposite side of the light-receiving surface; a plurality of pixels arranged in a matrix in the semiconductor layer and capable of generating an electrical signal in response to light incident from the light-receiving surface; and a pixel separator extending in a depth direction from the light-receiving surface to the element-forming surface of the semiconductor layer and separating adjacent pixels, wherein the pixel separator extends in a row direction or a column direction in a plan view, and includes an engraved region having a first depth and a first line width, and an engraved region having a second depth different from the first depth and a second line width different from the first line width so as to match the engraved region of the first depth. (2) The photodetector according to (1), wherein the pixel separator is formed so that the second line width is wider than the first line width when the second depth is shallower than the first depth. (3) The photodetector according to (1), wherein the pixel separating portion is formed so that the second line width is narrower than the first line width when the second depth is greater than the first depth. (4) The photodetector according to (1), wherein the pixel separating portion has a region where an engraved region of the first line width extending in the row direction and an engraved region of the first line width extending in the column direction intersect, and the line width of the intersecting region is formed narrower than the first line width in a plan view. (5) The photodetector according to (4), wherein the intersecting region of the pixel separating portion has a first region extending in the row direction and a second region extending in the column direction, and the first region and the second region are formed separately. (6) The photodetector device described in (5), wherein the first region has an opening pattern formed at each end of the first line width other than the intersection with the second region to remove the buried film in the recessed region, and the second region has an opening pattern formed at each end of the first line width other than the intersection with the first region to remove the buried film in the recessed region.(7) The photodetector according to (1), further comprising a light-shielding portion extending from the pixel separating portion in a direction perpendicular to a thickness direction of the semiconductor layer, wherein the light-shielding portion has a first thickness in the recessed region of the pixel separating portion having the first depth and a second thickness different from the first thickness in the recessed region of the second depth, the second thickness being formed to match the first thickness. (8) The photodetector according to (7), further comprising: a photoelectric conversion portion located on the light-receiving surface side from the light-shielding portion in the thickness direction of the semiconductor layer, the photoelectric conversion portion configured to photoelectrically convert light incident from the light-receiving surface to generate charges, and a charge holding portion located on the element forming surface side from the light-shielding portion in the thickness direction of the semiconductor layer, the charge holding portion configured to hold charges transferred from the photoelectric conversion portion. (9) The photodetector according to (8), wherein each of the plurality of pixels has a vertical gate electrode reaching the photoelectric conversion unit and includes a transfer transistor that transfers charges from the photoelectric conversion unit to the charge storage unit, and the light-shielding unit has an opening through which the vertical gate electrode passes. (10) The photodetector according to (9), wherein each of the plurality of pixels has a charge-shielding unit that blocks transfer of charges to the transfer transistor, the charge-shielding unit being disposed between an edge of the opening of the light-shielding unit that is closer to the charge storage unit and the vertical gate electrode. (11) The photodetector according to (1), wherein the film type embedded in the pixel separation unit is a silicon-based film type. (12) The photodetector according to (1), wherein the film type embedded in the pixel separation unit is a metal-based film type. (13) The photodetector according to (1), wherein the pixel separation unit has a hard mask opening pattern formed in a recessed region having a line width wider than the first line width.(14) A method for manufacturing a photodetector including: a semiconductor layer having a light-receiving surface on which light is incident and an element-forming surface located on the opposite side of the light-receiving surface; a plurality of pixels arranged in a matrix in the semiconductor layer and capable of generating an electric signal in response to light incident from the light-receiving surface; and a pixel separating section extending in a depth direction from the light-receiving surface to the element-forming surface of the semiconductor layer and separating adjacent pixels, the method comprising: forming a recessed region having a first depth and a first line width in the pixel separating section extending in a row direction or a column direction in a plan view; forming a recessed region having a second depth different from the first depth and a second line width different from the first line width so as to match the recessed region of the first depth; forming a buried film in the recessed region; forming a hard mask opening pattern in the recessed region having a line width wider than the first line width; and removing the buried film in the recessed region based on the hard mask opening pattern; (15) An electronic device comprising: a semiconductor layer having a light-receiving surface onto which light is incident and an element-forming surface located on the opposite side of the light-receiving surface, a plurality of pixels arranged in a matrix in the semiconductor layer and capable of generating an electric signal in response to light incident from the light-receiving surface, and a pixel separating section extending in a depth direction from the light-receiving surface to the element-forming surface of the semiconductor layer and separating adjacent pixels, wherein the pixel separating section extends in a row direction or a column direction in a plan view, and an engraved region having a first depth is formed with a first line width, and an engraved region having a second depth different from the first depth is formed with a second line width different from the first line width so as to match the engraved region of the first depth.

[0154] DESCRIPTION OF SYMBOLS 1A, 1B Photodetector device 2 Semiconductor chip 2A Pixel array section 2B Peripheral section 2C Pad arrangement section 3 Pixel 4 Vertical drive circuit 5 Column signal processing circuit 6 Horizontal drive circuit 7 Output circuit 8 Control circuit 10 Pixel drive wiring 11 Vertical signal line 12 Horizontal signal line 13 Logic circuit 14 Bonding pad 20 Semiconductor layer 20x1, 20y1 First side section 20x2, 20y2 Second side section 21 P-type well region 22 Trench 23 Insulating film 24 Isolation region 24x First portion 24y Second portion 24x1, 24x2, 24y1, 24y2 Region 25 Intersection 26 Non-isolation region 27 Photoelectric conversion region 30 Multilayer wiring layer 30-1 First substrate 31 Interlayer insulating film 31-1, 41-1 Semiconductor substrate 31A-1 Light receiving surface 31B-1 Formation surface 31C-1 Semiconductor portion 31D-1, 31E-1, 31F-1 Crystal surface 32 Wiring 32-1 Insulating layer 32A N-type semiconductor region 32A-1, 32B-1 N-type semiconductor region 33-1 Semiconductor layer 33s-1 Sidewall 34 Support substrate 34-1, 36-1 Element isolation portion 34A-1, 35-1 Buried portion 34B-1 P-type semiconductor portion 36 Planarization film 36A-1 Metal buried portion 36B-1, 37B-1 Insulating film 37-1 Light shielding portion 37H-1 Opening 38 Adhesive film 38-1 Fixed charge film 39-1 Color filter 40 Color filter layer 40-1 Second substrate 41 First color filter portion 42 Second color filter portion 43 Third color filter portion 45 Microlens 50 Stopper layer 50-1 Light receiving lens 51 First silicon oxide film 51-1, 53-1 Cavity portion 52 Silicon nitride film 53 Second silicon oxide film 54 Active pattern 56 Element isolation portion (STI) 61 Insulating film 62 Coating film 63 Anti-reflection film 64, 71, 81, 83 Resist 72 Hole 82, 84 Opening 110-1 Hard mask 111 Silicon 551,552 Convex portion 2201 Imaging device 2202 Optical system 2203 Shutter device 2204 Solid-state imaging element 2205 Control circuit 2206 Signal processing circuit 2207 Monitor 2208 Memory 10402 Imaging unit 11000 Endoscope surgery system 11100 Endoscope 11101 Optical tube 11102 Camera head 11110 Surgical tool 11111 Insufflation tube 11112 Energy treatment tool 11120 Support arm device 11131 Surgeon (doctor) 11132 Patient 11133 Patient bed 11200 Cart 11201 Camera control unit (CCU) 11202 Display device 11203 Light source device 11204 Input device 11205 Treatment tool control device 11206 Insufflation device 11207 Recorder 11208 Printer 11400 Transmission cable 11401 Lens unit 11402 Imaging unit 11403 Driving unit 11404 Communication unit 11405 Camera head control unit 11411 Communication unit 11412 Image processing unit 11413 Control unit 12000 Vehicle control system 12001 Communication network 12010 Drive system control unit 12020 Body system control unit 12030 Outside vehicle information detection unit 12031 Imaging unit 12040 Inside vehicle information detection unit 12041 Driver state detection unit 12050 Integrated control unit 12051 Microcomputer 12052 Audio / image output unit 12061 Audio speaker 12062 Display unit 12063 Instrument panel 12100 Vehicle 12101 to 12105 Imaging unit 12111 to 12114 Imaging range,

Claims

1. A semiconductor layer having a light-receiving surface on which light is incident and an element formation surface located on the opposite side of the light-receiving surface; a plurality of pixels arranged in a matrix in the semiconductor layer and capable of generating an electrical signal in response to light incident from the light-receiving surface; and a pixel isolation portion extending in the depth direction from the light-receiving surface to the element formation surface of the semiconductor layer and separating adjacent pixels, wherein the pixel isolation portion is formed in a dug-in region extending in the row direction or the column direction in plan view, having a first depth and a first line width, and a dug-in region having a second depth different from the first depth is formed with a second line width different from the first line width so as to match the dug-in region having the first depth, a photodetector.

2. The photodetector according to claim 1, wherein the pixel isolation portion is formed with the second line width being wider than the first line width when the second depth is shallower than the first depth.

3. The photodetector according to claim 1, wherein the pixel isolation portion is formed with the second line width being narrower than the first line width when the second depth is deeper than the first depth.

4. The photodetector according to claim 1, wherein the pixel isolation portion has a region where a dug-in region having the first line width extending in the row direction and a dug-in region having the first line width extending in the column direction intersect, and in plan view, the line width of the intersecting region is formed narrower than the first line width.

5. The intersecting region of the pixel isolation portion has a first region extending in the row direction and a second region extending in the column direction, and the first region and the second region are formed separately. The photodetector according to claim 4.

6. The first region is formed with an opening pattern for removing the embedded film of the dug-in region at both ends having the first line width except for the portion intersecting with the second region, and the second region is formed with an opening pattern for removing the embedded film of the dug-in region at both ends having the first line width except for the portion intersecting with the first region. The photodetector according to claim 5.

7. The light detection device according to claim 1, further comprising a light shielding portion extending along a direction perpendicular to the thickness direction of the semiconductor layer from the pixel isolation portion, wherein the light shielding portion has a first thickness in the dug-in region of the first depth of the pixel isolation portion, and has a second thickness different from the first thickness in the dug-in region of the second depth, and is formed so as to match the second thickness with the first thickness.

8. Each of the plurality of pixels includes a photoelectric conversion portion that is located on the light receiving surface side from the light shielding portion in the thickness direction of the semiconductor layer and generates charges by photoelectrically converting light incident from the light receiving surface, and a charge holding portion that is located on the element formation surface side from the light shielding portion in the thickness direction of the semiconductor layer and holds the charges transferred from the photoelectric conversion portion. The light detection device according to claim 7.

9. Each of the plurality of pixels has a vertical gate electrode reaching the photoelectric conversion portion and includes a transfer transistor that transfers charges from the photoelectric conversion portion to the charge holding portion. The light detection device according to claim 8, wherein the light shielding portion has an opening through which the vertical gate electrode passes.

10. Each of the plurality of pixels has a charge shielding portion that blocks the transfer of charges to the transfer transistor, which is interposed between an edge closer to the charge holding portion among the openings of the light shielding portion and the vertical gate electrode. The light detection device according to claim 9.

11. The film type embedded in the pixel isolation portion is a silicon-based film type. The light detection device according to claim 1.

12. The film type embedded in the pixel isolation portion is a metal-based film type. The light detection device according to claim 1.

13. The pixel isolation portion has a hard mask opening pattern formed in a dug-in region having a line width thicker than the first line width. The light detection device according to claim 1.

14. A method of manufacturing a photodetector, comprising: a semiconductor layer having a light-receiving surface on which light is incident and an element formation surface located on the opposite side of the light-receiving surface; a plurality of pixels arranged in a matrix in the semiconductor layer and capable of generating an electrical signal in response to light incident from the light-receiving surface; and a pixel isolation portion extending in a depth direction from the light-receiving surface to the element formation surface of the semiconductor layer and separating adjacent pixels, the method comprising: forming a dug-in region having a first depth of the pixel isolation portion extending in a row direction or a column direction in a plan view with a first line width; forming a dug-in region having a second depth different from the first depth with a second line width different from the first line width so as to match the dug-in region having the first depth; forming an embedded film in the dug-in region; forming a hard mask opening pattern in a dug-in region having a line width wider than the first line width among the dug-in regions; and removing the embedded film in the dug-in region based on the hard mask opening pattern.

15. An electronic device comprising: a semiconductor layer having a light-receiving surface on which light is incident and an element formation surface located on the opposite side of the light-receiving surface; a plurality of pixels arranged in a matrix in the semiconductor layer and capable of generating an electrical signal in response to light incident from the light-receiving surface; and a pixel isolation portion extending in a depth direction from the light-receiving surface to the element formation surface of the semiconductor layer and separating adjacent pixels, wherein the pixel isolation portion extends in a row direction or a column direction in a plan view, a dug-in region having a first depth is formed with a first line width, and a dug-in region having a second depth different from the first depth is formed with a second line width different from the first line width so as to match the dug-in region having the first depth.

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