Semiconductor device

Abstract

This semiconductor device comprises: a substrate (50) including a surface metal body (52) connected to a semiconductor element; and a sealing body (30) for sealing the semiconductor element and at least a part of the substrate (50) including the surface metal body (52). High-adhesion sections (527a, 527b, 527c) having an enhanced degree of adhesion to the sealing body (30) and a low-adhesion section (527p) having a lower degree of adhesion to the sealing body (30) than the high-adhesion sections are formed in the portion of the surface metal body (52) that is in contact with the sealing body (30). At least some of the high-adhesion sections are disposed between parts of the substrate (50) having different potentials.

Description

Semiconductor Devices CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based on Patent Application No. 2023-222032 filed in Japan on December 27, 2023, and the contents of the original application are incorporated by reference in their entirety.

[0002] TECHNICAL FIELD The disclosure herein relates to semiconductor devices.

[0003] Patent Document 1 discloses a semiconductor device including a semiconductor element having a main electrode, a substrate having metal bodies disposed on both sides of an insulating base, and a sealing body. The contents of the prior art document are incorporated by reference as explanations of the technical elements in this specification.

[0004] Japanese Patent Application Laid-Open No. 2022-181818

[0005] If the sealing body peels off due to thermal stress, there is a risk that a leak path will occur between parts of the substrate that have different potentials, which will result in a decrease in reliability.

[0006] To address this issue, for example, roughening the surface of the metal body to increase adhesion to the sealant can prevent the sealant from peeling off. However, this is time-consuming and increases manufacturing costs.

[0007] One disclosed object is to provide a semiconductor device that achieves both reduced manufacturing costs and improved reliability.

[0008] In order to achieve the above object, a semiconductor device according to one aspect of the present disclosure comprises: a substrate having a semiconductor element having a main electrode; an insulating base material; and a surface metal body arranged on the surface of the insulating base material and electrically connected to the main electrode; and a sealing body that seals at least a portion of the substrate including the surface metal body, and the semiconductor element, wherein the portion of the surface metal body that comes into contact with the sealing body is formed with a high-adhesion portion that has a higher degree of adhesion with the sealing body, and a low-adhesion portion that has a lower degree of adhesion with the sealing body than the high-adhesion portion, and at least a portion of the high-adhesion portion is arranged between portions of the substrate that have different potentials.

[0009] According to the semiconductor device disclosed herein, in addition to a high-adhesion portion, a low-adhesion portion is also formed in the portion of the surface (front surface) metal body that comes into contact with the sealing body. Therefore, the effort required to form the high-adhesion portion can be reduced compared to when the entire surface is made into a high-adhesion portion. At the same time, since the high-adhesion portion is disposed between portions of the substrate that have different potentials, peeling of the sealing body between different potentials can be sufficiently suppressed. Therefore, concerns about the formation of a leak path between different potentials can be sufficiently suppressed. As a result, the above-mentioned semiconductor device can achieve both reduced manufacturing costs and improved reliability.

[0010] The reference numbers in parentheses above merely indicate an example of the correspondence with specific configurations in the embodiments described below, and do not in any way limit the technical scope.

[0011] 8 is a diagram illustrating a circuit configuration of a power conversion device to which the semiconductor device according to the first embodiment is applied. FIG. 9 is a perspective view illustrating a semiconductor device. FIG. 10 is a perspective view illustrating a semiconductor device. FIG. 11 is a plan view illustrating a semiconductor device. FIG. 12 is a cross-sectional view taken along line VV in FIG. 4. FIG. 13 is a cross-sectional view taken along line VI-VI in FIG. 4. FIG. 14 is a cross-sectional view taken along line VII-VII in FIG. 4. FIG. 15 is a cross-sectional view taken along line VIII-VIII in FIG. 4. FIG. 16 is an enlarged view of region IX shown in FIG. 11. FIG. 12 is an exploded perspective view illustrating a semiconductor device. FIG. 13 is a plan view illustrating a state in which a semiconductor element is mounted on a substrate on the drain electrode side. FIG. 14 is a plan view illustrating a circuit pattern on the substrate on the drain electrode side. FIG. 15 is a plan view illustrating a circuit pattern on the substrate on the source electrode side. FIG. 16 is a diagram illustrating an arrangement of a circuit pattern, semiconductor elements, and terminals on the drain electrode side. FIG. 17 is a diagram illustrating an arrangement of a circuit pattern, semiconductor elements, and terminals on the source electrode side. FIG. 17 is a plan view illustrating a current loop. FIG. 18 is a plan view illustrating the distribution of highly adhered portions in a substrate on the D side. FIG. 19 is a plan view illustrating the distribution of highly adhered portions in a substrate on the S side. FIG. 19 is a diagram in which tensile forces are added to FIG. 10. FIG. 11 is a cross-sectional view illustrating an uneven oxide film. FIG. 12 is a plan view illustrating the distribution of highly adhered portions in a substrate on the D side according to a second embodiment. FIG. 10 is a plan view showing the distribution of high adhesion portions in a D-side substrate according to a third embodiment; FIG. 11 is a plan view showing the distribution of high adhesion portions in an S-side substrate according to a fourth embodiment; FIG. 12 is a plan view showing the distribution of high adhesion portions in an S-side substrate according to a fifth embodiment; and FIG. 13 is a cross-sectional view of a semiconductor device according to a fifth embodiment.

[0012] Hereinafter, several embodiments will be described with reference to the drawings. Note that in each embodiment, corresponding components are designated by the same reference numerals, and redundant description may be omitted. When only a portion of the configuration is described in each embodiment, the configuration of another embodiment previously described may be applied to the remaining portion of the configuration. Furthermore, in addition to the combinations of configurations explicitly stated in the description of each embodiment, configurations of several embodiments may be partially combined together even if not explicitly stated, provided that there is no particular problem with the combination.

[0013] The semiconductor device of this embodiment is applied to, for example, a power conversion device of a mobile object using a rotating electric machine as a drive source. The mobile object may be, for example, an electric vehicle such as an electric vehicle (EV), a hybrid vehicle (HV), or a plug-in hybrid vehicle (PHV), an aircraft such as a drone, a ship, a construction machine, or an agricultural machine. An example of application to a vehicle will be described below.

[0014] First Embodiment First, a schematic configuration of a vehicle drive system 1 will be described with reference to FIG.

[0015] <Vehicle Drive System> As shown in FIG. 1 , a vehicle drive system 1 includes a DC power supply 2 , a motor generator 3 , and a power conversion device 4 .

[0016] The DC power supply 2 is a DC voltage source formed by a rechargeable secondary battery. The secondary battery is, for example, a lithium-ion battery or a nickel-metal hydride battery. The motor generator 3 is a three-phase AC rotating electric machine. The motor generator 3 functions as a drive source for the vehicle, i.e., an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion device 4 converts power between the DC power supply 2 and the motor generator 3.

[0017] <Power Conversion Device> Next, the circuit configuration of the power conversion device 4 will be described with reference to Fig. 1. The power conversion device 4 includes a power conversion circuit. The power conversion device 4 of this embodiment includes a smoothing capacitor 5 and an inverter 6, which is a power conversion circuit.

[0018] The smoothing capacitor 5 mainly smoothes the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to a P line 7, which is a power supply line on the high potential side, and an N line 8, which is a power supply line on the low potential side. The P line 7 is connected to the positive electrode of the DC power supply 2, and the N line 8 is connected to the negative electrode of the DC power supply 2. The positive electrode of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. The negative electrode of the smoothing capacitor 5 is connected to the N line 8 between the DC power supply 2 and the inverter 6. The smoothing capacitor 5 is connected in parallel to the DC power supply 2.

[0019] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts DC voltage into three-phase AC voltage under switching control by a control circuit (not shown) and outputs the voltage to the motor generator 3. This drives the motor generator 3 to generate a predetermined torque. During regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 in response to rotational force from the wheels into DC voltage under switching control by the control circuit and outputs the DC voltage to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power source 2 and the motor generator 3.

[0020] The inverter 6 is configured with upper and lower arm circuits 9 for three phases. The upper and lower arm circuits 9 are sometimes referred to as legs. Each upper and lower arm circuit 9 has an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H on the P line 7 side. The connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via an output line 10. The inverter 6 has six arms. Each arm is configured with a switching element. At least a portion of each of the P line 7, the N line 8, and the output line 10 is configured with a conductive member such as a bus bar.

[0021] In this embodiment, an n-channel MOSFET 11 is used as the switching element constituting each arm. The number of switching elements constituting each arm is not particularly limited. It may be one or more. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor.

[0022] As an example, in this embodiment, each arm has two MOSFETs 11. The two MOSFETs 11 constituting one arm are connected in parallel. In the upper arm 9H, the drains of the two MOSFETs 11 connected in parallel are connected to the P line 7. In the lower arm 9L, the sources of the two MOSFETs 11 connected in parallel are connected to the N line 8. The sources of the two MOSFETs 11 connected in parallel in the upper arm 9H are connected to the drains of the two MOSFETs 11 connected in parallel in the lower arm 9L. The two MOSFETs 11 connected in parallel are turned on and off at the same time by a common gate drive signal (drive voltage).

[0023] A freewheeling diode 12 is connected in antiparallel to each MOSFET 11. The diode 12 may be a parasitic diode (body diode) of the MOSFET 11, or may be provided separately from the parasitic diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11, and the cathode is connected to the drain. The upper and lower arm circuits 9 for one phase are provided by one semiconductor device 20. Details of the semiconductor device 20 will be described later.

[0024] The power conversion device 4 may further include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage into a DC voltage of a different value. The converter is provided between the DC power source 2 and the smoothing capacitor 5. The converter is configured to include, for example, a reactor and the above-mentioned upper and lower arm circuits 9. This configuration allows for voltage step-up and step-down. The power conversion device 4 may also include a filter capacitor that removes power supply noise from the DC power source 2. The filter capacitor is provided between the DC power source 2 and the converter.

[0025] The power conversion device 4 may include a drive circuit for the switching elements that constitute the inverter 6 and the like. The drive circuit supplies a drive voltage to the gate of the MOSFET 11 of the corresponding arm based on a drive command from the control circuit. The drive circuit drives the corresponding MOSFET 11, i.e., turns it on and off, by applying the drive voltage. The drive circuit is sometimes referred to as a driver.

[0026] The power conversion device 4 may include a control circuit for the switching elements. The control circuit generates a drive command for operating the MOSFET 11 and outputs it to the drive circuit. The control circuit generates the drive command based on, for example, a torque request input from a host ECU (not shown) and signals detected by various sensors. ECU is an abbreviation for Electronic Control Unit.

[0027] The various sensors include, for example, a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs, for example, a PWM signal as a drive command. The control circuit is configured with, for example, a processor and a memory. PWM is an abbreviation for Pulse Width Modulation.

[0028] <Semiconductor Device> Next, the semiconductor device will be described with reference to FIGS. 2 to 13. FIG. 2 is a perspective view of the semiconductor device 20. FIG. 3 is a perspective view of the semiconductor device 20 similar to FIG. 2. FIG. 3 is a see-through view showing the internal structure. FIG. 4 is a plan view of the semiconductor device 20. FIG. 4 is a see-through view showing the internal structure. FIG. 5 is a cross-sectional view taken along line VV in FIG. 4. FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 4. FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 4. FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. 4. FIG. 9 is an enlarged view of region IX indicated by a dashed line in FIG. 8.

[0029] Fig. 10 is an exploded perspective view for explaining the semiconductor device 20. For convenience, a lead frame 94 is shown in Fig. 10. Fig. 11 is a plan view showing a state in which a semiconductor element 40 is mounted on a substrate 50. Fig. 12 is a plan view showing the circuit pattern of the surface metal body 52 on the substrate 50. Fig. 13 is a plan view showing the circuit pattern of the surface metal body 62 on the substrate 60.

[0030] In the following, the thickness direction of the semiconductor element (semiconductor substrate) is referred to as the Z direction. The Y direction is perpendicular to the Z direction and is the direction in which the semiconductor elements constituting the upper arm 9H and the semiconductor elements constituting the lower arm 9L are arranged. The X direction is the direction perpendicular to both the Z direction and the Y direction. Unless otherwise specified, the shape viewed from the Z direction, in other words, the shape along the XY plane defined by the X and Y directions, is referred to as the planar shape. The planar view from the Z direction may sometimes be simply referred to as the planar view. Furthermore, the term "arrangement" is not limited to the mounting surface, and may be referred to as an arrangement when there is an overlapping positional relationship in plan view.

[0031] 2 to 13, the semiconductor device 20 constitutes one of the upper and lower arm circuits 9, i.e., one phase of the upper and lower arm circuit 9. The semiconductor device 20 includes a sealing body 30, a semiconductor element 40, substrates 50 and 60, a conductive spacer 70, an arm connection portion 80, and an external connection terminal 90.

[0032] The encapsulant 30 encapsulates some of the other elements constituting the semiconductor device 20. The remaining parts of the other elements are exposed to the outside of the encapsulant 30. The encapsulant 30 is made of, for example, a resin. An example of a resin is an epoxy-based resin. The encapsulant 30 is molded using, for example, a transfer molding method using a resin. Such a encapsulant 30 may be referred to as an encapsulating resin body, a molded resin, or a resin molded body. The encapsulant 30 may be formed using, for example, a gel. The gel is filled (placed) in the opposing regions of the pair of substrates 50, 60, for example.

[0033] As shown in Figures 2 to 4, the sealing body 30 has a generally rectangular shape in plan view. The sealing body 30 has, as surfaces forming its outer periphery, one surface 30a and a back surface 30b that is the surface opposite to the one surface 30a in the Z direction. The one surface 30a and the back surface 30b are, for example, flat surfaces. The sealing body 30 also has side surfaces that connect the one surface 30a and the back surface 30b. The side surfaces include two side surfaces 30c and 30d from which the external connection terminals 90 protrude. The side surface 30d is the surface opposite to the side surface 30c in the X direction.

[0034] The semiconductor element 40 is formed by forming a switching element on a semiconductor substrate made of silicon (Si) or a wide bandgap semiconductor having a wider bandgap than silicon. Examples of wide bandgap semiconductors include silicon carbide (SiC), gallium nitride (GaN), and gallium oxide (GaO). ２ O ３ ), and diamond. The semiconductor element 40 is sometimes called a power element or a semiconductor chip.

[0035] The semiconductor element 40 of this embodiment has the above-described n-channel MOSFET 11 formed on a semiconductor substrate made of SiC. The MOSFET 11 has a vertical structure so that a main current flows in the thickness direction of the semiconductor element 40 (semiconductor substrate), i.e., in the Z direction. The semiconductor element 40 has main electrodes of a switching element on both sides in the thickness direction, i.e., the Z direction. Specifically, the main electrodes include a drain electrode 40D on one side and a source electrode 40S on the back side, which is the surface opposite the first side in the Z direction.

[0036] When the diode 12 is a parasitic diode, the source electrode 40S also serves as an anode electrode, and the drain electrode 40D also serves as a cathode electrode. The diode 12 may be configured on a chip separate from the MOSFET 11. The drain electrode 40D is a main electrode (first main electrode) on the high potential side, and the source electrode 40S is a main electrode (second main electrode) on the low potential side. Hereinafter, the drain electrode 40D and the source electrode 40S may be referred to as main electrodes 40D and 40S.

[0037] The semiconductor element 40 has a generally rectangular shape in plan view. As shown in FIG. 11 , the semiconductor element 40 has a pad 40P formed on the back surface at a position different from the source electrode 40S. The source electrode 40S and the pad 40P are exposed from a protective film (not shown) formed on the back surface of the semiconductor substrate. The drain electrode 40D is formed on almost the entire surface. The source electrode 40S is formed on a portion of the back surface of the semiconductor element 40. In a plan view, the drain electrode 40D has a larger area than the source electrode 40S.

[0038] The pad 40P is a signal electrode. The pad 40P is electrically isolated from the source electrode 40S. The pad 40P is formed at the end opposite to the formation region of the source electrode 40S in the Y direction. The pad 40P includes a pad for a gate electrode.

[0039] The semiconductor device 20 includes a plurality of semiconductor elements 40 having the above-described configuration. The semiconductor elements 40 share a common configuration. The plurality of semiconductor elements 40 include a semiconductor element 40H that constitutes an upper arm 9H and a semiconductor element 40L that constitutes a lower arm 9L. The semiconductor element 40H is sometimes referred to as an upper arm element, and the semiconductor element 40L is sometimes referred to as a lower arm element. Each of the semiconductor elements 40H and 40L is an arm element that constitutes one arm. The semiconductor device 20 of this embodiment includes two semiconductor elements 40H and two semiconductor elements 40L. The two semiconductor elements 40H are aligned in the X direction. Similarly, the two semiconductor elements 40L are aligned in the X direction. The semiconductor elements 40H and 40L are aligned in the Y direction. The Y direction is a first direction perpendicular to the Z direction, which is the thickness direction of the semiconductor elements 40. The X direction is a second direction perpendicular to the Z direction and the first direction (Y direction). The semiconductor device 20 has two rows of semiconductor elements 40H and semiconductor elements 40L arranged along the Y direction.

[0040] The semiconductor elements 40 are arranged at approximately the same position relative to one another in the Z direction. The drain electrode 40D of each semiconductor element 40 faces the substrate 50. The source electrode 40S of each semiconductor element 40 faces the substrate 60. Hereinafter, the substrate 50 may be referred to as the D-side substrate 50, and the substrate 60 may be referred to as the S-side substrate 60.

[0041] The substrates 50 and 60 are arranged in the Z direction to sandwich the plurality of semiconductor elements 40. The substrates 50 and 60 are arranged so that at least a portion of each substrate faces each other in the Z direction. The substrates 50 and 60 contain all of the plurality of semiconductor elements 40 (40H, 40L) in a plan view.

[0042] The substrate 50 is disposed on the drain electrode 40D side of the semiconductor element 40. The substrate 60 is disposed on the source electrode 40S side of the semiconductor element 40. As described below, the substrate 50 is electrically connected to the drain electrode 40D and provides a wiring function. Similarly, the substrate 60 is electrically connected to the source electrode 40S and provides a wiring function. For this reason, the substrates 50 and 60 are sometimes referred to as wiring substrates. The substrate 50 is sometimes referred to as a drain substrate or D-side substrate, and the substrate 60 is sometimes referred to as a source substrate or S-side substrate. The substrates 50 and 60 provide a heat dissipation function for dissipating heat generated by the semiconductor element 40. For this reason, the substrates 50 and 60 are sometimes referred to as heat dissipation members. Of the pair of substrates 50 and 60 sandwiching the semiconductor element 40 in the Z direction, the D-side substrate 50 is sometimes referred to as a first substrate, and the S-side substrate 60 is sometimes referred to as a second substrate.

[0043] The substrate 50 has an opposing surface 50a facing the semiconductor element 40 and a back surface 50b opposite the opposing surface 50a. The substrate 50 includes an insulating base material 51, a front surface metal body 52, and a back surface metal body 53. The substrate 50 is a substrate in which the insulating base material 51 and the metal bodies 52 and 53 are laminated. The substrate 60 has an opposing surface 60a facing the semiconductor element 40 and a back surface 60b opposite the opposing surface 60a. The substrate 60 includes an insulating base material 61, a front surface metal body 62, and a back surface metal body 63. The substrate 60 is a substrate in which the insulating base material 61 and the metal bodies 62 and 63 are laminated. In the substrate 50, which is a first substrate, the insulating base material 51 is a first insulating base material, the front surface metal body 52 is a first front surface metal body, and the back surface metal body 53 is a first back surface metal body. In the substrate 60, which is the second substrate, the insulating base material 61 is a second insulating base material, the front surface metal body 62 is a second front surface metal body, and the back surface metal body 63 is a second back surface metal body. Hereinafter, the front surface metal bodies 52, 62 and the back surface metal bodies 53, 63 may be simply referred to as metal bodies 52, 53, 62, 63.

[0044] The insulating substrate 51 electrically separates the front surface metal body 52 from the back surface metal body 53. Similarly, the insulating substrate 61 electrically separates the front surface metal body 62 from the back surface metal body 63. The insulating substrates 51 and 61 are sometimes referred to as insulating layers. The material of the insulating substrates 51 and 61 is resin or inorganic ceramic. For example, epoxy resin or polyimide resin can be used as the resin. For example, Al can be used as the ceramic. ２ O ３ (alumina), Si ３ N ４ Silicon nitride, etc., can be used. When the insulating base material 51, 61 is made of resin, the substrates 50, 60 are sometimes called metal-resin substrates. When the insulating base material 51, 61 is made of ceramic, the substrates 50, 60 are sometimes called metal-ceramic substrates.

[0045] In the case of the insulating substrates 51 and 61 made of a resin material, an inorganic filler (inorganic filling material) may be contained in the resin in order to improve heat dissipation and insulation properties. The linear expansion coefficient may be adjusted by adding a filler. Examples of the filler include Al ２ O ３, SiO ２ (silicon dioxide), AlN (aluminum nitride), BN (boron nitride), etc. The insulating base materials 51 and 61 may contain only one type of filler or may contain multiple types of fillers.

[0046] Considering heat dissipation and insulation properties, in the case of a resin-based insulating substrate, the thickness of each insulating substrate 51, 61, i.e., the length in the Z direction, is preferably approximately 50 μm to 300 μm. In the case of a ceramic-based insulating substrate, the thickness of each insulating substrate 51, 61 is preferably approximately 200 μm to 500 μm. In the Z direction, the front surface (front side) of the insulating substrates 51, 61 is the inner surface, i.e., the surface facing the semiconductor element 40, and the back surface, which is the surface opposite the front surface in the Z direction, is the outer surface. The insulating substrates 51, 61 may be made of the same material or may be made of different materials. In this embodiment, resin-based insulating substrates 51, 61 are used, and the material composition is the same. The linear expansion coefficient of the insulating substrates 51, 61 is adjusted to approximately the same value as that of the encapsulant 30 by adding a filler to the resin. By adding filler to the resin, the coefficient of linear expansion of the insulating base materials 51 and 61 and the sealing body 30 becomes close to that of the metal (Cu) that constitutes the metal bodies 52 , 53 , 62 , and 63 .

[0047] The metal bodies 52, 53, 62, and 63 are provided, for example, as metal plates or metal foils. The metal bodies 52, 53, 62, and 63 are formed from metals with good electrical and thermal conductivity, such as Cu or Al. The thickness of each of the metal bodies 52, 53, 62, and 63 is, for example, approximately 0.1 mm to 3 mm. The front surface metal body 52 is disposed on the front surface of the insulating substrate 51 in the Z direction. The back surface metal body 53 is disposed on the back surface of the insulating substrate 51. Similarly, the front surface metal body 62 is disposed on the front surface of the insulating substrate 61 in the Z direction. The back surface metal body 63 is disposed on the back surface of the insulating substrate 61. The insulating substrates 51 and 61 are surfaces facing the semiconductor element 40 in the Z direction. As shown in FIGS. 5 to 9 , in this embodiment, the front surface metal body 52 is thicker than the back surface metal body 53. The front surface metal body 62 is thicker than the back surface metal body 63. The front surface metal body 52 on the drain electrode 40D side is thicker than the front surface metal body 62 on the source electrode 40S side. Alternatively, the back surface metal bodies 53, 63 may be made thicker than the corresponding front surface metal bodies 52, 62. The front surface metal body 52 and the back surface metal body 53 may be made approximately equal in thickness, or the front surface metal body 62 and the back surface metal body 63 may be made approximately equal in thickness.

[0048] The surface metal bodies 52, 62 are patterned. The surface metal bodies 52, 62 provide wiring, i.e., circuits. For this reason, the surface metal bodies 52, 62 are sometimes referred to as circuit patterns, wiring layers, or circuit conductors. The surface metal bodies 52, 62 may have a plating film of Ni, Au, or the like on the metal surface. Hereinafter, the pattern of the surface metal bodies 52, 62 may be referred to as a circuit pattern. The surface metal body 52 and the area on the surface of the insulating base material 51 where the surface metal body 52 is not disposed form the opposing surface 50a of the substrate 50. Similarly, the surface metal body 62 and the area on the surface of the insulating base material 61 where the surface metal body 62 is not disposed form the opposing surface 60a of the substrate 60.

[0049] For example, the front surface metal bodies 52, 62 may be prepared by patterning them into a predetermined shape by press working or etching, and then be attached to a two-layer laminate of an insulating base material 51, 61 and a back surface metal body 53, 63 to form the substrates 50, 60. After forming a three-layer laminate of the front surface metal bodies 52, 62, insulating base material 51, 61, and back surface metal bodies 53, 63, the front surface metal bodies 52, 62 may be patterned by cutting or etching.

[0050] 11 and other figures, the surface metal body 52 has a P wiring 54 and a relay wiring 55. The P wiring 54 and the relay wiring 55 are electrically separated by a predetermined gap. This gap is filled with the sealing body 30.

[0051] The P wiring 54 is connected to a P terminal 91P (described later) and the drain electrode 40D of the semiconductor element 40H. The P wiring 54 electrically connects the P terminal 91P and the drain electrode 40D of the semiconductor element 40H. The P wiring 54 is sometimes referred to as a positive wiring or a high-potential power supply wiring. The relay wiring 55 is connected to the drain electrode 40D of the semiconductor element 40L, the arm connection portion 80, and the output terminal 92. The relay wiring 55 electrically connects the arm connection portion 80 and the drain electrode 40D of the semiconductor element 40L. The relay wiring 55 electrically connects the source electrode 40S of the semiconductor element 40H and the drain electrode of the semiconductor element 40L to the output terminal 92. In the front surface metal body 52 (first front surface metal body), the P wiring 54 is the first power supply wiring, and the relay wiring 55 is the first relay wiring.

[0052] The P wiring 54 and the relay wiring 55 are arranged side by side in the Y direction. In the Y direction, the P wiring 54 is arranged on the power supply terminal 91 side, and the relay wiring 55 is arranged on the output terminal 92 side. In other words, the P wiring 54 is arranged in a position close to the side surface 30c of the sealing body 30, and the relay wiring 55 is arranged in a position close to the side surface 30d.

[0053] The P wiring 54 has a notch 540. The notch 540 is open on one of the four sides of a substantially rectangular shape in plan view whose longitudinal direction is the X direction. The notch 540 is provided on the side facing the side surface 30c, at approximately the center in the X direction. The P wiring 54 has a base 541 and a pair of extensions 542. The base 541 and the pair of extensions 542 define the notch 540. The P wiring 54 has a substantially U-shape (concave shape) in plan view.

[0054] The base 541 is a portion closer to the relay wiring 55 than the cutout 540 and the extension 542, and has a generally rectangular shape in plan view. The base 541 overlaps the semiconductor element 40H in plan view. That is, the semiconductor element 40H is disposed on the base 541. The drain electrode 40D of the semiconductor element 40H is connected to the base 541.

[0055] The two extension portions 542 extend from the base 541 in the same direction, specifically the Y direction, toward the side surface 30c of the sealing body 30. One of the extension portions 542 is connected to the vicinity of one end of the base 541 in the X direction, and the other is connected to the vicinity of the other end of the base 541. The two ends of the U-shape of the P wiring 54, that is, the ends of the two extension portions 542 opposite the base 541, are at approximately the same position in the Y direction. The pair of extension portions 542 sandwich the notch 540 in the X direction. The length of the base 541 in the Y direction is longer than the depth of the notch 540 and the extension portions 542.

[0056] The relay wiring 55 also has a notch 550. The notch 550 is open on one of the four sides of the substantially rectangular shape in plan view. The notch 550 is provided on the side opposite the side surface 30d, approximately in the center in the X direction. In other words, the front surface metal body 52 has a notch 540 on one of its ends in the Y direction and a notch 550 on the other end.

[0057] The relay wiring 55 has a base 551 and a pair of extensions 552. The base 551 and the pair of extensions 552 define a notch 550. The relay wiring 55 has a generally U-shape (concave shape) in plan view. The base 551 is a portion closer to the P wiring 54 than the notch 550 and the extensions 552, and has a generally rectangular shape in plan view. The base 551 overlaps the semiconductor element 40L in plan view. That is, the semiconductor element 40L is disposed on the base 551. The drain electrode 40D of the semiconductor element 40L is connected to the base 551.

[0058] The two extension portions 552 extend from the base 551 in the same direction, specifically the Y direction, toward the side surface 30d of the sealing body 30. One of the extension portions 552 is connected to the vicinity of one end of the base 551 in the X direction, and the other is connected to the vicinity of the other end of the base 551. The two ends of the U-shape of the relay wiring 55, i.e., the ends of the two extension portions 552 opposite the base 551, are at approximately the same position in the Y direction. The pair of extension portions 552 sandwich the notch 550 in the X direction. The length of the base 551 in the Y direction is longer than the depth of the notch 550 and the extension portions 552.

[0059] 10 and 13, the surface metal body 62 has an N wiring 64 and a relay wiring 65. The N wiring 64 and the relay wiring 65 are electrically separated by a predetermined gap. The gap is filled with the sealing body 30.

[0060] The N wiring 64 is connected to an N terminal 91N (described later) and the source electrode 40S of the semiconductor element 40L. The N wiring 64 electrically connects the N terminal 91N and the source electrode 40S of the semiconductor element 40L. The N wiring 64 is sometimes referred to as an N wiring. The relay wiring 65 is connected to the source electrode 40S of the semiconductor element 40H and the arm connecting portion 80. The relay wiring 65 electrically connects the source electrode 40S of the semiconductor element 40H and the arm connecting portion 80. In the front surface metal body 62 (second front surface metal body), the N wiring 64 is a second power supply wiring, and the relay wiring 65 is a second relay wiring.

[0061] The N wiring 64 has a base 640 and a pair of extension portions 641. The N wiring 64 has a generally U-shape in plan view. The base 640 is arranged alongside the relay wiring 65 in the Y direction. The base 640 is arranged on the side surface 30d in the Y direction. The base 640 has a generally rectangular shape in plan view with the X direction as its longitudinal direction. As shown in FIG. 15 , the base 640 overlaps the semiconductor element 40L in plan view. That is, the semiconductor element 40L is arranged on the base 640. The source electrode 40S of the semiconductor element 40L is connected to the base 640.

[0062] The two extension portions 641 extend from the base 640 in the same direction, specifically the Y direction, toward the side surface 30c of the sealing body 30. One of the extension portions 641 is connected to the vicinity of one end of the base 640 in the X direction, and the other is connected to the vicinity of the other end of the base 640. The ends of the U-shape of the N wiring 64, that is, the ends of the two extension portions 641 opposite the base 640, are at approximately the same position in the Y direction.

[0063] The pair of extension portions 641 form both ends of the surface metal body 62 in the X direction. The pair of extension portions 641 are arranged near the end of the substrate 60. In a plan view, a portion of each of the pair of extension portions 641 overlaps the P wiring 54. The length of the extension portion 641 in the Y direction is longer than that of the base portion 640. The N wiring 64 also has a notch 642. The notch 642 opens on one of the four sides of a substantially rectangular shape in plan view whose longitudinal direction is the Y direction. The notch 642 is provided on the side opposite the side surface 30c, approximately in the center in the X direction. The base portion 640 and the pair of extension portions 641 define the notch 642.

[0064] As described above, the relay wiring 65 is arranged alongside the N wiring 64, specifically the base 640, in the Y direction. In the Y direction, the relay wiring 65 is arranged close to the side surface 30c of the sealing body 30, and the base 640 is arranged close to the side surface 30d. The relay wiring 65 is arranged between the pair of extension portions 641 in the X direction. The relay wiring 65 is sandwiched between the pair of extension portions 641. The relay wiring 65 is arranged within the cutout 642. The relay wiring 65 is arranged with a predetermined interval (gap) between it and the N wiring 64. In a plan view, a portion of the relay wiring 65 overlaps with the P wiring 54, and another portion overlaps with the relay wiring 55.

[0065] 15 , the relay wiring 65 overlaps the semiconductor element 40H in a plan view. That is, the semiconductor element 40H is disposed on the relay wiring 65. The source electrode 40S of the semiconductor element 40H is connected to the relay wiring 65. A more detailed example of the circuit pattern of the front surface metal body 62 will be described later.

[0066] The back surface metal bodies 53, 63 are electrically isolated from the circuit including the semiconductor element 40 by the insulating substrates 51, 61. The back surface metal bodies 53, 63 are sometimes referred to as metal base substrates. Heat generated by the semiconductor element 40 is transferred to the back surface metal bodies 53, 63 via the front surface metal bodies 52, 62 and the insulating substrates 51, 61. The back surface metal bodies 53, 63 provide a heat dissipation function. In this embodiment, the back surface metal bodies 53, 63 have a generally rectangular planar shape, and their outer contours substantially match those of the front surface metal bodies 52, 62. The back surface metal bodies 53, 63 are so-called solid conductors disposed over almost the entire back surface of the insulating substrates 51, 61. As described above, the linear expansion coefficient of the insulating substrates 51, 61 is adjusted by adding a filler, thereby suppressing warping even when the patterns on the front and back surfaces are different. Of course, the rear surface metal bodies 53, 63 may be patterned so as to coincide with the front surface metal bodies 52, 62 in a plan view.

[0067] The back surface metal bodies 53, 63 in this embodiment are disposed over almost the entire area of ​​the back surface of the corresponding insulating base material 51, 61. To further enhance the heat dissipation effect, at least one of the back surface metal bodies 53, 63 may be exposed from the sealing body 30. In this embodiment, the back surface metal body 53 is exposed from one surface 30a of the sealing body 30, and the back surface metal body 63 is exposed from the back surface 30b. The exposed surface of the back surface metal body 53 is approximately flush with the one surface 30a. The exposed surface of the back surface metal body 63 is approximately flush with the back surface 30b. The back surface metal bodies 53, 63 form the back surfaces 50b, 60b of the substrates 50, 60.

[0068] The conductive spacer 70 functions as a spacer to ensure a predetermined distance between the semiconductor element 40 and the substrate 60. For example, the conductive spacer 70 ensures a height sufficient for electrically connecting the corresponding signal terminal 93 to the pad 40P of the semiconductor element 40. The conductive spacer 70 is located midway along the electrical and thermal conduction path between the source electrode 40S of the semiconductor element 40 and the substrate 60, providing wiring and heat dissipation functions. The conductive spacer 70 contains a metal material with good electrical and thermal conductivity, such as Cu. The conductive spacer 70 may have a plated film on its surface. The conductive spacer 70 is a generally rectangular columnar body having approximately the same size as the source electrode 40S in a plan view.

[0069] The conductive spacers 70 may also be referred to as terminals, terminal blocks, or metal blocks. The semiconductor device 20 includes the same number of conductive spacers 70 as the number of semiconductor elements 40. Specifically, the semiconductor device 20 includes four conductive spacers 70. The conductive spacers 70 are individually connected to the semiconductor elements 40.

[0070] The arm connection portion 80 electrically connects the relay wirings 55, 65. In other words, the arm connection portion 80 electrically connects the upper arm 9H and the lower arm 9L. The arm connection portion 80 is provided between the semiconductor elements 40H and 40L in the Y direction. The arm connection portion 80 is provided in the overlapping region of the relay wirings 55 and 65 in a plan view. The arm connection portion 80 of this embodiment is configured with a joint portion 81 and a bonding material 103, which will be described later.

[0071] The joint portion 81 is a metal columnar body provided separately from the surface metal bodies 52, 62. Such a joint portion 81 is sometimes referred to as a joint terminal. In the Z direction, a bonding material 103 is interposed between one end of the joint portion 81 and the relay wiring 55, and a bonding material 103 is interposed between the other end and the relay wiring 65.

[0072] Alternatively, the joint portion 81 may be integrally connected to at least one of the surface metal bodies 52, 62. In other words, the joint portion 81 may be provided integrally with the surface metal bodies 52, 62 as part of the substrates 50, 60. The arm connection portion 80 may not include the joint portion 81. In other words, the arm connection portion 80 may include only the bonding material 103.

[0073] The external connection terminals 90 are terminals for electrically connecting the semiconductor device 20 to external devices. The external connection terminals 90 are formed using a metal material with good conductivity, such as copper. The external connection terminals 90 are, for example, plate material. The external connection terminals 90 are sometimes referred to as leads. The external connection terminals 90 include a power supply terminal 91, an output terminal 92, and a signal terminal 93. The power supply terminal 91 includes a P terminal 91P and an N terminal 91N. The P terminal 91P, the N terminal 91N, and the output terminal 92 are main terminals electrically connected to main electrodes of the semiconductor element 40. The signal terminals 93 include a signal terminal 93H on the upper arm 9H side and a signal terminal 93L on the lower arm 9L side.

[0074] The power supply terminal 91 is an external connection terminal 90 electrically connected to the above-described power supply lines 7 and 8. The P terminal 91P is electrically connected to the positive terminal of the smoothing capacitor 5. The P terminal 91P may be referred to as a positive terminal or a high-potential power supply terminal. The P terminal 91P is connected to the P wiring 54 of the surface metal body 52. ​​In other words, the P terminal 91P is connected to the drain electrode 40D of the semiconductor element 40H that constitutes the upper arm 9H.

[0075] The P terminal 91P is connected to the P wiring 54 near one end in the Y direction. The P terminal 91P extends in the Y direction from the connection (joint) with the P wiring 54 and protrudes from the sealing body 30 near the center in the Z direction on the side surface 30c. The semiconductor device 20 of this embodiment includes two P terminals 91P. As shown in FIG. 11 , one of the P terminals 91P is connected to one of the pair of extension portions 542, and the other is connected to the other of the pair of extension portions 542. The P terminal 91P is located near the notch 540, i.e., closer to the inside, in each extension portion 542 so as to be adjacent to the N terminal 91N in a plan view. The two P terminals 91P are arranged side by side in the X direction. The two P terminals 91P are located at approximately the same position in the Z direction.

[0076] The N terminal 91N is electrically connected to the negative terminal of the smoothing capacitor 5. The N terminal 91N may also be referred to as the negative terminal or low-potential power supply terminal. The N terminal 91N is connected to the N wiring 64 of the front surface metal body 62. In other words, the N terminal 91N is connected to the source electrode 40S of the semiconductor element 40L that constitutes the lower arm 9L.

[0077] The N terminal 91N is connected to the N wiring 64 near one end in the Y direction. The N terminal 91N extends in the Y direction from the joint with the N wiring 64 and protrudes from the sealing body 30 near the center in the Z direction on the side surface 30c. The semiconductor device 20 is equipped with two N terminals 91N. As shown in FIG. 15 and other figures, one of the N terminals 91N is connected to one of the pair of extension portions 641, and the other is connected to the other of the pair of extension portions 641. The two N terminals 91N are arranged side by side in the Y direction. The two N terminals 91N are arranged at approximately the same position in the Z direction.

[0078] The two N terminals 91N are arranged outside the two P terminals 91P in the X direction. In a plan view, one of the N terminals 91N is arranged near one of the P terminals 91P, and the other N terminal 91N is arranged near the other P terminal 91P. The N terminal 91N and P terminal 91P adjacent to each other in the X direction have their side surfaces facing each other in a portion including a portion protruding from the sealing body 30.

[0079] The output terminal 92 is electrically connected to the winding 3a (stator coil) of the corresponding phase of the motor generator 3. The output terminal 92 may also be referred to as an O terminal, an AC terminal, etc. As shown in Figures 3 and 7, the output terminal 92 is connected to the relay wiring 55 of the surface metal body 52 on the substrate 50. In other words, the output terminal 92 is connected to the connection point between the upper arm 9H and the lower arm 9L.

[0080] The output terminal 92 is connected to the relay wiring 55 near one end in the Y direction. The output terminal 92 extends in the Y direction from the joint with the relay wiring 55 and protrudes outside the sealing body 30 from near the center in the Z direction on the side surface 30d. The semiconductor device 20 has two output terminals 92. One of the output terminals 92 is connected to one of the pair of extension portions 552, and the other is connected to the other of the pair of extension portions 552. The two output terminals 92 are arranged side by side in the X direction. The two output terminals 92 are arranged at approximately the same position in the Z direction.

[0081] The signal terminal 93 is electrically connected to a drive circuit (driver) (not shown). The signal terminal 93H is electrically connected to the pad 40P of the semiconductor element 40H via a connecting member such as a bonding wire 110. The number of signal terminals 93H is not particularly limited. The signal terminals 93H may include at least a terminal for applying a drive voltage to the gate electrode of the semiconductor element 40H. The semiconductor device 20 of this embodiment includes two signal terminals 93H. One of the signal terminals 93H is a terminal for a gate electrode. The gate electrode pads 40P of the two semiconductor elements 40H are electrically connected to the signal terminal 93H for the gate electrode. The signal terminal 93H is disposed in a position overlapping the notch 540 of the P wiring 54 in a plan view. The bonded portion of the signal terminal 93H with the bonding wire 110 faces the insulating substrate 51, not the surface metal body 52. ​​The two signal terminals 93H are disposed side by side in the X direction.

[0082] The signal terminal 93H extends in the Y direction from the joint with the bonding wire 110 and protrudes from near the center of the side surface 30c in the Z direction to the outside of the sealing body 30. At least a portion of the protruding portion of the signal terminal 93H extends in the same direction as the power supply terminal 91. The signal terminal 93H is disposed between the two P terminals 91P in the X direction. In other words, the external connection terminals 90 protruding from the side surface 30c are disposed in the following order in the X direction: the N terminal 91N, the P terminal 91P, the two signal terminals 93H, the P terminal 91P, and the N terminal 91N.

[0083] The signal terminals 93L are electrically connected to pads 40P of the semiconductor element 40L via connecting members such as bonding wires 110. The number of signal terminals 93L is not particularly limited. The signal terminals 93L may include at least a terminal for applying a drive voltage to the gate electrode of the semiconductor element 40L. The semiconductor device 20 of this embodiment includes four signal terminals 93L. One of the signal terminals 93L is a terminal for a gate electrode. The gate electrode pads 40P of two semiconductor elements 40L are electrically connected to the gate electrode signal terminal 93L. The signal terminal 93L is disposed in a position overlapping the notch 550 of the relay wiring 55 in a plan view. The bonded portion of the signal terminal 93L with the bonding wire 110 faces the insulating substrate 51, not the surface metal body 52. ​​The four signal terminals 93L are disposed horizontally in the X direction.

[0084] The signal terminal 93L extends in the Y direction from the joint with the bonding wire 110 and protrudes from near the center of the side surface 30d in the Z direction to the outside of the sealing body 30. At least a part of the protruding portion of the signal terminal 93L extends in the same direction as the output terminal 92. The signal terminal 93L is disposed between the two output terminals 92 in the X direction. In other words, the external connection terminals 90 protruding from the side surface 30d are disposed in the following order in the X direction: the output terminal 92, the four signal terminals 93L, and the output terminal 92.

[0085] The drain electrode 40D of the semiconductor element 40 is joined to the surface metal body 52 via a bonding material 100. The source electrode 40S of the semiconductor element 40 is joined to the conductive spacer 70 via a bonding material 101. The conductive spacer 70 is joined to the surface metal body 62 via a bonding material 102. The joint portion 81 is joined to the metal bodies 52, 62 via a bonding material 103. Of the external connection terminals 90, the P terminal 91P, the N terminal 91N, and the output terminal 92, which are main terminals, are joined to the corresponding surface metal bodies 52, 62 via a bonding material 104.

[0086] The bonding materials 100-104 are electrically conductive. For example, solder can be used as the bonding materials 100-104. One example of solder is a multi-element lead-free solder containing Cu, Ni, and the like in addition to Sn. Instead of solder, a sintered bonding material such as sintered silver may be used. The P terminal 91P, the N terminal 91N, and the output terminal 92 may be directly bonded to the corresponding surface metal bodies 52, 62 without using the bonding material 104. The P terminal 91P, the N terminal 91N, and the output terminal 92 may be directly bonded to the surface metal bodies 52, 62 by, for example, ultrasonic welding, friction stir welding, laser welding, or the like. When the joint portion 81 is provided separately from the substrates 50, 60, the joint portion 81 may be directly bonded to the surface metal bodies 52, 62.

[0087] As described above, in the semiconductor device 20, the plurality of semiconductor elements 40 that constitute one phase of the upper and lower arm circuits 9 are sealed by the sealing body 30. The sealing body 30 integrally seals the plurality of semiconductor elements 40, a portion of the substrate 50, a portion of the substrate 60, the plurality of conductive spacers 70, the arm connection portion 80, and a portion of the external connection terminals 90. The sealing body 30 seals the insulating base materials 51, 61 and the surface metal bodies 52, 62 of the substrates 50, 60.

[0088] The semiconductor element 40 is disposed between the substrates 50 and 60 in the Z direction. The semiconductor element 40 is sandwiched between the substrates 50 and 60, which are disposed opposite each other. This allows heat from the semiconductor element 40 to be dissipated to both sides in the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The back surface 50b of the substrate 50 is substantially flush with one surface 30a of the sealing body 30. The back surface 60b of the substrate 60 is substantially flush with the back surface 30b of the sealing body 30. Because the back surfaces 50b and 60b are exposed, heat dissipation can be improved.

[0089] <Manufacturing Method> Next, an example of a manufacturing method for the semiconductor device 20 will be described with reference to Fig. 10. In Fig. 10, the substrate 50 and the substrate 60 are shown facing each other to make the subsequent assembly easier to understand.

[0090] First, the semiconductor element 40, the substrates 50 and 60, the conductive spacer 70, the joint portion 81, and the lead frame 94 are prepared. As shown in FIG. 10 , the lead frame 94 includes external connection terminals 90. The lead frame 94 is formed by subjecting a metal plate to processing such as pressing. The external connection terminals 90 are supported by an outer peripheral frame 94b via tie bars 94a.

[0091] Next, the semiconductor element 40, the joints 81, and the external connection terminals 90 are joined (connected) to the substrate 50. Also, the conductive spacer 70 is joined to the semiconductor element 40.

[0092] At this time, the lead frame 94 and the semiconductor element 40 are placed on the substrate 50. Furthermore, a conductive spacer 70 is placed on the source electrode 40S of the semiconductor element 40. The lead frame 94 is placed so that a portion of each of the external connection terminals 90 overlaps the substrate 50 in a plan view. Specifically, the P terminal 91P and the N terminal 91N are placed so that they overlap the P wiring 54 of the front surface metal body 52, and the output terminal 92 overlaps the relay wiring 55. Furthermore, the signal terminal 93H is placed so that it overlaps the insulating base material 51 exposed from the cutout 540, and the signal terminal 93L is placed so that it overlaps the insulating base material 51 exposed from the cutout 550.

[0093] Then, the drain electrode 40D of the semiconductor element 40 is bonded to the surface metal body 52 using a bonding material 100. The source electrode 40S is bonded to the conductive spacer 70 using a bonding material 101. The joint portion 81 is bonded to the surface metal body 52 using a bonding material 103. The P terminal 91P and the output terminal 92 are bonded to the surface metal body 52 using a bonding material 104. For example, in the case of solder, the bonding can be performed all at once by reflow. Figure 10 shows this bonded state.

[0094] Next, the pads 40P of the semiconductor element 40H and the signal terminals 93H are electrically connected by bonding wires 110. Similarly, the pads 40P of the semiconductor element 40L and the signal terminals 93L are electrically connected by bonding wires 110.

[0095] Next, the substrate 60 is bonded (connected). The source electrode 40S of the semiconductor element 40 is bonded to the surface metal body 62 via a bonding material 102. The joint portion 81 is bonded to the surface metal body 62 via a bonding material 103. The N terminal 91N is bonded to the surface metal body 62 via a bonding material 104. For example, in the case of solder, the bonding can be performed all at once by reflow.

[0096] Next, the sealing body 30 is molded by a transfer molding method. Although not shown in the drawings, in this embodiment, the sealing body 30 is molded so as to completely cover the substrates 50 and 60, and then cut after molding. The sealing body 30 is cut along with a portion of the back surface metal bodies 53 and 63 of the substrates 50 and 60. This exposes the back surfaces 50b and 60b. The back surface 50b is approximately flush with the surface 30a of the sealing body 30, and the back surface 60b is approximately flush with the back surface 30b. Note that the sealing body 30 may be molded with the back surfaces 50b and 60b pressed against the cavity wall surface of a molding die and in close contact. In this case, the back surfaces 50b and 60b are exposed from the sealing body 30 when the sealing body 30 is molded. This eliminates the need for cutting after molding.

[0097] Next, unnecessary portions such as the tie bars 94a and the peripheral frame 94b are removed from the lead frame 94. In this manner, the semiconductor device 20 can be obtained.

[0098] <Positional Relationship> Next, the positional relationship between the semiconductor element 40, the circuit patterns of the surface metal bodies 52 and 62, the arm connection portion 80, and the external connection terminals 90 connected to the circuit patterns will be described with reference to FIGS. 14 and 15 . FIG. 14 is a diagram showing the arrangement of the circuit pattern of the surface metal body 52, the semiconductor element 40, and the terminals. FIG. 15 is a diagram showing the arrangement of the circuit pattern of the surface metal body 62, the semiconductor element 40, and the terminals. For convenience, FIGS. 14 and 15 only show the external connection terminals 90 connected to the circuit patterns. In FIG. 14 , the placement area of ​​the semiconductor element 40 is indicated by D to clearly show the main electrode (drain electrode 40D) connected to the surface metal body 52. ​​Similarly, in FIG. 15 , the placement area of ​​the semiconductor element 40 is indicated by S to clearly show the main electrode (source electrode 40S) connected to the surface metal body 62.

[0099] 14 is a virtual line that passes through the midpoints of the two semiconductor elements 40 that make up one arm. The virtual line CL1 passes through the midpoint (center) of the two semiconductor elements 40 in the arrangement direction and extends in the Y direction. The virtual line CL1 is, for example, a line that passes through the midpoint of two semiconductor elements 40H. Instead of semiconductor element 40H, the virtual line CL1 may be a line that passes through the midpoint of semiconductor element 40L.

[0100] 14, the arrangement of the two semiconductor elements 40H is approximately line-symmetrical with respect to the imaginary line CL1. Similarly, the arrangement of the two semiconductor elements 40L is also approximately line-symmetrical with respect to the imaginary line CL1. Here, approximately line-symmetrical allows for an error of the order of manufacturing variations. The circuit pattern of the front surface metal body 52 is also approximately line-symmetrical with respect to the imaginary line CL1. In other words, the P wiring 54 and the relay wiring 55 are each approximately line-symmetrical with respect to the imaginary line CL1.

[0101] The arrangement of the arm connection portion 80 connected to the relay wiring 55 is also approximately line-symmetrical with respect to the imaginary line CL1. The arrangement of the external connection terminal 90 connected to the surface metal body 52 is also approximately line-symmetrical with respect to the imaginary line CL1. That is, the arrangement of the two P terminals 91P is also approximately line-symmetrical with respect to the imaginary line CL1. The arrangement of the two output terminals 92 is also approximately line-symmetrical with respect to the imaginary line CL1.

[0102] As in Fig. 14 , a virtual line CL1 is shown in Fig. 15 as well. The arrangement of the semiconductor elements 40H, 40L is the same as in Fig. 14 . As shown in Fig. 15 , the circuit pattern of the front surface metal body 62 is also approximately line-symmetrical with respect to the virtual line CL1. That is, the N wiring 64 and the relay wiring 65 are each approximately line-symmetrical with respect to the virtual line CL1. As in Fig. 14 , the arrangement of the arm connection portion 80 connected to the relay wiring 65 is also approximately line-symmetrical with respect to the virtual line CL1. The arrangement of the two N terminals 91N, which are external connection terminals 90 connected to the front surface metal body 62, is also approximately line-symmetrical with respect to the virtual line CL1.

[0103] <Circuit Pattern> Next, the circuit pattern of the surface metal body 62 will be described in more detail with reference to Fig. 15. The dashed dotted lines shown in Fig. 15 indicate the boundaries of the respective regions.

[0104] As described above, the front surface metal body 62 of the substrate 60 has the N wiring 64 and the relay wiring 65. The N wiring 64 has a base 640 and a pair of extension portions 641. The pair of extension portions 641 extend from the base 640 in the Y direction toward the side surface 30c of the sealing body 30. The N wiring 64 defines the outer contour of the front surface metal body 62. The relay wiring 65 is sandwiched between the pair of extension portions 641. The relay wiring 65 is arranged in the notch 642 of the N wiring 64.

[0105] 15 , the relay wiring 65 has an end 650 as one end in the Y direction. The end 650 is an end on the base portion 640 side in the Y direction. On the other hand, the base portion 640 of the N wiring 64 has a side 640a facing the end 650. The facing side 640a is a portion of the base portion 640 between a pair of extension portions 641.

[0106] The relay wiring 65 of this embodiment has a reduced-width portion 651a. The reduced-width portion 651a includes the end portion 650. The reduced-width portion 651a is a portion within a predetermined range in the Y direction from the end portion 650. The length in the X direction of the reduced-width portion 651a, i.e., the width, is smallest at the end portion 650.

[0107] The width of the reduced width portion 651a may be reduced in stages, for example, by a predetermined length in the Y direction. That is, the end of the reduced width portion 651a in the X direction may change in a stepped manner. In this embodiment, the length of the reduced width portion 651a in the X direction becomes shorter the closer it is to the base 640. That is, the width of the reduced width portion 651a continuously reduces toward the base 640. The arm connection portion 80 is disposed in the reduced width portion 651a.

[0108] The relay wiring 65 may have only the reduced width portion 651a including the end portion 650. In this case, the semiconductor element 40H is also disposed in the reduced width portion 651a. The relay wiring 65 of this embodiment has a constant width portion 651b. The constant width portion 651b is continuous with the reduced width portion 651a and has a constant width over a predetermined range in the Y direction. The semiconductor element 40H is disposed in the constant width portion 651b.

[0109] The relay wiring 65 of this embodiment further includes a reduced width portion 651c. The reduced width portion 651c includes an end portion 652 opposite the end portion 650. The reduced width portion 651c is opposite the reduced width portion 651a and continues to the constant width portion 651b. The width of the reduced width portion 651c is smallest at the end portion 652. In this embodiment, the width of the reduced width portion 651c continuously decreases toward the end portion 652. In the relay wiring 65, the reduced width portions 651a and 651c become narrower the further away they are from the constant width portion 651b.

[0110] In this embodiment, the distance between the N wiring 64 and the relay wiring 65 is approximately constant over the entire area of ​​the end portion 650. The extension portions 641 of the N wiring 64 are patterned so that the distance between them and the relay wiring 65 is approximately constant. Each of the extension portions 641 has a widened portion 641 a, a constant width portion 641 b, and a widened portion 641 c.

[0111] The widened portion 641a is connected to the base 640 and is a portion that extends over a predetermined range in the Y direction from the boundary with the base 640. The length in the X direction of the widened portion 641a, i.e., the width, is greatest at the boundary with the base 640. In this embodiment, the width of the widened portion 641a continuously increases toward the base 640. The constant width portion 641b is connected to the widened portion 641a and is a portion that has a constant width over a predetermined range in the Y direction. The constant width portion 641b faces the constant width portion 651b of the relay wiring 65.

[0112] The widened portion 641c is opposite to the widened portion 641a and continues to the constant width portion 641b. The widened portion 641a extends to a position closer to the side surface 30c than the narrowed portion 651c. The widened portion 641c includes the tip 641d of the extension portion 641. The width of the widened portion 641c is greatest at the tip 641d. In the widened portion 641c, the width at an arbitrary first position is equal to or greater than the width at a second position that is farther from the tip 641d than the first position. In this embodiment, the width of the widened portion 641c continuously increases toward the tip 641d in the portion facing the narrowed portion 651c. In the widened portion 641c, the portion closer to the tip 641d than the facing portion has a constant width. In the N wiring 64, the width of the widened portion 641a and a part of the widened portion 641c increases with increasing distance from the fixed width portion 641b.

[0113] <Current Path> Next, the current path will be described with reference to Fig. 16. Fig. 16 is a diagram showing a PN current loop in the semiconductor device 20 of this embodiment. The PN current loop refers to the loop shape of the current path from the P terminal 91P to the N terminal 91N.

[0114] When examining inductance, the PN current loop of P terminal 91P → P wiring 54 → semiconductor element 40H → relay wiring 65 → arm connection portion 80 → relay wiring 55 → semiconductor element 40L → N wiring 64 → N terminal 91N is taken into consideration. For this reason, to make the PN current loop easier to understand, a continuous solid line is shown from the P terminal 91P to the N terminal 91N. In reality, the semiconductor elements 40H and 40L are controlled so that they are not turned on at the same time. For convenience, only the current path for one of the semiconductor elements 40H and one of the semiconductor elements 40L is shown, but the same applies to the other one of the semiconductor elements 40H and the other one of the semiconductor elements 40L.

[0115] In the semiconductor device 20 of this embodiment, as described above, the N wiring 64 and the relay wiring 65 are patterned and satisfy a predetermined positional relationship with the semiconductor element 40L. Due to this positional relationship, as shown in FIG. 16 , the N wiring 64 (extension portion 641) is also present above one side 400 of the semiconductor element 40L in a planar view. The side 400 is the side opposite the relay wiring 65. Therefore, current enters from the side 400 of the semiconductor element 40L and exits from the same side 400. Of the current flowing from the semiconductor element 40L toward the N terminal 91N, the Y-direction component increases particularly near the semiconductor element 40L.

[0116] In this way, the current flowing through the N wiring 64 approaches the relay wiring 65, and the current path through the N wiring 64, i.e., the current path between the semiconductor element 40L and the N terminal 91N, is shortened. Therefore, the PN current loop is small. The PN current loop is also small in the Z direction. The P wiring 54 and the N wiring 64 face each other in the Z direction. Furthermore, the relay wiring 55 and the N wiring 64 face each other in the Z direction. Because the PN current loop is small in this way, the inductance of the main circuit wiring can be reduced.

[0117] 9 and 17 , on the D-side substrate 50, the portion of the front surface metal body 52 that is not in contact with the insulating base material 51 is divided into a contact portion 527 and a non-contact portion 528. The contact portion 527 is an area that is in contact with the sealing body 30 and is sealed in close contact with the sealing body 30. The non-contact portion 528 is an area that is not in contact with the sealing body 30. The area surrounded by dotted lines in FIG. 17 indicates the non-contact portion 528. Specifically, the bonding portion of the front surface metal body 52 with the semiconductor element 40, the bonding portion with the P terminal 91P, the bonding portion with the output terminal 92, and the bonding portion with the arm connecting portion 80 correspond to the non-contact portion 528.

[0118] The contact portion 527 of the substrate 50 on the D side is formed with a high contact portion that has a higher degree of contact with the plug 30, and a low contact portion 527p that has a lower degree of contact with the plug 30 than the high contact portion. The surface roughness of the high contact portion is rougher than the surface roughness of the low contact portion 527p. Therefore, the high contact portion has a larger contact area with the plug 30, and the contact strength with the plug 30 is stronger than that of the low contact portion 527p. This makes it less likely for the plug 30 to peel off in the high contact portion.

[0119] The high adhesion portion includes the element annular portion 527 a, the metal body annular portion 527 b, and the terminal annular portion 527 c. Note that the element annular portion 527 a, the metal body annular portion 527 b, and the terminal annular portion 527 c may have portions that are integral with one another.

[0120] The element annular portion 527a has an annular shape that extends along the outer shapes of the semiconductor elements 40H, 40L and surrounds the semiconductor elements 40H, 40L. In other words, the element annular portion 527a has a rectangular shape that extends along the outer shapes of the non-contact portions 528 at the joint portion with the semiconductor element 40. Note that in the region of the P wiring 54 where the two semiconductor elements 40H are lined up, portions of the two element annular portions 527a are integrated. Similarly, in the region of the relay wiring 55 where the two semiconductor elements 40L are lined up, portions of the two element annular portions 527a are integrated.

[0121] The metal body annular portion 527b has a shape that extends annularly along the outer shape of the front surface metal body 52. ​​In other words, the metal body annular portion 527b has a shape that extends annularly along the outer shapes of the P wiring 54 and the relay wiring 55. The metal body annular portion 527b that follows the outer shape of the P wiring 54 surrounds all of the low adhesion portions 527p on the P wiring 54. The metal body annular portion 527b that follows the outer shape of the relay wiring 55 surrounds all of the low adhesion portions 527p on the relay wiring 55.

[0122] The terminal annular portion 527c has a shape that extends annularly along the outer shape of the portion of the surface metal body 52 to which the power terminal 91 and the output terminal 92 are connected, and surrounds the terminal connection portion. In other words, the terminal annular portion 527c has a shape that surrounds the extension portion 542 and the extension portion 552. Note that a portion of the terminal annular portion 527c is integrally formed with a portion of the metal body annular portion 527b. A portion of the terminal annular portion 527c is integrally formed with a portion of the element annular portion 527a.

[0123] The low adhesion portion 527p is disposed inside the element annular portion 527a, the metal body annular portion 527b, and the terminal annular portion 527c so as to be surrounded by each of these annular portions. In the D-side substrate 50, the area of ​​the high adhesion portion is smaller than the area of ​​the low adhesion portion 527p. In other words, the total area of ​​the element annular portion 527a, the metal body annular portion 527b, and the terminal annular portion 527c is smaller than the area of ​​the low adhesion portion 527p. It can also be said that the area of ​​the high adhesion portion in the P wiring 54 is smaller than the area of ​​the low adhesion portion 527p. It can also be said that the area of ​​the high adhesion portion in the relay wiring 55 is smaller than the area of ​​the low adhesion portion 527p.

[0124] The high adhesion portion is disposed between portions of the surface metal body 52 that have different potentials (between different potentials). That is, the P wiring 54 and the relay wiring 55 correspond to portions that have different potentials. Of the metal body annular portion 527b that surrounds the P wiring 54, the portion that faces the relay wiring 55 corresponds to the high adhesion portion disposed between different potentials. Furthermore, of the metal body annular portion 527b that surrounds the relay wiring 55, the portion that faces the P wiring 54 also corresponds to the high adhesion portion disposed between different potentials.

[0125] 9 and 18 , the S-side substrate 60 is also divided into a contact portion 627 and a non-contact portion 628, similar to the D-side substrate 50. The contact portion 627 is an area that comes into contact with the sealing body 30 and is in close contact with it, and the non-contact portion 628 is an area that is not in contact with the sealing body 30. The area surrounded by dotted lines in FIG. 18 indicates the non-contact portion 628. Specifically, the joint portion of the front surface metal body 62 with the semiconductor element 40, the joint portion with the N terminal 91N, and the joint portion with the arm connecting portion 80 correspond to the non-contact portion 628.

[0126] The adhesion portion 627 of the S-side substrate 60 is formed with a high adhesion portion that has a higher degree of adhesion with the plug 30 and a low adhesion portion 627p that has a lower degree of adhesion with the plug 30 than the high adhesion portion. As with the D-side substrate 50, the surface roughness of the high adhesion portion is rougher than the surface roughness of the low adhesion portion 627p, and therefore the high adhesion portion has a higher adhesion force with the plug 30.

[0127] The high adhesion portion includes a metal body annular portion 627b. The metal body annular portion 627b has a shape that extends in a ring shape along the outer shape of the surface metal body 62. In other words, the metal body annular portion 627b has a shape that extends in a ring shape along the outer shapes of the N wiring 64 and the relay wiring 65. The metal body annular portion 627b that follows the outer shape of the N wiring 64 surrounds all of the low adhesion portions 627p on the N wiring 64. The metal body annular portion 627b that follows the outer shape of the relay wiring 65 surrounds all of the low adhesion portions 627p on the relay wiring 65.

[0128] The metal body annular portion 627b also functions as an element annular portion that surrounds the semiconductor elements 40H and 40L. The metal body annular portion 627b also functions as a terminal annular portion that surrounds the power terminal 91 of the front surface metal body 62. Although the metal body annular portion 627b has a linear extension shape, opposing linear portions of the annular portion may be adjacent to each other to form a single line. For example, when the distance between the opposing linear portions is short, such as in the portion surrounding the extension portion 641, the two lines may come into contact with each other to form a single line.

[0129] The high adhesion portion is disposed between portions of the front surface metal body 62 that have different potentials (between different potentials). That is, the N wiring 64 and the relay wiring 65 correspond to portions that have different potentials. Of the metal body annular portion 627b that surrounds the N wiring 64, the portion that faces the relay wiring 65 corresponds to the high adhesion portion disposed between different potentials. Furthermore, of the metal body annular portion 627b that surrounds the relay wiring 65, the portion that faces the N wiring 64 also corresponds to the high adhesion portion disposed between different potentials.

[0130] <Exposed opposing portion> As shown in Figures 18 and 19, a portion of the S-side substrate 60 (one of the substrates) where the surface metal body 62 is not provided and the insulating base material 61 is exposed is called the exposed portion 61a. As shown in Figures 17 and 19, a portion of the surface metal body 52 of the D-side substrate 50 (the other substrate) that faces the exposed portion 61a is called the exposed opposing portion 52a. The area surrounded by a dashed dotted line in Figure 19 indicates the exposed opposing portion 52a of the relay wiring 55. The exposed portion 61a corresponding to the exposed opposing portion 52a of the relay wiring 55 is a portion of the insulating base material 61 between the N wiring 64 and the relay wiring 65.

[0131] The exposed opposing portion of the P wiring 54 is not shown in the drawing. The S-side substrate 60 corresponds to one of the first and second substrates, and the D-side substrate 50 corresponds to the other of the first and second substrates. The D-side substrate 50 also has an exposed portion where the insulating base material 51 is exposed. The S-side surface metal body 62 also has an exposed opposing portion that faces the exposed portion on the D-side.

[0132] At least a portion of the low adhesion portion 527p of the substrate 50 on the D side is formed in the exposed facing portion 52a. For example, the portion surrounded by the dashed line in Fig. 17 is the portion of the low adhesion portion 527p that corresponds to the exposed facing portion 52a. The area of ​​the exposed facing portion 52a where the low adhesion portion 527p is formed is larger than the area of ​​the exposed facing portion 52a where the high adhesion portion is formed.

[0133] In the exposed opposing portion of the front surface metal body 52, a low adhesion portion 527p is basically formed rather than a high adhesion portion. However, as an exception, in the region between different potentials, there are portions where a high adhesion portion is formed even in the exposed opposing portion. For example, in a linear region extending in a ring shape along the outer shape of the P wiring 54 or the relay wiring 55, in the region between different potentials, and in the exposed opposing portion, a high adhesion portion is formed rather than a low adhesion portion 527p. In other words, even in a region that corresponds to an exposed opposing portion, it is prioritized to form a high adhesion portion in the region between different potentials.

[0134] Furthermore, exceptionally, there are portions where high adhesion portions are formed even in exposed opposing portions in the region extending in an annular shape along the outer shape of the front surface metal body 52. ​​For example, in the linear region extending in an annular shape along the outer shape of the P wiring 54 or the relay wiring 55 and in the exposed opposing portion, high adhesion portions are formed rather than low adhesion portions 527p. In other words, priority is given to forming the metal body annular portion 527b even in the region corresponding to the exposed opposing portion.

[0135] Furthermore, in the region extending annularly along the outer shape of the semiconductor elements 40H, 40L, there are exceptionally some exposed facing portions where the high adhesion portion is formed. In other words, even in the region corresponding to the exposed facing portion, priority is given to forming the terminal annular portion 527c.

[0136] <Roughening of High Adhesion Portion> The high adhesion portions on the D-side and S-side described above are formed by the same method. In the following description, the high adhesion portion on the D-side will be described, and the same description will be used for the high adhesion portion on the S-side.

[0137] As shown in Figure 20, the surface metal body 52 has a base material 521, and a metal film 522 and an uneven oxide film 520 provided on the surface of the base material 521. The base material 521 forms the main part of the surface metal body 52. ​​The base material 521 is formed using, for example, a Cu-based material. The metal film 522 is formed containing a material that has higher wettability to solder than the base material 521. Note that the part of the base material 521 where the metal film 522 is not formed corresponds to the exposed part described above. The uneven oxide film 520 is formed in the region of the high adhesion part described above, and provides the high adhesion part.

[0138] The uneven oxide film 520 is formed by irradiating a metal film 522 with laser light. The metal film 522 has a base film mainly composed of Ni (nickel) and an upper film mainly composed of Au (gold). In this embodiment, an electroless Ni plating film containing P (phosphorus) is used as the base film. The upper film (Au) of the metal film 522 in the portion where the uneven oxide film 520 is to be formed is removed by irradiation with laser light when the uneven oxide film 520 is formed. The uneven oxide film 520 is an oxide film mainly composed of Ni.

[0139] The recesses 523 on the surface of the metal film 522 are formed by irradiation with pulsed laser light. One recess 523 is formed for each pulse. The uneven oxide film 520 is formed when the surface portion of the metal film 522 is melted, vaporized, and deposited by irradiation with laser light. The uneven oxide film 520 is an oxide film derived from the metal film 522. The uneven oxide film 520 is a film of oxide of the metal (Ni), which is the main component of the metal film 522. The uneven oxide film 520 is formed to match the unevenness of the surface of the metal film 522, which has the recesses 523. The unevenness is formed on the surface of the uneven oxide film 520 at a pitch finer than the width of the recesses 523. In other words, very fine unevenness (roughened portions) is formed.

[0140] Such an uneven oxide film 520 can be formed by the following process: First, a pulsed laser beam is irradiated onto the surface metal body 52, which has a metal film 522 formed on a base material 521, to melt and evaporate the surface of the metal film 522.

[0141] At this time, the laser light source and the surface metal body 52 are moved relative to each other, thereby scanning the laser light and sequentially irradiating multiple positions. By irradiating the surface of the metal film 522 with the laser light and melting and vaporizing it, recesses 523 are formed on the surface of the metal film 522. The average thickness of the portions of the metal film 522 irradiated with the laser light is thinner than the average thickness of the portions not irradiated with the laser light. Furthermore, the multiple recesses 523 formed corresponding to the spots of the laser light are connected together, forming, for example, a scale-like shape. A spot is the area irradiated by one pulse. For example, the laser light is scanned so that adjacent spots of the laser light partially overlap in the X direction and adjacent spots of the laser light partially overlap in the Y direction.

[0142] Next, the melted metal film 522 is solidified. Specifically, the melted and vaporized metal film 522 is deposited on the portion irradiated with the laser light and its surrounding area. By depositing the melted and vaporized metal film 522 in this manner, an uneven oxide film 520 is formed on the surface of the metal film 522.

[0143] The surface of the uneven oxide film 520 formed as described above has extremely fine irregularities, which allow the seal 30 to become entangled, creating an anchor effect. Also, the contact area with the seal 30 increases. This increases the adhesive strength of the surface metal body 52 to the seal 30. A similar uneven oxide film is also formed on the surface metal body 62 on the S side, which also increases the adhesive strength.

[0144] Here, because the surface metal bodies 52, 62 and the sealing body 30 have different linear expansion coefficients with respect to temperature, there is a concern that the above-mentioned adhesion may be damaged and peel off. Because the electrical insulation properties of air are inferior to those of the sealing body 30, the electrical insulation properties of the surface metal bodies 52, 62 are reduced where peeling occurs as described above. As a result, there is a concern that an electrical leak path may be formed between different potentials, for example, between the P wiring 54 and the relay wiring 55, or between the N wiring 64 and the relay wiring 65. Furthermore, if the peeling location is an electrical connection such as solder, there is a concern that stress may concentrate at the electrical connection, causing distortion or damage to the electrical connection. Therefore, in this embodiment, peeling is suppressed by using a high-adhesion portion, thereby eliminating the above concern.

[0145] <Effects of High Adhesion Portions> If, contrary to the present embodiment, all of the low adhesion portions 527p, 627p were replaced with high adhesion portions, the area roughened by laser light would increase, resulting in increased processing costs. In consideration of this, in this embodiment, the low adhesion portions 527p, 627p are formed in addition to the high adhesion portions at the adhesion portions of the surface metal bodies 52, 62 that are in contact with the sealing body 30. This significantly reduces processing costs compared to replacing all of the adhesion portions with high adhesion portions. Furthermore, because the high adhesion portions are located in the portions of the surface metal bodies 52, 62 between different potentials, peeling of the sealing body 30 between different potentials can be sufficiently suppressed. Therefore, concerns about the formation of a leak path between different potentials can be sufficiently suppressed. As described above, the semiconductor device 20 according to this embodiment can achieve both reduced manufacturing costs and improved reliability.

[0146] Furthermore, in this embodiment, the high adhesion portion includes a metal body annular portion 527b, 627b that extends annularly along the outer shape of the front surface metal body 52, 62. As a result, even if peeling occurs inside the area surrounded by the metal body annular portion 527b, 627b, the peeled area will be surrounded by the metal body annular portion 527b, 627b where peeling has not occurred. This further reduces the risk of a leak path being formed from the peeled area. Furthermore, this also reduces the risk of a leak path being formed between the front surface metal body 52 and the back surface metal body 53.

[0147] Furthermore, in this embodiment, the high adhesion portion includes an element annular portion 527a that extends annularly along the outer shape of the semiconductor elements 40H, 40L. This reduces the risk of stress concentration due to peeling occurring at the electrical connection (e.g., solder) between the semiconductor elements 40H, 40L and the surface metal body 52. ​​This reduces the risk of distortion or damage occurring at the electrical connection between the semiconductor elements 40H, 40L.

[0148] Furthermore, in this embodiment, the high adhesion portion includes a terminal annular portion 527c that extends annularly so as to surround the connection portion between the surface metal body 52 and the external connection terminal 90. This reduces the risk of stress concentration due to peeling occurring at the electrical connection portion (e.g., solder) between the external connection terminal 90 and the surface metal body 52. ​​This reduces the risk of distortion or damage occurring at the electrical connection portion of the external connection terminal 90.

[0149] Furthermore, in this embodiment, the high adhesion portion and the low adhesion portion are formed on both the D-side substrate 50 (first substrate) and the S-side substrate 60 (second substrate), which further reduces the risk of a leak path being formed between the D-side surface metal body 52 and the S-side surface metal body 62.

[0150] Furthermore, in this embodiment, at least a portion of the high adhesion portion has an annular shape, and at least a portion of the low adhesion portion 527p, 627p is surrounded by the high adhesion portion. As a result, even if peeling occurs in the low adhesion portion 527p, 627p surrounded by the high adhesion portion, the peeled portion will be surrounded by the high adhesion portion where peeling does not occur. This further reduces the risk of a leak path being formed from the peeled portion in the low adhesion portion 527p, 627p.

[0151] Furthermore, in this embodiment, the area of ​​the high adhesion portions is smaller than the area of ​​the low adhesion portions 527p, 627p on one substrate 50, 60. This helps reduce the processing costs required to form the high adhesion portions.

[0152] <Effects Related to Exposed Facing Portion> If, contrary to this embodiment, a high-adhesion portion were formed over the entire exposed facing portion 52a, the following concern would arise. That is, due to the difference in the linear expansion coefficients of the plug 30 and the surface metal body 52, the contact surface of the plug 30 with the surface metal body 52 would be pulled by the surface metal body 52 as the temperature changes. If this contact surface is a high-adhesion portion, the force pulling the plug 30 from the surface metal body 52 would be stronger. This tensile force acts in the X direction, as indicated by arrow A in FIG. 19 .

[0153] On the other hand, due to the generation of tensile force A, the surface of sealing body 30 that contacts exposed portion 61a is pulled in the Z direction as well as the X direction, as indicated by arrow B in FIG. 19 . That is, a tensile force in the Z direction acts on the surface of sealing body 30 that contacts exposed portion 61a, as indicated by arrow C. As a result, there is a concern that damage such as cracks may occur in insulating base material 61. If an attempt is made to increase the strength by increasing the thickness of insulating base material 61 as a countermeasure, the heat dissipation function of substrate 60 will be reduced.

[0154] In consideration of this point, in this embodiment, at least a portion of the low-adhesion portion 527p is formed in the exposed facing portion 52a. Therefore, compared to when the entire exposed facing portion 52a is formed in the high-adhesion portion, the tensile force A generated in the exposed facing portion 52a can be reduced, and the tensile force C acting on the exposed portion 61a can be reduced. This reduces the risk of cracking the insulating substrate 61 without increasing the thickness of the insulating substrate 61. In other words, cracking damage can be suppressed without reducing the heat dissipation function of the insulating substrate 61.

[0155] Furthermore, in this embodiment, the area of ​​the exposed facing portion 52 a where the low-adhesion portion 527 p is formed is larger than the area of ​​the exposed facing portion 52 a where the high-adhesion portion is formed, so that the tensile force A generated in the exposed facing portion 52 a can be sufficiently reduced, and the damage suppression effect on the insulating base material 61 can be sufficiently ensured.

[0156] Furthermore, in this embodiment, in the region between different potentials of the D-side substrate 50 (the other substrate), even the exposed facing portion 52a has a portion where a high-adhesion portion is formed. Therefore, the high-adhesion portion suppresses peeling of the sealing body 30 between different potentials, thereby suppressing the risk of a leak path being formed between different potentials, as described above. However, the entire exposed facing portion 52a is not formed as a high-adhesion portion, and at least a portion of it forms a low-adhesion portion 527p, which also suppresses damage to the insulating base material 61.

[0157] Furthermore, in this embodiment, in the region of the D-side substrate 50 that extends annularly along the outer shape of the surface metal body 52, there is a portion where a high-adhesion portion is formed even in the exposed facing portion 52a. Therefore, even if peeling occurs inside the area surrounded by the metal body annular portion 527b, the metal body annular portion 527b can reduce the risk of a leak path being formed from the peeled portion, as described above. At the same time, because the low-adhesion portion 527p is formed in at least a part of the exposed facing portion 52a, the effect of suppressing damage to the insulating base material 61 is also achieved.

[0158] Furthermore, in this embodiment, in the region of the D-side substrate 50 that extends annularly along the outer shapes of the semiconductor elements 40H, 40L, there are portions where high-adhesion portions are formed even in the exposed facing portion 52a. This provides the aforementioned effect of reducing the risk of stress concentration at the electrical connection between the semiconductor elements 40H, 40L and the front surface metal body 52. ​​At the same time, the formation of low-adhesion portions 527p in at least a portion of the exposed facing portion 52a also provides the effect of suppressing damage to the insulating base material 61.

[0159] Second Embodiment In the first embodiment, the element annular portion 527 a, the metal body annular portion 527 b, and the terminal annular portion 527 c have the same line width. In contrast, in the present embodiment, as shown in FIG. 21 , the line width of the element annular portion 527 a formed on the relay wiring 55 is made wider than the line widths of the metal body annular portion 527 b and the terminal annular portion 527 c.

[0160] However, in this embodiment, the line width of the element annular portion 527a is increased, resulting in an increase in the area of ​​the high-adhesion portion in the exposed facing portion 52a. Therefore, from the perspective of reducing the area of ​​the high-adhesion portion in the exposed facing portion 52a and improving the effect of suppressing damage to the insulating base material 61, it is desirable to form the element annular portion 527a so that the entire element annular portion 527a does not overlap with the exposed facing portion 52a, as in the first embodiment. Note that, contrary to this embodiment, the line width of the metal body annular portion 527b may be made wider than the line width of the element annular portion 527a.

[0161] Furthermore, in the first embodiment, the entire region of the relay wiring 55 between the element annular portion 527a and the metal body annular portion 527b is the low-adhesion portion 527p. In contrast, in the present embodiment, as shown in FIG. 21 , a non-annular portion 527d, which is a high-adhesion portion, is also formed in the region between the element annular portion 527a and the metal body annular portion 527b. In the example shown in FIG. 21 , the non-annular portion 527d is formed so that the entire non-annular portion 527d does not overlap the exposed facing portion 52a, but a portion of the non-annular portion 527d may overlap the exposed facing portion 52a. The non-annular portion 527d has a non-annular shape, and both ends of the non-annular portion 527d are connected to the metal body annular portion 527b.

[0162] Furthermore, in the first embodiment, the back surface metal body 53 and the front surface metal body 52 have the same size in a plan view. In contrast, in this embodiment, the back surface metal body 53 is larger than the front surface metal body 52, and the entire outer edge of the back surface metal body 53 extends beyond the front surface metal body 52 in a plan view. As described above, in this embodiment, the line width of the annular portion is set arbitrarily, and a non-annular portion 527d is provided. The other configurations are the same as in the first embodiment. Therefore, this embodiment also achieves the same effects as the first embodiment.

[0163] (Third Embodiment) In this embodiment, as shown in FIG. 22 , the element annular portion 527a is formed, but the metal body annular portion 527b, the terminal annular portion 527c, and the non-annular portion 527d are eliminated. It is also possible to form the metal body annular portion 527b while eliminating the element annular portion 527a, the terminal annular portion 527c, and the non-annular portion 527d. According to this embodiment, the area of ​​the high-adhesion portion on the surface metal body 52 can be reduced compared to the first and second embodiments. Therefore, the cost of roughening using a laser or the like can be further reduced.

[0164] Fourth Embodiment In the first embodiment, the low-adhesion portion 527p is not formed over the entire exposed facing portion 52a, but the metal body annular portion 527b is formed on a portion of the exposed facing portion 52a. In other words, priority is given to achieving the effect of the metal body annular portion 527b over improving the damage suppression effect of the insulating base material 61 by reducing the area of ​​the high-adhesion portion in the exposed facing portion 52a. In contrast, in the present embodiment, as shown in FIG. 23 , the low-adhesion portion 627p is formed over the entire exposed facing portion 62a of the S-side substrate 60. In other words, the low-adhesion portion 527p in the exposed facing portion 62a crosses the metal body annular portion 627b, making the metal body annular portion 627b non-annular.

[0165] As described above, in this embodiment, the low-adhesion portion 627p is formed over the entire exposed facing portion 62a of the S-side substrate 60. This reduces the area of ​​the high-adhesion portion in the exposed facing portion 62a, thereby improving the effect of suppressing damage to the exposed portion of the D-side insulating base material 51.

[0166] Fifth Embodiment In this embodiment, as in the first embodiment, the portions of the surface metal bodies 52, 62 that are not in contact with the insulating base material 51, 61 are divided into contact portions 527, 627 and non-contact portions 528, 628. The contact portions 527, 627 are also called "contact portions" of the surface metal bodies 52, 62 that are in contact with the sealing body 30. The contact portions 527, 627 (contact portions) are divided into high contact portions and low contact portions 527p, 627p.

[0167] Here, the D-side surface of the semiconductor element 40 is connected to the surface metal body 52 via the bonding material 100. In contrast, the S-side surface of the semiconductor element 40 is connected to the surface metal body 62 via bonding materials 101 and 102 and the conductive spacer 70. The entire D-side surface of the semiconductor element 40 is connected to the surface metal body 52. ​​In contrast, most of the S-side surface of the semiconductor element 40 is connected to the surface metal body 62, but a portion is exposed and not connected to the conductive spacer 70. The portion of the semiconductor element 40 exposed from the conductive spacer 70 and the bonding material 101 is called the element exposed portion 40a (see FIG. 24 ). The aforementioned pad 40P is provided on the element exposed portion 40a.

[0168] More specifically, a resin protective film is formed on the surface of the semiconductor element 40. An example of the material for the protective film is polyimide (PI). This protective film is also formed on the aforementioned element exposed portion 40a, and hereinafter, the surface of the element exposed portion 40a will be referred to as the PI surface.

[0169] Of the surface metal bodies 52, 62, the portion facing the semiconductor element 40 is called an element facing portion 62b. However, for the S-side surface metal body 62, a conductive spacer 70 is interposed between it and the semiconductor element 40. Therefore, the region where the surface metal body 62 overlaps with the conductive spacer 70 when viewed in the Z direction cannot be said to face the semiconductor element 40, and is not called an element facing portion. In other words, for the S-side surface metal body 62, the portion facing the element exposed portion 40a is called the element facing portion 62b. More specifically, the portion of the S-side surface metal body 62 that faces the PI surface of the semiconductor element 40, which is the portion obtained by projecting the PI surface onto the surface metal body 62 in the Z direction, corresponds to the element facing portion 62b.

[0170] Of the surface metal body 62, the portion between the dotted line L2 and the dashed-dotted line L3 in Figures 24 and 25 corresponds to the element-facing portion 62b. The portion surrounded by the dotted line L2 in Figure 25 corresponds to the non-contact portion 628 described above. The dashed-dotted line L3 in Figure 25 corresponds to the outline of the semiconductor element 40. The element-facing portion 62b has a shape that extends in an annular shape around the semiconductor element 40. The element-facing portion 62b is in contact with the sealing body 30 and is therefore also the contact portion 627.

[0171] On the other hand, with respect to the D-side surface metal body 52, there is no intervening object between it and the semiconductor element 40, and the entire portion of the surface metal body 52 surrounded by the dashed dotted line L3 corresponds to the element-facing portion. However, with respect to the D-side surface metal body 52, the entire D-side surface of the semiconductor element 40 is joined to the surface metal body 52. ​​Therefore, the element-facing portion on the D-side does not have an adhesion portion 527 (contact portion) that comes into close contact with the sealing body 30.

[0172] In the following regions according to the first embodiment, there are portions in which high adhesion portions are formed even in the element facing portion 62b: the region extending annularly along the outer shape of the surface metal body 62, the region extending annularly along the outer shape of the semiconductor element 40, and the region between different potentials. In contrast, in this embodiment, as shown in FIG. 25 , the entire element facing portion 62b is a low adhesion portion 627p, and the formation of high adhesion portions in the element facing portion 62b is prohibited even in the above regions.

[0173] <Effects on Element Facing Portion> If, contrary to this embodiment, a high-adhesion portion were formed over the entire element facing portion 62b, the following concern would arise. That is, due to the difference in the linear expansion coefficients of the sealing body 30 and the surface metal body 62, the contact surface of the sealing body 30 with the surface metal body 62 would be pulled by the surface metal body 62 as the temperature changes. If this contact surface is a high-adhesion portion, the force pulling the sealing body 30 from the surface metal body 62 would be stronger. This tensile force acts in the X direction, as indicated by arrow A1 in FIG. 24 .

[0174] Meanwhile, due to the generation of tensile force A1, the contact surface of sealing body 30 with element exposed portion 40a is pulled in the Z direction as well as the X direction, as shown by arrow B1 in Fig. 24. That is, a tensile force in the Z direction acts on the contact surface of sealing body 30 with element exposed portion 40a, as shown by arrow C1. As a result, stress generated at the interface between semiconductor element 40 and sealing body 30 increases, causing sealing body 30 to peel off from element exposed portion 40a, leading to a breakdown voltage defect of semiconductor element 40.

[0175] In consideration of this point, in this embodiment, a low-adhesion portion 627p is formed in at least a portion of the element facing portion 62b. Therefore, compared to when the entire element facing portion 62b is formed as a high-adhesion portion, the tensile force A1 generated in the element facing portion 62b can be reduced, and the tensile force C1 acting on the element exposed portion 40a can be reduced. This reduces the risk of the sealing body 30 peeling off from the element exposed portion 40a, and prevents damage to the semiconductor element 40. In particular, in this embodiment, the formation of a high-adhesion portion in the element facing portion 62b is prohibited, and the entire element facing portion 62b is formed as a low-adhesion portion 627p, so the effect of reducing the tensile force C1 is significant.

[0176] More specifically, the portion of the surface metal body 62 on the S side facing the PI surface of the semiconductor element 40 (element-facing portion 62b) is a low-adhesion portion 627p in which roughening by laser or the like is prohibited. Therefore, the adhesion strength at the interface between the element-facing portion 62b and the sealing body 30 is lower than that at the high-adhesion portion, thereby reducing the tensile force A1 and, ultimately, the tensile force B1. As a result, strain generated at the interface between the PI surface and the sealing body 30 can be reduced. This allows the PI surface and the sealing body 30 to adhere closely, preventing the occurrence of voltage resistance defects in the semiconductor element 40.

[0177] <Advantages of the First Embodiment Compared to the Present Embodiment> The advantages of the semiconductor device 20 according to the first embodiment compared to the present embodiment will be described below. In the present embodiment, the formation of a high-adhesion portion in the element facing portion 62b is prohibited. In contrast, in the first embodiment described above, a portion of the element facing portion 62b is a high-adhesion portion. However, the area of ​​the element facing portion 62b where the low-adhesion portion 627p is formed is larger than the area of ​​the element facing portion 62b where the high-adhesion portion is formed. Therefore, the tensile force A1 generated in the element facing portion 62b can be sufficiently reduced, and the effect of suppressing damage to the semiconductor element 40 can be sufficiently ensured.

[0178] Furthermore, in the first embodiment, as shown in FIG. 18 , the element facing portion 62b of the front metal body 62 generally has a low-adhesion portion 627p rather than a high-adhesion portion. However, as an exception, in the region between different potentials, there are portions in the element facing portion 62b where a high-adhesion portion is formed. For example, in a linear region extending in a circular shape along the outer shape of the N wiring 64 or the relay wiring 65, in the region between different potentials, and in the element facing portion, a high-adhesion portion is formed rather than a low-adhesion portion 627p. In other words, even in the region corresponding to the element facing portion 62b, forming a high-adhesion portion in the region between different potentials is prioritized. Therefore, the aforementioned effect of suppressing peeling of the sealing body 30 between different potentials by the high-adhesion portion and thereby reducing the risk of a leak path being formed between different potentials is achieved. However, since the entire element facing portion 62b is not formed as a high-adhesion portion, but at least a portion thereof has a low-adhesion portion 627p, damage to the semiconductor element 40 is also suppressed.

[0179] Furthermore, in the first embodiment, as shown in FIG. 18 , in the region extending annularly along the outer shape of the surface metal body 62, there are exceptionally some portions in the element facing portion 62b where high-adhesion portions are formed. For example, in the linear region extending annularly along the outer shape of the N wiring 64 or relay wiring 65 and in the element facing portion 62b, high-adhesion portions are formed rather than low-adhesion portions 627p. In other words, even in the region corresponding to the element facing portion 62b, priority is given to forming the metal body annular portion 627b with high-adhesion portions. Therefore, even if peeling occurs inside the area surrounded by the metal body annular portion 627b, the metal body annular portion 627b can reduce the risk of a leak path being formed from the peeled portion, as described above. At the same time, since the low-adhesion portions 627p are formed in at least a portion of the element facing portion 62b, damage to the semiconductor element 40 is also suppressed.

[0180] (Other Embodiments) In the above-described embodiments, laser roughening is used to form the high-adhesion portion by roughening treatment that increases the surface roughness of the surface metal body 52, 62. However, the high-adhesion portion may also be formed by roughening treatment such as roughening plating, sandblasting, or chemical treatment. Furthermore, instead of forming the high-adhesion portion by roughening treatment, the high-adhesion portion may also be formed using an adhesive or pressure-sensitive adhesive.

[0181] In each of the above embodiments, the high adhesion portion is disposed over the entire area between different potentials on the substrates 50 and 60. However, a configuration in which the high adhesion portion is disposed over only a portion of the area between different potentials is also possible. For example, in the example shown in FIG. 17 , the boundary (exposed portion) between the P wiring 54 and the relay wiring 55 has a shape that extends linearly in the X direction. The metal body annular portion 527b is disposed over the entire boundary. However, the metal body annular portion 527b may be changed to a non-annular shape, and may be disposed over only a portion of the boundary.

[0182] In the above-described embodiments, at least a portion of the high-contact portion extends in an annular shape, and at least a portion of the low-contact portion 527p, 627p is arranged to be surrounded by the high-contact portion. Alternatively, the annular portion of the high-contact portion may be eliminated.

[0183] In each of the above embodiments, the area of ​​the high adhesion portions on one substrate 50, 60 is smaller than the area of ​​the low adhesion portions 527p, 627p, and the majority of the high adhesion portions are the low adhesion portions 527p, 627p. In contrast, the area of ​​the high adhesion portions may be larger than the area of ​​the low adhesion portions 527p, 627p, and the majority of the high adhesion portions may be the high adhesion portions.

[0184] In each of the above embodiments, the area of ​​the exposed facing portion 52a where the low-adhesion portions 527p are formed is larger than the area of ​​the exposed facing portion 52a where the high-adhesion portions are formed, and most of the exposed facing portion 52a is the low-adhesion portions 527p. However, the above area relationship may be reversed, and most of the exposed facing portion 52a may be the high-adhesion portions.

[0185] In each of the above embodiments, the targets on which both the high adhesion portion and the low adhesion portion are formed are the D-side substrate 50 and the S-side substrate 60. However, the target may be either the D-side substrate 50 or the S-side substrate 60. In that case, the other may have only the low adhesion portion formed without the high adhesion portion, or may have only the high adhesion portion formed without the low adhesion portion.

[0186] In each of the above embodiments, the line widths of the element annular portion 527a, the metal body annular portion 527b, and the terminal annular portion 527c on the S-side substrate 50 are set to dimensions narrower than the distance between the P wiring 54 and the relay wiring 55. In contrast, the line widths may be wider than the distance. Similarly, on the D-side substrate 60, the line width of the metal body annular portion 627b may be narrower or wider than the distance between the N wiring 64 and the relay wiring 65.

[0187] In the above-described embodiments, an example of the semiconductor device 20 having a double-sided heat dissipation structure including a pair of substrates 50, 60 has been shown, but the present invention is not limited to this. The present invention can also be applied to a semiconductor device 20 having a single-sided heat dissipation structure including only the substrate 50 to which the drain electrode 40D (first main electrode) is connected. Alternatively, the rear surface metal bodies 53, 63 may be eliminated, and an electrically insulating heat dissipation gel may be applied to the rear surfaces of the insulating substrates 51, 61, and a heat sink may be thermally connected to the heat dissipation gel.

[0188] In the above-described embodiments, examples have been shown in which the semiconductor device 20 includes the semiconductor elements 40H and 40L, but this is not limiting. The semiconductor device 20 may include only a semiconductor element 40 that configures one of the arms. The semiconductor device 20 may include, for example, only one semiconductor element 40.

[0189] In each of the above embodiments, the element facing portion 62b has a ring-shaped shape that extends along the outer shape of the semiconductor element 40. However, the element facing portion 62b is not limited to being ring-shaped, and may have a shape that extends linearly along one side of the semiconductor element 40, for example.

[0190] In each of the above embodiments, the S-side substrate 60 may also have a high-adhesion portion formed in an annular shape along the outer shapes of the semiconductor elements 40H, 40L, similar to the D-side substrate 50. However, even in regions extending along the outer shapes of the semiconductor elements 40H, 40L, the exposed facing portion 62a or the element facing portion 62b may have a low-adhesion portion 627p. Alternatively, even in the exposed facing portion 62a or the element facing portion 62b, priority may be given to forming a high-adhesion portion in an annular shape along the outer shapes of the semiconductor elements 40H, 40L.

[0191] In each of the above embodiments, the S-side substrate 60 may also have a high-adhesion portion formed in an annular shape along the outer shapes of the semiconductor elements 40H, 40L, similar to the D-side substrate 50. However, even in regions extending along the outer shapes of the semiconductor elements 40H, 40L, the exposed facing portion 62a or the element facing portion 62b may have a low-adhesion portion 627p. Alternatively, even in the exposed facing portion 62a or the element facing portion 62b, priority may be given to forming a high-adhesion portion in an annular shape along the outer shapes of the semiconductor elements 40H, 40L.

[0192] The configuration described in this embodiment can be combined with any of the configurations described in the first, second, third, fourth, fifth, and other embodiments. Furthermore, although the present disclosure has been described based on examples, it is understood that the present disclosure is not limited to these examples or structures. The present disclosure also encompasses various modifications and modifications within the scope of equivalents. In addition, while various combinations and forms are shown in the present disclosure, other combinations and forms including only one element, more than one element, or less than one element are also within the scope and spirit of the present disclosure.

[0193] (Disclosure of Technical Ideas) This specification discloses multiple technical ideas described in the following multiple clauses. Some clauses may be described in a multiple dependent form, with the subsequent clause alternatively referring to the preceding clause. Furthermore, some clauses may be described in a multiple dependent form, with the subsequent clause referring to another multiple dependent clause. These multiple dependent clauses define multiple technical ideas.

[0194] (Technical Idea 1) A semiconductor device comprising: a semiconductor element (40) having a main electrode (40D, 40S); an insulating base material (51, 61); a substrate (50, 60) having a surface metal body (52, 62) arranged on the surface of the insulating base material and electrically connected to the main electrode; and a sealing body (30) that seals at least a portion of the substrate including the surface metal body, and the semiconductor element, wherein the surface metal body has high adhesion portions (527a, 527b, 527c, 527d, 627b) that have a higher degree of adhesion with the sealing body at the contact portion with the sealing body, and low adhesion portions (527p, 627p) that have a lower degree of adhesion with the sealing body than the high adhesion portions, and at least a portion of the high adhesion portions is arranged between portions of the substrate that have different potentials.

[0195] (Technical Concept 2) The semiconductor device according to Technical Concept 1, wherein the high adhesion portion includes a metal body annular portion (527b, 627b) extending annularly along the outer shape of the surface metal body.

[0196] (Technical Concept 3) The semiconductor device according to Technical Concept 1 or 2, wherein the high adhesion portion includes an element annular portion (527a) extending annularly along the outer shape of the semiconductor element.

[0197] (Technical Idea 4) A semiconductor device according to any one of Technical Ideas 1 to 3, wherein an external connection terminal (90) for electrically connecting to an external device is connected to the surface metal body, and the high adhesion portion includes a terminal annular portion (527c) extending annularly so as to surround the connection portion between the surface metal body and the external connection terminal.

[0198] (Technical Idea 5) A semiconductor device according to any one of Technical Ideas 1 to 4, wherein the main electrodes include a first main electrode (40D) provided on the front surface of the semiconductor element and a second main electrode (40S) provided on the back surface of the semiconductor element, the substrate includes a first substrate (50) connected to the first main electrode and a second substrate (60) connected to the second main electrode, and the high adhesion portion and the low adhesion portion are formed on both the first substrate and the second substrate.

[0199] (Technical Idea 6) A semiconductor device according to any one of Technical Ideas 1 to 5, wherein at least a portion of the high adhesion portion has a shape extending in an annular shape, and at least a portion of the low adhesion portion is surrounded by the high adhesion portion.

[0200] (Technical Concept 7) The semiconductor device according to any one of Technical Concepts 1 to 6, wherein the area of ​​the high adhesion portion in one of the substrates is smaller than the area of ​​the low adhesion portion.

[0201] (Technical Idea 8) The main electrodes include a first main electrode (40D) provided on the front surface of the semiconductor element and a second main electrode (40S) provided on the back surface of the semiconductor element, and the substrates include a first substrate (50) connected to the first main electrode and a second substrate (60) connected to the second main electrode, and when a portion of one of the first substrate and the second substrate where the surface metal body is not provided and the insulating base material is exposed is an exposed portion (61a), and a portion of the surface metal body of the other substrate that faces the exposed portion is an exposed facing portion (52a), the semiconductor device according to any one of Technical Ideas 1 to 7 has the low-adhesion portion formed in at least a part of the exposed facing portion.

[0202] (Technical Concept 9) The semiconductor device according to Technical Concept 8, wherein the area of ​​the exposed opposing portion where the low adhesion portion is formed is larger than the area of ​​the exposed opposing portion where the high adhesion portion is formed.

[0203] (Technical Idea 10) A semiconductor device according to Technical Idea 8 or 9, wherein in a region between portions of the other substrate having different potentials, there is a portion where the high adhesion portion is formed even in the exposed opposing portion.

[0204] (Technical Idea 11) A semiconductor device according to any one of Technical Ideas 8 to 10, in which in a region of the substrate extending annularly along the outer shape of the surface metal body, there is a portion where the high adhesion portion is formed even in the exposed opposing portion.

[0205] (Technical Idea 12) A semiconductor device according to any one of Technical Ideas 8 to 11, wherein in a region of the substrate that extends annularly along the outer shape of the semiconductor element, there is a portion where the high adhesion portion is formed even in the exposed opposing portion.

[0206] (Technical Idea 13) A semiconductor device comprising: a semiconductor element (40) having main electrodes (40D, 40S) on both sides; a substrate (50, 60) having an insulating base (51, 61) and a surface metal body (52, 62) arranged on the surface of the insulating base and electrically connected to the main electrodes; and a sealing body (30) that seals at least a portion of the substrate including the surface metal body, and the semiconductor element, wherein a high-adhesion portion (527a, 527b, 527c, 527d, 627b) that has a high degree of adhesion with the sealing body and a low-adhesion portion (527p, 627p) that has a lower degree of adhesion with the sealing body than the high-adhesion portion are formed in the surface metal body at a contact portion that contacts the sealing body, and when a portion of the contact portion that faces the semiconductor element is defined as an element-facing portion (62b), the low-adhesion portion is formed in at least a portion of the element-facing portion.

[0207] (Technical Concept 14) The semiconductor device according to Technical Concept 6, wherein the area of ​​the element facing portion where the low adhesion portion is formed is larger than the area of ​​the element facing portion where the high adhesion portion is formed.

[0208] (Technical Concept 15) The semiconductor device according to Technical Concept 6 or 7, wherein in a region of the substrate between portions of different potentials, there is a portion where the high adhesion portion is formed even in the element facing portion.

[0209] (Technical Idea 16) A semiconductor device according to any one of Technical Ideas 6 to 8, wherein in a region of the substrate extending annularly along the outer shape of the surface metal body, there is a portion where the high adhesion portion is formed, even in the element facing portion.

Claims

1. A semiconductor device (40) having main electrodes (40D, 40S), a substrate (50, 60) having insulating substrates (51, 61) and surface metal bodies (52, 62) disposed on the surfaces of the insulating substrates and electrically connected to the main electrodes, and a sealing body (30) that seals at least a part of the substrate including the surface metal body and the semiconductor device, wherein high adhesion portions (527a, 527b, 527c, 527d, 627b) with enhanced adhesion to the sealing body and low adhesion portions (527p, 627p) with lower adhesion to the sealing body than the high adhesion portions are formed at contact portions of the surface metal bodies with the sealing body, and at least a part of the high adhesion portions is disposed between portions of different potentials in the substrate.

2. The semiconductor device according to claim 1, wherein the high adhesion portions include metal body annular portions (527b, 627b) extending annularly along the outer shape of the surface metal body.

3. The semiconductor device according to claim 1, wherein the high adhesion portions include element annular portions (527a) extending annularly along the outer shape of the semiconductor element.

4. The surface metal body is connected to an external connection terminal (90) for electrical connection to an external device, and the high adhesion portions include terminal annular portions (527c) extending annularly so as to surround the connection portion between the surface metal body and the external connection terminal. The semiconductor device according to claim 1.

5. The main electrodes include a first main electrode (40D) provided on the surface of the semiconductor device and a second main electrode (40S) provided on the back surface of the semiconductor device. The substrate includes a first substrate (50) connected to the first main electrode and a second substrate (60) connected to the second main electrode. The semiconductor device according to any one of claims 1 to 4, wherein the high adhesion portions and the low adhesion portions are formed on both the first substrate and the second substrate.

6. The semiconductor device according to any one of claims 1 to 4, wherein at least a part of the high adhesion portions has an annularly extending shape, and at least a part of the low adhesion portions is surrounded by the high adhesion portions.

7. The semiconductor device according to any one of claims 1 to 4, wherein the area of the high adhesion portions on one substrate is smaller than the area of the low adhesion portions.

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