Power converter safety

Abstract

Systems, devices, and methods for protecting and operating converters more efficiently. Overcurrent events can be predicted based on predicted electrical currents. If an overcurrent event is predicted to occur, the operation of modules of an energy system can be altered to prevent the actual occurrence of the overcurrent event. The quality of power output by converters is also improved by compensating for the effects of voltage ripple, e.g., voltage ripple on the DC link of the converters. To reduce the effects of the ripple, a correction factor can be applied to a reference signal that is used to generate the switching signals for the converters.

Description

[0001]Docket No.56420-0020WO1 Power Converter Safety CROSS-REFERENCE TO RELATED APPLICATION This application is an International Application which claims priority to U.S. Provisional Patent Application No.63 / 616,056, filed December 29, 2023. The disclosure of the foregoing application is hereby incorporated by reference in its entirety. FIELD This specification relates generally to systems, devices, and methods for protecting and operating converters more efficiently. BACKGROUND In electrical engineering, power engineering, and the electric power industry, power conversion is converting electric energy from one form to another, e.g., converting between alternating current (AC) and direct current (DC), adjusting the voltage or frequency, or some combination of these. A power converter is an electrical or electro-mechanical device for converting electrical energy. A power converter can be as simple as a transformer to change the voltage of AC power, but can also be implemented using far more complex systems. The term “power converter” can also refer to a class of electrical machinery that is used to convert one frequency of alternating current into another frequency. Power conversion systems often incorporate redundancy and voltage regulation. An example of a power converter is an inverter that converts DC into AC. In power engineering, inverters are part of a class of devices called power electronics that regulate the flow of electrical power. An inverter is an electrical assembly that can facilitate power delivery to the grid or a microgrid load from a power source. Some inverters may accomplish DC-to-AC conversion by controlling switches in a prescribed manner. As a result, a DC input becomes an AC output. Two example types of inverters are stand-alone inverters and grid-connected inverters. Safe operation of power converters, including grid support utility interactive inverters, can involve ceasing operation of the inverter during an overcurrent event, e.g., from a short circuit, overload, ground fault, or other reason. In addition, the converters should produce a voltage or current with low total harmonic distortion and low emissions of individual harmonics. For these and other reasons, needs exist for systems, devices, and methods to - 1 -    Docket No. 56420-0020WO1facilitate safe operation of power converters and to improve power quality of the power converters. SUMMARY This specification describes technologies for protecting power converters and other components of energy systems using overcurrent protection and for improving power quality by compensating for the effects of DC link ripple using reference signal correction. Energy systems described in this specification can include one or more arrays of modules for generating AC signals. Each module can include an energy source and a switch- based converter. Each module can also include or be coupled to a local control device that generates switching signals for controlling the switches of the converter based on control information received from a main control device over a communication path or link. During operation, faults may occur within the electric circuitry of the energy system or with components coupled to the energy system. Such faults can include a short circuit, ground fault, overload, or other type of fault. One possible consequence of a fault is an overcurrent event. Generally, an overcurrent event is a situation during which current flowing through any particular node exceeds a particular value, e.g., an intended or normal maximum current through the particular node. This value can be based on a current rating, e.g., a maximum current rating, of one or more electrical components of the energy system or coupled to the energy system. The excess current of overcurrent events can damage or destroy components of the energy system and / or components coupled to the energy system. A threshold that is used to detect overcurrent events and to trigger corrective actions can be set lower than the maximum current rating, to ensure component safety. Also, different thresholds can be set for different nodes in a circuit network that includes the energy system and components coupled to the energy system. In some implementations, the threshold for overcurrent protection can be based on an absolute change in current or a rate of change of current. For example, an overcurrent event can be determined to occur when current flowing out of or into an inverter exceeds a predefined threshold or has a rate of change that exceeds a predefined threshold. The predefined threshold for overcurrent event detection can be determined based on a current rating for the inverter or for components of the inverter. This specification describes circuits and techniques that prevent the occurrence of overcurrent events by predicting the amount of current that will flow into or out of the energy system, or a node of the energy system, at a future time and using the predicted current to  Docket No. 56420-0020WO1predict whether an overcurrent event will occur if corrective actions are not taken. In some implementations, the current is predicted a number of time steps into the future, which can be based on a clock rate of processing circuitry, e.g., a Field Programmable Gate Array (FPGA), of a main control device or other device that detects and / or predicts overcurrent events. The described overcurrent protection can be performed on the basis of the predicted current (instead of the measured current), which enables corrective actions to be performed before the current reaches or overshoots a threshold, thereby enhancing the protection of the components of the system. The overcurrent protection can be used to enhance converter safety for grid-connected and grid-independent, e.g., stand-alone, energy systems. For example, whether or not an energy system is connected to a grid, the energy system supplying power to a load can experience an overcurrent event. When an overcurrent event is predicted to occur based on overcurrent prediction techniques described herein, the energy system can respond by performing one or more corrective actions, e.g., ceasing operation of the converters, or at least some of the converters, reducing the amount of current output by the converters, and / or tripping one or more breakers. Bandwidth limitations and delays observed from various electrical components within an energy system can render instantaneous current measurements inaccurate relative to the actual current at the time the current measurement is received and processed by a control device. Therefore, comparisons of the measured instantaneous current to an overcurrent threshold can result in the actual current overshooting the overcurrent threshold before the control device can detect the overcurrent event and react accordingly, e.g., by ceasing converter operation or tripping a breaker. For example, the current sensor and signal chain in the energy system, including within a main control device, can have some bandwidth limitations and / or otherwise cause delays. In some cases, e.g., with digital control systems, an analog-to-digital converter (ADC), a digital-to-analog converter (DAC), and / or other software and / or hardware components of the control system can contribute to delays in receiving and processing current measurements. As a result, the actual current may overshoot the overcurrent threshold before the control device detects the overcurrent event and takes corrective action, which can damage or destroy components of the system before the corrective action is taken. This specification also describes circuits and techniques for improving the quality of power output by converters by compensating for the effects of voltage ripple. Safe and effective operation of standalone and grid support utility interactive inverters indicate that the  Docket No. 56420-0020WO1inverters should produce a voltage or current with low total harmonic distortion (THD) and low emissions of individual harmonics. One way to produce a reference signal that is used by modules in an array to generate the AC output is to divide the AC voltage setpoint for the array of modules by the DC link voltage of the array. However, delays in obtaining the DC link voltage that is used to generate the reference signal and sending the reference signal to the local control devices can result in the DC link voltage used to generate the reference signal being different from the DC link voltage at the time at which the reference signal is used to control the modules’ converters, resulting in the introduction of additional harmonics on the output signal of the converters. This specification describes techniques for reducing the harmonics by correcting the reference signals locally by the local control devices using reference signal correction factors that are based on voltage measurements obtained by the local control devices, which improves the THD of the system. BRIEF DESCRIPTION OF FIGURES The details of the subject matter set forth herein, both as to its structure and operation, may be apparent by study of the accompanying figures, in which like reference numerals refer to like parts. The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the subject matter. Moreover, all illustrations are intended to convey concepts, where relative sizes, shapes and other detailed attributes may be illustrated schematically rather than literally or precisely. FIGS.1A-1C are block diagrams depicting example implementations of a modular energy system. FIGS.1D-1E are block diagrams depicting example implementations of control devices for an energy system. FIGS.1F-1G are block diagrams depicting example implementations of modular energy systems coupled with a load and a charge source. FIGS.2A-2B are block diagrams depicting example implementations of a module and control system within an energy system. FIG.2C is a block diagram depicting an example implementation of a physical configuration of a module. FIG.2D is a block diagram depicting an example implementation of a physical configuration of a modular energy system. FIGS.3A-3C are block diagrams depicting example implementations of modules having various electrical configurations.  Docket No. 56420-0020WO1FIGS.4A-4F are schematic views depicting example implementations of energy sources. FIGS.5A-5C are schematic views depicting example implementations of energy buffers. FIGS.6A-6C are schematic views depicting example implementations of converters. FIGS.7A-7E are block diagrams depicting example implementations of modular energy systems having various topologies. FIG.8A is a plot depicting an example output voltage of a module. FIG.8B is a plot depicting an example multilevel output voltage of an array of modules. FIG.8C is a plot depicting an example reference signal and carrier signals usable in a pulse width modulation control technique. FIG.8D is a plot depicting example reference signals and carrier signals usable in a pulse width modulation control technique. FIG.8E is a plot depicting example switch signals generated according to a pulse width modulation control technique. FIG.8F as a plot depicting an example multilevel output voltage generated by superposition of output voltages from an array of modules under a pulse width modulation control technique. FIGS.9A-9B are block diagrams depicting example implementations of controllers for a modular energy system. FIG.10A is a block diagram depicting an example implementation of a multi-phase modular energy system having interconnection module. FIG.10B is a schematic diagram depicting an example implementation of an interconnection module in the multi-phase implementation of FIG.10A. FIG.10C is a block diagram depicting an example implementation of a modular energy system having two subsystems connected together by interconnection modules. FIG.10D is a block diagram depicting an example implementation of a three-phase modular energy system having interconnection modules supplying auxiliary loads. FIG.10E is a schematic view depicting an example implementation of the interconnection modules in the multi-phase implementation of FIG.10D. FIG.10F is a block diagram depicting another example implementation of a three- phase modular energy system having interconnection modules supplying auxiliary loads.  Docket No. 56420-0020WO1FIG.11A is a block diagram depicting an example implementation of grid-connected system in which an energy system is connected to a load and a grid. FIG.11B is an electrical equivalence diagram depicting the example implementation of the grid-connected system in which an energy system is connected to a load and a grid. FIG.12A is a block diagram of an example implementation of an energy system that includes electrical components for controlling modules based on overcurrent prediction. FIG.12B is a block diagram of an example implementation of an energy system that includes a local control device that monitors current for overcurrent protection. FIG.12C is a block diagram of an example implementation of an energy system that includes a local control device that monitors current and performs overcurrent protection based on the monitored current. FIG.13 is a block diagram of an example implementation of overcurrent prediction circuitry. FIG.14A is a block diagram of an example implementation of circuitry to maintain a predicted overcurrent event state based on overcurrent prediction. FIG.14B is a block diagram of an example implementation of an overcurrent pulse generator circuit to generate a pulse signal for controlling switching of a converter. FIG.14C is a block diagram of an example implementation of circuitry to control switching of a converter. FIG.15A is a flow diagram showing an example process for predicting overcurrent events and taking corrective action in response to predicting the overcurrent event. FIG.15B is a flow diagram showing an example process for overcurrent prediction. FIG.16A is a flow diagram showing an example process for controlling a converter to stop switching based on a predicted overcurrent event state. FIG.16B is a flow diagram showing an example process for activating a current limiting operational mode based on a predicted overcurrent event state. FIG.16C is a flow diagram showing an example process for controlling a converter to resume switching based on a fault condition being reset. FIG.17 is a graphical representation of a predicted electrical current and an actual electrical current. FIGS.18A-18B are schematic diagrams illustrating two example implementations of an energy system configured to use corrected reference signals to control converter switches. FIG.19A is a schematic diagram illustrating circuit for generating modulation signaling that uses a reference signal correction factor.  Docket No. 56420-0020WO1FIG.19B is a schematic diagram of an example reference voltage generator. FIG.19C is a schematic diagram of an example reference signal correction factor generator. FIG.20A is a graphical representation of a direct current link voltage. FIG.20B is a graphical representation of average direct current voltage for reference signal correction. FIG.20C is a graphical representation of (near)-instantaneous average direct current voltage for reference signal correction. FIG.20D is a graphical representation of a reference signal correction factor. FIG.21 is a flow diagram showing an example method of generating switching signals for controlling a converter. FIG.22 is a flow diagram of an example method of generating a reference signal. FIG.23 is a schematic diagram illustrating the DC current and AC current on either side of an example power converter. DETAILED DESCRIPTION Before describing the example implementations pertaining to energy systems that include components, e.g., electrical assemblies, that can predict overcurrent events prior to the overcurrent events occurring and / or components that can generate switching signals for power converter operation that mitigate THD, it is first useful to describe the underlying systems in greater detail. With reference to FIGS.1A through 11B, the following sections describe various applications in which implementations of the modular energy systems can be implemented, implementations of control systems or devices for the modular energy systems, configurations of the modular energy system implementations with respect to charging sources and loads, implementations of individual modules, implementations of topologies for arrangement of the modules within the systems, implementations of control methodologies, implementations of balancing operating characteristics of modules within the systems, and implementations of the use of interconnection modules. Examples of Applications Stationary applications are those in which the modular energy system is located in a fixed location during use, although it may be capable of being transported to alternative locations when not in use. The module-based energy system resides in a static location while providing electrical energy for consumption by one or more other entities, or storing or  Docket No. 56420-0020WO1buffering energy for later consumption. Examples of stationary applications in which the implementations disclosed herein can be used include, but are not limited to: energy systems for use by or within one or more residential structures or locales, energy systems for use by or within one or more industrial structures or locales, energy systems for use by or within one or more commercial structures or locales, energy systems for use by or within one or more governmental structures or locales (including both military and non-military uses), energy systems for charging the mobile applications described below (e.g., a charge source or a charging station), and systems that convert solar power, wind, geothermal energy, fossil fuels, or nuclear reactions into electricity for storage. Stationary applications often supply loads, including grids and microgrids, motors, and data centers. A stationary energy system can be used in either a storage or non-storage role. Mobile applications, sometimes referred to as traction applications, are generally ones where a module-based energy system is located on or within an entity, and stores and provides electrical energy for conversion into motive force by a motor to move or assist in moving that entity. Examples of mobile entities with which the implementations disclosed herein can be used include, but are not limited to, electric and / or hybrid entities that move over or under land, over or under sea, above and out of contact with land or sea (e.g., flying or hovering in the air), or through outer space. Examples of mobile entities with which the implementations disclosed herein can be used include, but are not limited to, vehicles, trains, trams, ships, vessels, aircraft, and spacecraft. Examples of mobile vehicles with which the implementations disclosed herein can be used include, but are not limited to, those having only one wheel or track, those having only two-wheels or tracks, those having only three wheels or tracks, those having only four wheels or tracks, and those having five or more wheels or tracks. Examples of mobile entities with which the implementations disclosed herein can be used include, but are not limited to, a car, a bus, a truck, a motorcycle, a scooter, a bicycle, an industrial vehicle, a mining vehicle, a flying vehicle (e.g., a plane, a helicopter, a drone, etc.), a maritime vessel (e.g., commercial shipping vessels, ships, yachts, boats or other watercraft), a submarine, a locomotive or rail-based vehicle (e.g., a train, a tram, etc.), a military vehicle, a spacecraft, and a satellite. In describing implementations, reference may be made to a particular stationary application (e.g., grid, micro-grid, data centers, cloud computing environments) or mobile application (e.g., an electric car). Such references are made for ease of explanation and do not mean that a particular implementation is limited for use to only that particular mobile or stationary application. Implementations of systems providing power to a motor can be used in  Docket No. 56420-0020WO1both mobile and stationary applications. While certain configurations may be more suitable to some applications over others, all example implementations disclosed herein are capable of use in both mobile and stationary applications unless otherwise noted. Module-based Energy System Examples FIG.1A is a block diagram of an example implementation of a module-based energy system 100 (the “energy system 100” or “system 100” for short). Here, the energy system 100 includes a control system 102 communicatively coupled with N converter-source modules 108-1 through 108-N (collectively referred to as the modules 108). Each of the N converter-source modules 108-1 through 108-N is communicatively coupled to the control system 102 by a respective corresponding communication path or link 106-1 through 106-N. The modules 108 are configured to store energy and output the energy as needed to a load 101 (or to other modules 108). In these implementations, any number of two or more of the modules 108 can be used (e.g., N is greater than or equal to two). The modules 108 can be connected to each other in a variety of manners as will be described in more detail with reference to FIGS.7A-7E. For ease of illustration, in FIGS.1A-1C, the modules 108 are shown connected in series, or as a one dimensional array, where the Nth module is coupled to the load 101. The energy system 100 is configured to supply power to the load 101. The load 101 can be any type of load, including but not limited to a motor, a microgrid load, etc. In some implementations, the energy system 100 is coupled to a grid to provide power to the grid (e.g., to sell back to the grid). The energy system 100 is also configured to store power received from a charge source, e.g., the grid. FIG.1F is a block diagram depicting an example implementation of the energy system 100 with a power input interface 151 for receiving power from a charge source 150 and a power output interface for outputting power to load 101. In this implementation the energy system 100 can receive and store power over interface 151 at the same time as outputting power over interface 152. FIG.1G is a block diagram depicting another example implementation of the energy system 100 with a switchable interface 154. In this implementation, the energy system 100 can select, or be instructed to select, between receiving power from charge source 150 and outputting power to load 101. The energy system 100 can be configured to supply multiple loads 101, including both primary and auxiliary loads, and / or receive power from multiple  Docket No. 56420-0020WO1charge sources 150 (e.g., a utility-operated power grid and a local renewable energy source (e.g., solar)). FIG.1B depicts another example implementation of the energy system 100. Here, control system 102 is implemented as a main control device (MCD) 112 communicatively coupled with N different local control devices (LCDs) 114-1 through 114-N over communication paths or links 115-1 through 115-N, respectively. Each LCD 114-1 through 114-N is communicatively coupled with one module 108-1 through 108-N over communication paths or links 116-1 through 116-N, respectively, such that there is a 1:1 relationship between LCDs 114 and modules 108. In addition, a dedicated communication path or link 119-1 through 119-N can communicatively couple the MCD 112 with each LCD 114-1 through 114-N, respectively. The MCD 112 can quickly communicate a corrective action signal, e.g., a trip signal, to one or more of the LCDs 114-1 through 114-N based on the MCD 112 determining that an overcurrent event is imminent. As described in more detail below, the MCD 112 can use overcurrent prediction techniques to predict that an overcurrent event is imminent or will occur if correction actions are not taken. When the MCD 112 predicts a future occurrence of an overcurrent event, the MCD 112 can send a trip signal to one or more LCDs 114-1 through 114-N using the communication paths or links 119-1 through 119-N, respectively. The trip signal can instruct the LCDs 114-1 through 114-N to take corrective actions to prevent the overcurrent event from occurring or at least reduce the duration and therefore effects of the overcurrent event if it occurs. Using the dedicated communication paths or links 119-1 through 119-N allows the MCD 112 to communicate the trip signal quickly, thereby increasing the likelihood that the overcurrent event is avoided or reducing the duration of one that occurs. For example, using a dedicated communication path or link 119 ensures that the trip signal does not have to wait for any other data traffic on the communication path or link 119. In some implementations, the MCD 112 can use communication paths or links 119-1 through 119-N to communicate to the LCDs 114-1 through 114-N that it is safe to resume normal operation, e.g., when the current level that triggered the prediction of an overcurrent event has dropped below a threshold. In some implementations, when it is safe to resume normal operation, the MCD 112 can resume communicating reference signals, and the receipt of reference signals from the MCD 112 can be an indication to the respective LCD 114-1 through 114-N to resume operation of the modules 108-1 through 108-N.  Docket No. 56420-0020WO1In some implementations, each communication path or link 119 can be bidirectional to facilitate communication from the MCD 112 to each LCD 114-1 through 114-N and to facilitate communication from each LCD 114-1 through 114-N to the MCD 112. For example, a module 108 connected to an LCD 114 can perform detection of current using monitor circuitry 208. The LCD 114 can communicate the current measurement to the MCD 112 using the communication path or link 119. FIG.1C depicts another example implementation of the energy system 100. Here, MCD 112 is communicatively coupled with M different LCDs 114-1 to 114-M over communication paths or links 115-1 to 115-M, respectively. Each LCD 114 can be coupled with and control two or more modules 108. In the example shown here, each LCD 114 is communicatively coupled with two modules 108, such that M LCDs 114-1 to 114-M are coupled with 2M modules 108-1 through 108-2M over communication paths or links 116-1 to 116-2M, respectively. Control system 102 can be configured as a single device (e.g., FIG.1A) for the entire the energy system 100 or can be distributed across or implemented as multiple devices (e.g., FIGS.1B-1C). In some implementations, control system 102 can be distributed between LCDs 114 associated with the modules 108, such that no MCD 112 is necessary and can be omitted from the energy system 100. Control system 102 can be implemented using software, i.e., instructions stored in memory that are executable by processing circuitry, hardware, or a combination of them. The one or more devices of control system 102 can each include processing circuitry 120 and memory 122. Example implementations of processing circuitry and memory are described further below. Control system 102 can have a communicative interface for communicating with devices 104 external to the energy system 100 over a communication link or path 105. For example, control system 102 (e.g., MCD 112) can output data or information about the energy system 100 to another control device 104, e.g., the Electronic Control Unit (ECU) or Motor Control Unit (MCU) of a vehicle in a mobile application, the grid controller in a stationary application, etc. Communication paths or links 105, 106, 115, 116, 118 (in FIG.2B), 119, 1232 (FIG. 12A), 1244 (FIG.12A), and 1264 (FIG.12B) can each be wired (e.g., electrical, optical) or wireless communication paths that communicate data or information bidirectionally, in parallel or series fashion. Data can be communicated in a standardized (e.g., IEEE, ANSI) or custom (e.g., proprietary) format. In automotive applications, communication paths 115 can  Docket No. 56420-0020WO1be configured to communicate according to FlexRay or CAN protocols. Communication paths 106, 115, 116, and 118 can also provide wired power to directly supply the operating power for control system 102 from one or more modules 108. For example, the operating power for each LCD 114 can be supplied only by the one or more modules 108 to which that LCD 114 is connected and the operating power for MCD 112 can be supplied indirectly from one or more of modules 108, e.g., through a car’s power network. Control system 102 is configured to control one or more modules 108 based on status information received from the same or different one or more of modules 108. Control can also be based on one or more other factors, including requirements of load 101. Controllable aspects include, but are not limited to, one or more of voltage, current, phase, and / or output power of each module 108. Status information of every module 108 in the energy system 100 can be communicated to control system 102, which can independently control every module 108- 1…108-N. Other variations are possible. For example, a particular module 108 or subset of modules 108 can be controlled based on status information of that particular module 108 or subset, based on status information of a different module 108 that is not that particular module 108 or subset, based on status information of all modules 108 other than that particular module 108 or subset, based on status information of that particular module 108 or subset and status information of at least one other module 108 that is not that particular module 108 or subset, or based on status information of all modules 108 in the energy system 100. The status information can be information about one or more aspects, characteristics, or parameters of each module 108. Types of status information include, but are not limited to, the following aspects of a module 108 or one or more components thereof, e.g., its energy source, energy buffer, converter, monitor circuitry: State of Charge (SOC)—e.g., the level of charge of an energy source relative to its capacity, in terms of a fraction or percent—of the one or more energy sources of the module, State of Health (SOH) (e.g., a figure of merit of the condition of an energy source compared to its ideal conditions) of the one or more energy sources of the module, temperature of the one or more energy sources or other components of the module, capacity of the one or more energy sources of the module, voltage of the one or more energy sources and / or other components of the module, current of the one or more energy sources and / or other components of the module, State of Power (SOP), e.g., the available power limitation of the energy source during discharge and / or charge, State of Energy (SOE), e.g., the present level of available energy of an energy source relative to the  Docket No. 56420-0020WO1maximum available energy of the source, and / or the presence of absence of a fault in any one or more of the components of the module. LCDs 114 can be configured to receive the status information from each module 108, or determine the status information from monitored signals or data received from or within each module 108, and communicate that information to MCD 112. In some implementations, each LCD 114 can communicate raw collected data to MCD 112, which then algorithmically determines the status information on the basis of that raw data. MCD 112 can then use the status information of modules 108 to make control determinations accordingly. The determinations may take the form of instructions, commands, or other information, including a modulation index “Mi” described herein, that can be utilized by LCDs 114 to either maintain or adjust the operation of each module 108. For example, MCD 112 may receive status information and assess that information to determine a difference between at least one module 108 (e.g., a component thereof) and at least one or more other modules 108 (e.g., comparable components thereof). For example, MCD 112 may determine that a particular module 108 is operating with one of the following conditions as compared to one or more other modules 108: with a relatively lower or higher SOC, with a relatively lower or higher SOH, with a relatively lower or higher capacity, with a relatively lower or higher voltage, with a relatively lower or higher current, with a relatively lower or higher temperature, or with or without a fault. In such examples, MCD 112 can output control information that causes the relevant aspect (e.g., output voltage, current, power, temperature) of that particular module 108 to be reduced or increased (depending on the condition). In this manner, the utilization of an outlier module 108 (e.g., operating with a relatively lower SOC or higher temperature), can be reduced so as to cause the relevant parameter of that module 108 (e.g., SOC or temperature) to converge towards that of one or more other modules 108. The determination of whether to adjust the operation of a particular module 108 can be made by comparison of the status information to predetermined thresholds, limits, or conditions, and not necessarily by comparison to statuses of other modules 108. The predetermined thresholds, limits, or conditions can be static thresholds, limits, or conditions, including those set by the manufacturer that do not change during use. The predetermined thresholds, limits, or conditions can be dynamic thresholds, limits, or conditions, that are permitted to change, or that do change, during use. For example, MCD 112 can adjust the operation of a module 108 if the status information for that module 108 indicates it to be operating in violation (e.g., above or below) of a predetermined threshold or limit, or outside  Docket No. 56420-0020WO1of a predetermined range of acceptable operating conditions. Similarly, MCD 112 can adjust the operation of a module 108 if the status information for that module 108 indicates the presence of an actual or potential fault (e.g., an alarm, or warning) or indicates the absence or removal of an actual or potential fault. Examples of a fault include, but are not limited to, an actual failure of a component, a potential failure of a component, a short circuit or other excessive current condition, an open circuit, an excessive voltage condition, a failure to receive a communication, the receipt of corrupted data, and the like. Depending on the type and severity of the fault, the faulty module’s utilization can be decreased to avoid damaging the module, or the module’s utilization can be ceased altogether. For example, if a fault occurs in a given module, then MCD 112 or LCD 114 can cause that module to enter a bypass state as described herein. MCD 112 can control modules 108 within the energy system 100 to achieve or converge towards a desired target. The target can be, for example, operation of all modules 108 at the same or similar levels with respect to each other, or within predetermined thresholds limits, or conditions. This process is also referred to as balancing or seeking to achieve balance in the operation or operating characteristics of modules 108. The term “balance” as used herein does not require absolute equality between modules 108 or components thereof, but rather is used in a broad sense to convey that operation of the energy system 100 can be used to actively reduce disparities in operation (or operative state) between modules 108 that would otherwise exist. MCD 112 can communicate control information to LCD 114, e.g., over communication path or link 116 or 118, for the purpose of controlling the modules 108 associated with the LCD 114. The control information can be, e.g., a modulation index (Mi) and a reference signal (Vrn) as described herein, a modulated reference signal (Vrnm-N) that combines the reference signal Vrn with the modulation index Mi, or otherwise. Each LCD 114 can use (e.g., receive and process) the control information to generate switching signals that control operation of one or more components (e.g., a converter) within the associated module(s) 108. In some implementations, MCD 112 generates the switch signals directly and outputs them to LCD 114, which relays the switch signals to the intended module component. All or a portion of control system 102 can be combined with a system external control device 104 that controls one or more other aspects of the mobile or stationary application. When integrated in this shared or common control device (or subsystem), control of the energy system 100 can be implemented in any desired fashion, including by one or more software applications executed by processing circuitry of the shared device, with hardware of  Docket No. 56420-0020WO1the shared device, or a combination thereof. Non-exhaustive examples of external control devices 104 include: a vehicular Electronic Control Unit (ECU) or Motor Control Unit (MCU) having control capability for one or more other vehicular functions (e.g., motor control, driver interface control, traction control, etc.); a grid or micro-grid controller having responsibility for one or more other power management functions (e.g., load interfacing, load power requirement forecasting, transmission and switching, interface with charge sources (e.g., diesel, solar, wind), charge source power forecasting, back up source monitoring, asset dispatch, etc.); and a data center control subsystem (e.g., environmental control, network control, backup control, etc.). FIGS.1D and 1E are block diagrams depicting example implementations of a shared or common control device (or system) 132 in which control system 102 can be implemented. In FIG.1D, common control device 132 includes main control device 112 and external control device 104. Main control device 112 includes an interface 141 for communication with LCDs 114 over path 115, as well as an interface 142 for communication with external control device 104 over internal communication bus 136. External control device 104 includes an interface 143 for communication with main control device 112 over bus 136, and an interface 144 for communication with other entities (e.g., components of the vehicle or grid) of the overall application over communication path 136. In some implementations, common control device 132 can be integrated as a common housing or package with devices 112 and 104 implemented as discrete integrated circuit (IC) chips or packages contained therein. In FIG.1E, external control device 104 acts as common control device 132, with the main control functionality implemented as a component within device 104. This component 112 can be or include software or other program instructions stored and / or hardcoded within memory of device 104 and executed by processing circuitry thereof. The component can also contain dedicated hardware. The component can be a self-contained module or core, with one or more internal hardware and / or software interfaces (e.g., application program interface (API)) for communication with the operating software of external control device 104. External control device 104 can manage communication with LCDs 114 over interface 141 and other devices over interface 144. In various implementations, device 104 / 132 can be integrated as a single IC chip, can be integrated into multiple IC chips in a single package, or integrated as multiple semiconductor packages within a common housing. In the implementations of FIGS.1D and 1E, the main control functionality of system 102 is shared in common device 132, however, other divisions of shared control or permitted.  Docket No. 56420-0020WO1For example, part of the main control functionality can be distributed between common device 132 and a dedicated MCD 112. In another example, both the main control functionality and at least part of the local control functionality can be implemented in common device 132 (e.g., with remaining local control functionality implemented in LCDs 114). In some implementations, all of control system 102 is implemented in common device (or subsystem) 132. In some implementations, local control functionality is implemented within a device shared with another component of each module 108, e.g., a Battery Management System (BMS). Examples of Modules within Cascaded Energy Systems Module 108 can include one or more energy sources and a power electronics converter and, if desired, an energy buffer. FIGS.2A-2B are block diagrams depicting additional example implementations of the energy system 100 with module 108 having a power converter 202, an energy buffer 204, and an energy source 206. Converter 202 can be a voltage converter or a current converter. The implementations are described herein with reference to voltage converters, although the implementations are not limited to such. Converter 202 can be configured to convert a direct current (DC) signal from energy source 206 into an alternating current (AC) signal and output it over power connection 110; i.e., the converter can operate as an inverter. Converter 202 can also receive an AC or DC signal over connection 110 and apply it to energy source 206 with either polarity in a continuous or pulsed form. Converter 202 can be or include an arrangement of switches (e.g., power transistors), examples including a half bridge of full bridge (H-bridge). In some implementations converter 202 includes only switches and the converter, and the module as a whole, does not include a transformer. Converter 202 can be also (or alternatively) be configured to perform AC to DC conversion (e.g., a rectifier), e.g., to charge a DC energy source from an AC source, DC to DC conversion, and / or AC to AC conversion (e.g., in combination with an AC-DC converter). In some implementations, such as to perform AC-AC conversion, converter 202 can include a transformer, either alone or in combination with one or more power semiconductors (e.g., switches, diodes, thyristors, and the like). In other implementations, such as those where weight and cost is a significant factor, converter 202 can be configured to perform the conversions with only power switches, power diodes, or other semiconductor devices and without a transformer.  Docket No. 56420-0020WO1Energy source 206 is preferably a robust energy storage device capable of outputting direct current and having an energy density suitable for energy storage applications for electrically powered devices. Energy source 206 can be an electrochemical battery, such as a single battery cell or multiple battery cells connected together in a battery module or array, or any combination thereof. FIGS.4A-4D are schematic diagrams depicting example implementations of energy source 206 configured as a single battery cell 402 (FIG.4A), a battery module with a series connection of multiple (e.g., four) cells 402 (FIG.4B), a battery module with a parallel connection of single cells 402 (FIG.4C), and a battery module with a parallel connection with legs having two cells 402 each (FIG.4D). A non-exhaustive list of examples of battery types is set forth elsewhere herein. Energy source 206 can also be a high energy density (HED) capacitor, such as an ultracapacitor or supercapacitor. An HED capacitor can be configured as a double layer capacitor (electrostatic charge storage), pseudocapacitor (electrochemical charge storage), hybrid capacitor (electrostatic and electrochemical), or otherwise, as opposed to a solid dielectric type of a typical electrolytic capacitor. The HED capacitor can have an energy density of 10 to 100 times (or higher) that of an electrolytic capacitor, in addition to a higher capacity. For example, HED capacitors can have a specific energy greater than 1.0 watt hours per kilogram (Wh / kg), and a capacitance greater than 10-100 farads (F). As with the batteries described with reference to FIGS.4A-4D, energy source 206 can be configured as a single HED capacitor or multiple HED capacitors connected together in an array (e.g., series, parallel, or a combination thereof). Energy source 206 can also be a fuel cell. The fuel cell can be a single fuel cell, multiple fuel cells connected in series or parallel, or a fuel cell module. Examples of fuel cell types include proton-exchange membrane fuel cells (PEMFC), phosphoric acid fuel cells (PAFC), solid acid fuel cells, alkaline fuel cells, high temperature fuel cells, solid oxide fuel cells, molten electrolyte fuel cells, and others. As with the batteries described with reference to FIGS.4A-4D, energy source 206 can be configured as a single fuel cell or multiple fuel cells connected together in an array (e.g., series, parallel, or a combination thereof). The aforementioned examples of source classes (e.g., batteries, capacitors, and fuel cells) and types (e.g., chemistries and / or structural configurations within each class) are not intended to form an exhaustive list, and those of ordinary skill in the art will recognize other variants that fall within the scope of the present subject matter. Energy buffer 204 can dampen or filter fluctuations in current across the DC line or link, e.g., +VDCL and –VDCL as described below, to assist in maintaining stability in the DC  Docket No. 56420-0020WO1link voltage. These fluctuations can be relatively low (e.g., kilohertz) or high (e.g., megahertz) frequency fluctuations or harmonics caused by the switching of converter 202, or other transients. These fluctuations can be absorbed by buffer 204 instead of being passed to source 206 or to ports IO3 and IO4 of converter 202. Power connection 110 is a connection for transferring energy or power to, from and through module 108. Module 108 can output energy from energy source 206 to power connection 110, where it can be transferred to other modules of the system or to a load. Module 108 can also receive energy from other modules 108 or a charging source (DC charger, single phase charger, multi-phase charger). Signals can also be passed through module 108 bypassing energy source 206. The routing of energy or power into and out of module 108 is performed by converter 202 under the control of LCD 114 (or another entity of system 102). In the implementation of FIG.2A, LCD 114 is implemented as a component separate from module 108 (e.g., not within a shared module housing) and is connected to and capable of communication with converter 202 via communication path 116. In the implementation of FIG.2B, LCD 114 is included as a component of module 108 and is connected to and capable of communication with converter 202 via internal communication path 118 (e.g., a shared bus or discrete connections). LCD 114 can also be capable of receiving signals from, and transmitting signals to, energy buffer 204 and / or energy source 206 over paths 116 or 118. Module 108 can also include monitor circuitry 208 configured to monitor (e.g., collect, sense, measure, and / or determine) one or more aspects of module 108 and / or the components thereof, such as voltage, current, temperature or other operating parameters that constitute status information (or can be used to determine status information by, e.g., LCD 114). A main function of the status information is to describe the state of the one or more energy sources 206 of the module 108 to enable determinations as to how much to utilize the energy source in comparison to other sources in the energy system 100, although status information describing the state of other components (e.g., voltage, temperature, and / or presence of a fault in buffer 204, temperature and / or presence of a fault in converter 202, presence of a fault elsewhere in module 108, etc.) can be used in the utilization determination as well. Monitor circuitry 208 can include one or more sensors, shunts, dividers, fault detectors, Coulomb counters, controllers or other hardware and / or software configured to monitor such aspects. Monitor circuitry 208 can be separate from the various components 202, 204, and 206, or can be integrated with each component 202, 204, and 206 (as shown in  Docket No. 56420-0020WO1FIGS.2A-2B), or any combination thereof. In some implementations, monitor circuitry 208 can be part of or shared with a Battery Management System (BMS) for a battery energy source 204. Discrete circuitry is not needed to monitor each type of status information, as more than one type of status information can be monitored with a single circuit or device, or otherwise algorithmically determined without the need for additional circuits. In some implementations, each LCD 114 can be coupled to, or part of, a module 108 that outputs current characterized by a phase, x. For a phase x, monitor circuitry 208 can monitor current Imx at different points in the module 108, including output current from the energy source 206, output current from the energy buffer 204, and output current at different points of the converter 202, including upstream of the converter switches or downstream of the converter switches. Depending on the implementation, the monitor circuitry 208 can use communication path or link 116 or communication path or link 118 to communicate the monitored current Imx to the LCD 114. In some implementations, the LCD 114 can communicate the monitored current Imx to the MCD 112 for overcurrent prediction using a communication path or link 119. In some implementations, the LCD 114 can perform overcurrent prediction using circuitry within or coupled to the LCD 114. LCD 114 can receive status information (or raw data) about the module components over communication paths 116, 118. LCD 114 can also transmit information to module components over paths 116, 118. Paths 116 and 118 can include diagnostics, measurement, protection, and control signal lines. The transmitted information can be control signals for one or more module components. The control signals can be switch signals for converter 202 and / or one or more signals that request the status information from module components. For example, LCD 114 can cause the status information to be transmitted over paths 116, 118 by requesting the status information directly, or by applying a stimulus (e.g., voltage) to cause the status information to be generated, in some cases in combination with switch signals that place converter 202 in a particular state. The physical configuration or layout of module 108 can take various forms. In some implementations, module 108 can include a common housing in which all module components, e.g., converter 202, buffer 204, and source 206, are housed, along with other optional components such as an integrated LCD 114. In other implementations, the various components can be separated in discrete housings that are secured together. FIG.2C is a block diagram depicting an example implementation of a module 108 having a first housing 220 that holds an energy source 206 of the module and accompanying electronics such as monitor circuitry, a second housing 222 that holds module electronics such as converter 202,  Docket No. 56420-0020WO1energy buffer 204, and other accompany electronics such as monitor circuitry, and a third housing 224 that holds LCD 114 (not shown) for the module 108. In alternative implementations the module electronics and LCD 114 can be housed within the same single housing. In still other implementations, the module electronics, LCD 114, and energy source(s) can be housed within the same single housing for the module 108. Electrical connections between the various module components can proceed through the housings 220, 222, 224 and can be exposed on any of the housing exteriors for connection with other devices such as other modules 108 or MCD 112. Modules 108 of the energy system 100 can be physically arranged with respect to each other in various configurations that depend on the needs of the application and the number of loads. For example, in a stationary application where the energy system 100 provides power for a microgrid, modules 108 can be placed in one or more racks or other frameworks. Such configurations may be suitable for larger mobile applications as well, such as maritime vessels. Alternatively, modules 108 can be secured together and located within a common housing, referred to as a pack. A rack or a pack may have its own dedicated cooling system shared across all modules. Pack configurations are useful for smaller mobile applications such as electric cars. The energy system 100 can be implemented with one or more racks (e.g., for parallel supply to a microgrid) or one or more packs (e.g., serving different motors of the vehicle), or combination thereof. FIG.2D is a block diagram depicting an example implementation of the energy system 100 configured as a pack with nine modules 108 electrically and physically coupled together within a common housing 230. Examples of these and further configurations are described in Int’l. Appl. No. PCT / US20 / 25366, filed March 27, 2020 and titled Module-Based Energy Systems Capable of Cascaded and Interconnected Configurations, and Methods Related Thereto, which is incorporated by reference herein in its entirety for all purposes. FIGS.3A-3C are block diagrams depicting example implementations of modules 108 having various electrical configurations. These implementations are described as having one LCD 114 per module 108, with the LCD 114 housed within the associated module, but can be configured otherwise as described herein. FIG.3A depicts a first example configuration of a module 108A within the energy system 100. Module 108A includes energy source 206, energy buffer 204, and converter 202A. Each component has power connection ports (e.g., terminals, connectors) into which power can be input and / or from which power can be output, referred to herein as IO ports. Such ports can also be referred to as input ports or output ports depending on the context.  Docket No. 56420-0020WO1Energy source 206 can be configured as any of the energy source types described herein (e.g., a battery as described with reference to FIGS.4A-4D, an HED capacitor, a fuel cell, or otherwise). Ports IO1 and IO2 of energy source 206 can be connected to ports IO1 and IO2, respectively, of energy buffer 204. Energy buffer 204 can be configured to buffer or filter high and low frequency energy pulsations arriving at buffer 204 through converter 202, which can otherwise degrade the performance of module 108. The topology and components for buffer 204 are selected to accommodate the maximum permissible amplitude of these high frequency voltage pulsations. Several (non-exhaustive) example implementations of energy buffer 204 are depicted in the schematic diagrams of FIGS.5A-5C. In FIG.5A, buffer 204 is an electrolytic and / or film capacitor CEB, in FIG.5B buffer 204 is a Z-source network 710, formed by two inductors LEB1 and LEB2 and two electrolytic and / or film capacitors CEB1 and CEB2, and in FIG.5C buffer 204 is a quasi Z-source network 720, formed by two inductors LEB1 and LEB2, two electrolytic and / or film capacitors CEB1 and CEB2 and a diode DEB. Ports IO3 and IO4 of energy buffer 204 can be connected to ports IO1 and IO2, respectively, of converter 202A, which can be configured as any of the power converter types described herein. FIG.6A is a schematic diagram depicting an example implementation of converter 202A configured as a DC-AC converter that can receive a DC voltage at ports IO1 and IO2 and switch to generate pulses at ports IO3 and IO4. Converter 202A can include multiple switches, and here converter 202A includes four switches S3, S4, S5, S6 arranged in a full bridge configuration. Control system 102 or LCD 114 can independently control each switch via control input lines 118-3 to each gate. Converter 202A configured as a DC-AC converter is also referred to as a power inverter (or simply, an inverter). An inverter is a circuit (or circuit assembly) that converts DC power to AC power. The switches S3, S4, S5, and S6 are controlled to switch on and off with a periodicity in conformance to the desired AC power frequency. The energy system 100 can include one inverter for each phase of the output current. As described below, the inverter can include switches that are controlled by the LCD 114 using, e.g., pulse-width modulation (PWM). The switches can also be controlled using other type of control signaling, such as control signaling that uses a reference modulation signal to oscillate the switch states. The switches can be any suitable switch type, such as power semiconductors like the metal–oxide–semiconductor field-effect transistors (MOSFETs) shown here, insulated gate bipolar transistors (IGBTs), or gallium nitride (GaN) transistors. Semiconductor switches can operate at relatively high switching frequencies, thereby permitting converter 202 to be  Docket No. 56420-0020WO1operated in pulse-width modulated (PWM) mode if desired, and to respond to control commands within a relatively short interval of time. This can provide a high tolerance of output voltage regulation and fast dynamic behavior in transient modes. In this implementation, a DC link voltage VDCLcan be applied to converter 202 between ports IO1 and IO2. VDCL is the DC link voltage for a particular module 108. By connecting VDCLto ports IO3 and IO4 by different combinations of switches S3, S4, S5, S6, converter 202 can generate three different voltage outputs at ports IO3 and IO4: +VDCL, 0, and –VDCL. A switch signal provided to each switch controls whether the switch is on (closed) or off (open). To obtain +VDCL, switches S3 and S6 are turned on while S4 and S5 are turned off, whereas –VDCLcan be obtained by turning on switches S4 and S5 and turning off S3 and S6. The output voltage can be set to zero (including near zero) or a reference voltage by turning on S3 and S5 with S4 and S6 off, or by turning on S4 and S6 with S3 and S5 off. These voltages can be output from module 108 over power connection 110. Ports IO3 and IO4 of converter 202 can be connected to (or form) module IO ports 1 and 2 of power connection 110, so as to generate the output voltage for use with output voltages from other modules 108. The control or switch signals for the implementations of converter 202 described herein can be generated in different ways depending on the control technique utilized by the energy system 100 to generate the output voltage of converter 202. In some implementations, the control technique is a PWM technique such as space vector pulse-width modulation (SVPWM) or sinusoidal pulse-width modulation (SPWM), or variations thereof. FIG.8A is a graph of voltage versus time depicting an example of an output voltage waveform 802 of converter 202. For ease of description, the implementations herein will be described in the context of a PWM control technique, although the implementations are not limited to such. Other classes of techniques can be used. One alternative class is based on hysteresis, examples of which are described in Int’l Publ. Nos. WO 2018 / 231810A1, WO 2018 / 232403A1, and WO 2019 / 183553A1, which are incorporated by reference herein for all purposes. Each module 108 can be configured with multiple energy sources 206 (e.g., two, three, four, or more). Each energy source 206 of module 108 can be controllable (switchable) to supply power to connection 110 (or receive power from a charge source) independent of the other sources 206 of the module. For example, all sources 206 can output power to connection 110 (or be charged) at the same time, or only one (or a subset) of sources 206 can supply power (or be charged) at any one time. In some implementations, the sources 206 of  Docket No. 56420-0020WO1the module can exchange energy between them, e.g., one source 206 can charge another source 206. Each of the sources 206 can be configured as any energy source described herein (e.g., battery, HED capacitor, fuel cell). Each of the sources 206 can be the same class (e.g., each can be a battery, each can be an HED capacitor, or each can be a fuel cell), or a different class (e.g., a first source can be a battery and a second source can be an HED capacitor or fuel cell, or a first source can be an HED capacitor and a second source can be a fuel cell). FIG.3B is a block diagram depicting an example implementation of a module 108B in a dual energy source configuration with a primary energy source 206A and secondary energy source 206B. Ports IO1 and IO2 of primary source 206A can be connected to ports IO1 and IO2 of energy buffer 204. Module 108B includes a converter 202B having an additional IO port. Ports IO3 and IO4 of buffer 204 can be connected ports IO1 and IO2, respectively, of converter 202B. Ports IO1 and IO2 of secondary source 206B can be connected to ports IO5 and IO2, respectively, of converter 202B (also connected to port IO4 of buffer 204). In this example implementation of module 108B, primary energy source 206A, along with the other modules 108 of the energy system 100, supplies the average power needed by the load. Secondary source 206B can serve the function of assisting energy source 206 by providing additional power at load power peaks, or absorbing excess power, or otherwise. As mentioned both primary source 206A and secondary source 206B can be utilized simultaneously or at separate times depending on the switch state of converter 202B. If at the same time, an electrolytic and / or a film capacitor (CES) can be placed in parallel with source 206B as depicted in FIG.4E to act as an energy buffer for the source 206B, or energy source 206B can be configured to utilize an HED capacitor in parallel with another energy source (e.g., a battery or fuel cell) as depicted in FIG.4F. FIGS.6B and 6C are schematic views depicting example implementations of converters 202B and 202C, respectively. Converter 202B includes switch circuitry portions 601 and 602A. Portion 601 includes switches S3 through S6 configured as a full bridge in similar manner to converter 202A, and is configured to selectively couple IO1 and IO2 to either of IO3 and IO4, thereby changing the output voltages of module 108B. Portion 602A includes switches S1 and S2 configured as a half bridge and coupled between ports IO1 and IO2. A coupling inductor LCis connected between port IO5 and a node1 present between switches S1 and S2 such that switch portion 602A is a bidirectional converter that can regulate (boost or buck) voltage (or inversely current). Switch portion 602A can generate two different voltages at node1, which are +VDCL2 and 0, referenced to port IO2, which can be at  Docket No. 56420-0020WO1virtual zero potential. The current drawn from or input to energy source 202B can be controlled by regulating the voltage on coupling inductor LC, using, for example, a pulse- width modulation technique or a hysteresis control method for commutating switches S1 and S2. Other techniques can also be used. Converter 202C differs from that of 202B as switch portion 602B includes switches S1 and S2 configured as a half bridge and coupled between ports IO5 and IO2. A coupling inductor LC is connected between port IO1 and a node1 present between switches S1 and S2 such that switch portion 602B is configured to regulate voltage. Control system 102 or LCD 114 can independently control each switch of converters 202B and 202C via control input lines 118-3 to each gate. In these implementations and that of FIG.6A, LCD 114 (not MCD 112) generates the switching signals for the converter switches. Alternatively, MCD 112 can generate the switching signals, which can be communicated directly to the switches, or relayed by LCD 114. In some implementations, driver circuitry for generating the switching signals can be present in or associated with MCD 112 and / or LCD 114. The aforementioned zero voltage configuration for converter 202 (turning on S3 and S5 with S4 and S6 off, or turning on S4 and S6 with S3 and S5 off) can also be referred to as a bypass state for the given module. This bypass state can be entered if a fault is detected in the given module, or if a system fault is detected warranting shut-off of more than one (or all modules) in an array or system. A fault in the module can be detected by LCD 114 and the control switching signals for converter 202 can be set to engage the bypass state without intervention by MCD 112. Alternatively, fault information for a given module can be communicated by LCD 114 to MCD 112, and MCD 112 can then make a determination whether to engage the bypass state, and if so, can communicate instructions to engage the bypass state to the LCD 114 associated with the module having the fault, at which point LCD 114 can output switching signals to cause engagement of the bypass state. In implementations where a module 108 includes three or more energy sources 206, converters 202B and 202C can be scaled accordingly such that each additional energy source 206B is coupled to an additional IO port leading to an additional switch circuitry portion 602A or 602B, depending on the needs of the particular source. For example a dual source converter 202 can include both switch portions 202A and 202B. Modules 108 with multiple energy sources 206 are capable of performing additional functions such as energy sharing between sources 206, energy capture from within the application (e.g., regenerative braking), charging of the primary source by the secondary  Docket No. 56420-0020WO1source even while the overall system is in a state of discharge, and active filtering of the module output. The active filtering function can also be performed by modules having a typical electrolytic capacitor instead of a secondary energy source. Examples of these functions are described in more detail in Int’l. Appl. No. PCT / US20 / 25366, filed March 27, 2020 and titled Module-Based Energy Systems Capable of Cascaded and Interconnected Configurations, and Methods Related Thereto, and Int’l. Publ. No. WO 2019 / 183553, filed March 22, 2019, and titled Systems and Methods for Power Management and Control, both of which are incorporated by reference herein in their entireties for all purposes. Each module 108 can be configured to supply one or more auxiliary loads with its one or more energy sources 206. Auxiliary loads are loads that require lower voltages than the primary load 101. Examples of auxiliary loads can be, for example, an on-board electrical network of an electric vehicle, or an HVAC system of an electric vehicle. The load of the energy system 100 can be, for example, one of the phases of the electric vehicle motor or electrical grid. This implementation can allow a complete decoupling between the electrical characteristics (terminal voltage and current) of the energy source and those of the loads. FIG.3C is a block diagram depicting an example implementation of a module 108C configured to supply power to a first auxiliary load 301 and a second auxiliary load 302, where module 108C includes an energy source 206, energy buffer 204, and converter 202B coupled together in a manner similar to that of FIG.3B. First auxiliary load 301 requires a voltage equivalent to that supplied from source 206. Load 301 is coupled to IO ports 3 and 4 of module 108C, which are in turn coupled to ports IO1 and IO2 of source 206. Source 206 can output power to both power connection 110 and load 301. Second auxiliary load 302 requires a constant voltage lower than that of source 206. Load 302 is coupled to IO ports 5 and 6 of module 108C, which are coupled to ports IO5 and IO2, respectively, of converter 202B. Converter 202B can include switch portion 602 having coupling inductor LCcoupled to port IO5 (FIG.6B). Energy supplied by source 206 can be supplied to load 302 through switch portion 602 of converter 202B. It is assumed that load 302 has an input capacitor (a capacitor can be added to module 108C if not), so switches S1 and S2 can be commutated to regulate the voltage on and current through coupling inductor LCand thus produce a stable constant voltage for load 302. This regulation can step down the voltage of source 206 to the lower magnitude voltage is required by load 302. Module 108C can thus be configured to supply one or more first auxiliary loads in the manner described with reference to load 301, with the one or more first loads coupled to IO ports 3 and 4. Module 108C can also be configured to supply one or more second auxiliary  Docket No. 56420-0020WO1loads in the manner described with reference to load 302. If multiple second auxiliary loads 302 are present, then for each additional load 302 module 108C can be scaled with additional dedicated module output ports (like 5 and 6), an additional dedicated switch portion 602, and an additional converter IO port coupled to the additional portion 602. Energy source 206 can thus supply power for any number of auxiliary loads (e.g., 301 and 302), as well as the corresponding portion of system output power needed by primary load 101. Power flow from source 206 to the various loads can be adjusted as desired. Module 108 can be configured as needed with two or more energy sources 206 (FIG. 3B) and to supply first and / or second auxiliary loads (FIG.3C) through the addition of a switch portion 602 and converter port IO5 for each additional source 206B or second auxiliary load 302. Additional module IO ports (e.g., 3, 4, 5, 6) can be added as needed. Module 108 can also be configured as an interconnection module to exchange energy (e.g., for balancing) between two or more arrays, two or more packs, or two or more systems 100 as described further herein. This interconnection functionality can likewise be combined with multiple source and / or multiple auxiliary load supply capabilities. The control system 102 can perform various functions with respect to the components of modules 108A, 108B, and 108C. These functions can include management of the utilization (amount of use) of each energy source 206, protection of the energy buffer 204 from over-current, over-voltage and high temperature conditions, and control and protection of the converter 202. For example, to manage (e.g., adjust by increasing, decreasing, or maintaining) utilization of each energy source 206, LCD 114 can receive one or more monitored voltages, temperatures, and currents from each energy source 206 (or monitor circuitry). The monitored voltages can be at least one of, preferably all, voltages of each elementary component independent of the other components (e.g., each individual battery cell, HED capacitor, and / or fuel cell) of the source 206, or the voltages of groups of elementary components as a whole (e.g., voltage of the battery array, HED capacitor array, and / or fuel cell array). Similarly the monitored temperatures and currents can be at least one of, preferably all, temperatures and currents of each elementary component independent of the other components of the source 206, or the temperatures and currents of groups of elementary components as a whole, or any combination thereof. The monitored signals can be status information, with which LCD 114 can perform one or more of the following: calculation or determination of a real capacity, actual State of Charge (SOC) and / or State of Health (SOH) of the elementary components or groups of elementary components; set or output a warning  Docket No. 56420-0020WO1or alarm indication based on monitored and / or calculated status information; and / or transmission of the status information to the MCD 112. Each LCD 114 can receive control information (e.g., a modulation index, synchronization signal) from the MCD 112 and use this control information to generate switch signals for converter 202 that manage the utilization of the source 206. To protect energy buffer 204, LCD 114 can receive one or more monitored voltages, temperatures, and currents from energy buffer 204 (or monitor circuitry). The monitored voltages can be at least one of, preferably all, voltages of each elementary component of buffer 204 (e.g., of CEB, CEB1, CEB2, LEB1, LEB2, DEB) independent of the other components, or the voltages of groups of elementary components or buffer 204 as a whole (e.g., between IO1 and IO2 or between IO3 and IO4). Similarly the monitored temperatures and currents can be at least one of, preferably all, temperatures and currents of each elementary component of buffer 204 independent of the other components, or the temperatures and currents of groups of elementary components or of buffer 204 as a whole, or any combination thereof. The monitored signals can be status information, with which LCD 114 can perform one or more of the following: set or output a warning or alarm indication; communicate the status information to MCD 112; or control converter 202 to adjust (increase or decrease) the utilization of source 206 and module 108 as a whole for buffer protection. To control and protect converter 202, LCD 114 can receive the control information from MCD 112, which can be used with a PWM technique in LCD 114 to generate the control signals for each switch (e.g., S1 through S6). In some implementations, the MCD 112 can provide, to each LCD 114, control information that can include either (1) a modulation index (Mi) and a normalized reference signal (Vrn), or (2) a modulated reference signal (Vrnm-N). In the first case (1), the LCD 114 can generate a modulated reference signal Vrnm-N by modulating or scaling the reference signal Vrn using the modulation index Mi. In either case, the LCD 114 can generate a corrected reference signal by applying a reference signal correction factor to the reference signal or the modulated reference signal and use the corrected reference signal to generate the control signals for each switch, as described in more detail below. LCD 114 can receive a current feedback signal from a current sensor of converter 202, which can be used for overcurrent protection together with one or more fault status signals from driver circuits (not shown) of the converter switches, which can carry information about fault statuses (e.g., short circuit or open circuit failure modes) of all switches of converter 202. Based on this data, LCD 114 can make a decision on which  Docket No. 56420-0020WO1combination of switching signals to be applied to manage utilization of module 108, and potentially bypass or disconnect converter 202 (and the entire module 108) from the energy system 100. If controlling a module 108C that supplies a second auxiliary load 302, LCD 114 can receive one or more monitored voltages (e.g., the voltage between IO ports 5 and 6) and one or more monitored currents (e.g., the current in coupling inductor LC, which is a current of load 302) in module 108C. Based on these signals, LCD 114 can adjust the switching cycles (e.g., by adjustment of modulation index or reference waveform) of S1 and S2 to control (and stabilize) the voltage for load 302. Cascaded Energy System Topology Examples Two or more modules 108 can be coupled together in a cascaded array that outputs a voltage signal formed by a superposition of the discrete voltages generated by each module 108 within the array. FIG.7A is a block diagram depicting an example implementation of a topology for the energy system 100 where N modules 108-1, 108-2...108-N are coupled together in series to form a serial array 700. In this and all implementations described herein, N can be any integer greater than one. Array 700 includes a first system IO port SIO1 and a second system IO port SIO2 across which is generated an array output voltage. Array 700 can be used as a DC or single phase AC energy source for DC or AC single-phase loads, which can be connected to SIO1 and SIO2 of array 700. FIG.8A is a plot of voltage versus time depicting an example output signal produced by a single module 108 having a 48 volt energy source. FIG.8B is a plot of voltage versus time depicting an example single phase AC output signal generated by array 700 having six 48V modules 108 coupled in series. The energy system 100 can be arranged in a broad variety of different topologies to meet varying needs of the applications. The energy system 100 can provide multi-phase power (e.g., two-phase, three-phase, four-phase, five-phase, six-phase, etc.) to a load by use of multiple arrays 700, where each array can generate an AC output signal having a different phase angle. FIG.7B is a block diagram depicting the energy system 100 with two arrays 700-PA and 700-PB coupled together. Each array 700 is one-dimensional, formed by a series connection of N modules 108. The two arrays 700-PA and 700-PB can each generate a single-phase AC signal, where the two AC signals have different phase angles PA and PB (e.g., 180 degrees apart). IO port 1 of module 108-1 of each array 700-PA and 700-PB can form or be connected to system IO ports SIO1 and SIO2, respectively, which in turn can  Docket No. 56420-0020WO1serve as a first output of each array that can provide two phase power to a load (not shown). Or alternatively ports SIO1 and SIO2 can be connected to provide single phase power from two parallel arrays. IO port 2 of module 108-N of each array 700- PA and 700- PB can serve as a second output for each array 700- PA and 700- PB on the opposite end of the array from system IO ports SIO1 and SIO2, and can be coupled together at a common node and optionally used for an additional system IO port SIO3 if desired, which can serve as a neutral. This common node can be referred to as a rail, and IO port 2 of modules 108-N of each array 700 can be referred to as being on the rail side of the arrays. FIG.7C is a block diagram depicting the energy system 100 with three arrays 700- PA, 700-PB, and 700-PC coupled together. Each array 700 is one-dimensional, formed by a series connection of N modules 108. The three arrays 700-1 and 700-2 can each generate a single-phase AC signal, where the three AC signals have different phase angles PA, PB, PC (e.g., 120 degrees apart). IO port 1 of module 108-1 of each array 700-PA, 700-PB, and 700- PC can form or be connected to system IO ports SIO1, SIO2, and SIO3, respectively, which in turn can provide three phase power to a load (not shown). IO port 2 of module 108-N of each array 700-PA, 700-PB, and 700-PC can be coupled together at a common node and optionally used for an additional system IO port SIO4 if desired, which can serve as a neutral. The concepts described with reference to the two-phase and three-phase implementations of FIGS.7B and 7C can be extended to systems 100 generating still more phases of power. For example, a non-exhaustive list of additional examples includes: the energy system 100 having four arrays 700, each of which is configured to generate a single phase AC signal having a different phase angle (e.g., 90 degrees apart): the energy system 100 having five arrays 700, each of which is configured to generate a single phase AC signal having a different phase angle (e.g., 72 degrees apart); and the energy system 100 having six arrays 700, each array configured to generate a single phase AC signal having a different phase angle (e.g., 60 degrees apart). The energy system 100 can be configured such that arrays 700 are interconnected at electrical nodes between modules 108 within each array. FIG.7D is a block diagram depicting the energy system 100 with three arrays 700-PA, 700-PB, and 700-PC coupled together in a combined series and delta arrangement. Each array 700 includes a first series connection of M modules 108, where M is two or greater, coupled with a second series connection of N modules 108, where N is two or greater. The delta configuration is formed by the interconnections between arrays, which can be placed in any desired location. In this implementation, IO port 2 of module 108-(M+N) of array 700-PC is coupled with IO port 2  Docket No. 56420-0020WO1of module 108-M and IO port 1 of module 108-(M+1) of array 700-PA, IO port 2 of module 108-(M+N) of array 700-PB is coupled with IO port 2 of module 108-M and IO port 1 of module 108-(M+1) of array 700-PC, and IO port 2 of module 108-(M+N) of array 700-PA is coupled with IO port 2 of module 108-M and IO port 1 of module 108-(M+1) of array 700- PB. FIG.7E is a block diagram depicting the energy system 100 with three arrays 700-PA, 700-PB, and 700-PC coupled together in a combined series and delta arrangement. This implementation is similar to that of FIG.7D except with different cross connections. In this implementation, IO port 2 of module 108-M of array 700-PC is coupled with IO port 1 of module 108-1 of array 700-PA, IO port 2 of module 108-M of array 700-PB is coupled with IO port 1 of module 108-1 of array 700-PC, and IO port 2 of module 108-M of array 700-PA is coupled with IO port 1 of module 108-1 of array 700-PB. The arrangements of FIGS.7D and 7E can be implemented with as little as two modules in each array 700. Combined delta and series configurations enable an effective exchange of energy between all modules 108 of the system (interphase balancing) and phases of power grid or load, and also allows reducing the total number of modules 108 in an array 700 to obtain the desired output voltages. In the implementations described herein, although it is advantageous for the number of modules 108 to be the same in each array 700 within the energy system 100, such is not required and different arrays 700 can have differing numbers of modules 108. Further, each array 700 can have modules 108 that are all of the same configuration (e.g., all modules are 108A, all modules are 108B, all modules are 108C, or others) or different configurations (e.g., one or more modules are 108A, one or more are 108B, and one or more are 108C, or otherwise). As such, the scope of topologies of the energy system 100 covered herein is broad. Control Methodology Examples As mentioned, control of the energy system 100 can be performed according to various methodologies, such as hysteresis or PWM. Several examples of PWM include space vector modulation and sine pulse width modulation, where the switching signals for converter 202 are generated with a phase shifted carrier technique that continuously rotates utilization of each module 108 to equally distribute power among them. FIGS.8C-8F are plots depicting an example implementation of a phase-shifted PWM control methodology that can generate a multilevel output PWM waveform using incrementally shifted two-level waveforms. An X-level PWM waveform can be created by  Docket No. 56420-0020WO1the summation of (X-1) / 2 two-level PWM waveforms. These two-level waveforms can be generated by comparing a reference waveform Vref to carriers incrementally shifted by 360º / (X-1). The carriers are triangular, but the implementations are not limited to such. A nine-level example is shown in FIG.8C (using four modules 108). The carriers are incrementally shifted by 360º / (9-1) = 45º and compared to Vref. The resulting two-level PWM waveforms are shown in FIG.8E. These two-level waveforms may be used as the switching signals for semiconductor switches (e.g., S1 though S6) of converters 202. As an example with reference to FIG.8E, for a one-dimensional array 700 including four modules 108 each with a converter 202, the 0º signal is for control of S3 and the 180º signal for S6 of the first module 108-1, the 45º signal is for S3 and the 225º signal for S6 of the second module 108-2, the 90 signal is for S3 and the 270 signal is for S6 of the third module 108-3, and the 135 signal is for S3 and the 315 signal is for S6 of the fourth module 108-4. The signal for S3 is complementary to S4 and the signal for S5 is complementary to S6 with sufficient dead-time to avoid shoot through of each half-bridge. FIG.8F depicts an example single phase AC waveform produced by superposition (summation) of output voltages from the four modules 108. An alternative is to utilize both a positive and a negative reference signal with the first (N-1) / 2 carriers. A nine-level example is shown in FIG.8D. In this example, the 0º to 135º switching signals (FIG.8E) are generated by comparing +Vref to the 0º to 135º carriers of FIG.8D and the 180º to 315º switching signals are generated by comparing –Vref to the 0º to 135º carriers of FIG.8D. However, the logic of the comparison in the latter case is reversed. Other techniques such as a state machine decoder may also be used to generate gate signals for the switches of converter 202. In multi-phase system implementations, the same carriers can be used for each phase, or the set of carriers can be shifted as a whole for each phase. For example, in a three phase system with a single reference voltage (Vref), each array 700 can use the same number of carriers with the same relative offsets as shown in FIGS.8C and 8D, but the carriers of the second phase are shift by 120 degrees as compared to the carriers of the first phase, and the carriers of the third phase are shifted by 240 degrees as compared to the carriers of the first phase. If a different reference voltage is available for each phase, then the phase information can be carried in the reference voltage and the same carriers can be used for each phase. In many cases the carrier frequencies will be fixed, but in some example implementations, the carrier frequencies can be adjusted, which can help to reduce losses in EV motors under high current conditions.  Docket No. 56420-0020WO1The appropriate switching signals can be provided to each module by control system 102. For example, MCD 112 can provide Vref and the appropriate carrier signals to each LCD 114 depending upon the module or modules 108 that LCD 114 controls, and the LCD 114 can then generate the switching signals. Or all LCDs 114 in an array can be provided with all carrier signals and the LCD can select the appropriate carrier signals. The relative utilizations of each module 108 can adjusted based on status information to perform balancing or of one or more parameters as described herein. Balancing of parameters can involve adjusting utilization to minimize parameter divergence over time as compared to a system where individual module utilization adjustment is not performed. The utilization can be the relative amount of time a module 108 is discharging when the energy system 100 is in a discharge state, or the relative amount of time a module 108 is charging when the energy system 100 is in a charge state. As described herein, modules 108 can be balanced with respect to other modules in an array 700, which can be referred to as intra array or intraphase balancing, and different arrays 700 can be balanced with respect to each other, which can be referred to as interarray or interphase balancing. Arrays 700 of different subsystems can also be balanced with respect to each other. Control system 102 can simultaneously perform any combination of intraphase balancing, interphase balancing, utilization of multiple energy sources within a module, active filtering, and auxiliary load supply. FIG.9A is a block diagram depicting an example implementation of an array controller 900 of control system 102 for a single-phase AC or DC array. Array controller 900 can include a peak detector 902, a divider 904, and an intraphase (or intra array) balance controller 906. Array controller 900 can receive a reference voltage waveform (Vr) and status information about each of the N modules 108 in the array (e.g., state of charge (SOCi), temperature (Ti), capacity (Qi), and voltage (Vi)) as inputs, and generate a normalized reference voltage waveform (Vrn) and modulation indices (Mi) as outputs. Peak detector 902 detects the peak (Vpk) of Vr, which can be specific to the phase that controller 900 is operating with and / or balancing. Divider 904 generates Vrn by dividing Vr by its detected Vpk. Intraphase balance controller 906 uses Vpk along with the status information (e.g., SOCi, Ti, Qi, Vi, etc.) to generate modulation indices Mi for each module 108 within the array 700 being controlled. The modulation indices and Vrn can be used to generate the switching signals for each converter 202. The modulation index can be a number between zero and one (inclusive of zero and one). For a particular module 108, the normalized reference Vrn can be  Docket No. 56420-0020WO1modulated or scaled by Mi, and this modulated reference signal (Vrnm-N ) can be used as Vref (or –Vref) according to the PWM technique described with reference to FIGS.8C-8F, or according to other techniques. In this manner, the modulation index Mi can be used to control the PWM switching signals provided to the converter switching circuitry (e.g., S3-S6 or S1- S6), and thus regulate the operation of each module 108. For example, a module 108 being controlled to maintain normal or full operation may receive an Mi of one, while a module 108 being controlled to less than normal or full operation may receive an Mi less than one, and a module 108 controlled to cease power output may receive an Mi of zero. This operation can be performed in various ways by control system 102, such as by MCD 112 outputting Vrn and Mi to the appropriate LCDs 114 for modulation and switch signal generation, by MCD 112 performing modulation and outputting the modulated Vrnm-N to the appropriate LCDs 114 for switch signal generation, or by MCD 112 performing modulation and switch signal generation and outputting the switch signals to the LCDs or the converters 202 of each module 108 directly. Vrn can be sent continually with Mi sent at regular intervals, such as once for every period of the Vrn, or one per minute, etc. Vrn, or Vrnm-N can be used as Vref (or –Vref), depending on implementation choices. For example, Vrn can be used as Vref (or –Vref) if normalization is performed but modulation using Mi is not performed. Vrnm-N can be used for Vref (or –Vref) if normalization and modulation are both performed. In some implementations, the MCD 112 generates the same value of Vr and Vrn for all modules in an array 700, but the modulation indices Mi can vary between the modules 108 of the array 700. The MCD 112 or LCD 114 can generate Vrnm-N for a module 108 by modulating or scaling Vrn using the modulation index Mi for that module 108. In some implementations, the LCD 114 can generate a corrected reference signal Vref_corr-N by modulating or scaling the reference signal (Vrn or Vrnm-N ) received from the MCD 112 using a reference signal correction factor ref_corr-N, as described in further detail below. In such implementations, Vref_corr-N can be used as Vref (or –Vref). Controller 906 can generate an Mi for each module 108 using any type or combination of types of status information (e.g., SOC, temperature (T), Q, SOH, voltage, current) described herein. For example, when using SOC and T, a module 108 can have a relatively high Mi if SOC is relatively high and temperature is relatively low as compared to other modules 108 in array 700. If either SOC is relatively low or T is relatively high, then that module 108 can have a relatively low Mi, resulting in less utilization than other modules 108 in array 700. Controller 906 can determine Mi such that the sum of module voltages does  Docket No. 56420-0020WO1not exceed Vpk. For example, Vpk can be the sum of the products of the voltage of each module’s source 206 and Mi for that module (e.g., Vpk = M1V1+M2V2+M3V3... +MNVN, etc.). A different combination of modulation indices, and thus respective voltage contributions by the modules, may be used but the total generated voltage should remain the same. Controller 900 can control operation, to the extent it does not prevent achieving the power output requirements of the system at any one time (e.g., such as during maximum acceleration of an EV), such that SOC of the energy source(s) in each module 108 remains balanced or converges to a balanced condition if they are unbalanced, and / or such that temperature of the energy source(s) or other component (e.g., energy buffer) in each module remains balanced or converges to a balanced condition if they are unbalanced. Power flow in and out of the modules can be regulated such that a capacity difference between sources does not cause an SOC deviation. Balancing of SOC and temperature can indirectly cause some balancing of SOH. Voltage and current can be directly balanced if desired, but in many implementations the main goal of the system is to balance SOC and temperature, and balancing of SOC can lead to balance of voltage and current in a highly symmetric systems where modules are of similar capacity and impedance. Since balancing all parameters may not be possible at the same time (e.g., balancing of one parameter may further unbalance another parameter), a combination of balancing any two or more parameters (SOC, T, Q, SOH, V, I) may be applied with priority given to either one depending on the requirements of the application. Priority in balancing can be given to SOC over other parameters (T, Q, SOH, V, I), with exceptions made if one of the other parameters (T, Q, SOH, V, I) reaches a severe unbalanced condition outside a threshold. Balancing between arrays 700 of different phases (or arrays of the same phase, e.g., if parallel arrays are used) can be performed concurrently with intraphase balancing. FIG.9B depicts an example implementation of an Ω-phase (or Ω-array) controller 950 configured for operation in an Ω-phase the energy system 100, having at least Ω arrays 700, where Ω is any integer greater than one. Controller 950 can include one interphase (or interarray) controller 910 and Ω intraphase balance controllers 906-PA ...906-PΩ for phases PA through PΩ, as well as peak detector 902 and divider 904 (FIG.9A) for generating normalized references VrnPA through VrnPΩ from each phase-specific reference VrPA through VrPΩ. Intraphase controllers 906 can generate Mi for each module 108 of each array 700 as described with reference to FIG.9A. Interphase balance controller 910 is configured or programmed to balance aspects of modules 108 across the entire multi-dimensional system, for example,  Docket No. 56420-0020WO1between arrays of different phases. This may be achieved through injecting common mode to the phases (e.g., neutral point shifting) or through the use of interconnection modules (described herein) or through both. Common mode injection involves introducing a phase and amplitude shift to the reference signals VrPA through VrPΩ to generate normalized waveforms VrnPA through VrnPΩ to compensate for unbalance in one or more arrays, and is described further in Int’l. Appl. No. PCT / US20 / 25366 incorporated herein. Controllers 900 and 950 (as well as balance controllers 906 and 910) can be implemented in hardware, software or a combination thereof within control system 102. Controllers 900 and 950 can be implemented within MCD 112, distributed partially or fully among LCDs 114, or may be implemented as discrete controllers independent of MCD 112 and LCDs 114. Interconnection (IC) Module Examples Modules 108 can be connected between the modules of different arrays 700 for the purposes of exchanging energy between the arrays, acting as a source for an auxiliary load, or both. Such modules are referred to herein as interconnection (IC) modules 108IC. IC module 108IC can be implemented in any of the already described module configurations (108A, 108B, 108C) and others to be described herein. IC modules 108IC can include any number of one or more energy sources, an optional energy buffer, switch circuitry for supplying energy to one or more arrays and / or for supplying power to one or more auxiliary loads, control circuitry (e.g., a local control device), and monitor circuitry for collecting status information about the IC module itself or its various loads (e.g., SOC of an energy source, temperature of an energy source or energy buffer, capacity of an energy source, SOH of an energy source, voltage and / or current measurements pertaining to the IC module, voltage and / or current measurements pertaining to the auxiliary load(s), etc.). FIG.10A is a block diagram depicting an example implementation of a the energy system 100 capable of producing Ω-phase power with Ω arrays 700-PA through 700-PΩ, where Ω can be any integer greater than one. In this and other implementations, IC module 108IC can be located on the rail side of arrays 700 such the arrays 700 to which module 108IC are connected (arrays 700-PA through 700-PΩ in this implementation) are electrically connected between module 108IC and outputs (e.g., SIO1 through SIOΩ) to the load. Here, module 108IC has Ω IO ports for connection to IO port 2 of each module 108-N of arrays 700-PA through 700-PΩ. In the configuration depicted here, module 108IC can perform interphase balancing by selectively connecting the one or more energy sources of module  Docket No. 56420-0020WO1108IC to one or more of the arrays 700-PA through 700-PΩ (or to no output, or equally to all outputs, if interphase balancing is not required). The energy system 100 can be controlled by control system 102 (not shown, see FIG.1A). FIG.10B is a schematic diagram depicting an example implementation of module 108IC. In this implementation module 108IC includes an energy source 206 connected with energy buffer 204 that in turn is connected with switch circuitry 603. Switch circuitry 603 can include switch circuitry units 604-PA through 604-PΩ for independently connecting energy source 206 to each of arrays 700-PA through 700-PΩ, respectively. Various switch configurations can be used for each unit 604, which in this implementation is configured as a half-bridge with two semiconductor switches S7 and S8. Each half bridge is controlled by control lines 118-3 from LCD 114. This configuration is similar to module 108A described with reference to FIG.3A. As described with reference to converter 202, switch circuitry 603 can be configured in any arrangement and with any switch types (e.g., MOSFET, IGBT, Silicon, GaN, etc.) suitable for the requirements of the application. Switch circuitry units 604 are coupled between positive and negative terminals of energy source 206 and have an output that is connected to an IO port of module 108IC. Units 604-PA through 604-PΩ can be controlled by control system 102 to selectively couple voltage +VIC or –VIC to the respective module I / O ports 1 through Ω. Control system 102 can control switch circuitry 603 according to any desired control technique, including the PWM and hysteresis techniques mentioned herein. Here, control circuitry 102 is implemented as LCD 114 and MCD 112 (not shown). LCD 114 can receive monitoring data or status information from monitor circuitry of module 108IC. This monitoring data and / or other status information derived from this monitoring data can be output to MCD 112 for use in system control as described herein. LCD 114 can also receive timing information (not shown) for purposes of synchronization of modules 108 of the energy system 100 and one or more carrier signals (not shown), such as the sawtooth signals used in PWM (FIGS.8C-8D). For interphase balancing, proportionally more energy from source 206 can be supplied to any one or more of arrays 700-PA through 700-PΩ that is relatively low on charge as compared to other arrays 700. Supply of this supplemental energy to a particular array 700 allows the energy output of those cascaded modules 108-1 thru 108-N in that array 700 to be reduced relative to the unsupplied phase array(s). For example, in some example implementations applying PWM, LCD 114 can be configured to receive the normalized voltage reference signal (Vrn) (from MCD 112) for each of the one or more arrays 700 that module 108IC is coupled to, e.g., VrnPA through  Docket No. 56420-0020WO1VrnPΩ. LCD 114 can also receive modulation indices MiPA through MiPΩ for the switch units 604-PA through 604-PΩ for each array 700, respectively, from MCD 112. LCD 114 can modulate (e.g., multiply) each respective Vrn with the modulation index for the switch section coupled directly to that array (e.g., VrnA multiplied by MiA) and then utilize a carrier signal to generate the control signal(s) for each switch unit 604. In other implementations, MCD 112 can perform the modulation and output modulated voltage reference waveforms for each unit 604 directly to LCD 114 of module 108IC. In still other implementations, all processing and modulation can occur by a single control entity that can output the control signals directly to each unit 604. This switching can be modulated such that power from energy source 206 is supplied to the array(s) 700 at appropriate intervals and durations. Such methodology can be implemented in various ways. Based on the collected status information for the energy system 100, such as the present capacity (Q) and SOC of each energy source in each array, MCD 112 can determine an aggregate charge for each array 700 (e.g., aggregate charge for an array can be determined as the sum of capacity times SOC for each module of that array). MCD 112 can determine whether a balanced or unbalanced condition exists (e.g., through the use of relative difference thresholds and other metrics described herein) and generate modulation indices MiPA through MiPΩ accordingly for each switch unit 604-PA through 604-PΩ. During balanced operation, Mi for each switch unit 604 can be set at a value that causes the same or similar amount of net energy over time to be supplied by energy source 206 and / or energy buffer 204 to each array 700. For example, Mi for each switch unit 604 could be the same or similar, and can be set at a level or value that causes the module 108IC to perform a net or time average discharge of energy to the one or more arrays 700-PA through 700-PΩ during balanced operation, so as to drain module 108IC at the same rate as other modules 108 in the energy system 100. In some implementations, Mi for each unit 604 can be set at a level or value that does not cause a net or time average discharge of energy during balanced operation (causes a net energy discharge of zero). This can be useful if module 108IC has a lower aggregate charge than other modules in the system. When an unbalanced condition occurs between arrays 700, then the modulation indices of the energy system 100 can be adjusted to cause convergence towards a balanced condition or to minimize further divergence. For example, control system 102 can cause module 108IC to discharge more to the array 700 with low charge than the others, and can also cause modules 108-1 through 108-N of that low array 700 to discharge relatively less  Docket No. 56420-0020WO1(e.g., on a time average basis). The relative net energy contributed by module 108IC increases as compared to the modules 108-1 through 108-N of the array 700 being assisted, and also as compared to the amount of net energy module 108IC contributes to the other arrays. This can be accomplished by increasing Mi for the switch unit 604 supplying that low array 700, and by decreasing the modulation indices of modules 108-1 through 108-N of the low array 700 in a manner that maintains Vout for that low array at the appropriate or required levels, and maintaining the modulation indices for other switch units 604 supplying the other higher arrays relatively unchanged (or decreasing them). The configuration of module 108IC in FIGS.10A-10B can be used alone to provide interphase or interarray balancing for a single system, or can be used in combination with one or more other modules 108IC each having an energy source and one or more switch portions 604 coupled to one or more arrays. For example, a module 108IC with Ω switch portions 604 coupled with Ω different arrays 700 can be combined with a second module 108IC having one switch portion 604 coupled with one array 700 such that the two modules combine to service a the energy system 100 having Ω+1 arrays 700. Any number of modules 108IC can be combined in this fashion, each coupled with one or more arrays 700 of the energy system 100. Furthermore, IC modules can be configured to exchange energy between two or more subsystems of the energy system 100. FIG.10C is a block diagram depicting an example implementation of the energy system 100 with a first subsystem 1000-1 and a second subsystem 1000-2 interconnected by IC modules. Specifically, subsystem 1000-1 is configured to supply three-phase power, PA, PB, and PC, to a first load (not shown) by way of system I / O ports SIO1, SIO2, and SIO3, while subsystem 1000-2 is configured to supply three-phase power PD, PE, and PF to a second load (not shown) by way of system I / O ports SIO4, SIO5, and SIO06, respectively. For example, subsystems 1000-1 and 1000-2 can be configured as different packs supplying power for different motors of an EV or as different racks supplying power for different microgrids. In this implementation each module 108IC is coupled with a first array of subsystem 1000-1 (via IO port 1) and a first array of subsystem 1000-2 (via IO port 2), and each module 108IC can be electrically connected with each other module 108IC by way of I / O ports 3 and 4, which are coupled with the energy source 206 of each module 108IC as described with reference to module 108C of FIG.3C. This connection places sources 206 of modules 108IC- 1, 108IC-2, and 108IC-3 in parallel, and thus the energy stored and supplied by modules 108IC is pooled together by this parallel arrangement. Other arrangements such as serious  Docket No. 56420-0020WO1connections can also be used. Modules 108IC are housed within a common enclosure of subsystem 1000-1, however the interconnection modules can be external to the common enclosure and physically located as independent entities between the common enclosures of both subsystems 1000. Each module 108IC has a switch unit 604-1 coupled with IO port 1 and a switch unit 604-2 coupled with I / O port 2, as described with reference to FIG.10B. Thus, for balancing between subsystems 1000 (e.g., inter-pack or inter-rack balancing), a particular module 108IC can supply relatively more energy to either or both of the two arrays to which it is connected (e.g., module 108IC-1 can supply to array 700-PA and / or array 700-PD). The control circuitry can monitor relative parameters (e.g., SOC and temperature) of the arrays of the different subsystems and adjust the energy output of the IC modules to compensate for imbalances between arrays or phases of different subsystems in the same manner described herein as compensating for imbalances between two arrays of the same rack or pack. Because all three modules 108IC are in parallel, energy can be efficiently exchanged between any and all arrays of the energy system 100. In this implementation, each module 108IC supplies two arrays 700, but other configurations can be used including a single IC module for all arrays of the energy system 100 and a configuration with one dedicated IC module for each array 700 (e.g., six IC modules for six arrays, where each IC module has one switch unit 604). In all cases with multiple IC modules, the energy sources can be coupled together in parallel so as to share energy as described herein. In systems with IC modules between phases, interphase balancing can also be performed by neutral point shifting (or common mode injection) as described above. Such a combination allows for more robust and flexible balancing under a wider range of operating conditions. The energy system 100 can determine the appropriate circumstances under which to perform interphase balancing with neutral point shifting alone, interphase energy injection alone, or a combination of both simultaneously. IC modules can also be configured to supply power to one or more auxiliary loads 301 (at the same voltage as source 206) and / or one or more auxiliary loads 302 (at voltages stepped down from source 206). FIG.10D is a block diagram depicting an example implementation of a three-phase the energy system 100 A with two modules 108IC connected to perform interphase balancing and to supply auxiliary loads 301 and 302. FIG.10E is a schematic diagram depicting this example implementation of the energy system 100 with emphasis on modules 108IC-1 ad 108IC-2. Here, control circuitry 102 is again implemented as LCD 114 and MCD 112 (not shown). The LCDs 114 can receive monitoring data from  Docket No. 56420-0020WO1modules 108IC (e.g., SOC of ES1, temperature of ES1, Q of ES1, voltage of auxiliary loads 301 and 302, etc.) and can output this and / or other monitoring data to MCD 112 for use in system control as described herein. Each module 108IC can include a switch portion 602A (or 602B described with reference to FIG.6C) for each load 302 being supplied by that module, and each switch portion 602 can be controlled to maintain the requisite voltage level for load 302 by LCD 114 either independently or based on control input from MCD 112. In this implementation, each module 108IC includes a switch portion 602A connected together to supply the one load 302, although such is not required. FIG.10F is a block diagram depicting another example implementation of a three- phase system configured to supply power to one or more auxiliary loads 301 and 302 with modules 108IC-1, 108IC-2, and 108IC-3. In this implementation, modules 108IC-1 and 108IC-2 are configured in the same manner as described with reference to FIGS.10D-10E. Module 108IC-3 is configured in a purely auxiliary role and does not actively inject voltage or current into any array 700 of the energy system 100. In this implementation, module 108IC-3 can be configured like module 108C of FIG.3B, having a converter 202B,C (FIGS. 6B-6C) with one or more auxiliary switch portions 602A, but omitting switch portion 601. As such, the one or more energy sources 206 of module 108IC-3 are interconnected in parallel with those of modules 108IC-1 and 108IC-2, and thus this implementation of the energy system 100 is configured with additional energy for supplying auxiliary loads 301 and 302, and for maintaining charge on the sources 206A of modules 108IC-1 and 108IC-2 through the parallel connection with the source 206 of module 108IC-3. The energy source 206 of each IC module can be at the same voltage and capacity as the sources 206 of the other modules 108-1 through 108-N of the system, although such is not required. For example, a relatively higher capacity can be desirable in an implementation where one module 108IC applies energy to multiple arrays 700 (FIG.10A) to allow the IC module to discharge at the same rate as the modules of the phase arrays themselves. If the module 108IC is also supplying an auxiliary load, then an even greater capacity may be desired so as to permit the IC module to both supply the auxiliary load and discharge at relatively the same rate as the other modules. Second Life Energy Source Examples Energy sources 206 described herein can be used in systems 100 described herein in both first life and second life applications. A first life of a source 206 is an original application in which source 206 is used. For example, the first life application is the first  Docket No. 56420-0020WO1implementation in which sources 206 are put to use by the first customer of sources 206 after their original manufacture (and not refurbishment). The user of sources 206 in their first life will typically have received sources 206 from the manufacturer, distributor, or original equipment manufacturer (OEM). Batteries 206 used in a first life application will typically have the same electrochemistry (e.g., will have the same variant of lithium ion electrochemistry (e.g., LFP, NMC)) and will have the same nominal voltage and will have a capacity variation across the pack or system that is minimal (e.g., 5% or less). Use of an energy storage system with batteries 206 in their first life application will result in batteries 206 having a longer lifespan in that first life application, and upon removal from that first life application, the batteries 206 will be more similar in terms of capacity degradation than batteries from a first life application not using the energy storage system. As used herein, a “second life” application is any application or implementation after the first life application (e.g., a second implementation, third implementation, fourth implementation, etc.) of source 206. A second life energy source refers to any energy source (e.g., battery or HED capacitor) implemented in that source’s second life application. An example of a first life application for batteries 206 is within an energy storage system for an EV. Then, at the end of that life (e.g., after 100,000 miles of driving, or after degradation of the batteries within that battery pack by a threshold amount), the batteries 206 can be removed from the battery pack, optionally subjected to refurbishing and testing, and then implemented in a second life application that can be, e.g., used within a stationary energy storage system (e.g., residential, commercial, or industrial energy buffering, EV charging station energy buffering, renewable source (e.g., wind, solar, hydroelectric), energy buffering, and the like) or another mobile energy storage system (e.g., battery pack for an electric car, bus, train, or truck). Similarly, the first life application can be a first stationary application and the second life application can be a stationary or mobile application. For the second life application, sources 206 can be selected and / or utilized by system 100 to minimize (or at least reduce) any differences in initial capacity and nominal voltage. For example, sources 206 having a capacity difference of 5% or more can be included within system 100 and operated to provide energy for a load. In another example, an operator or automated system can select sources 206 for system 100 that have a capacity difference within a threshold amount, e.g., to reduce the initial capacity differences between sources of system 206. If modules 108 are compatible with both the first and second life application (e.g., with or without reconfiguration), modules 108 can be selected for the second life application based on the capacity difference of sources 206 of modules 108.  Docket No. 56420-0020WO1System 100 can adjust utilization of each source 206 individually such that sources 206 within system 100 or packs of system 100 are relatively balanced in terms of SOC or total charge (SOC times capacity) as the pack or system 100 is discharged, even though the sources 206 in system 100 can have widely varying capacities. Similarly, system 100 can maintain balance as the pack or system 100 is charged. Sources 206 can vary not only in terms of capacity but also in nominal voltage, power rating, electrochemical type (e.g., a combination of LFP and NMC batteries) and the like. Thus, system 100 can be used such that all modules 206 within system 100 or each pack of system 100 are second life energy sources (or such that a combination of first life and second life energy sources are used), having various combinations of different characteristics. In one example, system 100 can include second life energy sources 206 (and optionally one or more first life energy sources 206) having energy capacity variations of 2% or more, 5% or more, 10% or more, 15% or more, 20% or more, or 25% or more, 30% or more, 5-30%, 10-30%, and / or 20-30%. In another example, system 100 can include second energy life sources 206 (and optionally one or more first life energy sources 206) having energy capacity per mass density variations of 2% or more, 5% or more, 10% or more, 15% or more, 20% or more, or 25% or more, 30% or more, 5-30%, 10-30%, and / or 20-30%. In another example, system 100 can include second life energy sources 206 (and optionally one or more first life energy sources 206) having peak power per mass density variations of 2% or more, 5% or more, 10% or more, 15% or more, 20% or more, or 25% or more, 30% or more, 5-30%, 10-30%, and / or 20-30%. In another example, system 100 can include second life energy sources 206 (and optionally one or more first life energy sources 206) having nominal voltage variations of 2% or more, 5% or more, 10% or more, 15% or more, 20% or more, or 25% or more, 30% or more, 5-30%, 10-30%, and / or 20-30%. In another example, system 100 can include second life energy sources 206 (and optionally one or more first life energy sources 206) having operating voltage range variations of 2% or more, 5% or more, 10% or more, 15% or more, 20% or more, or 25% or more, 30% or more, 5-30%, 10-30%, and / or 20-30%. In another example, system 100 can include second life energy sources 206 (and optionally one or more first life energy sources 206) having maximum specified current rise time variations of 2% or more, 5% or more, 10% or more, 15% or more, 20% or more, or 25% or more, 30% or more, 5-30%, 10-30%, and / or 20-30%.  Docket No. 56420-0020WO1In another example, system 100 can include second life energy sources 206 (and optionally one or more first life energy sources 206) having specified peak current variations of 2% or more, 5% or more, 10% or more, 15% or more, 20% or more, or 25% or more, 30% or more, 5-30%, 10-30%, and / or 20-30%. A variation of X% (e.g., 5% or more, or 5 to 30%) can be met by a variation between the module 108 having the highest value for that parameter and the module 108 having the lowest value for that parameter within system 100. For example, a variation of 5% or more in capacity can be met by a system 100 where the module 108 with the lowest capacity source 206 has a capacity that is 95% or less than that of the module 108 with the highest capacity source 206. For each and every embodiment and parameter disclosed herein, the time at which the system 100 having one or more second life sources satisfies the X% variation condition in that parameter can be at installation of the system 100, at commissioning of the system 100, after replacement of one source 206 with another source 206, after operation of system 100 for 10 hours or more, after operation of system 100 for 100 hours or more, after operation of system 100 for 1000 hours or more, and / or after operation of system 100 for 10,000 hours or more. For example, a variation of capacity of 5% or more can occur after system 100 is operated for 1000 hours, even though the variation in capacity was not present at the time of commissioning. This reflects the capability of the embodiments of system 100 to continue to operate with and account for capacity differences between sources 206 that grow over time of operation. In another example, system 100 can include second life energy sources 206 (and optionally one or more first life energy sources 206) having variations of electrochemical type (e.g., lithium ion batteries with non-lithium ion batteries, or different lithium ion batteries (e.g., any combination of NMC, LFP, LTO, or other lithium ion battery types). System 100 can include second life energy sources 206 (and optionally one or more first life energy sources 206) having any combination of the characteristics provides in the preceding examples. Converter Safety FIG.11A is a block diagram depicting an example implementation of grid-connected system 1100 in which an energy system 100 is connected to a load 101 and a grid 1130. As described herein, the energy system 100 can include an MCD 112 and modules 108 that can be arranged in one or more arrays 700. Any of the implementations of the energy system 100 described herein can be used in grid-connected system 1100. For example, energy system 100  Docket No. 56420-0020WO1can include one or more arrays 700 of modules 108 and can be connected to a load 101 and / or auxiliary loads 301 or 302, as shown in FIGS.10D-F. Load 101, as shown in FIG. 11A, may be equivalent to any load 101 described herein and / or auxiliary loads 301 or 302, as shown in FIGS.10D-F, . The energy system 100 is connected to load 101 and grid 1130 using circuit breakers 1115. Though shown to be external to the energy system 100, circuit breakers, which can be similar to the circuit breakers 1115, can be used at one or more appropriate locations within the energy system 100, e.g., to protect components of the energy system 100. For example, a circuit breaker can be arranged between the modules 108 and the loads 301 or 302 to isolate these components from each other in the event of an error or other condition, e.g., an overcurrent condition. The energy system 100 is configured to provide power to load 101 and / or to grid 1130. The energy system 100 can also receive power from grid 1130. In this example, the energy system 100 and load 101 can be referred to as a micro-grid that is connected to grid 1130. Grid 1130 can be a utility-operated power grid that also provides power to the micro- grid load 101. The energy system 100 can be configured to operate in multiple modes. One example mode is grid-tied mode, which can also be referred to as grid-following mode or grid- connected mode. When energy system 100 is connected to grid 1130 and grid 1130 is operating normally, e.g., without an error or other condition causing the energy system 100 to disconnect from grid 1130, the energy system 100 can operate in the grid-tied mode in which the energy system 100 follows the voltage, frequency, and phase of grid 1130 while regulating the amount of current provided to load 101. In other words, the energy system 100 can provide, to load 101, AC power (e.g., single-phase AC signal or multi-phase AC signals) having a regulated current at the same voltage, frequency, and phase as the one or more AC signals provided by grid 1130. Another example mode is stand-alone mode, which can also be referred to as an island mode or grid-forming mode. When the energy system 100 detects an error or other condition for which the energy system 100 is configured to disconnect from grid 1130, e.g., an island or islanding condition, the energy system 100 can disconnect from grid 1130 and operate in stand-alone mode. An example of an islanding condition is a blackout or other short term or long term loss of power from grid 1130. During an islanding condition and until disconnected from grid 1130, the energy system 100 may still provide power to grid 1130, which is unsafe. The energy system 100 can disconnect from grid 1130 and continue  Docket No. 56420-0020WO1providing power to load 101 in stand-alone mode. In stand-alone mode, the energy system 100 can act as a voltage controller to regulate the voltage provided to load 101. The energy system 100 can regulate the voltage provided to load 101 such that the voltage, frequency, and phase of the AC power provided to load 101 matches the last known voltage, frequency, and phase of grid 1130 before the energy system 100 disconnected from grid 1130. The energy system 100 can also be configured to operate in other modes. For example, the energy system 100 can be configured to operate in a grid-tied rectifier mode or a grid-tied charger / discharger mode. Grid-tied rectifier mode is a mode in which the energy system 100 is connected to grid 1130 and modules 108 of the energy system 100 regulate a DC bus voltage to provide power to a DC load 101. Grid-tied charger / discharger mode is a mode in which the energy system 100 is connected to grid 1130 and modules 108 of the energy system 100 are controlled to regulate a charging or discharging current to charge or discharge respective energy sources 206 of the modules 108. In some implementations, the energy system 100 can be configured to provide power to a load 101 as a microgrid. For example, some microgrid configurations support a capability where multiple energy storage systems 100 can collaborate to share the load 101 in the microgrid. FIG.11B is an electrical equivalence diagram depicting the example implementation of the grid-connected system 1100 in which the energy system 100 is connected to the load 101 and the grid 1130. The energy system 100 includes an output filter 1112 configured to filter the voltage output generated by modules 108 and provided by the energy system 100 to the load 101. The filtered output voltage is connected to load 101 and grid 1130 at nodes 1113-1 and 1113-2. Nodes, including nodes 1113-1 and 1113-2 can be accessible for measuring electrical values, such as voltage and current, by terminals. The output filter 1112 can be a low-pass filter f with inductor Lf in series with capacitor Cf, and optional ohmic impedance Rf. The inductive impedance of inductor Lf increases with frequency. Thus, the current iLf is low-pass filtered by the inductor Lf. The load 101 can be coupled across the capacitor Cf of the filter. The capacitive impedance of the capacitor Cf decreases with increasing frequencies. Thus, the capacitor Cf further acts as a low-pass filter for remaining high frequency components or transients on the filtered signal. The output of the filter is output current iLf. Filtering is performed on the output signal to reduce noise, such as switching noise. Filtering can also be used in some implementations to reduce or further reduce the affects of harmonic distortions. The current iLf can be measured at the output of the filter 1112 (e.g., at node 1113-1). Because the current iLf represents the output of all modules 108 of the system 100, current  Docket No. 56420-0020WO1iLf includes all phases of current from the modules (e.g., one phase for a single-phase energy system, two phases for a split-phase energy system, or three phases for a three phase energy system). Each phase x of the current iLf can be sensed via a unique channel, e.g., one channel for each phase of the current. The sensor channels and sensors, as well as other processing paths for overcurrent prediction, are described in further detail below. Breakers 1115 can switch between a closed state that permits current flow and an open state that blocks current flow. Breakers 1115 include a main breaker 1115-1 configured to connect and disconnect the energy system 100 to and from both load 101 and grid 1130 depending on the states of breakers 1115-2 and 1115-3. Breaker 1115-2 is configured to connect and disconnect load 101 from the energy system 100 and grid 1130, depending on the states of breakers 1115-1 and 11115-3. Breaker 1115-3 is configured to connect and disconnect grid 1130 to the energy system 100 and load 101, depending on the states of breakers 1115-1 and 11115-2. MCD 112 of the energy system 100 can be communicatively coupled to breakers 1115 to control operation of breakers 1115. MCD 112 can issue a control signal that causes breakers 1115 to selectively open and close, in any combination, depending on the mode of operation of the energy system 100 and / or the status of the energy system 100, load 101, or grid 1130. For example, when the energy system 100 detects an islanding condition, the MCD 112 can open breaker 1115-3 to disconnect the energy system 100 and load 101 from grid 1130. The MCD 112 can also transition to the stand-alone mode of operation in response to detecting the islanding condition. In some implementations, the MCD 112 includes a state machine, e.g., state machine 1208 described with reference to FIGS.12A-12C, to manage the states or modes of operation of the system 100. In another example, the MCD 112 of the energy system 100 can control each of the breakers 1115 independently. The MCD 112 can cause one or more of the breakers 1115 to open or close, depending on results of overcurrent prediction, described in more detail below. When an amount of electrical current is predicted to exceed a threshold, the MCD 112 can cause one or more of the breakers 1115-1 through 115-3 to open. Doing so can protect the load 101, components of energy system 100, and / or the breakers themselves. As described elsewhere herein, the MCD 112 can initiate other correction actions in response to predicting that an electrical current will exceed a threshold. Load 101 has an impedance that can be represented by a resistor, capacitor, and / or inductor depending on the type(s) of load(s) connected to the energy system 100. Similarly, grid 1130 has an impedance that can be represented by a resistor and inductor. The  Docket No. 56420-0020WO1impedance of grid 1130 can vary based on the quality of grid 1130 and the current condition of grid 1130, e.g., whether power is present on grid 1130. In implementations, a grid-connected energy system, including energy system 100 of FIG.11B, can receive current from the grid to charge energy source 206. Overcurrent Protection Safe operation of power converters, including grid support utility interactive inverters, can involve ceasing operation of the converter during an overcurrent event, e.g., from a short circuit, overload, ground fault, or other reason. Inverter protection can include comparing the measured instantaneous current with a threshold and taking corrective action when the measured instantaneous current meets or exceeds the threshold. However, the circuit network can introduce delays, either through circuit-specific delays or bandwidth limitations (e.g., bandwidth limited CAN network communications). Furthermore, in some cases, e.g., with digital control systems, the analog-to-digital converter (ADC), digital-to-analog converter (DAC), control system, communications protocols, and / or other components might have impose some additional delays. As a result, the actual current may overshoot the threshold significantly before the MCD 112 (or in some implementations, one or more of the LCDs 114) detects the overcurrent event and reacts accordingly. This specification describes circuits and techniques for predicting an electrical current at a future time, e.g., a number of time steps into the future, and using the predicted electrical current to predict whether an overcurrent event will occur absent corrective actions. These predictions are referred to herein as overcurrent prediction. A prediction that an overcurrent event will occur, e.g., if a corrective actions is not taken, is referred to as a predicted overcurrent event. When such a prediction occurs, the system 100 can be considered to be in a predicted overcurrent event state, e.g., rather than a normal operation state. As used herein, predicting an electrical current refers to predicting an amount of electrical current flowing through a node or terminal. The overcurrent prediction can involve measuring an electrical current (e.g., each phase of the electrical current), predicting a future current level using the measurement, and predicting whether an overcurrent event will occur by comparing the predicted current with an overcurrent threshold. The electrical current can be measured at different points in the energy system 100, including but not limited to the output of a module 108, the output of an array 700, the output of multiple arrays, or the output of the energy system 100. The predicted electrical current can be compared to an overcurrent threshold to predict whether an  Docket No. 56420-0020WO1overcurrent event is imminent. The overcurrent threshold can be a current amplitude value above which current can damage system components. If the predicted electrical current exceeds the overcurrent threshold, a predicted overcurrent event state can be set, and the energy system 100 can perform one or more corrective actions. The corrective actions can include, for example, ceasing operation of one or more modules 108 in the system 100, causing one or more modules 108 to operate in a current limiting mode in which the modules 108 output current at or below a current limiting threshold, and / or tripping one or more breakers. Thus, upon detection of a predicted overcurrent event, protection for components of system 100 can be enabled to prevent runaway currents from damaging the components of the system 100 or components coupled to the system 100. By monitoring the current through each module, the MCD 112 can control the operational state of each module through the LCD 114. If lower granularity is preferred, the MCD 112 can control the operational state of all modules connected to an LCD based on overcurrent predicted for one or more modules for that LCD. Or, the MCD 112 can simply shut down all LCDs if any overcurrent state is predicted. A prediction horizon is an amount of time in the future for which the current will be predicted. For example, the prediction horizon can be expressed as a number of time steps based on a processing circuitry clock rate. The prediction horizon can be set by an input as a number of time steps, where a time step is associated with a unit of time for the processing circuitry clock rate, where time step = time (second) * clock rate (Hz). For example, with a horizon of 500 time steps, the current can be predicted approximately 100 µs into the future for a 5 MHz clock. As used herein, the symbol “*” represents a multiplication or scaling operation. Then, overcurrent prediction can be performed on the basis of the predicted electrical current (instead of the measured current) compared to overcurrent thresholds. If the predicted electrical current meets or exceeds the overcurrent threshold, an overcurrent event can be determined to be imminent. The value of the overcurrent threshold can also be user- defined in some implementations and such values can be based on the results of tests performed on system 100. FIG.12A is a block diagram of an example implementation of an energy system 100 that includes electrical components for controlling modules 108 based on overcurrent prediction. In the illustrated example, the MCD 112 performs overcurrent prediction based on one or more phases of a current Iact 1212 (actual current level) at node 1201. The MCD 112 (or an LCD 114) can perform the same or similar operations based on current measurements for any node of the system 100 or nodes external to the system 100 unless otherwise stated or  Docket No. 56420-0020WO1implausible. Examples of implementations in which the LCD 114 performs overcurrent prediction are illustrated in FIGS.12B and 12C and described below. However, an LCD 114 can perform the same or similar operations as the MCD 112 described with reference to FIG. 12A. In one example, the MCD 112 can perform overcurrent predictions based on the output current iLf. In this example, the current Iact 1212 is the output current iLf and the node 1201 is the node 1113-1 (FIG.11B). As described above, the energy system 100 can be a single-phase energy system, a split-phase energy system, a three-phase energy system, or other multi-phase energy system. A fault can occur that affects one or more phases x of the output current iLf. Thus, the MCD 112 can perform overcurrent prediction for each phase x of the output current iLf. Iact 1212 therefore can represent a single phase of the total output current of the energy system 100. Iact 1212 can also represent the output current of a module or a plurality of modules. In another example, the MCD 112 can perform the overcurrent prediction operations based on current measurements taken at, or along a conductor coupled to, IO port 1 or IO port 2 of a module 108 (FIGS.7A-7C). The MCD 112 can perform overcurrent prediction operations for each of one or more modules 112 for which the current measurements are taken at the IO port. In this example, the node 1201 represents the IO port at which the current measurements are taken. In another example, the MCD 112 can perform overcurrent prediction operations based on current measurements taken at, or along a conductor coupled to, a system IO port of an array 700, e.g., SIO1, SIO2, or SIO3 of arrays 700-PA – 700-PC. In this example, the MCD 112 can perform overcurrent prediction operations for each of one or more arrays 700 for which the current measurements are taken at the system IO port. In a multi-phase embodiment, the MCD 112 can perform overcurrent prediction operations for each phase using current measurements taken at the system IO port of the array 700 for each phase and / or at the node 1113-1 that couples the output to external components, e.g., to a load 101, 301, 302. In these examples, the node 1201 represents the system IO port of the array 700. In another example, the MCD 112 can perform overcurrent prediction operations based on current measurements taken at, or along a conductor coupled to, any of IO ports 1-6 of an interconnection module 108IC (FIGS.10D-10F) and the node 1201 represents either of these IO ports. In this example, the MCD 112 can perform overcurrent prediction operations for each of one or more interconnection modules 108IC and their respective auxiliary loads 301, 302.  Docket No. 56420-0020WO1The MCD 112 (or LCD 114) can perform overcurrent prediction operations for any one or any combination of these nodes at which current measurements can be taken. The overcurrent event threshold can vary based on the node at which the current measurement is taken. For example, the overcurrent event threshold for the output current iLf may differ from the overcurrent event threshold for a module 108. As described in more detail below, the corrective actions taken in response to predicting an overcurrent event can vary based on the current and / or node at which the current is measured. Such corrective actions can include implementing a current limiting operation (e.g., by entering a current limiting mode), ceasing operation of one or more affected modules 108, ceasing operation of all modules 108 of the system 100, and / or tripping breaker(s). The MCD 112 includes processing circuitry 120, as described above with reference to FIG.1B. As described in more detail below, the processing circuitry 120 can include can include one or more processors, microprocessors, controllers, and / or microcontrollers. In some implementations, the processing circuitry 120 includes an FPGA. In either implementation, the processing circuitry 120 can include circuit elements and / or software components that are configured to predict electrical current at a future time and use the predicted current to predict whether an overcurrent event will occur absent corrective action. For example, processing circuitry 120 can include overcurrent prediction circuitry 1300 of FIG.13. In some implementations, the processing circuitry 120 can implement prediction circuitry in software, which can perform the same or similar operations of components of the overcurrent prediction circuitry 1300, or different operations. The overcurrent prediction circuitry 1300 represents an optional way of performing the overcurrent prediction operations. The energy system 100 can include a sensor 1220 for measuring current Iact 1212 at node 1201. The sensor 1220 can include one or more circuit elements that can sense current flowing through the node 1201. For example, the current sensor 1220 can include an open loop or closed loop Hall effect sensor that can sense current in a non-contact manner. The current sensor 1220 can include other types of current sensor technology, e.g., an in-series ammeter, shunt resistor, and / or operational amplifier. The current sensor 1220 can also include circuitry and / or software to amplify the signal Isensed 1214 representing the sensed current. In some implementations, e.g., in multi-phase energy systems, the energy system 100 includes an individual sensor 1220 for each phase x of a multi-phase signal, e.g., of output  Docket No. 56420-0020WO1current iLf. For example, the current Iact 1212 of a phase x can be measured by an individual current sensor 1220 coupled to the node 1201. In some implementations, a unique sensor 1220 for each phase x of the current Iact 1212 can be coupled to the node 1201 or to a conductor that passes through the node 1201 to measure the amount of current flowing through the node 1201 for that phase x. In some implementations, a single sensor 1220 can include phase discrimination circuitry to isolate the current of a particular phase x from the current Iact. In either implementation, the sensor(s) 1220 can output measurement Isensed 1214 of the current Iact 1212 for each phase x on a corresponding communication path or link 1232 to a corresponding input, e.g., corresponding input channel, of the MCD 112. The MCD 112 can include optional signal conditioning components for conditioning the measured current signal(s) received from the sensor(s) 1220. In the illustrated example, the MCD 112 includes an analog-to-digital converter (ADC) 1202 and a digital-to-analog converter (DAC) 1204 for conditioning the measured current signal(s) Isensed 1214 before representative signals are provided to the processing circuitry 120. The MCD 112 can include other signal conditioning components in addition to, or in place, of the ADC 1202 and the DAC 1204. The ADC 1202 can include a separate input channel 1232 for each phase x of the measured current signal Isensed 1214. Each input channel can communicate one phase of the measured current signal Isensed. The ADC 1202 can perform ADC operations on each phase x of the measured current signal Isensed 1214 to convert an analog representation of the current to a digital representation. The ADC 1202 can output a digital representation of the measured current signal Isensed 1214, which is referred to as Iadc 1216. The ADC 1202 can include separate outputs coupled to a corresponding channel 1234 to output the digital representation of the measured current signal Isensed 1214 for each phase x. In some implementations, the digital representation Iadc 1216 can undergo scaling using scaling circuitry and / or logic to map the digital values onto approximations of the actual current values. For example, the digital representation Iadc 1216 can be scaled and / or offset to match the actual value of the current. This scaling can be done, for example, so that the values used for overcurrent prediction can be compared to overcurrent thresholds that represent real-world current values in amperes. As an optional example implementation choice, the scaling can be performed using a digital-to-analog converter (DAC) 1204. Each of the channels 1234 from the ADC 1202 can be coupled to a corresponding input of the digital-to-analog converter (DAC) 1204. The DAC 1204 can be used to correlate or map a digital value representing the current Iact for each  Docket No. 56420-0020WO1phase x with a real-world value of the current Iact, which is represented by Idac 1218. This process is performed so that the overcurrent prediction process is performed on sampled values that mimic the current Iact. The DAC 1204 outputs the sampled values for each phase x of the current Idac 1218 to the processing circuitry 120 on a corresponding channel 1236. The processing circuitry 120 can receive the sampled values of each phase x of the current Idac 1218 at a corresponding input through a corresponding channel 1236. The processing circuitry 120 can include hardware, software, or a combination of hardware and software configured to perform overcurrent prediction operations and to control the modules 108 of the system 100 based on the overcurrent prediction operations. In some implementations, the processing circuitry 120 can include software programing to predict a future current level of the current Iact and to determine whether the predicted future value of the current exceeds an overcurrent threshold. In some implementations, the processing circuitry 120 can include overcurrent prediction circuitry (e.g., overcurrent prediction circuitry 1300 of FIG.13) that can perform current prediction to predict future values of electrical current and to predict overcurrent events based on the predicted current. The processing circuitry 120 can include separate overcurrent prediction circuitry for each phase x of multi-phase signal. As described above, the measured current signal Isensed 1214 for each phase x can be conditioned prior to the overcurrent prediction operations. Each processing stage, e.g., amplification at the sensor or elsewhere, analog to digital conversion, gains and offsets, digital to analog conversions, can impose some delay on the current measurement reaching the processing circuitry 120 where overcurrent prediction is performed. The various circuits and / or software components used for processing the measured current signal Isensed 1214 can cause delays between the time the current is measured and the time at which the measured current is compared to an overcurrent threshold. In the illustrated example, the sensor 1220, the ADC 1202, the DAC 1204, and the various communication paths between these components can each impose some delay. Put simply, by the time this comparison is performed, the current Iact 1212 will have changed from the value represented by Idac 1218. Thus, an overcurrent event can occur before it is detected if the overcurrent detection is based on the measured current rather than the predicted current. Therefore, the overcurrent prediction circuitry 1300 includes circuitry to estimate a future value of the current, and uses the estimated future value to predict overcurrent events before they occur. The processing circuitry 120 can include separate overcurrent prediction circuitry for each phase x of the current Iact 1212. By performing separate overcurrent prediction for each  Docket No. 56420-0020WO1phase x, each component of the current Iact 1212 can be monitored to predict overcurrent events for those components. If at least one phase x of the current Iact 1212 is predicted to exceed an overcurrent event threshold, the MCD 112 can take some corrective action in response. If the overcurrent prediction is being performed for a single module 108, the corrective action can include ceasing operation of the module 108, limiting the amount of current input to or output by the module 108, and / or tripping a breaker that isolates the module 108 from other components. If the overcurrent prediction is being performed for an array 700 of modules 108, the corrective action can include ceasing operation of the modules 108 in the array 700, limiting the amount of current input to or output by each module 108 of the array 700, and / or tripping a breaker that isolates the array 700 from other components. If the overcurrent prediction is being performed for a system 100, e.g., based on the output current iLf at node 113-1, the corrective action can include ceasing operation of the modules 108 in the system 100, limiting the amount of current input to or output by each module 108 in the system 100, and / or tripping a breaker, e.g., the breaker 1115-1, that isolates the system 100 from other components external to the system 100. For multi-phase signals, the corrective actions can depend on the phase(s) of the current Iact 1212 that are predicted to exceed the overcurrent event threshold. For example, if the current level of one phase is predicted to exceed the overcurrent event threshold for that phase, the MCD 112 can perform a correction action for the array 700 corresponding to that phase. The correction action can include ceasing operation of the modules 108 in the array 700, limiting the amount of current input to or output by each module 108 of the array 700, and / or tripping a breaker that isolates the array 700 from other components. In another example, the MCD 112 can perform the same actions for each array 700 if the current level of any phase of a multi-phase signal of the system 100 exceeds its overcurrent event threshold. If the current level of multiple phases, but not all phases, is predicted to exceeds its overcurrent threshold, the MCD 112 can perform a correction action for each array 700 for which the current level of its phase is predicted to exceed its overcurrent event threshold. For ease of description, a module 108 for which a correction action is taken can also be referred to as an affected module 108. Similarly, an LCD 114 that controls an affected module 108 can also be referred to as an affected LCD 114. To trip a breaker, the MCD 112 can send a control signal to the breaker, as described above with reference to FIG.11B. For example, if the MCD 112 determines that a particular  Docket No. 56420-0020WO1breaker should be tripped based on a prediction of an overcurrent condition, the MCD 112 can send a control signal to the particular breaker, causing the particular breaker to open. Ceasing operation of an affected module 108 can include causing the LCDs 114 to stop switching the converter 202 of the affected module 108, which essentially prevents the flow of current from the energy source 206 within the affected module 108. Example techniques for limiting the current output by a module 108 are described below. The MCD 112 can cause affected modules 108 to cease operation and / or to operate in a current limiting mode by sending control information to the LCDs 114 for the affected modules 108. As described above, the MCD 112 can send control information, which can include a corrective action signal, to the affected LCDs 114 over communication paths or links 115. The MCD 112 can also send a corrective action signal to each affected LCD 114 over a dedicated communication path or link 119 in response to predicting an overcurrent event. The corrective action can be, for example, a trip signal that instructs the affected LCD 114 to cease operation of the converter 202 or a current limiting signal that instructs the affected LCD 114 to operate the affected module 108 in a current limiting mode in which the affected module 108 outputs current at or below a current limiting threshold. In the illustrated example, the MCD 112 includes an overcurrent (OC) pulse generator 1210 that is configured to send pulse signals to affected LCDs 114 over the communication paths or links 119 to instruct the affected LCDs 114 to perform an operation in response to the processing circuitry 120 predicting an overcurrent event. The OC pulse generator 1210 can be implemented in hardware circuitry, and can be controlled by input signaling to the hardware circuitry or by software controls. The OC pulse generator 1210 can be software implemented by the processing circuitry 120, for example. In example implementations, the MCD 112 can instruct an affected LCD 114 to shut down operation of its module(s) 108 using a pulse_Trip signal 1224 communicated to the affected LCD on the dedicated communication path or link 119 that couples the MCD 112 to the affected LCD 114. In another example, the MCD 112 can cause an affected LCD 114 to enter a current limiting mode using a pulse_CL signal 1226 communicated to the affected LCD 114 on the dedicated communication path or link 119 that couples the MCD 112 to the affected LCD 114. The processing circuitry 120 can instruct the OC pulse generator 1210 to generate and send the appropriate pulse signal to one or more affected LCDs 114 using an OC signal 1222. The OC signal 1222 can include, for each affected LCD 114, a current limiting signal to instruct the affected LCD 114 to operate its module(s) 108 in a current limiting mode or a  Docket No. 56420-0020WO1shut-down signal to instruct the affected LCD 114 to cease operation of its module(s) 108. The OC pulse generator 1210 can, in turn, send the appropriate pulse to each affected LCD 114 over the communication path or link 119. In some implementations, each LCD 114 can a single pulse input coupled to the communication path or link 119. In this example, the MCD 112 can send a different type of pulse for each pulse signal. For example, the pulse_Trip signal 1224 can have a different frequency than the pulse_CL signal 1226 and each LCD 114 can be configured to detect the corresponding instruction based on the frequency of the pulse signal. In some implementations, each LCD 114 includes respective pulse inputs for the pulse signals and a dedicated communication path or link 119 that couples that pulse input to the MCD 112. In this example, each LCD 114 can be configured to monitor for the pulse signal at each pulse input. For example, a low signal (e.g., less than 1 VDC) detected at the pulse input for the pulse_Trip signal 1224 can indicate that the LCD 114 should cease operation of its module(s) 108. Similarly, a low signal detected at the pulse input for the pulse_CL signal 1226 can indicate that the LCD 114 should operate its module(s) in the current limiting mode. In some implementations, the MCD 112 can first attempt to prevent the current Iact 1212 from exceeding the overcurrent threshold by causing the affected LCDs 114 to operate in a current limiting mode. In this example, the processing circuitry 120 can continue monitoring the current Iact 1212 represented by Idac 1218 to continue predicting whether the current Iact 1212 will exceed the overcurrent threshold. If the processing circuitry 120 continues to predict an overcurrent event, e.g., after operating the affected modules 108 in the current limiting mode for a threshold amount of time, the processing circuitry 120 can shut down the affected modules 108 by sending a trip signal to the affected LCDs 114. In another example, the processing circuitry 120 can continue monitoring the current Iact 1212 represented by Idac 1218 to determine whether the predicted current exceeds an additional overcurrent threshold that is higher than the overcurrent threshold that prompted the current limiting mode. If the predicted current exceeds the additional overcurrent threshold, the processing circuitry 120 can shut down the affected modules 108 by sending a trip signal to the affected LCDs 114. The current limiting mode is an optional implementation choice, as indicated by the dashed lines in FIGS.12A-C. In some implementations, the current limiting mode for a module 108 can include the LCD 114 operating the switches of the converter 202 to output less current. In some implementations, the current limiting mode for a module 108 can include the LCD 114 using current limiting circuitry 1240 to limit the current output by the module. An affected LCD  Docket No. 56420-0020WO1114 can activate the current limiting circuitry 1240 using CL Active signaling 1242 carried on dedicated CL Active communication path or link 1244. Current limiting circuitry 1240 can be coupled to the output of each module 108, or can be located elsewhere within the module 108. The current limiting circuitry 1240 can include circuit components such as resistors, varistors, thermistors, etc., that can limit the flow of current from an input side of the current limiting circuitry to an output side. The current limiting circuitry 1240 can be coupled to the module 108 via a switch that is activated by a signal (e.g., CL active 1242) from the corresponding LCD 114. When activated, the current limiting circuitry 1240 can limit the amount of current flowing from the output of the module 108. By restricting the current output from the module 108, the overcurrent event state can be avoided without having to shut down the modules 108, without having to trip breakers, and / or without blowing fuses, but while still protecting circuit components. Note that current limiting circuitry 1240 performs current limiting functions on output current. These current limiting functions can be performed by a current limiting module that is implemented in hardware, software, or a combination of hardware and software. In some implementations, the MCD 112 includes an optional state machine 1208 that is configured to maintain the current state of the MCD 112 and / or to transition between states. In this example, the processing circuitry 120 can output predicted overcurrent event state information (e.g., from the overcurrent prediction circuitry 1300) to the state machine 1208. The state machine 1208 can hold overcurrent event state information, for example, as a Boolean value, e.g., a Boolean value of 0 representing absence of a predicted overcurrent event state (e.g., the presence of a normal operating state) or a Boolean value of 1 representing a presence of a predicted overcurrent event state. As described elsewhere herein, overcurrent prediction can be performed for modules 108, arrays 700, entire energy systems 100, etc. Thus, the state machine 1208 can maintain the state for each of these components. An example of a state machine 1208 is provided by the example schematic in FIG. 14A. Generally, the state machine 1208 can be implemented in hardware, software, or a combination of hardware and software. The processing circuitry 120 can operate the modules 108 via the LCDs 114 based on the state(s) held in state machine 1208. For example, if all components are in a normal operating state, the processing circuitry 120 can operate the modules 108 in the normal manner. If a component is in a predicted overcurrent event state, the processing circuitry 120 can initiate corrective actions for the affected modules 108.  Docket No. 56420-0020WO1Generally, the state machine 1208 allows for complex situational awareness by being able to make contextual decisions based on multiple inputs. For example, the state machine 1208 can hold state information for each phase of the output current iLf individually, which allows the MCD 112 to trip the LCDs 114 based on an overcurrent event state of any of the output current phases. In addition, the state machine 1208 can also hold other states that could cause module 108 to trip. The state machine 1208 also provides a mechanism for resetting the predicted overcurrent event state after the fault is cleared. The state machine 1208 can also be programmable to respond in certain ways based on operator preferences. For example, a default setting for the state machine 1208 can include a shutdown of the affected modules 108 upon a detection of an event, including an overcurrent event. However, an operator can override the default settings within the state machine 1208, e.g., using an operator terminal coupled to the MCD 112. If a state machine 112 is not used, the processing circuitry 120 can predict an overcurrent event and can control the OC pulse generator 1210 to instruct the LCDs 114 to take appropriate corrective actions. The state machine 1208 also facilitates multiple modes of responding to a predicted overcurrent event. For example, for current predicted to overshoot a first threshold, the state machine 1208 can cause one or more affected LCDs 114 to enter into a current limiting mode. This state is shown in FIG.14D. If the current is predicted to overshoot a second threshold, larger than the first threshold, then the state machine 1208 can cause one or more affected LCDs 114 to cease operation. This state is shown in FIG.14A. Thus, the use of a state machine 1208 can allow the energy system 100 to selectively control the LCDs based on different predictions of the current Iact 1212. FIG.12B is a block diagram 1250 of an example implementation of an energy system 100 that includes an LCD 114 that monitors current for overcurrent protection. In this example, the overcurrent prediction is performed for each of one or more modules 108 of the system 100. As described above, each module 108 can include monitoring circuitry 208. In some implementations, each LCD 114 can detect the electrical current flowing through or out of its corresponding module(s) 108. Measured current detected by the monitor circuitry 208 can be denoted as Iact 1212. For example, each LCD 114 can use monitor circuitry 208 to monitor current from one or more of the converter 202, energy buffer 204, or energy source 206. For example, the monitoring circuitry 208 can measure current Iact 1212 at the output of the module 108, e.g., at port IO1 or IO2 (FIGS.7A-7E). The measured current Iact 1212 can be communicated to the connected LCD 114 using a communication path or link 116 or 118. The LCD 114 can output the measured  Docket No. 56420-0020WO1current Iact 1212 to the MCD 112 using the communication path or link 115 that communicatively couples the LCD 114 to the MCD 112. The MCD 112 can condition the measured current Iact 1212 using the ADC 1202, the DAC 1204, and / or other components, as described above. The MCD 112 can process the measured current from the LCD 114 for overcurrent prediction and overcurrent event state determination, as described above for FIG.12A. The MCD 112 can use the same or similar overcurrent prediction circuitry that is described in FIGS.13 and in FIGS.14A-F below. In some implementations, each LCD 114 can be connected to a corresponding circuit network for overcurrent prediction. This structure allows for the MCD 112 to directly control each LCD 114 individually in the event the MCD 112 determines that current flowing through a module 108 associated with a particular LCD 114 is predicted to exceed an overcurrent event threshold. For example, the MCD 112 can cause the LCD 114 to enter a current limiting state or can cause the LCD 114 to cease operations. The other LCDs 114 that are not affected by the overcurrent event state can remain active. In some implementations, the LCD 114 can encode the measured current signal Iact 1212 received from a module 108 with an index M representing an identifier of that module 108. The module identifier can be used to track the predicted overcurrent event state for a specific module 108, and can be used for addressing the LCD 114 associated with that module 108. For example, for a given module M 108-M, the LCD 114 can encode the measured current signal Isensed with an identifier associated with the module M 108-M. If the MCD 112 determines that the measured current signal Iact 1212 is predicted to exceed the overcurrent event threshold, the MCD 112 can communicate directly with the LCD 114 associated with the module M 108-M where the current signal iMx indicates an imminent overcurrent event state. This way, the specific module M 108-M can be controlled to avoid the overcurrent event state, e.g., by causing the specific module M 108-M to enter a current limiting state or to shut down the module M 108-M. As described above, one or more LCDs 114 can perform the overcurrent prediction operations (or at least a portion thereof), including performing the corrective actions. For example, the LCD 114 can be directly responsible for performing overcurrent prediction based on the current at one or more nodes within its module(s) 108, at the output of its module(s) 108, or within other areas of the system 100. In another example, an LCD 114 can perform overcurrent operations for modules 108 in an array 700 and / or an entire system 100. In a particular example, the system 100 can include a designated LCD 114 for each array 700  Docket No. 56420-0020WO1of a system 100. The designated LCD 114 for an array 700 can monitor the current output by that array 700 (e.g., at a system IO port of the array 700), predict overcurrent events for the array 700, and, when a predicted overcurrent event is detected, perform one or more corrective actions for the modules 108 in the array 700. FIG.12C is a block diagram of an example implementation of an energy system 100 that includes an LCD 114 that monitors current and performs overcurrent prediction based on the monitored current. In some implementations the LCDs 114 can each include overcurrent prediction circuitry to predict overcurrent events locally. In this example, the LCD 114 can quickly shut down its module(s) 108, enter a current limiting operation mode, and / or trip a breaker without affecting the operation of other modules 108 and without having to rely on communication with the MCD 112 for such predictions and corrective actions. In FIG.12C, the LCD 114 includes processing circuitry 120. The processing circuitry 120 can include overcurrent prediction circuitry 1300 of FIG.13. In some implementations, the LCD 114 can also include signal conditioning components not shown in FIG.12C, including, for example, an ADC 1202 and / or a DAC 1204. As described above, each LCD 114 can control one or more modules 108. Thus, instead of tracking phase x, the LCD 114 can track a module number using an index M. For example, the monitor circuitry 208 for each module 108 can output a measurement of current Im 1272, where Im 1272 is current measured somewhere within the module 108 or at the output of the module 108. For example, Im 1272 can be measured at the output of the energy source 206, the energy buffer 204, or at various points through the converter 202, including upstream of the switches or downstream of the switches. The measured current iM 1272 can be communicated to the corresponding LCD 114 using communication path or link 116 or 118, depending on implementation. In some implementations, a dedicated communication path can be used to communicate the measured current iM to the processing circuitry 120 of the LCD 114. The processing circuitry 120 can include overcurrent prediction circuitry 1300. The overcurrent prediction circuitry 1300 can perform overcurrent prediction in a manner described elsewhere herein. In some embodiments, the LCD 114 can include a state machine 1208 that holds the predicted overcurrent event state, similar to that described in FIGS.12A and 14A-F. Upon a prediction of an overcurrent event, the LCD 114 can control an OC pulse generator 1210 to cease switching operations of the affected module 108 (the affected module being indicated by the index M), operate the affected module 108 in a current limiting mode,  Docket No. 56420-0020WO1or trip a breaker that isolates the affected module 108 from other components of the system 100. The LCD 114 can include a corresponding overcurrent prediction circuitry 1300 for each connected module 108. The output of each overcurrent prediction circuitry 1300 can indicate the predicted overcurrent event state for each module 108. Therefore, the LCD 114 can directly control each module 108 individually to address the predicted overcurrent event state. In another example, the LCD 114 can include a single instance of overcurrent prediction circuitry 1300 and use the circuitry 1300 in an alternating manner to predict overcurrent events for multiple modules 108. To address a predicted overcurrent event for a module 108, the LCD 114 can cease operation of the module 108 (e.g., by ceasing operation of the switches of the converter 202) or operate the module 108 in the current limiting mode. In some implementations, the LCD 114 can cause the module 108 to enter into a current limiting mode by activating a current limiter 1240, e.g., using a CL Active signaling 1242 carried on dedicated CL Active communication path or link 1244. In another example, the LCD 114 can adjust operation of the switches of the converter 202 to reduce the output current of the module 108. An MCD 112 or LCD 114 can include an instance of overcurrent prediction circuitry 1300 for each phase of a multi-phase signal e.g., of the output current iLfx. In situations in which the MCD 112 or LCD 114 performs overcurrent prediction operations for multiple electrical currents, the MCD 112 or LCD 114 can include an instance of overcurrent prediction circuitry 1300 for each electrical current. For example, when implemented in an LCD 114, one instance of overcurrent prediction circuitry 1300 can be implemented for each module 108 connected to the LCD 114. In another example, the same instance of overcurrent prediction circuitry 1300 can be used for multiple phases or multiple electrical currents, e.g., by processing each phase or electrical current in an alternating manner. FIG.13A is a schematic diagram of an example implementation of overcurrent current prediction circuitry 1300. The overcurrent prediction circuitry 1300 can be implemented by circuit elements in the processor circuitry 120, or in stand-alone circuitry coupled to the processing circuitry 120. The overcurrent prediction circuitry 1300 can also be implemented using a combination of hardware and software, or just using software. For example, the overcurrent prediction circuitry 1300 can be implemented by an FPGA communicatively coupled to the processing circuitry 120 or by an FPGA of the processing circuitry 120. In another example, the overcurrent prediction circuitry 1300, or at least a portion thereof, can be implemented in software executed by the processing circuitry 120.  Docket No. 56420-0020WO1The overcurrent prediction circuitry 1300 can be used for overcurrent prediction for a single phase of current. The current prediction circuitry 1300 uses as an input current Idac 1218 to predict a future current level of an electrical current represented by Idac 1218. The input current Idac 1218 can represent an actual current level for a given phase of a multi-phase signal. The overcurrent prediction circuitry 1300 includes a filter 1302 that is configured to filter Idac 1218 to output a filtered current Ifiltered. The filter 1302 can be an infinite impulse response (IIR) first order low-pass filter. The desired cut-off frequency can be preset, e.g., 1000 Hz, 2000 Hz, 2500 Hz, or another frequency. Other types of filters can also be used. The current prediction circuitry 1300 includes a gradient circuit element 1306, which can determine a gradient value of the filtered current Ifiltered. The gradient circuit element 1306 can determine a rate of change or normalized rate of change of the filtered current Ifiltered. The gradient circuit element 1306 can use a delay element 1304 that implements a delay. The delay can be a user-defined delay or a delay determined from samples of the filtered current Ifiltered, to establish the correct point separation along the current signal to obtain an accurate estimation of the gradient value. The delay element 1304 can be implemented in hardware, software, or a combination of hardware and software. For example, the delay element 1304 can be programmable by an operator with delay parameters using a software user interface. The point separation defines the distance between sampling points. The larger the point separation, the less accurate the estimation but the fast the processing time. The smaller the point separation, the more accurate the estimation because more points along the current value are used for the estimation, but that means more processing time and resources. For time-varying signals, point separation can be expressed a delay in time between to current values. The delay accounts for noise on the input signal (e.g., on the Isensed 1214 signal received from the sensor 1220). Noise can originate from one or a combination of circuit components making up the signal chain, including but not limited to sensors, amplifiers, power supplies, etc. In some implementations, the gradient circuit element 1306 determines the normalized gradient of the input signal. In some implementations, the delay value defining the point separation for gradient calculation can be determined experimentally or can be computed based on design specifications of the whole system. For example, an operator can manually control the delay value until the operator finds a delay value that provides accurate results (e.g., results that can experimentally predict current from the gradient value output from the gradient circuit element 1306). An operator can also attempt to derive an approximate delay value based on  Docket No. 56420-0020WO1knowledge of system parameters. The operator may still perform minor adjustments manually, however, to obtain the correct point spread. In one example, using 32 sample delays as the point separation can help reduce noise or take into account noise on the input signal (e.g., Isensed 1214). Using 32 sample delays can also be less complex to renormalize later, e.g., in implementations in which the overcurrent prediction circuitry 1300 is implemented in an FPGA. For example, it may be simpler for an FPGA to divide by a value equal to a power of two (e.g., 2, 4, 8, 16, 32, etc.) since the division can be performed using shift operations, e.g., a 5-bit right shift to divide by 32. Generally, power of 2 division can be performed using a right shift, which is a relatively fast and efficient way to perform division, particularly in implementations that include an FPGA to perform computations. The delay implemented by the delay element 1304 is used in the gradient calculation to account for noise on the input signal. Noise can contribute to miscalculations of the gradient value because noise can represent fast changes in current value over time. The delay value can be selected so that the point separation is not too small. A point separation that is too small can result in a gradient that is not representative of the noise on the current signal. A point separation that is too large does not provide sufficient information about how the current signal is changing over time, which results in inaccurate electrical current predictions. Results of the selected delay value can be observed for tuning the delay value. Gradient values on fast time scales are filtered to minimize noise on the signal. The gradient value determination is used for determining the change in the current value over time. In some implementations, the delay is the point separation that is used to determine the gradient value of the filtered current Ifiltered. The gradient value can be derived using a mathematical expression relating the change in current amplitude dY over a time scale dt. The time scale dt is defined by the delay set for the current prediction circuitry 1300. An example of a simplified gradient expression can be similar to Equation 1, shown below: dY / dt = (Y2-Y1) / (t2-t1), (1) where t2-t1 represents the delay that defines the point separation along the Y axis (amplitude) of the filtered current Iact 1212 for calculating the gradient, and Y1 and Y2 represent points along the signal of the filtered current Ifiltered for the delay t2-t1. The delay can represent a point separation in sampling, using, for example, time separation or time step separation. Time step separation can be determined as a function of processing circuitry clock rate, described below. The denominator of the gradient expression can be in terms of time or time steps. Time steps are described below. Briefly, a number of time steps is proportionate to the processing circuitry clock rate.  Docket No. 56420-0020WO1In some implementations, the gradient value is optionally normalized using, e.g., a shift divider 1308, which can be implemented in hardware as a shift register that can perform bitshift operations. The normalization removes large edges and noise profiles from the gradient value. For example, if 32 sample delays were used as the point separation, the shift divider 1308 can renormalize the gradient value by performing a five bit shift on the gradient value. A shift divider 1308 can be implemented in hardware, e.g., as part of an FPGA. In some implementations, normalization can be performed through software operations using a central processing unit (CPU), digital signal processing (DSP), or other processing or computing technology. The normalized gradient value can be factored by product block 1312 by a time horizon 1310 to extrapolate the gradient for overcurrent prediction. The value for the time horizon 1310 indicates how far into the future to predict the current. The time horizon 1310 can be operator adjustable. For example, the time horizon 1310 can be selected to account for delays in obtaining a current measurement within the energy system 100 circuit network, which can include the ADC 1202 and DAC 1204, as well as other electrical components. Changes to the circuit network can impact the delays within the circuit network. In those situations, the operator can then change the time horizon to provide a overcurrent prediction in view of the delays experienced within the new circuit network. The time horizon for the overcurrent prediction is adjustable, e.g., it can be set by an input as a number of time steps. An example relationship between time steps and time horizon in seconds is provided in Equation 2 below: time steps = time horizon (s) * clock rate (Hz) (2) For instance, with a horizon of 500 steps the overcurrent prediction circuit can predict the current approximately 100 µs into the future, when using a 5 MHz clock (100 µs = 500 steps / 5 MHz). The time-factored gradient can be applied to the input current Idac1218 by summation circuit element 1314 to predict current based on the time horizon 1310 to obtain a predicted electrical current Ipredicted 1316. For example, the summation circuit element can determine, as the predicted current Ipredicted 1316, the sum of the input current Idac 1218 and the time- factored gradient output by the product block 1312. An absolute value element 1318 can determine the absolute value of the predicted current Ipredicted 1316 to simplify comparison of the predicted electrical current Ipredicted 1316 to thresholds. The absolute value of the predicted current Ipredicted 1316 also allows for comparison with the threshold regardless of  Docket No. 56420-0020WO1whether the measured current value corresponds to a positive or negative overcurrent AC waveform. The overcurrent prediction circuitry 1300 includes a comparator 1320. The comparator 1320 is configured to compare the predicted electrical current Ipredict 1316 to an overcurrent threshold1322. The overcurrent threshold 1322 can be set by an operator based on various factors, including the tolerance of the circuit elements used in the system 100, the current for which the overcurrent prediction is being performed, and / or the current rating of the components of the system 100. The comparator 1320 can compare the predicted electrical current Ipredict 1316 to the overcurrent threshold1322 and provide an output, e.g., a digital output, representative of the result of the comparison. For example, for a predicted electrical current I predict 1316 less than the overcurrent threshold 1322, the comparator 1320 can output a 0 (zero) to indicate that an overcurrent event is not predicted, and for a predicted electrical current Ipredict 1316 greater than or equal to the overcurrent threshold 1322, the comparator 1320 can output a 1 (one) to indicate that an overcurrent event is predicted. Other outputs can be used based on implementation choices. The comparator output can be logically combined with an enable signal 1324, e.g., using AND gate 1326 or an equivalent circuit element. The enable signal 1324 can be operator set to turn the overcurrent prediction circuitry 1300 and functionality on or off. The output of the overcurrent prediction circuitry 1300 can be a Boolean value for the present Inst_state 1328 for the current represented by Idac 1218. The present state is shown as Inst_state1328. The present state can be a predicted overcurrent event state (e.g., when the value is a one) or a non-overcurrent event state (e.g., when the value is a zero). This Boolean value Inst_state 1328 can be sent to the state machine 1208, i.e., in implementations that include a state machine 1208, or otherwise used in controlling the operation of the modules 108 in system 100. For example, the MCD 112 or LCD 114 that includes the overcurrent prediction circuitry 1300 can perform a corrective action when the present Inst_state 1328 is a predicted overcurrent event state. FIGS.14A-14C illustrate example circuitry that can be used in overcurrent prediction. The example circuitry can be implemented as part of the processing circuitry 120 or a state machine 1208 in implementations that include a state machine 1208. The example circuitry can also be implemented on software, e.g., software that is executed by the processing circuitry 120. FIG.14A is a schematic diagram of an example implementation of a circuit 1400 to maintain a predictive overcurrent event state based on overcurrent prediction. A logic gate,  Docket No. 56420-0020WO1e.g., OR gate 1402, can logically output high values if one of the state inputs for overcurrent event 1328-1 to 1328-n, etc. are high (e.g., representing a value of one), in cases where high indicates the presence of a predicted overcurrent event from the overcurrent prediction circuitry 1300 of FIG.13. Each input 1328-1 to 1328-n represents an output of overcurrent prediction circuitry 1300 for a current of a phase of a multi-phase signal or one of multiple currents being monitored for a system 100. The OR gate 1402 can output the logical value into a digital hold circuit 1404 that can latch and hold the overcurrent event state (e.g., flip- flop or latch). The digital hold circuit 1404 can output a Q state indicative of the predicted overcurrent event state. In some implementations, a different type of circuit can be used, such as a latch circuit. The output of digital hold circuit 1404 can be a Boolean value for OC signal 1222a. As described above, the processing circuit 120 or state machine 1208 can output an OC signal 1222 that instructs an OC pulse generator 1210 to generate a pulse signal 1224 or 1226 for controlling modules 108 based on the presence of a predicted overcurrent event. In this example, the OC signal 1222a is a Boolean value that can instruct the OC pulse generator 1210 to generate an output pulse signal. The output pulse signal can be a pulse_Trip signal 1223 if the module(s) 108 should be shut off or a pulse_CL signal 1226 if the module(s) 108 should be operated in a current limiting mode. The digital hold circuit 1404 can be reset using a [Clear_Faults] value 1406. [Clear_Faults] can be set after overcurrent events are confirmed to have been resolved. FIG.14B is a schematic diagram of an example implementation of a OC pulse generator circuit 1210 to generate a pulse signal for controlling converter switching. FIG. 14C is a schematic diagram of an example implementation of a circuit 1420 to control switching of a converter 202 by an LCD 114. The Boolean value OC signal 1222a can be input into the OC pulse generator 1210. The OC pulse generator 1210 can include multiple inputs that it uses to generate various signals signal for controlling switches at converter 202. In this example, among the inputs to the trip pulse generator 1210 is the Boolean value OC signal 1222a, which is indicative of whether a predicted overcurrent event state is present. Upon receiving the OC signal 1222a, the OC pulse generator 1210 can determine that the affected module(s) 108 should cease operation or be operated in a current limiting mode and send a pulse signal 1414 to the LCD(s) 114 that control the affected module(s) 108. The pulse signal can be can be a pulse_Trip signal 1223 if the affected module(s) 108 should be shut off or a pulse_CL signal 1226 if the affected module(s) 108 should be operated in a current limiting mode. The LCD 114 can take the appropriate corrective action depending on the pulse signal 1414 received, as described above.  Docket No. 56420-0020WO1As described above, the OC pulse generator 1210 can generate either pulse signal 1223 or 1226 on the same communication path or link 119 (e.g., using different frequencies) or on a dedicated communication path or link 119 for each signal. In such implementations, the OC pulse generator 1210 can have an input for a respective OC signal 1222 for each of the two corrective actions and the MCD 112 can include a circuit 1400 for each corrective action to generate the OC signals 1222. In another example, the MCD 112 can include a circuit 1400 for each corrective action to generate the OC signal 1222 for that corrective action, along with an OC pulse generator 1210 for each corrective action. FIG.15A is a flow diagram showing an example process 1500 for predicting overcurrent events and taking corrective action in response to predicting the overcurrent event. Processing circuitry 120 in the MCD 112 or LCD 114 can receive (1502) a measurement of current flowing through the system. The current can be the output current iLfx (FIG.11B or current flowing through another node, as described above. The processing circuitry 120 can determine (1504) a gradient for the current. The gradient can be determined based on a determination of how the current changes over a predetermined period of time. The processing circuitry 120 can estimate (1506) a future value of the output current by applying the gradient to the received value of the current. The processing circuitry 120 can compare (1508) the estimated future value of the current against an overcurrent threshold. The overcurrent threshold can be a first threshold for activating a current limiting mode for one or more modules 108 and / or a second threshold for cessation of the operation of the one or more modules 108. If the estimated future value of the current is greater than the threshold, then the processing circuitry 120 can take action accordingly, such as instructing (1512) cessation of operation of one or more modules 108, or causing the one or more modules 108 to operate in a current limiting mode, e.g., by instructing their LCDs 114 to operate the modules 108 in the current limiting mode. If the estimated future value of the current is less than or equal to an overcurrent threshold, then the processing circuitry 120 can continue monitoring the measured current (at 1502) while continuing to operate the modules 108 in a normal mode. FIG.15B is a flow diagram 1550 showing an example process for overcurrent prediction. The process 1550 can be performed for each phase x of a multi-phase signal, e.g., each phase of output current iLfx. For ease of description, the process 1550 is described in terms of the output current iLfx but other multi-phase signals can also be used. An overcurrent prediction circuit receives (1552) processed current iLfx. The processed current iLfx can be representative of one phase of the multi-phase signal. The analog current can  Docket No. 56420-0020WO1undergo various signal conditioning steps, including analog-to-digital conversion and / or value translation via gains and offsets to map digital values to representative analog values. A filter filters (1554) the received processed current iLfx to output filtered current iLfx_filtered. For example, the processed current iLfx can undergo filtering by an infinite impulse response low-pass filter, such as that described above. Other filtering techniques can also be used. The filtered current iLfx_filtered can optionally be used to determine (1555) a time delay for performing gradient calculation. The time delay determination can be used to identify points for calculating a gradient between two instantaneous representative current values. Too large or too small of a time delay can result in inaccuracies of the calculated gradient. The time delay can also be determined by an operator monitoring results of the gradient calculation. A gradient circuit element determines (1556) a gradient of the filtered current using the filtered current iLfx_filtered and the delay. A normalization function is applied to normalize (1558) the gradient value, e.g., using a shift divider circuit element. A time horizon value can be obtained for the predicted electrical current determination. The time horizon can be identified based on a desired amount of time in the future the predicted electrical current represents. The precision of the prediction can depend on the time horizon selected. The overcurrent prediction circuit applies (1560) the selected time horizon to the normalized gradient. The resulting time-horizon factored gradient can be applied to the processed current iLfx to determine (1562) a predicted electrical current iLfx_predicted. In some implementations, the absolute value of the current iLfx_predicted) can be determined so that further calculations are easier to make. A comparator can compare (1564) the predicted electrical current iLfx_predicted against an overcurrent threshold to predict an overcurrent event. (1564). The results of the comparison, the present event state OC_x, is sent (1566) to a state machine (or to one or more LCDs 114), which can use the OC_x value to control one or more modules 108. FIG.16A is a flow diagram showing an example process 1600 for controlling a converter to stop switching based on a predicted overcurrent event state. A OC pulse generator 1210 can receive (1602) an indication of a presence of an overcurrent event state. For example, the OC pulse generator 1210 can receive an indication of an overcurrent event state from a state machine, e.g., of the MCD 112. A positive indication of a predicted overcurrent event can be used to trigger a trip signal, that causes an OC pulse generator 1210 to generate (1604) a trip pulse signal. The OC pulse generator 1210 can then send (1606) the  Docket No. 56420-0020WO1trip signal to one or more affected LCDs 114 to cause the affected LCD(s) 114 to cease switching operations of the converter 202 of the module(s) controlled by the affected LCD(s) 114. The trip pulse signal can use positive logic in some implementations (i.e., 0 V normal, and 5 V pulse to trip), but any appropriate signaling can be used. In some implementations, the MCD 112 can generate a trip pulse signal that goes to each LCD 114 causing them to stop switching. This is a dedicated communication path for fast tripping (<2 micro-seconds) during emergency shutdown. The MCD 112 can also generate a regular shutdown message to each LCD 114 individually using the CAN communication channel during normal shutdown. FIG.16B is a flow diagram showing an example process 1610 for activating a current limiting mode based on a predicted overcurrent event state. In process 1610, processing circuitry 120 either in the MCD 112 or an LCD 114 can determine (1612) than a predicted overcurrent event state is present (e.g., based on a predicted current exceeding an overcurrent threshold, thereby triggering a current limiting operational mode. A signal generating entity (e.g., an OC pulse generator 1210) of the MCD 112 or an LCD 114 can generate (1614) an instruction for an LCD 114 to activate a current limiting mode. In some implementations, the MCD 112 or the LCD 114 can send (1616) a current limiting mode activation signal to a current limiter 1240. Activating the current limiter can include causing output current from a module 108 connected to the LCD 114 to flow through the current limiter 1240. For example, the activation signal can cause a switch to connect the current limiter to the output of the module 108. In another example, the LCD 114 can operate the module 108 in the current limiting mode by adjusting operation of the switches of the converter 202 to output less current rather than use a current limiter. FIG.16C is a flow diagram showing an example process 1620 for controlling a converter to resume switching based on a fault condition being reset. When the predicted overcurrent event is cleared, the predicted overcurrent event state in the state machine is reset (1622) to indicate no overcurrent event, and the clear fault value can be set, resetting the latch circuit. The OC pulse generator 1210 can generate (1624) a pulse signal indicating that the LCD 114 can resume switching the converter switches. The OC pulse generator 1210 can then send (1626) pulse signal to the LCD 114. FIG.17 is an example graphical representation 1700 of a predicted current and an actual current. The graphical representation 1700 illustrates the predicted current Ipredicted leading the actual current Iact in time. The predicted current Ipredicted is shown to spike around the 0.100 seconds mark, followed closely by the actual current Iact. The predicted  Docket No. 56420-0020WO1current Ipredicted is compared against an overcurrent threshold 1322, by overcurrent prediction circuitry, as shown in FIG.13. At the point where the predicted current Ipredicted exceeds the overcurrent prediction threshold 1322, the current prediction circuitry 1300 can cause one or more affected modules 108 to cease operation or to operate in a current limiting mode, e.g., via OC pulse generator 1210 in MCD 112. The affected modules 108 ceasing operation or operating in a current limiting mode causes the actual current Iact to drop before the actual current Iact can reach the overcurrent prediction threshold 1322. The actual current Iact spikes to a current value represented by line 1704, and then drops because the current prediction circuitry 1300 causes the affected modules 108 to stop switching the converter switches or to reduce their output current, so no or less current passes to the module output. VDC Ripple Compensation Operation of the inverters in an energy system, such as any implementation of energy system 100 described herein, should desirably produce a voltage or current with low total harmonic distortion and low emissions of individual harmonics. Harmonics are multiples of the fundamental frequency of the AC waveform. These harmonics can create distortions by contributing to unintended peaks and troughs in the desired or ideal AC waveform. Sources of harmonic distortion can include dead-time, DC link voltage ripple, filter inductor saturation, non-linear loads, grid harmonics, measurement delays by design limitations, reactive power, etc. One source of increased harmonics in an AC signal output by a distributed converter system, like energy system 100, can be due to a time delay between when a DC link voltage is measured and when a reference signal for controlling the converters is used to control the converters. Delays within the closed-loop control system can contribute to degraded total harmonic distortion (THD). Sources of delays that can affect THD include sampling time, computation time, and other latencies associated with a specific digital system. The techniques described below compensate for such ripple by correcting the reference signal at the LCDs 114 using a reference signal correction factor that is based on a present DC voltage measurement obtained by the LCD 114. To aid the disclosure, Table 1 provides a summary of the terminology used herein: Table 1. Glossary of terms for VDC Ripple Compensation Term Definition   Docket No. 56420-0020WO1Vrnm-N Modulated normalized reference signal for module N Ψ Reference signal scaling factor s C- AC converters work, in addition to impedance in the DC link filter capacitors, and the battery impedance. FIG.23 is a schematic diagram illustrating the DC current and AC current on either side of an example power converter. In FIG.23, for array 700 each module 108 outputs an AC voltage Vout(N), as shown in Equation 3: Vout(N) = Vr * Vdc(t)-N, (3) for each of N modules. The output voltage of the array 700, VAC_out is equal to the sum of the AC voltages output from each module 108 in the array 700, as shown in Equation 4: VAC_out = ∑ெேୀ^ Vout^N^ (4)for an array with M modules, where N goes from 1 to M. For implementations that do not include reference signal balancing, the total output voltage VAC_outcan be expressed as a product of the reference sign Vr and the sum of DC link voltages, as shown in Equation 5: VAC_out = Vr * (Vdc(t)-1 + . . . + Vdc(t)-M = Vr * ∑ெேୀ^ Vdc^t^ -N (5)For implementations that use balancing, the total output voltage VAC_out can be expressed as a sum of the module output voltages, each of which may have its own reference signal, as shown in Equation 6: VAC_out = [Vrnm-1 * Vdc(t)-1] + ... + [Vrnm-M * Vdc(t)-M] (6) for modules N=1-M. In the example shown in FIG.23, the AC output voltage for a module 108 has a frequency of ω = 60 * 2π Hz. Other frequencies can also be used. The converter  Docket No. 56420-0020WO1202 acts like a rectifier for the DC side current, which would have unipolar amplitudes with frequency ω = 60 rad / s. In each case, the output voltage is dependent on the reference signal and the DC link voltage. One way to produce the reference signal Vr for converter switching is to divide the AC voltage setpoint VAC_Setpoint for an array 700 of modules 108 by the DC link voltage VDCL_Array for the array 700. This can be represented using Equation 7 below: Vr = VAC_Setpoint / VDCL_Array (7) In Equation 7, Vr is a reference signal, VAC_Setpointis the AC voltage setpoint for an array 700 received by the MCD 112, e.g., from an external control device 104, and VDCL_Array is the total DC link voltage, e.g., for all of the modules 108 in an array 700. The AC voltage setpoint VAC_Setpoint can represent a target output voltage for the array 700. The AC voltage setpoint VAC_Setpointcan be set by an operator, or can be dynamically controlled, based on load demands. In some implementations, the MCD 112 can determine the total DC link voltage, VDCL_Array, for an array 700 by aggregating, e.g., summing, an average DC link voltage VDCL_Average-Nfor each module 108-N in the array 700. As described below, the LCD 114 can compute, e.g., periodically, an average DC link voltage for the module(s) 108 that it controls and send data indicating the average DC link voltage for each computation to the MCD 114 over a communication path or link 115. In some implementations, the LCD 114 can send data indicating instantaneous DC link voltage measurements and the MCD 112 can determine the average DC link voltage for each module 108 using the data. In an ideal scenario, VAC_Setpoint is sinusoidal, and the DC link voltage VDCL_Arrayis very stable and has a negligible ripple. In this case, the reference signal can be represented by Equation 8 below: Vr = Ψ * sin(ωt) (8) In Equation 8, Ψ is a reference signal scaling factor, e.g., a value between 0 and 1, and ω is the angular frequency. When using the DC link voltage VDCL_Arrayto determine the reference signal Vr, as described above, the reference signal scaling factor Ψ can be expressed as a function of the target peak voltage defined by the AC setpoint and the DC link voltage VDCL_Arrayfor the array 700as per Equation 9 below: Ψ = Vpk / VDCL_Array(9) As described above, the MCD 112 can normalize the reference signal Vr to generate a normalized reference signal Vrn. The MCD 112 sends control information to the LCD 114  Docket No. 56420-0020WO1for each module 108. The control information for a module 108 can include the normalized reference signal Vrn and a modulation index Mi-N, e.g., for balancing as described above for each module 108-N, or a modulated reference signal Vrnm-N to the LCD 114 for each module 108. The normalized reference signal Vrn can be the same for each module 108 in an array 700. However, since the modulated reference signal Vrnm-N for a module 108 is modulated or scaled version of the reference signal Vr using a modulation index Mi for the module 108, the modulated reference signal Vrnm-N can differ between modules 108 in an array 700. Each LCD 114 can generate switching signals for a module 108 using the received control information, as described above. For example, the LCD 114 can use the normalized reference signal Vrn or the modulated reference signal Vrnm-N as Vref (or –Vref) in a PWM control scheme to generate the switching signals, as described above, e.g., with reference to FIGS.8A-8F. In non-distributed systems, the reference voltage Vref that is used to generate switching signals for converters is generated by a controller that has most of or all the information about the system 100, including the DC link voltage and setpoints, as well as other information including, but not limited to, the SOC of each module 108, the temperature of each module 108, the SOH of each module 108, economic dispatch objectives, efficiency strategies, THD targets, and / or other information about the system 100 and its components. Therefore, in non-distributed situations, ripple does not have a significant impact on the AC output voltage for controlling the converters. In such scenarios and with a reference signal Vr that is an ideal sinusoid, the AC output voltage of an array 700 would match the AC voltage setpoint VAC_Setpoint(t). For example, the AC output voltage VAC_outcan be represented by Equation 10 below: VAC_out= Vr * VDCL_Array= (VAC_Setpoint(t) / VDCL_Array) * VDCL_Array= VAC_Setpoint(t) (10) It can be seen that, in an ideal situation, the AC output voltage VAC_out= VAC_Setpoint(t), therefore the ripple does not have any significant negative effect. However, in a distributed cascaded system with a centralized main control device and multiple power output modules, e.g., a system 100 with an MCD 112 in communication with multiple LCDs 114 that control the modules 108, there can be some latency in the communication system between the MCD 112 and LCDs 114. The MCD 112 can receive data indicating the average DC link voltage VDCL_Average-Nfor modules 108 from the LCDs 114 over a relatively slow communication line, such as communication path or link 115. The  Docket No. 56420-0020WO1MCD 112 uses the average DC link information for each module 108 in an array 700 to calculate the reference signal Vr for the array 700. The MCD 112 sends the normalized reference signal Vrn for each array 700 to the LCDs 114 that control the modules 108 in the array 700, or a modulated reference signal Vrnm-N to the LCD 114 for each module 108. In some implementations, the MCD 112 may receive data from the LCDs 114 at a slower rate (e.g., every 500 milliseconds, each second, or another rate) than the MCD 112 sends data to the LCDs 114 (e.g., ~10 kHz – 25 kHz). This rate difference can be due the large amount of data that each LCD 114 sends to the MCD 112, e.g., using multiplexed communication techniques such as time-division multiplexing, as compared to the smaller amount of data that the MCD 112 sends to the LCDs 114. The rate difference can also be attributed to the fact that the control information should be sent the LCDs 114 in a very fast manner for the AC signal output by the modules 108 to track a sinusoidal waveform. In a distributed system, such as that shown in FIGS.7A-7E, for example, the total AC output of an array of modules can be expressed as a product of the reference signal and the sum of DC link voltages for each module, as shown in Equation 11: VAC_out = Vr * ∑ெேୀ^ Vdc^t^ -N (11)where Vdc(t)-N is the fast average DC link voltage for the Nth module. The output voltage from each module, Vout(N) is expressed as Equation 12: Vout(N) = Vr * Vdc(t)-N (12) Vdc(t)-N may include a sinusoidal harmonic ripple component, e.g., k * sin(2ωt). In this example, the reference signal used by the Nth module to generate the switching signals is the reference signal Vr generated by the MCD 112. If balancing is used, the reference signal can be the reference signal Vrnm-N for the item module 108. As described above, the reference signal may also be normalized such that Vr in Equation 12 may be Vrn if balancing is not used. Ideally, Vdc(t)-N is a constant value with no DC ripple, expressed as VDCL_Average, as shown in Equation 13: Vdc(t)-N = VDCL_Average-N (13) The average DC link voltage per module can be written as VDCL_Average-N to specify the average DC link voltage for module N. The output voltage for each module, Vout(N), therefore, can be expressed as Equation 14: Vout(N) = Vr * Vdc(t)-N = Ψ * sin(ωt) * VDCL_Average-N (14)  Docket No. 56420-0020WO1As described above with reference to Equation 9, the reference signal scaling factor Ψ can be expressed as a function of the peak sinusoidal AC output voltage, Vpk: Ψ = Vpk / V DCL_Array (9) Vpk ideally corresponds to the target peak voltage defined by the AC setpoint, VAC_Setpoint. Each module, however, can have its own Vpk so as to output a target output voltage, Vpk-N, where the target output voltage for the array Vpk is equal to the sum of the target output voltage for each module Vpk-N. So, the reference signal scaling factor Ψ can be expressed for each module, according to Equation 15: Ψ = Vpk-N / VDCL_Average-N (15) Note that the MCD 112 does not compute a unique reference signal scaling factor for each module. Equation 15 is a representative expression of the relationship between the reference signal scaling factor, the target output voltage for each module, and the average DC link voltage for each module. In addition, Vdc(t)-N can be expressed as the average DC link voltage for a module 108-N, or VDCL_Average-N. Therefore, the output voltage can finally be expressed as shown in Equation 16: Vout(N) = Vr * Vdc(t)-N = Ψ * sin(ωt) * VDCL_Average-N(16) Applying Equation 10, Equation 16 can be reduced to Equation 17, as follows: Vout(N) = [Vpk-N / VDCL_Average-N]* sin(ωt) * VDCL_Average-N= Vpk_N * sin(ωt) (17) Thus, in the ideal scenario, where no or negligible DC ripple exists on the DC link voltage, the AC output voltage VAC_out generated by a superposition of the Vout(N) of each module 108-N is an ideal sinusoid with amplitude equal to the AC setpoint VAC_Setpoint(t). As mentioned above, however, DC ripple can be introduced onto the DC link voltage from one or more of several sources. Twice (or double) line frequency ripple (2ω ripple) power inherently exists in single phase DC-AC or AC-DC pulse width modulation converters due, at least in part, to instantaneous power unbalance between the DC and AC side. On the DC side, the current does not have dual polarities -- it will be either positive or negative polarities, positive shown in FIG.23. The converter 202 acts like a rectifier on the DC side, such that the DC current resembles a rectified AC current, having unipolar amplitudes. Each half-cycle of the DC signal can be expressed as a sum of the fundamental frequency and a corresponding second harmonic, which has twice the line frequency, as shown in FIG.23. The DC link voltage ripple can cause additional harmonics, especially third order harmonics, in the AC output signal VAC_out. The DC link voltage ripple has a frequency  Docket No. 56420-0020WO1around twice the AC output frequency, e.g., 120 Hz ripple for a 60 Hz output frequency. Note that angular frequency ω = 2πf. Thus, the DC link voltage Vdc(t)-N for a module N can be expressed as shown in Equation 18: Vdc(t)-N = VDCL_Average-N + k * sin(2ωt), (18) where VDCL_Average-N is the average of the DC link voltage of module 108-N and k is an unknown, bounded amplitude of the twice line frequency harmonic sin(2ωt) superimposed on the DC link. The value “k” is unknown because k is a characteristic of the module energy source, but the correction of the DC ripple removes or mitigates the DC ripple independent of the amplitude of the ripple. Taking DC ripple into account, the output voltage can now be written as shown in Equation 19: Vout(N) = Vr * Vdc(t)-N = Ψ * sin(ωt) * [VDCL-Average-N + k * sin(2ωt)] (19) Equation 19 can be rewritten as shown in Equation 20: Vout(N) = Ψ * sin(ωt) * VDCL-Average_N + Ψ * sin(ωt) * k * sin(2ωt) (20) which reduces to Equation 21: Vout(N) = Vpk_N * sin(ωt) + k2 * sin(ωt) * sin(2ωt) (21) where k2 is a product of Ψ and k, as shown in Equation 22: k2 = Ψ *k (22) The products of sins, sin(ωt) * sin(2ωt), can be expressed via trigonometry identity, as Equation 23: sin(ωt) * sin(2ωt) = ½ (cos(2ωt - ωt) – ½ (cos(2ωt + ωt) = ½ (cos(3ωt) + cos(ωt)) (23) Thus, the output voltage for a module N can be expressed as shown in Equation 24: Vout(N) = Vpk-N *sin(ωt) + k2 * [ ½ (cos(3ωt) + cos(ωt)]. (24) Therefore, the DC ripple of k * sin(2ωt) superimposed onto the DC link voltage results in the injection of a third harmonic. Note that the DC ripple expressed as k * sin(ωt) may also include higher-order harmonics. These higher-order harmonics are negligible and can be ignored for the purposes of this discussion. The DC link voltage ripple can contribute to the injection of second order harmonics in the reference signal frequency. The effects of uncompensated harmonic ripple e.g., second and higher order harmonic ripple, can include:  Docket No. 56420-0020WO11. A third order harmonic can be introduced when propagating the reference signal (e.g., fundamental frequency) with added ripple through the system, originating from the trigonometric identity shown in Equation 23: sin(ωt) * sin(2ωt) = 0.5 * (cos(2ωt - ωt) + cos(2ωt + ωt)) = ½ * (cos(3ωt) + cos(ωt)) (23) The additional third harmonic injection can result from the combination of the second order harmonic with the fundamental frequency. This additional third order harmonic injection can result from the multiple LCDs 114 sending DC link voltage measurements to MCD 112 at a slow rate as compared to the rate at which the reference signal is sent to the LCDs 114. 2. Introduction of a fifth order harmonics. For example, if third order harmonic compensation is performed in addition to the fundamental frequency which can be represented as shown in Equation 25: sin(3ωt) * sin(2ωt) = 0.5 * (cos(5ωt) + cos(ωt)) (25) Fifth harmonics can be the unintended consequence of different process steps. For example, when trying to perform third-harmonic compensation, a calculated anti-third harmonic voltage can result in an unintended fifth harmonic, as shown above, particularly if there already exists a second harmonic ripple on the DC link. Similarly, if attempting island detection using a third harmonic disturbance, a fifth harmonic can result when a second harmonic exists on the DC link. 3. Introduction of further higher order harmonics. This specification describes techniques for generating a corrected reference signal Vref_corr- N by an LCD 114 for generating switching signals for switches of the converters 202 that can compensate for DC link voltage ripple without introducing additional harmonics on the AC signal output by the modules 108, or at least a reduction or minimization in the additional harmonics. This reduction in harmonics results in improved THD in the AC signal. FIGS.18A-18B are schematic diagrams illustrating two example implementations of an energy system 100 configured to use corrected reference signals Vref_corr-N to control converter switches. The energy systems 100 of FIGS.18A and 18B can be the same or similar to any of the energy systems 100 described herein, with additional functionality to generate corrected reference signals Vref_corr-N and use the corrected reference signals Vref_corr-N as a switching signal SwS to control switches of the converters 202. The corrected reference signals Vref_corr-N are configured to compensate for harmonics injected onto the AC signal output by modules 108, which can be caused by the reasons mentioned above. Harmonics can also be due to the difference between the DC link voltages at the  Docket No. 56420-0020WO1modules 108 as compared to the DC link voltages used to generate the reference signal Vr, which can be due to the latency between the time at which the DC link voltage data is sent to the MCD 112 and the time at which the reference signal Vr is used (e.g., as either Vrn or Vrnm-N ) to generate the switching signals. The difference between the systems 100 of FIGS.18A and 18B is the control information sent from the MCD 112 to the LCDs 114. In FIG.18A, the MCD 112 sends, as the control information, a modulated reference signal Vrnm-N to the LCDs 114 for controlling the modules 108. In FIG.18B, the MCD 112 sends, at the control information, a normalized reference signal Vrn and a modulation index Mi to the LCDs 114 for controlling the modules 108. Referring to FIG.18A, the system 100 includes an array 700 of modules 108-1 to 108-N. Although only one array 700 is shown in FIG.18A, the system 100 can include multiple arrays 700, as described above. The monitor circuitry 208 (FIGS.2A-2B) of each module 108 can include a voltage sensor for measuring the DC link voltage Vdc(t)-N of the module 108-N and communicating the voltage measurements to the LCD 114 that controls the converter 202 of the module 108. In this example, each LCD 114 can determine an average DC link voltage VDCL_Average-N for its module 108 by averaging multiple DC link voltage measurements Vdc(t)-N received from the monitor circuitry 208. For example, the LCD 114 can receive a DC link voltage measurements Vdc(t)-N periodically and compute the average DC link voltage VDCL_Average-Nfor the last Z measurements, where Z is any integer. In other implementations, the LCD 114 can send the DC link voltage measurements Vdc(t)-N to the MCD 112 and the MCD 112 can determine the average DC link voltage VDCL_Average-Nfor each module 108 using the DC link voltage measurements Vdc(t)-N for the module 108-N. VDCL_Average-Nis the DC component of the DC link voltage communicated from each LCD 114 to the MCD 112 over a slow communication link such as a CAN link. VDCL_Average-N is computed in each LCD 114. The MCD 112 is configured to determine a reference signal Vr for the array 700 based on a total DC link voltage VDCL_Arrayfor the array 700. The total DC link voltage VDCL_Array for the array 700 can be an aggregate of, e.g., a sum of, the average DC link voltages VDCL_Average-1to VDCL_Average-Nof the modules 108-1 to 108-N in the array 700. The MCD 112 can determine the reference signal Vr by dividing an AC voltage setpoint VAC_Setpoint(t) for the array 700 (which can be received from an external control device 104) by the total DC link voltage VDCL_Array for the array 700.  Docket No. 56420-0020WO1As described above, the MCD 114 can normalize this reference signal Vr to generate a normalized reference signal Vrn. The MCD 114 can also generate a modulation index Mi for each module 108-1 to 108-N, e.g., to balance operating characteristics of the modules 108-1 to 108-N, as described above. In this example, the MCD 114 provides the same reference signal Vrn to each LCD 114-1 to 114-N and a respective modulation index Mi-1 to Mi-N to each LCD 114-1 to 114-N. Each LCD 114-1 to 114-N can generate a modulated reference signal Vrnm-N by modulating or scaling the normalized reference signal Vrn using the modulation index Mi-1 to Mi-N. Each LCD 114-1 to 114-N can use its modulated reference signal Mi-1 to Mi-N to generate switching signals SwS-1 to SwS-N, respectively, to control the switches of its converter 202-1 to 202-B, respectively. To compensate for the DC link voltage ripple, each LCD 114-1 to 114-N can generate a corrected reference signal Vref_corr-N and use the corrected reference signal Vref_corr-N to generate the switching signals SwS instead of the modulated reference signal Vrnm-N. As described in more detail below, the corrected reference signal Vref_corr-N for each module 108-1 to 108-N can be based on the modulated reference signal Vrnm-N for the module 108-1 to 108-N and a present DC link voltage measurement Vdc(t)-1 to Vdc(t)-N for the module 108-1 to 108-N, respectively. Each present DC link voltage measurement Vdc(t)-N can be an instantaneous voltage measurement taken at the time (or immediately before) generating the corrected reference signal Vref_corr-N. For example, the present DC link voltage measurement Vdc(t)-N can be the last DC link voltage measurement Vdc(t)-N received by the LCD 114 prior to generating the corrected reference signal Vref_corr-N. In some implementations, each LCD 114 can be configured to generate switching signals SwS periodically based on the most recent control information received from the MCD 114. In this example, each LCD 114 can obtain the most recent modulated reference signal Vrnm-N and the most recent DC link voltage measurement Vdc(t)-N to determine its corrected reference signal Vref_corr-N and its switching signals SwS based its corrected reference signal Vref_corr-N. In implementations in which balancing is not used, the MCD 112 may not send the modulation indices Mi to the LCDs 114. In such implementations, each LCD 114 can generate the corrected reference signal Vref_corr-N for its module 108-N using the normalized reference signal Vrn and the present DC link voltage measurement Vdc(t)-N for the module 108. Referring now to FIG.18B, the MCD 112 can be configured to generate the modulated reference signal Vrnm-N for each module 108, respectively. The MCD 112 can  Docket No. 56420-0020WO1send, as the control information, the modulated reference signals Vrnm-N to the LCDs 114, respectively. In this example, each LCD 114 can generate its corrected reference signal Vref_corr-N using the modulated reference signal Vrnm-N and the present DC link voltage measurement Vdc(t)-N, respectively. FIG.18A and FIG.18B are similar, except that in FIG. 18A, the MCD 112 sends Vrn and mi-N to the corresponding LCD 114-N; whereas in FIG. 18B, the MCD 112 sends Vrnm-N to the corresponding LCD 114-N. FIG.19A is a schematic diagram illustrating a circuit network 1900 for generating switching signals using a reference signal correction factor. The circuit network 1900 can be a part of any energy system 100 described herein. The circuit network 1900 includes an MCD 112 in communication with an example LCD 114-N over a communication path 115-1. Generally, FIG.19A shows how an LCD 114-N generates switching signals SwS 1804-N for controlling switches in converter 202 of module 108-N. The example LCD 114-N includes an average generator 1902, a correction factor generator 1903, combiners 1906 and 1912, and a modulator 1908. Each of these components can be implemented in hardware and / or software, e.g., as part of the processing circuitry 120 of the LCD 114-1. For hardware implementations, the components can be communicatively coupled using communication paths or links. Combiners 1906 and 1912 can perform product operations on their respective inputs. The LCD 114-N receives DC link voltage Vdc(t)-N measurement from a voltage sensor of the converter 202-N. The monitor circuitry 208, for example, can sense the DC link voltage Vdc(t)-N of the module 108-N and provide the DC link voltage measurement Vdc(t)- N to the LCD 114-N over communication path or link 116-N. The average generator 1902 can compute an average of multiple DC link voltage measurements VDCL_Average-N. The average generator 1902 can output an average value of the DC link voltage VDCL_Average-Nto the correction factor generator 1903. In addition, the LCD 114-N can send the average value of the DC link voltage VDCL_Average-1 to the MCD 112 over the communication path or link 115-N. The average value of the DC link voltage, VDCL_Average-1 can be the average DC link voltage Vdc(t)-N over a predetermined number of samples or for a number of samples taken over a predetermined amount of time. The LCD 114-N can provide the average DC link voltage VDCL_Average-1 to the MCD 112 continuously as the LCD 114-N determines the average values. For example, the LCD 114-N can provide each average DC link voltage VDCL_Average-N to the MCD 112 as soon as the value is determined. In another example, the LCD 114-N can provide the average DC link voltages VDCL_Average-N to the MCD 112 periodically.  Docket No. 56420-0020WO1The LCD 114-N can also use the average DC link voltage VDCL_Average-N to derive a reference signal correction factor ref_corr-1 using a present DC link voltage for the module Vdc(t)-N. In some implementations, the reference signal correction factor ref_corr-1 can be determined based on the present DC link voltage Vdc(t)-N and a most recently determined average DC link voltage VDCL_Average-1. For example, the correction factor generator 1903 can be configured to determine the reference signal correction factor ref_corr-1 using Equation 26 below: ref_corr-N = VDCL_Average-N / Vdc(t)-N (26) In Equation 26, ref_corr-Nis the reference signal correction factor, VDCL_Average-N is the most recently determined average DC link voltage for the module 108-1, and Vdc(t)-N is the present DC link voltage for the module 108-1, which can be the most recent DC link voltage measurement received from the monitor circuitry 208 of the converter 202 of the module 108-1. In this example, the MCD 112 includes a reference signal generator 1910 that is configured to generate the reference signal Vr. The MCD 112 can receive each data indicating each average DC link voltage VDCL_Average-1 from the LCD 114-1 over the communication path or link 115-1 and an AC voltage setpoint VAC_Setpoint from an external control device 104 over the communication path or link 105. The reference signal generator 1910 can use the average DC link voltage VDCL_Average-1and the AC voltage setpoint VAC_Setpoint to determine the reference signal Vr. Reference voltage generator 1910 is electrically coupled to controller 900 / 950. Reference voltage generator 1910 outputs reference signal Vr to the controller 900 / 950 using a communication path or link. Referring now to FIG.19B, this figure is a schematic diagram of an example reference voltage generator 1910. In this example, the reference signal generator 1910 can include an aggregator 1952 that receives the average DC link voltages VDCL_Average-1from LCD 114-1. The aggregator 1952 also receives respective average DC link voltages VDCL_Average-2to VDCL_Average-Nfor each other module 108-2 to 108-N in an array 700 that includes the module 108-1. The aggregator 1952 can determine the total DC link voltage for the array VDCL_Arrayby aggregating, e.g., summing, the individual average DC link voltages VDCL_Average-1–N from each LCD 114-1 to 114-N. The reference signal generator 1910 includes a Vr generator 1956. The Vr generator 1956 can receive the AC voltage setpoint VAC_Setpoint and the total DC link voltage VDCL_Array for the array. The Vr generator 1956 can generate and output a reference signal Vr based on  Docket No. 56420-0020WO1the VAC_Setpoint and the total DC link voltage VDCL_Array for the array using Equation 14 shown above. Referring back to FIG.19A, the reference signal generator 1910 can be communicatively connected to a controller, which can be the same as, or similar to, controller 900 or 950 described above with reference to FIGS.9A-9B. The reference signal generator 1910 can communicate the reference signal Vr to the controller 900 / 950. The controller 900 / 950 can generate a normalized reference signal Vrn for the array 700 that includes module 108-1 in a manner similar to that described above with reference to FIGS.9A-B. The MCD 112 can provide the normalized reference signal Vrn to the LCD 114-1 using communication path or link 115-1. The controller 900 / 950 can also generate a modulation index Mi-1 for the module 108-1 (the controller 900 / 950 can create a modulation index for each module 108 in the array 700) in a manner similar to that described above with reference to FIGS.9A- B. For example, the controller 900 / 950 can generate a modulation index Mi for each module 108-1 to 108-N in an array 700 using status information received from each module 108-1 to 108-N in the array 700, as described above. In the example implementation shown in FIG.19A, the MCD 112 outputs the normalized reference signal Vrn and the modulation index Mi-1 for the module 108-1 to the LCD 114-1 using the communication path or link 115-1. The LCD 114-N can modulate or scale the reference signal Vrn using the modulation index Mi-1 e.g., using the combiner 1912 of the LCD 114-N to create a modulated reference signal Vrnm-N. The combiner 1912 can perform a product operation on the inputs; and in this case, the combiner 1912 can combine the normalized reference signal Vrn with the modulation index Mi-1 to output a modulated reference signal Vrnm-N. In some implementations, the combiner 1912 can reside in the MCD 112, and the MCD 112 can send a modulated reference signal Vrnm-N to the LCD 114-1 over the communication path or link 115-1. Returning to LCD 114-1, the normalized reference signal Vrn is received by LCD 114-1, in some implementations with the modulation index Mi-1. In some implementations, the combiner 1912 can modulate or scale the normalized reference signal Vrn using the modulation index Mi-1 to generate a modulated reference signal Vrnm-1. The LCD 114-1 does not have to apply the modulation index Mi-1, and can use Vrn to generate switching signals, e.g., if balancing is not used or inactive. The correction factor generator 1903 can generate a reference signal correction factor ref_corr-1, e.g., using Equation 5 above. FIG.19C is a schematic diagram of an example correction factor generator 1903. The example correction factor generator 1903 can receive  Docket No. 56420-0020WO1the present DC link voltage VDCL-1 from the module 108-N. In this example, the correction factor generator 1903 includes a low pass filter 1962. The DC link voltage VDCL-1may exhibit a twice-line frequency harmonic ripple. This tice-line frequency harmonic ripple can be a ripple at twice the frequency of the AC output signal that is output by the array 700 of modules 108. The low pass filter 1962 can be structured to filter switching noise without affecting the twice-line frequency harmonic on the DC link voltage Vdc(t)-N. The output of the low pass filter 1964 is a filtered DC link voltage VDCL_Filtered. The filtered DC link voltage VDCL_Filtered can be used to create the reference signal correction factor ref_corr-1 by reference signal correction factor generator circuitry 1966. In some implementations, the reference signal correction factor generator circuitry 1966 can generate a reference signal correction factor ref_corr-1 using Equation 5 above, where VDCL_Filteredis used for Vdc(t)-N. The low pass filter 1962 is optional and be omitted in some implementations. The reference signal correction factor generator circuitry 1966 can output the reference signal correction factor ref_corr-1 to a combiner 1906 of the LCD 114-1 for generating a corrected reference signal Vref_corr-N. Referring back to FIG.19A, the low pass filter 1962 can be arranged between an input of the LCD 114 that receives the DC link voltage VDCL-1 and the average generator 1902 and the correction factor generator 1903. In this way, the average generator 1902 can generate the average DC link voltage VDCL_Average-1 using the filtered DC link voltage measurements VDCL_Filteredas well as the correction factor generator 1903. The a combiner 1906 is configured to combine, e.g., determine a product of, the reference signal correction factor ref_corr-1 and the modulated reference signal Vrnm-1. For example, the combiner 1906 can be configured to modulate or scale the modulated reference signal Vrnm-1 using the correction factor ref_corr-1. The output of the combiner 1906 is the corrected reference signal Vref_corr-N for the module 108-1. The modulator 1908 uses the corrected reference signal, Vref_corr-1 to generate switching signals SwS-1 for controlling at least one converter 202 of the module 108-1. The switching signal SwS-11804 is generated using the corrected reference signal Vref_corr-1 using the PWM techniques described above with reference to FIGS.8 and 9. For example, the modulator 1908 can use PWM techniques described above or hysteresis techniques to generate the switching signals SwS-1 using the corrected reference signal Vref_corr-1, e.g., instead of the modulated reference signal Vrnm-1.  Docket No. 56420-0020WO1Returning briefly to the equations defining reference signals and corresponding DC ripple: Vr = Ψ * sin(ωt); Ψ = Vpk-N / VDCL_Average-N Vout(N) = Vr * Vdc(t)-N; Vdc(t)-N = VDCL_Average-N + k * sin(2ωt), with ripple; Vout(N) = Vr * Vdc(t)-N = Ψ * sin(ωt) * [VDCL_Average-N+ k*sin(2ωt)] = Vpk * sin(ωt) + k2*sin(ωt)*sin(2ω) With the application of the reference signal correction factor ref_corr-N = VDCL_Average-N / Vdc(t)-N of Equation 26, the effect of using correction factor addresses the ripple superimposed onto the DC link voltage, as shown in Equation 27: Vout(N) = Vr * Vdc(t)-N * ref_corr-N (27) = Ψ * sin(ωt) * Vdc(t)-N * ref_corr-N = Ψ * sin(ωt) * Vdc(t)-N * [VDCL_Average-N / VDCL_Array] = [Vpk-N / VDCL_Average-N] * sin(ωt) * Vdc(t)-N * [VDCL_Average-N / Vdc(t)] = [Vpk-N / VDCL_Average-N] * sin(ωt) * VDCL_Average-N = Vpk-N * sin(ωt) where reference signal correction factor ref_corr-N = VDCL_Average-N / Vdc(t)-N (Equation 26). Thus, using the reference signal correction factor, the output voltage of the module reduces to Equation 17: Vout(N) = Vpk-N * sin(ωt), (17) which is the output voltage for a module in the scenario with no DC ripple. The reference signal correction factor can mitigate the affects of the third order harmonics independent of the amplitude of the twice line frequency AC signal, k. The same operations can be performed for each module 108 in the array 700. That is, a respective correction factor ref_corr-N can be determined for each module 108 and that correction factor ref_corr-N can be used to determine a corrected reference signal Vref_corr- N for the module 108, using the same techniques as described above for module 108-1. The appropriate switching signals SwS can be provided to each module 108 by the LCD 114 that controls the converter 202 of the module 108. Table 2 below shows that total harmonic distortion (THD) can be improved by applying a reference signal correction factor ref_corr-N to the modulated reference signal  Docket No. 56420-0020WO1Vrnm-N to generate a corrected reference signal, Vref_corr-N. Accordingly, THD can be improved without applying additional harmonic compensation. Table 2. Comparison of observed THD with and without DC link ripple compensation DC link correction h correction techniques described herein are used. The second row (No) shows electrical signal values when the harmonic correction techniques described herein are not used. The first column shows the THD for the AC current output by an array 700 of modules 108. THD is represented as a percentage or in decibels. When represented by percentages, the THD is the ratio of the sum of the powers of all harmonic components to the power of the fundamental frequency. As shown in Table 1, applying the correction techniques described herein, the THD can be lowered from 1.13 % to 0.95%. The value Iac_1h is the fundamental frequency peak value. Then, each subsequent column is the percentage of harmonic distortion for each of the 3rd, 5th, 7th, 9th, 11th, and 13thharmonics on the output current Iac of the array 700. FIG.20A is a graphical representation of a measured, unfiltered DC link voltage Vdc(t)-N 2002 for a of module. As shown in this figure, the DC link voltage is not at an ideal constant level, but includes noise from switching. The DC link voltage Vdc(t)-N 2002 also includes ripple that makes the voltage level vary between around 46 VDC and 50 VDC. This ripple can be at twice the AC output voltage frequency for an array 700 of modules 108. FIG.20B is a graphical representation of the slow average DC link voltage VDCL_Average-N2004 for a module 108. VDCL_Average-N2004 represents the value calculated by the LCD 114 from instantaneous DC link voltages sampled at a node on the DC side of a module’s converter. The term “slow average” or “slow moving average” can include an operation that calculates the average of the DC link voltages over a relatively large amount of time, as compared to a fast average. The averaging can be performed using parameters that are selected by an operator that result in a moving average that is relatively stable.  Docket No. 56420-0020WO1VDCL_Average-N values are sent by the LCD 114 to the MCD 112 over a “slow” communication path or link, like communication path or link115. The average DC link voltage VDCL_Average-Ncan be determined by averaging DC link voltages Vdc(t)-N from a module 108-N by the LCD 114, as described above. The average DC link voltage VDCL_Average-N can be used to determine the reference signal correction factor ref_corr-N at the LCD 114 and to determine the reference signal Vr at the MCD 112. The path or link can be a CAN (1s-2s sample rate) or other communication path or link. It typically contains only DC (or very slow moving AC), and loses the ripple information that occurs at twice the line frequency. FIG.20C is a graphical representation of filtered (near)-instantaneous sampled DC link voltage VDCL_Filtered 2006 superimposed with the non-filtered DC link voltage Vdc(t)-N 2002 shown in FIG.20A. The DC link voltage Vdc(t)-N is obtained by the LCD 114 for each module 108 by the LCD 114. The Vdc(t)-N is used to determine the reference signal correction factor ref_corr-N 1904 (shown as 2008 in FIG.20D). The DC link voltage Vdc(t)-N is filtered (e.g., using the low pass filter 1962 of FIG.19C) just enough to remove the switching noise, e.g., using a low pass filter with a 200 Hz, 500 Hz, or other appropriate cutoff, without filtering the ripple on the DC link voltage Vdc(t)-N. This ripple can be at twice the frequency of the AC output signal (e.g., 120 Hz for a 60 Hz AC output), resulting in second and higher order harmonics on the AC output signal, as described above. Maintaining the second harmonics in the VDCL_Array allows for the use of Vdc(t)-N to calculate the reference signal correction FIG.20C shows the filtered DC link voltage VDCL_Filtered2006 superimposed on the actual unfiltered DC link voltage Vdc(t)-N 2002 to the effectiveness of the filtering in removing the switching noise. As can be seen in this figure, the filtered signal VDCL_Filtered 2006 includes the ripple at twice the AC output signal frequency, but the switching noise that occurs at higher frequencies. Fig.20C shows how the 120 Hz ripple can be extracted from the noisy Vdc(t)-N 2002 shown in FIG.20A. A low pass filter can be used to keep the 120 Hz ripple information, while filtering out the high frequency switching noise that can adversely impact the determination of the reference signal correction factor. Examples of low pass filters include, a moving window average filter with a size of 1 / fsw, where fsw is switching frequency. Or a 1st order butterworth filter can be used. Generally, a “fast low pass filter” can be used to remove the switching noise while maintaining the 120 Hz ripple. It is desirable to maintain the 120 Hz ripple on the filtered Vdc(t)-N so that Vdc(t)-N can be used to calculate the reference signal correction factor to remove the DC ripple.  Docket No. 56420-0020WO1FIG.20D is a graphic representation of a reference signal correction factor ref_corr-N 2008, which is derived from VDCL_Average-N / Vdc(t)-N. This reference signal correction factor ref_corr-N 2008 can be used to correct the reference signal Vrn or Vrnm-N for generating switching signals to control switches of the converter 202. Note that the reference signal correction factor ref_corr-N has its peaks where the dc-ripple has its troughs. Conceptually, this phase alignment means that the module overcompensates when the instantaneous DC link voltage is low and then undercompensates when the DC link voltage is high, thus “averaging” out the effects on the desired output voltage. FIG.21 is a flow diagram showing an example method 2100 for generating switching signals for controlling a converter 202. The method 2100 can be used in any system 100 described herein. At the outset, an LCD 114 determines (2102) an average DC link voltage (VDCL_Average) for each module 108 controlled by the LCD 114. The LCD 114 can obtain / sample measurements of DC link voltage Vdc(t)-N over the course of a specified time period or receive a predefined number of samples, and determine the average of the DC link voltage measurements (VDCL_Average). The LCD 114 provides (1204) the average DC link voltage (VDCL_Average) to the MCD 112. The MCD 112 can send (2106) control information to LCDs 114. The control information can include the normalized reference signal Vrn and, optionally, a modulation index Mi, or a modulated reference signal Vrnm-N , as described above. In some implementations, the control information can include a normalized reference signal Vrn determined for the modules 108 in each array 700 from a setpoint voltage VAC_Setpointand the total DC link voltages VDCL_Array of the modules 108 in the array 700 received from the LCDs 114. For example, the MCD 112 can determine a reference voltage Vr by dividing the voltage setpoint VAC_Setpoint by the total DC link voltage VDCL_Array for the array 700. The MCD 112 can normalize Vr to generate a normalized reference signal Vrn. The MCD 112 can also generate and send respective modulation indices Mi-1 to Mi-N to the LCDs 114. In some implementations, the MCD 112 can modulate the normalized reference signal Vrn with the modulation index Mi, and can send a respective modulated reference signal Vrnm-N to each corresponding LCD 114-1 to 114-N in the array 700. The LCD 114 can receive (2108) the control information from the MCD 112. Each LCD 114 determines (2110) a reference signal correction factor ref_corr-N for the module(s) 108 controlled by the LCD 114. In some implementations, the LCD 114 determines the reference signal correction factor ref_corr-N for a module 108 based on a present DC link voltage measurement Vdc(t)-N obtained by the LCD 114 by sampling the module’s DC link  Docket No. 56420-0020WO1voltage. For example, the LCD 114 can determine the reference signal correction factor ref_corr-N by dividing the average DC link voltage VDCL_Average-Nsent to the MCD 112 by the present DC link voltage measurement Vdc(t)-N. In another example, the LCD 114 can determine the reference signal correction factor ref_corr-N by dividing a previous instantaneous DC link voltage measurement by the new DC link voltage measurement Vdc(t)-N. The previous instantaneous DC link voltage measurement can be the last instantaneous DC link voltage measurement obtained by the LCD 114 prior to determining the average DC link voltage VDCL_Average-Nsent to the MCD 112. Noteworthy is that it is assumed that DC link information that the MCD 112 receives from the LCDs 114 is the slow averaged value. This slow average value does not change quickly over time. However, the actual DC link voltage changes quickly. The reference signal correction factor ref_corr-N can be derived from the ratio of both the slow average value and the fast DC link voltage: ref_corr-N = VDCL_Average-N / Vdc(t)-N. The LCD 114 generates (2112) a corrected reference signal Vref_corr-N based on the reference signal correction factor. The LCD 114 can generate the corrected reference signal Vref_corr-N by applying the reference signal correction factor Vref_corr-N to the normalized reference signal Vrn or modulated reference signal Vrnm-N received from the MCD 112. The LCD 114 generates (2112) switching signals for the converter 202 using the corrected reference signal Vref_corr-N. The LCD can generate the switching signals using a PWM technique, as described elsewhere herein or another technique, e.g., hysteresis. The LCD operates (2114) switches of the converter 202 using the switching signals. FIG.22 is a flow diagram of an example method 2200 for generating a reference signal. The method 2200 can be used in any system 100 described herein. An MCD 112 receives (2202) a setpoint voltage VAC_Setpoint e.g., from an external control device 104, and an average DC link voltage VDCL_Average-Nfor each module 108, e.g., from the LCDs 114 that control the modules 108. The MCD 112 determines (2204) a reference voltage Vr from VAC_Setpointand an aggregation of the average DC link voltage VDCL_Average. The MCD 112 generates (2206) a normalized reference signal Vrn from the reference voltage Vr. For example, the MCD 112 can normalize the reference voltage and generate a normalized reference signal Vrn as described above. The MCD 112 can determine (2208) a modulation index (Mi) for each module 108, as described above. The MCD 112 provides (2210) the normalized reference signal Vrn and optionally modulation index Mi to the appropriate LCD 114, which generates a modulated reference signal Vrnm-N using the normalized reference signal Vrn and the modulation index Mi and uses the modulated reference signal Vrnm-N to  Docket No. 56420-0020WO1generate switching signals to control a converter 202 of the module 108, e.g., after applying a reference signal correction factor to the modulated reference signal, as described above. Various aspects of the present subject matter are set forth below, in review of, and / or in supplementation to, the implementations described thus far, with the emphasis here being on the interrelation and interchangeability of the following implementations. In other words, an emphasis is on the fact that each feature of the implementations can be combined with each and every other feature unless explicitly stated or taught otherwise. In many embodiments, an energy storage system includes a plurality of modules connected together in a plurality of arrays. Each array is configured to output an AC voltage signal including a superposition of output voltages from the modules of that array. Each module includes an energy source and switch circuitry controllable to selectively output a positive DC output voltage, zero output voltage, or negative DC output voltage from the energy source. The energy storage system includes a control system configured to control the switch circuitry of each module. The control system includes a main control device configured to generate control information comprising a reference signal and a local control device coupled to the main control device to receive the control information from the main control device. The local control device is configured to: generate a corrected reference signal for a module using a reference signal correction factor based on the module’s present DC link voltage and one or more previous DC link voltage measurements and control the switch circuitry of the module using the corrected reference signal. In many embodiments, and energy storage system includes a control system configured to control the switch circuitry of a plurality of modules. Each module of the plurality of modules includes switch circuitry and an energy source. The control system includes a main control device configured to generate control information comprising a reference signal and a local control device coupled to the main control device to receive the control information from the main control device. The local control device is configured to generate a corrected reference signal for a module of the plurality of modules using a reference signal correction factor based on the module’s present DC link voltage and one or more previous DC link voltage measurements and control the switch circuitry of the module using the corrected reference signal. In some embodiments, the local control device is configured to generate the reference signal correction factor based on the module’s present DC link voltage measurement and an average of multiple previous DC link voltage measurements.  Docket No. 56420-0020WO1In some embodiments, the local control device is configured to generate the reference signal correction factor by dividing the average of multiple previous DC link voltage measurements by the module’s present DC link voltage measurement. In some embodiments, the local control device includes an averaging circuit element configured to determine the average of multiple previous DC link voltage measurements using instantaneous DC link voltage measurements sensed by a voltage sensor for each module. In some embodiments, the main control device is configured to generate the reference signal based on average DC link voltage measurements for each module. In some embodiments, the main control device is configured to generate a respective reference signal for each array based on a sum of the average DC link voltage measurements for each module in the array. In some embodiments, the main control device is configured to generate, for each module, a modulation index for balancing one or more operating characteristics of the module relative to other modules of the plurality of modules. In some embodiments, the reference signal is a modulated reference signal generated by modulating or scaling an original reference signal using a modulation index. In some embodiments, the main control device is configured to generate a respective modulation index for each module and to generate a respective modulated reference signal for each module using the respective modulation index for the module. In some embodiments, the control information sent to the local control device comprises a modulation index for each module for which the local control device operates the switch circuitry. In some embodiments, each local control device is configured to generate a modulated reference signal for each module for which the local control device operates the switch circuitry by modulating or scaling the reference signal using the modulation index for the module. In some embodiments, the local control device is configured to generate the corrected reference signal by modulating or scaling the modulated signal using the reference signal correction factor. In some embodiments, the local control device is configured to apply the reference signal correction factor to the reference signal to generate the corrected reference signal and to generate a switching signal using the corrected reference signal.  Docket No. 56420-0020WO1In some embodiments, the local control device is configured to apply the reference signal correction factor to the reference signal by modulating or scaling the reference signal using the reference signal correction factor. In some embodiments, each local control device is configured to generate a switching signal using pulse width modulation. In some embodiments, the energy storage system includes a plurality of local control devices. In many embodiments, a method for controlling a converter by a local control device coupled to a plurality of converters includes generating a corrected reference signal for the converter using a reference signal correction factor based on a present DC link voltage for the converter and one or more previous DC link voltage measurements, and controlling switch circuitry of the converter using the corrected reference signal. In some embodiments, the method includes generating, by the local control device, the reference signal correction factor based on a present DC link voltage measurement and an average of multiple previous DC link voltage measurements. In some embodiments, generating the reference signal correction factor includes dividing the average of multiple previous DC link voltage measurements by the present DC link voltage measurement. In some embodiments, the method includes determining the average of multiple previous DC link voltage measurements using an averaging circuit element in the local control device using instantaneous DC link voltage measurements sensed by a voltage sensor for the converter. In some embodiments, the method includes receiving a reference signal from a main control device, the reference signal based on average DC link voltage measurements for each of the plurality of converters. In some embodiments, the reference signal is generated by the main control device based on a sum of average DC link voltage measurements for each of the plurality of converters. In some embodiments, the method includes receiving, for each converter, a modulation index from a main control device for balancing one or more operating characteristics of each converter connected to the local control device. In some embodiments, the reference signal is a modulated reference signal generated by modulating or scaling an original reference signal using a modulation index.  Docket No. 56420-0020WO1In some embodiments, the method includes receiving, from the main control device a respective modulation index for each power converter the local control device is connected to and to generate a respective modulated reference signal for each power converter using the respective modulation index for the converter. In some embodiments, the method includes receiving, by the local control device, control information from a main control device, the control information received by the local control device comprising a modulation index for the power converter for which the local control device operates the switch circuitry. In some embodiments, the method includes generating, by the local control device, a reference signal correction factor for the reference signal based on the average DC link voltages and an instantaneous value of the DC link voltage sensed by the local control device from the power converter. In some embodiments, the local control device is configured to apply the reference signal correction factor to the reference signal to generate a corrected reference signal and to generate a switching signal from the corrected reference signal. In some embodiments, the method includes generating the switching signal using pulse width modulation. In some embodiments, the method includes applying the reference signal correction factor to the reference signal by modulating or scaling the reference signal using the reference signal correction factor. In some embodiments, the method includes generating the corrected reference signal by modulating or scaling the modulated signal using the reference signal coefficient. In some embodiments, the energy storage system includes a plurality of local control devices. In many embodiments, an energy storage system includes a plurality of modules connected together in a plurality of arrays. Each array configured to output an AC voltage signal including a superposition of output voltages from the modules of that array. Each module includes an energy source and switch circuitry controllable to selectively output a positive DC output voltage, zero output voltage, or negative DC output voltage from the energy source. The energy storage system includes a control system configured to control the switch circuitry of each module based on overcurrent prediction. The control system includes a current predictor configured to generate, for each of one or more output currents of the energy system, a future value of the output current based on a gradient of a phase of the output current and predict an overcurrent event based on the generated future value of at least  Docket No. 56420-0020WO1one of the one or more output currents. The control system is configured to alter operation of at least one module of the plurality of modules in response to predicting the overcurrent event. In some embodiments, the control system is configured to determine the gradient based on a rate of change of a phase of the output current. In some embodiments, the control system is configured to determine the gradient based on a delay value defining a point separation for the rate of change determination. In some embodiments, the delay value identifies a sampling rate for identifying the point separation for determining the gradient. In some embodiments, the control system uses the delay value to determine a normalized gradient. In some embodiments, the control system comprises a shift register configured to normalize the gradient based on the delay value. In some embodiments, the delay value comprises a value based on a power of two. In some embodiments, the current predictor is configured to predict an output current for a future point in time using a predetermined time horizon value. In some embodiments, the control system is configured to determine the absolute value of the future value of the output current. In some embodiments, the control system is configured to predict an overcurrent event based on comparing, by a comparator circuit element, the absolute value of the predicted future value of the output current with an overcurrent threshold. In some embodiments, the control system comprises an enable input to either enable activation of the overcurrent prediction or disable activation of the overcurrent prediction. In some embodiments, the control system is configured to store an overcurrent event state in a state machine, the overcurrent event state indicating the prediction of the overcurrent event and read the overcurrent event state from the state machine to alter operation the at least one of the plurality of modules. In some embodiments, the energy storage system includes a trip pulse generator to receive an indication of the overcurrent event state and generate a trip pulse to cause the local control device associated with the at least one module to cease switching operation of the at least one module. In some embodiments, the energy storage system includes a trip pulse generator to receive an indication of the predicted overcurrent event and generate a pulse signal to cause a  Docket No. 56420-0020WO1local control device associated with the at least one module to control the at least one module to enter into a current limiting operational state. In some embodiments, the local control device comprises circuitry to activate a current limiting state based on a received pulse signal. In some embodiments, the control system is configured to receive, as an input to a current prediction circuit in the control system, a scaled representation of the output current, and filtering the scaled representation of the output current to reduce noise. In some embodiments, at least a portion of the one or more output currents is output by a corresponding module of the plurality of modules. In some embodiments, at least one of the one or more output currents is output by a corresponding array of the plurality of arrays. In some embodiments, the one or more output currents comprises one output current, and the one output current is output from the energy storage system. In some embodiments, the control system is configured to reduce energy output of at least one module of the plurality of modules in response to predicting the overcurrent event. In some embodiments, the control system is configured to cease operation of at least one module of the plurality of modules in response to predicting the overcurrent event. In some embodiments, the control system is configured to cease operation of each module in an array in response to predicting the overcurrent event for an output of the array. In some embodiments, the control system is configured to reduce energy output of all of the plurality of modules in response to predicting the overcurrent event for an output of the energy storage system. In some embodiments, the control system is configured to reduce energy output of all of the plurality of modules in response to predicting the overcurrent event for an output of the energy storage system. In some embodiments, the control system is configured to trip one or more breakers in response to predicting the overcurrent event. In many embodiments, a method for predicting an overcurrent event state in an energy storage system includes determining a gradient of a signal representative of an output current of a plurality of modules of the energy storage system; determining a future value of the output current based on applying the gradient to the signal representative of the output current; comparing the predicted output current to a threshold; and determining the overcurrent event state based on the predicted output current being greater than or equal to  Docket No. 56420-0020WO1the threshold; or determining a normal state based on the predicted output current being less than the threshold. In some embodiments, the method includes filtering the received signal representative of the output current to generate a filtered signal with reduce noise. In some embodiments, the method includes sampling the filtered signal using a delay value to determine the gradient of the filtered signal. In some embodiments, the method includes multiplying the gradient by a time horizon to generate a time-horizon factored gradient, the time horizon defining an amount of time into the future to predict a future value of the output current. In some embodiments, the method includes applying the time-horizon factored gradient to the received signal representative of the output current to generate a future value of the output current. In some embodiments, the method includes generating an absolute value of the future value of the output current. In some embodiments, the method includes comparing the absolute value of the future value of the output current to threshold. In some embodiments, the method includes, upon determining the overcurrent event state, causing a local control device to alter an operational state a connected module. In some embodiments, altering the operational state of the connected module includes ceasing operation of the module. In some embodiments, the method includes causing the local control device to cease switching of the connected power converter module includes generating a trip pulse by a trip pulse generator and sending the trip pulse to the local control device using a dedicated communication path to cause the local control device to cease switching the connected module. In some embodiments, altering the operational state of the connected module includes causing the module to enter a current limiting operational state. In some embodiments, causing the module to enter the current limiting operational state includes generating a pulse signal by a trip pulse generator indicating activation of circuitry to control the current limiting operational state and sending the pulse signal to the local control device using a dedicated communication path to cause the local control device to control the connected module to enter in the current limiting operational state.  Docket No. 56420-0020WO1In some embodiments, the received signal representative of the output current comprises a signal representative of one phase of the output current. In some embodiments, the determination of the overcurrent event state is a determination that one phase of the future value of the output current indicates an overcurrent event state. In some embodiments, the trip pulse is sent to the local control device to cause the local control device to cease switching operations for a module associated with the one phase of the output current. In some embodiments, each of the one or more output currents is output by a corresponding module of the plurality of modules. In some embodiments, each of the one or more output currents is output by a corresponding array of the plurality of arrays. In some embodiments, the one or more output currents comprises one output current, and the one output current is output from the energy storage system. In some embodiments, the method includes receiving a signal representative of the output current of the plurality of modules prior to determining the gradient of the signal representative of the output current of the plurality of modules of the energy storage system. In some embodiments, the method includes reducing energy output of at least one module of the plurality of modules in response to determining the overcurrent event state. In some embodiments, the method includes ceasing operation of at least one module of the plurality of modules in response to determining the overcurrent event state. In some embodiments, the method includes ceasing operation of each module in an array in response to determining the overcurrent event state for an output of the array. In some embodiments, the method includes reducing energy output of all of the plurality of modules in an array response to determining the overcurrent event state for an output of the array. In some embodiments, the method includes reducing energy output of all of the plurality of modules in response to determining the overcurrent event state for an output of the energy storage system. In some embodiments, the method includes tripping one or more breakers in response to determining the overcurrent event state.The term “module” as used herein refers to one of two or more devices or sub-systems within a larger system. The module can be configured to work in conjunction with other modules of similar size, function, and physical arrangement (e.g., location of electrical terminals, connectors, etc.). Modules having the same function and  Docket No. 56420-0020WO1energy source(s) can be configured identical (e.g., size and physical arrangement) to all other modules within the same system (e.g., rack or pack), while modules having different functions or energy source(s) may vary in size and physical arrangement. While each module may be physically removable and replaceable with respect to the other modules of the system (e.g., like wheels on a car, or blades in an information technology (IT) blade server), such is not required. For example, a system may be packaged in a common housing that does not permit removal and replacement any one module, without disassembly of the system as a whole. However, any and all implementations herein can be configured such that each module is removable and replaceable with respect to the other modules in a convenient fashion, such as without disassembly of the system. The term “output” is used herein in a broad sense, and does not preclude functioning in a bidirectional manner as both an output and an input. Similarly, the term “input” is used herein in a broad sense, and does not preclude functioning in a bidirectional manner as both an input and an output. The terms “terminal” and “port” are used herein in a broad sense, can be either unidirectional or bidirectional, can be an input or an output, and do not require a specific physical or mechanical structure, such as a female or male configuration. Various aspects of the present subject matter are set forth below, in review of, and / or in supplementation to, the implementations described thus far, with the emphasis here being on the interrelation and interchangeability of the following implementations. In other words, an emphasis is on the fact that each feature of the implementations can be combined with each and every other feature unless explicitly stated otherwise or logically implausible. Processing circuitry can include one or more processors, microprocessors, controllers, and / or microcontrollers, each of which can be a discrete or stand-alone chip or distributed amongst (and a portion of) a number of different chips. Any type of processing circuitry can be implemented, such as, but not limited to, personal computing architectures (e.g., such as used in desktop PC’s, laptops, tablets, etc.), programmable gate array architectures, proprietary architectures, custom architectures, and others. Processing circuitry can include a digital signal processor, which can be implemented in hardware and / or software. Processing circuitry can execute software instructions stored on memory that cause processing circuitry to take a host of different actions and control other components. Processing circuitry can also perform other software and / or hardware routines. For example, processing circuitry can interface with communication circuitry and perform analog-to-digital conversions, encoding and decoding, other digital signal processing,  Docket No. 56420-0020WO1multimedia functions, conversion of data into a format (e.g., in-phase and quadrature) suitable for provision to communication circuitry, and / or can cause communication circuitry to transmit the data (wired or wirelessly). Processing circuitry can also be adapted to execute the operating system and any software applications, and perform those other functions not related to the processing of communications transmitted and received. Computer program instructions for carrying out operations in accordance with the described subject matter may be written in any combination of one or more programming languages, including computer and programming languages. A non-exhaustive list of examples includes hardware description languages (HDLs), SystemC, C, C++, C#, Objective- C, Matlab, Simulink, SystemVerilog, SystemVHDL, Handel-C, Python, Java, JavaScript, Ruby, HTML, Smalltalk, Transact-SQL, XML, PHP, Golang (Go), “R” language, and Swift, to name a few. Memory, storage, and / or computer readable media can be shared by one or more of the various functional units present, or can be distributed amongst two or more of them (e.g., as separate memories present within different chips). Memory can also reside in a separate chip of its own. To the extent the implementations disclosed herein include or operate in association with memory, storage, and / or computer readable media, then that memory, storage, and / or computer readable media are non-transitory. Accordingly, to the extent that memory, storage, and / or computer readable media are covered by one or more claims, then that memory, storage, and / or computer readable media is only non-transitory. The terms “non-transitory” and “tangible” as used herein, are intended to describe memory, storage, and / or computer readable media excluding propagating electromagnetic signals, but are not intended to limit the type of memory, storage, and / or computer readable media in terms of the persistency of storage or otherwise. For example, “non-transitory” and / or “tangible” memory, storage, and / or computer readable media encompasses volatile and non-volatile media such as random access media (e.g., RAM, SRAM, DRAM, FRAM, etc.), read-only media (e.g., ROM, PROM, EPROM, EEPROM, flash, etc.) and combinations thereof (e.g., hybrid RAM and ROM, NVRAM, etc.) and variants thereof. It should be noted that all features, elements, components, functions, and steps described with respect to any implementation provided herein are intended to be freely combinable and substitutable with those from any other implementation. If a certain feature, element, component, function, or step is described with respect to only one implementation,  Docket No. 56420-0020WO1then it should be understood that that feature, element, component, function, or step can be used with every other implementation described herein unless explicitly stated otherwise. This paragraph therefore serves as antecedent basis and written support for the introduction of claims, at any time, that combine features, elements, components, functions, and steps from different implementations, or that substitute features, elements, components, functions, and steps from one implementation with those of another, even if the following description does not explicitly state, in a particular instance, that such combinations or substitutions are possible. It is explicitly acknowledged that express recitation of every possible combination and substitution is overly burdensome, especially given that the permissibility of each and every such combination and substitution will be readily recognized by those of ordinary skill in the art. As used herein and in the appended claims, the singular forms “a,” “an,” and “the” include plural referents unless the context clearly dictates otherwise.

Claims

Docket No. 56420-0020WO1CLAIMS 1. An energy storage system, comprising: a plurality of modules connected together in a plurality of arrays, each array configured to output an AC voltage signal comprising a superposition of output voltages from the modules of that array, wherein each module comprises an energy source and switch circuitry controllable to selectively output a positive DC output voltage, zero output voltage, or negative DC output voltage from the energy source; and a control system configured to control the switch circuitry of each module, the control system comprising: a main control device configured to generate control information comprising a reference signal; and a local control device coupled to the main control device to receive the control information from the main control device, the local control device configured to: generate a corrected reference signal for a module using a reference signal correction factor based on the module’s present DC link voltage and one or more previous DC link voltage measurements, and control the switch circuitry of the module using the corrected reference signal.

2. An energy storage system, comprising: a control system configured to control the switch circuitry of a plurality of modules, each module of the plurality of modules comprising switch circuitry and an energy source, the control system comprising: a main control device configured to generate control information comprising a reference signal; and a local control device coupled to the main control device to receive the control information from the main control device, the local control device configured to: generate a corrected reference signal for a module of the plurality of modules using a reference signal correction factor based on the module’s present DC link voltage and one or more previous DC link voltage measurements, and control the switch circuitry of the module using the corrected reference signal.  Docket No. 56420-0020WO13. The energy storage system of any of claims 1 or 2, wherein the local control device is configured to generate the reference signal correction factor based on the module’s present DC link voltage measurement and an average of multiple previous DC link voltage measurements.

4. The energy storage system of claim 3, wherein the local control device is configured to generate the reference signal correction factor by dividing the average of multiple previous DC link voltage measurements by the module’s present DC link voltage measurement.

5. The energy storage system of any of claims 3 or 4, wherein the local control device comprises an averaging circuit element configured to determine the average of multiple previous DC link voltage measurements using instantaneous DC link voltage measurements sensed by a voltage sensor for each module.

6. The energy storage system of any of claims 1-5, wherein the main control device is configured to generate the reference signal based on average DC link voltage measurements for each module.

7. The energy storage system of claim 6, wherein the main control device is configured to generate a respective reference signal for each array based on a sum of the average DC link voltage measurements for each module in the array.

8. The energy storage system of any of claims 1-7, wherein the main control device is configured to generate, for each module, a modulation index for balancing one or more operating characteristics of the module relative to other modules of the plurality of modules.

9. The energy storage system of any of claims 1-8, wherein the reference signal is a modulated reference signal generated by modulating or scaling an original reference signal using a modulation index.

10. The energy storage system of claim 9, wherein the main control device is configured to generate a respective modulation index for each module and to generate a  Docket No. 56420-0020WO1respective modulated reference signal for each module using the respective modulation index for the module.

11. The energy storage system of any of claims 1-8, wherein the control information sent to the local control device comprises a modulation index for each module for which the local control device operates the switch circuitry.

12. The energy storage system of claim 11, wherein each local control device is configured to generate a modulated reference signal for each module for which the local control device operates the switch circuitry by modulating or scaling the reference signal using the modulation index for the module.

13. The energy system of any of claims 10 or 12, wherein the local control device is configured to generate the corrected reference signal by modulating or scaling the modulated signal using the reference signal correction factor.

14. The energy storage system of claim 13, wherein the local control device is configured to apply the reference signal correction factor to the reference signal to generate the corrected reference signal and to generate a switching signal using the corrected reference signal.

15. The energy system of claim 14, wherein the local control device is configured to apply the reference signal correction factor to the reference signal by modulating or scaling the reference signal using the reference signal correction factor.

16. The energy system of claim 14, wherein each local control device is configured to generate a switching signal using pulse width modulation.

17. The energy storage system of any of claims 1-16, wherein the energy storage system comprises a plurality of local control devices.

18. A method for controlling a converter by a local control device coupled to a plurality of converters, the method comprising:  Docket No. 56420-0020WO1generating a corrected reference signal for the converter using a reference signal correction factor based on a present DC link voltage for the converter and one or more previous DC link voltage measurements, and controlling switch circuitry of the converter using the corrected reference signal.

19. The method of claim 18, further comprising generating, by the local control device, the reference signal correction factor based on a present DC link voltage measurement and an average of multiple previous DC link voltage measurements.

20. The method of any of claims 18 or 19, wherein generating the reference signal correction factor comprises dividing the average of multiple previous DC link voltage measurements by the present DC link voltage measurement.

21. The method of any of claims 19 or 20, further comprising determining the average of multiple previous DC link voltage measurements using an averaging circuit element in the local control device using instantaneous DC link voltage measurements sensed by a voltage sensor for the converter.

22. The method of any claims 18-21, further comprising receiving a reference signal from a main control device, the reference signal based on average DC link voltage measurements for each of the plurality of converters.

23. The method of claim 22, wherein the reference signal is generated by the main control device based on a sum of average DC link voltage measurements for each of the plurality of converters.

24. The method of any of claims 18-23, further comprising receiving, for each converter, a modulation index from a main control device for balancing one or more operating characteristics of each converter connected to the local control device.

25. The method of any of claims 18-24, wherein the reference signal is a modulated reference signal generated by modulating or scaling an original reference signal using a modulation index.  Docket No. 56420-0020WO126. The method of claim 25, further comprising receiving, from the main control device a respective modulation index for each power converter the local control device is connected to and to generate a respective modulated reference signal for each power converter using the respective modulation index for the converter.

27. The method of any of claims 18-26, further comprising receiving, by the local control device, control information from a main control device, the control information received by the local control device comprising a modulation index for the power converter for which the local control device operates the switch circuitry.

28. The method of any of claims 18-27, further comprising generating, by the local control device, a reference signal correction factor for the reference signal based on the average DC link voltages and an instantaneous value of the DC link voltage sensed by the local control device from the power converter.

29. The method of claim 28, the local control device is configured to apply the reference signal correction factor to the reference signal to generate a corrected reference signal and to generate a switching signal from the corrected reference signal.

30. The method of claim 29, further comprising generating the switching signal using pulse width modulation.

31. The method of claim 30, further comprising applying the reference signal correction factor to the reference signal by modulating or scaling the reference signal using the reference signal correction factor.

32. The method of claim 30, further comprising generating the corrected reference signal by modulating or scaling the modulated signal using the reference signal coefficient.

33. The method of any of claims 18-32, wherein the energy storage system comprises a plurality of local control devices.

34. An energy storage system configured to perform the method steps of any of claims 18-33.  Docket No. 56420-0020WO135. An energy storage system configured to perform any of the operations described in this specification.

36. An energy storage system, comprising: a plurality of modules connected together in a plurality of arrays, each array configured to output an AC voltage signal comprising a superposition of output voltages from the modules of that array, wherein each module comprises an energy source and switch circuitry controllable to selectively output a positive DC output voltage, zero output voltage, or negative DC output voltage from the energy source; and a control system configured to control the switch circuitry of each module based on overcurrent prediction, the control system comprising a current predictor configured to: generate, for each of one or more output currents of the energy system, a future value of the output current based on a gradient of a phase of the output current, and predict an overcurrent event based on the generated future value of at least one of the one or more output currents, wherein the control system is configured to alter operation of at least one module of the plurality of modules in response to predicting the overcurrent event.

37. The energy storage system of claim 36, wherein the control system is configured to determine the gradient based on a rate of change of a phase of the output current.

38. The energy storage system of claim 37, wherein the control system is configured to determine the gradient based on a delay value defining a point separation for the rate of change determination.

39. The energy storage system of claim 38, wherein the delay value identifies a sampling rate for identifying the point separation for determining the gradient.

40. The energy storage system of any of claims 38 or 39, wherein the control system uses the delay value to determine a normalized gradient.

41. The energy storage system of claim 40, wherein the control system comprises a shift register configured to normalize the gradient based on the delay value.  Docket No. 56420-0020WO142. The energy storage system of any of claims 38-41, wherein the delay value comprises a value based on a power of two.

43. The energy storage system of any of claims 36-42, wherein the current predictor is configured to predict an output current for a future point in time using a predetermined time horizon value.

44. The energy storage system of any of claims 36-43, wherein the control system is configured to determine the absolute value of the future value of the output current.

45. The energy storage system of claim 44, wherein the control system is configured to predict an overcurrent event based on comparing, by a comparator circuit element, the absolute value of the predicted future value of the output current with an overcurrent threshold.

46. The energy storage system of any of claims 36-45, wherein the control system comprises an enable input to either enable activation of the overcurrent prediction or disable activation of the overcurrent prediction.

47. The energy storage system of any of claims 36-46, wherein the control system is configured to: store an overcurrent event state in a state machine, the overcurrent event state indicating the prediction of the overcurrent event; and read the overcurrent event state from the state machine to alter operation the at least one of the plurality of modules.

48. The energy storage system of any of claims 36-47, further comprising a trip pulse generator to: receive an indication of the overcurrent event state; and generate a trip pulse to cause the local control device associated with the at least one module to cease switching operation of the at least one module.  Docket No. 56420-0020WO149. The energy storage system of any of claims 36-48, further comprising a trip pulse generator to: receive an indication of the predicted overcurrent event; and generate a pulse signal to cause a local control device associated with the at least one module to control the at least one module to enter into a current limiting operational state.

50. The energy storage system of claim 49, wherein the local control device comprises circuitry to activate a current limiting state based on a received pulse signal.

51. The energy storage system of any of claims 36-50, wherein the control system is configured to receive, as an input to a current prediction circuit in the control system, a scaled representation of the output current, and filtering the scaled representation of the output current to reduce noise.

52. The energy storage system of any of claims 36-51, wherein at least a portion of the one or more output currents is output by a corresponding module of the plurality of modules.

53. The energy storage system of any of claims 36-52, wherein at least one of the one or more output currents is output by a corresponding array of the plurality of arrays.

54. The energy storage system of any of claims 36-51, wherein the one or more output currents comprises one output current, and the one output current is output from the energy storage system.

55. The energy storage system of any of claims 36-54, wherein the control system is configured to reduce energy output of at least one module of the plurality of modules in response to predicting the overcurrent event.

56. The energy storage system of any of claims 36-54, wherein the control system is configured to cease operation of at least one module of the plurality of modules in response to predicting the overcurrent event.  Docket No. 56420-0020WO157. The energy storage system of any of claims 36-55, wherein the control system is configured to cease operation of each module in an array in response to predicting the overcurrent event for an output of the array.

58. The energy storage system of any of claims 36-57, wherein the control system is configured to reduce energy output of all of the plurality of modules in response to predicting the overcurrent event for an output of the energy storage system.

59. The energy storage system of any of claims 36-57, wherein the control system is configured to reduce energy output of all of the plurality of modules in response to predicting the overcurrent event for an output of the energy storage system.

60. The energy storage system of any of claims 36-59, wherein the control system is configured to trip one or more breakers in response to predicting the overcurrent event.

61. A method for predicting an overcurrent event state in an energy storage system, the method comprising: determining a gradient of a signal representative of an output current of a plurality of modules of the energy storage system; determining a future value of the output current based on applying the gradient to the signal representative of the output current; comparing the predicted output current to a threshold; and determining the overcurrent event state based on the predicted output current being greater than or equal to the threshold; or determining a normal state based on the predicted output current being less than the threshold.

62. The method of claim 61, further comprising filtering the received signal representative of the output current to generate a filtered signal with reduce noise.

63. The method of any of claims 61 or 62, further comprising sampling the filtered signal using a delay value to determine the gradient of the filtered signal.  Docket No. 56420-0020WO164. The method of any of claims 61 to 63, further comprising multiplying the gradient by a time horizon to generate a time-horizon factored gradient, the time horizon defining an amount of time into the future to predict a future value of the output current.

65. The method of claim 64, further comprising applying the time-horizon factored gradient to the received signal representative of the output current to generate a future value of the output current.

66. The method of claim 60, further comprising generating an absolute value of the future value of the output current.

67. The method of claim 66, further comprising comparing the absolute value of the future value of the output current to threshold.

68. The method of any of claims 61 to 67, further comprising, upon determining the overcurrent event state, causing a local control device to alter an operational state a connected module.

69. The method of claim 68, wherein altering the operational state of the connected module comprises ceasing operation of the module.

70. The method of claim 69, wherein causing the local control device to cease switching of the connected power converter module comprises: generating a trip pulse by a trip pulse generator; and sending the trip pulse to the local control device using a dedicated communication path to cause the local control device to cease switching the connected module.

71. The method of claim 70, wherein altering the operational state of the connected module comprises causing the module to enter a current limiting operational state.

72. The method of claim 71, wherein causing the module to enter the current limiting operational state comprises: generating a pulse signal by a trip pulse generator indicating activation of circuitry to control the current limiting operational state; and  Docket No. 56420-0020WO1sending the pulse signal to the local control device using a dedicated communication path to cause the local control device to control the connected module to enter in the current limiting operational state.

73. The method of claim 68, wherein the received signal representative of the output current comprises a signal representative of one phase of the output current.

74. The method of claim 73, wherein the determination of the overcurrent event state is a determination that one phase of the future value of the output current indicates an overcurrent event state.

75. The method of claim 74, wherein the trip pulse is sent to the local control device to cause the local control device to cease switching operations for a module associated with the one phase of the output current.

76. The method of any of claims 61-75, wherein each of the one or more output currents is output by a corresponding module of the plurality of modules.

77. The method of any of claims 61-76, wherein each of the one or more output currents is output by a corresponding array of the plurality of arrays.

78. The method of any of claims 61-77, wherein the one or more output currents comprises one output current, and the one output current is output from the energy storage system.

79. The method of any of claims 61-78, further comprising receiving a signal representative of the output current of the plurality of modules prior to determining the gradient of the signal representative of the output current of the plurality of modules of the energy storage system.

80. The method of any of claims 61-79, further comprising reducing energy output of at least one module of the plurality of modules in response to determining the overcurrent event state.  Docket No. 56420-0020WO181. The method of any of claims 61-79, further comprising ceasing operation of at least one module of the plurality of modules in response to determining the overcurrent event state.

82. The method of any of claims 61-79, further comprising ceasing operation of each module in an array in response to determining the overcurrent event state for an output of the array.

83. The method of any of claims 61-81, further comprising reducing energy output of all of the plurality of modules in an array response to determining the overcurrent event state for an output of the array.

84. The method of any of claims 61-83, further comprising reducing energy output of all of the plurality of modules in response to determining the overcurrent event state for an output of the energy storage system.

85. The method of any of claims 61-84, further comprising tripping one or more breakers in response to determining the overcurrent event state.

86. An energy storage system configured to perform the method steps of any of claims 61-85.

87. An energy storage system configured to perform any of the operations described in this specification.

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