Transmission method for 64b / 66b coding blocks, and electronic device and readable storage medium
By dividing the 64B/66B encoding blocks into two groups and adjusting the number of bits in their encoding type domain and information domain, the existing encoding block redundancy problem is solved, and encoding block conversion with higher encoding efficiency is achieved, which is suitable for signal transmission of high-speed Ethernet and optical transmission networks.
Patent Information
- Application Number
- PCT/CN2024/139831
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-01-02
- Filing Date
- 2024-12-17
- Publication Date
- 2025-07-10
AI Technical Summary
When the existing 64B/66B encoding blocks start with the synchronization header 10, the type domain includes 4-bit redundant information, which leads to the inability to further improve the encoding efficiency and cannot be converted into a coding block with higher encoding efficiency.
By dividing 11 different encoding types of 64B/66B encoding blocks into two groups, converting them into 8-bit and 9-bit encoding type fields, and maintaining or adjusting the number of bits in the information domain, the second and third control 64B/66B encoding blocks are formed to increase the redundant bits and then converting them into encoding blocks with higher encoding efficiency such as 1024B/1025B encoding blocks.
The transmission efficiency of the encoding block is improved, and the 64B/66B encoding block can be converted into a higher encoding efficiency encoding block, such as the 1024B/1025B encoding block, which is suitable for signal transmission in high-speed Ethernet and optical transmission networks.
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Figure CN2024139831_10072025_PF_FP_ABST
Abstract
Description
64B / 66B coding block transmission method, electronic device and readable storage medium
[0001] Cross-references
[0002] This application claims priority to a Chinese patent application filed with the Patent Office of China on January 2, 2024, with application number 202410011631.7 and invention name “64B / 66B coding block transmission method, electronic device and readable storage medium”. The entire contents of the application are incorporated by reference into this application. Technical Field
[0003] The embodiments of the present application relate to the field of communication technology, and in particular to a transmission method, electronic device, and readable storage medium for a 64B / 66B coding block. Background Art
[0004] The 64B / 66B encoding block is the most common encoding scheme in the Ethernet Physical Coding Sublayer (PCS). It is used to convert high-speed Media Access Control (MAC) frames into fixed-rate bit blocks while also adding necessary control information. The information transmitted by the 64B / 66B encoding block includes both data and control information. The data information primarily corresponds to the data in the MAC frame, while the control information includes special functions required for transmitting the MAC frame, such as indicating special states during MAC frame transmission. Special states include sending idle control information, local fault status (Local Fault) or remote fault status, and MAC frame header and trailer flags. When the rate of 64B / 66B code blocks is high, they are generally not transmitted directly. Instead, they are first transcoded into 256B / 257B code blocks, and then forward error correction (FEC) encoding information is added to the 256B / 257B code blocks before they are finally transmitted. Accordingly, after receiving this information, FEC decoding and error correction are first performed using the FEC algorithm to obtain 256B / 257B code blocks, which are then transcoded again to recover 64B / 66B code blocks.
[0005] In existing 64B / 66B coding blocks, the 64B / 66B coding blocks starting with the synchronization header 10 include 4 bits of redundant information in the type field. This allows the 64B / 66B coding blocks to be converted to 512B / 513B coding blocks at most, but cannot be converted to coding blocks with higher coding efficiency. Summary of the Invention
[0006] Embodiments of the present application provide a 64B / 66B coding block transmission method, an electronic device, and a readable storage medium.
[0007] In a first aspect, a method for transmitting a 64B / 66B coding block is provided, the method comprising: obtaining a 64B / 66B coding block to be transmitted, wherein the 64B / 66B coding block includes a 2-bit synchronization header, and the value of the 2-bit synchronization header is used to indicate that the 64B / 66B coding block is a data 64B / 66B coding block or a first control 64B / 66B coding block; the first control 64B / 66B coding block also includes an 8-bit type field and a 56-bit information field, and the value of the 8-bit type field is used to distinguish 11 different coding types; dividing the 11 different coding types of the first control 64B / 66B coding blocks into coding blocks of a first group of coding types and coding blocks of a second group of coding types, and dividing the coding blocks of the first group of coding types into coding blocks of a first group of coding types. The 8-bit type field in the coding block of the second group of coding types is converted into an 8-bit first group coding type field, and the 56-bit information field remains unchanged; the 8-bit type field in the coding block of the second group of coding types is converted into a 9-bit second group coding type field, and the 56-bit information field is converted into a 55-bit information field; the 2-bit synchronization header, the 8-bit first group coding type field and the 56-bit information field are combined into 66 bits of a second control 64B / 66B coding block; the 2-bit synchronization header, the 9-bit second group coding type field and the 55-bit information field are combined into 66 bits of a third control 64B / 66B coding block; the data 64B / 66B coding block, the second control 64B / 66B coding block and the third control 64B / 66B coding block are transmitted.
[0008] In a second aspect, an electronic device is provided, which includes a processor and a memory, wherein the memory stores programs or instructions that can be run on the processor, and when the program or instructions are executed by the processor, the steps of the 64B / 66B coding block transmission method as described in the first aspect are implemented.
[0009] In a third aspect, a readable storage medium is provided, on which a program or instruction is stored. When the program or instruction is executed by a processor, the steps of the 64B / 66B coding block transmission method as described in the first aspect are implemented. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0011] FIG1 is a schematic flow chart showing a method for transmitting a 64B / 66B coding block according to an exemplary embodiment of the present application;
[0012] FIG2 shows a schematic structural diagram of an electronic device provided by an exemplary embodiment of the present application. DETAILED DESCRIPTION
[0013] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
[0014] Table 1 shows the encoding information of a 64B / 66B coding block. Referring to Table 1, a 64B / 66B coding block is a bit block with a length of 66 bits. The first two bits in the 66-bit block are named synchronization bits, and the last 64 bits are named block payload. In this application, each bit in the 64B / 66B coding block is represented by a bit position. Bit position 1 represents the first bit in the 64B / 66B coding block, bit position 2 represents the second bit in the 64B / 66B coding block, bit position 3 represents the third bit in the 64B / 66B coding block, and so on. Bit position 66 represents the 66th bit in the 64B / 66B coding block.
[0015] Table 1.
[0016] FIG1 shows a flow chart of a method for transmitting a 64B / 66B coding block provided by an exemplary embodiment of the present application. Referring to FIG1 , the method may include the following steps.
[0017] Step 102: Obtain a 64B / 66B coded block to be transmitted. The 64B / 66B coded block includes a 2-bit synchronization header, the value of which is used to indicate whether the 64B / 66B coded block is a data 64B / 66B coded block or a first control 64B / 66B coded block. The first control 64B / 66B coded block also includes an 8-bit type field and a 56-bit information field. The value of the 8-bit type field is used to distinguish 11 different coding types.
[0018] The 64B / 66B coding block to be transmitted in the embodiment of the present application is used for the Ethernet physical coding sublayer (PCS) with a rate greater than or equal to 40G. The value of the 2-bit synchronization header of the 64B / 66B coding block can include 01 and 10. If the synchronization header is 01, the 64B / 66B coding block is a data 64B / 66B coding block. If the synchronization header is 10, the 64B / 66B coding block is a first control 64B / 66B coding block. The first control 64B / 66B coding block includes data information, control information and a type field. The content of the data information and control message can be determined by the type field.
[0019] Optionally, the control information may be multiple control characters, each containing 7 bits of information. Alternatively, the control information may be an ordered set control block (ORCS), each containing 28 bits of information. Control characters are used to represent relatively simple control information, while ORCS are used to represent relatively complex control information.
[0020] Step 104: Divide the first control 64B / 66B coding blocks of the 11 different coding types into coding blocks of the first group of coding types and coding blocks of the second group of coding types, convert the 8-bit type field in the coding blocks of the first group of coding types into an 8-bit first group of coding type field, and keep the 56-bit information field unchanged; convert the 8-bit type field in the coding blocks of the second group of coding types into a 9-bit second group of coding type field, and convert the 56-bit information field into a 55-bit information field.
[0021] The control information and data information of the first control 64B / 66B coding block are determined by the coding type of the first control 64B / 66B coding block. The coding type of the first control 64B / 66B coding block can be identified by an identifier represented by some bits in the 8-bit first group coding type field or the 9-bit second group coding type field.
[0022] Step 106: The 2-bit synchronization header, the 8-bit first group coding type field, and the 56-bit information field are combined into 66 bits of a second control 64B / 66B coding block; the 2-bit synchronization header, the 9-bit second group coding type field, and the 55-bit information field are combined into 66 bits of a third control 64B / 66B coding block.
[0023] Among them, according to the synchronization header, the first group of coding type fields or the second group of coding type fields, the 56-bit information field or the 55-bit information field, the 66 bits of the second control 64B / 66B coding block or the third control 64B / 66B coding block are composed, so that the coding type fields in the reconstructed second control 64B / 66B coding block and the third control 64B / 66B coding block can contain more bits of redundant bits, so that the reconstructed second control 64B / 66B coding block and the third control 64B / 66B coding block can be converted into coding blocks with higher coding efficiency, such as 1024B / 1025B coding blocks.
[0024] Step 108: Transmit the data 64B / 66B coded block, the second control 64B / 66B coded block, and the third control 64B / 66B coded block.
[0025] In an embodiment of the present application, for a 64B / 66B coded block to be transmitted, the value of the 2-bit synchronization header is used to determine whether the current 64B / 66B coded block is a data 64B / 66B coded block or a control 64B / 66B coded block. For example, 01 indicates that the 64B / 66B coded block is a data 64B / 66B coded block, and 10 indicates that the 64B / 66B coded block is a first control 64B / 66B coded block. For a data 64B / 66B coded block, the data 64B / 66B coded block includes 8 numeric characters, and 1 numeric character includes 8 bits of information. The data 64B / 66B coded block is not changed. For the first control 64B / 66B coding block, the first control 64B / 66B coding block includes an 8-bit type field and a 56-bit information field. The value of the 8-bit type field can be used to distinguish 11 different coding types, and then the first control 64B / 66B coding blocks of 11 different coding types can be divided into coding blocks of the first group of coding types and coding blocks of the second group of coding types. The 8-bit type field in the coding block of the first group of coding types is converted into an 8-bit first group of coding type fields, the 56-bit information field remains unchanged, and the 8-bit type field in the coding block of the second group of coding types is converted into a 9-bit The second group coding type field, in which the 56-bit information field is converted to a 55-bit information field, results in more redundant bits in the coding type field of the second control 64B / 66B coding block, which is composed of a 2-bit synchronization header, the 8-bit first group coding type field, and the 56-bit information field, and in the third control 64B / 66B coding block, which is composed of a 2-bit synchronization header, the 9-bit second group coding type field, and the 55-bit information field. These redundant bits can be deleted to free up bit space when the second and third control 64B / 66B coding blocks are converted to coding blocks with higher coding efficiency. This allows the data 64B / 66B coding blocks, the second control 64B / 66B coding blocks, and the third control 64B / 66B coding blocks to be converted to coding blocks with higher coding efficiency, such as 1024B / 1025B coding blocks, thereby improving transmission efficiency and leaving more rate for FEC coding information.
[0026] In one implementation, in the 64B / 66B coding block to be transmitted, the value of the 2-bit synchronization header is 01, indicating that the 64B / 66B coding block is the data 64B / 66B coding block; the value of the 2-bit synchronization header is 10, indicating that the 64B / 66B coding block is the first control 64B / 66B coding block; the 56-bit information field includes data characters, control characters, fixed information and information field redundant bits.
[0027] In an embodiment of the present application, the first control 64B / 66B coding block includes 66 bits of information, the first two bits of which are synchronization headers. A synchronization header of 01 indicates that the 64B / 66B coding block is the data 64B / 66B coding block, and a synchronization header of 10 indicates that the 64B / 66B coding block is the first control 64B / 66B coding block. The last 64 bits include an 8-bit type field for distinguishing 11 different coding types. The 11 different coding types can be divided into coding blocks of the first group of coding types and coding blocks of the second group of coding types. The remaining 56-bit information field may include data characters, control characters, fixed information, and information field redundancy bits.
[0028] In one implementation, in the first control 64B / 66B coding block, the 56-bit information field includes the data characters, the control characters, the fixed information and the information field redundant bits, wherein the data characters are 8 bits long and are represented by Dn, where n is a number from 1 to 8 and represents the order in which the data characters appear in the 56-bit information field; the control characters include two types, one of which is 7 bits long and is represented by Cm, where m is a number from 1 to 8 and represents the order in which the control characters appear in the 56-bit information field; the other type of control characters is 28 bits long and includes a 4-bit Q0 and three data characters D1, D2 and D3; the fixed information includes 28 bits of 0; and the information field redundant bits are bits in the 56-bit information field other than the data characters, the control characters and the fixed information.
[0029] In an embodiment of the present application, Table 2 shows a 64B / 66B coding block provided by an embodiment of the present application. Referring to Table 2, the block payload of a data 64B / 66B coding block with a synchronization header of 01 includes 8 data characters, where each data character includes 8 bits of information. A first control 64B / 66B coding block with a synchronization header of 10 includes 11 different coding types. The 11 different coding types can be divided into two groups, namely, a first coding type group and a second coding type group. The first coding type group includes 4 different coding types, and the second coding type group includes 7 different coding types. In the coding block of the first coding type group, the 4 different coding types are distinguished by an 8-bit first coding type field. In the coding block of the second coding type group, the 7 different coding types are distinguished by a 9-bit second coding type field. The 4 different coding types of the first coding type group are named a second control 64B / 66B coding block, and the 7 different coding types of the second coding type group are named a third control 64B / 66B coding block.
[0030] Table 2.
[0031] Table 2 shows the encoding information of a 64B / 66B coding block, including a 64B / 66B data coding block with a synchronization header of 01. The block payload of this 64B / 66B data coding block includes 8 numeric characters, each of which contains 8 bits of information, specifically "D0D1D2D3D4D5D6D7." Table 2 also includes a second control 64B / 66B coding block with a synchronization header of 10, including four different coding types. The block payload of this second control 64B / 66B coding block consists of an 8-bit first group coding type field and a 56-bit information field. The first bit of the 8-bit first group coding type field is 0, and the last two bits of the first three bits have different values, allowing the identification of four different coding types. The last five bits are redundant and can be deleted when converting to a more efficient coding block. The values of the 8-bit first group coding type field are "0x1E", "0x78", "0x4B" and "0x2d", respectively. The first 3 bits are "000b", "011b", "010b" and "001b", respectively. The corresponding information fields are "C0C1C2C3C4C5C6C7", "S0D1D2D3D4D5D6D7", "Q0D1D2D3Z4Z5Z6Z7" and "D0D1D2D3D4D5D6T7", respectively. Among them, the 56-bit information field of the four different coding types in the first group of coding types does not contain information field redundancy bits.
[0032] Table 2 also includes a third control 64B / 66B coding block with a synchronization header of 10, including 7 different coding types. The block payload of the third control 64B / 66B coding block consists of a 9-bit group 2 coding type field and a 55-bit information field, wherein the first bit of the 9-bit group 2 coding type field is 1, and the last 3 bits of the first 4 bits have different values, which can be used to identify 7 different coding types. The last 5 bits can be deleted as redundant bits when it is necessary to convert to a more efficient coding block. The values of the 9-bit second group code type field are "0x187", "0x133", "0x1AA", "0x155", "0x1CC", "0x166" and "0x1FF", respectively. The first 4 bits are "1100b", "1001b", "1101b", "1010b", "1110b", "1011b" and "1111b", respectively. The corresponding information fields are "T0C1C2C3C4C5C6C7" and "D0T1C2C3C4C5C6C7". , "D0D1T2C3C4C5C6C7", "D0D1D2T3C4C5C6C7", "D0D1D2D3T4C5C6C7", "D0D1D2D3D4T5C6C7" and "D0D1D2D3D4D5T6C7", where D represents a data character, C represents a control character with a length of 7 bits, Z represents 7 bits of 0, S represents the start of a coding block, T represents the end of a coding block, and Q0D1D2D3 together represent a control character with a length of 28 bits - an ordered set control block.
[0033] Optionally, for a 66-bit coding block, its first and second bits are defined as synchronization headers. On the premise that the synchronization header is 10 and it is determined to be the second control 64B / 66B coding block or the third control 64B / 66B coding block, it can be further determined whether it is the second control 64B / 66B coding block or the third control 64B / 66B coding block based on whether the third bit in the 66 bits is 0 or 1. If the third bit in the 66 bits is 0, then the 66-bit coding block is the second control 64B / 66B coding block. In this case, the coding type field length is 8 bits, corresponding to the third to tenth bits in the 66 bits. The first three bits in the 8-bit coding type field are valid bits and can be used to identify four different coding types. The last five bits are redundant bits in the type field and can be deleted when conversion to a more efficient coding block is required. If the 3rd bit in the 66 bits is 1, this 66-bit coding block is the third control 64B / 66B coding block. At this time, the coding type field length is 9 bits, corresponding to the 3rd to 11th bits in the 66 bits. The first 4 bits in the 9-bit coding type field are valid bits and can be used to identify 7 different coding types. The last 5 bits are redundant bits of the type field and can be deleted when conversion to a more efficient coding block is required.
[0034] In one implementation, all coding types in the coding blocks of the first group of coding types do not have the information field redundancy bits in the 56-bit information field; and all coding types in the coding blocks of the second group of coding types have the information field redundancy bits in the 56-bit information field.
[0035] In this embodiment of the present application, the 56-bit information field in the coding block of the first coding type does not include information field redundancy bits, which include data characters, control characters, and fixed information. When forming the second control 64B / 66B coding block, the 8-bit type field is converted into an 8-bit first group coding type field, and the 56-bit information field remains unchanged. The 8-bit type field is used to identify 11 different coding types and actually includes 4 bits of type field redundancy bits. The 8-bit first group coding type field obtained after conversion is used to identify 4 different coding types and actually includes 5 bits of type field redundancy bits. The 56-bit information field in the coding block of the second group of coding types includes data characters, control characters, fixed information and information field redundant bits. For the information field redundant bits, the preset bits of information field redundant bits are deleted when forming the third control 64B / 66B coding block, and the type field redundant bits are added to convert the original 8-bit type field and 56-bit information field into a 9-bit second group of coding type field and a 55-bit information field, so that the 8-bit first group of coding type fields and the 9-bit second group of coding type fields in the second control 64B / 66B coding block and the third control 64B / 66B coding block both contain 5 bits of type field redundant bits. Compared with the 4-bit type field redundant bits contained in the 8-bit type field in the first control 64B / 66B coding block, the coding type fields of the second control 64B / 66B coding block and the third control 64B / 66B coding block have 1 more bit of type field redundant bits.
[0036] In one implementation, the 8-bit first group coding type field includes a 3-bit control type identifier and a 5-bit type field redundant bit, wherein the 3-bit control type identifier is used to identify a coding blocks of different coding types in the coding blocks of the first group coding type, and a is a positive integer less than 7; the 9-bit second group coding type field includes a 4-bit control type identifier and the 5-bit type field redundant bit, wherein the 4-bit control type identifier is used to identify b coding blocks of different coding types in the coding blocks of the second group coding type, b=11-a.
[0037] In an embodiment of the present application, the 8-bit first group coding type field in the coding block of the converted first group coding type specifically includes a 3-bit control type identifier and a 5-bit type field redundant bit, and the 9-bit second group coding type field in the coding block of the converted second group coding type specifically includes a 4-bit control type identifier and a 5-bit type field redundant bit. There are 11 coding types in total. The first group coding type includes a, and the second group coding type includes (11-a). Both the first group coding type and the second group coding type identify different coding types through the control type identifier.
[0038] In one implementation, the value of the 3-bit control type identifier is a 3-bit value in a first value group, the first value group includes the a different 3-bit values, and the a different 3-bit values are obtained by selecting from c different 3-bit values. Among them, the Indicates the Performing rounding. The value of the 4-bit control type identifier is a 4-bit value in a second value group, the second value group includes the b different 4-bit values, removing the a different 3-bit values corresponding to the first value group from the c different 3-bit values to obtain (ca) different 3-bit values, adding 1 bit to the (ca) different 3-bit values to obtain 2*(ca) different 4-bit values, and selecting the b different 4-bit values from the 2*(ca) different 4-bit values as the second value group.
[0039] In an embodiment of the present application, different coding types are identified by different values of bits in the control type identifier. From the c different 3-bit values, the a different 3-bit values are selected as the first value group of the 3-bit control type identifier, which is used to identify the a different coding types in the coding blocks of the first group of coding types. From the c different 3-bit values, the a different 3-bit values corresponding to the first value group are removed to obtain (ca) different 3-bit values, and 1 bit is added to the (ca) different 3-bit values to obtain 2*(ca) different 4-bit values. From the 2*(ca) different 4-bit values, the b different 4-bit values are selected as the second value group for identifying the b different coding types in the coding blocks of the second group of coding types.
[0040] In one implementation, the above-mentioned step 104 converts the 8-bit type field in the coding block of the first group coding type into an 8-bit first group coding type field, which may include the following steps.
[0041] Step 1041: Determine the specific type of the encoding type based on the value of the 8-bit type field.
[0042] Among them, the 8-bit type field has 11 different values, corresponding to 11 different encoding types. The 11 different values of the 8-bit type field can be found in the type field-8 bits in Table 1, and the encoding formats of the 11 different encoding types can be found in the first control 64B / 66B encoding block format in Table 1.
[0043] Step 1042: Determine the value of the 3-bit control type identifier according to the specific type of the determined coding type.
[0044] Step 1043: Obtain the 8-bit first group coding type field according to the value of the 3-bit control type identifier and the 5-bit type field redundant bits.
[0045] Among them, the value of the 5-bit type field redundant bit can be all 0, or a specific value, so that the specific 8 bits of the a values of the 8-bit first group of coding type fields and the b values of the 9-bit second group of coding type fields have a Hamming distance greater than or equal to n, where n is an integer greater than or equal to 2.
[0046] In the embodiment of the present application, the first control 64B / 66B coding block includes 11 different coding types, which can be distinguished by coding formats. The specific coding formats of the 11 coding types can be found in the first control 64B / 66B coding block format in Table 1. The first group of coding types includes the a of the 11 different coding types, and the 56-bit information fields of the a coding types do not contain information field redundancy bits. For the first control 64B / 66B coding block, the specific coding type corresponding to the value can be determined according to the value of its 8-bit type field. If the determined coding type belongs to one of the a coding types in the first group of coding types, then this first control 64B / 66B coding block belongs to the coding block of the first group of coding types. Then, the value of the 3-bit control type identifier in the 8-bit first group of coding type field can be determined according to the determined coding type, and the 5-bit type field redundant bit is added to obtain a total of 8 bits. The 8 bits are used as the value of the 8-bit first group of coding type field, so that the second control 64B / 66B coding block can be obtained from the 8-bit first group of coding type field and the 56-bit information field.
[0047] In one implementation, the above-mentioned step 104 converts the 8-bit type field in the coding block of the second group coding type into a 9-bit second group coding type field, and converts the 56-bit information field into a 55-bit information field, which may include the following steps.
[0048] Step 1044: Determine the specific type of the encoding type based on the value of the 8-bit type field.
[0049] Among them, the 8-bit type field has 11 different values, corresponding to 11 different encoding types. The 11 different values of the 8-bit type field can be found in the type field-8 bits in Table 1, and the encoding formats of the 11 different encoding types can be found in the first control 64B / 66B encoding block format in Table 1.
[0050] Step 1045: Determine the value of the 4-bit control type identifier according to the specific type of the determined coding type.
[0051] Step 1046: Obtain the 9-bit second group coding type field based on the value of the 4-bit control type identifier and the 5-bit type field redundant bits.
[0052] Among them, the value of the 5-bit type field redundant bit can be all 0, or a specific value, so that the specific 8 bits of the a values of the 8-bit first group of coding type fields and the b values of the 9-bit second group of coding type fields have a Hamming distance greater than or equal to n, where n is an integer greater than or equal to 2.
[0053] Step 1047: Delete 1 bit of the information field redundancy bit in the 56-bit information field to obtain the 55-bit information field.
[0054] The specific position of the deleted 1-bit information field redundant bit can use multiple rules. The rule can be the first appearing information field redundant bit, or the rule can also be to determine the specific position of the deleted 1-bit information field redundant bit for different coding types.
[0055] In the embodiment of the present application, the first control 64B / 66B coding block includes 11 different coding types, which can be distinguished by coding formats. The specific coding formats of the 11 coding types can be found in the first control 64B / 66B coding block format in Table 1. The second group of coding types includes the b of the 11 different coding types, and the 56-bit information fields of the b coding types contain at least one information field redundancy bit. For the first control 64B / 66B coding block, the specific coding type corresponding to the value can be determined according to the value of its 8-bit type field. If the determined coding type belongs to one of the b coding types in the second group of coding types, then this first control 64B / 66B coding block belongs to the coding block of the second group of coding types. Then, the value of the 4-bit control type identifier in the 9-bit second group of coding type field can be determined according to the determined coding type, and the 5-bit type field redundant bit is added to obtain a total of 9 bits. This 9 bit is used as the value of the bit second group of coding type field, and the 1-bit information field redundant bit in the 56-bit information field is deleted to obtain a 55-bit information field, so that the third control 64B / 66B coding block can be obtained from the 9-bit second group of coding type field and the 55-bit information field.
[0056] In one implementation, the above-mentioned step 108 of transmitting the data 64B / 66B coded block, the second control 64B / 66B coded block and the third control 64B / 66B coded block may include the following steps.
[0057] Step 1: Delete the 5-bit type field redundant bits in the second control 64B / 66B coding block and the third control 64B / 66B coding block.
[0058] Among them, the 5-bit type field redundancy bits in the second control 64B / 66B coding block and the third control 64B / 66B coding block are used to be deleted to release bit space when the 64B / 66B coding block needs to be converted into a coding block with higher coding efficiency.
[0059] Step 2: Convert 16 consecutive data 64B / 66B coding blocks, the second control 64B / 66B coding block, and the third control 64B / 66B coding block into one 1024B / 1025B coding block.
[0060] Step 3: Transmit the 1024B / 1025B coding block.
[0061] An embodiment of the above step 2 is as follows: In a 1024B / 1025B coding block, the first bit is 0, indicating that the next 1024 bits correspond to 16 data 64B / 66B coding blocks, and the first bit is 1, indicating that the 16 64B / 66B coding blocks corresponding to the next 1024 bits include at least one second control 64B / 66B coding block or a third control 64B / 66B coding block, wherein the first bit is 1 and the second bit is 0, indicating that 16 64B / 66B coding blocks corresponding to the next 1024 bits include at least one second control 64B / 66B coding block or a third control 64B / 66B coding block. There is only one second control 64B / 66B coding block or third control 64B / 66B coding block in the B coding block, and its position is determined by the values of bits 3 to 6; if bit 1, bit 2, and bit 3 are 0, it means that there are two second control 64B / 66B coding blocks or third control 64B / 66B coding blocks in the 16 64B / 66B coding blocks, and the values of bits 4 to 7 indicate the first second control 64B / 66B coding block. The position of the code block or the third control 64B / 66B code block, the values of the 8th to 11th bits indicate the position of a second control 64B / 66B code block or the third control 64B / 66B code block at a later position; if the 1st bit is 1, the 2nd bit is 1, the 3rd bit is 1, and the 4th bit is 0, it means that there are 3 second control 64B / 66B code blocks or the third control 64B / 66B code blocks among the 16 64B / 66B code blocks, the values of the 5th to 8th bits indicate the position of a second control 64B / 66B code block or the third control 64B / 66B code block at a earlier position, the values of the 9th to 12th bits indicate the position of a second control 64B / 66B code block or the third control 64B / 66B code block at a second earlier position, and the values of the 13th to 16th bits indicate the position of a second control 64B / 66B code block or the third control 64B / 66B code block at a third earlier position;The first bit is 1, the second bit is 1, the third bit is 1, and the fourth bit is 1, indicating that the 16 64B / 66B coding blocks have at least 4 second control 64B / 66B coding blocks or third control 64B / 66B coding blocks. Among the 16 bits from the 5th bit to the 20th bit, the 5th bit indicates the type of the first 64B / 66B coding block in the 16 64B / 66B coding blocks. If it is 0, it indicates that the first 64B / 66B coding block is a data 64B / 66B coding block. If it is 1, it indicates that the first 64B / 66B coding block is a second control 64B / 66B coding block or a third control 64B / 66B coding block. The 6th bit indicates the type of the first 64B / 66B coding block in the 16 64B / 66B coding blocks. The type of the second 64B / 66B coding block: 0 indicates that the second 64B / 66B coding block is a data 64B / 66B coding block; 1 indicates that the second 64B / 66B coding block is the second control 64B / 66B coding block or the third control 64B / 66B coding block; and so on. The 20th bit indicates the type of the 16th 64B / 66B coding block among the 16 64B / 66B coding blocks: 0 indicates that the 16th 64B / 66B coding block is a data 64B / 66B coding block; 1 indicates that the 16th 64B / 66B coding block is the second control 64B / 66B coding block or the third control 64B / 66B coding block. The 21st bit is fixed to 0. Based on the above bit definitions, 16 consecutive 64B / 66B code blocks can be represented by 1025 bits. Each 64B / 66B code block may be a data 64B / 66B code block, a second control 64B / 66B code block, or a third control 64B / 66B code block.
[0062] In one implementation, the above-mentioned 64B / 66B code block transmission method can be applied to a transmitting end of an electronic device, and the receiving end of the electronic device can perform the following steps.
[0063] Step 1: Receive 1024B / 1025B coded blocks.
[0064] Among them, for the transmitting end, the 1024B / 1025B coding block converted by the data 64B / 66B coding block, the second control 64B / 66B coding block and the third control 64B / 66B coding block can be transmitted; and for the receiving end, the 1024B / 1025B coding block transmitted by other transmitting ends can be received.
[0065] Step 2: Convert one 1024B / 1025B coding block into 16 data 64B / 66B coding blocks, the second control 64B / 66B coding block and the third control 64B / 66B coding block.
[0066] Step 3: Convert the second control 64B / 66B coding block and the third control 64B / 66B coding block into a first control 64B / 66B coding block.
[0067] In an embodiment of the present application, the receiving end receives a 1024B / 1025B coding block converted from a data 64B / 66B coding block, a second control 64B / 66B coding block, and a third control 64B / 66B coding block, and then converts the 1024B / 1025B coding block into 16 data 64B / 66B coding blocks, a second control 64B / 66B coding block, and a third control 64B / 66B coding block, and then converts the obtained second control 64B / 66B coding block and the third control 64B / 66B coding block into the initial first control 64B / 66B coding block to be transmitted, thereby realizing the conversion of the 64B / 66B coding block into a coding block with higher coding efficiency for transmission.
[0068] It should be noted that existing 10GE and 40GE Ethernet physical layer signals use 64B / 66B code blocks. For Ethernet physical layer signals at rates above 100GE, media access control frames are converted into 64B / 66B code blocks, which are then converted into 256B / 257B code blocks. FEC code blocks are then added to these 256B / 257B code blocks to form FEC code blocks, which are then transmitted at the physical layer. As Ethernet physical layer signal rates increase, such as to 1.6Tbps and above, it is likely that more efficient code blocks, such as 512B / 513B or 1024B / 1025B, will be needed compared to 256B / 257B code blocks. Through the method of the embodiment of the present application, 64B / 66B coding blocks can be converted into 1024B / 1025B coding blocks in a relatively simple manner, promoting the use of 1024B / 1025B coding blocks to replace 256B / 257B coding blocks in the future, thereby further reducing the rate of Ethernet physical layer signals.
[0069] In addition, the present application can also be used in an optical transport network (OTN) or a slicing packet network (SPN) to reduce the rate of 64B / 66B coded signals when transmitting 64B / 66B coded blocks. For example, G.709 stipulates that Fibre Channel-1200 (FC-1200) signals and 40GE signals also need to first convert 64B / 66B coded signals into 512B / 513B coded signals. The method of the present application can be used to convert 64B / 66B coded blocks into 1024B / 1025B coded blocks, thereby further reducing the rate of the converted coded blocks.
[0070] The embodiment of the present application also provides an electronic device. FIG2 shows a schematic diagram of the structure of an electronic device provided by an exemplary embodiment of the present application. Referring to FIG2 , the electronic device is used to execute the above-mentioned 64B / 66B code block transmission method. FIG2 is a schematic diagram of the structure of an electronic device for implementing various embodiments of the present application. The electronic device may have relatively large differences due to different configurations or performances, and may include a processor (processor) 201, a communication interface (Communications Interface) 202, a memory (memory) 203 and a communication bus 204, wherein the processor 201, the communication interface 202, and the memory 203 communicate with each other through the communication bus 204. The processor 201 can call a computer program stored in the memory 203 and can run on the processor 201 to execute the various steps of the above-mentioned 64B / 66B code block transmission method embodiment, and can achieve the same technical effect. To avoid repetition, it will not be repeated here.
[0071] It should be noted that the electronic devices in the embodiments of the present application include: servers, terminals, or other devices other than terminals.
[0072] The above electronic device structure does not constitute a limitation of the electronic device. The electronic device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently. For example, the input unit may include a graphics processing unit (GPU) and a microphone, and the display unit may be configured in the form of a liquid crystal display, an organic light emitting diode, etc. to configure the display panel. The user input unit includes a touch panel and at least one of other input devices. The touch panel is also called a touch screen. Other input devices may include but are not limited to a physical keyboard, function keys (such as volume control buttons, switch buttons, etc.), a trackball, a mouse, and a joystick, which will not be repeated here.
[0073] The memory can be used to store software programs and various data. The memory may mainly include a first storage area for storing programs or instructions and a second storage area for storing data, wherein the first storage area may store an operating system, applications or instructions required for at least one function (such as a sound playback function, an image playback function, etc.), etc. In addition, the memory may include a volatile memory or a non-volatile memory, or the memory may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. Volatile memory can be random access memory (RAM), static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDRSDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link DRAM (SLDRAM) and direct rambus random access memory (DRRAM).
[0074] The processor may include one or more processing units; optionally, the processor may integrate an application processor and a modem processor. The application processor primarily handles operations related to the operating system, user interface, and application programs, while the modem processor primarily processes wireless communication signals, such as a baseband processor. It is understood that the modem processor may not be integrated into the processor.
[0075] The present application also provides a readable storage medium having at least one computer program stored therein, which is loaded and executed by a processor to implement all or part of the steps in the above-mentioned method for transmitting 64B / 66B encoded blocks. For example, the readable storage medium can be a read-only memory (ROM), a random access memory (RAM), a compact disc read-only memory (CD-ROM), a magnetic tape, a floppy disk, an optical data storage device, or the like.
[0076] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.
[0077] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), and includes a number of instructions for enabling a terminal (which can be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in each embodiment of the present application.
[0078] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of the present application that follow the general principles of the present application and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered merely as exemplary, and the true scope and spirit of the present application are indicated by the claims.
[0079] It should be understood that the present application is not limited to the exact structures described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.
Claims
1. A transmission method for 64B / 66B encoded blocks, comprising: Obtaining a 64B / 66B encoded block to be transmitted, wherein the 64B / 66B encoded block includes a 2-bit synchronization header, and the value of the 2-bit synchronization header is used to indicate that the 64B / 66B encoded block is a data 64B / 66B encoded block or a first control 64B / 66B encoded block; the first control 64B / 66B encoded block further includes an 8-bit type field and a 56-bit information field, and the value of the 8-bit type field is used to distinguish 11 different encoding types; Dividing the first control 64B / 66B encoded blocks of the 11 different encoding types into encoded blocks of the first group of encoding types and encoded blocks of the second group of encoding types, converting the 8-bit type field in the encoded blocks of the first group of encoding types into an 8-bit first group encoding type field, and keeping the 56-bit information field unchanged; converting the 8-bit type field in the encoded blocks of the second group of encoding types into a 9-bit second group encoding type field, and converting the 56-bit information field into a 55-bit information field; Combining the 2-bit synchronization header, the 8-bit first group encoding type field and the 56-bit information field into 66 bits of a second control 64B / 66B encoded block; combining the 2-bit synchronization header, the 9-bit second group encoding type field and the 55-bit information field into 66 bits of a third control 64B / 66B encoded block; Transmitting the data 64B / 66B encoded block, the second control 64B / 66B encoded block and the third control 64B / 66B encoded block.
2. The method according to claim 1, wherein In the 64B / 66B encoded block to be transmitted, the value of the 2-bit synchronization header being 01 indicates that the 64B / 66B encoded block is the data 64B / 66B encoded block; the value of the 2-bit synchronization header being 10 indicates that the 64B / 66B encoded block is the first control 64B / 66B encoded block; the 56-bit information field includes data characters, control characters, fixed information and information field redundant bits.
3. The method according to claim 2, wherein, In the first control 64B / 66B encoded block, the 56-bit information field includes the data characters, the control characters, the fixed information and the information field redundant bits, wherein the data characters have a length of 8 bits, the data characters are represented by Dn, where n is a number from 1 to 8, and the n represents the order in which the data character appears in the 56-bit information field; there are two types of control characters, one of the control characters has a length of 7 bits, the control character is represented by Cm, where m is a number from 1 to 8, and the m represents the order in which the control character appears in the 56-bit information field, and the other control character has a length of 28 bits and includes 1 4-bit Q0 and 3 data characters D1, D2 and D3; the fixed information includes 28 bits of 0; the information field redundant bits are the bits in the 56-bit information field other than the data characters, the control characters and the fixed information.
4. The method according to claim 3, wherein For all coding blocks of the first group of coding types in the coding block, there are no information field redundant bits in the 56-bit information field; for all coding blocks of the second group of coding types in the coding block, there are information field redundant bits in the 56-bit information field.
5. The method according to claim 2, wherein The 8-bit first group coding type field includes a 3-bit control type identifier and 5-bit type field redundant bits. Among them, the 3-bit control type identifier is used to identify a different coding blocks of the first group of coding types in the coding block, where a is a positive integer less than 7; the 9-bit second group coding type field includes a 4-bit control type identifier and the 5-bit type field redundant bits. Among them, the 4-bit control type identifier is used to identify b different coding blocks of the second group of coding types in the coding block, and b = 11 - a.
6. The method according to claim 5, wherein The value of the 3-bit control type identifier is a 3-bit value in the first value group, and the first value group includes the a different 3-bit values, where the a different 3-bit values are obtained by selecting from c different 3-bit values. Among them, the said Indicating for the said perform a rounding operation; The value of the 4-bit control type identifier is one of the 4-bit numerical values in the second value group. The second value group includes the b different 4-bit numerical values. Among them, from the c different 3-bit numerical values, the a different 3-bit numerical values corresponding to the first value group are removed to obtain (c - a) different 3-bit numerical values. Adding 1 bit to the (c - a) different 3-bit numerical values gives 2*(c - a) different 4-bit numerical values. Selecting the b different 4-bit numerical values from the 2*(c - a) different 4-bit numerical values as the second value group.
7. The method according to claim 6, wherein, The conversion of the 8-bit type field in the coding block of the first group of coding types into an 8-bit first group coding type field includes: Determine the specific type of the coding type according to the value of the 8-bit type field; Determine the value of the 3-bit control type identifier according to the specific type of the determined coding type; Obtain the 8-bit first group coding type field according to the value of the 3-bit control type identifier and the 5-bit type field redundant bits.
8. The method according to claim 6, wherein The conversion of the 8-bit type field in the coding block of the second group of coding types into a 9-bit second group coding type field and the 56-bit information field into a 55-bit information field includes: Determine the specific type of the coding type according to the value of the 8-bit type field; Determine the value of the 4-bit control type identifier according to the specific type of the determined coding type; Obtain the 9-bit second group coding type field according to the value of the 4-bit control type identifier and the 5-bit type field redundant bits; Delete 1 bit of the information field redundant bit in the 56-bit information field to obtain the 55-bit information field; wherein the position of the deleted 1 bit of the information field redundant bit is determined according to the second group of coding types.
9. The method according to any one of claims 1 to 8, wherein, The transmission of the data 64B / 66B coding block, the second control 64B / 66B coding block, and the third control 64B / 66B coding block includes: Delete the 5-bit type field redundant bits in the second control 64B / 66B coding block and the third control 64B / 66B coding block; Convert 16 consecutive data 64B / 66B coding blocks, the second control 64B / 66B coding block, and the third control 64B / 66B coding block into 1 1024B / 1025B coding block; Transmit the 1024B / 1025B coding block.
10. The method according to claim 9, wherein, After transmitting the 1024B / 1025B coding block, the method further includes: Receive the 1024B / 1025B coding block; Convert 1 1024B / 1025B coding block into 16 data 64B / 66B coding blocks, the second control 64B / 66B coding block, and the third control 64B / 66B coding block; Convert the second control 64B / 66B coding block and the third control 64B / 66B coding block into the first control 64B / 66B coding block.
11. An electronic device, the electronic device includes a processor and a memory, and a program or instruction that can run on the processor is stored on the memory. When the program or instruction is executed by the processor, the transmission method of the 64B / 66B coding block according to any one of claims 1 to 10 is implemented.
12. A readable storage medium, a program or instruction is stored on the readable storage medium. When the program or instruction is executed by a processor, the transmission method of the 64B / 66B coding block according to any one of claims 1 to 10 is implemented.
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