Memory management method and apparatus, and virtual-machine live migration method and apparatus

Abstract

Disclosed in the present application are a memory management method and apparatus, and a virtual-machine live migration method and apparatus. The management method comprises: performing marking processing on a memory to be marked, wherein the memory to be marked is a memory which is not managed by an operating system; on the basis of a received memory access request, determining a memory to be accessed; and when the memory to be accessed is the memory to be marked which has been subjected to marking processing, executing a preset operation. Marking processing is performed on a memory which is not managed by an operating system and needs to be marked, such that a specific memory can be marked according to requirements; and when it is detected that the specific memory which has been subjected to marking processing is accessed, a specific operation can thus be implemented, thereby meeting user requirements.

Description

Technical Field of Memory Management Method and Apparatus, Virtual Machine Live Migration Method and Apparatus

[0001] This application relates to the field of computer technologies, and particularly relates to a memory management method, a virtual machine live migration method and apparatus, an electronic device, and a storage medium. Background Art

[0002] In a computer, memory is a storage device for storing data or programs, which generally includes two parts: memory managed by the operating system and memory not managed by the operating system.

[0003] In some scenarios, for the memory not managed by the operating system, when the CPU (Central Processing Unit) accesses this part of the memory, there is a need to trigger a specific operation designed by the user, but currently there is no solution that can achieve this goal. Summary of the Invention

[0004] The purpose of this application is to propose a memory management method and apparatus, a virtual machine live migration method and apparatus, an electronic device, and a storage medium for the deficiencies of the above related technologies, and this purpose is achieved through the following technical solutions.

[0005] A first aspect of this application proposes a memory management method, and the method includes: performing a marking process on the memory to be marked, where the memory to be marked is memory not managed by the operating system; determining the memory to be accessed according to the received memory access request; and performing a preset operation when the memory to be accessed belongs to the memory to be marked that has been marked.

[0006] Based on the memory management method described in the above first aspect, it has at least the following beneficial effects or advantages: By performing a marking process on the memory that needs to be marked and is not managed by the operating system, specific memory can be marked as needed, so that when it is detected that the specific marked memory is accessed, a specific operation can be implemented to meet the user's needs.

[0007] A second aspect of this application proposes a virtual machine live migration method, where the live migration is to migrate a virtual machine from a source end to a destination end and is applied to the destination end. The method includes: performing a marking process on the memory occupied by the data that has not been migrated from the source end to the destination end; starting the virtual machine; when it is detected that the memory to be accessed by the virtual machine belongs to the marked memory, obtaining the data of the memory to be accessed from the source end and storing the data in the memory to be accessed; and canceling the marking of the memory to be accessed and restoring the access process to the memory to be accessed.

[0008] Based on the virtual machine live migration method described in the second aspect above, it has at least the following beneficial effects or advantages: During the virtual machine live migration process, by marking the memory occupied by the data that has not been migrated to the destination end, the virtual machine is started at the destination end. When it is detected that the memory accessed by the virtual machine belongs to the marked memory, the data of the accessed memory is transmitted from the source end to the destination end, then the mark of the accessed memory is cancelled, and the access processing of the accessed memory is restored. Since as long as the virtual machine accesses the marked memory, the data of the accessed memory will be transmitted from the source end to the destination end until all the marked memory is unmarked, completing the entire live migration process and ensuring that the virtual machine does not stop, which well meets the requirements of virtual machine live migration.

[0009] The third aspect of this application proposes a memory management device, which includes: a marking module for marking the memory to be marked, and the memory to be marked is the memory not managed by the operating system; an access module for determining the memory to be accessed according to the received memory access request; an operation module for performing a preset operation when the memory to be accessed belongs to the memory to be marked that has been marked.

[0010] The fourth aspect of this application proposes a virtual machine live migration device, which includes: a marking module for marking the memory occupied by the data that has not been migrated from the source end to the destination end; a startup module for starting the virtual machine; a data acquisition module for detecting that the memory to be accessed by the virtual machine belongs to the marked memory, acquiring the data of the memory to be accessed from the source end, and storing the data into the memory to be accessed; a recovery module for cancelling the mark of the memory to be accessed and restoring the access processing of the memory to be accessed.

[0011] The fifth aspect of this application proposes an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, and the processor executes the program to implement the method described in the first aspect above.

[0012] The sixth aspect of this application proposes a computer-readable storage medium, on which a computer program is stored, and the program is executed by the processor to implement the method described in the first aspect above.

[0013] The above description is only an overview of the technical solution of this application. In order to be able to understand the technical means of this application more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features and advantages of this application more obvious and understandable, the specific embodiments of this application are hereinafter specifically exemplified. Brief Description of Drawings

[0014] The accompanying drawings described herein are used to provide a further understanding of the present application, and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application, and do not constitute an improper limitation of the present application. In the drawings:

[0015] FIG. 1 is a flowchart of an embodiment of a memory management method shown according to an exemplary embodiment;

[0016] FIG. 2 is a schematic diagram of a page table structure shown according to an exemplary embodiment;

[0017] FIG. 3 is a schematic diagram of a page table entry structure shown according to an exemplary embodiment;

[0018] FIG. 4 is a flowchart of an embodiment of a virtual machine live migration method shown according to an exemplary embodiment;

[0019] FIG. 5 is a schematic diagram of page table splitting shown according to an exemplary embodiment;

[0020] FIG. 6 is a schematic diagram of the structure of a memory management device shown according to an exemplary embodiment;

[0021] FIG. 7 is a schematic diagram of the structure of a virtual machine live migration device shown according to an exemplary embodiment;

[0022] FIG. 8 is a schematic diagram of the hardware structure of an electronic device shown according to an exemplary embodiment;

[0023] FIG. 9 is a schematic diagram of the structure of a storage medium shown according to an exemplary embodiment. DETAILED DESCRIPTION

[0024] Exemplary embodiments will be described in detail herein, and examples thereof are shown in the drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0025] The terms used in the present application are for the purpose of describing specific embodiments only and are not intended to limit the present application. The singular forms "a", "the" and "said" used in the present application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term "and / or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0026] It should be understood that although terms such as first, second, and third may be used in this application to describe various information, such information should not be limited to these terms. These terms are only used to distinguish information of the same type from each other. For example, without departing from the scope of this application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the word "if" as used herein may be interpreted as "when...", "while...", or "in response to a determination".

[0027] As mentioned above, for the memory that is not managed by the operating system, there is currently no implementation solution for performing specific operations when accessing this part of the memory.

[0028] In some actual application scenarios, when the CPU accesses this part of the memory, there is a need to trigger corresponding operations designed by the user. For example, in the scenario of virtual machine live migration, post-copy live migration is an important live migration method. In this migration method, the virtual machine is quickly started at the destination end. When the virtual machine at the destination end accesses the memory that has not been transferred to the destination end, it is necessary to pause the access task, copy the data of the accessed memory from the source end to the destination end, and then resume the processing of the access task. Based on the characteristics of the post-copy live migration scenario, it is necessary to be able to perform a data copy task first and then perform the processing of the access task when this part of the memory that has not been transferred to the destination end is accessed at the destination end. Based on this, when this part of the memory that has not been transferred to the destination end is accessed, it is possible to first perform a data copy task and then perform the processing of the access task.

[0029] Based on this, the present application proposes a memory management method. By performing a marking process on the memory that needs to be marked and is not managed by the operating system, specific memory can be marked as needed, so that when a memory access request for accessing the specific memory that has been marked is received, the operation pre-designed by the user is executed to meet the user's needs.

[0030] The technical solution of the present application and how the technical solution of the present application solves the foregoing technical problems will be described in detail below with specific embodiments. The several specific embodiments listed may be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described in detail below with reference to the accompanying drawings. Embodiment 1

[0031] FIG. 1 is a flowchart of an embodiment of a memory management method shown according to an exemplary embodiment. The memory to be marked involved in the embodiment of the present application is not managed by the operating system, so any management operation performed on this part of the memory will not conflict with the memory management operation of the operating system.

[0032] As shown in FIG. 1, the memory management method includes the following steps 101 to 103.

[0033] Step 101: Mark the memory to be marked.

[0034] Step 102: Determine the memory to be accessed according to the received memory access request.

[0035] Step 103: Perform a preset operation when the memory to be accessed belongs to the memory to be marked that has been marked.

[0036] In the embodiment of the present application, the memory to be marked is a section of space that requires specific operations when accessed by the CPU. By marking this section of space, it is used to indicate that this section of space cannot be normally accessed, but enters the exception handling process to execute specific operations designed by the user.

[0037] The above memory access request carries the logical address to be accessed. This logical address is an address used in programs and instructions, which points to a section of address space in the memory. During execution, the logical address will be converted into the physical address of the memory, so that the memory to be accessed can be located.

[0038] The above preset operation is a specific operation set by the user according to actual needs in the exception handling process. That is to say, if the memory to be accessed belongs to the marked memory space, this specific operation will be executed. Exemplarily, this specific operation can be to record the current memory access, or it can also be to copy preset data to the memory to be accessed.

[0039] So far, through the memory management process shown in FIG. 1 above, by marking the memory that needs to be marked and does not belong to the operating system management, when it is detected that the specific marked memory is accessed, specific operations can be implemented to meet the user's needs.

[0040] In some embodiments of the present application, the process of marking the memory to be marked includes: by determining the page table entry corresponding to the memory to be marked, and then modifying the value of the preset flag bit in the page table entry with a preset value to complete the marking of the memory to be marked.

[0041] For memory, the commonly used storage management method is paging storage management. In this method, the concept of a page table is involved. The page table is a table used to implement the conversion between logical addresses and physical addresses. It consists of multiple page table entries, and each page table entry records the physical block number of the memory and some flag bits. As shown in the page table structure in Figure 2, by locating the page table entry corresponding to the page number in the logical address and combining the physical block number recorded in the page table entry with the offset within the page in the logical address, the physical address can be obtained. These flag bits can represent some characteristics of the corresponding memory. Therefore, by modifying the value of the preset flag bits, the corresponding memory can be marked.

[0042] Since the memory to be marked is memory not managed by the operating system, the flag bits used when the operating system manages memory can be used as the preset flag bits. As shown in a page table entry structure in Figure 3, it is 4 bytes and 32 bits. Among them, bits 0 - 11 all represent flag bits. Bit 0, the Present flag bit: represents whether the page corresponding to the physical block number is in memory; Bit 1, the Read / Write flag bit and Bit 2, the User / Supervisor flag bit are both bits that provide hardware protection for the page corresponding to the physical block number; Bit 3, the PWT flag bit and Bit 4, the PCD flag bit represent whether the page corresponding to the physical block number is written to the TLB (Translation Look-aside Buffer, address translation cache); Bit 5, the A flag bit is used for marking when the CPU performs a read operation; Bit 6, the Dirty flag bit is used for marking when the CPU performs a write operation; Bit 7, the PAT flag bit represents the cache type of the memory, and Bit 8, the G flag bit indicates whether the TLB of the page is global; Bits 9 - 11 are available for the operating system to manage. From this, it can be seen that any one of bits 9 - 11 can be used as the preset flag bit.

[0043] Assume that the preset value 1 indicates that the corresponding memory is marked, and 0 indicates that the corresponding memory is not marked.

[0044] As an alternative implementation, for the process of determining the page table entry corresponding to the memory to be marked, the starting address and memory length of the memory to be marked can be obtained, and then the page table entry corresponding to the memory to be marked can be determined according to the starting address and memory length.

[0045] In this implementation, the starting address and memory length can be obtained according to the actual needs of the user. The starting address and memory length can indicate a section of memory that needs to be marked. This starting address is a logical address, that is, the starting address of the logical memory space corresponding to the memory to be marked.

[0046] Among them, the logical address serving as the starting address is composed of a page number and an offset within a page. The corresponding page table can be determined through the page number. As shown in the page table structure of FIG. 2 above, the page table register (PTR, Page-Table Register) is used to store the starting address and length of the page table. Through the page number and the page table register, the corresponding page table can be located, and at the same time, the page table entry corresponding to the page number in the page table can be obtained. The page table entry found from the starting address can be regarded as the starting page table entry of the memory to be marked. By adding the memory length to the logical address, the ending page table entry of the memory to be marked can be obtained. All the page table entries included between the starting page table entry and the ending page table entry are the page table entries corresponding to the memory to be marked. Remember that the starting page table entry of the memory, by adding the memory length to the logical address, the ending page table entry of the memory to be marked can be obtained. All the page table entries between the starting page table entry and the ending page table entry are the page table entries corresponding to the memory to be marked.

[0047] As an alternative embodiment, the above preset operation may include at least one of the following: (1) Recording a memory access request; (2) Copying preset data to the memory to be accessed, restoring the preset flag bit in the page table entry corresponding to the memory to be accessed to the value before modification, and executing the memory access request to access the preset data.

[0048] In a specific embodiment, for the process of copying preset data to the memory to be accessed, the physical block number in the page table entry corresponding to the memory to be accessed can be used to create a temporary page table entry for the memory to be accessed. Then, according to the memory access request and this temporary page table entry, the preset data is copied to the memory to be accessed, and the temporary page table entry is deleted.

[0049] Among them, the preset flag bit in the temporary page table entry is not modified, and it is allowed to operate on the memory to be accessed through the temporary page table entry to realize writing the preset data into the memory to be accessed.

[0050] Specifically, by obtaining the offset within a page included in the logical address carried by the memory access request, and then using the obtained offset within a page and the physical block number recorded in the temporary page table entry to obtain the physical address of the memory to be accessed, so as to store the preset data into the memory to be accessed corresponding to this physical address.

[0051] Based on the above description, in step 103 above, the memory to be accessed belongs to the memory to be marked that is being marked. Specifically, it means that the preset flag bit in the page table entry corresponding to the memory to be accessed is a preset value. Embodiment 2

[0052] Based on the embodiment shown in FIG. 1 above, the above-mentioned memory management method can be applied in the virtual machine live migration scenario to meet the live migration requirements.

[0053] FIG. 4 is a flowchart of an embodiment of a virtual machine live migration method shown according to an exemplary embodiment. Virtual machine live migration is to migrate a virtual machine from a source end to a destination end. This embodiment is applied to the destination end.

[0054] As shown in FIG. 4, the virtual machine live migration method includes the following steps 401 to 404.

[0055] Step 401: Mark the memory occupied by the data that has not been migrated from the source end to the destination end.

[0056] In this step, the data that has not been migrated from the source end to the destination end is still stored at the source end, but at the destination end, a memory of a specified size has been allocated for the migrated virtual machine for the virtual machine to use, and the corresponding page table has also been created. If the virtual machine accesses the memory corresponding to this part of the data after starting at the destination end, specific operations need to be performed to avoid access errors. Therefore, the memory occupied by this part of the data can be marked as memory to be marked at the destination end, so as to perform specific operations when being accessed.

[0057] As an implementation manner, the starting address and memory length of the memory occupied by the data that has not been migrated to the destination end can be obtained from the source end first, and then the page table entries corresponding to the occupied memory are determined according to the starting address and memory length, and the value of a preset flag bit in the page table entries is modified using a preset value to complete the marking process.

[0058] In a specific implementation manner, for the process of determining the page table entries corresponding to the occupied memory according to the starting address and memory length, the corresponding page table can be determined according to the starting address and memory length, and then the data read granularity at the source end is compared with the page table management granularity. When the data read granularity is less than the page table management granularity, the page table can be split, and the page table entries corresponding to the occupied memory are determined according to the split page table; when the data read granularity is greater than or equal to the page table management granularity, the page table entries corresponding to the occupied memory can be directly determined according to the page table.

[0059] Among them, the data read granularity at the source end refers to how much dirty page the source end reads from the memory and transfers to the destination end each time. The page table management granularity at the destination end is the physical memory block size managed by the page table entries of the lowest-level page table. If the data read granularity is less than the page table management granularity, it means that the page table management granularity is too large, and there will be a problem that the memory marking cannot be refined. Therefore, the page table needs to be split to reduce the page table management granularity and improve the fine granularity of the memory marking.

[0060] In specific implementation, the general data reading granularity is 4KB. The page table splitting can be achieved by adding a level of page table. As shown in Figure 5, taking a 32-bit logical address as an example, assume that the original logical address consists of a page number of 10 bit positions and an intra-page offset of 21 bit positions. In this way, a 21-bit intra-page offset points to a 2M physical memory block. By using the 10-bit page number as the PMD (Page Middle Directory), that is, representing the outer page number P1, 10 bit positions are divided from the 21-bit positions as the PTE (Page Table Entries), that is, representing the page table entry offset P2, and the remaining 12 bit positions represent the intra-page offset d. In this way, a 12-bit intra-page offset d points to a 4KB physical memory block, that is, reducing the page table management granularity to 4KB. Of course, during the address transformation process, a register for storing the base address of the PGD (Page Global Directory) table is used.

[0061] After splitting the page table, first use the outer page number P1 in the logical address to find the starting address of the next-level page table in the external page table entry corresponding to the PMD page table, and then use the page table entry offset P2 in the logical address to find the corresponding page table entry in the PTE page table.

[0062] It should be noted that the page table splitting implemented by adding a level of page table shown in Figure 5 above is only an exemplary example, and the present application does not limit the specific implementation of the page table splitting, as long as the purpose of reducing the page table management granularity can be achieved.

[0063] Step 402: Start the virtual machine.

[0064] In this step, after marking the memory occupied by the data that has not been migrated, the virtual machine migrated from the source end is started at the destination end, so that the virtual machine runs at the destination end. Since the marking process is an automatic marking and the time consumption is very small at the millisecond level, it can be considered that the virtual machine starts immediately after migrating from the source end to the destination end, which is equivalent to migrating the running virtual machine from the source end to the destination end.

[0065] Step 403: Detect that the memory to be accessed by the virtual machine belongs to the marked memory, obtain the data of the memory to be accessed from the source end, and store the data into the memory to be accessed.

[0066] In this step, it is detected that a preset flag bit in the page table entry corresponding to the memory to be accessed by the virtual machine is a preset value, so as to implement the detection that the memory to be accessed belongs to the marked memory.

[0067] Step 404: Cancel the mark of the memory to be accessed, and resume the access process of the memory to be accessed.

[0068] In this step, after copying data from the source end to the destination end and storing it in the corresponding memory, by canceling the mark of the memory to be accessed, that is, restoring the preset flag bit in the corresponding page table entry to the value before modification, so that the virtual machine can return the corresponding data during subsequent access.

[0069] Based on the above-mentioned second embodiment, during the hot migration of the virtual machine, the memory occupied by the data that has not been migrated to the destination end is marked, the virtual machine is started at the destination end. When it is detected that the memory accessed by the virtual machine belongs to the marked memory, after transmitting the data of the accessed memory from the source end to the destination end, cancel the mark of the accessed memory, and resume the access process of the accessed memory. Since as long as the virtual machine accesses the marked memory, the data of the accessed memory will be transmitted from the source end to the destination end until all the marked memories are unmarked, completing the entire process of hot migration and ensuring that the virtual machine does not stop, which well meets the requirements of virtual machine hot migration.

[0070] The execution subject of the embodiments of the present application can be an application program, a service, an instance, a software-form function module, a virtual machine (Virtual Machine, VM), a container, a cloud server, etc., or a hardware device with data processing functions. such as a server or a terminal device), or a hardware chip (such as a CPU, GPU, FPGA, NPU, AI acceleration card, or DPU). The device for implementing the memory management method or the virtual machine live migration method can be deployed on the computing device of the application party providing the corresponding service or on the cloud computing platform providing computing power, storage, and network resources. The service mode provided by the cloud computing platform to the outside world can be IaaS (Infrastructure as a Service), PaaS (Platform as a Service), SaaS (Software as a Service), or DaaS (Data as a Service). Taking the platform providing SaaS (Software as a Service) as an example, the cloud computing platform can use its own computing resources to provide the training of the memory management method or the virtual machine live migration method model or execute the functions of the memory management method or the virtual machine live migration method module. The specific application architecture can be built according to service requirements. For example, the platform can provide the construction service based on the above model to the application party or individual using the platform resources, and further call the above model and implement the functions of the online or offline memory management method or the virtual machine live migration method according to the memory management method or the virtual machine live migration method request submitted by relevant client devices or servers, etc.

[0071] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties. And the collection, use, and processing of relevant data need to comply with the relevant laws, regulations, and standards of relevant countries and regions, and corresponding operation entrances are provided for users to choose to authorize or refuse.

[0072] Corresponding to the foregoing embodiments of the memory management method, the present application also provides an embodiment of a memory management device.

[0073] FIG. 6 is a schematic structural diagram of a memory management device according to an exemplary embodiment. The device is used to execute the memory management method provided in any of the above embodiments. As shown in FIG. 6, the memory management device includes: a marking module 510, configured to perform a marking process on the memory to be marked, where the memory to be marked is a memory not managed by the operating system; an access module 520, configured to determine the memory to be accessed according to the received memory access request; and an operation module 530, configured to perform a preset operation when the memory to be accessed belongs to the memory to be marked that has been marked.

[0074] In an optional implementation manner, the marking module 510 is specifically configured to determine the page table entry corresponding to the memory to be marked; modify the value of a preset flag bit in the page table entry by using a preset value to complete the marking process of the memory to be marked.

[0075] In an optional implementation manner, the marking module 510 is specifically configured to, in the process of determining the page table entry corresponding to the memory to be marked, obtain the start address and the memory length of the memory to be marked; determine the page table entry corresponding to the memory to be marked according to the start address and the memory length.

[0076] In an optional implementation manner, the preset operation at least includes one of the following: recording the memory access request; copying preset data to the memory to be accessed, restoring the value of the preset flag bit in the page table entry corresponding to the memory to be accessed to the value before modification, and executing the memory access request.

[0077] In an optional implementation manner, the operation module 530 is specifically configured to, in the process of copying preset data to the memory to be accessed, create a temporary page table entry for the memory to be accessed by using the physical block number in the page table entry corresponding to the memory to be accessed; the preset flag bit in the temporary page table entry is not modified; copy the preset data to the memory to be accessed according to the memory access request and the temporary page table entry, and delete the temporary page table entry.

[0078] In an optional implementation manner, the operation module 530 is specifically configured to, in the process of copying preset data to the memory to be accessed according to the memory access request and the temporary page table entry, obtain the page offset in the logical address carried by the memory access request; determine the physical address of the memory to be accessed by using the page offset and the physical block number in the temporary page table entry; and store the preset data in the memory to be accessed corresponding to the physical address.

[0079] In an alternative implementation, the memory to be accessed belongs to the memory to be marked that has been marked and processed, and a preset flag bit in the page table entry corresponding to the memory to be accessed has the preset value.

[0080] Corresponding to the embodiments of the virtual machine live migration method described above, the present application also provides embodiments of a virtual machine live migration device.

[0081] FIG. 7 is a schematic structural diagram of a virtual machine live migration device according to an exemplary embodiment. The device is used to execute the memory management method provided in any of the above embodiments. As shown in FIG. 7, the virtual machine live migration device includes: a marking module 610, configured to perform marking processing on the memory occupied by the data that has not been migrated from the source end to the destination end; a startup module 620, configured to start the virtual machine; a data acquisition module 630, configured to, when detecting that the memory to be accessed by the virtual machine belongs to the memory that has been marked and processed, acquire the data of the memory to be accessed from the source end and store the data in the memory to be accessed; a recovery module 640, configured to cancel the marking of the memory to be accessed and resume the access processing of the memory to be accessed.

[0082] In an alternative implementation, the marking module 610 is specifically configured to acquire, from the source end, the starting address and memory length of the memory occupied by the data that has not been migrated to the destination end; determine the page table entry corresponding to the occupied memory according to the starting address and memory length; and modify the value of the preset flag bit in the page table entry with a preset value to complete the marking processing.

[0083] In an alternative implementation, the marking module 610 is specifically configured to, in the process of determining the page table entry corresponding to the occupied memory according to the starting address and the memory length, determine the page table corresponding to the occupied memory according to the starting address and the memory length; when the data reading granularity at the source end is less than the page table management granularity, split the page table, and determine the page table entry corresponding to the occupied memory according to the split page table; when the data reading granularity at the source end is greater than or equal to the page table management granularity, determine the page table entry corresponding to the occupied memory according to the page table.

[0084] The implementation processes of the functions and effects of each unit in the above device are specifically described in the implementation processes of the corresponding steps in the above method, and will not be elaborated here.

[0085] For the device embodiments, since they basically correspond to the method embodiments, the relevant parts can be referred to the descriptions in the method embodiments. The device embodiments described above are only illustrative. The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed to multiple network units. Some or all of the modules can be selected according to actual needs to achieve the purpose of the solution of this application. A person of ordinary skill in the art can understand and implement it without creative work.

[0086] The embodiments of the present application also provide an electronic device corresponding to the memory management method or virtual machine hot migration method provided in the foregoing embodiments to execute the above memory management method or virtual machine hot migration method.

[0087] FIG. 8 is a hardware structure diagram of an electronic device shown according to an exemplary embodiment. The electronic device includes: a communication interface 601, a processor 602, a memory 603, and a bus 604. Among them, the communication interface 601, the processor 602, and the memory 603 complete communication with each other through the bus 604. The processor 602 can execute the memory management method or virtual machine hot migration method described above by reading and executing the machine-executable instructions corresponding to the control logic of the memory management method in the memory 603. For the specific content of the method, refer to the above embodiments and will not be repeated here.

[0088] The memory 603 mentioned in this application can be any electronic, magnetic, optical or other physical storage device, which can store information such as executable instructions, data, etc. Specifically, the memory 603 can be RAM (Random Access Memory), flash memory, a storage drive (such as a hard disk drive), any type of storage disk (such as an optical disk, a DVD, etc.), or a similar storage medium, or a combination thereof. Through at least one communication interface 601 (which can be wired or wireless), a communication connection is established between this system network element and at least one other network element, and the Internet, a wide area network, a local area network, a metropolitan area network, etc. can be used.

[0089] The bus 604 can be an ISA bus, a PCI bus, an EISA bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. Among them, the memory 603 is used to store a program, and the processor 602 executes the program after receiving an execution instruction.​

[0090] The processor 602 may be an integrated circuit chip with the ability to process signals. In the implementation process, each step of the above method can be completed by the integrated logic circuit in the hardware of the processor 602 or the instructions in the form of software. The above-mentioned processor 602 may be a general-purpose processor, including a network processor (NP for short), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. It can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present application. The general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as being executed by a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor.

[0091] The electronic device provided in the embodiments of the present application and the memory management method or virtual machine hot migration method provided in the embodiments of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, run or implemented by them.

[0092] The embodiments of the present application also provide a computer-readable storage medium corresponding to the memory management method or virtual machine hot migration method provided in the foregoing embodiments. Referring to FIG. 9 shown, the computer-readable storage medium shown is an optical disc 30, on which a computer program (i.e., a program product) is stored. When the computer program is run by a processor, it will execute the memory management method or virtual machine hot migration method provided in any of the foregoing embodiments.

[0093] It should be noted that examples of the computer-readable storage medium may also include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other optical and magnetic storage media, which will not be elaborated here one by one.

[0094] The computer-readable storage medium provided in the above embodiments of the present application and the memory management method or virtual machine hot migration method provided in the embodiments of the present application are based on the same inventive concept and have the same beneficial effects as the methods adopted, run or implemented by the application programs stored therein.

[0095] Those skilled in the art will readily conceive of other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any variations, uses, or adaptations of the present application, which follow the general principles of the present application and include known common general knowledge or conventional technical means in the technical field not disclosed in the present application. The specification and examples are only illustrative, and the true scope and spirit of the present application are pointed out by the following claims.

[0096] It should also be noted that the term "comprising", "including" or any other variant thereof is intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the statement "comprising a....." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the said element.

[0097] The above are only the preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the scope of protection of the present application.

Claims

Claims 1. A memory management method, comprising: Perform marking processing on the to-be-marked memory, where the to-be-marked memory is memory not managed by the operating system; Determine the to-be-accessed memory according to the received memory access request; When the to-be-accessed memory belongs to the to-be-marked memory that has been marked, perform a preset operation.

2. The method according to claim 1, wherein The performing of marking processing on the to-be-marked memory includes: determining the page table entry corresponding to the to-be-marked memory; modifying the value of a preset flag bit in the page table entry with a preset value to complete the marking processing of the to-be-marked memory.

3. The method according to claim 2, wherein The determining of the page table entry corresponding to the to-be-marked memory includes: obtaining the starting address and memory length of the to-be-marked memory; determining the page table entry corresponding to the to-be-marked memory according to the starting address and the memory length.

4. The method according to claim 2, wherein The preset operation includes at least one of the following: recording the memory access request; copying preset data to the to-be-accessed memory, restoring the value of the preset flag bit in the page table entry corresponding to the to-be-accessed memory to the value before modification, and executing the memory access request.

5. The method according to claim 4, wherein The copying of preset data to the to-be-accessed memory includes: creating a temporary page table entry for the to-be-accessed memory using the physical block number in the page table entry corresponding to the to-be-accessed memory; the preset flag bit in the temporary page table entry is not modified; copying the preset data to the to-be-accessed memory according to the memory access request and the temporary page table entry, and deleting the temporary page table entry.

6. The method according to claim 5, wherein The copying of preset data to the to-be-accessed memory according to the memory access request and the temporary page table entry includes: obtaining the page offset in the logical address carried by the memory access request; determining the physical address of the to-be-accessed memory using the page offset and the physical block number in the temporary page table entry; storing the preset data in the to-be-accessed memory corresponding to the physical address.

7. The method according to claim 2, wherein The to-be-accessed memory belonging to the to-be-marked memory that has been marked means that the preset flag bit in the page table entry corresponding to the to-be-accessed memory is the preset value.

8. A virtual machine hot migration method, where the hot migration is to migrate a virtual machine from a source end to a destination end, where Applied to the destination end, the method includes: Perform marking processing on the memory occupied by data that has not been migrated from the source end to the destination end; start the virtual machine; when it is detected that the memory to be accessed by the virtual machine belongs to the marked memory, obtain the data of the memory to be accessed from the source end, store the data in the memory to be accessed; cancel the marking of the memory to be accessed, and resume the access processing of the memory to be accessed.

9. The method according to claim 8, wherein, The performing of marking processing on the memory occupied by data that has not been migrated from the source end to the destination end includes: obtaining the starting address and memory length of the memory occupied by data that has not been migrated from the source end to the destination end from the source end; determining the page table entry corresponding to the occupied memory according to the starting address and the memory length; modifying the value of the preset flag bit in the page table entry with a preset value to complete the marking processing.

10. The method according to claim 9, wherein Determining the page table entry corresponding to the occupied memory according to the starting address and the memory length includes: determining the page table corresponding to the occupied memory according to the starting address and the memory length; when the data reading granularity at the source end is smaller than the page table management granularity, splitting the page table, and determining the page table entry corresponding to the occupied memory according to the split page table; when the data reading granularity at the source end is greater than or equal to the page table management granularity, determining the page table entry corresponding to the occupied memory according to the page table.

11. A memory management device, comprising: A marking module for performing marking processing on the memory to be marked, where the memory to be marked is the memory not managed by the operating system; An access module for determining the memory to be accessed according to the received memory access request; An operation module for performing a preset operation when the memory to be accessed belongs to the memory to be marked that has been marked.

12. A virtual machine live migration device, comprising: A marking module for performing marking processing on the memory occupied by the data that has not been migrated from the source end to the destination end; A startup module for starting the virtual machine; A data acquisition module for, when detecting that the memory to be accessed by the virtual machine belongs to the marked memory, acquiring the data of the memory to be accessed from the source end and storing the data in the memory to be accessed; A recovery module for canceling the mark of the memory to be accessed and restoring the access processing of the memory to be accessed.

13. An electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein, The processor executes the program to implement the method according to any one of claims 1-10. 15 methods.

14. A computer-readable storage medium having a computer program stored thereon, wherein, The program is executed by the processor to implement the method according to any one of claims 1-10.

Images