Light-emitting diode epitaxial structure and manufacturing method therefor

Abstract

A light-emitting diode epitaxial structure and a manufacturing method therefor. The light-emitting diode epitaxial structure comprises an N-type semiconductor stacking structure, a P-type semiconductor stacking structure, a quantum well light-emitting layer and an impurity block layer, wherein the quantum well light-emitting layer is arranged between the N-type semiconductor stacking structure and the P-type semiconductor stacking structure; and the impurity block layer is arranged between the P-type semiconductor stacking structure and the quantum well light-emitting layer, and the lattice constant of the impurity block layer is less than the lattice constant of the P-type semiconductor stacking structure. Therefore, an impurity block layer with a relatively small lattice constant is grown between a P-type semiconductor stacking structure and a quantum well light-emitting layer in the present invention, such that the diffusion of Mg atoms from the P-type semiconductor stacking structure can be effectively blocked, thereby improving the distribution of the Mg atoms in the quantum well light-emitting layer, and improving the reliability and stability of a device which uses the structure.

Description

A light-emitting diode epitaxial structure and preparation method Technical Field

[0001] The present invention relates to the field of micro-display technology, and in particular to a light emitting diode epitaxial structure and a preparation method thereof. Background Art

[0002] In the field of light-emitting diode technology, increasing brightness has long been a hot research topic, and to date, LED brightness has achieved significant breakthroughs. In the lighting sector, LEDs have surpassed conventional energy-saving lamps in both brightness and power consumption. In the display sector, an increasing number of displays are using Mini LED and Micro LED, which offer higher brightness, resolution, and power consumption.

[0003] With the diversification of LED applications, higher requirements are being placed on the performance of LEDs, such as lifespan and thermal stability. LEDs are sensitive to high temperatures, and their brightness degrades severely at high temperatures. When LEDs operate under high temperature conditions, dopant atoms in the material, such as Mg atoms, diffuse into the quantum well light-emitting region due to their strong diffusion effect and form non-radiative recombination centers composed of foreign atoms within the crystal material, resulting in non-radiative recombination. This reduces the internal quantum efficiency of the LED, leading to device light decay and poor thermal stability.

[0004] Summary of the Invention

[0005] The purpose of the present invention is to provide a light-emitting diode epitaxial structure and a preparation method, which can overcome the defects of the prior art. By arranging an impurity barrier layer with a small lattice constant between the P-type semiconductor stack structure and the quantum well light-emitting layer of the light-emitting diode epitaxial structure, the diffusion of doped Mg atoms can be effectively blocked, the distribution of Mg atoms in the quantum well light-emitting layer can be improved, and the reliability and stability of the device can be improved.

[0006] To achieve the above-mentioned object, the present invention discloses a light-emitting diode epitaxial structure, characterized in that it at least comprises:

[0007] an N-type semiconductor stack structure;

[0008] A P-type semiconductor stack structure;

[0009] a quantum well light-emitting layer, wherein the quantum well light-emitting layer is formed between the N-type semiconductor stack structure and the P-type semiconductor stack structure; and

[0010] An impurity blocking layer is formed between the P-type semiconductor stack structure and the quantum well light emitting layer, and the lattice constant of the impurity blocking layer is different from the lattice constant of the P-type semiconductor stack structure.

[0011] Among them, the lattice constant of the impurity blocking layer is smaller than that of the P-type semiconductor stack structure.

[0012] Among them, the impurity blocking layer does not absorb the light emitted by the quantum well light-emitting layer; the thickness of the impurity blocking layer is less than 10 nm.

[0013] Among them, the impurity blocking layer is undoped.

[0014] Among them, the material of the impurity blocking layer is GaP, and the lattice constant of the impurity blocking layer is less than

[0015] Among them, the material of the impurity blocking layer is Al x Ga y In 1-x-y [[ID=二十]]P, Ga z In 1-z P or Al 1-w Ga w P, where 0 < x < 1, 0 < y < 1, (x + y) < 1, 0.9 ≤ z < 1, 0.9 ≤ w < 1, and the lattice constant of the impurity blocking layer is

[0016] Among them, the impurity blocking layer is doped with a P-type dopant.

[0017] Among them, the P-type dopant is one or more of Mg, C, and Zn, and the doping concentration is 1.0×10 17 cm -3 -1.0×10 18 cm -3 .

[0018] Among them, it further includes an N-type waveguide layer disposed between the quantum well light-emitting layer and the N-type semiconductor stack structure, and / or a P-type waveguide layer disposed between the quantum well light-emitting layer and the P-type semiconductor stack structure; the lattice of the N-type waveguide layer matches the lattice of the quantum well light-emitting layer, and the lattice of the P-type waveguide layer matches the lattice of the quantum well light-emitting layer.

[0019] Among them, the N-type waveguide layer is transparent; the N-type waveguide layer is undoped; the P-type waveguide layer is transparent; the P-type waveguide layer is undoped.

[0020] Among them, the impurity blocking layer is directly grown on the P-type waveguide layer.

[0021] Among them, the material of the N-type waveguide layer is Among them, 0.6 ≤ c1 < 1, 0 ≤ d1 < 1, (c1 + d1) < 1; the material of the P-type waveguide layer 42 is Among them, 0.6≤c2<1, 0≤d2<1, (c2+d2)<1.

[0022] Among them, c1 is different from c2, d1 is different from d2; or, c1 is the same as c2, d1 is the same as d2.

[0023] The light-emitting diode epitaxial structure further includes a substrate and a buffer layer formed on the substrate; the N-type semiconductor stacking structure is formed on the buffer layer; or the P-type semiconductor stacking structure is formed on the buffer layer.

[0024] When the N-type semiconductor stacked structure is formed on the buffer layer, the substrate is undoped or doped with an N-type dopant, and the N-type dopant is one or both of Si and Te, and the concentration of the dopant is 4.0×10 17 cm -3 -2.0×10 18 cm -3 Alternatively, when the P-type semiconductor stacked structure is formed on the buffer layer, the substrate is undoped or doped with a P-type dopant, wherein the P-type dopant is one or more of Mg, C, and Zn, and the concentration of the dopant is 4.0×10 17 cm -3 -2.0×10 18 cm -3 .

[0025] The buffer layer is undoped; or, when the substrate is undoped or doped with N-type dopants, the buffer layer is doped with N-type dopants; when the substrate is undoped or doped with P-type dopants, the buffer layer is doped with P-type dopants.

[0026] The N-type dopant is one or both of Si and Te; the P-type dopant is one or more of Mg, C and Zn.

[0027] The light-emitting diode epitaxial structure further includes a corrosion stop layer, and the corrosion stop layer is formed on the buffer layer.

[0028] When the N-type semiconductor stack structure is formed on the buffer layer, the etching stop layer is doped with N-type dopants; when the P-type semiconductor stack structure is formed on the buffer layer, the etching stop layer is doped with P-type dopants.

[0029] The N-type dopant in the corrosion stop layer is one or both of Si and Te, and the concentration of the dopant is 1.0×10 18 cm -3 -5.0×10 18 cm -3; The P-type dopant in the corrosion stop layer is one or more of Mg, C, and Zn, and the concentration of the dopant is 1.0×10 18 cm -3 -3.0×10 18 cm -3 .

[0030] Among them, the material of the corrosion stop layer 20 is Al h Ga i In 1-h-i P, where 0 < h < 1, 0 < i < 1, and (h + i) < 1.

[0031] Among them, along the direction away from the quantum well light-emitting layer, the N-type semiconductor stack structure includes an N-type confinement layer, an N-type current spreading layer, and an N-type ohmic contact layer stacked in sequence; and

[0032] along the direction away from the quantum well light-emitting layer, the P-type semiconductor stack structure includes a P-type confinement layer, a P-type transition layer, and a P-type current spreading layer stacked in sequence;

[0033] Among them, the lattice of the N-type confinement layer and the lattice of the P-type confinement layer are both matched with the lattice of the quantum well light-emitting layer.

[0034] Among them, the materials of the P-type confinement layer and the P-type current spreading layer are different; the thickness of the P-type current spreading layer is greater than the thickness of the P-type confinement layer; there is a lattice mismatch between the P-type confinement layer and the P-type current spreading layer.

[0035] Among them, the P-type confinement layer is doped with one or more of Mg, C, and Zn, and the doping concentration is 1.0×10 17 cm -3 -2.0×10 18 cm -3 ; the material of the P-type confinement layer is Al e In 1-e P, where 0 < e < 1; the P-type transition layer is doped with one or more of Mg, C, and Zn, and the doping concentration is 1.0×10 18 cm -3 -3.0×10 18 cm -3 ; the material of the P-type transition layer is Al f Ga g In 1-f-g P, where 0 < f < 1, 0 < g < 1, and (f + g) ≤ 1; the P-type current spreading layer is doped with one or more of Mg, C, and Zn, and the doping concentration is 1.0×10 18 cm -3 -5.0×1018 cm -3 。

[0036] Among them, the lattice constant of the impurity blocking layer is smaller than that of the P-type confinement layer.

[0037] Among them, the material of the N-type current spreading layer is Al k Ga l In 1-k-l P, where 0 < k < 1, 0 < l < 1, and (k + l) ≤ 1; one or both of Si and Te are doped in the N-type current spreading layer, and the doping concentration is 1.0×10 18 cm -3 -3.0×10 18 cm -3 ; one or both of Si and Te are doped in the N-type ohmic contact layer, and the doping concentration is 4.0×10 18 cm -3 -1.0×10 19 cm -3 ; the material of the N-type confinement layer is Al j In 1-j P, where 0 < j < 1; one or both of Si and Te are doped in the N-type confinement layer, and the doping concentration is 1.0×10 17 cm -3 -3.0×10 18 cm -3 。

[0038] A method for manufacturing a light-emitting diode epitaxial structure is also disclosed, which is characterized by including the following steps:

[0039] Provide a substrate and place the substrate in an epitaxial growth device;

[0040] Form an N-type semiconductor stack structure on the substrate;

[0041] Form a quantum well light-emitting layer on the N-type semiconductor stack structure;

[0042] Form an impurity blocking layer on the quantum well light-emitting layer; and

[0043] Form a P-type semiconductor stack structure on the impurity blocking layer, and the lattice constant of the P-type semiconductor stack structure is greater than that of the impurity blocking layer.

[0044] Among them, forming the impurity blocking layer includes the following steps:

[0045] Provide trimethylgallium and phosphine, introduce the trimethylgallium and the phosphine into the epitaxial growth device, the introduction time is 10 s - 40 s, and the growth rate is set to The impurity blocking layer is formed on the quantum well light emitting layer.

[0046] The step of forming the impurity blocking layer comprises the following steps:

[0047] Providing trimethylgallium and phosphine; and

[0048] Provide trimethylaluminum and / or trimethylindium and introduce them into the epitaxial growth device together with the trimethylgallium and the phosphine. The introduction time is 10s-40s and the growth rate is set to The impurity blocking layer is formed on the quantum well light emitting layer.

[0049] Wherein, forming the impurity blocking layer further comprises the following steps:

[0050] A P-type dopant is provided, and the P-type dopant is introduced into the epitaxial growth device to dope the impurity blocking layer with the P-type dopant.

[0051] The method further comprises the following steps:

[0052] Before forming the quantum well light-emitting layer, forming a waveguide layer on the N-type semiconductor stack structure; and / or

[0053] Before forming the impurity blocking layer, a waveguide layer is formed on the quantum well light emitting layer.

[0054] The forming of the P-type semiconductor stack structure includes the following steps:

[0055] forming a P-type confinement layer on the impurity blocking layer, and doping the P-type confinement layer with a P-type dopant;

[0056] forming a transition layer on the P-type confinement layer, and doping the transition layer with a P-type dopant; and

[0057] A P-type current spreading layer is formed on the transition layer, and P-type dopants are doped into the P-type current spreading layer.

[0058] The method further comprises the following steps:

[0059] Before forming the N-type semiconductor stack structure, an etching stop layer is formed on the substrate, and N-type dopants are doped into the etching stop layer.

[0060] The method further comprises the following steps:

[0061] Before forming the etching stop layer, a buffer layer is formed on the substrate.

[0062] The forming of the N-type semiconductor stack structure includes the following steps:

[0063] forming an ohmic contact layer on the etching stop layer, and doping the ohmic contact layer with an N-type dopant;

[0064] forming an N-type current spreading layer on the ohmic contact layer, and doping the N-type current spreading layer with an N-type dopant;

[0065] An N-type confinement layer is formed on the N-type current spreading layer, and N-type dopants are doped into the N-type confinement layer.

[0066] Also disclosed is a method for preparing a light-emitting diode epitaxial structure, which is characterized by comprising the following steps:

[0067] Providing a substrate, and placing the substrate in an epitaxial growth device;

[0068] forming a P-type semiconductor stack structure on the substrate;

[0069] forming an impurity blocking layer on the P-type semiconductor stack structure, wherein the lattice constant of the impurity blocking layer is smaller than the lattice constant of the P-type semiconductor stack structure;

[0070] forming a quantum well light-emitting layer on the impurity blocking layer; and

[0071] An N-type semiconductor stacking structure is formed on the quantum well light-emitting layer.

[0072] Through the above content, the present invention can achieve the following beneficial effects:

[0073] (1) During the growth process of the light-emitting diode epitaxial structure, the present invention can effectively block the diffusion of Mg atoms from the P-type semiconductor stack structure by growing an impurity barrier layer with a smaller lattice constant between the P-type waveguide layer and the P-type semiconductor stack structure, thereby improving the distribution of Mg atoms in the quantum well light-emitting layer and enhancing the reliability and stability of the device using this structure.

[0074] (2) The impurity barrier layer grown in the present invention is relatively thin, so that the lattice mismatch between the impurity barrier layer and the quantum well light-emitting layer and the P-type semiconductor stack structure cannot be manifested, thereby avoiding the lattice mismatch affecting the performance and life of the device using the structure.

[0075] (3) The present invention grows a P-type waveguide layer between the impurity barrier layer and the quantum well light-emitting layer as a transition, thereby reducing the influence of the lattice mismatch between the impurity barrier layer and the quantum well light-emitting layer on the light-emitting performance of the quantum well light-emitting layer.

[0076] (4) The P-type waveguide layer and the N-type waveguide layer grown by the present invention can prevent impurities in the P-type semiconductor stacking structure and the N-type semiconductor stacking structure from entering the quantum well light-emitting layer, thereby ensuring the light-emitting efficiency of the quantum well light-emitting layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0077] The above and other objects, features and advantages of the present disclosure will become more apparent through a more detailed description of exemplary embodiments of the present disclosure with reference to the accompanying drawings, wherein like reference numerals generally represent like components in the exemplary embodiments of the present disclosure.

[0078] FIG1 is a schematic structural diagram of a light emitting diode epitaxial structure according to a first embodiment of the present invention;

[0079] FIG2 is a schematic structural diagram of a light emitting diode epitaxial structure according to a second embodiment of the present invention;

[0080] FIG3 is a flow chart of the steps of a method for preparing a light-emitting diode epitaxial structure according to an embodiment of the present invention;

[0081] FIG4 is a flow chart of sub-steps of a method for preparing the light-emitting diode epitaxial structure shown in FIG3 ;

[0082] FIG5 is a flow chart of sub-steps of a method for preparing the light-emitting diode epitaxial structure shown in FIG3 ;

[0083] FIG6 is a flow chart of sub-steps of a method for preparing the light-emitting diode epitaxial structure shown in FIG3 ;

[0084] FIG7 is a flowchart of the steps further included in the method for preparing the light-emitting diode epitaxial structure shown in FIG3 ;

[0085] FIG8 is a flow chart of sub-steps of a method for preparing the light-emitting diode epitaxial structure shown in FIG7 ;

[0086] FIG9 is a flow chart of sub-steps of a method for preparing the light-emitting diode epitaxial structure shown in FIG3 ;

[0087] FIG10 is a flowchart of the steps further included in the method for preparing the light-emitting diode epitaxial structure shown in FIG3 ;

[0088] FIG11 is a flowchart of the steps further included in the method for preparing the light-emitting diode epitaxial structure shown in FIG10 ;

[0089] FIG. 12 is a flow chart of sub-steps of the method for preparing the light-emitting diode epitaxial structure shown in FIG. 3 . DETAILED DESCRIPTION

[0090] The preferred embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the preferred embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to make the present disclosure more thorough and complete, and to fully convey the scope of the present disclosure to those skilled in the art.

[0091] Some embodiments of the present invention provide a light-emitting diode epitaxial structure.

[0092] FIG. 1 is a schematic structural diagram of a light-emitting diode epitaxial structure according to a first embodiment of the present invention. As shown in FIG. 1, the light-emitting diode epitaxial structure provided by the present invention includes a first semiconductor stack structure 30, a quantum well light-emitting layer 50, an impurity blocking layer 70, and a second semiconductor stack structure 80 that are stacked in sequence from bottom to top. In some embodiments, the material of the quantum well light-emitting layer 50 is Al a Ga b In 1-a-b P, where 0 < a < 1, 0 < b < 1, (a + b) < 1, and the quantum well light-emitting layer 50 is undoped. The first semiconductor stack structure 30 is an N-type semiconductor stack structure. The first semiconductor stack structure 30 is doped with an N-type dopant. The second semiconductor stack structure 80 is a P-type semiconductor stack structure. The second semiconductor stack structure 80 is doped with a P-type dopant. The impurity blocking layer 70 is disposed between the quantum well light-emitting layer 50 and the second semiconductor stack structure 80. The lattice of the impurity blocking layer 70 is different from the lattice of the quantum well light-emitting layer 50, and there is a strain force between the two; preferably, the lattice constant of the impurity blocking layer 70 is smaller than the lattice constant of the second semiconductor stack structure 80. The lattice of the quantum well light-emitting layer 50 matches the lattice of the second semiconductor stack structure 80 and the lattice of the first semiconductor stack structure 30. The impurity blocking layer 70 can be undoped or doped with a P-type dopant to block the P-type dopant, such as Mg atoms, doped in the second semiconductor stack structure 80 from diffusing into the quantum well light-emitting layer 50, and to avoid the decrease in the internal quantum efficiency of the quantum well light-emitting layer 50 due to the diffusion of Mg atoms into the quantum well light-emitting layer 50 and the formation of non-radiative recombination centers, thereby improving the brightness reliability and stability of the device using this structure during operation.

[0093] In some embodiments, the thickness of the impurity blocking layer 70 is less than 10 nm. The lattice of the impurity blocking layer 70 is different from the lattice of the second semiconductor stack structure 80 and the lattice of the quantum well light-emitting layer 50, and lattice mismatch will occur during the growth of the impurity blocking layer 70 crystal and the second semiconductor stack structure 80 crystal. The impurity blocking layer 70 of the present invention is relatively thin, so that the lattice mismatch between the impurity blocking layer 70 and the quantum well light-emitting layer 50 and the second semiconductor stack structure 80 cannot be manifested, thereby avoiding the influence of lattice mismatch on the performance and lifespan of the device using this structure.

[0094] In some embodiments, the material of the impurity blocking layer 70 is GaP, and the lattice constant of the impurity blocking layer 70 is less than Using GaP as the material of the impurity blocking layer 70, the GaP impurity blocking layer 70 does not absorb the light emitted by the quantum well light-emitting layer 50, has good light transmission, and can reduce light loss. For example, when the quantum well light-emitting layer 50 emits red and yellow light, the impurity blocking layer 70 does not absorb the red and yellow light; when the quantum well light-emitting layer 50 emits light of other colors, the impurity blocking layer 70 will not absorb the light of other colors either, but has good light transmittance.

[0095] In other embodiments, the material of the impurity blocking layer 70 is Al x Ga y In 1-x-y P, Ga z In 1-z P or Al 1-w Ga w P, where 0 < x < 1, 0 < y < 1, (x + y) < 1, 0.9 ≤ z < 1, 0.9 ≤ w < 1. The lattice constant of the impurity blocking layer 70 is

[0096] In some embodiments, the impurity blocking layer 70 is undoped. In other embodiments, the impurity blocking layer 70 is doped with a P-type dopant, for example, one or more of Mg, C, and Zn, and the doping concentration is 1.0×10 17 cm -3 -1.0×10 18 cm -3 . The lattice of the impurity blocking layer 70 is different from that of the quantum well light-emitting layer 50, and there is a strain force between the two. Therefore, the dopant doped in the impurity blocking layer 70 cannot diffuse into the quantum well light-emitting layer 50.

[0097] The light-emitting diode epitaxial structure further includes a waveguide layer 40. The waveguide layer 40 is disposed between the quantum well light-emitting layer 50 and the first semiconductor stack structure 30, and / or between the quantum well light-emitting layer 50 and the impurity blocking layer 70. In some embodiments, the waveguide layer 40 includes a first waveguide layer 41, and the first waveguide layer 41 is disposed between the quantum well light-emitting layer 50 and the first semiconductor stack structure 30. In other embodiments, the waveguide layer 40 includes a second waveguide layer 42, and the second waveguide layer 42 is disposed between the quantum well light-emitting layer 50 and the impurity blocking layer 70. The lattice of the waveguide layer 40 matches the lattice of the quantum well light-emitting layer 50, thereby reducing the mismatch problem between the waveguide layer 40 and the quantum well light-emitting layer 50 and ensuring the performance and lifespan of the device applying this structure. The material of the waveguide layer 40 is Al c Ga d In 1-c-dP, where 0.6≤c<1, 0≤d<1, (c+d)<1. Al c Ga d In 1-c-d The P waveguide layer 40 is transparent and has good light transmittance, which can reduce light loss.

[0098] In some embodiments, as shown in FIG1 , the waveguide layer 40 includes a first waveguide layer 41 and a second waveguide layer 42. The first waveguide layer 41 is an N-type waveguide layer, and the second waveguide layer 42 is a P-type waveguide layer. The material of the first waveguide layer 41 is Where 0.6≤c1<1, 0≤d1<1, (c1+d1)<1. The material of the second waveguide layer 42 is Where 0.6≤c2<1, 0≤d2<1, (c2+d2)<1. In some embodiments, the proportions of the components in the first waveguide layer 41 and the second waveguide layer 42 are the same. In other embodiments, the proportions of the components in the first waveguide layer 41 and the second waveguide layer 42 are different. The first waveguide layer 41 and the second waveguide layer 42 are both undoped. The lattice of the first waveguide layer 41 and the lattice of the second waveguide layer 42 are both lattice-matched to the quantum well light-emitting layer 50. The first waveguide layer 41 can prevent impurities in the first semiconductor stacked structure 30 from entering the quantum well light-emitting layer 50, thereby ensuring the luminous efficiency of the quantum well light-emitting layer 50. The second waveguide layer 42 is used to prevent impurities in the second semiconductor stacked structure 80 from entering the quantum well light-emitting layer 50, thereby ensuring the luminous efficiency of the quantum well light-emitting layer 50. In addition, the lattice of the impurity barrier layer 70 is different from that of the quantum well light-emitting layer 50. Growing the impurity barrier layer 70 directly on the quantum well light-emitting layer 50 will affect the crystal growth of the impurity barrier layer 70 and the second semiconductor stack structure 80, thereby affecting the performance and lifespan of the device using this structure. The provision of the second waveguide layer 42 as a transition layer can facilitate the crystal growth of the impurity barrier layer 70, reduce the impact of the lattice mismatch between the impurity barrier layer 70 and the quantum well light-emitting layer 50 on the luminescence performance of the quantum well light-emitting layer 50, and promote the growth of crystals on the side of the impurity barrier layer 70 away from the quantum well light-emitting layer 50.

[0099] As shown in FIG1 , the second semiconductor stack structure 80 includes a second confinement layer 801, a transition layer 802, and a second current spreading layer 803 stacked sequentially from bottom to top. The lattice of the second confinement layer 801 matches the lattice of the quantum well light-emitting layer 50. The second confinement layer 801 is a P-type confinement layer. The second confinement layer 801 is doped with a P-type dopant. In some embodiments, the second confinement layer 801 is doped with one or more of Mg, C, and Zn at a doping concentration of 1.0×10 17 cm -3 -2.0×10 18 cm -3. The second confinement layer 801 is used to provide holes to the quantum well light-emitting layer 50. The material of the second confinement layer 801 is Al e In 1-e P, where 0 < e < 1. The lattice of the second confinement layer 801 is matched with the lattice of the quantum well light-emitting layer 50. The transition layer 802 is a P-type transition layer. The transition layer 802 is doped with a P-type dopant. In some embodiments, the transition layer 802 is doped with one or more of Mg, C, and Zn, and the doping concentration is 1.0×10 18 cm -3 -3.0×10 18 cm -3 . The material of the transition layer 802 is Al f Ga g In 1-f-g P, where 0 < f < 1, 0 < g < 1, and (f + g) ≤ 1. The second current spreading layer 803 is a P-type current spreading layer. The second current spreading layer 803 is doped with a P-type dopant. In some embodiments, the second current spreading layer 803 is doped with one or more of Mg, C, and Zn, and the doping concentration is 1.0×10 18 cm -3 -5.0×10 18 cm -3 . The second current spreading layer 803 is used to diffuse the current of the second semiconductor stack structure 80; and the second current spreading layer 803 is a P electrode. The material of the second current spreading layer 803 is GaP. The lattice constant of the impurity blocking layer 70 is smaller than the lattice constant of the second confinement layer 801. The materials of the second confinement layer 801 and the second current spreading layer 803 are different, the thickness of the second current spreading layer 803 is greater than the thickness of the second confinement layer 801, there is a large lattice mismatch between the second confinement layer 801 and the second current spreading layer 803, and the transition layer 802 is beneficial to the better growth of the crystal of the second current spreading layer 803, thereby ensuring better diffusion of the current of the second semiconductor stack structure 80, and is also beneficial to the device performance and lifespan of the structure applied.

[0100] The light-emitting diode epitaxial structure further includes a substrate 10. The substrate 10 is disposed on a side of the first semiconductor stack structure 30 away from the quantum well light-emitting layer 50. As shown in FIG. 1, the substrate 10 includes a substrate 101 and a buffer layer 102 stacked in sequence from bottom to top. In this embodiment, the substrate 101 is disposed on a side of the first semiconductor stack structure 30 away from the quantum well light-emitting layer 50. The material of the substrate 101 is GaAs. In some embodiments, the substrate 101 is doped with an N-type dopant. For example, the substrate 101 is doped with one or both of Si and Te, and the concentration of the dopant is 4.0×10 17 cm -3 -2.0×10 18 cm -3Further, a buffer layer 102 is disposed between the first semiconductor stack structure 30 and the substrate 101. The material of the buffer layer 102 is GaAs. In some embodiments, the buffer layer 102 is undoped. In other embodiments, the buffer layer is doped with an N-type dopant, such as one or both of Si and Te. The buffer layer 102 is grown on the substrate 101 to obtain a new GaAs surface layer. Compared with directly growing an epitaxial structure on the substrate 101, growing an epitaxial structure on the buffer layer 102 can effectively reduce defects such as impurities and dislocations in the light-emitting diode epitaxial structure.

[0101] The light-emitting diode epitaxial structure further includes an etch stop layer 20. In some embodiments, the material of the etch stop layer 20 is Al h Ga i In 1-h-i P, where 0 < h < 1, 0 < i < 1, and (h + i) < 1. Preferably, the material of the etch stop layer 20 is Ga 0.5 In 0.5 P. The etch stop layer 20 is formed on the buffer layer 102. In this embodiment, as shown in FIG. 1, the etch stop layer 20 is formed on the side of the first semiconductor stack structure 30 away from the quantum well light-emitting layer 50; and the etch stop layer 20 is formed between the buffer layer and the N-type semiconductor stack structure. The etch stop layer 20 is doped with an N-type dopant. Preferably, the etch stop layer 20 is doped with one or both of Si and Te, and the concentration of the dopant is 1.0×10 18 cm -3 -5.0×10 18 cm -3 .

[0102] The etch stop layer 20 can prevent damage to epitaxial functional layers such as the first semiconductor stack structure 30, the first waveguide layer 41, the quantum well light-emitting layer 50, the second waveguide layer 42, the impurity blocking layer 70, and the second semiconductor stack structure 80 during the substrate 101 removal process.

[0103] As shown in FIG. 1, the first semiconductor stack structure 30 includes a first confinement layer 301, a first current spreading layer 302, and an ohmic contact layer 303 stacked in sequence from top to bottom. The lattice of the first confinement layer 301 matches the lattice of the first waveguide layer 41. The first confinement layer 301 is an N-type confinement layer. The first confinement layer 301 is doped with an N-type dopant. In some embodiments, the first confinement layer 301 is doped with one or both of Si and Te. The concentration of the dopant is 1.0×10 17 cm -3 -3.0×10 18 cm -3 . The first confinement layer 301 is used to provide electrons to the quantum well light-emitting layer 50. The material of the first confinement layer 301 is Alj In 1-j P, where 0 < j < 1. The first current spreading layer 302 is an N-type current spreading layer. The first current spreading layer 302 is doped with an N-type dopant. In some embodiments, the first current spreading layer 302 is doped with one or both of Si and Te, and the concentration of the dopant is 1.0×10 18 cm -3 -3.0×10 18 cm -3 . The first current spreading layer 302 is used for the current of the first semiconductor stack structure 30 to spread. The material of the first current spreading layer 302 is Al k Ga l In 1-k-l P, where 0 < k < 1, 0 < l < 1, and (k + l) ≤ 1. The ohmic contact layer 303 is an N-type ohmic contact layer. The ohmic contact layer 303 is doped with an N-type dopant. In some embodiments, the ohmic contact layer 303 is doped with one or both of Si and Te, and the concentration of the dopant is 4.0×10 18 cm -3 -1.0×10 19 cm -3 . The ohmic contact layer 303 is an N electrode contact layer. The material of the ohmic contact layer 303 is GaAs.

[0104] FIG. 2 is a schematic structural diagram of the light-emitting diode epitaxial structure according to the second embodiment of the present invention. Different from the first embodiment, in the second embodiment, as shown in FIG. 2, the first semiconductor stack structure 30' is a P-type semiconductor stack structure, and the second semiconductor stack structure 80' is an N-type semiconductor stack structure. The substrate 101' is doped with a P-type dopant. For example, the substrate 101' is doped with one or more of Mg, C, and Zn, and the concentration of the dopant is 4.0×10 17 cm -3 -2.0×10 18 cm -3 . Correspondingly, the buffer layer 102' can be undoped or doped with a P-type dopant, for example, one or more of Mg, C, and Zn. Specifically, the P-type semiconductor stack structure is formed on the substrate 10', and further, the P-type semiconductor stack structure is formed on the buffer layer 102'; the P-type semiconductor stack structure is formed on the buffer layer 102', and the etch stop layer 20' is formed on the side of the P-type semiconductor stack structure away from the quantum well light-emitting layer 50; and the etch stop layer 20' is formed between the buffer layer 102' and the P-type semiconductor stack structure. Further, the etch stop layer 20' is doped with a P-type dopant. Preferably, the etch stop layer 20' is doped with one or more of Mg, C, and Zn, and the concentration of the dopant is 1.0×10 18 cm -3-3.0×10 18 cm -3 As shown in Figure 2, the impurity blocking layer 70 is disposed between the first confinement layer 301' and the first waveguide layer 41'. The first waveguide layer 41' is a P-type waveguide layer. The first confinement layer 301' is a P-type confinement layer; the first current spreading layer 302' is a P-type current spreading layer; and the ohmic contact layer 303' is a P-type ohmic contact layer. The first confinement layer 301', the first current spreading layer 302', and the ohmic contact layer 303' are all doped with P-type dopants, such as one or more of Mg, Zn, and C. The second waveguide layer 42' is an N-type waveguide layer. The second confinement layer 801' is an N-type confinement layer; the transition layer 802' is an N-type transition layer; the second current spreading layer 803' is an N-type current spreading layer, and the second current spreading layer 803' is an N-electrode. The second confinement layer 801', the transition layer 802', and the second current spreading layer 803' are all doped with N-type dopants, such as one or both of Si and Te.

[0105] Some embodiments of the present invention further provide a method for preparing a light emitting diode epitaxial structure.

[0106] Figure 3 is a flowchart of the steps of a method for preparing a light emitting diode epitaxial structure according to an embodiment of the present invention. As shown in Figure 3, the method for preparing a light emitting diode epitaxial structure provided by the present invention includes steps S10 to S50.

[0107] In step S10, a substrate 101 is provided and placed in an epitaxial growth apparatus. Doping is performed on substrate 101. In some embodiments, the dopant is an N-type dopant, such as one or both of Si and Te. In other embodiments, the dopant is a P-type dopant, such as one or more of Mg, C, and Zn.

[0108] In step S20, a first semiconductor stack structure 30 is formed on the substrate 101. The first semiconductor stack structure 30 is an N-type semiconductor stack structure.

[0109] In step S30 , a quantum well light emitting layer 50 is formed on the first semiconductor stacked structure 30 . The lattice of the quantum well light emitting layer 50 matches the lattice of the first semiconductor stacked structure 30 .

[0110] In step S40 , an impurity blocking layer 70 is formed on the quantum well light emitting layer 50 .

[0111] In step S50, a second semiconductor stacked structure 80 is formed on the impurity blocking layer 70. The second semiconductor stacked structure 80 is a P-type semiconductor stacked structure. The lattice constant of the second semiconductor stacked structure 80 is greater than the lattice constant of the impurity blocking layer 70. The lattice of the second semiconductor stacked structure 80 is matched with the lattice of the quantum well light emitting layer 50.

[0112] In some embodiments, as shown in FIG4 , the above step S40 includes sub-step S401 .

[0113] In sub-step S401, trimethyl gallium and phosphine are provided and introduced into the epitaxial growth equipment for a time period of 10s-40s, and the growth rate is set to This step produces an impurity blocking layer 70 made of GaP, with a thickness of less than 10 nm. The thickness of the impurity blocking layer 70 can be adjusted by adjusting the growth rate and the injection time.

[0114] In some embodiments, as shown in FIG5 , the above step S40 includes sub-step S402 and sub-step S403 .

[0115] In sub-step S402 , trimethylgallium and phosphine are provided.

[0116] In sub-step S403, trimethylaluminum and / or trimethylindium are provided and introduced into the epitaxial growth device together with trimethylgallium and phosphine. The introduction time is 10s-40s and the growth rate is set to In some embodiments, trimethylaluminum is provided and introduced into an epitaxial growth device together with trimethylgallium and phosphine to obtain Al 1-w Ga w P impurity barrier layer 70, wherein 0.9≤w<1. In other embodiments, trimethyl indium is provided and introduced into an epitaxial growth device together with trimethyl gallium and phosphine to obtain Ga z In 1-z P impurity barrier layer 70, wherein 0.9≤z<1. In some other embodiments, trimethylaluminum and trimethylindium are provided to obtain Al x Ga y In 1-x-y P impurity blocking layer 70, wherein 0 <x<1,0<y<1,(x+y)<1。

[0117] In some embodiments, as shown in FIG6 , the above step S40 further includes a sub-step S404 .

[0118] In sub-step S404, a P-type dopant is provided and introduced into the epitaxial growth equipment to dope the impurity blocking layer 70. In some embodiments, the P-type dopant is one or more of Mg, C, and Zn.

[0119] In some embodiments, as shown in FIG. 7 , the method for preparing a light emitting diode epitaxial structure further includes step S60 .

[0120] In step S60, before forming the quantum well light-emitting layer 50, a waveguide layer 40 is formed on the first semiconductor stack structure 30; and / or, before forming the impurity blocking layer 70, a waveguide layer 40 is formed on the quantum well light-emitting layer 50. In some embodiments, before forming the quantum well light-emitting layer 50, a first waveguide layer 41 is formed on the first semiconductor stack structure 30. In other embodiments, before forming the impurity blocking layer 70, a second waveguide layer 42 is formed on the quantum well light-emitting layer 50. The lattice of the waveguide layer 40 matches the lattice of the quantum well light-emitting layer 50.

[0121] In some embodiments, as shown in FIG. 8, the above step S60 includes sub-step S601 and sub-step S602.

[0122] In sub-step S601, before forming the quantum well light-emitting layer 50, a first waveguide layer 41 is formed on the first semiconductor stack structure 30. In some embodiments, growth materials are provided to an epitaxial growth device where 0.6 ≤ c1 < 1, 0 ≤ d1 < 1, (c1 + d1) < 1, and a first waveguide layer 41 is formed on the first semiconductor stack structure 30. The lattice of the first semiconductor stack structure 30 matches the lattice of the quantum well light-emitting layer 50. The first waveguide layer 41 is undoped.

[0123] In sub-step S602, before forming the impurity blocking layer 70, a second waveguide layer 42 is formed on the quantum well light-emitting layer 50. In some embodiments, growth materials are provided to an epitaxial growth device where 0.6 ≤ c2 < 1, 0 ≤ d2 < 1, (c2 + d2) < 1, and a second waveguide layer 42 is formed on the quantum well light-emitting layer 50. The lattice of the second waveguide layer 42 matches the lattice of the quantum well light-emitting layer 50. The second waveguide layer 42 is undoped.

[0124] In some embodiments, as shown in FIG. 9, the above step S50 includes sub-steps S501 to S503.

[0125] In sub-step S501, a second confinement layer 801 is formed on the impurity blocking layer 70 and is doped with a P-type dopant. In some embodiments, growth materials Al e In 1-e P are provided to an epitaxial growth device, where 0 < e < 1, and a second confinement layer 801 is formed on the impurity blocking layer 70; and a P-type dopant, such as one or more of Mg, C, and Zn, is introduced into the epitaxial growth device to dope the second confinement layer 801 to obtain a second confinement layer 801 with a P-type dopant.

[0126] In sub-step S502, a transition layer 802 is formed on the second confinement layer 801, and a P-type dopant is doped into the transition layer 802. In some embodiments, a growth material Al f Ga g In 1-f-g P is provided to the epitaxial growth equipment, where 0 < f < 1, 0 < g < 1, and (f + g) ≤ 1, to form the transition layer 802 on the second confinement layer 801; and a P-type dopant, such as one or more of Mg, C, and Zn, is introduced into the epitaxial growth equipment to dope the transition layer 802, resulting in a transition layer 802 with a P-type dopant.

[0127] In sub-step S503, a second current spreading layer 803 is formed on the transition layer 802, and a P-type dopant is doped into the second current spreading layer 803. In some embodiments, a growth material GaP is provided to the epitaxial growth equipment to form the second current spreading layer 803 on the transition layer 802; and a P-type dopant, such as one or more of Mg, C, and Zn, is introduced into the epitaxial growth equipment to dope the second current spreading layer 803, resulting in a second current spreading layer 803 with a P-type dopant.

[0128] As shown in FIG. 10, the method for preparing a light-emitting diode epitaxial structure further includes step S70 and step S80.

[0129] In step S70, before forming the first semiconductor stack structure 30, an etch stop layer 20 is formed on the substrate 101. In some embodiments, a growth material Ga 0.5 In 0.5 P is provided to the epitaxial growth equipment to form the etch stop layer 20 on the substrate 101. In other embodiments, a growth material Al h Ga i In 1-h-i P is provided to the epitaxial growth equipment, where 0 < h < 1, 0 < i < 1, and (h + i) < 1, to form the etch stop layer 20 on the substrate 101.

[0130] In step S80, an N-type dopant is provided, and an N-type dopant, such as one or both of Si and Te, is introduced into the epitaxial growth equipment to dope the etch stop layer 20, resulting in an etch stop layer 20 with an N-type dopant.

[0131] As shown in FIG. 11, the method for preparing a light-emitting diode epitaxial structure further includes step S90.

[0132] In step S90, before forming the etch stop layer 20, a buffer layer 102 is formed on the substrate 101. In some embodiments, growth material GaAs is provided to an epitaxial growth apparatus to form the buffer layer 102 on the substrate 101. In some embodiments, the buffer layer 102 is undoped. In other embodiments, an N-type dopant, such as one or both of Si and Te, is introduced into the epitaxial growth apparatus to dope the buffer layer 102, resulting in a buffer layer 102 having an N-type dopant.

[0133] In some embodiments, as shown in FIG. 12, the above step S20 includes sub-steps S201 to S203.

[0134] In sub-step S201, an ohmic contact layer 303 is formed on the etch stop layer 20, and an N-type dopant is doped in the ohmic contact layer 303. In some embodiments, growth material GaAs is provided to an epitaxial growth apparatus to form the ohmic contact layer 303 on the etch stop layer 20, and an N-type dopant, such as one or both of Si and Te, is introduced into the epitaxial growth apparatus to dope the ohmic contact layer 303, resulting in an ohmic contact layer 303 having an N-type dopant.

[0135] In sub-step S202, a first current spreading layer 302 is formed on the ohmic contact layer 303, and an N-type dopant is doped in the first current spreading layer 302. In some embodiments, growth material Al k Ga l In 1-k-l P is provided to an epitaxial growth apparatus, where 0 < k < 1, 0 < l < 1, and (k + l) ≤ 1, to form the first current spreading layer 302 on the ohmic contact layer 303; and an N-type dopant, such as one or both of Si and Te, is introduced into the epitaxial growth apparatus to dope the first current spreading layer 302, resulting in a first current spreading layer 302 having an N-type dopant.

[0136] In sub-step S203, a first confinement layer 301 is formed on the first current spreading layer 302, and an N-type dopant is doped in the first confinement layer 301. In some embodiments, growth material Al j In 1-j P is provided to an epitaxial growth apparatus, where 0 < j < 1, to form the first confinement layer 301 on the first current spreading layer 302; and an N-type dopant, such as one or both of Si and Te, is introduced into the epitaxial growth apparatus to dope the first confinement layer 301, resulting in a first confinement layer 301 having an N-type dopant.

[0137] In other embodiments, a buffer layer 102 is formed on a substrate 101. The buffer layer is undoped or doped with a P-type dopant. An etch-stop layer 20 is formed on the buffer layer 102 and doped with a P-type dopant. A P-type semiconductor stack structure is formed on the etch-stop layer 20. An impurity blocking layer 70 is formed on the P-type semiconductor stack structure. A P-type waveguide layer is formed on the impurity blocking layer 70. A quantum well light-emitting layer 50 is formed on the P-type waveguide layer. An N-type waveguide layer is formed on the quantum well light-emitting layer 50. An N-type semiconductor stack structure is formed on the N-type waveguide layer.

[0138] It should be noted that relational terms in this document, such as "first" and "second", are used only to distinguish an entity or operation from another entity or operation, and do not require or imply any actual relationship or order between these entities or operations. In addition, the words "include", "have" and "include" and other similar forms are intended to be equivalent in meaning and are open-ended, and one or more items following any of these words are not intended to be an exhaustive list of such one or more items, or to be limited to the listed one or more items.

[0139] As used herein, unless expressly stated otherwise, the term "or" encompasses all possible combinations unless not feasible. For example, if a component is stated to include either A or B, then unless expressly stated otherwise or not feasible, the component may include A, or B, or A and B. As a second example, if a component is stated to include either A, B, or C, then unless expressly stated otherwise or not feasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A, B, and C.

[0140] In the foregoing description, embodiments have been described with reference to many specific details, which may vary depending on the implementation. Certain changes and modifications may be made to the described embodiments. Other embodiments will be clear to those skilled in the art in view of the description and practice of the invention disclosed herein. The description and examples are intended to be regarded as merely exemplary, with the true scope and spirit of the invention being indicated by the following claims. The order of steps shown in the accompanying drawings is also intended to be for illustrative purposes only and is not intended to be limited to any particular order of steps. Therefore, it will be understood by those skilled in the art that these steps may be performed in different orders while implementing the same method.

[0141] In the drawings and the specification, exemplary embodiments have been disclosed. However, many variations and modifications may be made to these embodiments. Therefore, although specific terms are employed, they are used in a general and descriptive sense only and not for the purpose of limitation.

Claims

1. A light-emitting diode epitaxial structure, characterized in that, Comprising at least: An N-type semiconductor stack structure; A P-type semiconductor stack structure; A quantum well light-emitting layer formed between the N-type semiconductor stack structure and the P-type semiconductor stack structure; And An impurity blocking layer formed between the P-type semiconductor stack structure and the quantum well light-emitting layer, and the lattice constant of the impurity blocking layer is different from that of the P-type semiconductor stack structure.

2. The light-emitting diode epitaxial structure according to claim 1, wherein The lattice constant of the impurity blocking layer is smaller than that of the P-type semiconductor stack structure.

3. The light-emitting diode epitaxial structure according to claim 1, wherein The impurity blocking layer does not absorb the light emitted by the quantum well light-emitting layer; the thickness of the impurity blocking layer is less than 10 nm.

4. The light-emitting diode epitaxial structure according to claim 1, wherein The impurity blocking layer is undoped.

5. The light-emitting diode epitaxial structure according to claim 4, characterized in that, The material of the impurity blocking layer is GaP, and the lattice constant of the impurity blocking layer is less than 6. The light-emitting diode epitaxial structure according to claim 4, wherein The material of the impurity blocking layer is Al x Ga y In 1-x-y P, Ga z In 1-z P or Al 1-w Ga w P, where 0 < x < 1, 0 < y < 1, (x + y) < 1, 0.9 ≤ z < 1, 0.9 ≤ w < 1, and the lattice constant of the impurity blocking layer is 7. The light-emitting diode epitaxial structure according to claim 1, characterized in that, The impurity blocking layer is doped with a P-type dopant.

8. The light-emitting diode epitaxial structure according to claim 7, wherein, The P-type dopant is one or more of Mg, C, and Zn, and the doping concentration is 1.0×10 17 cm -3 -1.0×10 18 cm -3 .

9. The light-emitting diode epitaxial structure according to claim 1, characterized in that, Further comprising an N-type waveguide layer disposed between the quantum well light-emitting layer and the N-type semiconductor stack structure, and / or a P-type waveguide layer disposed between the quantum well light-emitting layer and the P-type semiconductor stack structure; the lattice of the N-type waveguide layer matches the lattice of the quantum well light-emitting layer, and the lattice of the P-type waveguide layer matches the lattice of the quantum well light-emitting layer.

10. The light-emitting diode epitaxial structure according to claim 9, characterized in that, The N-type waveguide layer is transparent; the N-type waveguide layer is undoped; the P-type waveguide layer is transparent; the P-type waveguide layer is undoped.

11. The light-emitting diode epitaxial structure according to claim 9, wherein, The impurity blocking layer is directly grown on the P-type waveguide layer.

12. The light-emitting diode epitaxial structure according to claim 9, wherein, The material of the N-type waveguide layer is where 0.6 ≤ c1 < 1, 0 ≤ d1 < 1, and (c1 + d1) < 1; the material of the P-type waveguide layer 42 is where 0.6 ≤ c2 < 1, 0 ≤ d2 < 1, and (c2 + d2) < 1.

13. The light-emitting diode epitaxial structure according to claim 12, characterized in that, c1 is different from c2, and d1 is different from d2; or, c1 is the same as c2, and d1 is the same as d2.

14. The light-emitting diode epitaxial structure according to claim 1, wherein The light-emitting diode epitaxial structure further comprises a substrate and a buffer layer formed on the substrate; the N-type semiconductor stack structure is formed on the buffer layer; or the P-type semiconductor stack structure is formed on the buffer layer.

15. The light-emitting diode epitaxial structure according to claim 14, characterized in that, When the N-type semiconductor stack structure is formed on the buffer layer, the substrate is undoped or doped with an N-type dopant, the N-type dopant is one or both of Si and Te, and the concentration of the dopant is 4.0×10 17 cm -3 -2.0×10 18 cm -3 ; Alternatively, when the P-type semiconductor stack structure is formed on the buffer layer, the substrate is undoped or doped with a P-type dopant, and the P-type dopant is one or more of Mg, C, and Zn, and the concentration of the dopant is 4.0×10 17 cm -3 -2.0×10 18 cm -3 .

16. The light-emitting diode epitaxial structure according to claim 14, wherein The buffer layer is undoped; or, when the substrate is undoped or doped with an N-type dopant, the buffer layer is doped with an N-type dopant; when the substrate is undoped or doped with a P-type dopant, the buffer layer is doped with a P-type dopant.

17. The light-emitting diode epitaxial structure according to claim 16, characterized in that, The N-type dopant is one or both of Si and Te; the P-type dopant is one or more of Mg, C, and Zn.

18. The light-emitting diode epitaxial structure according to claim 14, wherein The light-emitting diode epitaxial structure further comprises an etch stop layer formed on the buffer layer.

19. The light-emitting diode epitaxial structure according to claim 18, wherein, When the N-type semiconductor stack structure is formed on the buffer layer, the etch stop layer is doped with an N-type dopant; When the P-type semiconductor stack structure is formed on the buffer layer, the etch stop layer is doped with a P-type dopant.

20. The light-emitting diode epitaxial structure according to claim 19, wherein The N-type dopant in the corrosion stop layer is one or both of Si and Te, and the concentration of the dopant is 1.0×10 18 cm -3 -5.0×10 18 cm -3 ; the P-type dopant in the corrosion stop layer is one or more of Mg, C, and Zn, and the concentration of the dopant is 1.0×10 18 cm -3 -3.0×10 18 cm -3 .

21. The light-emitting diode epitaxial structure according to claim 18, characterized in that, The material of the corrosion stopping layer 20 is Al h Ga i In 1-h-i P, where 0 < h < 1, 0 < i < 1, and (h + i) < 1.

22. The light-emitting diode epitaxial structure according to claim 1, wherein Along the direction away from the quantum well light-emitting layer, the N-type semiconductor stack structure includes an N-type confinement layer, an N-type current spreading layer, and an N-type ohmic contact layer stacked in sequence; And Along the direction away from the quantum well light-emitting layer, the P-type semiconductor stack structure includes a P-type confinement layer, a P-type transition layer, and a P-type current spreading layer stacked in sequence; Wherein, the lattices of the N-type confinement layer and the P-type confinement layer both match the lattice of the quantum well light-emitting layer.

23. The light-emitting diode epitaxial structure according to claim 22, wherein, The materials of the P-type confinement layer and the P-type current spreading layer are different; the thickness of the P-type current spreading layer is greater than that of the P-type confinement layer; there is a lattice mismatch between the P-type confinement layer and the P-type current spreading layer.

24. The light-emitting diode epitaxial structure according to claim 22, wherein, One or more of Mg, C, and Zn are doped in the P-type confinement layer, and the doping concentration is 1.0×10 17 cm -3 -2.0×10 18 cm -3 ; The material of the P-type confinement layer is Al e In 1-e P, where 0 < e < 1; One or more of Mg, C, and Zn are doped in the P-type transition layer, and the doping concentration is 1.0×10 18 cm -3 -3.0×10 18 cm -3 ; The material of the P-type transition layer is Al f Ga g In 1-f-g P, where 0 < f < 1, 0 < g < 1, (f + g) ≤ 1; One or more of Mg, C, and Zn are doped in the P-type current spreading layer, and the doping concentration is 1.0×10 18 cm -3 -5.0×10 18 cm -3 .

25. The light-emitting diode epitaxial structure according to claim 22, wherein The lattice constant of the impurity blocking layer is smaller than that of the P-type confinement layer.

26. The light-emitting diode epitaxial structure according to claim 22, wherein The material of the N-type current spreading layer is Al k Ga l In 1-k-l P, where 0 < k < 1, 0 < l < 1, and (k + l) ≤ 1; One or both of Si and Te are doped in the N-type current spreading layer, and the doping concentration is 1.0×10 18 cm -3 -3.0×10 18 cm -3 ; One or both of Si and Te are doped in the N-type ohmic contact layer, and the doping concentration is 4.0×10 18 cm -3 -1.0×10 19 cm -3 ; The material of the N-type confinement layer is Al j In 1-j P, where 0 < j < 1; One or both of Si and Te are doped in the N-type confinement layer, and the doping concentration is 1.0×10 17 cm -3 -3.0×10 18 cm -3 .

27. A method for preparing a light-emitting diode epitaxial structure, characterized in that, Including the following steps: Providing a substrate and placing the substrate in an epitaxial growth device; Forming an N-type semiconductor stack structure on the substrate; Forming a quantum well light-emitting layer on the N-type semiconductor stack structure; Forming an impurity blocking layer on the quantum well light-emitting layer; And Forming a P-type semiconductor stack structure on the impurity blocking layer, the lattice constant of the P-type semiconductor stack structure being greater than that of the impurity blocking layer.

28. The method for preparing the light-emitting diode epitaxial structure according to claim 27, wherein Forming the impurity blocking layer includes the following steps: Provide trimethylgallium and phosphine, introduce the trimethylgallium and the phosphine into the epitaxial growth equipment, the introduction time is 10s - 40s, and the growth rate is set to Forming the impurity blocking layer on the quantum well light-emitting layer.

29. The method for preparing the light-emitting diode epitaxial structure according to claim 27, wherein Forming the impurity blocking layer includes the following steps: Providing trimethylgallium and phosphine; and Provide trimethylaluminum and / or trimethylindium, and introduce them into the epitaxial growth equipment together with the trimethylgallium and the phosphine. The introduction time is 10s - 40s, and the growth rate is set to Forming the impurity blocking layer on the quantum well light-emitting layer.

30. The method for preparing a light-emitting diode epitaxial structure according to any one of claims 27-29, characterized in that, Forming the impurity blocking layer further includes the following steps: Providing a P-type dopant, introducing the P-type dopant into the epitaxial growth device, and doping the P-type dopant in the impurity blocking layer.

31. The method for preparing the light-emitting diode epitaxial structure according to claim 27, wherein, Further including the following steps: Before forming the quantum well light-emitting layer, forming a waveguide layer on the N-type semiconductor stack structure; and / or Before forming the impurity blocking layer, forming a waveguide layer on the quantum well light-emitting layer.

32. The method for preparing a light-emitting diode epitaxial structure according to claim 27, wherein, Forming the P-type semiconductor stack structure includes the following steps: Forming a P-type confinement layer on the impurity blocking layer and doping the P-type confinement layer with a P-type dopant; Forming a transition layer on the P-type confinement layer and doping the transition layer with a P-type dopant; and Forming a P-type current spreading layer on the transition layer and doping the P-type current spreading layer with a P-type dopant.

33. The method for preparing a light-emitting diode epitaxial structure according to claim 27, wherein Further including the following steps: Before forming the N-type semiconductor stack structure, forming an etch stop layer on the substrate and doping the etch stop layer with an N-type dopant.

34. The method for preparing a light-emitting diode epitaxial structure according to claim 33, wherein, Further including the following steps: Before forming the etch stop layer, forming a buffer layer on the substrate.

35. The method for preparing a light-emitting diode epitaxial structure according to claim 33, wherein Forming the N-type semiconductor stack structure includes the following steps: Forming an ohmic contact layer on the etch stop layer and doping the ohmic contact layer with an N-type dopant; Forming an N-type current spreading layer on the ohmic contact layer and doping the N-type current spreading layer with an N-type dopant; Forming an N-type confinement layer on the N-type current spreading layer and doping the N-type confinement layer with an N-type dopant.

36. A method for preparing a light-emitting diode epitaxial structure, characterized in that, Including the following steps: Providing a substrate and placing the substrate in an epitaxial growth device; Forming a P-type semiconductor stack structure on the substrate; Forming an impurity blocking layer on the P-type semiconductor stack structure, the lattice constant of the impurity blocking layer being smaller than that of the P-type semiconductor stack structure; Forming a quantum well light-emitting layer on the impurity blocking layer; And Forming an N-type semiconductor stack structure on the quantum well light-emitting layer.

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