Data access method and apparatus

Abstract

The present application relates to the technical field of computers, and discloses a data access method and apparatus. The method comprises: a processor acquires an access request for a first process, the access request indicating an access procedure other than memory access; the processor allocates an access memory in a memory on the basis of the access request, and provides the physical address of the access memory to the first process; and the processor acquires a physical address-based access operation of the first process on the access memory, and responds to the access operation. The present application simplifies the flow of an operating system responding to the access request for the first process, helping to improve the efficiency of responding to the access request.

Description

Data access method and device

[0001] This application claims priority to Chinese patent application number 202410116760.2, filed on January 26, 2024, and entitled “Data Access Method and Device,” the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of computer technology, and in particular to a data access method and device. Background Art

[0003] With the development of technology, it is becoming more and more common to realize application needs through access to computing devices. For example, data can be exchanged between different processes in a computing device or between different computing devices through storage access or network access.

[0004] Currently, to access storage media, the operating system kernel, after receiving a request to access the storage media, needs to use software processing such as a storage protocol stack to respond to the access request. Similarly, to access a network card, the operating system kernel, after receiving a request to access the network card, needs to use software processing such as a network protocol stack to respond to the access request.

[0005] However, the process in which the operating system responds to access through software stacks such as the storage protocol stack and the network protocol stack is relatively complex, resulting in low efficiency in responding to access requests.

[0006] Summary of the Invention

[0007] This application provides a data access method and device. This application simplifies the process by which an operating system responds to an access request from a first process, reduces the computing power overhead incurred by responding to the access request, and helps improve the efficiency of responding to the access request and the computing efficiency of the first computing node. The technical solutions provided by this application are as follows:

[0008] In a first aspect, the present application provides a data access method. The method is applied to a processor of a first computing node. The first computing node also includes a memory. The method comprises: the processor obtaining an access request from a first process, the access request indicating an access process other than memory access; based on the access request, the processor allocates access memory in the memory and provides the first process with a physical address for accessing the memory; the processor obtains an access operation of the first process to access the memory based on the physical address and responds to the access operation.

[0009] In this data access method, the processor allocates access memory to the first process, and the first process accesses the access memory, so that the first process can obtain the data indicated by the access request through the access memory, and convert various types of access requirements of the first process into access operations to the access memory. For example, various types of access that require the use of a storage protocol stack and a network protocol stack are all converted into access to the memory. In this way, when the operating system of the first computing node responds to the access request, it is no longer necessary to execute software processing such as the corresponding protocol stack according to the specific access requirements of the first process, which simplifies the process of the operating system responding to the access request of the first process, reduces the computing power overhead generated by responding to the access request, and helps to improve the efficiency of responding to the access request and the computing efficiency of the first computing node.

[0010] In one possible implementation, the first process is a process running on a processor. In this case, the implementation scenario of the data access method in this application can be considered as a scenario in which different processes in the first computing node access each other. And / or, the first process is a process running on a second computing node. In this case, the implementation scenario of the data access method in this application can be considered as a scenario in which the second computing node accesses the first computing node.

[0011] In one possible implementation scenario, after obtaining an access request, the processor may first perform a judgment process to determine whether access memory needs to be allocated. In one implementation, in response to the first process being a process running in the second computing node, the processor allocates access memory in the memory based on the access request, including: when the first computing node and the second computing node are connected via a communication bus that supports memory semantics, the processor allocates access memory in the memory based on the access request. At this time, the first computing node and the second computing node are connected via a communication bus that supports memory semantics, and the processor responds to the access operation, including: the processor responds to the access operation based on the communication bus.

[0012] In the present application, the access request indicates an access process other than memory access. That is, the access request indicates any type of access other than memory access. For example, the access request indicates access to a file stored on the first computing node. And / or, the access request indicates data transmission with the second process running on the processor. That is, the access request indicates access to the network card of the first computing node. In addition, the access request may optionally indicate access to non-hard disk network types, access to accelerators (such as encryption and decryption accelerators), and access to security national secret chips, etc.

[0013] The processor responding to an access operation means that the processor performs memory management according to the corresponding access type for the access type indicated by the access request. For example, when the access request indicates reading a file in the first computing node, the processor responding to the access operation includes: the processor instructing the access memory to provide the first process with the data it needs to access. For example, when the access request indicates access to a file stored in the first computing node, the processor responding to the access operation includes: the processor reading the file from the persistent storage medium into the access memory, performing the operation indicated by the access operation on the file stored in the access memory, and updating the file stored in the persistent storage medium based on the operation result. For another example, when the access request indicates transferring data with a second process running on the processor, if the access operation indicates that the first process receives target data from the second process, the processor responding to the access operation includes: the processor instructing the second process to store the target data in the access memory, and providing the target data to the first process based on the access operation. If the access operation indicates that the first process transfers target data to the second process, the processor responding to the access operation includes: the processor storing the target data in the access memory and providing the target data to the second process.

[0014] In one possible implementation, in response to the first process being a process running in the second computing node, before the processor provides the first process with a physical address for accessing memory, the method further includes: the processor configuring the second process and establishing a communication connection between the second process and the first process. The processor then provides the first process with a physical address for accessing memory, including: the processor providing the physical address to the first process through the second process. When the first process is a process running in the first computing node, and the processor provides the second process with a physical address to send to the first process, if the physical address is still sent to the first process running in the second computing node through the second process, it is possible to achieve compatibility and unification of intra-node communication and inter-node communication in local node notifications and cross-node notifications, which facilitates the horizontal and vertical expansion of distributed systems.

[0015] In one implementation, after receiving the physical address, the second process may immediately send the physical address to the first process. This implementation is equivalent to the second process actively sending the physical address to the first process. In another implementation, after receiving the physical address and receiving the query request sent by the first process, the second process sends the physical address to the first process. This implementation is equivalent to the second process passively sending the physical address to the first process.

[0016] In a possible implementation, after the processor allocates access memory in the memory, the method further includes: the processor configures the access rights of the first process to the access memory. The access rights are used to indicate the operations that the first process can perform when accessing the access memory. For example, the access rights indicate that the first process can perform read and write operations on the access memory, in which case the access rights are borrowed rights. The access rights indicate that the first process can perform read-only operations on the access memory, in which case the access rights are shared rights. For example, when the physical address of the access memory is provided to multiple processes, the first process has read-only access rights to the access memory; when the physical address of the access memory is provided to one process, the first process has read and write access rights to the access memory. Accordingly, the processor responds to the access operation, including: the processor responds to the access operation when the access operation satisfies the access rights.

[0017] The processor configures the first process's access rights to memory access and responds to the access operation when the first process's access operation meets the access rights, thereby authenticating the first process's access operation and ensuring the safe operation of memory access.

[0018] In one possible implementation, the access rights are indicated by attribute information of the access request. The access rights may be determined by an inherent attribute of the first computing node. For example, when the first process triggers an access request by calling an access interface, if the access interface has an inherent attribute, the processor may determine the first process's access rights to access memory based on the inherent attribute. For example, when the inherent attribute of the access interface indicates the access rights of the access implemented through the interface, the processor may determine the access rights indicated by the inherent attribute as the first process's access rights to access memory. Furthermore, the attribute information indicating the inherent attribute may be carried in the access request.

[0019] In another implementation, the access rights may be determined based on the data that the access request indicates is being accessed. For example, when the access request indicates that the accessed data needs to be provided to multiple processes, there may be a conflict in the access to the data by the multiple processes, and the processor may configure the first process to have shared access rights to the memory. When the access request indicates that the accessed data needs to be provided to one process, there will be no access conflict due to multiple processes accessing the memory, and the processor may configure the first process to have borrowed access rights to the memory. For example, when the memory access needs to be provided to multiple processes for access, the physical address of the memory access needs to be provided to multiple processes. To avoid access conflicts between the access to the memory by multiple processes, the processor may configure the first process to have shared access rights to the memory. When the memory access needs to be provided to one process for access, the physical address of the memory access needs to be provided to one process. The memory access is for use by one process, and there will be no access conflict due to multiple processes accessing the memory, and the processor may configure the first process to have borrowed access rights to the memory.

[0020] In a second aspect, the present application provides a data access device. The device is applied to a processor of a first computing node. The first computing node also includes a memory. The device includes: an interaction module for obtaining an access request from a first process, the access request indicating an access process other than memory access; an allocation module for allocating access memory in the memory based on the access request and providing the physical address of the memory access to the first process; and a response module for obtaining an access operation of the first process to access the memory based on the physical address and responding to the access operation.

[0021] In a possible implementation, the first process is a process running on a processor, and / or the first process is a process running in the second computing node.

[0022] In one possible implementation, in response to the first process being a process running in the second computing node, the allocation module is specifically used to: allocate access memory in the memory based on the access request when the first computing node and the second computing node are connected via a communication bus that supports memory semantics.

[0023] In a possible implementation, the first computing node and the second computing node are connected via a communication bus supporting memory semantics, and the response module is specifically configured to respond to the access operation based on the communication bus.

[0024] In a possible implementation, the access request indicates access to a file stored on the first computing node, and / or the access request indicates data transmission with a second process running on the processor.

[0025] In one possible implementation, in response to an access request indicating access to a file stored in the first computing node, the response module is specifically used to: read the file from the persistent storage medium into the access memory, perform the operation indicated by the access operation on the file stored in the access memory, and update the file stored in the persistent storage medium based on the operation result.

[0026] In one possible implementation, in response to an access request indicating data transmission with a second process running on the processor, the response module is specifically configured to: when an access operation indicates receiving target data from the second process, instruct the second process to store the target data in an access memory, and provide the target data to the first process based on the access operation; when the access operation indicates transmitting target data to the second process, store the target data in the access memory, and provide the target data to the second process.

[0027] In a possible implementation, in response to the first process being a process running in the second computing node, the allocation module is specifically configured to: configure the second process and establish a communication connection between the second process and the first process; and provide a physical address to the first process through the second process.

[0028] In a possible implementation, the allocation module is specifically configured to: after receiving the physical address and the query request sent by the first process, send the physical address to the first process.

[0029] In a possible implementation, the allocation module is specifically configured to configure the first process's access rights to the memory, and the response module is specifically configured to respond to the access operation when the access operation satisfies the access rights.

[0030] In a possible implementation, when the physical address for accessing the memory is provided to multiple processes, the first process has read-only permission to access the memory; when the physical address for accessing the memory is provided to one process, the first process has read and write permission to access the memory.

[0031] In a possible implementation, the access permission is indicated by attribute information of the access request.

[0032] In a third aspect, the present application provides a computing device comprising a memory and a processor, wherein the memory stores program instructions, and the processor runs the program instructions to execute the method provided in the first aspect of the present application and any possible implementation thereof.

[0033] In a fourth aspect, the present application provides a computing device cluster, comprising multiple computing devices, wherein the multiple computing devices include multiple processors and multiple memories, wherein program instructions are stored in the multiple memories, and the multiple processors execute the program instructions, so that the computing device cluster executes the method provided in the first aspect of the present application and any possible implementation thereof.

[0034] In a fifth aspect, the present application provides a computer-readable storage medium, which is a non-volatile computer-readable storage medium. The computer-readable storage medium includes program instructions. When the program instructions are executed on a computing device, the computing device executes the method provided in the first aspect of the present application and any possible implementation thereof.

[0035] In a sixth aspect, the present application provides a computer program product comprising instructions, which, when run on a computer, enables the computer to execute the method provided in the first aspect of the present application and any possible implementation thereof.

[0036] Optionally, the computer program product is an operating system running in a processor of a computer device. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] FIG1 is a schematic structural diagram of an implementation scenario involved in a data access method provided in an embodiment of the present application;

[0038] FIG2 is a schematic diagram of a structure of an implementation scenario involved in another data access method provided in an embodiment of the present application;

[0039] FIG3 is a flow chart of a data access method provided in an embodiment of the present application;

[0040] FIG4 is a schematic diagram of a process in which a conventional operating system responds to file access using a storage protocol stack according to an embodiment of the present application;

[0041] FIG5 is a schematic diagram of a process of sending data using a network protocol stack in a traditional operating system according to an embodiment of the present application;

[0042] 6 is a schematic diagram of transmitting a physical address to a process in a second computing node via an IPI according to an embodiment of the present application;

[0043] 7 is a schematic diagram of a first computing node and a second computing node implementing access by accessing a memory according to an embodiment of the present application;

[0044] FIG8 is a schematic diagram of a process of accessing data using the data access method of the present application provided in an embodiment of the present application;

[0045] FIG9 is a schematic diagram of devices accessing each other by accessing memory provided by an embodiment of the present application;

[0046] FIG10 is a schematic diagram of a data access device provided in an embodiment of the present application;

[0047] FIG11 is a schematic diagram of the structure of a computing device provided in an embodiment of the present application;

[0048] FIG12 is a schematic diagram of the structure of a computing device cluster provided in an embodiment of the present application. DETAILED DESCRIPTION

[0049] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0050] With technological advancements, implementing application needs through access to computing devices is becoming increasingly common. For example, data can be exchanged between different processes within a computing device or between different computing devices through storage access or network access. Currently, to access storage media, the operating system kernel, after receiving a request to access the storage media, needs to use software processing such as the storage protocol stack to respond to the access request. Similarly, to access a network card, the operating system kernel, after receiving a request to access the network card, needs to use software processing such as the network protocol stack to respond to the access request. The kernel is the most fundamental part of the OS. The kernel is responsible for allocating processor computing resources to processes, allocating physical memory to virtual memory, and managing input and output (IO) devices to files.

[0051] However, the process in which the operating system responds to access through software stacks such as the storage protocol stack and the network protocol stack is relatively complex, resulting in low efficiency in responding to access requests.

[0052] Furthermore, as the performance of network cards and storage media improves, the computing power consumed by the operating system (OS) software stack (such as the protocol stack) is also increasing. For example, when accessing traditional storage media such as hard disk drives (HDDs) and solid-state drives (SSDs), 80% of the computing power is consumed by the storage media and its interfaces, while 20% is consumed by the operating system. However, when accessing newer storage media, 20% of the computing power is consumed by the storage media and its interfaces, while 80% is consumed by software processing such as the kernel's use of the storage protocol stack. This shows that the kernel's use of software processing such as the protocol stack currently accounts for a significant proportion of computing power consumption, making it a major factor affecting access performance. Furthermore, the kernel's use of the protocol stack requires multiple operations, making the kernel's response to access requests through the software stack complex, resulting in low efficiency in responding to access requests. Each operation consumes memory, which leads to multiple channel redundancies in the protocol stack.

[0053] The industry is constantly experimenting with bypass technologies to circumvent the protocol stack and maximize hardware performance. These bypass technologies primarily include the Data Plane Development Kit (DPDK) and the Persistent Memory Development Kit (PDMK).

[0054] DPDK primarily consists of the DPDK library and user-mode network card drivers. Business programs use the DPDK application program interface (API). DPDK addresses the performance issues of traditional socket approaches by improving network card capabilities through technologies such as large memory pages, pre-allocated packet memory, polling, and multi-core concurrency. The core technical solution bypasses the kernel's Transmission Control Protocol (TCP) / Internet Protocol (IP) protocol stack and directly operates the network card buffer in user mode. By bypassing the Linux kernel, network forwarding packets are copied in the kernel and the software stack is eliminated, thereby improving network forwarding efficiency. In CPU design, user mode refers to an unprivileged state. In this state, the executed code is restricted by hardware and cannot perform certain operations. For example, writing to the memory space of other processes is restricted to prevent security risks to the operating system. In operating system design, user mode is similarly defined as an unprivileged execution state. The kernel prohibits code in this state from performing potentially dangerous operations. For example, it is forbidden to write system configuration files, kill other users' processes, restart the system, etc.

[0055] PDMK is a development tool library for using storage media with direct access (DAX) features. Non-volatile memory (NVM) can be exposed directly to user space using a DAX-enabled file system. This allows user-mode programs to operate NVM using standard file system APIs, and also to map it directly to user space using mmap (a memory-mapped file method). This allows NVM operations to be directly converted to loading and storing data in the NVM, without the need for a page cache.

[0056] However, these technologies all aim to improve performance by bypassing the OS and reducing software stack overhead. These technologies are domain-specific and do not affect the OS itself. Furthermore, all of these direct-access technologies create a new, fast path, rather than changing the OS design. Furthermore, to maintain compatibility with network and storage access, the OS continues to retain traditional network and storage protocol stacks, making it increasingly redundant.

[0057] Based on this, an embodiment of the present application provides a data access method. The method is applied to a processor of a first computing node. The first computing node also includes a memory. The method includes: the processor obtains an access request from a first process, and then, based on the access request, allocates access memory in the memory and provides the first process with a physical address for accessing the memory; after obtaining the first process's access operation to access the memory based on the physical address, the processor responds to the access operation. The access request indicates an access process other than memory access. That is, the access request indicates any type of access other than memory access.

[0058] In this data access method, the processor allocates access memory to the first process, and the first process accesses the access memory, so that the first process can obtain the data indicated by the access request through the access memory, and convert various types of access requirements of the first process into access operations to the access memory. For example, various types of access that require the use of a storage protocol stack and a network protocol stack are all converted into access to the memory. In this way, when the operating system of the first computing node responds to the access request, it is no longer necessary to execute software processing such as the corresponding protocol stack according to the specific access requirements of the first process, which simplifies the process of the operating system responding to the access request of the first process, reduces the computing power overhead generated by responding to the access request, and helps to improve the efficiency of responding to the access request and the computing efficiency of the first computing node.

[0059] In one implementation, the data access method can be optionally executed by an operating system running in a processor or a kernel of an operating system. In this case, the present application is equivalent to providing a new operating system or a kernel of an operating system. The operating system can convert the object of the access business and expose the ability to access memory to the first process, so that the first process can achieve the access purpose by performing an access operation on the access memory. In addition, the operating system can implement access access such as files and communications, and the kernel side can achieve copy-free and serialization-free conversion consumption when responding to the access, and can also decouple the hardware used for access (such as storage media used for file access and network cards used for network transmission). In this way, the operating system can convert various types of access processes such as storage protocol stacks, network protocol stacks and memory access processes into memory access processes, which is equivalent to integrating the storage protocol stacks, network protocol stacks and memory access processes in traditional operating systems, unifying the corresponding access processes into access to memory, and being compatible with access acceleration of access processes such as storage protocol stacks, network protocol stacks and memory access processes. It can eliminate the redundancy of multiple operating systems caused by the use of protocol stacks, and help the software stacks of traditional devices such as disks and network cards become more efficient software stacks, thereby achieving the purpose of performance acceleration and simplifying the operating system.

[0060] The following is a detailed introduction to the technical solution of the present application from multiple perspectives, including implementation scenarios, method flow, hardware devices, software devices, etc. Here, an example of the implementation scenario of the embodiment of the present application is first described.

[0061] FIG1 is a schematic diagram of a structure of an implementation scenario involving a data access method provided in an embodiment of the present application. As shown in FIG1 , the implementation scenario includes: a first computing node 10. The first computing node 10 includes a processor and memory. Optionally, the first computing node 10 can be a physical machine, a cloud server, a bare metal server, etc. For example, the implementation scenario shown in FIG1 is a data center, and the first computing node 10 is a server in the data center.

[0062] In the implementation scenario shown in Figure 1, a first process A is running on the processor of the first computing node 10. When first process A needs to access data, it triggers an access request. After receiving the access request, the processor can allocate access memory in the memory of the first computing node 10 based on the data access method provided in the embodiments of the present application, and provide the physical address of the access memory to the first process A, so that the first process A can access the access memory based on the physical address. When the first process A performs an access operation on the access memory, the processor responds to the access operation to achieve its access purpose. In this case, this implementation scenario can be considered a communication scenario within the first computing node 10. For example, a second process B is also running on the processor of the first computing node 10. When first process A needs to transfer data with second process B, first process A can trigger an access request, which instructs the first process A to transfer data with second process B. After receiving the access request, the processor allocates access memory based on the access request and provides the physical address of the access memory to the first process A, so that the first process A can use the access memory to transfer data with second process B. In this case, this implementation scenario can be considered a scenario for communication between different processes in the first computing node 10.

[0063] FIG2 is a structural diagram of an implementation scenario involved in another data access method provided in an embodiment of the present application. As shown in FIG2 , the implementation scenario includes: a first computing node 10 and at least one second computing node 20. FIG2 is a schematic diagram of the implementation scenario including a first computing node 10 and a second computing node 20. The first computing node 10 and the second computing node 20 both include a processor and a memory. A communication connection is established between the first computing node 10 and the second computing node 20. For example, a communication connection can be established between the first computing node 10 and the second computing node 20 via a network. Optionally, the network can be a local area network, the Internet, or other networks, which is not limited in the embodiment of the present application. In addition, in order to ensure that the second computing node 20 can perform access operations on the access memory of the first computing node 10, a communication bus supporting memory semantics is also connected between the first computing node 10 and the second computing node 20. For example, the communication bus can be a high-speed communication bus such as a compute express link (CXL) or a Lingqu bus (also known as a UB bus). Optionally, the first computing node 10 and the second computing node 20 can both be physical machines, cloud servers, bare metal servers, etc. For example, the implementation scenario shown in FIG2 is a data center, and the first computing node 10 and the second computing node 20 are both servers in the data center.

[0064] In the implementation scenario shown in Figure 2, a first process A is running on the processor of the second computing node 20. A second process B is running on the processor of the first computing node 10. When the first process A has an access requirement to access the first computing node 10, an access request is triggered. After the processor of the first computing node receives the access request, it can allocate access memory in the memory of the first computing node 10 based on the data access method provided in the embodiment of the present application, and provide the physical address of the access memory to the first process A, so that the first process A can access the access memory based on the physical address, and when the first process A performs an access operation on the access memory, the processor responds to the access operation to achieve the purpose of the first process A accessing the first computing node 10. For example, when the first process A needs to transfer data with the second process B, the first process A can send an access request to the first computing node, and the access request indicates that data should be transferred with the second process B. After receiving the access request, the processor of the first computing node allocates access memory based on the access request and provides the physical address of the access memory to the first process A, so that the first process A uses the access memory to transfer data with the second process B. In this case, this implementation scenario can be regarded as a scenario for communication between computing nodes. For another example, when first process A needs to access a file stored on first computing node 10, first process A may send an access request to the first computing node, indicating access to the file stored on first computing node 10. After receiving the access request, the processor of the first computing node allocates access memory based on the access request and provides the physical address of the access memory to first process A, allowing first process A to use the access memory to access the file stored on first computing node 10. In this implementation scenario, second computing node 20 accesses a file stored on first computing node 10.

[0065] In one implementation, the data access method provided in the embodiments of the present application can be implemented by running an executable program on a computing node. For example, the executable program of the data access method can be presented in the form of an application installation package. After the application installation package is installed on the computing node, the data access method can be implemented by running the executable program.

[0066] Furthermore, the data access method provided in the embodiments of the present application is specifically executed by an operating system running on a processor. In this case, the present application is equivalent to providing a new operating system. This new operating system can improve the efficiency of responding to access requests and the computing efficiency of computing nodes, thereby contributing to the improvement of computing power in the information, communications, and technology (ICT) field.

[0067] There are at least two implementation forms of this operating system. In one implementation form, the operating system of this application is obtained by modifying a traditional operating system. In another implementation form, the operating system of this application is redesigned according to the implementation ideas of the data access method provided in this application. When this operating system is obtained through redesign, it does not need to design the network protocol stack and storage protocol stack required in traditional operating systems, thereby simplifying the operating system.

[0068] It should be understood that the above content is an exemplary description of the implementation scenario of the data access method provided in the embodiment of the present application, and does not constitute a limitation on the implementation scenario of the data access method. It is known to those skilled in the art that as business needs change, its implementation scenario can be adjusted according to application requirements. For example, the method can also be applied to non-hard disk network access, access to accelerators (such as encryption and decryption accelerators), and access to security national secret chips, etc., which are not listed one by one in the embodiment of the present application.

[0069] Next, the data access method provided by the embodiment of the present application is described. FIG3 is a flow chart of the data access method provided by the embodiment of the present application. The method is applied to a first computing node. The first computing node includes a processor and a memory. As shown in FIG3, the data access method includes the following steps:

[0070] Step 301: The processor obtains an access request from a first process.

[0071] As previously mentioned, the first process may optionally be a process running on a processor of the first computing node. In this case, the implementation scenario of the access method can be considered a communication scenario within the first computing node. For example, if a second process is also running on the processor of the first computing node, the access request is an access request sent by the first process to the second process, instructing the first process to transfer data to the second process. This implementation scenario can be considered a scenario of communication between different processes in the first computing node.

[0072] And / or, the first process may optionally be a process running in the second computing node. In this case, the implementation scenario can be considered as a scenario of access between computing nodes. For example, when the first process needs to transfer data to the second process, an access request is sent by the first process to the second process, and the access request indicates the data transfer with the second process. In this case, the implementation scenario can be considered as a scenario of communication between computing nodes. For another example, when the first process needs to access a file stored in the first computing node, an access request is sent by the first process to the second process, and the access request indicates access to a file stored in the first computing node. In this case, the implementation scenario is a scenario in which the second computing node accesses a file stored in the first computing node. A communication connection is established between the first computing node and the second computing node. Furthermore, to ensure that the second computing node can perform access operations on the access memory of the first computing node, a communication bus that supports memory semantics is connected between the first computing node and the second computing node. By way of example, the communication bus may be a high-speed communication bus such as a CXL or UB bus.

[0073] The access request indicates an access process other than memory access. That is, the access request indicates any type of access other than memory access. For example, according to the above example, the access request indicates access to a file stored on the first computing node, and / or the access request indicates access to the network card of the first computing node. In addition, the access request may optionally indicate access to non-hard disk network types, access to accelerators (such as encryption and decryption accelerators), and access to security national secret chips, etc., which are not specifically limited in the embodiments of the present application.

[0074] In one implementation, the access request can indicate the data that the first process requests to access. This indication can be reflected by a virtual address (VA). Optionally, the access request carries a virtual address, or the access request carries information indicating the virtual address. The virtual address is used to indicate the data that the first process requests to access. For example, an access request indicating a file access carries the file's inode number, file size, and start address. The inode number, file size, and start address can indicate the virtual address. In this way, after the processor obtains the access request, it can obtain the virtual address from the access request and determine the data that the first process requests to access based on the virtual address.

[0075] Optionally, the access request may be triggered by the first process calling the interface layer of the traditional operating system. For example, as shown in Figure 4, when the access request instructs the first process to access the file stored in the first computing node, the access request may be triggered by the first process calling the API of the virtual file system of the traditional operating system. At this time, it is equivalent to intercepting the read (read) / write (write) instructions of traditional file access on the kernel side, and responding to it using the data access method provided by the embodiment of the present application. For another example, as shown in Figure 5, when the access request instructs the first process to transfer data with the second process, the access request may be triggered by the first process calling the socket interface of the traditional operating system. At this time, it is equivalent to intercepting the send (send) / receive (recvice) instructions of traditional network transmission on the kernel side, and responding to it using the data access method provided by the embodiment of the present application. When an access request is triggered by the first process calling the interface layer of the traditional operating system, the first process triggering the access request can use the original API of the traditional operating system, which can ensure that the traditional access triggering processes such as file reading and writing and network packet sending and receiving remain unchanged, so that the application running on the operating system can realize the decoupling of calls through the data access method provided by this application, and maintain compatibility with the original API of the traditional operating system (such as read / write API, etc.).

[0076] Step 302: The processor allocates access memory in the memory based on the access request.

[0077] After the processor obtains the access request of the first process, it can allocate access memory in the memory of the first computing node based on the access request, so that the first process can achieve the access purpose indicated by the access request by accessing the access memory. Among them, the processor can optionally estimate the capacity of the access memory required to implement the access request based on the data carried by the access request, and then apply for access memory of this capacity in the memory to achieve the allocation of the access memory. In one implementation method, the access request carries a virtual address, and the processor can determine the physical address corresponding to the virtual address based on the mapping relationship between the virtual address and the physical address, and determine the capacity of the access memory based on the size of the data recorded by the physical address.

[0078] Optionally, after receiving an access request, the processor may first perform a determination process to determine whether access memory allocation is required. In one implementation, when the first process has the capability to perform access operations on the access memory, the processor allocates access memory in the memory based on the access request. For example, when the first process is running on a first compute node, the processor determines that the first process has the capability to perform access operations on the access memory. When the first process is running on a second compute node, if the first and second compute nodes are connected via a communication bus that supports memory semantics and the first process can access the access memory via the communication bus, the processor determines that the first process has the capability to perform access operations on the access memory. When the first process has the capability to perform access operations on the access memory, the processor determines to respond to the access request of the first process using a conventional operating system's response to access requests, and does not allocate access memory based on the access request. For example, when the first and second compute nodes are not connected via a communication bus that supports memory semantics, the processor may determine that the first process does not have the capability to perform access operations on the access memory. At this time, if the access request instructs the first process to transmit data to the second process, the access request is responded to using the current method of transmitting data through the network protocol stack. If the access request instructs the first process to access a file stored on the first computing node, the access request is responded to using the current method of implementing file access through the file protocol stack. In one implementation scenario, when the processor is compatible with a traditional operating system and the operating system provided by this application, or when the operating system has both the functions of a traditional operating system and the functions of the data access method provided by this application, after receiving the access request, the operating system needs to make a judgment according to the above logic, and respond to the access request according to the corresponding response method based on the judgment result.

[0079] Furthermore, after the processor requests memory access in the memory, the processor can also configure access permissions for the first process to the memory to ensure secure operation of the memory. The access permissions are used to indicate the operations that the first process can perform when accessing the memory. For example, if the access permissions indicate that the first process can perform read and write operations on the memory, the access permissions are borrowed permissions. If the access permissions indicate that the first process can perform read-only operations on the memory, the access permissions are shared permissions.

[0080] In a first implementation, access rights may be determined by inherent attributes of the first computing node. For example, when a first process triggers an access request by calling an access interface, if the access interface has inherent attributes, the processor may determine the first process's access rights to access memory based on the inherent attributes. For example, when the inherent attributes of the access interface indicate access rights for access achieved through the interface, the processor may determine the access rights indicated by the inherent attributes as the first process's access rights to access memory. Furthermore, attribute information indicating the inherent attributes may be carried in the access request.

[0081] In a second implementation, access rights may be determined based on the data that the access request indicates is accessed. For example, when the access request indicates that the accessed data needs to be provided to multiple processes, there may be a conflict in the access to the data by the multiple processes, and the processor may configure the first process to have shared access rights to the memory. When the access request indicates that the accessed data needs to be provided to one process, there will be no access conflict due to multiple processes accessing the memory, and the processor may configure the first process to have borrowed access rights to the memory. For example, when the memory access needs to be provided to multiple processes for access, the physical address of the memory access needs to be provided to multiple processes. To avoid access conflicts between the access to the memory by multiple processes, the processor may configure the first process to have shared access rights to the memory. When the memory access needs to be provided to one process for access, the physical address of the memory access needs to be provided to one process. The memory access is for use by one process, and there will be no access conflict due to multiple processes accessing the memory, and the processor may configure the first process to have borrowed access rights to the memory.

[0082] It should be noted that the first implementation method and the second implementation method for determining access rights can be used separately or in combination. For example, when the first implementation method and the second implementation method are used in combination, the processor may prioritize determining access rights based on the inherent attributes of the first computing node. When the inherent attributes do not indicate access rights, the processor determines access rights based on the second implementation method. Furthermore, the first implementation method and the second implementation method above are examples of implementation methods for determining access rights and are not intended to limit their implementation methods. For example, access rights may also be determined based on factors such as the priority of the process accessing the memory.

[0083] As an implementation method, the processor may optionally manage memory uniformly based on a mapping table during the process of allocating memory access based on an access request. During step 302, the processor may first determine, based on the access request, information such as the virtual address, physical address (PA), and access type indicated by the access request, and then establish a mapping table based on this information. After completing the allocation of memory access, the processor may optionally improve the mapping table by implementing, based on the allocation of memory access, an access mode indicated by the access request and owner information of the memory used to store the data indicated by the access request. For example, after obtaining information such as the virtual address, physical address, and access type, the processor may request a separate page table and use the page table to record the correspondence between this information. For example, as shown in Table 1, when the mapping table represents the correspondence between the virtual address, physical address, access type, access mode, and owner information, the correspondence is represented using a five-dimensional page table. The physical address indicates the physical memory block storing the data indicated by the virtual address. The access type indicates the access requirement. For example, the "file" type in Table 1 indicates a first process's need to access a file stored on the first computing node. The "socket" type in Table 1 indicates a first process's request to transfer data. Access modes include: responding to an access request through shared memory access, responding to an access request through borrowed memory access, and responding to an access request through a traditional operating system. When responding to an access request through memory access, the mapping table records the access rights for the memory access, such as "shared" in the third column of the second and sixth rows of Table 1, and "borrowed" in the third column of the fifth row. Since the physical address PA1 needs to be provided to two processes, its access mode is "shared." When responding to an access request through a traditional operating system, which typically occurs in cross-node access, the mapping table records the network address (NA) of the second computing node, such as "NA1" and "NA2" in the third column of the third and fourth rows of Table 1. The network address is used to identify the computing node and can be any identifying information that can represent the computing node. For example, the network address is an IP address.

[0084] Table 1

[0085] The processor manages memory uniformly based on a mapping table, mapping the cache pages on the kernel side to achieve business-unaware memory page mapping, which helps support direct data transfer through memory access. In addition, the mapping table can also distinguish between various types of access to achieve differentiation of different access requirements. At the same time, because the mapping table records the physical address of the physical memory block where the data is stored, there is no need to reflect the difference between different storage media, and unified management of heterogeneous memory media can be achieved.

[0086] Step 303: The processor stores the data indicated by the access request in the access memory.

[0087] After the processor obtains the access request, it can determine the data that the access request indicates to access based on the access request. Then, the processor can obtain the data from the first computing node and store the data in the access memory so that the first process can read the data in the access memory. The access request carries a virtual address, and the processor can determine the data that the access request indicates to access based on the virtual address. In one implementation, when the access request indicates access to a file in the first computing node, the processor can optionally determine the metadata area (metadata area) of the file based on the virtual address carried by the access request, determine the data area (data area) of the file based on the metadata recorded in the metadata area, and obtain the data that the access request indicates to access from the data area. When the access request indicates that the first process transfers data with the second process, the processor can optionally determine the buffer used by the network card based on the virtual address carried by the access request, and obtain the buffer data (buffer data) from the buffer, thereby obtaining the data that the access request indicates to access.

[0088] It should be noted that step 303 is an optional step in the access scenario. For example, when the access request indicates that the first process needs to obtain data through the access request, the processor may execute step 303 to store the data requested by the access request in the access memory. When the access request indicates that the first process needs to write data to the first computing node through the access request, the processor does not need to execute step 303.

[0089] Step 304: The processor provides the first process with a physical address for accessing the memory.

[0090] There are multiple ways to implement the processor providing the physical address to the first process. For example, when the first process is a process running in the first computing node, the processor can send the physical address directly to the first process via the network. Alternatively, the processor can optionally send the physical address to the first process via an inter-process interrupt (IPI). The IPI is an inter-core notification message generated by an interrupt clearing register (ICR), and the IPI can be sent between processes via the system bus. The destination shorthand field of the ICR sets the overall destination type as the destination field, which is used to indicate the destination end of the IPI.

[0091] Similarly, when the first process is running on the second compute node, the processor can send the physical address directly to the first process via the network. Alternatively, the processor can optionally provide the physical address to the first process using an IPI. In one implementation, when the first process is running on the second compute node, before providing the physical address to the first process, the processor first configures the second process in the processor and establishes a communication connection between the second process and the first process. After completing the allocation of memory access, the processor can optionally first provide the physical address to the second process via an IPI, and then provide the physical address to the first process via the second process. As shown in Figure 6, configuring the second process in the processor is equivalent to creating a "shadow core" for the first process in the first compute node. This second process is used to obtain messages sent to the first process from the first compute node and pass these messages to the first process. "C" in Figure 6 represents a processor core. The processor core represented by the solid line is the actual hardware of the compute node, while the processor core represented by the dashed line is virtual. It should be noted that after configuring the second process in the first computing node and establishing a communication connection between the second process and the first process, if a message needs to be sent to the second process via IPI, the second process also needs to be included in the IPI notification interrupt service routine.

[0092] In one implementation, after receiving the physical address, the second process may immediately send the physical address to the first process. This implementation is equivalent to the second process proactively sending the physical address to the first process. In another implementation, after receiving the physical address and receiving a query request from the first process, the second process sends the physical address to the first process. This implementation is equivalent to the second process passively sending the physical address to the first process. Alternatively, the first process may request the physical address from the second process through polling. The physical address provided by the second process to the first process may be sent via a network or via a bus between the first and second computing nodes.

[0093] When the first process is a process running in the first computing node, and the processor uses IPI to send a physical address to the first process, if the physical address is still sent to the first process running in the second computing node through IPI, it is possible to achieve compatibility and unification of intra-node communication and inter-node communication in local node notification and cross-node notification. In addition, when IPI is used in a distributed system to achieve compatibility and unification of intra-node communication and inter-node communication, it also helps to scale the distributed system horizontally (also called scale out) and vertically (also called scale up). Among them, horizontal expansion is used to add new nodes to the distributed system to expand the overall scale of the distributed system. For example, horizontal expansion of a distributed system includes adding a new computing node to a distributed system used to implement web or email services. Vertical expansion is used to add hardware configuration to a single computing node in a distributed system to increase the business capabilities of a single node in the distributed system. For example, CPU and memory are added to the computing nodes in the distributed system.

[0094] Step 305: The processor obtains an access operation of the first process to access the memory based on the physical address, and responds to the access operation.

[0095] The processor responding to the access operation means that the processor performs memory management according to the corresponding access type for the access type indicated by the access request. For example, when the access request indicates reading a file in the first computing node, the processor responding to the access operation includes: the processor instructs the access memory to provide the first process with the data it needs to access. For example, when the access request indicates access to a file stored in the first computing node, the processor responding to the access operation includes: the processor reading the file from the persistent storage medium into the access memory, performing the operation indicated by the access operation on the file stored in the access memory, and updating the file stored in the persistent storage medium based on the operation result. The operation indicated by the access request can be selected as: adding a file, deleting a file, querying a file, and modifying a file. For another example, when the access request indicates transferring data with a second process running on the processor, if the access operation indicates that the first process receives target data from the second process, the processor responding to the access operation includes: the processor instructs the second process to store the target data in the access memory, and provides the target data to the first process based on the access operation. If the access operation instructs the first process to transfer target data to the second process, the processor responds to the access operation, including: the processor storing the target data in the access memory and providing the target data to the second process.

[0096] In addition, when the first computing node and the second computing node are connected via a communication bus that supports memory semantics, when the processor responds to an access operation, the processor may optionally respond to the access operation based on the communication bus. For example, the processor transmits data stored in the access memory to the first process via the communication bus, or the processor receives data written to the access memory by the first process via the communication bus. At the same time, when the processor configures the access rights of the first process to the access memory during the process of allocating access memory, when the processor responds to the access operation, it is also necessary to verify whether the access operation of the first process complies with the access rights. When the access operation is within the scope permitted by the access rights, the processor executes the access operation. When the access operation is not within the scope permitted by the access rights, the processor prohibits specifying the access operation.

[0097] The following is a specific example to illustrate the implementation process of the data access method provided in the embodiment of the present application.

[0098] As shown in FIG7 , the first computing node and the second computing node are connected via a UB bus. When the first process in the second computing node needs to access data in the first computing node, it can send an access request to the first computing node. After receiving the access request, the first computing node allocates access memory based on the access request and provides the physical address of the access memory to the first process. The arrow labeled (1) in FIG7 indicates that the processor of the first computing node provides the physical address of the access memory to the first process. After receiving the physical address, the first process can regard the access memory as its own memory based on the physical address and borrow the access memory. This process is shown by the arrow labeled (2) in FIG7 . Then, the first process can write data to the access memory based on the physical address. This process is shown by the arrow labeled (3) in FIG7 . After the first process completes access to the access memory, it can send a message indicating that the access is completed to the first computing node. This process is shown by the arrow labeled (4) in FIG7 . When the first computing node receives the message indicating that the access is completed sent by the first process, it can perform synchronization operations in the first computing node based on the access result of the first process. For example, when a first process performs an operation indicated by an access operation on a file stored in the access memory, the processor performs a synchronization operation including updating the file stored in the persistent storage medium based on the result of the operation by the first process. The processor may then query whether the access memory is still in use by another process. If the access memory is not in use by another process, the processor may release the access memory.

[0099] Figure 4 is a schematic diagram of a process in which a traditional operating system uses a storage protocol stack to respond to file access according to an embodiment of the present application. As shown in Figure 4, after the first computing node receives the access request, it triggers the operating system to respond through the file system API. After the operating system receives the request triggered by the first computing node, it will pass the request to the virtual file system, the file system, the general block device layer (block device), the disk driver (disk driver) and the disk (disk controller) in sequence according to the storage protocol stack, thereby achieving access to files stored on the hard disk.

[0100] Figure 5 is a schematic diagram of the process of sending data using a network protocol stack in a traditional operating system provided by an embodiment of the present application. As shown in Figure 5, after the first computing node receives an access request indicating network calligraphy, it transmits the data to be sent to the operating system through the socket interface to trigger the operating system to respond. The operating system follows the network protocol stack and constructs the TCP header and TCP segment used for transmission based on the TCP protocol, and adds an IP header to the message and performs routing processing based on the IP protocol. It is then transmitted to the network manager (network management), network card driver (network driver) and network controller (network controller) in sequence, and then the data is transmitted according to the instructions of the network controller.

[0101] Figure 8 is a schematic diagram of the access process using the data access method provided in an embodiment of the present application. When the second process in the first computing node receives an access request from the first process and needs to transfer data to the first process based on the access request, the second process first calls the socket interface, applies for access to the memory through the socket interface, writes the data that needs to be transferred to the first process in the access address, and then provides the physical address of the access memory to the first process through the socket interface. The processor then performs memory management on the access memory. As shown in Figure 8, after the processor receives the read operation from the first process, it reads the access memory through the virtual memory and the memory manager based on the read operation. Similarly, when the first process needs to access a file stored in the first computing node, the first computing node also responds according to similar logic.

[0102] Comparing FIG8 with FIG4 and FIG5, it can be seen that the data access method provided by the embodiment of the present application converts the object of the access business and exposes the ability to access memory to the first process, so that the first process can achieve the access purpose by performing an access operation on the access memory, realizes access access of types such as files and communications, and can achieve no copy and no serialization conversion consumption on the kernel side when responding to the access, and can also decouple the hardware used for access (such as the storage medium used for file access and the network card used for network transmission). Moreover, the method can convert various types of access processes such as storage protocol stack, network protocol stack and memory access process into memory access process in the operating system while the access trigger process such as traditional file reading and writing and network packet sending and receiving remains unchanged, which is equivalent to integrating the storage protocol stack, network protocol stack and memory access process in the traditional operating system, unifying the corresponding access process into access to memory, and being compatible with the access acceleration of access processes such as storage protocol stack, network protocol stack and memory access process, and removing the redundancy caused by the use of protocol stack, which helps the software stack of devices such as traditional disks and network cards to move towards a more efficient software stack, thereby achieving the purpose of performance acceleration and simplifying the operating system.

[0103] In the present application, when the first process is a process running in the second computing node, the data access method provided by the embodiment of the present application can be applied to a distributed scenario. At this time, the data access method provided by the embodiment of the present application can be used between different nodes in the distributed system to achieve access. In this way, different nodes in the distributed system can directly transfer data by accessing the memory, and convert various types of access requirements of the first process into access operations on the memory. Furthermore, it can also support the scale-up increase capability of a stand-alone business process in a distributed system, realize the unification of the programming models of stand-alone and distributed processes, and greatly reduce the difficulty of implementing expansion of the distributed system.

[0104] As can be seen from the above, in the data access method provided in the embodiment of the present application, the processor allocates access memory to the first process, and the first process accesses the access memory, so that the first process can obtain the data indicated by the access request through the access memory, and convert various types of access requirements of the first process into access operations to the access memory. For example, various types of access that require the use of storage protocol stacks and network protocol stacks are converted into access to memory. In this way, when the operating system of the first computing node responds to the access request, it is not necessary to execute the corresponding protocol stack and other software processing according to the specific access requirements of the first process, which simplifies the process of the operating system responding to the access request of the first process, reduces the computing power overhead generated by responding to the access request, and helps to improve the efficiency of responding to the access request and the computing efficiency of the first computing node.

[0105] Moreover, the present application can also use the same mode to respond to the access process of single-node inter-process communication (IPC) and multi-node remote procedure call (RPC), which can realize the integration and normalization of IPC and RPC, thereby simplifying the programming mode of single-machine and distributed processes. At the same time, the access memory is directly accessed through the first process. Regardless of the size, sparseness and density of the data to be accessed, the access is achieved by operating the access memory, which can ensure the access efficiency of different data sizes, sparseness and density. When the access memory manages data according to the page granularity, the access method can also realize page granularity access and is compatible with large block data movement of direct memory access (DMA), which is conducive to improving the efficiency of sparse random access. Among them, RPC is a remote procedure call, which is a method of requesting a service from a remote computer program over a network. It can obtain data in a computer process without understanding the protocol of the underlying network technology. RPC makes it easier to develop applications including network distributed multi-programs. IPC refers to the process of data interaction between processes.

[0106] In addition, the process of allocating access memory for the first process in the present application can be regarded as the process of configuring the access memory as the pass-through memory of the first process, which provides the ability to access memory to processes and other nodes within the node. In this way, through the data access method provided in the embodiment of the present application, the access process of the processor to other nodes can be regarded as access to memory. Compared with the CPU in the current computing node that can only access the memory in the computing node to which it belongs, through the data access method provided in the embodiment of the present application, the computing node can also access the devices in other nodes by accessing the memory, and the access is not limited to the access of the CPU, but also applies to mutual access between other devices. For example, as shown in Figure 9, the CPU, data processing unit (DPU), graphics processing unit (GPU), dynamic random access memory (DRAM) and network card can also access each other.

[0107] It should be noted that the order of the steps of the data access method provided in the embodiments of the present application can be adjusted appropriately, and the number of steps can be increased or decreased accordingly. Any person skilled in the art who can easily conceive of a modified method within the technical scope disclosed in this application should be included in the scope of protection of this application, and therefore will not be described in detail.

[0108] The following describes the virtual device in the embodiment of the present application by way of example.

[0109] The above describes the data access method of the embodiment of the present application. Corresponding to the above method, the embodiment of the present application also provides a data access device. Figure 10 is a structural diagram of a data access device provided by the embodiment of the present application. Based on the following multiple components shown in Figure 10, the data access device shown in Figure 10 can perform all or part of the operations shown in Figure 3 above. It should be understood that the device may include more additional components than the components shown or omit some of the components shown therein, and the embodiment of the present application does not limit this. Optionally, the device is applied to the processor of the first computing node. The first computing node also includes a memory. As shown in Figure 10, the data access device 100 may include:

[0110] The interaction module 101 is configured to obtain an access request of a first process, where the access request indicates an access process other than memory access.

[0111] The allocation module 102 is configured to allocate access memory in the memory based on the access request and provide the physical address of the access memory to the first process.

[0112] The response module 103 is configured to obtain an access operation of the first process to the memory based on the physical address and respond to the access operation.

[0113] In a possible implementation, the first process is a process running on a processor, and / or the first process is a process running in the second computing node.

[0114] In one possible implementation, in response to the first process being a process running in the second computing node, the allocation module 102 is specifically used to: allocate access memory in the memory based on the access request when the first computing node and the second computing node are connected via a communication bus that supports memory semantics.

[0115] In a possible implementation, the first computing node and the second computing node are connected via a communication bus supporting memory semantics, and the response module 103 is specifically configured to respond to the access operation based on the communication bus.

[0116] In a possible implementation, the access request indicates access to a file stored on the first computing node, and / or the access request indicates data transmission with a second process running on the processor.

[0117] In one possible implementation, in response to an access request indicating access to a file stored in the first computing node, the response module 103 is specifically used to: read the file from the persistent storage medium into the access memory, perform the operation indicated by the access operation on the file stored in the access memory, and update the file stored in the persistent storage medium based on the operation result.

[0118] In one possible implementation, in response to an access request indicating data transmission with a second process running on the processor, the response module 103 is specifically configured to: when an access operation indicates receiving target data from the second process, instruct the second process to store the target data in the access memory, and provide the target data to the first process based on the access operation; when the access operation indicates transmitting target data to the second process, store the target data in the access memory, and provide the target data to the second process.

[0119] In one possible implementation, in response to the first process being a process running in the second computing node, the allocation module 102 is specifically configured to: configure the second process and establish a communication connection between the second process and the first process; and provide a physical address to the first process through the second process.

[0120] In a possible implementation, the allocation module 102 is specifically configured to: after receiving the physical address and the query request sent by the first process, send the physical address to the first process.

[0121] In a possible implementation, the allocation module 102 is specifically configured to configure the access rights of the first process to access the memory. The response module 103 is specifically configured to respond to the access operation when the access operation satisfies the access rights.

[0122] In a possible implementation, when the physical address for accessing the memory is provided to multiple processes, the first process has read-only permission to access the memory; when the physical address for accessing the memory is provided to one process, the first process has read and write permission to access the memory.

[0123] In a possible implementation, the access permission is indicated by attribute information of the access request.

[0124] Here, please refer to the description in the previous method embodiment for the detailed working process of the interaction module 101, allocation module 102 and response module 103. For example, the interaction module 101 adopts the implementation method described in step 301 of the method to obtain the access request of the first process. The allocation module 102 adopts the implementation method described in steps 302 and 304 of the method to allocate access memory in the memory based on the access request and provide the physical address of the access memory to the first process. The response module 103 adopts the implementation method described in step 305 of the method to obtain the access operation of the first process to access memory based on the physical address and respond to the access operation. The embodiments of this application will not be repeated here.

[0125] In summary, in the data access device provided in the embodiment of the present application, an access memory is allocated to the first process through an allocation module, and the first process accesses the access memory, so that the first process can obtain the data indicated by the access request through the access memory, and convert various types of access requirements of the first process into access operations to the access memory. For example, various types of access that require the use of a storage protocol stack and a network protocol stack are all converted into access to the memory. In this way, when the operating system of the first computing node responds to the access request, it is not necessary to execute the corresponding protocol stack and other software processing according to the specific access requirements of the first process, which simplifies the process of the operating system responding to the access request of the first process, reduces the computing power overhead generated by responding to the access request, and helps to improve the efficiency of responding to the access request and the computing efficiency of the first computing node.

[0126] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the various components described above can refer to the corresponding contents in the aforementioned method embodiments and will not be repeated here.

[0127] The following is an example of the basic hardware structure involved in the embodiments of the present application.

[0128] An embodiment of the present application provides a computing device. The computing device is used to implement some or all of the functions of the data access method provided in the embodiment of the present application. Figure 11 is a schematic diagram of the structure of a computing device provided in the embodiment of the present application. As shown in Figure 11, the computing device 1100 includes a processor 1101, a memory 1102, a communication port 1103, and a bus 1104. The processor 1101, the memory 1102, and the communication port 1103 are connected to each other via the bus 1104.

[0129] Processor 1101 may include a general-purpose processor and / or a dedicated hardware chip. A general-purpose processor may include: a central processing unit (CPU), a microprocessor or a graphics processing unit (GPU). The CPU is, for example, a single-core processor (single-CPU) or a multi-core processor (multi-CPU). A dedicated hardware chip is a hardware module for high-performance processing. The dedicated hardware chip includes at least one of a digital signal processor, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or a network processor (NP). Processor 1101 may also be an integrated circuit chip with signal processing capabilities. During implementation, some or all of the functions of the data access method of the present application may be completed by the hardware integrated logic circuit in the processor 1101 or instructions in the form of software.

[0130] Memory 1102 is used to store computer programs, including an operating system 1102a and executable code (i.e., program instructions) 1102b. Memory 1102 may be, for example, a read-only memory or other type of static storage device capable of storing static information and instructions, or a random access memory or other type of dynamic storage device capable of storing information and instructions, or an electrically erasable programmable read-only memory, a read-only optical disc or other optical disc storage, an optical disc storage (including a compact disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium, or other magnetic storage device, or any other medium capable of carrying or storing desired executable code in the form of instructions or data structures and accessible by a computer, but not limited to these. For example, memory 1102 is used to store an outbound port queue, etc. Memory 1102 may be independent and connected to processor 1101 via bus 1104. Alternatively, memory 1102 and processor 1101 may be integrated. Memory 1102 can store executable code. When the executable code stored in memory 1102 is executed by processor 1101, processor 1101 is used to perform some or all of the functions of the data access method provided in the embodiments of the present application. For the implementation of the process executed by processor 1101, please refer to the relevant description of the aforementioned embodiments. Memory 1102 may also include software modules and data required for other running processes, such as an operating system.

[0131] Communication port 1103 uses a transceiver module, such as, but not limited to, a transceiver, to communicate with other devices or communication networks. For example, communication port 1103 can be any one or a combination of the following devices: a network interface (such as an Ethernet interface), a wireless network card, or other device with network access capabilities.

[0132] Bus 1104 is any type of communication bus used to interconnect the internal components of a computing device (e.g., memory 1102, processor 1101, communication port 1103). For example, a system bus is provided. The embodiments of this application illustrate the interconnection of the aforementioned components within a computing device via bus 1104. Alternatively, the aforementioned components within computing device 1100 may be communicatively connected to each other using other connection methods besides bus 1104. For example, the aforementioned components within computing device 1100 may be interconnected via an internal logical interface.

[0133] It should be noted that the above-mentioned multiple devices can be respectively arranged on independent chips, or at least partially or completely arranged on the same chip. Whether each device is independently arranged on different chips or integrated on one or more chips often depends on the needs of product design. The embodiments of the present application do not limit the specific implementation form of the above-mentioned devices. The descriptions of the processes corresponding to the above-mentioned figures have different focuses. For parts that are not described in detail in a certain process, please refer to the relevant descriptions of other processes.

[0134] In the above embodiments, all or part of the embodiments may be implemented using software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product providing a program development platform includes one or more computer instructions that, when loaded and executed on a computing device, fully or partially implement the functions of the data access method provided in the embodiments of the present application.

[0135] Furthermore, computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium stores computer program instructions that provide a program development platform.

[0136] Embodiments of the present application also provide a computing device cluster. The computing device cluster includes at least one computing device. The computing device can be a server, such as a central server, an edge server, or a local server in a local data center. In some embodiments, the computing device can also be a terminal device such as a desktop computer, a laptop computer, or a smartphone.

[0137] Optionally, the structure of at least one computing device included in the computing device cluster may refer to the computing device 1100 shown in Figure 11. The memory 1102 in one or more computing devices 1100 in the computing device cluster may store the same instructions for executing the data access method.

[0138] In some possible implementations, the memory 1102 of one or more computing devices 1100 in the computing device cluster may also store partial instructions for executing the data access method. In other words, the combination of one or more computing devices 1100 can jointly execute the instructions for executing the data access method.

[0139] In some possible implementations, one or more computing devices in a computing device cluster may be connected via a network. The network may be a wide area network (WAN) or a local area network (LAN), etc. FIG12 shows a possible implementation. As shown in FIG12 , two computing devices 1200A and 1200B are connected via a network. Specifically, the network is connected via a communication port in each computing device. In this type of possible implementation, computing devices 1200A and 1200B include a bus 1202, a processor 1204, a memory 1206, and a communication port 1208. The memory 1206 in computing device 1200A stores instructions for executing the functions of a first computing node. At the same time, the memory 1206 in computing device 1200B stores instructions for executing the functions of a second computing node.

[0140] It should be understood that the functions of computing device 1200A shown in FIG12 may also be performed by multiple computing devices 1200. Similarly, the functions of computing device 1200B may also be performed by multiple computing devices 1200. Furthermore, the deployment method of the modules for implementing the data access method in the computing devices may also be adjusted according to application requirements.

[0141] An embodiment of the present application also provides a computer-readable storage medium, which is a non-volatile computer-readable storage medium. The computer-readable storage medium includes program instructions. When the program instructions are executed on a computing device, the computing device implements the data access method provided in the embodiment of the present application.

[0142] The present application also provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to implement the data access method provided in the present application. In one implementation, the computer program product is an operating system running on a processor of a computer device.

[0143] Those skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware, or by a program to instruct the relevant hardware, and the program may be stored in a computer-readable storage medium, which may be a read-only memory, a disk, or an optical disk, etc.

[0144] It should be noted that the information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, storage, display, etc.), and signals involved in this application are all authorized by the user or fully authorized by all parties, and the collection, use, and processing of relevant data must comply with the relevant laws, regulations, and standards of the relevant countries and regions. For example, the raw data and executable code involved in this application were obtained with full authorization.

[0145] In the embodiments of the present application, the terms "first," "second," and "third" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. The term "at least one" refers to one or more, and the term "plurality" refers to two or more, unless otherwise expressly limited.

[0146] In this application, the term "and / or" simply describes an association between related objects, indicating that three possible relationships exist. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in this document generally indicates that the related objects are in an "or" relationship.

[0147] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the concepts and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A data access method, characterized in that, The method is applied to the processor of a first computing node, and the first computing node further includes a memory. The method includes: The processor obtains an access request of a first process, and the access request indicates an access process other than memory access; Based on the access request, the processor allocates access memory in the memory and provides the physical address of the access memory to the first process; The processor obtains the access operation of the first process on the access memory based on the physical address and responds to the access operation.

2. The method according to claim 1, characterized in that, The first process is a process running on the processor, and / or the first process is a process running in a second computing node.

3. The method according to claim 2, wherein In response to the first process being a process running in a second computing node, the processor allocates access memory in the memory based on the access request, including: When the first computing node and the second computing node are connected by a communication bus supporting memory semantics, the processor allocates access memory in the memory based on the access request.

4. The method according to claim 2 or 3, characterized in that, The first computing node and the second computing node are connected by a communication bus supporting memory semantics. The processor responds to the access operation, including: The processor responds to the access operation based on the communication bus.

5. The method according to any one of claims 1 to 4, characterized in that, The access request indicates accessing a file stored in the first computing node, and / or the access request indicates transmitting data with a second process running on the processor.

6. The method according to claim 5, wherein In response to the access request indicating accessing a file stored in the first computing node, the processor responds to the access operation, including: The processor reads the file from a persistent storage medium into the access memory, performs the operation indicated by the access operation on the file stored in the access memory, and updates the file stored in the persistent storage medium based on the operation result.

7. The method according to claim 5, characterized in that, In response to the access request indicating transmitting data with a second process running on the processor, the processor responds to the access operation, including: When the access operation indicates receiving target data from the second process, the processor instructs the second process to store the target data in the access memory and provides the target data to the first process based on the access operation; When the access operation indicates transmitting target data to the second process, the processor stores the target data in the access memory and provides the target data to the second process.

8. The method according to any one of claims 1 to 7, characterized in that In response to the first process being a process running in a second computing node, before the processor provides the physical address of the access memory to the first process, the method further includes: The processor configures a second process and establishes a communication connection between the second process and the first process; The processor provides the physical address of the access memory to the first process, including: The processor provides the physical address to the first process through the second process.

9. The method according to claim 8, wherein The second process provides the physical address to the first process, including: After receiving the physical address and the inquiry request sent by the first process, the second process sends the physical address to the first process.

10. The method according to any one of claims 1 to 9, characterized in that, After the processor allocates access memory in the memory, the method further includes: The processor configures the access permission of the first process to the access memory; The processor responds to the access operation, including: When the access operation meets the access permission, the processor responds to the access operation.

11. The method according to claim 10, wherein: When the physical address of the access memory is provided to multiple processes, the first process has read-only permission to the access memory; When the physical address of the access memory is provided to one process, the first process has read-write permission to the access memory.

12. The method according to claim 10, wherein The access permission is indicated by the attribute information of the access request.

13. A data access device, characterized in that, The device is applied to the processor of the first computing node, and the first computing node further includes a memory. The device includes: An interaction module, configured to obtain an access request of a first process, where the access request indicates an access process other than memory access; An allocation module, configured to allocate access memory in the memory based on the access request, and provide the physical address of the access memory to the first process; A response module, configured to obtain an access operation of the first process to the access memory based on the physical address, and respond to the access operation.

14. The device according to claim 13, characterized in that The first process is a process running on the processor, and / or the first process is a process running in a second computing node.

15. The device according to claim 14, characterized in that, In response to the first process being a process running in a second computing node, the allocation module is specifically configured to: When the first computing node and the second computing node are connected by a communication bus supporting memory semantics, allocate access memory in the memory based on the access request.

16. The device according to claim 14 or 15, characterized in that, The first computing node and the second computing node are connected by a communication bus supporting memory semantics. The response module is specifically configured to: Respond to the access operation based on the communication bus.

17. The device according to any one of claims 13 to 16, characterized in that, The access request indicates accessing a file stored in the first computing node, and / or the access request indicates transmitting data with a second process running on the processor.

18. The device according to claim 17, characterized in that, In response to the access request indicating accessing a file stored in the first computing node, the response module is specifically configured to: Read the file from a persistent storage medium into the access memory, perform an operation indicated by the access operation on the file stored in the access memory, and update the file stored in the persistent storage medium based on the operation result.

19. The device according to claim 17, characterized in that, In response to the access request indicating transmitting data with a second process running on the processor, the response module is specifically configured to: When the access operation indicates receiving target data from the second process, instruct the second process to store the target data in the access memory, and provide the target data to the first process based on the access operation; When the access operation indicates transferring target data to the second process, store the target data in the access memory and provide the target data to the second process.

20. The device according to any one of claims 13 to 19, characterized in that In response to the first process being a process running in the second computing node, the allocation module is specifically configured to: Configure the second process and establish a communication connection between the second process and the first process; Provide the physical address to the first process through the second process.

21. The device according to claim 20, characterized in that, The allocation module is specifically configured to: After receiving the physical address and receiving an inquiry request sent by the first process, send the physical address to the first process.

22. The device according to any one of claims 13 to 21, characterized in that, The allocation module is specifically configured to: Configure the access permission of the first process to the access memory; The response module is specifically configured to: Respond to the access operation when the access operation meets the access permission.

23. The apparatus according to claim 22, wherein: When the physical address of the access memory is provided to multiple processes, the first process has read-only permission to the access memory; When the physical address of the access memory is provided to one process, the first process has read-write permission to the access memory.

24. The device according to claim 22, characterized in that, The access permission is indicated by the attribute information of the access request.

25. A computing device, characterized in that, Comprising a processor and a memory, wherein program instructions are stored in the memory, and the processor runs the program instructions to enable the computing device to execute the method according to any one of claims 1 to 12.

26. A computer-readable storage medium, characterized in that, Comprising program instructions, when the program instructions run on a computing device, enabling the computing device to execute the method according to any one of claims 1 to 12.

27. A computer program product comprising instructions, characterized in that, When the instruction runs on a computer device, enabling the computer device to execute the method according to any one of claims 1 to 12.

28. The computer program product according to claim 27, characterized in that, The computer program product is an operating system running in the processor of the computer device.

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