Electronic device including antenna

Abstract

In embodiments, an electronic device is provided. The electronic device may comprise: a plurality of antennas including a first antenna and a second antenna; a radio frequency (RF) transceiver; a first radio frequency front end (RFFE) module connected to the RF transceiver and configured to transmit or receive a signal; a second RFFE module connected to the RF transceiver and configured to receive a signal; a first switching circuit connected to the first RFFE module; and a second switching circuit connected to the second RFFE module. The first switching circuit may be configured to electrically connect the first RFFE module selectively to the first antenna in a first connection mode or to the second antenna through the second switching circuit in a second connection mode. The second switching circuit may be configured to electrically connect the second RFFE module selectively to the second antenna in the first connection mode or to the first antenna through the first switching circuit in the second connection mode.

Description

Electronic device including an antenna

[0001] The descriptions below relate to electronic devices that include antennas.

[0002] An electronic device may include a radio frequency front end (RFFE) module for transmitting or receiving signals. The electronic device may transmit signals via an antenna connected to the RFFE module.

[0003] The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above is applicable as prior art related to the present disclosure.

[0004] In embodiments, an electronic device is provided. The electronic device may include a plurality of antennas including a first antenna and a second antenna, a radio frequency (RF) transceiver, a first radio frequency front end (RFFE) module connected to the RF transceiver and configured to transmit or receive a signal, a second RFFE module connected to the RF transceiver and configured to receive a signal, a first switching circuit connected to the first RFFE module, and a second switching circuit connected to the second RFFE module. The first switching circuit may be configured to selectively electrically connect the first RFFE module to the first antenna in a first connection mode or to the second antenna via the second switching circuit in a second connection mode. The second switching circuit may be configured to selectively electrically connect the second RFFE module to the second antenna in the first connection mode or to the first antenna via the first switching circuit in the second connection mode. Within the first switching circuit, an insertion loss of a first sub-path switch configured to electrically connect the first RFFE module and the second switching circuit in the second connection mode may be smaller than an insertion loss of a first main path switch configured to electrically connect the first RFFE module and the first antenna in the first connection mode. Within the second switching circuit, an insertion loss of a second sub-path switch configured to electrically connect the second RFFE module and the first switching circuit in the second connection mode may be smaller than an insertion loss of a second main path switch configured to connect the second RFFE module and the second antenna in the first connection mode.

[0005] In embodiments, a radio frequency (RF) switch is provided. The RF switch may include a first port, a second port, a third port, a fourth port, a first path switch for electrically connecting the first port and the third port, a second path switch for electrically connecting the first port and the fourth port, a third path switch for electrically connecting the second port and the third port, and a fourth path switch for electrically connecting the second port and the fourth port. An insertion loss of the second path switch may be less than an insertion loss of the first path switch. A value of twice the insertion loss of the second path switch in decibel units may be within a critical range based on the insertion loss of the first path switch.

[0006] Figure 1 is a block diagram of an electronic device within a network environment.

[0007] Figure 2 shows an example of an electronic device for antenna switching diversity (AS-DIV).

[0008] Figures 3a and 3b illustrate examples of electronic devices for antenna switching diversity utilizing conductive portions of a metal frame.

[0009] Figures 4a, 4b, and 4c illustrate examples of switching circuits for antenna switching diversity.

[0010] Figure 5 shows an example of a path switch of a switching circuit.

[0011] Figure 6 shows an example of a turned-on path switch.

[0012] Figures 7a and 7b show examples of turned-off path switches.

[0013] Figure 8 shows examples of transistors of two switching circuits on a signal path.

[0014] Figure 9 is a drawing for explaining the RF stress direction.

[0015] Figures 10a and 10b show examples of transistors of two switching circuits on a signal path along the RF stress direction.

[0016] The terms used in this disclosure are used only to describe specific embodiments and may not be intended to limit the scope of other embodiments. The singular expression may include plural expressions unless the context clearly indicates otherwise. Terms used herein, including technical or scientific terms, may have the same meaning as commonly understood by those of ordinary skill in the art described in this disclosure. Terms defined in general dictionaries among the terms used in this disclosure may be interpreted as having the same or similar meaning in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined in this disclosure. In some cases, even if a term is defined in this disclosure, it cannot be interpreted to exclude embodiments of the present disclosure.

[0017] The various embodiments of the present disclosure described below illustrate a hardware-based approach as an example. However, since the various embodiments of the present disclosure include techniques utilizing both hardware and software, the various embodiments of the present disclosure do not exclude a software-based approach.

[0018] In the following description, terms referring to signals (e.g., signal, information, message, or signaling), terms referring to data types (e.g., list, set, or subset), terms for operational states (e.g., step, operation, or procedure), terms referring to data (e.g., packet, user stream, information, bit, symbol, or codeword), terms referring to resources (e.g., symbol, slot, subframe, radio frame, subcarrier, resource element (RE), resource block (RB), bandwidth part (BWP), or occasion), terms referring to channels, terms referring to network entities, or terms referring to components of devices, etc., are examples for convenience of description. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may be used.

[0019] Terms used in the following description to refer to parts of electronic devices (e.g., communication module, wireless communication module, substrate, PCB (printed circuit board), FPCB (flexible PCB), module, antenna, antenna element, circuit, processor, chip, component, or device), terms used to refer to RF-related parts (FEM (front end module), PAM (power amplifier module), FEMid (FEM including duplexer), PAMid (power amplifier module including duplexer), LPAMid (low noise amplifier PAM including duplexer), or RFFE (radio frequency front end)), or RFIC (radio frequency integrated circuit)), terms used to refer to the shape of parts (e.g., structure, structure, support, contact, or protrusion), terms used to refer to connections between structures (e.g., connection, contact, support, contact structure, conductive member, or assembly), or terms used to refer to circuits (e.g., PCB, FPCB, signal line, feeding line, data line, RF signal line, antenna line, RF path, RF modules, RF circuits, splitters, dividers, couplers, or combiners are examples for convenience of explanation. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may be used. In addition, terms such as '... part', '... device', '... object', '... body', etc. used below may mean at least one shape structure or a unit that processes a function.

[0020] In addition, in the present disclosure, expressions such as "more than" or "less than" may be used to determine whether a specific condition is satisfied or fulfilled, but this is merely a description for expressing an example and does not exclude descriptions such as "more than" or "less than." A condition described as "more than" may be replaced with "more than," a condition described as "less than" may be replaced with "less than," and a condition described as "more than and less than" may be replaced with "more than and less than." In addition, hereinafter, "A" to "B" mean at least one of elements from A (including A) to B (including B). hereinafter, "C" and / or "D" mean at least one of "C" or "D," that is, including {"C", "D", "C" and "D"}.

[0021] Figure 1 is a block diagram of an electronic device within a network environment.

[0022] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) via a first network (198) (e.g., a short-range wireless communication network), or may communicate with at least one of an electronic device (104) or a server (108) via a second network (199) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (101) may communicate with the electronic device (104) via the server (108). According to one embodiment, the electronic device (101) may include a processor (120), a memory (130), an input module (150), an audio output module (155), a display module (160), an audio module (170), a sensor module (176), an interface (177), a connection terminal (178), a haptic module (179), a camera module (180), a power management module (188), a battery (189), a communication module (190), a subscriber identification module (196), or an antenna module (197). In some embodiments, the electronic device (101) may omit at least one of these components (e.g., the connection terminal (178)), or may have one or more other components added. In some embodiments, some of these components (e.g., the sensor module (176), the camera module (180), or the antenna module (197)) may be integrated into one component (e.g., the display module (160)).

[0023] The processor (120) may, for example, execute software (e.g., a program (140)) to control at least one other component (e.g., a hardware or software component) of the electronic device (101) connected to the processor (120) and perform various data processing or calculations. According to one embodiment, as at least a part of the data processing or calculation, the processor (120) may store a command or data received from another component (e.g., a sensor module (176) or a communication module (190)) in a volatile memory (132), process the command or data stored in the volatile memory (132), and store the resulting data in a non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., a central processing unit or an application processor) or a secondary processor (123) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor)) that can operate independently or together therewith. For example, if the electronic device (101) includes a main processor (121) and a secondary processor (123), the secondary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a specified function. The secondary processor (123) may be implemented separately from the main processor (121) or as a part thereof.

[0024] The auxiliary processor (123) may control at least a portion of functions or states associated with at least one component (e.g., a display module (160), a sensor module (176), or a communication module (190)) of the electronic device (101), for example, on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (123) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (180) or a communication module (190)). In one embodiment, the auxiliary processor (123) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or can be performed through a separate server (e.g., server (108)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include multiple artificial neural network layers.The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to, or alternatively to, a hardware structure, an artificial intelligence model may include a software structure.

[0025] The memory (130) can store various data used by at least one component (e.g., processor (120) or sensor module (176)) of the electronic device (101). The data can include, for example, software (e.g., program (140)) and input data or output data for commands related thereto. The memory (130) can include volatile memory (132) or non-volatile memory (134).

[0026] The program (140) may be stored as software in the memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0027] The input module (150) can receive commands or data to be used in a component of the electronic device (101) (e.g., a processor (120)) from an external source (e.g., a user) of the electronic device (101). The input module (150) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0028] The audio output module (155) can output audio signals to the outside of the electronic device (101). The audio output module (155) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. In one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.

[0029] The display module (160) can visually provide information to an external party (e.g., a user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling the device. In one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.

[0030] The audio module (170) can convert sound into an electrical signal, or vice versa, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150), output sound through the sound output module (155), or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (101).

[0031] The sensor module (176) can detect the operating status (e.g., power or temperature) of the electronic device (101) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (176) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0032] The interface (177) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (101) with an external electronic device (e.g., the electronic device (102)). In one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0033] The connection terminal (178) may include a connector through which the electronic device (101) may be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0034] A haptic module (179) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. In one embodiment, the haptic module (179) can include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

[0035] The camera module (180) can capture still images and videos. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0036] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented, for example, as at least a part of a power management integrated circuit (PMIC).

[0037] A battery (189) may power at least one component of the electronic device (101). In one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0038] The communication module (190) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may operate independently from the processor (120) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (194) (e.g., a local area network (LAN) communication module, or a power line communication module). Among these communication modules, the corresponding communication module can communicate with an external electronic device (104) via a first network (198) (e.g., a short-range communication network such as Bluetooth, wireless fidelity (WiFi) direct, or infrared data association (IrDA)) or a second network (199) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules can be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can verify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) by using subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (196).

[0039] The wireless communication module (192) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimizing terminal power and connecting multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (192) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (192) can support various technologies for securing performance in a high-frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), an external electronic device (e.g., the electronic device (104)), or a network system (e.g., the second network (199)). According to one embodiment, the wireless communication module (192) can support a peak data rate (e.g., 20 Gbps or more) for eMBB realization, a loss coverage (e.g., 164 dB (decibel) or less) for mMTC realization, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL) each, or 1 ms or less for round trip) for URLLC realization.

[0040] The antenna module (197) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). In one embodiment, the antenna module (197) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). In one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (198) or the second network (199), may be selected from the plurality of antennas by, for example, the communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device through the selected at least one antenna. In some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (197).

[0041] According to various embodiments, the antenna module (197) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high-frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high-frequency band.

[0042] At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).

[0043] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) via a server (108) connected to a second network (199). Each of the external electronic devices (102 or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations executed in the electronic device (101) may be executed in one or more of the external electronic devices (102, 104, or 108). For example, when the electronic device (101) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (101) may, instead of or in addition to executing the function or service itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (101) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In another embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server using machine learning and / or a neural network. According to one embodiment, the external electronic device (104) or the server (108) may be included in the second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0044] As communication technology advances, electronic devices (e.g., electronic device (101)) may include an RFFE module that supports multiple RF frequency bands. For example, the electronic device (101) may transmit RF signals in two or more different frequency bands. While the number of supported frequency bands increases, antenna efficiency may deteriorate due to spatial limitations of the electronic device (101). Furthermore, it may be difficult to continuously maintain antenna performance due to the user's grip or movement of the electronic device (101). To overcome the performance limitations that can be achieved with a single antenna, antenna switching diversity (AS-DIV) technology may be utilized. Antenna switching diversity technology may include selecting a transmitting antenna so that an electronic device (101) including two or more antennas can recognize electric field conditions and secure maximum performance. For example, the electronic device (101) may receive signals through antennas and select a transmitting antenna by analyzing the quality and / or intensity of the received signals.

[0045] FIG. 2 illustrates an example of an electronic device (e.g., electronic device (101)) for antenna switching diversity (AS-DIV).

[0046] Referring to FIG. 2, the electronic device (101) may include a processor (210), an RF transceiver (220), a first RFFE (radio frequency front end) module (231), a second RFFE module (232), a first antenna (251), and a second antenna (252). The electronic device (101) may include the processor (210). The processor (210) may include, for example, at least one of an AP (application processor) (e.g., the main processor (121) of FIG. 1)) or a CP (communication processor) (e.g., the auxiliary processor (123) of FIG. 1). For example, the processor (210) may include an AP and a CP. For example, the processor (210) may include an AP. For example, the processor (210) may include a CP. The processor (210) can control the RF transceiver (220) via a control interface (e.g., a control signal (211)). For example, the processor (210) can generate a baseband signal. The processor (210) can control the RF transceiver (220) to process the generated baseband signal. The processor (210) can transmit a signal (213a) (e.g., analog data or digital data). For example, the signal (213a) can be a communication signal to be transmitted to an external electronic device (e.g., a base station, a satellite, a terminal, an electronic device (102), an electronic device (104), or a server (108)). The processor (210) can control the RF transceiver (220) to transmit the signal via an antenna (e.g., a first antenna (251)). The processor (210) can receive a signal (213b) (e.g., analog data or digital data).For example, the signal (213b) may be a signal received from an external electronic device (e.g., a base station, a satellite, a terminal, an electronic device (102), an electronic device (104), or a server (108)) via an antenna (e.g., a first antenna (251) or a second antenna (252)). The processor (210) may control the RF transceiver (220) so that the signal (213b) is received.

[0047] The electronic device (101) may include an RF transceiver (220). For example, the RF transceiver (220) may be implemented as a single chip (e.g., an RFIC chip) or as part of a single package. The RF transceiver (220) may include components for processing a transmission signal. For example, the RF transceiver (220) may provide an RF signal (e.g., a transmission signal (221a)) to a first RFFE module (231). The RF transceiver (220) may include a digital to analog converter (DAC) for converting a digital signal to an analog signal. The RF transceiver (220) may include a mixer and an oscillator (e.g., a local oscillator (LO)) for up-conversion. The RF transceiver (220) may convert a baseband signal generated by the processor (210) into an RF signal. The RF transceiver (220) may include components for processing a received signal. For example, the RF transceiver (220) may receive an RF signal (e.g., a first received signal (221b) or a second received signal (223)) from a second RFFE module (232). The RF transceiver (220) may include an analog to digital converter (ADC) for converting an analog signal into a digital signal. The RF transceiver (220) may include a mixer and an oscillator for down-conversion. The RF transceiver (220) may convert an RF signal received from an antenna (e.g., a first antenna (251) or a second antenna (252)) into a baseband signal so that the RF signal can be processed by the processor (210). The RF transceiver (220) may include one or more transmit ports. The RF transceiver (220) may include one or more receiving ports.Although not shown in FIG. 2, the RF transceiver (220) may receive a feedback signal provided from a coupler connected to an antenna (e.g., a first antenna (251) or a second antenna (252)). For example, the RF transceiver (220) may include a feedback receive port (FBRX) for the feedback signal. According to one embodiment, the RF transceiver (220) may control at least a portion of the first RFFE module (231) or the second RFFE module (232) via a control interface (e.g., a mobile industry processor interface (MIPI)).

[0048] The electronic device (101) may include RFFE modules (e.g., a first RFFE module (231) and a second RFFE module (232)). Wireless communication systems are evolving to support higher data rates to meet the ever-increasing traffic demands of wireless data. For example, components of a plurality of transmit (TX) / receive (RX) modules, transmit modules, or receive modules connected to an RF transceiver (220) may be arranged to support various frequency combinations. According to one embodiment, the first RFFE module (231) may represent a module including a power amplifier (PA) for an RF signal (e.g., a transmit signal (221a)) within the RFFE. For example, the first RFFE module (231) may be a PAMid including a power amplifier and RF components (e.g., a duplexer, a filter, or a switch) for transmitting a signal. The first RFFE module (231) may be configured to transmit a transmission signal (221a) from an RF transceiver (220) via a first antenna (251) or a second antenna (252). The transmission signal (221) from the RF transceiver (220) may be amplified by a power amplifier. The amplified transmission signal may be radiated into the air via the first antenna (251) or the second antenna (252). According to one embodiment, the first RFFE module (231) may include a module (e.g., an LPAMid) including a low noise amplifier (LNA) for an RF signal (e.g., a first receive signal (221b)) in addition to the power amplifier. For example, the first RFFE module (231) may include RF components (e.g., a duplexer, a filter, or a switch) for receiving signal processing. The first RFFE module (231) can provide a signal (e.g., a first reception signal (221b)) received through the first antenna (251) or the second antenna (252) to the RF transceiver (220).According to one embodiment, the second RFFE module (232) may represent a module within the RFFE that includes an LNA for an RF signal (e.g., a second received signal (223)). For example, the second RFFE module (232) may be a receiving module that includes RF components (e.g., a duplexer, a filter, or a switch) for receiving signal processing. The second RFFE module (232) may be configured to transmit a signal received via the first antenna (251) or the second antenna (252) to the RF transceiver (220).

[0049] Antenna switching diversity technology is a technology that adaptively selects an antenna for transmitting a signal among a plurality of antennas (e.g., a first antenna (251) or a second antenna (252)). For example, the electronic device (101) may change the antenna for transmitting a signal due to environmental factors such as an electric field condition or a user's grip condition. The electronic device (101) may include a first switching circuit (241) and a second switching circuit (242) for the antenna switching diversity technology. The first switching circuit (241) may be connected to a first RFFE module (231). The first switching circuit (241) may receive a transmission signal (e.g., a transmission signal (221a)) from the first RFFE module (231) or transmit a reception signal (e.g., a first reception signal (221b)) to the first RFFE module (231). The second switching circuit (242) may be connected to the second RFFE module (232). The second switching circuit (242) may transmit a received signal (e.g., the second received signal (223)) to the second RFFE module (232). In one embodiment, the first switching circuit (241) and the second switching circuit (242) of the electronic device (101) may operate in a first connection mode or a second connection mode.

[0050] According to one embodiment, in the first connection mode, the first switching circuit (241) may be configured to electrically connect the first RFFE module (231) with the first antenna (251). In the first connection mode, the second switching circuit (242) may be configured to electrically connect the second RFFE module (232) with the second antenna (252). While the first RFFE module (231) is electrically connected with the first antenna (251), the second RFFE module (232) may be electrically connected with the second antenna (252). For example, the electronic device (101) may transmit a transmission signal through the first antenna (251) in the first connection mode. For example, the electronic device (101) may receive a reception signal through the first antenna (251) in the first connection mode. For example, the electronic device (101) can receive a reception signal through the second antenna (252) in the first connection mode.

[0051] According to one embodiment, in the second connection mode, the first switching circuit (241) may be configured to electrically connect the first RFFE module (231) to the second antenna (252). The first switching circuit (241) may electrically connect the first RFFE module (231) to the second switching circuit (242) connected to the second antenna (252). For example, the first switching circuit (241) may be configured to electrically connect the first RFFE module (231) and the second antenna (252) via the second switching circuit (242). In the second connection mode, the second switching circuit (242) may be configured to electrically connect the second RFFE module (232) to the first antenna (251). The second switching circuit (242) may electrically connect the second RFFE module (232) to the first switching circuit (241) connected to the first antenna (251). For example, the second switching circuit (242) may be configured to electrically connect the second RFFE module (232) and the first antenna (251) via the first switching circuit (241). While the first RFFE module (231) is electrically connected to the second antenna (252), the second RFFE module (232) may be electrically connected to the first antenna (251). For example, the electronic device (101) may transmit a transmission signal through the second antenna (252) in the second connection mode. For example, the electronic device (101) may receive a reception signal through the second antenna (252) in the second connection mode. For example, the electronic device (101) may receive a reception signal through the first antenna (251) in the first connection mode.

[0052] According to one embodiment, the first switching circuit (241) may be configured to selectively electrically connect the first RFFE module (231) to the first antenna (251) in the first connection mode or to electrically connect the first antenna (252) via the second switching circuit (242) in the second connection mode. The first antenna (251) may be electrically connected to the first switching circuit (241) via the first antenna path (261). The second antenna (252) may be electrically connected to the first switching circuit (241) via the second antenna path (262) and the second switching circuit (242). For example, the first switching circuit (241) may include a multiple pole multiple throw (MPMT) switch. As an example, the first switching circuit (241) may include a double pole double throw (DPDT) switch. For example, the first switching circuit (241) may include a first pole (241p), a second pole (241q), a first throw (241a), and a second throw (241b). The first pole (241p) may be connected to the first RFFE module (231) via a transmit / receive path (236). The second pole (241q) may be connected to the second switching circuit (242) (e.g., the second throw (242b) of the second switching circuit (242)) via a second wiring (272). The first throw (241a) may be electrically connected to the first antenna (251) via a first antenna path (261). The second throw (241b) can be connected to the second switching circuit (242) (e.g., the second pole (242q) of the second switching circuit (242)) through the first wiring (271).

[0053] According to one embodiment, the second switching circuit (242) may be configured to selectively electrically connect the second RFFE module (232) to the second antenna (252) in the first connection mode or to electrically connect the first antenna (251) via the first switching circuit (241) in the second connection mode. The first antenna (251) may be connected to the second switching circuit (242) via the first antenna path (261) and the first switching circuit (241). The second antenna (252) may be electrically connected to the second switching circuit (242) via the second antenna path (262). For example, the second switching circuit (242) may include a multiple pole multiple throw (MPMT) switch. As an example, the second switching circuit (242) may include a DPDT switch.

[0054] For example, the second switching circuit (242) may include a first pole (242p), a second pole (242q), a first throw (242a), and a second throw (242b). The first pole (242p) may be connected to the second RFFE module (232) via a receiving path (237). The second pole (242q) may be connected to the first switching circuit (241) (e.g., the second throw (241b) of the first switching circuit (241)) via a first wiring (271). The first throw (242a) may be electrically connected to the second antenna (252) via a second antenna path (262). The second throw (242b) can be connected to the first switching circuit (241) (e.g., the first pole (241q) of the first switching circuit (241)) through the second wiring (272).

[0055] Due to the nature of RF signals, loss may occur due to wiring. To reduce the loss of the feed line, the RFFE module may be placed close to the antenna. For example, the first RFFE module (231) may be placed close to the first antenna (251). For example, the second RFFE module (232) may be placed close to the second antenna (252). If the first switching circuit (241) and the second switching circuit (242) are implemented as a single switch (e.g., a DPDT switch), the positions of the switch and the second RFFE module (232) may be restricted due to the position of the first RFFE module (231). Accordingly, if the wiring length from the second RFFE module (232) to the second antenna (252) becomes long, the loss of the feed line may increase. Accordingly, the electronic device (101) may separately include a first switching circuit (241) for the first RFFE module (231) and a second switching circuit (242) for the second RFFE module (232). Since the first switching circuit (241) connecting the first RFFE module (231) and antennas (e.g., the first antenna (251) or the second antenna (252)) and the second switching circuit (242) connecting the second RFFE module (232) and antennas (e.g., the first antenna (251) or the second antenna (252)) are implemented separately, the second RFFE module (232) may be arranged closer to the second antenna (252). Due to the low path loss, in the first connection mode, the transmission and reception performance according to the first antenna (251) and the reception performance according to the second antenna (252) may be improved.

[0056] In the present disclosure, in order to explain the operations of an electronic device (101) (e.g., a processor (210) or an RF transceiver (220)) according to antenna switching diversity, a first connection mode and a second connection mode may be defined. For example, the first connection mode may indicate a state in which a first RFFE module (231) of the electronic device (101) is electrically connected to a first antenna (251) through a first switching circuit (241) and a second RFFE module (232) of the electronic device (101) is electrically connected to a second antenna (252) through a second switching circuit (242). In the aspect that the first RFFE module (231) is positioned closer to the first antenna (251) than the second antenna (252) and the second RFFE module (232) is positioned closer to the second antenna (252) than the first antenna (252), the first connection mode may be referred to as a default mode, a preferred mode, a default state, a preferred state, an initial state, an initial mode, a basic mode, a primary path mode, a preferred configuration, a primary path configuration, and / or equivalent technical terms. For example, the second connection mode may represent a state in which the first RFFE module (231) of the electronic device (101) is electrically connected to the second antenna (252) through the first switching circuit (241) and the second switching circuit (242), and the second RFFE module (232) of the electronic device (101) is electrically connected to the first antenna (251) through the second switching circuit (242) and the first switching circuit (241). In terms of diversity operation, the second connection mode may be referred to as a diversity mode, a switching mode, a non-preferred mode, a non-preferred state, a switching state, a change state, a change mode, a diversity state, a sub-path mode, a non-preferred configuration, a sub-path configuration, and / or equivalent technical terms therefor.

[0057] The electronic device (101) (e.g., processor (210) or RF transceiver (220)) can control the first switching circuit (241) and the second switching circuit (242). In addition, the electronic device (101) (e.g., processor (210) or RF transceiver (220)) can control the first switching circuit (241) and the second switching circuit (242). For example, the processor (210) can control the first switching circuit (241) to electrically connect the first RFFE module (231) to the first antenna (251) in the first connection mode. The processor (210) can control the second switching circuit (242) to electrically connect the second RFFE module (232) to the second antenna (252) in the first connection mode. Hereinafter, the connection operation of the first switching circuit (241) or the connection operation of the second switching circuit (242) may be understood as control by the processor (210) and / or the RF transceiver (220). The second connection mode represents a state in which the first RFFE module (231) of the electronic device (101) is electrically connected to the second antenna (252) through the first switching circuit (241) and the second switching circuit (242), and the second RFFE module (232) of the electronic device (101) is electrically connected to the first antenna (251) through the first switching circuit (241) and the second switching circuit (242). For example, the processor (210) may control the first switching circuit (241) and the second switching circuit (242) to electrically connect the first RFFE module (231) to the second antenna (252) in the second connection mode. The processor (210) can control the first switching circuit (241) and the second switching circuit (242) to electrically connect the second RFFE module (232) with the first antenna (251) in the second connection mode.Hereinafter, the connection operation of the first switching circuit (241) or the connection operation of the second switching circuit (242) can be understood as control by the processor (210) and / or the RF transceiver (220).

[0058] Hereinafter, in describing embodiments of the present disclosure, the first RFFE module (231) is described as including a transmit / receive module for transmitting and receiving signal processing, and the second RFFE module (232) is described as including a receive module for receiving signal processing, but embodiments of the present disclosure are not limited thereto. The description of the modules is merely exemplary, and the type of the modules is not limited. If the switching circuits connected to the antennas for antenna switching diversity are connected to a module different from the module including the transmit path, it can be understood as one embodiment of the present disclosure. For example, the first RFFE module (231) and / or the second RFFE module (232) may be a module (e.g., FEMid) connected to a transmit path including a power amplifier and a receive path including a low-noise amplifier.

[0059] FIGS. 3A and 3B illustrate examples of electronic devices (e.g., electronic devices (101)) for antenna switching diversity utilizing conductive portions of a metal frame. To illustrate antenna switching diversity, reference may be made to the circuit structure illustrated in FIG. 2. Like reference numerals may represent like descriptions.

[0060] Referring to FIGS. 3A and 3B , the electronic device (101) may include a processor (210), an RF transceiver (220), a first RFFE module (231), a second RFFE module (232), a first antenna (251), and a second antenna (252). In one embodiment, the electronic device (101) may include a plurality of switching circuits (e.g., the first switching circuit (241) or the second switching circuit (242)) for antenna switching diversity. The electronic device (101) may include a housing (310). For example, the housing (310) may include a plurality of conductive portions. The plurality of conductive portions may be formed on a side surface of the housing (310). For example, the plurality of conductive portions may be at least a portion of a metal frame of the housing (310). For example, the conductive portions may be formed through segments that are non-conductive portions of the metal frame. Each non-conductive portion may be positioned between conductive portions. Some of the conductive portions may be used as antenna radiators for transmitting or receiving signals. For example, the electronic device (101) may use the first conductive portion (351) positioned at the bottom of the electronic device (101) as the first antenna (251). For example, the electronic device (101) may use the second conductive portion (352) positioned at the top of the electronic device (101) as the second antenna (252). Fig. 3a illustrates a connection state of the plurality of switching circuits in a first connection mode. Fig. 3b illustrates a connection state of the plurality of switching circuits in a second connection mode.

[0061] Referring to FIG. 3A, in a first connection mode, a first switching circuit (241) may be configured to electrically connect a first RFFE module (231) with a first conductive portion (351). In the first connection mode, a first main path (391) may be formed between the first RFFE module (231) and the first conductive portion (351). The electronic device (101) may transmit or receive a signal through the first main path (391). In the first connection mode, a second switching circuit (242) may be configured to electrically connect a second RFFE module (232) with a second conductive portion (352). In the first connection mode, a second main path (392) may be formed between the second RFFE module (232) and the second conductive portion (352). The electronic device (101) may receive a signal through the second main path (392).

[0062] Referring to FIG. 3B, in the second connection mode, the first switching circuit (241) may be configured to electrically connect the first RFFE module (231) with the second conductive portion (352). In the second connection mode, a first sub-path (393) may be formed between the first RFFE module (231) and the second conductive portion (352). The electronic device (101) may transmit or receive a signal through the first sub-path (393). In the second connection mode, the second switching circuit (242) may be configured to electrically connect the second RFFE module (232) with the first conductive portion (351). In the second connection mode, a second sub-path (394) may be formed between the second RFFE module (232) and the first conductive portion (351). The electronic device (101) may receive a signal through the second sub-path (394).

[0063] FIGS. 4A, 4B, and 4C illustrate examples of switching circuits (e.g., a first switching circuit (241) or a second switching circuit (242)) for antenna switching diversity. To describe components within the switching circuits, the descriptions of the components in FIGS. 2, 3A, and 3B may be used. Like reference numerals may represent like descriptions.

[0064] Referring to FIG. 4A, the first switching circuit (241) may be a DPDT. The first switching circuit (241) may include two poles and two throws. For example, the first switching circuit (241) may include a first pole (241p), a second pole (241q), a first throw (241a), and a second throw (241b). The first switching circuit (241) may include path switches for connecting each pole and each throw.

[0065] In a first connection mode, a first pole (241p) and a first throw (241a) may be electrically connected to form a primary path (e.g., a first primary path (391)) between a first RFFE module (231) and a first antenna (251) (e.g., a first conductive portion (351)). The first switching circuit (241) may include a first primary path switch (411) for electrically connecting or disconnecting the first pole (241p) and the first throw (241a). For example, the first primary path switch (411) may be closed in the first connection mode and open in the second connection mode. While the above main path is formed, the wirings (e.g., the first wiring (271) or the second wiring (272)) between the first switching circuit (241) and the second switching circuit (242) may act as an impedance (e.g., a stub). For isolation from the main path of the first switching circuit (241), the second pole (241q) and the second throw (241b) may be electrically connected. The first switching circuit (241) may include a first isolation path switch (441) for electrically connecting or disconnecting the second pole (241q) and the second throw (241b). For example, the first isolation path switch (441) may be closed in the first connection mode and open in the second connection mode.

[0066] In the second connection mode, the first pole (241p) and the second throw (241b) may be electrically connected to form a secondary path (e.g., the first secondary path (393)) between the first RFFE module (231) and the second antenna (252) (e.g., the second conductive portion (352)). Through the electrical connection between the first pole (241p) and the second throw (241b), the first RFFE module (231) may be electrically connected to the second switching circuit (242). Since the second switching circuit (242) is electrically connected to the second antenna (252) through the antenna path (e.g., the second antenna path (262)), a secondary path may be formed between the first RFFE module (231) and the second antenna (252). The first switching circuit (241) may include a first sub-path switch (421) for electrically connecting or disconnecting the first pole (241p) and the second throw (241b). For example, the first sub-path switch (421) may be closed in the second connection mode and open in the first connection mode. While a sub-path (e.g., the first sub-path (393)) is formed between the first RFFE module (231) and the second antenna (252), a sub-path (e.g., the second sub-path (394)) may be formed between the second RFFE module (232) and the first antenna (251). For the sub-path of the second RFFE module (232), the second switching circuit (242) connected to the second RFFE module (232) may be connected to the first switching circuit (241) via a wire (e.g., the second wire (272)). The first switching circuit (241) is electrically connected to the first antenna (251) through an antenna path (e.g., the first antenna path (261)), so that a secondary path can be formed between the second RFFE module (232) and the first antenna (251). For the secondary path of the second RFFE module (232), the first switching circuit (241) may include a first antenna path switch (431) for electrically connecting or disconnecting the second pole (241q) and the first throw (241a).For example, the first antenna path switch (431) may be closed in the second connection mode and open in the first connection mode.

[0067] Referring to FIG. 4b, the second switching circuit (242) may be a DPDT. The second switching circuit (242) may include two poles and two throws. For example, the second switching circuit (242) may include a first pole (242p), a second pole (242q), a first throw (242a), and a second throw (242b). The second switching circuit (242) may include path switches for connecting each pole and each throw.

[0068] In the first connection mode, the first pole (242p) and the first throw (242a) may be electrically connected to form a primary path (e.g., the second primary path (392)) between the second RFFE module (231) and the second antenna (252) (e.g., the second conductive portion (352)). The second switching circuit (242) may include a second primary path switch (412) for electrically connecting or disconnecting the first pole (242p) and the first throw (242a). For example, the second primary path switch (412) may be closed in the first connection mode and open in the second connection mode. While the primary path is being formed, the wires (e.g., the first wire (271) or the second wire (272)) between the second switching circuit (242) and the first switching circuit (241) may act as impedances. For isolation from the main path of the second switching circuit (242), the second pole (242q) and the second throw (242b) may be electrically connected. The second switching circuit (242) may include a second isolation path switch (442) for electrically connecting or disconnecting the second pole (242q) and the second throw (242b). For example, the second isolation path switch (442) may be closed in the first connection mode and open in the second connection mode.

[0069] In the second connection mode, the first pole (242p) and the second throw (242b) may be electrically connected to form a secondary path (e.g., a second secondary path (394)) between the second RFFE module (232) and the first antenna (251) (e.g., the first conductive portion (351)). Through the electrical connection between the first pole (242p) and the second throw (242b), the second RFFE module (232) may be electrically connected to the first switching circuit (241). Since the first switching circuit (241) is electrically connected to the first antenna (251) through the antenna path (e.g., the first antenna path (261)), a secondary path may be formed between the second RFFE module (232) and the first antenna (251). The second switching circuit (242) may include a second sub-path switch (422) for electrically connecting or disconnecting the first pole (242p) and the second throw (242b). For example, the second sub-path switch (422) may be closed in the second connection mode and open in the first connection mode. While the sub-path (e.g., the second sub-path (394)) between the second RFFE module (232) and the first antenna (251) is formed, the sub-path (e.g., the first sub-path (393)) between the first RFFE module (231) and the second antenna (252) may be formed. For the sub-path of the first RFFE module (231), the first switching circuit (241) connected to the first RFFE module (231) may be connected to the second switching circuit (242) via a wire (e.g., the first wire (271)). The second switching circuit (242) is electrically connected to the second antenna (252) through an antenna path (e.g., the second antenna path (262)), so that a secondary path can be formed between the first RFFE module (231) and the second antenna (252). For the secondary path of the first RFFE module (231), the second switching circuit (242) may include a second antenna path switch (432) for electrically connecting or disconnecting the second pole (242q) and the first throw (242a).For example, the second antenna path switch (432) may be closed in the second connection mode and open in the first connection mode.

[0070] Referring to FIG. 4C, the electronic device (101) may include a processor (210), an RF transceiver (220), a first RFFE module (231), a second RFFE module (232), a first antenna (251), and a second antenna (252). In one embodiment, the electronic device (101) may include a plurality of switching circuits (e.g., the first switching circuit (241) or the second switching circuit (242)) for antenna switching diversity. The description of the components for antenna switching diversity described through FIGS. 2, 3A, and 3B may be substantially identically applied to FIG. 4C. The first switching circuit (241) may include a first primary path switch (411), a first secondary path switch (421), a first antenna path switch (431), and a first isolation path switch (441) as illustrated through FIG. 4A. The second switching circuit (242) may include a second main path switch (412), a second sub path switch (422), a second antenna path switch (432), and a second isolation path switch (442), as illustrated in FIG. 4b.

[0071] The electronic device (101) can support antenna switching diversity. In the aspect that the first RFFE module (231) is arranged closer to the first antenna (251) than the second antenna (252) and the second RFFE module (232) is arranged closer to the second antenna (252) than the first antenna (251), the antenna switching diversity can be referred to as biased antenna switching diversity or asymmetric antenna switching diversity. In order to improve the performance of such antenna switching diversity, it is required that the loss for signal transmission be low in the second connection mode. Referring to the circuit wiring illustrated in FIG. 4C, in the first connection mode, each of the first main path (391) and the second main path (392) can pass through only one switching circuit between the RFFE module and the antenna. However, in the second connection mode, each of the first sub-path (393) and the second sub-path (394) may include two switching circuits (e.g., the first switching circuit (241) and the second switching circuit (242)). For example, in a low band (e.g., a frequency band below about 1 GHz), the loss of DPDT may be about 0.4 dB (decibel), which may reduce the antenna efficiency by about 10%. To alleviate / resolve this problem, in the present disclosure, the entire circuit network including the path switches of the first switching circuit (241) and the path switches of the second switching circuit (242) may be regarded as one switch (400), and a circuit structure for distributing the isolation of each path and the insertion loss of each path may be described. The switch (400) may be understood as a single DPDT having inputs connected to the first RFFE module (231) and the second RFFE module (232) and outputs connected to the first antenna (251) and the second antenna (252). In the present disclosure, isolation refers to how much a signal leaks from one port to another port when the switch connecting the ports is turned off (e.g., the switch is open), and the unit is dB (decibel).Insertion loss is the amount of signal loss introduced by a switch connecting ports when the switch is connected (e.g., closed), and is measured in dB. Because higher isolation tends to result in higher insertion loss, a balance between isolation and insertion loss may be required. Below, the characteristics of each path switch are described based on insertion loss, but the description of insertion loss can be applied to isolation in the same technical manner.

[0072] According to one embodiment, the first sub-path switch (421) and the second antenna path switch (432) may be designed such that, with respect to the first RFFE module (231), the insertion loss in the first primary path (391) in the first connection mode is maintained at a level equivalent to the insertion loss in the first secondary path (393) in the second connection mode. For example, the sum of the insertion loss of the first secondary path switch (421) and the insertion loss of the second antenna path switch (432) may be within a threshold range, in decibels, based on the insertion loss of the first primary path switch (411). As an example, the threshold range may be about ±20% of the insertion loss of the first primary path switch (411). As an example, the threshold range may be about 1 / 4 of the insertion loss of the first primary path switch (411). This comparison of insertion losses may be performed under the same environmental conditions (e.g., the same frequency range). If the maximum value of the insertion loss of the first main path switch (411) is about 0.40 dB under specified conditions (e.g., about 960 to 2170 MHz), assuming a 20% error range, the sum (in decibels) of the insertion loss of the first sub path switch (421) and the insertion loss of the second antenna path switch (432) may be about 0.32 dB or more and about 0.48 dB or less.

[0073] Assuming that the first switching circuit (241) and the second switching circuit (242) are designed to have equivalent levels, it can be assumed that the first antenna path switch (431) of the first switching circuit (241) has equivalent insertion loss to the second antenna path switch (432) of the second switching circuit (242). For example, the sum of the insertion loss of the first sub-path switch (421) and the insertion loss of the first antenna path switch (431) may be within a critical range based on the insertion loss of the first main path switch (411), in decibel units. According to one embodiment, the first main path switch (411) may be configured to have greater insertion loss and / or greater isolation than each of the first sub-path switch (421) and the first antenna path switch (431). For example, the insertion loss of the first sub-path switch (421) may be lower than the insertion loss of the first main path switch (411). For example, the insertion loss of the first secondary path switch (421) may be within a margin of error of about 20% based on half the insertion loss of the first primary path switch (411) in decibels. For example, twice the insertion loss of the first secondary path switch (421) may be within a threshold range (e.g., about 1 / 4 the insertion loss of the first primary path switch) based on the insertion loss of the first primary path switch (411) in decibels. For example, the insertion loss of the first antenna path switch (431) may be lower than the insertion loss of the first primary path switch (411). For example, the insertion loss of the first antenna path switch (431) may be within a margin of error of about 20% based on half the insertion loss of the first primary path switch (411) in decibels. For example, twice the insertion loss of the first antenna path switch (431) may be within a critical range (e.g., approximately 1 / 4 of the insertion loss of the first main path switch) based on the insertion loss of the first main path switch (411), in decibel units.This comparison of insertion losses can be performed under the same environmental conditions (e.g., the same frequency range). If the maximum insertion loss of the first main path switch (411) is about 0.72 dB under the specified conditions (e.g., 3800 to 4200 MHz), assuming an error range of about 1 / 4, the insertion losses of each of the first sub path switch (421) and the first antenna path switch (431) can be about 0.27 dB or more and about 0.45 dB or less based on about 0.36 dB under the specified conditions. As another example, if the maximum value of the insertion loss of the first main path switch (411) is about 0.96 dB under specified conditions (e.g., 4400 to 5000 MHz), assuming an error range of about 30%, the insertion loss of each of the first sub path switch (421) and the first antenna path switch (431) may be about 0.336 dB or more and about 0.624 dB or less based on about 0.48 dB under the specified conditions.

[0074] According to one embodiment, the second secondary path switch (422) and the first antenna path switch (431) may be designed such that the insertion loss in the second primary path (392) in the first connection mode is maintained at a level equivalent to the insertion loss in the second secondary path (394) in the second connection mode, based on the second RFFE module (232). The sum of the insertion loss of the second secondary path switch (422) and the insertion loss of the first antenna path switch (431) may be within a threshold range, in decibels, based on the insertion loss of the second primary path switch (412). For example, the threshold range may be about ±20% of the insertion loss of the second primary path switch (412). For example, the threshold range may be about 1 / 4 of the insertion loss of the second primary path switch (412). Assuming that the first switching circuit (241) and the second switching circuit (242) are designed to have equivalent levels, it can be assumed that the first antenna path switch (431) of the first switching circuit (241) has equivalent insertion loss to the second antenna path switch (432) of the second switching circuit (242). For example, the sum of the insertion loss of the second sub-path switch (422) and the insertion loss of the second antenna path switch (432) may be within a critical range based on the insertion loss of the second main path switch (412), in decibel units. This comparison of insertion losses can be performed under the same environmental conditions (e.g., the same frequency range). If the maximum value of the insertion loss of the second main path switch (412) is about 0.50 dB under the specified conditions (e.g., 1710 to 2200 MHz), assuming an error range of about 20%, the sum (in decibels) of the insertion loss of the second sub path switch (422) and the insertion loss of the second antenna path switch (431) may be about 0.40 dB or more and about 0.60 dB or less under the specified conditions.

[0075] In one embodiment, the second primary path switch (412) can be configured to have greater insertion loss and / or greater isolation than each of the second secondary path switch (422) and the second antenna path switch (432). For example, the insertion loss of the second secondary path switch (422) can be lower than the insertion loss of the second primary path switch (412). For example, the insertion loss of the second secondary path switch (422) can be within a tolerance of about 20%, in decibels, relative to half the insertion loss of the second primary path switch (412). For example, twice the insertion loss of the second secondary path switch (422) can be within a critical range, in decibels, relative to the insertion loss of the second primary path switch (412), e.g., about 1 / 4 the insertion loss of the second primary path switch (412). For example, the insertion loss of the second antenna path switch (432) may be lower than the insertion loss of the second main path switch (412). For example, the insertion loss of the second antenna path switch (432) may be within a margin of error of about 20% based on half the insertion loss of the second main path switch (412) in decibels. For example, twice the insertion loss of the second antenna path switch (432) may be within a threshold range (e.g., about 1 / 4 the insertion loss of the second main path switch (412)) based on the insertion loss of the second main path switch (412) in decibels. This comparison of insertion losses may be performed under the same environmental conditions (e.g., the same frequency range). If the maximum insertion loss of the second main path switch (412) is about 0.35 B under specified conditions (e.g., 600 to 960 MHz), and assuming an error range of about 20%, the insertion loss of each of the second sub path switch (422) and the second antenna path switch (431) may be about 0.14 dB or more and about 0.21 dB or less based on about 0.175 dB under the specified conditions.

[0076] According to one embodiment, the path switches in the secondary paths (e.g., the first secondary path (393), the second secondary path (394)) in the second connection mode may have distributed insertion loss so as to have insertion loss / isolation levels equivalent to those of the path switches in the primary path in the first connection mode. Hereinafter, examples of transistors constituting each path switch are described in FIGS. 5 to 7B.

[0077] Fig. 5 illustrates examples of path switches (e.g., a first main path switch (411), a first sub path switch (421), a first antenna path switch (431), a first isolation path switch (441), a second main path switch (412), a second sub path switch (422), a second antenna path switch (432), and a second isolation path switch (442)) of a switching circuit (e.g., a first switching circuit (241) or a second switching circuit (242)). In the switching circuit, a path switch may represent a switch unit forming the switching circuit.

[0078] Referring to FIG. 5, a path switch may be configured to electrically connect or disconnect a first port (501) (e.g., a pole) and a second port (502) (e.g., a throw). The path switch may include a plurality of transistors. The path switch may include a series transistor circuit for connecting the first port (501) and the second port (502). The series transistor circuit may include transistors (e.g., field effect transistors (FETs)) for connecting an RF path between the first port (501) and the second port (502). For example, the transistors may be stacked FETs. The transistors may be referred to as series transistors in that they are connected in series on the RF path. The electronic device (101) may control the path switch to open or close by controlling on / off of the gates of the series transistors. For example, the series transistors may include a first series transistor (511), a second series transistor (512), a third series transistor (513), a fourth series transistor (514), a fifth series transistor (515), and / or a sixth series transistor (516). Since the series transistors are connected in a cascade manner, a signal having a high voltage exceeding the withstand voltage (e.g., voltage stress) of one transistor may be transmitted through an RF path between the first port (501) and the second port (502).

[0079] The path switch may include shunt transistor circuits arranged in parallel with a series transistor circuit connecting a first port (501) and a second port (502). Each shunt transistor circuit may be used to protect against damage caused by a surge voltage and to control current flowing on an RF path between the first port (501) and the second port (502). For example, the shunt transistor circuits may include a first shunt transistor circuit (521), a second shunt transistor circuit (522), a third shunt transistor circuit (523), a fourth shunt transistor circuit (524), and / or a fifth shunt transistor circuit (525). Each shunt transistor circuit may include transistors (e.g., FETs) arranged in parallel on the RF path and connected to ground. For example, the transistors may be stacked FETs. The transistors may be referred to as shunt transistors in that they are branches from the RF path. For example, the first shunt transistor circuit (521) may include a first shunt transistor (521a), a second shunt transistor (521b), and / or a third shunt transistor (521c). The first shunt transistor circuit (521) may be disposed between a node and ground between the first series transistor (511) and the second series transistor (512). For example, the second shunt transistor circuit (522) may include a first shunt transistor (522a), a second shunt transistor (522b), and / or a third shunt transistor (522c). The second shunt transistor circuit (522) may be disposed between a node and ground between the second series transistor (512) and the third series transistor (513). For example, the third shunt transistor circuit (523) may include a first shunt transistor (523a), a second shunt transistor (523b), and / or a third shunt transistor (523c).The third shunt transistor circuit (523) may be disposed between a node and ground between the third series transistor (513) and the fourth series transistor (514). For example, the fourth shunt transistor circuit (524) may include a first shunt transistor (524a), a second shunt transistor (524b), and / or a third shunt transistor (524c). The fourth shunt transistor circuit (524) may be disposed between a node and ground between the fourth series transistor (514) and the fifth series transistor (515). For example, the fifth shunt transistor circuit (525) may include a first shunt transistor (525a), a second shunt transistor (525b), and / or a third shunt transistor (525c). The fifth shunt transistor circuit (525) may be disposed between a node and ground between the fifth series transistor (515) and the sixth series transistor (516). As the above shunt transistors are connected in a cascade manner, a signal having a voltage higher than the withstand voltage (e.g., voltage stress) of one transistor can be transmitted through the RF path between the first port (501) and the second port (502).

[0080] Fig. 6 illustrates an example of a turned-on path switch. To explain the path switch, the structure of the path switch of Fig. 5 may be referred to.

[0081] Referring to FIG. 6, the path switch may be in a closed state. In order to electrically connect the first port (501) and the second port (502), the series transistors of the path switch may be in an on state. For example, the series transistors may be FETs. When a voltage higher than a threshold voltage is applied to the gate of each FET, an electrical connection between the source and the drain may be formed. As each of the first series transistor (511), the second series transistor (512), the third series transistor (513), the fourth series transistor (514), the fifth series transistor (515), and / or the sixth series transistor (516) provides an electrical connection between the source and the drain, current may flow on the RF path between the first port (501) and the second port (502). For example, an RF signal having a voltage of about 30 V or less may flow through the path switch. The above RF signal can be transmitted from the first port (501) to the second port (502) (or from the second port (502) to the first port (501)) through the turned-on path switch. The potential on the RF path can be within about 30 V.

[0082] While current flows on the RF path, the transistors of each shunt transistor circuit may all be in an off state to prevent current from leaking to ground through the shunt transistor circuits. When an RF signal flows on the RF path, the shunt transistor circuit may be required to withstand the voltage of the RF signal. For example, since the potential in each RF path is a maximum of about 30 V and the ground is at 0 potential, each shunt transistor circuit may be designed to withstand a breakdown voltage of about 30 V. By using a plurality of stacked transistors as the shunt transistor circuit instead of a single transistor with a high breakdown voltage, the voltage stress may be distributed to each transistor. For example, three shunt transistors may be arranged in a cascade manner between the node between two series transistors and the ground. Since the maximum voltage of the RF signal is 30 V, the breakdown voltage applied to each shunt transistor may be within about 10 V.

[0083] Figures 7a and 7b illustrate examples of a turned-off path switch. To explain the path switch, the structure of the path switch of Figure 5 may be referred to. Figure 7a illustrates an example in which voltage is applied to a first port (501) but the RF signal is blocked by the path switch, and Figure 7b illustrates an example in which voltage is applied to a second port (502) but the RF signal is blocked by the path switch.

[0084] Referring to FIG. 7a, in order to block the RF signal from the first port (501) to the second port (502), the series transistors may be in an off state. Assuming that the threshold voltage of the transistor is about 10 V, the potential after the first series transistor (511) in the first direction (701) may decrease from about 30 V to about 20 V. In order to offset the voltage (e.g., about 20 V) between the ground and the first series transistor (511), among the shunt transistor circuits of the first shunt transistor circuit (521), the first shunt transistor (521a) and the second shunt transistor (521b) may be turned off, and only the third shunt transistor (521c) may be turned on. The potential after the second series transistor (512) in the first direction (701) may be reduced from about 20 V to about 10 V. In order to offset the voltage (e.g., about 20 V) between the ground and the second series transistor (512), only the first shunt transistor (522a) among the shunt transistor circuits of the second shunt transistor circuit (522) may be turned off, and the second shunt transistor (522b) and the third shunt transistor (522c) may be turned on. The potential after the third series transistor (513) with respect to the first direction (701) may decrease from about 10 V to about 0 V. In order to offset the voltage (e.g., about 30 V) between the ground and the third series transistor (513), all of the shunt transistor circuits of the third shunt transistor circuit (523) may be turned on.

[0085] In Fig. 7a, a situation in which an RF signal is applied from the first port (501) is exemplified, but an RF signal may also be applied from the second port (502). Since the path switch cannot know whether the direction in which the RF signal is applied is left or right, it may need to be designed to experience a certain level of voltage (e.g., up to about 30 V) regardless of the direction. Shunt transistor circuits arranged symmetrically with respect to the center node (733) may operate with the same number of shunt transistors activated (i.e., canceling out voltages of the same magnitude). For example, in order to block an RF signal having a voltage of up to about 30 V through the path switch, the second shunt transistor circuit (522) may operate in the same manner as the fourth shunt transistor circuit (524). The first shunt transistor (524a) of the fourth shunt transistor circuit (524) may be off, and the second shunt transistor (524b) and the third shunt transistor (524c) may be on. For example, in order to block an RF signal having a voltage of up to about 30 V through the path switch, the fifth shunt transistor circuit (525) may operate in the same manner as the first shunt transistor circuit (521). The first shunt transistor (525a) and the second shunt transistor (525b) of the fifth shunt transistor circuit (525) may be off, and the third shunt transistor (525c) may be on. Referring to FIG. 7B, in order to block an RF signal from the second port (502) to the first port (501), the series transistors may be in an off state. Assuming that the limit voltage of the transistor is about 10 V, the potential after the 6th series transistor (516) in the second direction (702) can be reduced from about 30 V to about 20 V.In order to offset the voltage (e.g., about 20 V) between the ground and the sixth series transistor (516), among the shunt transistor circuits of the fifth shunt transistor circuit (525), the first shunt transistor (525a) and the second shunt transistor (525b) can be turned off and only the third shunt transistor (525c) can be turned on.

[0086] Based on the second direction (702), the potential after the fifth series transistor (515) can decrease from about 20 V to about 10 V. In order to offset the voltage (e.g., about 20 V) between the ground and the fifth series transistor (515), only the first shunt transistor (524a) among the shunt transistor circuits of the fourth shunt transistor circuit (524) can be turned off, and the second shunt transistor (524b) and the third shunt transistor (524c) can be turned on. Based on the second direction (702), the potential after the third series transistor (513) can decrease from about 10 V to about 0 V. In order to offset the voltage (e.g., about 30 V) between the ground and the third series transistor (513), all of the shunt transistor circuits of the third shunt transistor circuit (523) can be turned on.

[0087] In Fig. 7b, a situation in which an RF signal is applied from the second port (502) is exemplified, but an RF signal may also be applied from the first port (501). Since the path switch cannot know whether the direction in which the RF signal is applied is left or right, it may need to be designed to experience a certain level of voltage (e.g., up to about 30 V) regardless of the direction. Shunt transistor circuits arranged symmetrically with respect to the center node (733) may operate with the same number of shunt transistor(s) activated (i.e., canceling out voltages of the same magnitude). For example, in order to block an RF signal having a voltage of up to about 30 V through the path switch, the second shunt transistor circuit (522) may operate in the same manner as the fourth shunt transistor circuit (524). The first shunt transistor (522a) of the second shunt transistor circuit (522) may be off, and the second shunt transistor (522b) and the third shunt transistor (522c) may be on. For example, in order to block an RF signal having a voltage of up to about 30 V through the path switch, the first shunt transistor circuit (521) may operate in the same manner as the fifth shunt transistor circuit (525). The first shunt transistor (521a) and the second shunt transistor (521b) of the first shunt transistor circuit (521) may be off, and the third shunt transistor (521c) may be on.

[0088] Isolation, as described in FIGS. 7A and 7B, is an indicator of how much current leaks from the first port (501) to the second port (502) (or from the second port (502) to the first port (501)) when the path switch is off. The higher the isolation performance of the path switch, the more transistors are required to be arranged. Therefore, as the number of stages in which transistors are connected in a cascade manner increases, the higher the isolation can be. Meanwhile, as the number of stages increases and the total number of transistors increases, the resistance and the capacitor connected in parallel also increase. Due to the increasing resistance and capacitor, the insertion loss of the path switch can increase. An electronic device (101) according to embodiments of the present disclosure may include switching circuits (e.g., a first switching circuit (241) or a second switching circuit (242)) in a circuit structure for antenna switching diversity, such that the isolation of a secondary path (e.g., a first secondary path (393) or a second secondary path (394)) is maintained at a level substantially equivalent to the isolation of a primary path (e.g., a first primary path (391) or a second primary path (392)), and insertion loss of the secondary path is also provided at a level substantially equivalent to the insertion loss of the primary path. As an example, the switching circuits may have a circuit structure in which the insertion loss is distributed across the first switching circuit (241) and the second switching circuit (242) on the secondary path within a target range of isolation.

[0089] Figure 8 shows examples of transistors of two switching circuits (e.g., first switching circuit (241) and second switching circuit (242)) on a signal path.

[0090] Referring to FIG. 8, the electronic device (101) may include a first switching circuit (241). The first switching circuit (241) may include a first primary path switch (411), a first secondary path switch (421), a first antenna path switch (431), and a first isolation path switch (441). The electronic device (101) may include a second switching circuit (242). The second switching circuit (242) may include a second primary path switch (412), a second secondary path switch (422), a second antenna path switch (432), and a second isolation path switch (442).

[0091] For example, in a first connection mode, a first RFFE module (231) may be electrically connected to a first antenna (251) (e.g., a first conductive portion (351)) via a first main path switch (411). In the first connection mode, a second RFFE module (232) may be electrically connected to a second antenna (252) (e.g., a second conductive portion (352)) via a second main path switch (412). In a second connection mode, the first RFFE module (231) may be electrically connected to a second antenna (252) (e.g., a second conductive portion (352)) via a first sub path (393). In the second connection mode, a first sub path switch (421) of a first switching circuit (241) may be in an on state, and a second antenna path switch (432) of a second switching circuit (242) may be in an on state. For example, in the second connection mode, the second RFFE module (232) may be electrically connected to the first antenna (251) (e.g., the first conductive portion (351)) through the second sub-path (394). In the second connection mode, the second sub-path switch (422) of the second switching circuit (242) may be in an on state, and the first antenna path switch (431) of the first switching circuit (241) may be in an on state.

[0092] The requirement for isolation in the primary path (e.g., the first primary path (391) or the second primary path (392)) can be applied substantially equally to the secondary path (e.g., the first secondary path (393) or the second secondary path (394)). For example, in the overall circuit system for antenna switching diversity, when a single DPDT is used, the required isolation in the circuit structure (e.g., the circuit structure when an actual DPDT switch is used instead of a switch (400) including two DPDTs) is greater than about 35 dB. The switching circuit (e.g., the first switching circuit (241) or the second switching circuit (242)) can be designed to reduce the insertion loss in the path while satisfying the requirement for the isolation (e.g., greater than about 35 dB). In order to reduce the insertion loss in the secondary path, the transistors can be distributed. For example, the distribution of the insertion loss can be understood as the distribution of the transistors.

[0093] According to one embodiment, the transistors may be distributed across two spatially separated switching circuits (e.g., a first switching circuit (241) or a second switching circuit (242)) within the electronic device (101). An arrangement in which transistors of a primary path switch (e.g., a primary path switch (411) or a secondary path switch (412)) are distributed across the two switching circuits with an isolation / insertion loss level equivalent to that of the transistors of the primary path switch (e.g., a primary path switch (411) or a secondary path switch (412)) (e.g., within a tolerance range of about ±20%, ±25%, or ±30%) may be understood as an embodiment of the present disclosure. It may be assumed that each path switch is formed of transistors of substantially equivalent capabilities. According to one embodiment, the sum of the number of transistors of the first sub-path switch (421) and the number of transistors of the second antenna path switch (432) may be within a threshold range (e.g., about ±20%, ±30%, or ±A / 4 (where A is the number of transistors of the first main path switch (411)) based on the number of transistors of the first main path switch (411). If the first switching circuit (241) and the second switching circuit (242) are DPDT switches implemented in the same manner, the second antenna path switch (432) may have the same transistor circuit as the first antenna path switch (431). According to one embodiment, the sum of the number of transistors of the first secondary path switch (421) and the number of transistors of the first antenna path switch (431) may be within a threshold range (e.g., about ±20%, ±30%, or ±A / 4 (where A is the number of transistors of the first primary path switch (411)) based on the number of transistors of the first primary path switch (411). If the first secondary path switch (421) and the first antenna path switch (431) are formed identically, each of the first secondary path switch (421) and the first antenna path switch (431) may include transistors corresponding to half the number of transistors of the first primary path switch (411).In one embodiment, the number of transistors of the first secondary path switch (421) may be within a threshold range (e.g., about ±20%, ±30%, or ±A / 4 (where A is the number of transistors of the first primary path switch (411))) relative to half the number of transistors of the first primary path switch (411). In one embodiment, the number of transistors of the first antenna path switch (431) may be within a threshold range (e.g., about ±20%, ±30%, or ±A / 4 (where A is the number of transistors of the first primary path switch (411))) relative to half the number of transistors of the first primary path switch (411).

[0094] In one embodiment, each of the second primary path switch (412) and the second isolation path switch (442) may have the transistors illustrated in FIGS. 5-7B. For example, the transistors illustrated in FIGS. 5-7B may be distributed across the second secondary path switch (422) and the first antenna path switch (431) to provide substantially the same level of isolation / insertion loss in the second secondary path (394) as in the second primary path (392). The second secondary path switch (422) may include series transistors. For example, the second secondary path switch (422) may include a first series transistor (831), a second series transistor (832), and / or a third series transistor (833). The second secondary path switch (422) may include shunt transistor circuits for controlling current flowing through the series transistors. For example, the second secondary path switch (422) may include a first shunt transistor circuit (841) and / or a second shunt transistor circuit (842). As an example, when the maximum voltage on the path is about 30 V, the shunt transistor circuits may include three transistors so that a voltage stress of about 10 V or less is applied to each transistor. The first shunt transistor circuit (841) may include a first shunt transistor (841a), a second shunt transistor (841b), and a third shunt transistor (841c). The second shunt transistor circuit (842) may include a first shunt transistor (842a), a second shunt transistor (842b), and a third shunt transistor (842c).

[0095] In the example described above, each of the first main path switch (411) and the first isolation path switch (441) of the first switching circuit (241) may be designed to have an isolation of about 35 dB or more. Accordingly, the sum of the isolation of the first sub path switch (421) and the isolation of the second antenna path switch (432) may also be required to be about 35 dB or more. If the first switching circuit (241) and the second switching circuit (242) are designed in the same manner, the sum of the isolation of the first sub path switch (421) and the isolation of the first antenna path switch (431) may be required to be about 35 dB or more. Within these requirements, the insertion loss may be distributed between the two switching circuits (e.g., the first switching circuit (241) or the second switching circuit (242)). For example, each of the second sub-path switch (422) of the second switching circuit (242) and the first antenna path switch (431) of the first switching circuit (241) can be designed to have an isolation of about 17.5 dB or more, which is half of the previously required isolation threshold (e.g., about 35 dB), in decibel units. As the isolation requirement is lowered, each of the second sub-path switch (422) and the first antenna path switch (431) can be designed to have a lower insertion loss. In one embodiment, taking into account the possibility of process errors and modifications for performance optimization during DPDT design, each of the first sub-path switch (421) and the first antenna path switch (431) of the first switching circuit (241) can be varied within a threshold range (e.g., within an error range of about ±30%, within an error range of about ±20%) based on about 17.5 dB.

[0096] Although FIG. 8 illustrates an example in which three series transistors and two shunt switching circuits are arranged in the second sub-path switch (422) and four series transistors and three shunt switching circuits are arranged in the first antenna path switch (431), the distributed structure illustrated in FIG. 8 is merely an example, and embodiments of the present disclosure are not limited thereto. As a non-limiting example, an arrangement in which the second sub-path switch (422) includes five series transistors and four shunt switching circuits, and the first antenna path switch (431) includes two series transistors and one shunt switching circuit may also be an example of the present disclosure.

[0097] Figure 9 is a drawing for explaining the RF stress direction.

[0098] Referring to FIG. 9, the electronic device (101) may operate in a first connection mode. The first RFFE module (231) may be electrically connected to the first antenna (251) through the first main path switch (411) of the first switching circuit (241). The second RFFE module (232) may be electrically connected to the second antenna (252) through the second main path switch (412) of the second switching circuit (242). In the first connection mode, each of the first main path switch (411) of the first switching circuit (241) and the first isolation path switch (441) of the first switching circuit (241) may be in an on state. In the first connection mode, each of the first sub path switch (421) of the first switching circuit (241) and the first antenna path switch (431) of the first switching circuit (241) may be in an off state. In the first connection mode, each of the second main path switch (412) and the second isolation path switch (442) of the second switching circuit (242) may be in an on state. In the first connection mode, each of the second sub path switch (422) of the second switching circuit (242) and the second antenna path switch (432) of the second switching circuit (242) may be in an off state.

[0099] While the path switch is turned off, the path switch may experience RF stress since the path switch offsets the voltage of the RF signal supplied to one port of the path switch. To offset the voltage of the RF signal while the path switch is turned off, at least one shunt transistor may be turned off. As described in FIGS. 7A and 7B , the direction of the RF stress (hereinafter, referred to as RF stress direction) may be determined depending on the port to which the RF signal is provided. Since the power of the transmission signal is greater than the power of the reception signal, the direction of the RF stress of the path switch may be affected by the direction of the transmission path. For example, the direction of the RF stress may be determined from a port electrically connected to the first RFFE module (231) among the two ports of the path switch to the other port. For example, the direction of the RF stress of the first sub-path switch (421) may be the first direction (901). The direction of the RF stress of the first antenna path switch (431) may be the second direction (902). The RF stress direction of the second sub-path switch (422) may be the second direction (902). The RF stress direction of the second antenna path switch (432) may be the first direction (901).

[0100] In one embodiment, since it is known whether the direction in which the RF signal is applied is the first direction (901) or the second direction (902), the path switch may not be designed symmetrically with respect to the center node of the switch (e.g., the center node (733)). In one embodiment, shunt transistor circuits arranged symmetrically with respect to the center node of the path switch may not have the same number of shunt transistors activated. Since the required constraints are unnecessary because the RF stress direction is not known, the path switch can be designed in a more simplified manner. Since unnecessary transistors are not included in the path switch, lower insertion loss can be provided. Hereinafter, an example of a design of a path switch considering the RF stress direction is described through FIGS. 10A and 10B.

[0101] Figures 10a and 10b illustrate examples of transistors of two switching circuits (e.g., a first switching circuit (241) and a second switching circuit (242)) on a signal path according to the RF stress direction. In Figure 10a, transistors of path switches in which the RF stress direction is in the first direction (901) are illustrated, and in Figure 10b, transistors of path switches in which the RF stress direction is in the second direction (902) are illustrated. The same reference numerals may be used for the same description.

[0102] Referring to FIG. 10A, the electronic device (101) may operate in a first connection mode of antenna switching diversity. As the first connection mode operates, the path switches of the first sub-path (393) formed in the second connection mode may be turned off. The RF stress direction of each of the turned-off path switches may be the RF stress direction of the first direction (901). The shunt transistors of each of the first sub-path switch (421) and the second antenna path switch (432) may operate according to the RF stress direction. For example, the electronic device (101) may include a first controller (1010) for controlling the first sub-path switch (421) and a second controller (1030) for controlling the second antenna path switch (432).

[0103] In one embodiment, the electronic device (101) may include a first controller (1010). The first controller (1010) may be a transistor control circuit for a first sub-path switch (421). The first controller (1010) may control whether each transistor of the first sub-path switch (421) is turned on or off according to a first input indicating whether the first sub-path switch (421) is turned on or off (e.g., set to “OFF” in the first connection mode), a second input indicating a designated direction (e.g., indicating a first direction (901) toward the “right”), and a third input indicating whether a pull-down is performed (e.g., not performed (“NO”)). The designated direction may indicate an RF stress direction. The pull-down may indicate that all of the shunt transistors are turned on. For example, when the first input indicates that the first sub-path switch (421) is turned on, all of the series transistors of the first sub-path switch (421) may be turned on, and all of the shunt transistors of the first sub-path switch (421) may be turned off. When the first input indicates that the first sub-path switch (421) is turned off, all of the series transistors of the first sub-path switch (421) may be turned off. When the first input indicates that the first sub-path switch (421) is turned off, the shunt transistors of the first sub-path switch (421) to be activated (i.e., turned on) may be determined according to the second input and the third input.

[0104] In one embodiment, the electronic device (101) may include a second controller (1030). The second controller (1030) may be a transistor control circuit for the second antenna path switch (432). The second controller (1030) may control whether each transistor of the second antenna path switch (432) is turned on or off according to a first input indicating whether the second antenna path switch (432) is turned on or off (e.g., set to “OFF” in the first connection mode), a second input indicating a designated direction (e.g., indicating a first direction (901) toward “right”), and a third input indicating whether a pull-down is performed (e.g., performed (“YES”)). For example, when the first input indicates that the second antenna path switch (432) is turned on, all series transistors of the second antenna path switch (432) may be turned on, and all shunt transistors of the second antenna path switch (432) may be turned off. When the first input indicates that the second antenna path switch (432) is turned off, all of the series transistors of the second antenna path switch (432) can be turned off. When the first input indicates that the second antenna path switch (432) is turned off, the shunt transistors of the second antenna path switch (432) to be activated (i.e., turned on) can be determined according to the second input and the third input.

[0105] The first sub-path switch (421) may include series transistors and shunt transistor circuits. For example, the series transistors may include a first series transistor (1011), a second series transistor (1012), and / or a third series transistor (1013). The shunt transistor circuits may include a first shunt transistor circuit (1021) and a second shunt transistor circuit (1022). The first shunt transistor circuit (1021) may include a first shunt transistor (1021a), a second shunt transistor (1021b), and a third shunt transistor (1021c). The second shunt transistor circuit (1022) may include a first shunt transistor (1022a), a second shunt transistor (1022b), and a third shunt transistor (1022c).

[0106] The second antenna path switch (432) may include series transistors and shunt transistor circuits. For example, the series transistors may include a first series transistor (1031), a second series transistor (1032), and a third series transistor (1033). The shunt transistor circuits may include a first shunt transistor circuit (1041) and a second shunt transistor circuit (1042). The first shunt transistor circuit (1041) may include a first shunt transistor (1041a), a second shunt transistor (1041b), and a third shunt transistor (1041c). The second shunt transistor circuit (1042) may include a first shunt transistor (1042a), a second shunt transistor (1042b), and a third shunt transistor (1042c).

[0107] Assume that an RF signal having a voltage of up to about 30 V is transmitted through a transmission path. Assuming that the maximum voltage applied to one port of the path switch is about 30 V and that the withstand voltage of one transistor is up to 10 V, each shunt transistor circuit may include three shunt transistors. In addition, since the shunt transistor circuit is connected between two series transistors and the RF voltage is sequentially canceled in each series transistor, at least three shunt transistor circuits may be required in the path between the RFFE module and the antenna (e.g., the first sub-path (393)). Through this principle, the number of shunt transistors activated in each transistor circuit may increase in ascending order along the designated direction (e.g., the first direction (901)). According to one embodiment, the number of activated shunt transistor(s) in each shunt transistor circuit may be gradually increased up to a maximum number (e.g., three) of shunt transistors connected between the electrical path corresponding to the first sub-path (393) and the ground. For example, in the first connection mode, among the shunt transistors of the first shunt transistor circuit (1021), only the third shunt transistor (1021c) may be turned on, and the first shunt transistor (1021a) and the second shunt transistor (1021b) may be turned off. Among the shunt transistors of the second shunt transistor circuit (1022), the second shunt transistor (1022b) and the third shunt transistor (1022c) may be turned on, and the first shunt transistor (1022a) may be turned off. Afterwards, both the shunt transistors of the first shunt transistor circuit (1041) and the second shunt transistor circuit (1042) of the second antenna path switch (432) can be turned on.

[0108] The first controller (1010) of the electronic device (101) can control the on / off of each transistor of the first sub-path switch (421) by transmitting a control signal to each transistor. The second controller (1030) of the electronic device (101) can control the on / off of each transistor of the second antenna path switch (432) by transmitting a control signal to each transistor. For example, the operation of the first controller (1010) can operate according to the logic shown in the table below. '0' of each transistor represents off, and '1' represents on.

[0109] Input control signal 1st input (OFF: 0, 1: ON) 3rd input (Pull down) (0: Yes, 1: No) 2nd input (direction) (0: Left, 1: Right) 1st series transistor (1011) 2nd series transistor (1012) 3rd series transistor (1013) 1st shunt transistor (1021a) 1st shunt transistor (1021b) 1st shunt transistor (1021c) 1st shunt transistor (1022a) 1st shunt transistor (1022b) 1st shunt transistor (1022c) 00000001100110000111111100011111110001110000001111000000101110000001111000000

[0110] [Table 1] is described based on the first controller (1010), but embodiments of the present disclosure are not limited thereto. As illustrated in FIG. 10a, since the first sub-path switch (421) and the second antenna path switch (432) include the same number of series transistors and shunt transistors, operations according to [Table 1] can be equally applied to the second controller (1020).

[0111] Referring to FIG. 10B, the electronic device (101) may operate in a first connection mode of antenna switching diversity. As the first connection mode operates, the path switches of the first sub-path (394) formed in the second connection mode may be turned off. The RF stress direction of each of the turned-off path switches may be the RF stress direction of the second direction (902). The shunt transistors of each of the second sub-path switch (422) and the first antenna path switch (431) may operate according to the RF stress direction. For example, the electronic device (101) may include a first controller (1050) for controlling the first antenna path switch (431) and a second controller (1070) for controlling the second sub-path switch (422).

[0112] The electronic device (101) may include a first controller (1050). The first controller (1050) may be a transistor control circuit for the first antenna path switch (431). The first controller (1050) may control whether each transistor of the first antenna path switch (431) is turned on or off according to a first input indicating whether the first antenna path switch (431) is turned on or off (e.g., set to “OFF” in the first connection mode), a second input indicating a designated direction (e.g., indicating a second direction (902) toward “left”), and a third input indicating whether a pull-down is performed (e.g., not performed (“NO”)). For example, when the first input indicates that the first antenna path switch (431) is turned on, all series transistors of the first antenna path switch (431) may be turned on, and all shunt transistors of the first antenna path switch (431) may be turned off. When the first input indicates that the first antenna path switch (431) is turned off, all of the series transistors of the first antenna path switch (431) can be turned off. When the first input indicates that the first antenna path switch (431) is turned off, the shunt transistors to be activated (i.e., turned on) among the shunt transistors of the first antenna path switch (431) can be determined according to the second input and the third input.

[0113] The electronic device (101) may include a second controller (1070). The second controller (1070) may be a transistor control circuit for the second sub-path switch (422). The second controller (1070) may control whether each transistor of the second antenna path switch (432) is turned on or off according to a first input indicating whether the second sub-path switch (422) is turned on or off (e.g., set to “OFF” in the first connection mode), a second input indicating a designated direction (e.g., indicating a second direction (902) toward “left”), and a third input indicating whether a pull-down is performed (e.g., performed (“YES”)). For example, when the first input indicates that the second sub-path switch (422) is turned on, all series transistors of the second sub-path switch (422) may be turned on, and all shunt transistors of the second sub-path switch (422) may be turned off. When the first input indicates that the second sub-path switch (422) is turned off, all of the series transistors of the second sub-path switch (422) can be turned off. When the first input indicates that the second sub-path switch (422) is turned off, the shunt transistors of the second sub-path switch (422) to be activated (i.e., turned on) can be determined among the shunt transistors.

[0114] The first antenna path switch (431) may include series transistors and shunt transistor circuits. The series transistors may include a first series transistor (1051), a second series transistor (1052), and a third series transistor (1053). The shunt transistor circuits may include a first shunt transistor circuit (1061) and a second shunt transistor circuit (1062). The first shunt transistor circuit (1061) may include a first shunt transistor (1061a), a second shunt transistor (1061b), and a third shunt transistor (1061c). The second shunt transistor circuit (1062) may include a first shunt transistor (1062a), a second shunt transistor (1062b), and a third shunt transistor (1062c). For example, the first controller (1050) can control the first antenna path switch (431) according to [Table 1].

[0115] The second sub-path switch (422) may include series transistors and shunt transistor circuits. The series transistors may include a first series transistor (1071), a second series transistor (1072), and a third series transistor (1073). The shunt transistor circuits may include a first shunt transistor circuit (1081) and a second shunt transistor circuit (1082). The first shunt transistor circuit (1081) may include a first shunt transistor (1081a), a second shunt transistor (1081b), and a third shunt transistor (1081c). The second shunt transistor circuit (1082) may include a first shunt transistor (1082a), a second shunt transistor (1082b), and a third shunt transistor (1082c). For example, the second controller (1070) can control the second sub-path switch (422) according to [Table 1].

[0116] Assume that an RF signal having a voltage of up to about 30 V is transmitted through a transmission path. Assuming that the maximum voltage applied to one port of a path switch is about 30 V and that one transistor can withstand a withstand voltage of up to 10 V, one shunt transistor circuit may include three shunt transistors. In addition, since the shunt transistor circuit is connected between two series transistors and the RF voltage is sequentially canceled in each series transistor, at least three shunt transistor circuits may be required in the path between the RFFE module and the antenna (e.g., the second sub-path (394)). Through this principle, the number of shunt transistors activated in each transistor circuit may increase in ascending order along the designated direction (e.g., the second direction (902)). According to one embodiment, the number of activated shunt transistor(s) in each shunt transistor circuit may be gradually increased up to a maximum number (e.g., three) of shunt transistors connected between the electrical path corresponding to the second sub-path (394) and the ground. For example, in the first connection mode, among the shunt transistors of the first shunt transistor circuit (1061), only the third shunt transistor (1061c) may be turned on, and the first shunt transistor (1061a) and the second shunt transistor (1061b) may be turned off. Among the shunt transistors of the second shunt transistor circuit (1062), the second shunt transistor (1062b) and the third shunt transistor (1062c) may be turned on, and the first shunt transistor (1062a) may be turned off. Afterwards, both the shunt transistors of the first shunt transistor circuit (1081) and the second shunt transistor circuit (1082) of the second sub-path switch (422) can be turned on.

[0117] Referring to the circuit structure illustrated in FIG. 10b and the circuit structure of FIG. 8, it can be confirmed that the number of transistors included in the second sub-path switch (422) and the number of transistors included in the first antenna path switch (431) are reduced. Even though it is designed to withstand an RF stress of up to about 30 V, since the direction of the RF stress is unknown in FIG. 8, additional shunt transistor circuits are required. However, since the transistor circuit in FIG. 10b determines the activation method of the shunt transistors according to the direction of the RF stress, the number of transistors included in the path switch can be reduced. For example, the number of shunt transistors in FIG. 8 is 15, but the number of shunt transistor circuits in FIG. 10b is 12.

[0118] An electronic device (e.g., electronic device (101)) according to embodiments of the present disclosure may include a switching circuit (e.g., a first switching circuit (241) and a second switching circuit (242)) connected to each RFFE module to overcome the limitation of the physical distance between the RFFE module and the antenna when implementing antenna switching diversity. At this time, in the second connection mode, isolation may be required to reduce path loss due to the two switching circuits (e.g., the first switching circuit (241) and the second switching circuit (242)). The electronic device (101) may include a structure in which transistors for satisfying the requirement for isolation are distributed across the two switching circuits. In addition, the arrangement of shunt transistors within the path switches may be designed (e.g., optimized) based on the RF stress direction of each path switch within the switching circuit. Since insertion loss is lowered due to a smaller number of transistors in the second connection mode, communication performance in the second connection mode may be improved.

[0119] The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects that are not mentioned can be clearly understood by a person having ordinary skill in the art to which the present disclosure belongs from the description below.

[0120] In embodiments, an electronic device (101) is provided. The electronic device (101) may include a plurality of antennas including a first antenna (251) and a second antenna (252), an RF (radio frequency) transceiver (220), a first RFFE (radio frequency front end) module (231) connected to the RF transceiver (220) and configured to transmit or receive a signal, a second RFFE module (232) connected to the RF transceiver (220) and configured to receive a signal, a first switching circuit (241) connected to the first RFFE module (231), and a second switching circuit (242) connected to the second RFFE module (232). The first switching circuit (241) may be configured to selectively electrically connect the first RFFE module (231) to the first antenna (251) in a first connection mode or to the second antenna (252) via the second switching circuit (242) in a second connection mode. The second switching circuit (242) may be configured to selectively electrically connect the second RFFE module (232) to the second antenna (252) in the first connection mode or to the first antenna (251) via the first switching circuit (241) in the second connection mode. Within the first switching circuit (241), the insertion loss of the first secondary path switch (421) configured to electrically connect the first RFFE module (231) and the second switching circuit (242) in the second connection mode may be smaller than the insertion loss of the first primary path switch (411) configured to electrically connect the first RFFE module (231) and the first antenna (251) in the first connection mode.Within the second switching circuit (242), the insertion loss of the second secondary path switch (422) configured to connect the second RFFE module (232) and the first switching circuit (241) in the second connection mode may be smaller than the insertion loss of the second primary path switch (412) configured to connect the second RFFE module (232) and the second antenna (252) in the first connection mode.

[0121] For example, in the first connection mode, the first RFFE module (231) may be electrically connected to the first antenna (251) through the first main path switch (411) of the first switching circuit (241). In the second connection mode, the first RFFE module (231) may be electrically connected to the second antenna (252) through the first sub path switch (421) of the first switching circuit (241) and the second antenna path switch (432) of the second switching circuit (242). The sum of the insertion loss of the first sub path switch (421) and the insertion loss of the second antenna path switch (432) may be within a threshold range based on the insertion loss of the first main path switch (411), in decibel units.

[0122] For example, the critical range may represent an error range corresponding to 1 / 4 of the insertion loss of the first main path switch (411) based on the insertion loss of the first main path switch (411).

[0123] For example, in the first connection mode, the second RFFE module (232) may be electrically connected to the second antenna (252) through the second main path switch (412) of the second switching circuit (242). In the second connection mode, the second RFFE module (232) may be electrically connected to the first antenna (251) through the second sub path switch (422) of the second switching circuit (242) and the first antenna path switch (431) of the first switching circuit (241). The sum of the insertion loss of the second sub path switch (422) and the insertion loss of the first antenna path switch (431) may be within a threshold range corresponding to 1 / 4 of the insertion loss of the second main path switch (412) based on the insertion loss of the second main path switch (412), in decibel units.

[0124] For example, the number of transistors of the first sub-path switch (421) may be smaller than the number of transistors of the first main path switch (411). The number of transistors of the second sub-path switch (422) may be smaller than the number of transistors of the second main path switch (412).

[0125] For example, the transistors of the first main path switch (411) may include series transistors arranged in series and shunt transistor circuits arranged in parallel for the path between the first RFFE module (231) and the first antenna (251). The transistors of the second main path switch (412) may include series transistors arranged in series and shunt transistor circuits arranged in parallel for the path between the second RFFE module (232) and the second antenna (252). The transistors of the first sub path switch (421) may include series transistors arranged in series and shunt transistor circuits arranged in parallel for the path between the first RFFE module (231) and the second switching circuit (242). The transistors of the second sub-path switch (422) may include series transistors arranged in series and shunt transistor circuits arranged in parallel with respect to the path between the second RFFE module (232) and the first switching circuit (241).

[0126] For example, the sum of the number of transistors of the first sub-path switch (421) and the number of transistors of the second antenna path switch (432) may be within a critical range based on the number of transistors of the first main path switch (411). The sum of the number of transistors of the second sub-path switch (422) and the number of transistors of the first antenna path switch (431) may be within a critical range based on the number of transistors of the second main path switch (412).

[0127] For example, the first switching circuit (241) may include a first main path switch (411) for connecting the first RFFE module (231) and the first antenna (251), a first sub path switch (421) for connecting the first RFFE module (231) and the second switching circuit (242), a first antenna path switch (431) for connecting the second switching circuit (242) and the first antenna (251), and a first isolation path switch (441) for connecting the second switching circuit (242). The second switching circuit (242) may include a second main path switch (412) for connecting the second RFFE module (232) and the second antenna (252), a second sub path switch (422) for connecting the second RFFE module (232) and the first switching circuit (241), a second antenna path switch (432) for connecting the first switching circuit (241) and the second antenna (252), and a second isolation path switch (442) for connecting the first switching circuit (241). Each of the first main path switch (411), the first sub path switch (421), the first antenna path switch (431), the first isolation path switch (441), the second main path switch (412), the second sub path switch (422), the second antenna path switch (432), and the second isolation path switch (442) may include series transistors for path connection and shunt transistors connected to ground. While the series transistors are turned on, the shunt transistors may be turned off. While the series transistors are turned off, at least one shunt transistor among the shunt transistors may be turned on.

[0128] For example, the shunt transistors may be divided into a plurality of groups. Each group of the plurality of groups may be connected to a node between two consecutive transistors of different combinations of the series transistors.

[0129] For example, the series transistors of the first sub-path switch (421) and the series transistors of the second antenna path switch (432) can provide an electrical path between the first RFFE module (231) and the second antenna (252). The shunt transistors of the first sub-path switch (421) and the shunt transistors of the second antenna path switch (432) can be arranged in parallel to the electrical path. While the series transistors of the first sub-path switch (421) and the series transistors of the second antenna path switch (432) are turned off in the second connection mode, a subset of the shunt transistors among the shunt transistors of the first sub-path switch (421) and the shunt transistors of the second antenna path switch (432) may be turned on. The distribution of the subset of shunt transistors may indicate that a greater number of shunt transistors are turned on as one end of the electrical path gets closer to the center of the electrical path.

[0130] For example, the series transistors of the first sub-path switch (421) and the series transistors of the second antenna path switch (432) can provide an electrical path between the first RFFE module (231) and the second antenna (252). The shunt transistors of the first sub-path switch (421) and the shunt transistors of the second antenna path switch (432) can be arranged in parallel to the electrical path. While the series transistors of the first sub-path switch (421) and the series transistors of the second antenna path switch (432) are turned off in the second connection mode, a subset of the shunt transistors among the shunt transistors of the first sub-path switch (421) and the shunt transistors of the second antenna path switch (432) can be turned on. The distribution of the shunt transistors of the above subset can be represented as being arranged in ascending order within the maximum number of shunt transistors between the electrical path and the ground, based on the specified direction.

[0131] For example, the electronic device (101) may include a first control circuit for controlling the shunt transistors of the first sub-path switch (421), and a second control circuit for controlling the shunt transistors of the second antenna path switch (432). The first control circuit may be configured to control the on or off of each of the shunt transistors of the first sub-path switch (421) according to a first input indicating whether the first sub-path switch (421) is on or off, a second input indicating the designated direction, and a third input indicating whether to perform a pull-down to turn on all of the shunt transistors of the first sub-path switch (421). The second control circuit may be configured to control the on or off of each of the shunt transistors of the second antenna path switch (432) according to a first input indicating whether the second antenna path switch (432) is on or off, a second input indicating the designated direction, and a third input indicating whether to perform a pull-down to turn on all of the shunt transistors of the second antenna path switch (432).

[0132] For example, the insertion loss of the first main path switch (411) may be within a 20% error range based on the sum of the insertion loss of the first sub path switch (421) and the insertion loss of the first antenna path switch (431), in decibel units. The insertion loss of the second main path switch (412) may be within a 20% error range based on the sum of the insertion loss of the second sub path switch (422) and the insertion loss of the second antenna path switch (432), in decibel units.

[0133] For example, the insertion loss of the first main path switch (411) may be within a 20% error range based on a value that is twice the insertion loss of the first sub path switch (421) in decibel units. The insertion loss into the second main path switch (412) may be within a 20% error range based on a value that is twice the insertion loss of the second sub path switch (422) in decibel units.

[0134] For example, the first switching circuit (241) may be a dual-pole dual-throw (DPDT), and the second switching circuit (242) may be a DPDT. A first output of the first switching circuit (241) may be electrically connected to the first antenna (251). A first output of the second switching circuit (242) may be electrically connected to the second antenna (252). A first input of the first switching circuit (241) may be electrically connected to the first RFFE module (231), and a second input of the first switching circuit (241) may be electrically connected to a second output of the second switching circuit (242). The first input of the second switching circuit (242) may be electrically connected to the second RFFE module (232), and the second input of the second switching circuit (242) may be electrically connected to the second output of the first switching circuit (241).

[0135] In embodiments, a radio frequency (RF) switch is provided. The RF switch may include a first port, a second port, a third port, a fourth port, a first path switch for electrically connecting the first port and the third port, a second path switch for electrically connecting the first port and the fourth port, a third path switch for electrically connecting the second port and the third port, and a fourth path switch for electrically connecting the second port and the fourth port. An insertion loss of the second path switch may be less than an insertion loss of the first path switch. A value of twice the insertion loss of the second path switch in decibel units may be within a critical range based on the insertion loss of the first path switch.

[0136] For example, each of the first path switch, the second path switch, the third path switch, and the fourth path switch may include series transistors for path connection and shunt transistors connected to ground. While the series transistors are turned on, the shunt transistors may be turned off. While the series transistors are turned off, at least one shunt transistor among the shunt transistors may be turned on.

[0137] For example, the number of series transistors of the second path switch may be smaller than the number of series transistors of the first path switch, and the number of shunt transistors of the second path switch may be smaller than the number of shunt transistors of the first path switch.

[0138] For example, the critical range may represent an error range corresponding to 1 / 4 of the insertion loss of the first path switch based on the insertion loss of the first path switch.

[0139] For example, the insertion loss of the first path switch may be within a 20% error range based on the sum of the insertion loss of the second path switch and the insertion loss of the third antenna path switch, in decibel units.

[0140] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, electronic devices, or home appliances. Electronic devices according to the embodiments of this document are not limited to the aforementioned devices.

[0141] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another component (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

[0142] The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0143] Various embodiments of the present document may be implemented as software (e.g., a program (140)) including one or more instructions stored in a storage medium (e.g., an internal memory (136) or an external memory (138)) readable by a machine (e.g., an electronic device (101)). For example, a processor (e.g., a processor (120)) of the machine (e.g., an electronic device (101)) may call at least one instruction among the one or more instructions stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.

[0144] According to one embodiment, the method according to various embodiments disclosed in the present document may be provided as included in a computer program product. The computer program product may be traded as a product between a seller and a buyer. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) via an application store (e.g., Play Store™) or directly between two user devices (e.g., smart phones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily generated in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0145] According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and placed in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In electronic devices, A plurality of antennas including a first antenna and a second antenna; RF(radio frequency) transmitter and receiver; A first radio frequency front end (RFFE) module connected to the RF transceiver and configured to transmit or receive a signal; A second RFFE module connected to the RF transceiver and configured to receive a signal; a first switching circuit connected to the first RFFE module; and A second switching circuit connected to the second RFFE module is included, The first switching circuit is configured to electrically connect the first RFFE module selectively to the first antenna in a first connection mode or to the second antenna via the second switching circuit in a second connection mode, The second switching circuit is configured to electrically connect the second RFFE module to the second antenna in the first connection mode or to the first antenna via the first switching circuit in the second connection mode, In the first switching circuit, the insertion loss of the first secondary path switch configured to electrically connect the first RFFE module and the second switching circuit in the second connection mode is smaller than the insertion loss of the first primary path switch configured to electrically connect the first RFFE module and the first antenna in the first connection mode. In the second switching circuit, the insertion loss of the second sub-path switch configured to connect the second RFFE module and the first switching circuit in the second connection mode is smaller than the insertion loss of the second main path switch configured to be connected, Electronic devices.

2. In claim 1, In the first connection mode, the first RFFE module is electrically connected to the first antenna through the first main path switch of the first switching circuit, In the second connection mode, the first RFFE module is electrically connected to the second antenna through the first sub-path switch of the first switching circuit and the second antenna path switch of the second switching circuit, The sum of the insertion loss of the first sub-path switch and the insertion loss of the second antenna path switch is, in decibel units, within a critical range based on the insertion loss of the first main path switch. Electronic devices.

3. In claim 2, The above critical range represents an error range corresponding to 1 / 4 of the insertion loss of the first main path switch based on the insertion loss of the first main path switch. Electronic devices.

4. In claim 3, In the first connection mode, the second RFFE module is electrically connected to the second antenna through the second main path switch of the second switching circuit, In the second connection mode, the second RFFE module is electrically connected to the first antenna through the second sub-path switch of the second switching circuit and the first antenna path switch of the first switching circuit, The sum of the insertion loss of the second secondary path switch and the insertion loss of the first antenna path switch is within a critical range corresponding to 1 / 4 of the insertion loss of the second primary path switch based on the insertion loss of the second primary path switch, in decibel units. Electronic devices.

5. In claim 2, The number of transistors of the first sub-path switch is smaller than the number of transistors of the first main path switch, The number of transistors of the second secondary path switch is smaller than the number of transistors of the second primary path switch. Electronic devices.

6. In claim 5, The transistors of the first main path switch include series transistors arranged in series and shunt transistor circuits arranged in parallel with respect to the path between the first RFFE module and the first antenna, The transistors of the second main path switch include series transistors arranged in series and shunt transistor circuits arranged in parallel with respect to the path between the second RFFE module and the second antenna, The transistors of the first sub-path switch include series transistors arranged in series and shunt transistor circuits arranged in parallel for the path between the first RFFE module and the second switching circuit, The transistors of the second sub-path switch include series transistors arranged in series and shunt transistor circuits arranged in parallel for the path between the second RFFE module and the first switching circuit. Electronic devices.

7. In claim 5, The transistors of the first main path switch include series transistors arranged in series and shunt transistor circuits arranged in parallel with respect to the path between the first RFFE module and the first antenna, The transistors of the second main path switch include series transistors arranged in series and shunt transistor circuits arranged in parallel with respect to the path between the second RFFE module and the second antenna, The transistors of the first sub-path switch include series transistors arranged in series and shunt transistor circuits arranged in parallel for the path between the first RFFE module and the second switching circuit, The transistors of the second sub-path switch include series transistors arranged in series and shunt transistor circuits arranged in parallel for the path between the second RFFE module and the first switching circuit. Electronic devices.

8. In claim 1, The first switching circuit includes a first main path switch for connecting the first RFFE module and the first antenna, a first sub path switch for connecting the first RFFE module and the second switching circuit, a first antenna path switch for connecting the second switching circuit and the first antenna, and a first isolation path switch for connecting with the second switching circuit. The second switching circuit includes a second main path switch for connecting the second RFFE module and the second antenna, a second sub path switch for connecting the second RFFE module and the first switching circuit, a second antenna path switch for connecting the first switching circuit and the second antenna, and a second isolation path switch for connecting to the first switching circuit. Each of the first main path switch, the first sub path switch, the first antenna path switch, the first isolation path switch, the second main path switch, the second sub path switch, the second antenna path switch, and the second isolation path switch includes series transistors for path connection and shunt transistors connected to ground, While the above series transistors are turned on, the above shunt transistors are turned off, While the above series transistors are turned off, at least one shunt transistor among the above shunt transistors is turned on. Electronic devices.

9. In claim 8, The above shunt transistors are divided into multiple groups, Each group of the above plurality of groups is connected to a node between two consecutive transistors of different combinations of the above series transistors. Electronic devices.

10. In claim 8, The series transistors of the first sub-path switch and the series transistors of the second antenna path switch provide an electrical path between the first RFFE module and the second antenna, The shunt transistors of the first sub-path switch and the shunt transistors of the second antenna path switch are arranged in parallel in the electrical path, While the series transistors of the first sub-path switch and the series transistors of the second antenna path switch are turned off in the second connection mode, a subset of the shunt transistors among the shunt transistors of the first sub-path switch and the shunt transistors of the second antenna path switch are turned on, The distribution of the shunt transistors of the above subset indicates that a greater number of shunt transistors are turned on as one gets closer to the center of the electrical path from one end of the electrical path. Electronic devices.

11. In claim 8, The series transistors of the first sub-path switch and the series transistors of the second antenna path switch provide an electrical path between the first RFFE module and the second antenna, The shunt transistors of the first sub-path switch and the shunt transistors of the second antenna path switch are arranged in parallel in the electrical path, While the series transistors of the first sub-path switch and the series transistors of the second antenna path switch are turned off in the second connection mode, a subset of the shunt transistors among the shunt transistors of the first sub-path switch and the shunt transistors of the second antenna path switch are turned on, The distribution of the shunt transistors of the above subset is arranged in ascending order within the maximum number of shunt transistors between the electrical path and the ground, based on the specified direction. Electronic devices.

12. In claim 11, A first control circuit for controlling the shunt transistors of the first sub-path switch; and Further comprising a second control circuit for controlling the shunt transistors of the second antenna path switch, The first control circuit is configured to control the on or off of each of the shunt transistors of the first sub-path switch according to a first input indicating whether the first sub-path switch is on or off, a second input indicating the designated direction, and a third input indicating whether to perform a pull-down to turn on all of the shunt transistors of the first sub-path switch. The second control circuit is configured to control the on or off of each of the shunt transistors of the second antenna path switch according to a first input indicating whether the second antenna path switch is on or off, a second input indicating the designated direction, and a third input indicating whether to perform a pull-down to turn on all of the shunt transistors of the second antenna path switch. Electronic devices.

13. In claim 8, The insertion loss of the first main path switch is within a 20% error range based on the sum of the insertion loss of the first sub path switch and the insertion loss of the first antenna path switch, in decibel units. The insertion loss of the second main path switch is, in decibel units, within a 20% error range based on the sum of the insertion loss of the second sub path switch and the insertion loss of the second antenna path switch. Electronic devices.

14. In claim 1, The insertion loss of the first main path switch is within a 20% error range based on twice the insertion loss of the first sub path switch in decibel units, The insertion loss into the second main path switch is within a 20% margin of error based on twice the insertion loss of the second sub path switch in decibel units. Electronic devices.

15. In claim 1, The first switching circuit is a DPDT (dual-pole dual-throw), and the second switching circuit is a DPDT. The first output of the first switching circuit is electrically connected to the first antenna, The first output of the second switching circuit is electrically connected to the second antenna, A first input of the first switching circuit is electrically connected to the first RFFE module, and a second input of the first switching circuit is electrically connected to a second output of the second switching circuit. The first input of the second switching circuit is electrically connected to the second RFFE module, and the second input of the second switching circuit is electrically connected to the second output of the first switching circuit. Electronic devices.

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