Method for forming dielectric layer

Abstract

Disclosed is a technique related to a method for forming a dielectric layer. A dielectric layer of the present embodiment is a method for forming a dielectric layer by using a substrate processing apparatus comprising: at least one process module comprising a chamber for carrying out a process in a vacuum atmosphere; a transfer module maintaining the vacuum state and disposed adjacent to the process module so as to transport and remove a substrate to / from the process module; a standby module for storing the substrate and putting same on standby in an atmospheric pressure environment; and a load-lock module positioned between the transfer module and the standby module so as to buffer the pressure difference between the transfer module and the standby module. First, a substrate is loaded into the chamber, and then at least one high-dielectric thin film is deposited on the upper portion of the substrate. The substrate having the high-dielectric thin film formed thereon is unloaded into the standby module and normalized for a predetermined time so as to form a leakage prevention layer comprising a native oxide layer on the upper portion of the high-dielectric thin film. The at least one high-dielectric thin film is deposited on the upper portion of the native oxide layer.

Description

Dielectric film formation method

[0001] The present invention relates to semiconductor manufacturing technology, and more specifically, to a method for forming a dielectric film capable of securing high dielectric constant and leakage current characteristics.

[0002] In order to improve the capacity of DRAM, a representative semiconductor memory device, research is continuously being conducted on increasing the surface area of ​​capacitor electrodes, changing the shape of capacitor electrodes in three dimensions, and increasing the permittivity of capacitor dielectric films.

[0003] Currently, technologies are being proposed to utilize high-k dielectric films, such as HfO2 and ZrO2, as capacitor dielectric films. However, while these high-k dielectric films offer high permittivity, they suffer from high leakage current. To improve the leakage current of high-k dielectric films, a technology has been proposed that interposes a leakage barrier film within the high-k dielectric film. Al2O3 films are typically used as such leakage barrier films.

[0004] However, since the Al2O3 maintains an amorphous state in the temperature range of approximately 300°C where the ALD process is performed, its dielectric constant becomes very low, at around 8. Therefore, when Al2O3 is used as a leakage barrier film, although the leakage current of the dielectric film can be improved, there is a problem in which the dielectric constant of the dielectric film is actually reduced.

[0005] The present embodiment provides a method for forming a dielectric film capable of preventing leakage current while securing a high dielectric constant.

[0006] According to one embodiment of the present invention, a method for forming a dielectric film is provided, comprising: a substrate processing device including at least one process module including a chamber for performing a process in a vacuum atmosphere; a transfer module positioned adjacent to the process module while maintaining the vacuum state to transfer and unload a substrate to and from the process module; a waiting module for storing and waiting the substrate in an atmospheric pressure environment; and a load lock module positioned between the transfer module and the waiting module to buffer a pressure difference between the transfer module and the waiting module, the method comprising: loading a substrate into the chamber, and then depositing at least one high-k thin film on the substrate; unloading the substrate on which the high-k thin film has been formed into the waiting module and normalizing it for a predetermined period of time, thereby forming a leakage prevention film including a native oxide film on the high-k thin film; and depositing the at least one high-k thin film on the native oxide film.

[0007] In addition, a method for forming a dielectric film according to an embodiment of the present invention is a method for forming a dielectric film on an upper portion of a substrate using a substrate processing device including a process module including a chamber that maintains a vacuum atmosphere and defines a processing space therein, a substrate supporter located in a lower region of the chamber on which a substrate is placed, and a shower head structure located in an upper region of the chamber that sprays a plurality of gases on an upper portion of the substrate, and an atmosphere module that maintains an atmospheric pressure environment and a room temperature and stores a substrate that has been or is to be processed, the method comprising: (a) repeating a first deposition cycle at least once on an upper portion of the substrate resultant to deposit a lower high-k dielectric film; (b) forming a native oxide film on an upper portion of the lower high-k dielectric film; and (c) repeating a second deposition cycle at least once on an upper portion of the native oxide film to deposit an upper high-k dielectric film. Steps (a) to (c) may be repeated at least once.

[0008] According to this embodiment, the natural oxide film generated by the normalization process can be utilized as a leakage prevention film within the high-k dielectric film. Accordingly, leakage current characteristics and a high effective permittivity can be secured.

[0009] FIG. 1 is a plan view showing a substrate processing device for depositing a dielectric film according to one embodiment of the present invention.

[0010] FIG. 2a is a schematic cross-sectional view showing a single-wafer process module according to one embodiment of the present invention.

[0011] FIG. 2b is a schematic cross-sectional view of a process module of a space division method according to one embodiment of the present invention.

[0012] Figure 2c is a plan view of the shower head structure of Figure 2b.

[0013] Figure 3 is a cross-sectional view illustrating a method for forming a dielectric film according to one embodiment of the present invention.

[0014] Figure 4 is a flow chart for explaining a method for forming a dielectric film according to one embodiment of the present invention.

[0015] FIG. 5 is a timing diagram for explaining a method for forming a dielectric film according to one embodiment of the present invention.

[0016] Figure 6 is a flow chart for explaining a method for forming a dielectric film according to one embodiment of the present invention.

[0017] Figure 7 is a timing diagram for explaining a method for forming a dielectric film according to one embodiment of the present invention.

[0018] FIGS. 8A to 8D are cross-sectional views illustrating a dielectric film according to embodiments of the present invention.

[0019] FIG. 9 is a cross-sectional view of a semiconductor device including a capacitor according to one embodiment of the present invention.

[0020] Fig. 10 is a graph showing the leakage current of a dielectric film according to an applied voltage according to one embodiment of the present invention.

[0021] Fig. 11 is a graph showing the dielectric constant of a dielectric film according to one embodiment of the present invention.

[0022] The advantages and features of the present invention, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms. These embodiments are provided only to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims. The sizes and relative sizes of layers and regions in the drawings may be exaggerated for clarity of description. Like reference numerals refer to like elements throughout the specification.

[0023] FIG. 1 is a plan view showing a substrate processing system for depositing a dielectric film according to one embodiment of the present invention. FIG. 2 is a schematic cross-sectional view of the substrate processing device of FIG. 1.

[0024] Referring to FIG. 1, a substrate processing device (10) may include an Equipment Front End Module (EFEM) 20, a load lock chamber (30), a transfer module (40), and a plurality of process modules (50). The EFEM (20) may be an atmospheric module that maintains an atmospheric pressure (1 atm) environment. The EFEM (20) may include a load port (15), and the load port (15) may include at least one storage chamber (15a, 15b, 15c) called a front open unified pod (FOUP). The load port (15) may be connected to the EFEM (20) and may maintain atmospheric pressure (about 1 atm) and room temperature (20° C. to 25° C.).

[0025] The load lock chamber (30) is positioned between the EFEM (20), which is the atmospheric module, and the transfer module (40), and can buffer the pressure difference between the atmospheric module and the transfer module (40). For example, the load lock chamber (30) can selectively maintain a vacuum state and an atmospheric pressure state. When a substrate is exchanged between the load lock chamber (30) and the transfer module (40) that maintains a vacuum state, the load lock chamber (30) can maintain the same vacuum state as the transfer module (40). In addition, when a substrate is exchanged between the load lock chamber (30) and the EFEM (20), the load lock chamber (30) can maintain an atmospheric pressure. Here, the exchange between the two members may mean the movement of the substrate between the two members.

[0026] The above-described standby module, i.e., EFEM (20), may further include a substrate transfer member (not shown) for transferring a substrate between the storage chamber (15a, 15b, 15c) and the load lock chamber (30). The substrate transfer member may move a substrate (not shown) stored in the storage chamber (15a, 15b, 15c) to the load lock chamber (30), and may move the substrate, for which a process has been completed, from the load lock chamber (30) to the storage chamber (15a, 15b, 15c).

[0027] The transfer module (40) may include a transfer robot (45) for transferring a substrate provided from the load lock chamber (30) to the process module (50a, 50b, 50c) or for transferring a substrate whose process has been completed in the process module (50a, 50b, 50c) to the load lock chamber (30).

[0028] The process module (50) is arranged to be connected to the transfer module (40). The transfer module (40) may include multiple sides. The load lock chamber (30) may be installed on one side of the transfer module (40), and the process modules (50a, 50b, 50c) may be installed on the remaining sides. A gate (not shown) may be positioned between the process module (50) and the transfer module (40) so as to communicate with each other.

[0029] FIG. 2a is a schematic cross-sectional view showing a single-wafer process module according to one embodiment of the present invention.

[0030] The single wafer process module (50) may be a single wafer structure including a chamber (100), a single shower head (110), and a substrate support (120), as illustrated in FIG. 2A. In addition, the process module (50) may further include a gas supply unit (140), a power supply unit (150), a matching network (160), and a controller (180). As an exemplary embodiment, the substrate processing device (10) may be an ALD (atomic layer deposition) device. As another example, the substrate processing device (10) may be a PEALD (Plasma Enhanced atomic layer deposition) device or a PECVD (Plasma Enhanced Chemical Vapor Deposition) device.

[0031] The chamber (100) may include a main body (101) and a top lid (top lid: 105). The main body (101) of the chamber (100) may define a space for processing a substrate, for example, a space for depositing a thin film. The main body (101) may have an open top. The top lid (105) may be installed on the upper outer periphery of the main body (101). The top lid (105) has a cover shape having a window (not shown) into which the shower head (110) can be inserted. In some cases, the substrate processing device (10) may further include an insulating ring (r) interposed between the shower head (110) and the top lid (105). The insulating ring (r) may electrically insulate the chamber (100), more specifically, the top lid (105) and the shower head (110).

[0032] The main body (101) may have a gate (G) on its side. A substrate to be processed may be loaded and unloaded through the gate (G).

[0033] The chamber (100) may further include an exhaust port (102) connected to the lower end of the main body (101). In addition, the substrate processing device (10) may further include a pump (103) connected to the exhaust port (102). By the pumping operation of the pump (103), the interior of the main body (101) may be evacuated, and process residues may be discharged through the exhaust port (102).

[0034] The shower head (110) can be inserted into the window of the top lid (105) and installed to face the substrate support (120). The shower head (110) can receive a source gas and a reaction gas from the gas supply unit (140) and spray them onto the substrate (W) mounted on the substrate support unit (120). As an exemplary embodiment, the shower head (110) can be electrically connected to the power supply unit (150) and operate as a first electrode for generating plasma.

[0035] The substrate support (120) may include a substrate mounting portion (susceptor) 122 and a support shaft (124). The substrate mounting portion (122) may have an overall flat shape so that at least one substrate (W) may be mounted on its upper surface. The support shaft (124) may be vertically coupled to the rear surface of the substrate mounting portion (122). The support shaft (124) may be provided with a driving force that can raise, lower, and / or rotate the substrate mounting portion (122). As an exemplary embodiment, the substrate mounting portion (122) may have a built-in heater (125). The heater (125) may control the temperature of the substrate (W) to be processed. In addition, the substrate support portion (120) may receive a ground voltage and operate as a second electrode for generating the plasma.

[0036] Here, the distance between the shower head (110) and the substrate support (120), for example, the gas injection distance, is one of the deposition conditions and may vary depending on the process.

[0037] The gas supply unit (140) may include, for example, at least one source gas supply unit (140a) and at least one reaction gas supply unit (140b). The source gas supply unit (140a) may include, for example, a metal precursor for depositing a high-k film. The metal precursor may include, for example, any one of Zr, Hf, Al, La, and Y. As an example, the source gas supply unit (140a) may include a Zr source including ZrCl4, Zr[N(CH3)C2H5]4, Zr(O-tBu)4, Zr[N(CH3)2]4, Zr[N(C2H5)(CH3)]4, Zr[N(C2H5)2]4, Zr(tmhd)4, Zr(OiC3H7)3(tmtd), Zr(OtBu)4, and a compound containing zirconium. As another example, the source gas supply unit (140a) may include a Hf source such as C16H36HfO4, TDEAHf, or TEMAHf.

[0038] The above reaction gas supply unit (140b) may include a reaction gas for reacting with the metal precursor. For example, the reaction gas component may include an O2 source, a H2O source, an N2O, or an O3 source. In addition, although not shown in the drawing, the gas supply unit (140) may further include an inhibitor gas supply unit and a purge gas supply unit.

[0039] The above gas supply unit (140) can be connected to the shower head (110) via a gas supply line (L). At least one valve (V1, V2) can be installed in the gas supply line (L). The valve (V1, V2) can control the supply amount of the gases within the gas supply unit (140).

[0040] The power supply unit (150) can apply a power voltage to the shower head (110) to generate plasma. The matching network (160) can reduce power loss by matching the impedance of the power supply unit (150) and the impedance of the chamber (100).

[0041] The controller (180) is configured to control the overall operation of the substrate processing device (10). For example, the controller (180) can control the operation of each component (110 to 160, V1, V2) of the substrate processing device (10).

[0042] Additionally, although not shown, the controller (180) may include a central processing unit, memory, input / output interfaces, etc.

[0043] A substrate stored in a load port (15) can be transferred to a load lock chamber (30) via a substrate transfer module (20). A substrate waiting in the load lock chamber (30) can be transferred to a process module (50) for depositing a dielectric film via a transfer module (40).

[0044] Fig. 2b is a schematic cross-sectional view of a space-dividing process module according to one embodiment of the present invention, and Fig. 2c is a plan view of the shower head structure of Fig. 2b. For reference, Fig. 2b may be a cross-sectional view taken along line b-b' of Fig. 2c. In addition, in this embodiment, a structure different from the single-wafer process module (50) of Fig. 2a will be described, and a duplicate description of a substantially identical structure will be omitted.

[0045] Referring to FIGS. 2a and 2c, a process module (51) of a space division method may include a chamber (100a), a shower head structure (111) including a plurality of gas injection units (111a to 111g), a gas supply unit (141), and a substrate support unit (121) supporting a plurality of substrates (W).

[0046] The shower head structure (111) may include at least one inhibitor gas injection unit (111a), at least one purge gas injection unit (111b, 111d, 111f), at least one source gas injection unit (111c), at least one reaction gas injection unit (111e), and a curtain gas injection unit (111g).

[0047] As an exemplary embodiment, the shower head structure (111) may include an inhibitor gas injection unit (111a), a first purge gas injection unit (111b), a source gas injection unit (111c), a second purge gas injection unit (111d), a reaction gas injection unit (111e), and a third purge gas injection unit (111f) sequentially arranged in consideration of the process order. It goes without saying that the order of the above-described gas injection units (111a to 111f) may vary depending on the process order.

[0048] The inhibitor gas injection unit (111a), the first purge gas injection unit (111b), the source gas injection unit (111c), the second purge gas injection unit (111d), the reaction gas injection unit (111e), and the third purge gas injection unit (111f) may be arranged radially with respect to the center of the shower head structure (111). In addition, the shower head structure (111) may further be provided with a curtain gas injection unit (111g) at the center to prevent unwanted mixing between gases.

[0049] The above gas supply unit (141) may include an inhibitor gas supply unit (141a), a purge gas supply unit (141b), a source gas supply unit (141c), a reaction gas supply unit (141e), and a curtain gas supply unit (141g).

[0050] The inhibitor gas supply unit (141a) may be connected to the inhibitor gas injection unit (111a) via a gas supply line (L). The purge gas supply unit (141b) may be connected to the first to third purge gas injection units (111b, 111d, 111e) via at least one gas supply line (L). The source gas supply unit (141c) may be connected to the source gas injection unit (111c) via the gas supply line (L), and the reaction gas supply unit (141e) may be connected to the reaction gas injection unit (111e) via the gas supply line (L). Valves (V) may be installed inside the gas supply lines (L) respectively to selectively inject gases and control the flow rate.

[0051] The substrate support member (121) may include a plurality of substrate mounting portions (122a). The plurality of substrate mounting portions (122a) are positioned to correspond to each of the inhibitor gas injection portion (111a), the first purge gas injection portion (111b), the source gas injection portion (111c), the second purge gas injection portion (111d), the reaction gas injection portion (111e), and the third purge gas injection portion (111f).

[0052] The substrate support member (121) can rotate and be raised so that the substrates (w) loaded on the plurality of substrate mounting members (122a) can be processed sequentially.

[0053] As an exemplary embodiment, the shower head structure (111) of the space-divided process module (51), i.e., the inhibitor gas injection unit (111a), the first purge gas injection unit (111b), the source gas injection unit (111c), the second purge gas injection unit (111d), the reaction gas injection unit (111e), and the third purge gas injection unit (111f), may each continuously inject gas, and the substrate support unit (121) may rotate by a predetermined angle, thereby depositing a thin film, for example, a dielectric film, on the substrate (w). Here, the predetermined angle may mean an angle formed with an adjacent gas injection unit.

[0054] Fig. 3 is a cross-sectional view illustrating a dielectric film forming method according to one embodiment of the present invention. Fig. 4 is a flow chart illustrating a dielectric film forming method according to one embodiment of the present invention. Fig. 5 is a timing diagram illustrating a dielectric film forming method according to one embodiment of the present invention.

[0055] Referring to FIGS. 1 to 5, a substrate (not shown) is loaded into the process module (50). A process atmosphere for depositing a dielectric film can be created inside the process module (50), i.e., the chamber (100). For example, the inside of the chamber (100) can maintain a temperature of, for example, 250 to 400° C. and a vacuum atmosphere, and plasma can be generated inside the chamber (100) by the operation of the power supply unit (150). In the chamber (100) where the process atmosphere is created in this way, a lower high-k dielectric film (210) is deposited at least once (S10). As an exemplary embodiment, the lower high-k dielectric film (210) can include an atomic layer, and the atomic layer can be formed by one deposition cycle. At this time, the deposition cycle may include, for example, a step of injecting an inhibitor gas (S11), a step of injecting a first purge gas (S12), a step of injecting a source gas (S13), a step of injecting a second purge gas (S14), a step of injecting a reaction gas (S15), and a step of injecting a third purge gas (S16). The first to third purge gases may include, for example, the same purge gas. However, the present invention is not limited thereto. First, the step of injecting the inhibitor gas (S11) may be performed to deposit the lower high-k dielectric film (210) with a uniform thickness when depositing the lower high-k dielectric film (210) on a non-flat surface. For example, the inhibitor gas may include a gas that reduces the reactivity between the first gas and the deposition surface. Accordingly, the adsorption of the first gas component in the portion where the lower dielectric film (210) is formed relatively thick can be delayed. At this time, the step (S11) of spraying the inhibitor gas can be omitted depending on the state of the surface (hereinafter, deposition surface) on which the lower dielectric film (210) is to be deposited.

[0056] The above first purge gas injection step (S12) can remove the remaining inhibitor component that is not adsorbed on the deposition surface by the purge gas.

[0057] Thereafter, the step of injecting the source gas (S13) is to supply the source gas to the shower head (110) while opening the valve (V1) of Fig. 2, and the shower head (110) injects the source gas onto the substrate at a set flow rate. The source gas component can be physically and chemically adsorbed onto the surface to be deposited. After the step of injecting the source gas (S13), the valve (V1) is closed.

[0058] The second purge gas injection step (S14) injects the purge gas onto the substrate resultant product on which the source gas is adsorbed, thereby removing the unadsorbed source gas component by the purge gas.

[0059] Next, the step of injecting the reaction gas (S15) supplies the reaction gas to the shower head (110) while the valve (V2) of FIG. 2 is open. The shower head (110) injects the reaction gas onto the substrate at a set flow rate. The reaction gas can react with the source gas component adsorbed on the substrate resultant to form a lower high-k dielectric film (210). After the step of injecting the reaction gas (S15) is completed, the valve (V2) is closed.

[0060] Afterwards, the step of injecting the third purge gas (S16) can remove unreacted reaction gas components.

[0061] By repeating the above deposition cycle at least once, the lower high-k dielectric film (210) can be formed.

[0062] Afterwards, the substrate on which the lower dielectric film (210) is deposited can undergo a normalization process (S20). In this embodiment, the normalization process can include a process of cooling the substrate for a predetermined period of time in a device that maintains room temperature and atmospheric pressure. By the normalization process, the stress of the thin film deposited in the previous process, for example, the lower dielectric film (210), is relieved, and the crystal grains of the lower dielectric film (210) are refined and standardized, thereby improving the mechanical properties of the lower dielectric film (210).

[0063] As an exemplary embodiment, the normalization process of the present embodiment may be a process of waiting for a certain period of time in an atmospheric module that maintains atmospheric pressure and room temperature, i.e., a load port (15) of an EFEM (20). During this process, a natural oxide film may be generated on the surface of the lower high-k dielectric film (210), and in the present embodiment, the natural oxide film is used as a leakage prevention film (220) of the dielectric film. At this time, the normalization process time may be adjusted in consideration of the thickness of the leakage prevention film (220). For example, the normalization process of the present embodiment may be performed for 3 to 7 minutes.

[0064] Thereafter, the substrate on which the leak prevention film (220) is formed is loaded into the process module (50) again through the substrate transfer module (20), the load lock chamber (30), and the transfer module (40). Thereafter, an upper high-k dielectric film (230) is deposited at least once on the leak prevention film (220) (S30). For example, the upper high-k dielectric film (230) may include the same material as the lower high-k dielectric film (210). The upper high-k dielectric film (230) includes at least one atomic layer, and the atomic layer may be obtained, for example, by one deposition cycle. A deposition cycle for depositing an upper high-k dielectric film (230) may include, for example, a step of injecting an inhibitor gas (S31), a step of injecting a purge gas (S32), a step of injecting a source gas (S33), a step of injecting the purge gas (S34), a step of injecting a reaction gas (S35), and a step of injecting the purge gas (S36). When the upper high-k dielectric film (230) and the lower high-k dielectric film (210) are made of the same material, the deposition cycle of the upper high-k dielectric film (230) and the deposition cycle of the lower high-k dielectric film (210) may be the same. Accordingly, a duplicate description will be omitted.

[0065] Fig. 6 is a flow chart for explaining a method for forming a dielectric film according to one embodiment of the present invention. Fig. 7 is a timing diagram for explaining a method for forming a dielectric film according to one embodiment of the present invention.

[0066] Referring to FIGS. 6 and 7, the method for forming a dielectric film may include a step (S50) of depositing a lower dielectric film at least once, a step (S60) of forming a leakage prevention film (220) through a normalization process, and a step (S70) of depositing an upper dielectric film different from the lower dielectric film at least once.

[0067] First, the step (S50) of depositing the lower high-k dielectric film may be performed by repeating the first deposition cycle for forming the lower high-k dielectric atomic layer multiple times. The first deposition cycle may include, for example, a step (S51) of injecting an inhibitor gas, a step (S52) of injecting a purge gas, a step (S53) of injecting a first source gas, a step (S54) of injecting the purge gas, a step (S55) of injecting a first reaction gas, and a step (S56) of injecting the purge gas. This first deposition cycle may be substantially the same as the deposition cycle of FIG. 4.

[0068] The step (S60) of forming a leakage prevention film through the above normalizing process can form a leakage prevention film including a natural oxide film by exposing the substrate to a room temperature and atmospheric pressure environment for a certain period of time as described above. The normalizing process (S60) may be performed after the step (S50) of depositing the lower high-k dielectric film. As another example, the normalizing process (S60) may be performed between the first deposition cycles (S51 to S56) of the lower high-k dielectric film. Accordingly, a leakage prevention film, i.e., a natural oxide film, can be interposed between the atomic layers of the lower high-k dielectric film.

[0069] The step (S70) of depositing the upper high-k dielectric atomic layer different from the lower high-k dielectric film may be performed by repeating a second deposition cycle multiple times. The second deposition cycle may include, for example, a step (S71) of injecting an inhibitor gas, a step (S72) of injecting a purge gas, a step (S73) of injecting a second source gas different from the first source gas, a step (S74) of injecting the purge gas, a step (S75) of injecting a second reaction gas, and a step (S76) of injecting the purge gas. The second deposition cycle may be different from the first deposition cycle only in the type of source gas and / or reaction gas, and the actual process mechanism may be the same. For example, the second reaction gas of the second deposition cycle and the first reaction gas of the first deposition cycle may use the same gas. Additionally, the normalization process (S60) may be performed between the second deposition cycles (S71 to S75). Accordingly, a leakage prevention film including the natural oxide film may be formed between the atomic layers constituting the upper high-k dielectric film.

[0070] Additionally, in the above examples, the purge gas and the reaction gas are exemplified as being supplied only at the corresponding stage, but in some cases, they may be supplied continuously.

[0071] FIGS. 8A to 8D are cross-sectional views illustrating a dielectric film according to embodiments of the present invention.

[0072] Referring to FIG. 8a, the dielectric film (200a) of the present embodiment may include a lower high-k dielectric film (210-1), a leakage prevention film (220), and an upper high-k dielectric film (230-1). The lower high-k dielectric film (210-1) may include a plurality of lower high-k dielectric thin films. For example, the lower high-k dielectric film (210-1) may include a first lower high-k dielectric thin film (210a), a second lower high-k dielectric thin film (210b), and a third lower high-k dielectric thin film (210c) that are sequentially stacked. Each of the first to third lower high-k dielectric thin films (210a to 210c) may be an atomic layer obtained by at least one deposition cycle. The first to third lower high-k dielectric thin films (210a to 210c) may be formed in-situ.

[0073] The above leakage prevention film (220) may be positioned between the lower dielectric film (210-1) and the upper dielectric film (230-1), and may be positioned, for example, at the center of the dielectric film (200a).

[0074] The upper high-k dielectric film (230-1) may include the same or different material as the lower high-k dielectric film (210-1). The upper high-k dielectric film (230-1) of the present embodiment may include a plurality of upper high-k dielectric thin films and at least one sub-leakage prevention film (220a) interposed between the plurality of upper high-k dielectric thin films. For example, the upper high-k dielectric film (230-1) may include a first upper high-k dielectric thin film (230a), a second upper high-k dielectric thin film (230b), a sub-leakage prevention film (220a), and a third upper high-k dielectric thin film (230c) that are sequentially stacked. However, the present invention is not limited thereto. For example, each of the first upper high-k dielectric thin film (230a), the second upper high-k dielectric thin film (230b), and the third upper high-k dielectric thin film (230c) may be an atomic layer obtained by one deposition cycle. Additionally, the first upper high-k dielectric thin film (230a) and the second upper high-k dielectric thin film (230b) that are deposited continuously can be formed in-situ.

[0075] The leak prevention film (220) and the sub-leakage prevention film (220a) of the present embodiment may each be a natural oxide film obtained by the above-described normalization process. The leak prevention film (220) and the sub-leakage prevention film (220a) may have the same thickness or different thicknesses. In this case, the thickness of the leak prevention films (220, 220a) may be adjusted based on the normalization process time, i.e., the waiting time.

[0076] In addition, although FIG. 8a illustrates an example of forming one sub-leakage prevention film (220a) within the upper high-k dielectric film (230-1), a normalization process may be performed between deposition cycles, i.e., between the upper high-k dielectric thin films (230a to 230b), to form multiple sub-leakage prevention films (220a).

[0077] According to the present embodiment, a leakage prevention film (220, 220a) can be formed in the center of the dielectric film (200a) and inside the upper high-k dielectric film (230-1) corresponding to the upper region of the dielectric film (200a). Accordingly, the occurrence of leakage current occurring inside and in the upper region (e.g., plate electrode side) of the dielectric film (200a) can be reduced.

[0078] Referring to FIG. 8b, the dielectric film (200b) of the present embodiment may include a lower high-k dielectric film (210-2) including a sub-leakage prevention film (220a), a leakage prevention film (220), and an upper high-k dielectric film (230-2).

[0079] The lower high-k dielectric film (210-2) may include a plurality of lower high-k dielectric thin films and at least one sub-leakage prevention film (220a) interposed between the plurality of lower high-k dielectric thin films. For example, the lower high-k dielectric film (210-2) may include, but is not limited to, a first lower high-k dielectric thin film (210a), a sub-leakage prevention film (220a), a second lower high-k dielectric thin film (210b), and a third lower high-k dielectric thin film (210c) that are sequentially laminated.

[0080] The above-mentioned leakage prevention film (220) may be positioned between the lower high-k dielectric film (210-2) and the upper high-k dielectric film (230-2). Each of the above-mentioned leakage prevention film (220) and the above-mentioned sub-leakage prevention film (220a) of the present embodiment may be formed by a normalization process.

[0081] As an exemplary embodiment, FIG. 8b illustrates an example of forming one sub-leakage prevention film (220a) within the lower high-k dielectric film (210-2), but it is obvious that a normalization process may be additionally performed between deposition cycles, i.e., between the lower high-k dielectric films, to form a plurality of sub-leakage prevention films (220a).

[0082] The upper high-k dielectric film (230-2) may include a material that is the same as or different from the lower high-k dielectric film (210-2). The upper high-k dielectric film (230-2) may include, for example, first to third upper high-k dielectric thin films (230a, 230b, 230c) that are sequentially laminated. Each of the first to third upper high-k dielectric thin films (230a, 230b, 230c) may be an atomic layer obtained by at least one deposition cycle and may be formed in-situ.

[0083] According to the present embodiment, a leakage prevention film (220, 220a) may be interposed in the center of the dielectric film (200b), for example, between the lower high-k dielectric film (210-2) and the upper high-k dielectric film (230-2), and inside the lower high-k dielectric film (210-2) corresponding to the lower region of the dielectric film (200b). Accordingly, the occurrence of leakage current occurring inside the dielectric film (200b), particularly in the lower region (e.g., the storage electrode side), can be reduced.

[0084] Referring to FIG. 8c, the dielectric film (200c) of the present embodiment may include a lower high-k dielectric film (210-3) including at least one sub-leakage prevention film (220a), a leakage prevention film (220), and an upper high-k dielectric film (230-3) including at least one sub-leakage prevention film (220a). The leakage prevention film (220) and the sub-laying prevention film (220a) may each be formed by a normalizing process.

[0085] For reference, FIG. 8c illustrates an example in which each of the lower dielectric film (210-3) and the upper dielectric film (230-3) includes one sub-leakage prevention film (220a), but the present invention is not limited thereto, and the normalization process may be performed between deposition cycles for forming each of the thin films (210a to 210c, 230a to 230c), thereby forming a plurality of sub-leakage prevention films (220a) at locations where leakage current is likely to occur.

[0086] In this way, since a leakage prevention film (220, 220a) is interposed between the lower high-k dielectric film (210-2) and the upper high-k dielectric film (230-2) corresponding to the center of the dielectric film (200c), and in the lower region and the upper region, respectively, the occurrence of leakage current in the center of the dielectric film (200c) as well as the upper and lower regions can be reduced.

[0087] As another example, referring to FIG. 8d, the dielectric film (200d) of the present embodiment may include a lower high-k dielectric film (210-4) and an upper high-k dielectric film (230-4). At least one of the lower high-k dielectric film (210-4) and the upper high-k dielectric film (230-4) may include a sub-leakage prevention film (220a). As an exemplary embodiment, each of the lower high-k dielectric film (210-4) and the upper high-k dielectric film (230-4) may include a sub-leakage prevention film (220a).

[0088] As described above, since the sub-leakage prevention film (220a) is formed on the lower and upper regions of the dielectric film (200d), leakage current in the lower and upper regions of the dielectric film (200d) can be prevented.

[0089] Consequently, considering the leakage location of the dielectric film, the leakage prevention film can be inserted into an area with a relatively high leakage current generation rate. In addition, the thickness of the leakage prevention film in an area with a relatively high leakage current generation rate can be formed to be relatively thick.

[0090] FIG. 9 is a cross-sectional view of a semiconductor device including a capacitor according to one embodiment of the present invention.

[0091] Referring to FIG. 9, an interlayer insulating film (310) is formed on top of a semiconductor substrate (300). Although not shown in the drawing, circuit elements may be integrated between the semiconductor substrate (300) and the interlayer insulating film (310).

[0092] A storage node contact portion (320) connected to the circuit element may be provided inside the interlayer insulating film (310).

[0093] A storage electrode (330) may be formed on the upper portion of the storage node contact portion (320). The storage electrode (330) may be formed, for example, in a cylindrical structure. Accordingly, the resulting semiconductor substrate (300) may have an uneven surface due to the structure of the storage electrode (330).

[0094] A dielectric film (340) according to the present embodiment may be formed along the upper portion of the interlayer insulating film (310) and the surface of the storage electrode (330). The dielectric film (340) according to the present embodiment may include at least one of the dielectric films introduced in FIG. 3 and FIGS. 8A to 8D.

[0095] A plate electrode (350) can be formed on top of the dielectric film (340).

[0096] According to the present embodiment, by interposing at least one leakage prevention film (220) including a natural oxide film inside the dielectric film (340), it is possible to block the flow of leakage current occurring not only inside the dielectric film (340), but also at the interface between the dielectric film (340) and the storage electrode (330), or at the interface between the dielectric film (340) and the plate electrode (350).

[0097] FIG. 10 is a graph showing the leakage current of a dielectric film according to an applied voltage according to one embodiment of the present invention, and FIG. 11 is a graph showing the permittivity of a dielectric film according to one embodiment of the present invention.

[0098] Referring to FIG. 10, (a) is a leakage current curve of a dielectric film including a natural oxide film as a leakage prevention film according to the present embodiment, and (b) is a leakage current curve of a dielectric film including Al2O3 as a leakage prevention film according to a comparative example.

[0099] Comparing curves (a) and (b), it was observed that the leakage current of curve (a) was lower than that of curve (b) in the low voltage range (-1 V to 1 V), and that both (a) and (b) showed similar levels of leakage current in the high voltage range (±1 V to ±2 V).

[0100] Referring to FIG. 11, (c) shows the effective permittivity of a dielectric film including a natural oxide film as a leak-preventing film according to the present embodiment, and (d) shows the effective permittivity of a dielectric film including Al2O3 as a leak-preventing film according to a comparative example.

[0101] Assuming that the permittivity of the high-k dielectric film constituting most of the dielectric film is about 35, in case of (c), the effective permittivity of the dielectric film is about 25 to 27 due to the permittivity of the natural oxide film. On the other hand, in case of (d) where Al2O3 is used as a leakage prevention film, when moving between chambers for depositing the Al2O3 film, the Al2O3 film may become amorphous, and the surface of the Al2O3 film may be converted to AlO. As is known, since AlO in an amorphous state has a low permittivity of about 8, the effective permittivity of the entire dielectric film is rapidly reduced to about 10.

[0102] As a result of comprehensively examining the leakage current and dielectric constant of FIGS. 10 and 11, when a leakage prevention film including a natural oxide film is applied to a high-k dielectric film as in the present embodiment, a leakage current distribution similar to that of a dielectric film to which an Al2O3 leakage prevention film is applied is exhibited, while a higher effective dielectric constant can be secured than when an Al2O3 leakage prevention film is applied.

[0103] As described in detail above, according to this embodiment, the natural oxide film generated by the normalization process can be utilized as a leakage prevention film within the high-k dielectric film. Accordingly, leakage current characteristics and a high effective permittivity can be secured.

[0104] In addition, although the above embodiments disclose examples of performing the normalization process in an atmospheric module, the present invention is not limited thereto, and the normalization process may also be performed in a module that maintains an atmospheric pressure environment other than the atmospheric module, such as a load lock module.

[0105] Although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above embodiments, and various modifications are possible by those skilled in the art within the scope of the technical idea of ​​the present invention.

[0106] The natural oxide film generated by the normalization process can be utilized as a leakage-preventing layer within the high-k dielectric layer. This ensures low leakage current characteristics and a high effective permittivity, enabling its use as a dielectric layer for high-k insulating films such as DRAM.

Claims

1. A method for forming a dielectric film using a substrate processing device comprising at least one process module including a chamber for performing a process in a vacuum atmosphere, a transfer module positioned adjacent to the process module while maintaining the vacuum state to transfer and unload a substrate to and from the process module, a waiting module for storing and waiting the substrate in an atmospheric pressure environment, and a load lock module positioned between the transfer module and the waiting module to buffer a pressure difference between the transfer module and the waiting module. A step of depositing at least one high-k thin film on top of the substrate after loading the substrate into the chamber; A step of unloading the substrate on which the high-k dielectric film is formed into the standby module and normalizing it for a predetermined time, thereby forming a leakage prevention film including a natural oxide film on top of the high-k dielectric film; and A method for forming a dielectric film, comprising the step of depositing at least one high-k dielectric thin film on top of the natural oxide film.

2. In paragraph 1, The above atmospheric module is a dielectric film forming method that maintains a pressure of 1 atm and a room temperature of 20°C to 25°C.

3. In paragraph 1, The above standby module includes at least one load port, A dielectric film forming method characterized in that when forming the above leakage prevention film, the substrate waits within the load port.

4. In paragraph 1, The step of depositing the above high-k dielectric thin film is: A step of spraying a first purge gas onto the resulting product of the substrate; A step of injecting a source gas onto the substrate onto which the first purge gas has been injected; A step of removing the remaining components of the unabsorbed source gas by injecting a second purge gas; A step of injecting a reaction gas and reacting it with the adsorbed source gas; and A method for forming a dielectric film, comprising a step of removing residual components of the non-absorbed reaction gas by injecting a third purge gas.

5. In paragraph 4, A method for forming a dielectric film, wherein the step of depositing the high-dielectric thin film further includes a step of injecting an inhibitor gas onto the upper portion of the substrate before the step of injecting the first purge gas onto the resulting substrate.

6. A method for forming a dielectric film on the upper portion of a substrate using a substrate processing device including a chamber that maintains a vacuum atmosphere and defines a processing space inside, a substrate supporter located in a lower region of the chamber on which a substrate is placed, and a shower head structure located in an upper region of the chamber that sprays a plurality of gases on the upper portion of the substrate, and an atmospheric module that maintains an atmospheric pressure environment and room temperature and stores a substrate that has been or is to be processed. (a) a step of depositing a lower high-k dielectric film on the upper surface of the substrate result by repeating the first deposition cycle at least once; (b) forming a natural oxide film on top of the lower dielectric film; and (c) a step of depositing an upper high-k dielectric film by repeating a second deposition cycle at least once on the upper portion of the natural oxide film, A method for forming a dielectric film, characterized in that steps (a) to (c) above are repeated at least once.

7. In paragraph 6, At least one of the first deposition cycle and the second deposition cycle, A step of spraying a first purge gas onto the substrate; A step of injecting a source gas onto the substrate onto which the first purge gas has been injected; A step of removing the remaining components of the unabsorbed source gas by injecting a second purge gas; A step of injecting a reaction gas and reacting it with the adsorbed source gas; and A method for forming a dielectric film, comprising a step of removing residual components of the non-absorbed reaction gas by injecting a third purge gas.

8. In paragraph 7, The step of depositing the lower dielectric film (a) is as follows: A step of repeating the above first deposition cycle multiple times is included, A method for forming a dielectric film, further comprising a step of forming the natural oxide film at least once between the first deposition cycles.

9. In any one of paragraphs 6 to 8, Each of the steps of forming the above natural oxide film is: A dielectric film forming method including a normalizing step of moving the substrate to the waiting module and waiting for a set time.

10. In paragraph 7 or 8, The step of depositing the upper high-k dielectric film (c) is as follows: A step of repeating the above second deposition cycle multiple times is included, further comprising a step of forming the natural oxide film at least once between the second deposition cycles; A dielectric film forming method including a normalizing step of moving the substrate to the waiting module and waiting for a set time.

11. In paragraph 6, A method for forming a dielectric film in which the lower dielectric film and the upper dielectric film are made of different materials.

12. In paragraph 6, A method for forming a dielectric film in which the lower dielectric film and the upper dielectric film have the same or different thicknesses.

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