Phase-change memory cell and manufacturing method

Abstract

Disclosed in the present invention are a phase-change memory cell and a manufacturing method. The method comprises: forming a heating electrode in a first dielectric layer; forming a boss structure on the surface of the first dielectric layer, and enabling the top of the heating electrode to be located in the boss structure; forming an adhesion layer on the surface of the first dielectric layer to cover the boss structure, and exposing the top of the heating electrode by means of planarization; forming a phase-change material layer on the surface of the adhesion layer to cover the top of the heating electrode; and patterning the phase-change material layer and the adhesion layer to form an adhesion layer pattern around the top of the heating electrode, and forming on the adhesion layer pattern a phase-change cell connected to the top of the heating electrode. The present invention can increase the bonding force between a phase-change material and a dielectric layer, ensure the contact performance between the phase-change material and a heating electrode, and reduce the etching and chemical damage to the heating electrode, thereby improving the reliability and yield of phase-change cells.

Description

Phase change memory unit and preparation method thereof

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on February 8, 2024, with application number 202410176293.2 and application name “A Phase Change Memory Unit and Preparation Method”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of phase change memory technology, and in particular to a phase change memory unit and a preparation method thereof. Background Art

[0003] Traditional phase-change memory cells are mostly T-shaped, with a bottom heater electrode encased in a dielectric layer to form a substrate. Phase-change material is deposited on the substrate surface, in contact with both the heater electrode and the dielectric layer. However, due to poor adhesion between the phase-change material and the dielectric layer, there is a risk of peeling during subsequent etching and wet processes, rendering the manufactured phase-change memory ineffective and reducing the yield of the resulting phase-change memory.

[0004] By adding an adhesion layer between the substrate and the phase change material, the adhesion between the substrate and the phase change material can be effectively increased, thereby increasing the reliability of the process and the device. However, the presence of the adhesion layer forms an indirect connection between the heating electrode and the phase change material, which affects the electrical and thermal conductivity between the heating electrode and the phase change material. Therefore, this method has high requirements for the composition of the adhesion layer material and the corresponding thin film deposition process. In addition, when the phase change unit realizes data reading and writing, high-temperature phase change needs to occur repeatedly. The above connection method will cause element diffusion between the adhesion layer and the phase change material, causing contamination of the phase change material, thereby affecting the performance of the device.

[0005] To improve the above-mentioned problem, after growing a layer of adhesive material on the substrate, the area where the heater electrode is located can be subjected to photolithography and etching. The adhesive material above the heater electrode is removed by etching, exposing the heater electrode, and then the phase change material is deposited. In this case, the heater electrode and the phase change material are in direct contact in the heater electrode area, while a "substrate-adhesion layer-phase change material" sandwich structure is formed in the remaining areas. This can improve adhesion while avoiding affecting the electrical and thermal conductivity between the heater electrode and the phase change material, and preventing element diffusion between the adhesion layer and the phase change material. However, when removing the adhesive material above the heater electrode, this method also etches the heater electrode, which can cause etching damage to the heater electrode. In addition, the residual etching byproducts produced after etching can lead to poor contact between the electrode and the phase change material. The cleaning operation performed to remove the etching byproducts may also cause chemical damage to the heater electrode. These damages have a particularly serious impact on small heating electrodes such as blade electrodes and ring electrodes. This is because the contact area between these heating electrodes and the phase change material is small. Once damaged, it will directly lead to poor contact between the heating electrode and the phase change material, thereby affecting the device yield. Summary of the Invention

[0006] The purpose of the present invention is to overcome the above-mentioned defects in the prior art and to provide a phase change memory unit and a preparation method thereof.

[0007] To achieve the above object, the technical solution of the present invention is as follows:

[0008] The present invention provides a method for preparing a phase change memory unit, comprising:

[0009] forming a heating electrode in the first dielectric layer;

[0010] forming a boss structure on the surface of the first dielectric layer, so that the top of the heating electrode is located in the boss structure;

[0011] forming an adhesion layer on the surface of the first dielectric layer to cover the boss structure, and planarizing the layer so that the top of the heating electrode is exposed;

[0012] forming a phase change material layer on the surface of the adhesion layer to cover the top of the heating electrode;

[0013] The phase change material layer and the adhesion layer are patterned to form an adhesion layer pattern around the top of the heating electrode, and a phase change unit connected to the top of the heating electrode is formed on the adhesion layer pattern.

[0014] Furthermore, the boss structure is formed by photolithography and etching the surface of the first dielectric layer, and the phase change unit and the adhesion layer pattern are formed by photolithography and etching the phase change material layer and the adhesion layer.

[0015] Furthermore, when forming the boss structure, the same photolithography mask used to form the phase change unit is also used for photolithography when forming the boss structure, and by adjusting the photolithography energy parameters, the critical dimension of the photolithography pattern of the boss structure formed is made smaller than the critical dimension of the phase change unit, and by adjusting the etching parameters, the boss structure with a critical dimension smaller than the critical dimension of the photolithography pattern is further obtained after etching.

[0016] Furthermore, when forming the boss structure, a circle of the first dielectric layer material is retained around the top of the heating electrode to isolate the adhesion layer pattern from the heating electrode.

[0017] Furthermore, at the end of the planarization, the top surface of the remaining platform structure is made higher than the surface of the adhesion layer on the surface of the first dielectric layer, so that the formed phase change unit is embedded with the platform structure.

[0018] Furthermore, at the end of the planarization, the top surface of the remaining boss structure is flush with the surface of the adhesion layer.

[0019] Furthermore, before forming the heating electrode, the method further includes:

[0020] providing a substrate;

[0021] forming a second dielectric layer on the surface of the substrate, and forming a bottom electrode in the second dielectric layer;

[0022] forming an etch stop layer on the surface of the second dielectric layer, and forming a first dielectric layer on the surface of the etch stop layer; and when forming the heater electrode in the first dielectric layer, allowing the bottom of the heater electrode to pass through the etch stop layer and connect to the top of the bottom electrode;

[0023] When forming the phase change material layer on the surface of the adhesion layer, the method further includes forming a protective layer on the surface of the phase change material layer;

[0024] When patterning the phase change material layer and the adhesion layer, the method further includes patterning the protective layer to form a protective layer pattern on the phase change unit;

[0025] A third dielectric layer is formed on the surface of the first dielectric layer, and a top electrode with a bottom connected to the protection layer pattern is formed on the surface of the third dielectric layer.

[0026] The present invention also provides a phase change memory unit, comprising:

[0027] a heating electrode disposed in the first dielectric layer;

[0028] a boss structure provided on the surface of the first dielectric layer, wherein the top of the heating electrode is located in the boss structure;

[0029] an adhesive layer pattern disposed on the surface of the first dielectric layer and surrounding the side surfaces of the boss structure;

[0030] The phase change unit is arranged on the surface of the adhesive layer pattern and connected to the top of the heating electrode.

[0031] Furthermore, the boss structure includes a first dielectric layer material surrounding the top of the heating electrode, so that the adhesion layer pattern is isolated from the heating electrode; the top surface of the boss structure is higher than the surface of the adhesion layer pattern on the surface of the first dielectric layer, so that the boss structure is embedded in the phase change unit, or the top surface of the boss structure is flush with the surface of the adhesion layer pattern.

[0032] Furthermore, it also includes:

[0033] a bottom electrode connected to the bottom of the heating electrode, wherein the bottom electrode is provided in a second dielectric layer, the second dielectric layer is provided on a substrate, and an etching stop layer is provided between the second dielectric layer and the first dielectric layer;

[0034] A protective layer pattern is provided on the surface of the phase change unit, a third dielectric layer is provided on the surface of the first dielectric layer, and the third dielectric layer covers the phase change unit and the protective layer pattern;

[0035] The third dielectric layer is also provided with a top electrode whose bottom is connected to the protective layer pattern.

[0036] It can be seen from the above technical solution that the present invention forms a boss structure by patterning the surface of the first dielectric layer around the top of the heating electrode, and then forms an adhesion layer covering the boss structure on the surface of the first dielectric layer, and exposes the top of the heating electrode by flattening, and then forms a phase change unit on the adhesion layer and the boss structure, so that in the central area where the heating electrode is located, the phase change material can be in direct contact with the heating electrode, while in the remaining peripheral areas, a "dielectric-adhesion layer-phase change material" "sandwich" structure is formed, thereby increasing the bonding force between the phase change material and the dielectric layer and ensuring the contact performance between the phase change material and the heating electrode, while reducing the etching and chemical damage to the heating electrode, thereby increasing the reliability and yield of the phase change unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] FIG1 is a flow chart of a method for preparing a phase change memory cell according to a preferred embodiment of the present invention;

[0038] 2 to 9 are schematic diagrams of the process steps for preparing a phase change memory cell according to the method of FIG. 1 in accordance with a preferred embodiment 1 of the present invention;

[0039] 10-12 are schematic diagrams of the process steps for preparing a phase change memory cell according to the method of FIG. 1 in a second preferred embodiment of the present invention;

[0040] 13-14 are schematic diagrams showing the coordination between a columnar heating electrode, an adhesion layer pattern, and a phase change unit according to a preferred embodiment of the present invention;

[0041] 15-16 are schematic diagrams showing the coordination between an annular heating electrode, an adhesion layer pattern, and a phase change unit according to a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. Unless otherwise defined, the technical terms or scientific terms used herein should be the common meanings understood by people with ordinary skills in the field to which the invention belongs. The words "including" and similar words used in this article mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0043] The specific embodiments of the present invention are further described in detail below with reference to the accompanying drawings.

[0044] Referring to Figures 1 and 2 to 9, a method for preparing a phase change memory cell according to the present invention comprises the following steps:

[0045] Step S1 : forming a heating electrode 15 in the first dielectric layer 14 .

[0046] As shown in FIG2 , before forming the heater electrode 15 in the first dielectric layer 14, a second dielectric layer 11, such as silicon dioxide, can be formed on the surface of a substrate (not shown) using a deposition process. Then, a bottom electrode through-hole connected to the substrate is formed on the surface of the second dielectric layer 11 using photolithography and etching processes. The bottom electrode through-hole is then filled with, for example, metal tungsten and planarized (e.g., using chemical mechanical polishing) to form a tungsten bottom electrode 12 in the second dielectric layer 11.

[0047] Next, a deposition process is used to form an etch stop layer 13 , for example, of silicon nitride, on the surface of the second dielectric layer 11 , and then a fourth dielectric layer 141 , for example, of silicon dioxide, is formed on the surface of the etch stop layer 13 .

[0048] As shown in FIG3 , a photolithography and etching process is then used to form a groove 142 on the surface of the fourth dielectric layer 141 , the groove 142 having a bottom portion passing through the etch stop layer 13 and connected to the top of the bottom electrode 12 . A sidewall of the groove 142 is located on the top surface of the bottom electrode 12 .

[0049] Next, a deposition process is used to deposit a layer of heating electrode material 151 on the inner wall surface of the groove 142. The heating electrode material 151 includes at least one of TiN, TiSiN and TiON, and has a thickness of 2-10 nm.

[0050] As shown in FIG4 , the heating electrode material 151 is then preliminarily patterned using photolithography and etching processes to remove excess heating electrode material 151 on the sidewalls and bottom surface of the groove 142 , forming a heating electrode intermediate pattern on the sidewalls and bottom surface of the groove 142 corresponding to the position of the bottom electrode 12 .

[0051] Then, a deposition process is used to fill the recess 142 with a fifth dielectric layer 143, such as silicon dioxide, and chemical mechanical polishing is performed to planarize the recess 142 until the excess heating electrode material 151 on the surface of the fourth dielectric layer 141 outside the recess 142 is completely removed, resulting in a blade-shaped heating electrode 15 (blade electrode) having a desired height, with the fourth dielectric layer 141 and the fifth dielectric layer 143 exposed at the top. The fourth dielectric layer 141 and the fifth dielectric layer 143 filling the recess 142 together constitute the first dielectric layer 14, thereby forming the blade-shaped heating electrode 15 in the first dielectric layer 14, the bottom of which is connected to the top of the bottom electrode 12.

[0052] Step S2 : forming a boss structure 16 on the surface of the first dielectric layer 14 , so that the top of the heating electrode 15 is located in the boss structure 16 .

[0053] As shown in FIG5 , a photolithography and etching process is used to remove part of the first dielectric layer 14 material around the heating electrode 15 , forming a circle of depression 161 on the surface of the first dielectric layer 14 around the top of the heating electrode 15 , thereby forming a boss structure 16 on the surface of the first dielectric layer 14 ; wherein the top of the heating electrode 15 is located in the boss structure 16 and exposed on the top surface of the boss structure 16 .

[0054] In some embodiments, the same photolithography mask used to form the phase change unit is used to form the platform structure 16. Furthermore, by adjusting the photolithography energy parameters, the width critical dimension of the photolithography pattern of the platform structure 16 is made smaller than the width critical dimension of the phase change unit.

[0055] Furthermore, by adjusting the etching parameters when forming the boss structure 16 , the boss structure 16 having a width critical dimension smaller than the width critical dimension of the photolithography pattern can be obtained after etching.

[0056] In some embodiments, when forming the boss structure 16, the width critical dimension of the formed boss structure 16 is adjusted by the above-mentioned control method so that a circle of the first dielectric layer 14 material is retained around the top of the heating electrode 15 and together form the boss structure 16, as shown in Figure 5.

[0057] The above-mentioned control data for the lithography energy parameters and etching parameters can be obtained by referring to empirical values ​​and combining experiments.

[0058] In some embodiments, another photolithography mask different from that used to form the phase change unit is used to form the platform structure 16, and the width critical dimension of the formed platform structure photolithography pattern is smaller than the width critical dimension of the phase change unit. After etching, a circle of the first dielectric layer 14 material is retained around the top of the heating electrode 15, thereby forming the platform structure 16 together.

[0059] Step S3 : forming an adhesion layer 171 on the surface of the first dielectric layer 14 to cover the boss structure 16 , and planarizing the first dielectric layer 14 to expose the top of the heating electrode 15 .

[0060] 6 , an adhesion layer 171 is formed on the surface of the first dielectric layer 14 by a deposition process, and completely covers the surface of the boss structure 16. The adhesion layer 171 can be made of titanium nitride, tantalum nitride, carbon material, carbon silicon material, carbon nitrogen material, etc.

[0061] As shown in FIG7 , a chemical mechanical polishing (CMP) planarization process is used to remove the adhesion layer 171 on the top surface of the boss structure 16, exposing the top of the heater electrode 15. Grinding the top of the heater electrode 15 through the CMP process can remove the electrode portion damaged in the previous process, exposing the undamaged electrode portion underneath. This significantly reduces the adverse effects of the previous process and is a relatively safe and reliable method. It also avoids etching damage and chemical damage to the heater electrode 15 caused by the previous etching method and subsequent cleaning.

[0062] In some embodiments, at the end of the chemical mechanical polishing planarization process, the top surface of the remaining platform structure 16 is elevated above the surface of the adhesion layer 171 on the surface of the first dielectric layer 14. This approach removes only the adhesion layer 171 on the top surface of the platform structure 16, so that when the phase change unit is subsequently formed, the platform structure 16 is embedded in the formed phase change unit. The height of the remaining platform structure 16 can be controlled during the chemical mechanical polishing planarization process. To ensure that the top surface of the remaining platform structure 16 after polishing is elevated above the surface of the adhesion layer 171 on the surface of the first dielectric layer 14, the etching depth of the platform structure 16 can be appropriately increased in step S2 to expand the process window during chemical mechanical polishing.

[0063] Step S4 : forming a phase change material layer on the surface of the adhesive layer 171 to cover the top of the heating electrode 15 .

[0064] As shown in FIG8 , a phase change material layer and a protective layer are sequentially formed on the surface of the adhesion layer 171 by a deposition process to cover the exposed top of the heating electrode 15 (the boss structure 16 ).

[0065] In some embodiments, the phase change material layer material includes at least one of a GeTe-Sb2Te3 system, a GeTe-SnTe system, a Sb2Te system, an In3SbTe2 system, an Sb-doped system, a GeTe-Sb2Te3 system doped with Sc, Ag, In, Al, C, S, Se, N, Cu, and W elements, a GeTe-SnTe system doped with Sc, Ag, In, Al, C, S, Se, N, Cu, and W elements, a Sb2Te system doped with Sc, Ag, In, Al, C, S, Se, N, Cu, and W elements, an In3SbTe2 system doped with Sc, Ag, In, Al, In, C, S, Se, N, Cu, and W elements, and an Sb-doped system doped with Sc, Ag, In, Al, C, S, Se, N, Cu, and W elements.

[0066] The protective layer material includes titanium nitride.

[0067] Step S5 : patterning the phase change material layer and the adhesion layer 171 to form an adhesion layer pattern 17 around the top of the heating electrode 15 , and forming a phase change unit 18 connected to the top of the heating electrode 15 on the adhesion layer pattern 17 .

[0068] As shown in FIG8 , the protective layer, phase-change material layer, and adhesion layer 171 are then patterned using photolithography and etching processes to form a phase-change unit 18 with a protective layer pattern 19 on its surface, and an adhesion layer pattern 17 located below the phase-change unit 18. The formed adhesion layer pattern 17 surrounds the top of the heater electrode 15, and the adhesion layer pattern 17 is separated from the heater electrode 15 by a circle of the first dielectric layer 14 formed around the top of the heater electrode 15. The bottom of the phase-change unit 18 is directly connected to the top of the heater electrode 15.

[0069] It is worth noting that when forming the phase change unit 18, the photolithography mask used can be the same photolithography mask used to form the boss structure 16. Moreover, after the resulting phase change unit 18 pattern is superimposed on the top pattern of the lower layer heating electrode 15, the non-overlapping area of ​​the two is the "substrate-adhesion layer 171-phase change material" "sandwich" structure mentioned above, while in the overlapping area of ​​the two, the heating electrode 15 and the phase change unit 18 are in direct contact. Therefore, this method does not require an additional photolithography mask. It can also be applied to other types of heating electrodes 15 (such as the columnar heating electrodes 15 and the annular heating electrodes 15 in Figures 13-16), and only the mask of the corresponding phase change material layer needs to be used for photolithography and etching of the boss structure 16.

[0070] At the same time, by making the top surface of the boss structure 16 remaining after grinding higher than the surface of the adhesion layer 171 on the surface of the first dielectric layer 14, after the phase change unit 18 is formed, the top of the heating electrode 15 is embedded in the phase change material at the bottom of the phase change unit 18, and direct contact is formed between the heating electrode 15 and the phase change material. Moreover, in addition to the adhesion layer 171 (adhesion layer pattern 17) in the horizontal direction, the adhesion layer 171 is also present in the area where the heating electrode 15 is embedded (i.e., the side of the boss structure 16), thereby increasing the contact area between the phase change material and the adhesion layer 171 on the first dielectric layer 14, thereby having better adhesion performance and reliability.

[0071] Moreover, by adjusting the lithography and etching parameters when forming the boss structure 16, boss structure 16 patterns with different critical dimensions and depths can be obtained, thereby achieving the adjustment of the effective area of ​​the adhesion layer pattern 17 and the size of the process window for flattening the adhesion layer 171, thereby enhancing the adaptability of the process.

[0072] In some embodiments, two different photolithography masks may be used for photolithography when forming the phase change unit 18 and when forming the boss structure 16, respectively, and the width critical dimension of the formed phase change unit photolithography pattern is made larger than the width critical dimension of the boss structure photolithography pattern, so that after etching, a phase change unit 18 with a width critical dimension larger than the boss structure 16 is obtained, and an adhesion layer pattern 17 is formed at the same time.

[0073] As shown in FIG9 , the process further includes forming a third dielectric layer 20 having a planarized surface on the surface of the first dielectric layer 14 by, for example, a high aspect ratio silicon dioxide deposition process, to completely cover the protective layer pattern 19 , the phase change unit 18 and the adhesion layer pattern 17 .

[0074] Next, a top electrode through-hole is formed on the top of the bottom connection protection layer pattern 19 on the surface of the third dielectric layer 20 by using a photolithography and etching process, and a tungsten top electrode 21 is formed in the third dielectric layer 20 by, for example, filling the top electrode through-hole with metal tungsten and performing chemical mechanical polishing and flattening.

[0075] Figures 13 and 15 respectively illustrate the interlocking state between the adhesion layer pattern 17 and the phase change unit 18 when the blade-shaped heater electrode 15 is replaced with a columnar heater electrode 15 and a ring heater electrode 15. The methods for forming the columnar heater electrode 15 and the ring heater electrode 15 can be understood with reference to the prior art and will not be described in detail here.

[0076] Refer to Figures 1, 2-6, and 10-12. In this embodiment, a method for fabricating a phase change memory cell according to the present invention differs from the embodiment of Figures 2-9 described above in that a chemical mechanical polishing (CMP) planarization process is used to remove the adhesion layer 171 on the top surface of the platform structure 16, exposing the top of the heater electrode 15. At the end of the planarization process, the top surface of the remaining platform structure 16 is flush with the surface of the adhesion layer 171. In other words, in this embodiment, polishing to the adhesion layer 171 located on the surface of the first dielectric layer 14 is used as the polishing endpoint to obtain a flat surface formed by the top surface of the remaining platform structure 16 and the polished surface of the adhesion layer 171, as shown in Figure 10. The subsequent method for forming the phase change cell 18 and the top electrode 21, as shown in Figures 11-12, is the same as in the embodiment of Figures 8-9 described above and will not be further described.

[0077] 14 and 16 respectively show the flat matching state between the adhesion layer pattern 17 and the phase change unit 18 when the blade-shaped heating electrode 15 is replaced by a columnar heating electrode 15 and a ring-shaped heating electrode 15 .

[0078] It can be seen that in this embodiment, the phase change unit 18 has a flat bottom surface that is identical to the top surface of the boss structure 16 and the surface of the adhesion layer 171. That is, the top surface of the boss structure 16 and the surface of the adhesion layer 171 are not embedded in the phase change unit 18. Therefore, the contact area between the phase change material and the adhesion layer 171 in the embodiments of Figures 2-9 is larger than that in this embodiment, resulting in better adhesion and reliability. However, this solution also places higher demands on the chemical mechanical polishing process, so the above different methods can be selected as needed.

[0079] Refer to Figure 9. A phase change memory cell of the present invention can be formed using the above-mentioned phase change memory cell preparation method. For example, it can be formed using the above-mentioned phase change memory cell preparation method corresponding to Figures 2 to 9. In this embodiment, the phase change memory cell includes:

[0080] A second dielectric layer 11, an etch stop layer 13, a first dielectric layer 14 and a third dielectric layer 20 are sequentially provided on a substrate (not shown).

[0081] A bottom electrode 12 is provided in the second dielectric layer 11 , and a heating electrode 15 is provided in the first dielectric layer 14 and passes through the etching stop layer 13 and is connected to the bottom electrode 12 .

[0082] A boss structure 16 is provided on the surface of the first dielectric layer 14 , and the top of the heating electrode 15 is located in the boss structure 16 .

[0083] An adhesion layer pattern 17 is further provided on the surface of the first dielectric layer 14 and is arranged around the side surfaces of the boss structure 16 .

[0084] A phase change unit 18 is provided on the surface of the adhesion layer pattern 17, and the bottom of the phase change unit 18 is tightly fitted with the surface of the adhesion layer pattern 17 and the top surface of the boss structure 16, so that the bottom of the phase change unit 18 is directly in contact with the top of the heating electrode 15.

[0085] A protective layer pattern 19 is provided on the surface of the phase change unit 18. A top electrode 21 is provided on the surface of the protective layer pattern 19, with the top of the top electrode 21 exposed from the surface of the third dielectric layer 20. The top electrode 21, protective layer pattern 19, phase change unit 18, and adhesion layer pattern 17 are all located in the third dielectric layer 20.

[0086] In some embodiments, the adhesion layer pattern 17 is separated from the top of the heater electrode 15 by the material of the first dielectric layer 14. That is, the platform structure 16 is composed of the first dielectric layer 14 material located on the outside and the top of the heater electrode 15 located on the inside. Furthermore, the top surface of the platform structure 16 is higher than the surface of the adhesion layer pattern 17 on the surface of the first dielectric layer 14, so that the platform structure 16 is embedded in the phase change unit 18.

[0087] In some embodiments, the heating electrode 15 may be a blade electrode.

[0088] In other embodiments, the heating electrode 15 may be a columnar heating electrode 15 or a ring-shaped heating electrode 15 , as shown in FIG. 13 or FIG. 15 .

[0089] Refer to Figure 12 . A phase-change memory cell of the present invention can be formed using the aforementioned phase-change memory cell fabrication method. For example, it can be formed using the aforementioned phase-change memory cell fabrication method corresponding to Figures 2-6 and 10-12 . The phase-change memory cell in this embodiment differs from the phase-change memory cell in the embodiment of Figure 9 only in that the top surface of the boss structure 16 is flush with the surface of the adhesion layer pattern 17. The bottom surface of the phase-change cell 18 is in close contact with the flat surface formed by the top surface of the boss structure 16 and the surface of the adhesion layer pattern 17.

[0090] In addition, the heating electrode 15 can be a blade electrode as shown in FIG12, a columnar heating electrode 15 as shown in FIG14, or a ring heating electrode 15 as shown in FIG16.

[0091] In summary, the present invention forms a boss structure 16 by patterning the surface of the first dielectric layer 14 around the top of the heating electrode 15, and then forms an adhesion layer 171 covering the boss structure 16 on the surface of the first dielectric layer 14, and exposes the top of the heating electrode 15 through flattening, and then forms a phase change unit 18 on the adhesion layer 171 and the boss structure 16, so that in the central area where the heating electrode 15 is located, the phase change material can directly contact the heating electrode 15, while in the remaining peripheral areas, a "dielectric-adhesion layer 171-phase change material" "sandwich" structure is formed, thereby increasing the bonding force between the phase change material and the dielectric layer and ensuring the contact performance between the phase change material and the heating electrode 15, while reducing the etching and chemical damage caused to the heating electrode 15, thereby increasing the reliability and yield of the phase change unit 18.

[0092] While embodiments of the present invention have been described in detail above, it will be apparent to those skilled in the art that various modifications and variations of these embodiments are possible. However, it should be understood that such modifications and variations are within the scope and spirit of the invention as defined in the appended claims. Furthermore, the invention described herein is susceptible to other embodiments and may be practiced or implemented in a variety of ways.

Claims

1. A method for preparing a phase change memory cell, characterized in that: include: forming a heating electrode in the first dielectric layer; forming a boss structure on the surface of the first dielectric layer, so that the top of the heating electrode is located in the boss structure; forming an adhesion layer on the surface of the first dielectric layer to cover the boss structure, and planarizing the layer so that the top of the heating electrode is exposed; forming a phase change material layer on the surface of the adhesion layer to cover the top of the heating electrode; The phase change material layer and the adhesion layer are patterned to form an adhesion layer pattern around the top of the heating electrode, and a phase change unit connected to the top of the heating electrode is formed on the adhesion layer pattern.

2. The method for preparing a phase change memory unit according to claim 1, wherein: The boss structure is formed by photolithography and etching the surface of the first dielectric layer, and the phase change unit and the adhesion layer pattern are formed by photolithography and etching the phase change material layer and the adhesion layer.

3. The method for preparing a phase change memory unit according to claim 2, wherein: When forming the platform structure, the same photolithography mask used to form the phase change unit is also used for photolithography when forming the platform structure, and by adjusting the photolithography energy parameters, the critical dimension of the photolithography pattern of the formed platform structure is made smaller than the critical dimension of the phase change unit, and by adjusting the etching parameters, the platform structure with a critical dimension smaller than the critical dimension of the photolithography pattern is further obtained after etching.

4. The method for preparing a phase change memory unit according to claim 1, wherein: When forming the boss structure, a circle of the first dielectric layer material is retained around the top of the heating electrode to isolate the adhesion layer pattern from the heating electrode.

5. The method for preparing a phase change memory unit according to claim 1, wherein: When the planarization reaches an end point, the top surface of the remaining platform structure is higher than the surface of the adhesion layer on the surface of the first dielectric layer, so that the formed phase change unit is embedded with the platform structure.

6. The method for preparing a phase change memory unit according to claim 1, wherein: When the planarization is completed, the top surface of the remaining protrusion structure is flush with the surface of the adhesion layer.

7. The method for preparing a phase change memory unit according to claim 1, wherein: Before forming the heating electrode, the method further includes: providing a substrate; forming a second dielectric layer on the surface of the substrate, and forming a bottom electrode in the second dielectric layer; forming an etch stop layer on the surface of the second dielectric layer, and forming a first dielectric layer on the surface of the etch stop layer; and when forming the heater electrode in the first dielectric layer, allowing the bottom of the heater electrode to pass through the etch stop layer and connect to the top of the bottom electrode; When forming the phase change material layer on the surface of the adhesion layer, the method further includes forming a protective layer on the surface of the phase change material layer; When patterning the phase change material layer and the adhesion layer, the method further includes patterning the protective layer to form a protective layer pattern on the phase change unit; A third dielectric layer is formed on the surface of the first dielectric layer, and a top electrode with a bottom connected to the protection layer pattern is formed on the surface of the third dielectric layer.

8. A phase change memory cell, characterized in that: include: a heating electrode disposed in the first dielectric layer; a boss structure provided on the surface of the first dielectric layer, wherein the top of the heating electrode is located in the boss structure; an adhesive layer pattern disposed on the surface of the first dielectric layer and surrounding the side surfaces of the boss structure; The phase change unit is arranged on the surface of the adhesive layer pattern and connected to the top of the heating electrode.

9. The phase change memory cell according to claim 8, wherein: The boss structure includes a first dielectric layer material surrounding the top of the heating electrode, isolating the adhesion layer pattern from the heating electrode; the top surface of the boss structure is higher than the surface of the adhesion layer pattern on the surface of the first dielectric layer, so that the boss structure is embedded in the phase change unit, or the top surface of the boss structure is flush with the surface of the adhesion layer pattern.

10. The phase change memory cell according to claim 8, wherein: Also includes: a bottom electrode connected to the bottom of the heating electrode, wherein the bottom electrode is provided in a second dielectric layer, the second dielectric layer is provided on a substrate, and an etching stop layer is provided between the second dielectric layer and the first dielectric layer; A protective layer pattern is provided on the surface of the phase change unit, a third dielectric layer is provided on the surface of the first dielectric layer, and the third dielectric layer covers the phase change unit and the protective layer pattern; The third dielectric layer is also provided with a top electrode whose bottom is connected to the protective layer pattern.

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