Cell signal measuring device comprising field effect transistor to which vertical nanostructure is applied, and manufacturing and operating method thereof

Abstract

A cell signal measuring device and a manufacturing and operating method thereof are disclosed. The disclosed cell signal measuring device may be a cell signal measuring device comprising a vertical field effect transistor, wherein the vertical field effect transistor includes: a drain electrode including a two-dimensional nanomaterial; a vertical nanostructure vertically disposed on the drain electrode; a source electrode disposed to make electrical contact with the top of the nanostructure or an area adjacent thereto; a gate insulating layer disposed on the surface of the nanostructure; a gate electrode disposed on the gate insulating layer between the drain electrode and the source electrode so as to encompass a part of the nanostructure; and a separation layer filling the space between the gate electrode and the source electrode. The cell signal measuring device can: cause the source electrode to make contact with a cell or penetrate thereinto so as to measure a signal of the cell; and change a gate voltage applied to the gate electrode, so as to adjust the intensity of the signal measured from the cell.

Description

A cell signal measurement device including a field effect transistor with a vertical nanostructure applied thereto, and a method for manufacturing and operating the same

[0001] The present invention relates to a cell-related device and a method for manufacturing and operating the same, and more particularly, to a device capable of performing electrical measurements on cells and a method for manufacturing and operating the same.

[0002] Existing signal measurement devices for biological cells typically have a horizontal structure. However, these devices have the disadvantage of making it difficult to read cellular action potentials and small signal changes within cells. Specifically, while horizontal signal measurement devices can measure single-cell signals in vitro, they are limited by the difficulty of accessing the cell interior, making it difficult to accurately measure action potentials. Furthermore, existing horizontal signal measurement devices require dozens of semiconductor steps to be manufactured, resulting in complex manufacturing processes and low productivity.

[0003] In addition, existing signal measurement devices do not provide functions such as controlling signal intensity, performing selective signal reading, or performing selective stimulus transmission when performing electrical measurements on cells, and therefore have limitations in performing precise and diverse measurements.

[0004] Therefore, there is a need for the development of a signal measurement device that can easily access the inside of a cell to read action potential signals outside the body (extracellular) and inside the body (intracellular) of a biological cell, and also has easy control of signal intensity and can perform functions such as selective reading and stimulus transmission.

[0005] The technical problem to be achieved by the present invention is to provide a cell signal measuring device that can easily measure action potential signals of biological cells outside the body (extracellular) and inside the body (intracellular) and can control the signal intensity for a specific cell.

[0006] In addition, the technical problem to be achieved by the present invention is to provide a cell signal measurement device that can easily control signal intensity and perform functions such as selective reading and stimulus transmission when performing electrical measurements on cells.

[0007] In addition, a technical problem to be achieved by the present invention is to provide a method for manufacturing the above-described cell signal measuring device.

[0008] In addition, a technical problem to be achieved by the present invention is to provide an operating method of the above-described cell signal measuring device.

[0009] The problems to be solved by the present invention are not limited to the problems mentioned above, and other problems not mentioned can be understood by those skilled in the art from the description below.

[0010] According to one embodiment of the present invention, there is provided a cell signal measuring device including a vertical field effect transistor, the vertical field effect transistor including a drain electrode including a two-dimensional nanomaterial; a vertical nanostructure vertically disposed on the drain electrode; a source electrode disposed to electrically contact a top of the nanostructure or an area adjacent thereto; a gate insulating layer disposed on a surface of the nanostructure; a gate electrode disposed between the drain electrode and the source electrode and surrounding a portion of the nanostructure on the gate insulating layer; and a separation layer filling a space between the gate electrode and the source electrode, and configured to measure a signal of the cell by causing the source electrode to contact or penetrate the cell.

[0011] The above cell signal measuring device can be configured to control the intensity of a signal measured from the cell by changing the gate voltage applied to the gate electrode.

[0012] The above two-dimensional nanomaterial may include graphene.

[0013] The above nanostructure may be any one of a nanotube, a nanorod, and a nanowire.

[0014] The above nanostructure may include a metal oxide having semiconductor properties.

[0015] The gate insulating layer may have an extended shape to cover the upper surface of the drain electrode while surrounding at least a portion of the outer surface of the nanostructure, and the gate electrode may have a shape to surround a portion of the nanostructure while being disposed on a portion of the gate insulating layer disposed on the drain electrode.

[0016] The separation layer may have a thickness that exposes an upper portion of the nanostructure while covering at least a portion of the gate electrode, and the source electrode may be disposed on an upper surface of the separation layer.

[0017] The above cell signal measuring device may have an array structure in which a plurality of the above vertical field effect transistors are arranged.

[0018] The above cell signal measuring element may have a crossbar array structure.

[0019] The above cell signal measuring device may include a plurality of drain electrodes, a plurality of nanostructures, a plurality of gate electrodes, and a plurality of source electrodes, wherein the plurality of drain electrodes may have a wiring shape extending in a first direction, and the plurality of gate electrodes may have a wiring shape extending in a second direction intersecting the first direction.

[0020] According to another embodiment of the present invention, there is provided a method for manufacturing a cell signal measuring device, comprising the step of forming a vertical field effect transistor, wherein the step of forming the vertical field effect transistor comprises the steps of: providing a drain electrode comprising a two-dimensional nanomaterial; forming a vertical nanostructure vertically arranged on the drain electrode; forming a gate insulating layer on the drain electrode and the nanostructure; forming a gate electrode surrounding a portion of the nanostructure on the gate insulating layer; forming a separation layer covering at least a portion of the gate electrode while exposing an upper portion of the gate insulating layer; removing an upper portion of the gate insulating layer exposed by the separation layer to expose a portion of the nanostructure; and forming a source electrode electrically in contact with the exposed portion of the nanostructure on the separation layer.

[0021] The above two-dimensional nanomaterial may include graphene.

[0022] The above nanostructure may be any one of a nanotube, a nanorod, and a nanowire.

[0023] The above nanostructure may include a metal oxide having semiconductor properties.

[0024] The gate insulating layer may be formed to surround the outer circumferential surface of the nanostructure and cover the upper surface of the drain electrode, and the gate electrode may be formed to surround a portion of the nanostructure on a portion of the gate insulating layer disposed on the drain electrode.

[0025] The step of forming the gate electrode may include the step of forming a material pattern for a gate electrode having a structure surrounding an outer circumferential surface of the nanostructure on the gate insulating layer; the step of forming an etching mask layer having a thickness that exposes an upper region of the material pattern for the gate electrode on the gate insulating layer; and the step of removing an upper region of the material pattern for the gate electrode exposed by the etching mask layer to define the gate electrode from the material pattern for the gate electrode.

[0026] The above cell signal measuring device may have an array structure in which a plurality of the above vertical field effect transistors are arranged.

[0027] The above cell signal measuring element may have a crossbar array structure.

[0028] The above cell signal measuring device may include a plurality of drain electrodes, a plurality of nanostructures, a plurality of gate electrodes, and a plurality of source electrodes, wherein the plurality of drain electrodes may have a wiring shape extending in a first direction, and the plurality of gate electrodes may have a wiring shape extending in a second direction intersecting the first direction.

[0029] According to embodiments of the present invention, a cell signal measuring device capable of easily measuring action potential signals of biological cells in vitro (extracellularly) and in vivo (intracellularly) and capable of controlling signal intensity for a given cell can be implemented. Furthermore, according to embodiments of the present invention, a cell signal measuring device capable of easily controlling signal intensity and performing functions such as selective reading and stimulus transmission when performing electrical measurements on cells can be implemented.

[0030] According to one embodiment of the present invention, a vertical field effect transistor including a vertical nanostructure having a one-dimensional shape can be manufactured to utilize the material properties of the nanostructure, and, if necessary, a cell signal measuring device capable of penetrating a cell membrane and measuring an action potential inside a cell can be implemented. In addition, according to one embodiment of the present invention, a cell signal measuring device capable of easily controlling the intensity of a signal by changing the gate voltage of the vertical field effect transistor can be implemented. Furthermore, according to one embodiment of the present invention, by utilizing an array structure in which a plurality of vertical field effect transistors are arranged, a cell signal measuring device capable of performing various and precise measurements on a cell(s) can be implemented.

[0031] However, the effects of the present invention are not limited to the above effects, and can be expanded in various ways without departing from the technical spirit and scope of the present invention.

[0032] FIG. 1 is a cross-sectional view showing a cell signal measuring device according to one embodiment of the present invention.

[0033] FIG. 2 and FIG. 3 are schematic diagrams exemplarily showing a method for performing signal measurement for a cell using a cell signal measurement device according to one embodiment of the present invention.

[0034] FIG. 4 is a perspective view showing a cell signal measuring device according to one embodiment of the present invention.

[0035] FIGS. 5A to 5J are cross-sectional views showing a method for manufacturing a cell signal measuring device according to one embodiment of the present invention.

[0036] FIGS. 6A to 6G are perspective views showing a method for manufacturing a cell signal measuring device according to one embodiment of the present invention.

[0037] FIG. 7 is a perspective view showing a cell signal measuring device having an array structure according to one embodiment of the present invention.

[0038] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings.

[0039] The embodiments of the present invention described below are provided to more clearly explain the present invention to a person having ordinary skill in the art, and the scope of the present invention is not limited by the following embodiments, and the following embodiments can be modified in various other forms.

[0040] The terminology used herein is used to describe particular embodiments and is not intended to limit the present invention. The singular forms used herein may include the plural forms unless the context clearly dictates otherwise. In addition, the terms "comprise" and / or "comprising" used herein specify the presence of a stated feature, step, number, operation, element, element, and / or group thereof, but do not exclude the presence or addition of one or more other features, steps, numbers, operations, elements, elements, and / or groups thereof. In addition, the term "connected" used herein not only means that certain elements are directly connected, but also includes a concept that indirectly connects elements by interposing another element between them.

[0041] In addition, when it is said in this specification that a certain element is located "on" another element, this includes not only cases where a certain element is in contact with another element, but also cases where another element exists between the two elements. The term "and / or" as used in this specification includes any one of the listed items and any and all combinations of one or more of them. In addition, terms of degree such as "about", "substantially", etc. as used in this specification are used to mean a range of or close to the numerical value or degree, taking into account inherent manufacturing and material tolerances, and are used to prevent infringers from unfairly using the disclosure that mentions exact or absolute numbers provided to help the understanding of this specification.

[0042] Hereinafter, embodiments of the present invention will be described in detail with reference to the attached drawings. The sizes and thicknesses of areas or parts illustrated in the attached drawings may be somewhat exaggerated for clarity and convenience of explanation. Like reference numbers designate like components throughout the detailed description.

[0043] FIG. 1 is a cross-sectional view showing a cell signal measuring device according to one embodiment of the present invention.

[0044] Referring to FIG. 1, a cell signal measuring device according to an embodiment of the present invention may include a vertical field effect transistor (100). The vertical field effect transistor (100) may include a drain electrode (10) including a two-dimensional nanomaterial (a two-dimensional nanomaterial layer), a nanotube (30) vertically disposed on the drain electrode (10), and a source electrode (70) disposed to electrically contact the top of the nanotube (30) or an area adjacent thereto. In addition, the vertical field effect transistor (100) may include a gate insulating layer (40) disposed on a surface of the nanotube (30), a gate electrode (50) disposed between the drain electrode (10) and the source electrode (70) to surround a portion of the nanotube (30) on the gate insulating layer (40), and a separation layer (60) filling a space between the gate electrode (50) and the source electrode (70). The above cell signal measuring device can be configured to measure the signal of a cell (biological cell) by contacting or penetrating the source electrode (70) into the cell. The cell may be a neural cell or other cell.

[0045] The drain electrode (10) may include, for example, graphene as the two-dimensional nanomaterial. In one embodiment, the drain electrode (10) may be formed of a graphene layer. A two-dimensional material (2D material) may be a single-layer, half-layer, or 2 to 3-layer layered structure in which atoms form a predetermined crystal structure. Graphene is a two-dimensional material, a single-layer (single-atomic layer) structure in which carbon atoms form a hexagonal structure. Graphene may have a symmetrical band structure based on the Dirac point, and since the effective mass of the charge at the Dirac point is very small, it may have a charge mobility that is at least 10 times (or at least 1000 times) faster than that of silicon (Si). In addition, graphene has a very large Fermi velocity (V F ) can have. Graphene can be a very good conductor and can be a flexible nanomaterial. In an embodiment of the present invention, the drain electrode (10) can include single-layer or multi-layer graphene. Electronically, a two-dimensional material can be defined as a material whose density of states (DOS) follows quantum well behavior. Since the density of states (DOS) can follow quantum well behavior even in a material in which multiple two-dimensional unit material layers are stacked (stacked in about 100 layers or less or about 20 layers or less), from this point of view, a structure in which the two-dimensional unit material layers (e.g., single graphene) are repeatedly stacked can also be referred to as a 'two-dimensional material'. The drain electrode (10) can be said to have a two-dimensional layered structure. The drain electrode (10) may include a two-dimensional conductive material other than graphene.

[0046] In an embodiment of the present invention, a hole (H10) may be formed in the drain electrode (10). The hole (H10) may be formed to penetrate the drain electrode (10) in the thickness direction. When manufacturing a plurality of vertical field effect transistors (100), a plurality of holes (H10) may be formed in the drain electrode (10).

[0047] The vertical field effect transistor (100) may further include a mask layer (20) disposed on the drain electrode (10). The mask layer (20) may have an opening (A10) exposing a hole (H10) of the drain electrode (10). The opening (A10) may have a larger diameter than the corresponding hole (H10). For example, the opening (A10) and the hole (H10) corresponding thereto may have the same center, and the diameter of the opening (A10) may be larger than the diameter of the hole (H10). Accordingly, an area of ​​the drain electrode (10) around the hole (H10) may be exposed by the opening (A10). The area of ​​the drain electrode (10) exposed around the hole (H10) may have a ring shape when viewed from above.

[0048] The mask layer (20) may be formed of a predetermined insulating material. For example, the mask layer (20) may be formed of an inorganic insulating material such as silicon oxide (SiO2) or an organic insulating material such as an insulating polymer. The mask layer (20) may be formed to a relatively thin thickness, for example, a thickness of about 20 nm to 70 nm. In some cases, the mask layer (20) may not be provided.

[0049] The vertical field effect transistor (100) may include nanotubes (30) each vertically arranged on the drain electrode (10) region exposed around the hole (H10) by the mask layer (20). The nanotubes (30) may have a hollow structure having a hollow hole. The nanotubes (30) may be an example of a 'nanostructure' having a one-dimensional shape. The nanotubes (30) may be a type of 'channel member'. The nanotubes (30) may be channels for transmitting electrical signals.

[0050] The nanotube (30) may be formed of a metal oxide having semiconductor properties. For example, the nanotube (30) may be formed of zinc oxide. In this case, the nanotube (30) may be referred to as a zinc oxide nanotube. Such a nanotube (30) may be formed by growth on the region of the drain electrode (10) exposed around the hole (H10). However, the material of the nanotube (30) is not limited to zinc oxide or a metal oxide and may vary depending on the case. The nanotube (30) may be formed of various materials having semiconductor properties. The growth method of the zinc oxide nanotube may be to control the directionality and vertically grow it using a zinc-containing precursor and an oxygen-containing gas as a precursor. The height and growth morphology of nanotubes (nanostructures) can be controlled by adjusting the pressure within the chamber where zinc oxide-based nanotubes are grown, the flow rate of a zinc-containing precursor such as DEZn (diethylzinc), and the oxygen flow rate. Furthermore, by adjusting the above process parameters, nanotubes with heights ranging from tens of nanometers to tens of micrometers can be grown.

[0051] In one embodiment, the nanotube (30) may have an outer diameter in the range of about 330 nm to 2.5 μm and an inner diameter in the range of about 220 nm to 2 μm. If the outer diameter of the nanotube (30) is too large, it may cause damage to cells or make it difficult to select single cells. Meanwhile, the length of the nanotube (30) may be about 600 nm to 12 μm. In this case, the nanotube (30) may be advantageous in appropriately performing various functions in the embodiments of the present invention.

[0052] The vertical field effect transistor (100) may include a gate insulating layer (40) disposed on the surface of the nanotube (30). The gate insulating layer (40) may include at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide (e.g., Al2O3), and a high-k material. Here, the high-k material may be a material having a higher dielectric constant than silicon nitride. However, the material of the gate insulating layer (40) is not limited to the above-described material and may vary depending on the case.

[0053] In one embodiment, the gate insulating layer (40) may have an extended shape to cover the upper surface of the drain electrode (10) while surrounding at least a portion of the outer surface of the nanotube (30). In the present embodiment, the gate insulating layer (40) may have an extended shape to cover the upper surface of the mask layer (20) disposed on the drain electrode (10) while surrounding at least a portion of the outer surface of the nanotube (30). The gate insulating layer (40) may not cover the outer surface of the upper region of the nanotube (30).

[0054] The vertical field effect transistor (100) may include a gate electrode (50) disposed on a gate insulating layer (40) between a drain electrode (10) and a source electrode (70) to surround a portion of a nanotube (30). For example, the gate electrode (50) may be disposed on a portion of the gate insulating layer (40) disposed on the drain electrode (10) and may have a form that surrounds a portion of the nanotube (30). The gate electrode (50) may have a type of wiring (line wiring) form. The gate electrode (50) may have a structure that extends (protrudes) upward around the nanotube (30) while having a wiring form. The gate electrode (50) may be formed to include at least one of various metals and metallic materials. As a non-limiting example, the gate electrode (50) may include Au.

[0055] The vertical field effect transistor (100) may include a separation layer (60) that fills the space between the gate electrode (50) and the source electrode (70). The separation layer (60) may be a spacer layer for separating the gate electrode (50) and the source electrode (70) from each other. The separation layer (60) may be formed of a flexible material, such as a polymer (an insulating polymer). As a non-limiting example, the separation layer (60) may include polyimide (PI). However, the material of the separation layer (60) is not limited to a polymer. In some cases, the separation layer (60) may also include an inorganic insulating material.

[0056] The separation layer (60) may have a thickness that exposes a portion of the upper portion of the nanotube (30) while covering at least a portion of the gate electrode (50). The separation layer (60) may have a thickness that exposes the outer surface of the upper region of the nanotube (30). The upper surface of the separation layer (60) may be arranged to be recessed to some extent from the upper end of the nanotube (30). Accordingly, the nanotube (30) may protrude upward to some extent with respect to the surface (upper surface) of the separation layer (60). For example, about 1 / 15 to 1 / 2 of the total length of the nanotube (30) may protrude upward from the separation layer (60).

[0057] The vertical field effect transistor (100) may include a source electrode (70) that is electrically contacted with the top of the nanotube (30) or an area adjacent thereto. Here, the electrical contact may include direct contact (connection) or indirect contact (connection). The source electrode (70) may be disposed on the top surface of the separation layer (60). The source electrode (70) may be disposed in contact with a portion of the nanotube (30) that protrudes upward from the top surface of the separation layer (60). The source electrode (70) may be disposed in contact with the outer circumference of the top region of the nanotube (30). The source electrode (70) may be formed to surround the outer circumference of the top region of the nanotube (30). In addition, the source electrode (70) may be formed to cover the upper surface of the top of the nanotube (30). In electrical measurements on cells, the source electrode (70) may be disposed to be inserted into or in contact with the cell. The source electrode (70) may be formed to include at least one of various metals and metallic materials. As a non-limiting example, the source electrode (70) may include Ti and Au. In this case, the source electrode (70) may include a Ti layer and an Au layer. However, this is merely exemplary, and the material composition of the source electrode (70) may vary.

[0058] According to one embodiment, the source electrode (70) may have a dot pattern shape when viewed from above. The source electrode (70) may be contacted or inserted into a cell and may be used to detect electrical signals of the cell. The source electrode (70) may, for example, function as a type of probe electrode. Accordingly, the source electrode (70) may not have a wiring shape.

[0059] FIG. 2 and FIG. 3 are schematic diagrams exemplarily showing a method for performing signal measurement (electrical measurement) for a cell (C1) using a cell signal measurement device according to one embodiment of the present invention.

[0060] Referring to FIGS. 2 and 3, a cell signal measuring device according to an embodiment of the present invention may include a vertical field effect transistor (100). The structure of the cell signal measuring device may be the same as described in FIG. 1. The cell signal measuring device may be configured to measure a signal of a cell (C1) by contacting or penetrating a source electrode (70) into the cell (C1). By using a source electrode (70) formed by contacting the outer surface of a nanotube (30) having a one-dimensional shape, access to the inside of the cell (C1) may be easy. That is, the source electrode (70) can be easily penetrated into the inside of the cell (C1) by penetrating the cell membrane, and the action potential (action potential signal) inside the cell (C1) can be easily and accurately measured.

[0061] According to one embodiment, the cell signal measuring device can control the intensity of a signal measured from a cell (C1) by changing the gate voltage applied to the gate electrode (50). Therefore, selective reading and signal measurement can be possible, precise measurement can be possible, and application of various measurement methods can be possible. A turn-on voltage or a turn-off voltage can be applied to the gate electrode (50), and various control voltages (intermediate control voltages) between the turn-on voltage and the turn-off voltage can be applied.

[0062] Additionally, the cell signal measuring device can transmit a predetermined stimulus (electrical stimulus) to a cell (C1) in contact with (or inserted into) the source electrode (70) by using the drain electrode (10) and the gate electrode (50). For example, by applying a predetermined first voltage to the gate electrode (50) and a predetermined second voltage to the drain electrode (10), an electrical stimulus can be applied to the cell (C1) in contact with (or inserted into) the source electrode (70). By using this function, precise, accurate, and diverse measurements of the cell (C1) can be made possible.

[0063] FIG. 4 is a perspective view showing a cell signal measuring device according to one embodiment of the present invention.

[0064] Referring to FIG. 4, a cell signal measuring device according to an embodiment of the present invention may include a vertical field effect transistor (100'). The vertical field effect transistor (100') may include a drain electrode (10) including a two-dimensional nanomaterial, a nanotube (30) vertically arranged on the drain electrode (10), and a source electrode (70) arranged to electrically contact the top of the nanotube (30) or an area adjacent thereto. In addition, the vertical field effect transistor (100) may include a gate insulating layer (not shown) arranged on a surface of the nanotube (30), a gate electrode (50) arranged between the drain electrode (10) and the source electrode (70) to surround a portion of the nanotube (30) on the gate insulating layer, and a separation layer (60) filling a space between the gate electrode (50) and the source electrode (70). The above cell signal measuring device can be configured to measure the signal of a cell (C1) by bringing the source electrode (70) into contact with or penetrating the cell (C1). The above cell signal measuring device including the vertical field effect transistor (100') can have the same configuration as or a modified configuration from the cell signal measuring device described with reference to FIG. 1.

[0065] A cell signal measuring device according to an embodiment of the present invention has a vertical nanostructure in the nanometer unit, so that signals inside cells can be easily read, and the signal intensity can be controlled at a desired location by utilizing a transistor structure. In particular, since the device can be manufactured in an array manner by utilizing the vertical nanostructure (see Fig. 7), integration is easy and each nanostructure can be independently controlled. Considering that the vertical nanostructure is a nanotube structure with a diameter of tens to hundreds of nanometers, integration can be easy, and utilization as a next-generation semiconductor device can also be considered. When a nanotube structure is used, a material transport function can be additionally implemented through the nanotube structure.

[0066] The cell signal measurement device according to the embodiment can be utilized to measure intracellular signals at the single-cell level, control signal intensity at a desired location, and facilitate understanding of brain cell networks and cell control. For example, signals can be read only from a desired location by varying the gate voltage, effectively measuring signals from a single cell. Furthermore, because signals can be read in real time, signals can be measured in milliseconds over time or immediately after a specific stimulus is delivered to the cell.

[0067] In particular, this device can be used to read action potential signals from living cells both in vitro and in vivo. Due to its device structure, it can easily enter cells while simultaneously allowing for signal intensity control. Since one-dimensional semiconductor materials can be formed into nanotubes to create devices on a scale of tens of nanometers, they can also be used in integrated circuits. Furthermore, since each vertical nanostructure in an array-shaped device can be independently manipulated, selective signal reading and electrical stimulus transmission can be enabled.

[0068] Additionally, although FIGS. 1 to 4 illustrate and describe a case where the cell signal measurement device includes a nanotube (30), other types of vertical nanostructures other than nanotubes (30) may be used. For example, vertical nanostructures with a large aspect ratio, such as nanorods or nanowires, may be applied.

[0069] FIGS. 5A to 5J are cross-sectional views showing a method for manufacturing a cell signal measuring device according to one embodiment of the present invention.

[0070] Referring to FIG. 5A, a drain electrode (15) including a two-dimensional nanomaterial (nanomaterial layer) may be placed on a predetermined substrate (5). The drain electrode (15) may include, for example, graphene as the two-dimensional nanomaterial. In one embodiment, the drain electrode (15) may be formed of a graphene layer. The drain electrode (15) may include a single-layer or multi-layer graphene. The graphene layer may be transferred onto the substrate (5) or grown on the substrate (5). However, the drain electrode (15) may also include a two-dimensional conductive material other than graphene.

[0071] Referring to FIG. 5b, a mask layer (25) may be formed on the drain electrode (15). A hole (H15) may be formed in the drain electrode (15), and an opening (A15) exposing the hole (H15) of the drain electrode (15) may be formed in the mask layer (25). The opening (A15) may have a larger diameter than the corresponding hole (H15). For example, the opening (A15) and the hole (H15) corresponding thereto may have the same center, and the diameter of the opening (A15) may be larger than the diameter of the hole (H15). Accordingly, an area of ​​the drain electrode (15) around the hole (H15) may be exposed by the opening (A15). The area of ​​the drain electrode (15) exposed around the hole (H15) may have a ring shape when viewed from above.

[0072] A mask layer (25) as in Fig. 5b can be formed by first forming a hole (H15) in the drain electrode (15), then forming a mask material layer thereon, and then forming an opening (A15) in the mask material layer. Alternatively, a structure as in Fig. 5b can be formed by forming a mask material layer on the drain electrode (15) as in Fig. 5a, then forming an opening (A15) in the mask material layer, and then forming a hole (H15) in the drain electrode (15). In addition, the method for forming a structure as in Fig. 5b can be modified in various ways.

[0073] The mask layer (25) may be formed of a predetermined insulating material. For example, the mask layer (25) may be formed of an inorganic insulating material such as silicon oxide (SiO2), or an organic insulating material such as an insulating polymer. The mask layer (25) may be formed to a relatively thin thickness, for example, a thickness of about 20 nm to 70 nm.

[0074] Referring to FIG. 5c, nanotubes (35) can be formed on the drain electrode (15) region exposed around the hole (H15) by the mask layer (25). The nanotubes (35) can be formed by a growth method, for example, a selective growth method. As a non-limiting example, the nanotubes (35) can be grown using an organic chemical vapor deposition method. The nanotubes (35) can have a hollow structure having a hollow hole.

[0075] The nanotube (35) may be formed of a metal oxide having semiconductor properties. For example, the nanotube (35) may be formed of zinc oxide. In other words, the nanotube (35) may be a zinc oxide nanotube. Such a nanotube (35) may be easily formed by a growth method on the region of the drain electrode (15) exposed around the hole (H15). However, the material of the nanotube (35) is not limited to zinc oxide or a metal oxide and may vary as needed. The nanotube (35) may be formed of various materials having semiconductor properties.

[0076] The nanotube (35) may have an outer diameter in the range of about 330 nm to 2.5 μm and an inner diameter in the range of about 220 nm to 2 μm. If the outer diameter of the nanotube (35) is too large, it may cause damage to cells or make it difficult to select single cells. Meanwhile, the length of the nanotube (35) may be about 600 nm to 12 μm. In this case, the nanotube (35) may be advantageous in appropriately performing various functions in embodiments of the present invention.

[0077] When the drain electrode (15) includes a graphene layer, since a single or multiple nanotubes (35) can be easily formed on a large-area graphene layer in a selective growth manner, the manufacturing process can be easy and the possibility of commercializing the device can be high.

[0078] Referring to FIG. 5d, a gate insulating layer (45) can be formed on the surface of the nanotube (35). For example, the gate insulating layer (45) can be formed by an atomic layer deposition (ALD) method. The gate insulating layer (45) can be formed generally conformally on the surface on which it is formed with a relatively thin thickness. The gate insulating layer (45) can include at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide (e.g., Al2O3), and a high-k material. Here, the high-k material can be a material having a higher dielectric constant than silicon nitride. However, the material of the gate insulating layer (45) is not limited to the above-described material and may vary depending on the case.

[0079] In one embodiment, the gate insulating layer (45) may be formed to surround the outer circumference of the nanotube (35) and cover the upper surface of the drain electrode (15). In this embodiment, the gate insulating layer (45) may be formed to surround the outer circumference of the nanotube (35) and cover the upper surface of the mask layer (25) disposed on the drain electrode (15). However, in some cases, the gate insulating layer (45) may be formed after removing the mask layer (15). The gate insulating layer (45) may be formed to cover the outer circumference of the upper region of the nanotube (35).

[0080] Referring to FIG. 5e, a material pattern (55a) for a gate electrode having a structure surrounding the outer circumference of the nanotube (35) can be formed on the gate insulating layer (45). The material pattern (55a) for a gate electrode can be formed to include at least one of various metals and metallic materials. The material pattern (55a) for a gate electrode can be formed, for example, by a lift-off method or by another method. The material pattern (55a) for a gate electrode can be formed to cover the outer circumference of the upper region of the nanotube (35).

[0081] Referring to FIG. 5F, an etching mask layer (58) having a thickness that exposes an upper region of a material pattern (55a) for a gate electrode may be formed on a gate insulating layer (45). The etching mask layer (58) may be formed to cover a lower region of the material pattern (55a) for a gate electrode while exposing an upper region of the material pattern (55a) for a gate electrode. The height of the upper surface of the etching mask layer (58) may be lower than the height of the upper end of the nanotube (35). A portion of the material pattern (55a) for a gate electrode may protrude upward with respect to the upper surface of the etching mask layer (58). The etching mask layer (58) may be formed of, for example, a predetermined insulating material.

[0082] Referring to FIG. 5g, the upper region of the material pattern for the gate electrode (55a in FIG. 5f) exposed by the etching mask layer (58) may be removed to define the gate electrode (55) from the material pattern for the gate electrode (55a in FIG. 5f). For example, the exposed portion (i.e., the upper region) of the material pattern for the gate electrode (55a in FIG. 5f) may be etched using a wet etching solution (i.e., an etchant) having a selective etching property for the conductive material of the material pattern for the gate electrode (55a in FIG. 5f). The wet etching solution may include, as a non-limiting example, potassium iodide (KI) and iodine (I2). The method for forming the gate electrode (55) is not limited to the above-described method and may vary in various ways.

[0083] Referring to FIG. 5h, after removing the etching mask layer (58 of FIG. 5g), a separation layer (65) can be formed. The separation layer (65) can be formed to cover at least a portion of the gate electrode (55) while exposing an upper portion of the gate insulating layer (45). The separation layer (65) can be formed by a deposition or spin coating method. The separation layer (65) can be formed of a flexible material such as a polymer (insulating polymer), for example. As a non-limiting example, the separation layer (65) can include polyimide (PI). However, the material of the separation layer (65) is not limited to a polymer. In some cases, the separation layer (65) may include an inorganic insulating material.

[0084] The separation layer (65) may have a thickness that covers at least a portion of the gate electrode (55) while exposing an upper portion of the gate insulating layer (45). The separation layer (65) may have a thickness that exposes an outer surface of an upper region of the gate insulating layer (45). The upper surface of the separation layer (65) may be arranged to be recessed to some extent from the upper end of the nanotube (35). Accordingly, the nanotube (35) may protrude upward to some extent with respect to the surface (upper surface) of the separation layer (65). For example, about 1 / 15 to 1 / 2 of the total length of the nanotube (35) may protrude upward from the separation layer (65).

[0085] Referring to FIG. 5i, a portion of the nanotube (35) may be exposed by removing an upper portion (i.e., a tip portion) of the gate insulating layer (45) exposed by the separation layer (65). The outer circumferential surface of the upper region of the nanotube (35) may be exposed. A predetermined wet etching solution (i.e., etchant) may be used to remove the upper portion of the gate insulating layer (45) exposed by the separation layer (65). The wet etching solution may include, as a non-limiting example, a MIF 300 solution. The MIF 300 solution may be an alkaline solution containing TMAH (tetramethylammoniumhydroxide).

[0086] Referring to FIG. 5j, a source electrode (75) may be formed on the separation layer (65) to be in electrical contact with an exposed portion of the nanotube (35). The source electrode (75) may be formed on the upper surface of the separation layer (65). The source electrode (75) may be positioned in contact with a portion of the nanotube (35) that protrudes upward from the upper surface of the separation layer (65). The source electrode (75) may be formed in contact with the outer circumference of the upper region of the nanotube (35). The source electrode (75) may be formed to surround the outer circumference of the upper region of the nanotube (35). In addition, the source electrode (75) may be formed to cover the upper surface of the upper portion of the nanotube (35). The source electrode (75) may be formed to have a size of about several μm, as a non-limiting example, to completely cover the nanotube (35). The source electrode (75) may be formed to include at least one of various metals and metallic materials. The source electrode (75) may be formed, for example, by a lift-off method or by another method.

[0087] A drain electrode (15), a nanotube (35) having a vertical structure, a gate insulating layer (45), a gate electrode (55), a separation layer (65), and a source electrode (75) can constitute one vertical field effect transistor (150). The cell signal measuring device may include a vertical field effect transistor (150). The cell signal measuring device may be configured to measure a signal of a cell by bringing the source electrode (75) into contact with or penetrating the cell. In addition, the cell signal measuring device may be configured to control the intensity of a signal measured from the cell by changing a gate voltage applied to the gate electrode (55). In some cases, the vertical field effect transistor (150) may be used separately from the substrate (5).

[0088] FIGS. 6A to 6G are perspective views showing a method for manufacturing a cell signal measuring device according to one embodiment of the present invention.

[0089] Referring to FIG. 6a, a drain electrode (15) including a two-dimensional nanomaterial (nanomaterial layer) may be provided. The drain electrode (15) may include, for example, graphene as the two-dimensional nanomaterial. The drain electrode (15) may also include a two-dimensional conductive material other than graphene. Nanotubes (35) arranged vertically on the drain electrode (15) may be formed. The nanotubes (35) may be selectively formed in a predetermined region of the drain electrode (15). A predetermined mask layer (not shown) may be used to form the nanotubes (35). For a specific method of forming the nanotubes (35) on the drain electrode (15), the methods of FIGS. 5a to 5c may be referred to.

[0090] Referring to FIG. 6b, a gate insulating layer (45) can be formed on the surface of the nanotube (35). For example, the gate insulating layer (45) can be formed by an ALD method. The gate insulating layer (45) can be formed to be relatively thin and generally conformally formed on the surface on which it is formed. In one embodiment, the gate insulating layer (45) can be formed to surround the outer circumferential surface of the nanotube (35) and cover the upper surface of the drain electrode (15). The gate insulating layer (45) can be formed to cover the outer circumferential surface of the upper region of the nanotube (35).

[0091] Referring to FIG. 6c, a material pattern (55a) for a gate electrode having a structure surrounding the outer surface of a nanotube (35) can be formed on a gate insulating layer (45). The material pattern (55a) for a gate electrode can be formed, for example, by a lift-off method or by another method. The material pattern (55a) for a gate electrode can be formed to cover the outer surface of the upper region of the nanotube (35).

[0092] Referring to FIG. 6d, the upper region of the material pattern for the gate electrode (55a of FIG. 6c) may be removed to define the gate electrode (55) from the material pattern for the gate electrode (55a of FIG. 6c). For example, the exposed portion (i.e., the upper region) of the material pattern for the gate electrode (55a of FIG. 6c) may be etched using a wet etching solution having selective etching properties for the conductive material of the material pattern for the gate electrode (55a of FIG. 6c). For this purpose, a predetermined etching mask layer (not shown) may be used. A specific method for defining the gate electrode (55) from the material pattern for the gate electrode (55a of FIG. 6c) may be the same as or similar to that described with reference to FIGS. 5f and 5g.

[0093] Referring to FIG. 6e, a separation layer (65) can be formed that exposes an upper portion of the gate insulating layer (45) while covering at least a portion of the gate electrode (55). The separation layer (65) can be formed of a flexible material, such as a polymer (insulating polymer). As a non-limiting example, the separation layer (65) can include polyimide (PI). However, the material of the separation layer (65) is not limited to a polymer. In some cases, the separation layer (65) may also include an inorganic insulating material.

[0094] Referring to FIG. 6f, a portion of the nanotube (35) may be exposed by removing an upper portion (i.e., a tip portion) of the gate insulating layer (45) exposed by the separation layer (65). The outer surface of the upper region of the nanotube (35) may be exposed. For example, a predetermined wet etching solution may be used to remove the upper portion of the gate insulating layer (45) exposed by the separation layer (65).

[0095] Referring to FIG. 6g, a source electrode (75) may be formed on the separation layer (65) in electrical contact with an exposed portion of the nanotube (35). The source electrode (75) may be formed on the upper surface of the separation layer (65). The source electrode (75) may be formed, for example, by a lift-off method or by any other method.

[0096] A drain electrode (15), a nanotube (35) having a vertical structure, a gate insulating layer (45), a gate electrode (55), a separation layer (65), and a source electrode (75) can constitute one vertical field effect transistor (150'). The cell signal measuring device may include a vertical field effect transistor (150'). The cell signal measuring device including the vertical field effect transistor (150') may have a configuration that is the same as or partially modified from the cell signal measuring device described with reference to FIG. 5j. In FIG. 6g, the source electrode (75) is illustrated as having a wiring form, but this is for evaluating the characteristics of the vertical field effect transistor (150'), and the source electrode (75) may not have a wiring form.

[0097] Additionally, although FIGS. 5A to 5J and 6A to 6G illustrate and describe a case where the cell signal measurement device includes a nanotube (35), other types of vertical nanostructures other than nanotubes (35) may be used. For example, vertical nanostructures with a large aspect ratio, such as nanorods or nanowires, may be applied. This may also be the case in the embodiment of FIG. 7, which will be described below.

[0098] FIG. 7 is a perspective view showing a cell signal measuring device having an array structure according to one embodiment of the present invention.

[0099] Referring to FIG. 7, a cell signal measuring device according to an embodiment of the present invention may have an array structure in which a plurality of vertical field effect transistors (VT10) are arranged. Each of the plurality of vertical field effect transistors (VT10) may have a configuration identical to or similar to the vertical field effect transistor described with reference to FIG. 1, FIG. 4, FIG. 5j, or FIG. 6g.

[0100] According to one embodiment, the cell signal measuring device may have a crossbar array structure. The cell signal measuring device may include a plurality of drain electrodes (15), a plurality of nanotubes (35), a plurality of gate electrodes (55), and a plurality of source electrodes (35). In addition, the cell signal measuring device may include a separation layer (65) commonly formed for at least a portion of the plurality of vertical field effect transistors (VT10). The plurality of drain electrodes (15) may have a wiring shape extending in a first direction. The plurality of gate electrodes (55) may have a wiring shape extending in a second direction intersecting the first direction. The second direction may be a direction perpendicular to the first direction. Therefore, the plurality of gate electrodes (55) may vertically intersect the plurality of drain electrodes (15).

[0101] A cell signal measuring device having an array structure such as that of FIG. 7 can be easily manufactured using the manufacturing method described with reference to FIGS. 5A to 5J and 6A to 6G. In one example, after forming a plurality of patterned drain electrodes (15), a plurality of nanotubes (35) may be grown on the plurality of drain electrodes (15), and a subsequent process may be performed. In another example, a plurality of nanotubes (35) may be grown on a plate-shaped drain electrode, a subsequent process may be performed, and then the plate-shaped drain electrode may be separated from the substrate, and a patterning process may be performed thereon to form a plurality of drain electrodes (15). The cell signal measuring device according to embodiments of the present invention may be a flexible device or a rigid device.

[0102] By using a cell signal measuring device having an array structure as shown in FIG. 7, selective signal measurement, selective signal control, selective stimulus application, etc. can be easily performed for some of a plurality of cells that are the target of signal measurement. By activating at least one of a plurality of drain electrodes (15) and at least one of a plurality of gate electrodes (55), selective signal measurement, selective signal control, selective stimulus application, etc. can be performed for a cell positioned corresponding to the intersection of the activated drain electrode (15) and the activated gate electrode (55). Therefore, by using a cell signal measuring device having an array structure, various and precise measurements for the cell(s) can be easily performed. In addition, since signals can be amplified or transmitted independently for each nanotube (35), it can be advantageous for integrated device applications that require precise control in a small area. In addition, since the device structure and manufacturing method according to an embodiment of the present invention are advantageous for integration by crossing multiple signal lines, it can be applied to a multiplexer, which is a type of electronic device.

[0103] Additionally, according to an embodiment of the present invention, an operating method of the cell signal measuring device may be provided. The operating method of the cell signal measuring device may include a step of contacting or inserting the source electrode into a biological cell and measuring a signal of the cell. Furthermore, the operating method of the cell signal measuring device may further include a step of controlling the intensity of a signal measured from the cell by changing a gate voltage applied to the gate electrode. In addition, the operating method of the cell signal measuring device may include all of the operating method features described with reference to FIGS. 1 to 4 and 7, etc.

[0104] According to the embodiments of the present invention described above, it is possible to easily measure action potential signals of biological cells outside the body (extracellularly) and inside the body (intracellularly), and implement a cell signal measuring device capable of controlling the signal intensity for a given cell. In addition, according to the embodiments of the present invention, it is possible to implement a cell signal measuring device capable of easily controlling the signal intensity and performing functions such as selective reading and stimulus transmission when performing electrical measurements on cells. According to one embodiment of the present invention, it is possible to implement a cell signal measuring device capable of measuring the action potential inside a cell by penetrating a cell membrane by manufacturing a vertical field effect transistor including a one-dimensional vertical nanostructure and utilizing the material properties of the nanostructure. In addition, according to one embodiment of the present invention, it is possible to implement a cell signal measuring device capable of easily controlling the signal intensity by changing the gate voltage of the vertical field effect transistor. Moreover, according to one embodiment of the present invention, by utilizing an array structure in which a plurality of vertical field effect transistors are arranged, a cell signal measuring device capable of performing various and precise measurements on cell(s) can be implemented.

[0105] This specification discloses preferred embodiments of the present invention, and although specific terms are used, they are used only in a general sense to easily explain the technical contents of the present invention and to help understand the invention, and are not intended to limit the scope of the present invention. It will be apparent to those skilled in the art that other modifications based on the technical idea of ​​the present invention are possible in addition to the embodiments disclosed herein. Those skilled in the art will appreciate that the cell signal measurement device including a field effect transistor with a vertical nanostructure applied according to the embodiments described with reference to FIGS. 1 to 7, and the manufacturing and operating methods thereof, can be variously substituted, changed, and modified without departing from the technical idea of ​​the present invention. As a specific example, in the above-described embodiments, the vertical field effect transistor mainly described includes nanotubes as the nanostructure, but nanostructures other than nanotubes (e.g., nanorods, nanowires, etc.) may also be used. Therefore, the scope of the invention should not be defined by the described embodiments, but by the technical idea described in the claims.

[0106] [Explanation of symbols]

[0107] * Symbol explanation for major parts of the drawing *

[0108] 5: Substrate

[0109] 10, 15: Drain electrode

[0110] 20, 25: Mask layer

[0111] 30, 35: Nanotubes

[0112] 40, 45: Gate insulation layer

[0113] 50, 55: Gate electrode

[0114] 55a: Material pattern for gate electrode

[0115] 58: Etching mask layer

[0116] 60, 65: Separation layer

[0117] 70, 75: Source electrode

[0118] 100, 100', 150, 150': Vertical field-effect transistor

[0119] A10, A15: Aperture

[0120] C1: Cell

[0121] H10, H15: Hole

[0122] VT10: Vertical field-effect transistor

[0123] The present invention relates to a cell signal measurement device including a field effect transistor to which a vertical nanostructure is applied, and a method for manufacturing and operating the same, which has industrial applicability.

Claims

1. A cell signal measuring device including a vertical field effect transistor, The above vertical field effect transistor, A drain electrode comprising a two-dimensional nanomaterial; A vertical nanostructure vertically arranged on the drain electrode; A source electrode arranged to make electrical contact with the upper portion of the nanostructure or an area adjacent thereto; A gate insulating layer disposed on the surface of the above nanostructure; a gate electrode arranged to surround a portion of the nanostructure on the gate insulating layer between the drain electrode and the source electrode; and including a separation layer filling the space between the gate electrode and the source electrode, A cell signal measuring device configured to measure the signal of a cell by contacting or penetrating the source electrode into the cell.

2. In paragraph 1, The above cell signal measuring device is a cell signal measuring device configured to control the intensity of a signal measured from the cell by changing the gate voltage applied to the gate electrode.

3. In paragraph 1, The above two-dimensional nanomaterial is a cell signal measuring device including graphene.

4. In paragraph 1, The above nanostructure is a cell signal measuring device that is any one of a nanotube, a nanorod, and a nanowire.

5. In paragraph 1, The above nanostructure is a cell signal measuring device comprising a metal oxide having semiconductor properties.

6. In paragraph 1, The gate insulating layer has an extended shape so as to cover the upper surface of the drain electrode while surrounding at least a portion of the outer surface of the nanostructure, A cell signal measuring device having a form in which the gate electrode surrounds a portion of the nanostructure while being disposed on a portion of the gate insulating layer disposed on the drain electrode.

7. In paragraph 1, The separation layer has a thickness that exposes an upper portion of the nanostructure while covering at least a portion of the gate electrode, The above source electrode is a cell signal measuring element disposed on the upper surface of the separation layer.

8. In paragraph 1, The above cell signal measuring device is a cell signal measuring device having an array structure in which a plurality of the above vertical field effect transistors are arranged.

9. In paragraph 8, The above cell signal measuring element is a cell signal measuring element having a crossbar array structure.

10. In paragraph 9, The above cell signal measuring device includes a plurality of drain electrodes, a plurality of nanostructures, a plurality of gate electrodes, and a plurality of source electrodes, The above plurality of drain electrodes have a wiring shape extending in the first direction, A cell signal measuring element in which the plurality of gate electrodes have a wiring form extending in a second direction intersecting the first direction.

11. A method for manufacturing a cell signal measuring device, comprising the step of forming a vertical field effect transistor, The step of forming the above vertical field effect transistor is: A step of preparing a drain electrode including a two-dimensional nanomaterial; A step of forming a vertical nanostructure vertically arranged on the drain electrode; A step of forming a gate insulating layer on the drain electrode and the nanostructure; A step of forming a gate electrode surrounding a part of the nanostructure on the gate insulating layer; A step of forming a separation layer that exposes an upper portion of the gate insulating layer while covering at least a portion of the gate electrode; A step of removing an upper portion of the gate insulating layer exposed by the separation layer to expose a portion of the nanostructure; and A method for manufacturing a cell signal measuring device, comprising the step of forming a source electrode electrically in contact with an exposed portion of the nanostructure on the separation layer.

12. In paragraph 11, The above two-dimensional nanomaterial is a method for manufacturing a cell signal measurement device including graphene.

13. In paragraph 11, A method for manufacturing a cell signal measuring device, wherein the above nanostructure is any one of a nanotube, a nanorod, and a nanowire.

14. In paragraph 11, The above nanostructure is a method for manufacturing a cell signal measurement device including a metal oxide having semiconductor properties.

15. In paragraph 11, The gate insulating layer is formed to surround the outer surface of the nanostructure and cover the upper surface of the drain electrode, A method for manufacturing a cell signal measuring device, wherein the gate electrode is formed to surround a portion of the nanostructure on a portion of the gate insulating layer disposed on the drain electrode.

16. In the 11th paragraph, the step of forming the gate electrode comprises: A step of forming a material pattern for a gate electrode having a structure surrounding an outer surface of the nanostructure on the gate insulating layer; A step of forming an etching mask layer having a thickness that exposes an upper area of ​​the material pattern for the gate electrode on the gate insulating layer; and A method for manufacturing a cell signal measuring device, comprising the step of defining the gate electrode from the material pattern for the gate electrode by removing an upper area of ​​the material pattern for the gate electrode exposed by the etching mask layer.

17. In paragraph 11, A method for manufacturing a cell signal measuring device having an array structure in which a plurality of vertical field effect transistors are arranged.

18. In paragraph 17, The above cell signal measuring device is a method for manufacturing a cell signal measuring device having a crossbar array structure.

19. In paragraph 18, The above cell signal measuring device includes a plurality of drain electrodes, a plurality of nanostructures, a plurality of gate electrodes, and a plurality of source electrodes, The above plurality of drain electrodes have a wiring shape extending in the first direction, A method for manufacturing a cell signal measuring element in which the plurality of gate electrodes have a wiring form extending in a second direction intersecting the first direction.

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