Voltage drop handling method and apparatus, system, electronic device and storage medium

Abstract

Provided in the embodiments of the present application are a voltage drop handling method and apparatus, a system, an electronic device and a storage medium. The voltage drop handling method comprises: acquiring voltage data of an input power supply and, on the basis of the voltage data, detecting whether a transient voltage drop occurs in the power supply; when a transient voltage drop occurs, generating a first control signal to control a first preset device to execute a first response operation until the transient voltage drop no longer occurs in the power supply; during the execution of the first response operation, extracting a feature value of the input power supply; after the first response operation has been stopped, determining a guardband voltage on the basis of the feature value; on the basis of the guardband voltage and the voltage data, obtaining a static voltage drop signal; and, on the basis of the static voltage drop signal, generating a second control signal to control a second preset device to execute a second response operation until the voltage data satisfies a preset requirement.

Description

Voltage drop processing method, device, system, electronic device and storage medium

[0001] Related applications

[0002] This application claims priority to Chinese patent application No. 202410191089.8 filed on February 20, 2024, the entire contents of which are incorporated by reference into this application. Technical Field

[0003] The present application relates to the field of low power consumption of chips, and in particular to a voltage drop processing method, device, system, electronic device and storage medium. Background Art

[0004] Power supply voltage drop is a decrease in power supply voltage caused by a step change in current load. The process includes an initial short transient voltage drop and a subsequent steady-state voltage drop, as shown in Figure 1. This phenomenon increases the operating voltage margin of the SoC (System on Chip), resulting in significant power consumption. Therefore, it is necessary to properly handle this non-ideal phenomenon to achieve low chip power consumption. Summary of the Invention

[0005] Embodiments of the present application provide a voltage drop processing method, apparatus, system, electronic device, and storage medium.

[0006] In a first aspect, an embodiment of the present application provides a voltage drop processing method, the method comprising: obtaining voltage data of an input power supply, and detecting whether a transient voltage drop occurs in the power supply based on the voltage data; in the case where a transient voltage drop is detected in the power supply, generating a first control signal to control a first preset device to perform a first response operation based on the first control signal until no transient voltage drop is detected in the power supply within a first preset time period; during the execution of the first response operation, extracting a characteristic value of the input power supply; after stopping the execution of the first response operation, determining a protection band voltage based on the characteristic value; the protection band voltage is the voltage margin required to prevent voltage drops; obtaining a static voltage drop signal based on the protection band voltage and the voltage data; generating a second control signal based on the static voltage drop signal to control a second preset device to perform a second response operation based on the second control signal until the voltage data meets the preset requirements.

[0007] In a second aspect, an embodiment of the present application provides a voltage drop processing device, comprising: a detection unit, a response unit and a feedback unit; the detection unit is configured to obtain voltage data of an input power supply, and detect whether a transient voltage drop occurs in the power supply based on the voltage data; the response unit is configured to generate a first control signal when a transient voltage drop is detected in the power supply, so as to control the execution of a preset first response operation based on the first control signal until no transient voltage drop is detected in the power supply within a first preset time period; the feedback unit is configured to extract a characteristic value of the input power supply during the execution of the first response operation; the feedback unit is further configured to determine a protection band voltage based on the characteristic value after stopping the execution of the first response operation; the protection band voltage is the voltage margin required to prevent voltage drops; the detection unit is further configured to obtain a static voltage drop signal based on the protection band voltage and the voltage data; the response unit is further configured to generate a second control signal based on the static voltage drop signal, so as to control the execution of a second response operation based on the second control signal until the voltage data meets the preset requirements.

[0008] In a third aspect, an embodiment of the present application provides a voltage drop processing system, comprising: the voltage drop processing device, a power supply voltage generating circuit, a clock generating circuit, a clock frequency reduction circuit and a control unit; the control unit is configured to output a first control command to control the voltage of the input power supply, and output a second control command to control the clock frequency; the power supply voltage drop processing device is configured to detect whether a transient voltage drop occurs in the power supply, and generate a control signal to control the power supply voltage and / or clock frequency reduction when a transient voltage drop is detected in the power supply; the power supply voltage generating circuit is configured to output a corresponding power supply voltage according to the control signal and the first control command; the clock frequency reduction circuit is configured to output a corresponding clock frequency reduction signal according to the control signal; the clock generating circuit is configured to generate a corresponding clock signal according to the clock frequency reduction signal and the second control command.

[0009] In a fourth aspect, an embodiment of the present application provides an electronic device, comprising: one or more processors; a memory on which one or more programs are stored, and when the one or more programs are executed by the one or more processors, the one or more processors implement the voltage drop processing method; one or more input / output I / O interfaces, connected between the processor and the memory, and configured to implement information interaction between the processor and the memory.

[0010] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the data processing method is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In the accompanying drawings of the embodiments of the present application:

[0012] FIG1 is a schematic diagram of voltage drop in the related art;

[0013] FIG2 is a flow chart of a method for handling voltage drops according to an embodiment of the present application;

[0014] FIG3 is a schematic diagram of a method for handling voltage drops according to an embodiment of the present application;

[0015] FIG4 is a block diagram of a voltage drop processing device according to an embodiment of the present application;

[0016] FIG5 is a circuit block diagram of a detection unit provided in an embodiment of the present application;

[0017] FIG6 is a circuit block diagram of a feedback unit provided in an embodiment of the present application;

[0018] FIG7 is a circuit block diagram of a response unit according to an embodiment of the present application;

[0019] FIG8 is a schematic diagram of data interaction between a feature value extraction subunit and a guard band voltage calculation subunit provided in an embodiment of the present application;

[0020] FIG9 is a waveform diagram of a voltage drop processing method provided in an embodiment of the present application;

[0021] FIG10 is a block diagram of a voltage drop processing system according to an embodiment of the present application;

[0022] FIG11 is a block diagram of the electronic device provided in an embodiment of the present application;

[0023] FIG12 is a block diagram of the composition of a computer-readable storage medium provided in an embodiment of the present application. DETAILED DESCRIPTION

[0024] In order to enable those skilled in the art to better understand the technical solution of the present application, the communication perception data processing method and computer-readable storage medium provided in the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0025] The present application will be described more fully hereinafter with reference to the accompanying drawings, but the illustrated embodiments may be embodied in different forms, and the present application should not be construed as limited to the embodiments set forth below. Rather, these embodiments are provided to make this application thorough and complete and to enable those skilled in the art to fully understand the scope of this application.

[0026] The accompanying drawings of the embodiments of the present application are intended to provide a further understanding of the embodiments of the present application and constitute a part of the specification. Together with the detailed embodiments, they are used to explain the present application and do not constitute a limitation of the present application. The above and other features and advantages will become more apparent to those skilled in the art by describing the detailed embodiments with reference to the accompanying drawings.

[0027] The present application may be described with reference to plan views and / or cross-sectional views by way of ideal schematic views of the present application. Therefore, the exemplary illustrations may be modified according to manufacturing techniques and / or tolerances.

[0028] In the absence of conflict, the various embodiments of the present application and the various features therein may be combined with each other.

[0029] The terms used in this application are only used to describe specific embodiments and are not intended to limit this application. As used in this application, the term "and / or" includes any and all combinations of one or more related enumerated items. As used in this application, the singular forms "a" and "the" are also intended to include plural forms, unless the context clearly indicates otherwise. As used in this application, the terms "comprising" and "made of" specify the presence of the features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof.

[0030] Unless otherwise defined, all terms (including technical and scientific terms) used in this application have the same meaning as commonly understood by those skilled in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this application, and will not be interpreted as having an idealized or overly formal meaning unless expressly defined in this application.

[0031] The present application is not limited to the embodiments shown in the drawings, but includes modifications of the configurations formed based on the manufacturing process. Therefore, the regions illustrated in the drawings are schematic in nature, and the shapes of the regions shown in the drawings illustrate the specific shapes of the regions of the elements, but are not intended to be limiting.

[0032] Power supply voltage drop is a decrease in power supply voltage caused by a step change in current load. The process includes an initial short transient voltage drop and a subsequent steady-state voltage drop, as shown in Figure 1. This phenomenon increases the operating voltage margin of the SoC (System on Chip), resulting in significant power consumption. Therefore, it is necessary to properly handle this non-ideal phenomenon to achieve low chip power consumption.

[0033] Current solutions for power supply voltage drops include:

[0034] 1. First, the events of the first-level pipeline in the processor core are monitored. When specific events occur, power drop mitigation strategies (such as throttling the processor core) are adopted. The intensity and duration of the adopted strategies are determined by the real-time feedback of many monitors.

[0035] The disadvantages of the above technology are: (1) it only processes transient voltage drops and cannot solve the problem of steady-state voltage drops; (2) it is highly dependent on the design of the processor core (for example, the technology requires the processor core to have a multi-stage pipeline and at the same time have the event monitoring function and pipeline throttling function of the first-stage pipeline). Therefore, it is not applicable to other modules or subsystems of the SOC other than the processor core, and is not applicable to processor cores that do not have the above functions.

[0036] 2. When the system detects a power supply voltage drop exceeding a threshold, it executes a voltage mitigation strategy (i.e., reduces the clock frequency) to mitigate transient voltage drops. The system can also adjust the power supply voltage based on the duration or number of times the system executes the voltage mitigation strategy over a period of time.

[0037] The disadvantages of the above technology are: (1) the feedback adjustment speed is slow and takes some time to take effect (for example, increasing the voltage), and it cannot solve the static voltage drop problem after each voltage drop occurs; (2) the execution time or number of times of the voltage mitigation strategy is weakly correlated with the current power supply voltage value, and the effect of adjusting the power supply voltage based on this is poor, the risk is high, and it may even cause the chip to malfunction.

[0038] In the embodiment of the present application, when a voltage drop in the power supply is detected, a first control signal is generated and a preset first response operation (i.e., a fast response operation) is executed to alleviate the transient voltage drop and reduce the operating voltage of the chip; and after stopping the execution of the first response operation, a second control signal is generated based on the calculated static voltage drop signal, and the second response operation (i.e., a low-speed response operation) is started. The low-speed response operation can eliminate the static voltage drop and ensure sufficient voltage margin; and during the execution of the first response operation, the characteristic value of the input power supply is extracted, the protection band voltage is determined based on the characteristic value, and the static voltage drop signal is obtained according to the protection band voltage and voltage data, which is used to generate a second control signal for controlling the execution of the second response operation, thereby achieving the second control signal based on the current voltage data and the expected voltage margin, ensuring the effectiveness of the second response operation, improving the accuracy of voltage regulation, and ensuring the voltage regulation effect and low power consumption of the chip.

[0039] The voltage drop processing method of the embodiments of the present application can be executed by any electronic device, such as a terminal device or a server. The terminal device may include, but is not limited to, an in-vehicle device, a user equipment (UE), a mobile device, a computing device, a wearable device, and the like. For example, it may include, but is not limited to, a cellular phone, a cordless phone, a personal digital assistant (PDA), a portable computer, and the like. The voltage drop processing method can be implemented by a processor invoking computer-readable program instructions stored in a memory, or it can be implemented by a server.

[0040] The following is a detailed introduction to the embodiments of the present application.

[0041] The present invention provides a method for handling voltage drops, as shown in FIG2 and FIG3 . The method may include steps S11 to S16:

[0042] Step S11 : obtaining voltage data of the input power supply, and detecting whether a transient voltage drop occurs in the power supply according to the voltage data.

[0043] Step S12: When a transient voltage drop of the power supply is detected, a first control signal is generated to control a first preset device to perform a first response operation based on the first control signal until no transient voltage drop of the power supply is detected within a first preset time period.

[0044] Step S13: During the execution of the first response operation, extract the characteristic value of the input power.

[0045] Step S14: After stopping the first response operation, determining a guard band voltage based on the characteristic value; the guard band voltage is a voltage margin required to prevent voltage drop.

[0046] Step S15: Obtain a static voltage drop signal according to the guard band voltage and the voltage data.

[0047] Step S16: Generate a second control signal based on the static voltage drop signal, and control the second preset device to perform a second response operation based on the second control signal until the voltage data meets the preset requirement.

[0048] In the embodiment of the present application, the response speed of the second response operation is lower than the response speed of the first response operation.

[0049] In an embodiment of the present application, as shown in FIG4 , the above embodiment can be implemented based on a preset voltage drop processing device 100 . The voltage drop processing device 100 can include a detection unit 101 , a response unit 102 and a feedback unit 103 .

[0050] In the embodiment of the present application, the detection unit 101 can periodically detect whether a transient voltage drop occurs in the power supply based on the voltage data of the input power supply based on a preset detection cycle.

[0051] In an embodiment of the present application, detecting whether a transient voltage drop occurs in the power supply based on voltage data includes: performing a first filtering on the voltage data to obtain first voltage data of a first preset bit in the voltage data; comparing the first voltage data with a preset detection threshold, and determining whether a transient voltage drop occurs in the power supply based on the detection result.

[0052] In an embodiment of the present application, the circuit block diagram of the detection unit 101 is shown in Figure 5. The detection unit 101 may include a first filter sub-unit 1011 and a voltage drop detection sub-unit 1012. The first filter sub-unit 1011 can be used to perform a first filtering on the input voltage data to obtain the first voltage data of the first preset bit in the voltage data to reduce the data bit width. The first preset bit can refer to one or more bits.

[0053] In an embodiment of the present application, the input voltage data can be thermometer-encoded: the first filter sub-unit 1011 takes the (y1+2)th to (y1+8)th bits and outputs them to the voltage drop detection sub-unit 1012, where y1 is a preset value, indicating the minimum value of the input data allowed by the circuit. If it is lower than the minimum value, the circuit will be abnormal.

[0054] In an embodiment of the present application, the input voltage data may also be encoded in binary: the first filter subunit 1011 takes the (log2(y1)+2)th to (log2(y1)+8)th bits and outputs them to the voltage drop detection subunit 1012 .

[0055] In an embodiment of the present application, the first filter sub-unit 1011 obtains the first voltage data and outputs it to the voltage drop detection sub-unit 1012. The voltage drop detection sub-unit 1012 detects whether a transient voltage drop of the power supply occurs based on the input first voltage data. The detection method may include but is not limited to: comparing the first voltage data with a preset detection threshold, and determining whether a transient voltage drop occurs in the power supply based on the detection result.

[0056] In an embodiment of the present application, the first voltage data may include but is not limited to: a current voltage value and / or a current voltage drop rate; the detection threshold may include but is not limited to: a voltage threshold and / or a voltage drop rate threshold.

[0057] In an embodiment of the present application, for example, the above-mentioned detection method may include: comparing the current voltage value with a voltage threshold value, and when the current voltage value is lower than the voltage threshold value, it can be determined that a transient voltage drop occurs in the power supply; and / or, comparing the current voltage drop rate with a voltage drop speed threshold value, and when the current voltage drop rate is lower than the voltage drop speed threshold value, it can be determined that a transient voltage drop occurs in the power supply.

[0058] In an embodiment of the present application, as shown in FIG5 , the detection unit 101 may further include a second filter subunit 1013 . The second filter subunit 1013 may be configured to obtain a static voltage drop signal according to the guard band voltage and the voltage data.

[0059] In an embodiment of the present application, obtaining a static voltage drop signal based on the guard band voltage and voltage data includes: performing a second filtering on the guard band voltage and voltage data to obtain second voltage data of a second preset bit position as the static voltage drop signal.

[0060] In an embodiment of the present application, the second filter subunit 1013 can be used to perform a second filtering on the input voltage data and the guard band voltage (i.e., the first feedback control signal, which can be represented as feedback control signal 1) to obtain second voltage data of a second preset bit position in the voltage data to reduce the data bit width. The second preset bit position can be one or more bits. The second voltage data is used to control the execution of the second response operation.

[0061] In an embodiment of the present application, the input voltage data and the protection band voltage can also be thermometer-encoded: the second filter sub-unit 1013 can take the (y2+z-3)th to (y2+z+3)th bits as static voltage drop signals and output them to the response unit 102, where y2 is a preset value, indicating the minimum value of the input data allowed by the circuit. If it is lower than the minimum value, the circuit will be abnormal, and z is the value of the first feedback control signal.

[0062] In the embodiment of the present application, the second filter sub-unit 2 can also perform a signed calculation on the input voltage data and the guard band voltage: (y2+z-input voltage data), and the calculation result is output to the response unit 102 as a static voltage drop signal.

[0063] In an embodiment of the present application, as shown in FIG6 , the feedback unit 103 may include a feature value extraction subunit 1031 and a guard band voltage calculation subunit 1032. The feature value extraction subunit 1031 may extract a feature value of the input power supply during the execution of the first response operation. The feature value may include, but is not limited to, a voltage feature value. For example, the feature value may include, but is not limited to, any one or more of the following: a voltage drop value of the input power supply, a voltage drop slope (which may be referred to as slope 1 to slope n in FIG8 , where n is a positive integer), a minimum voltage of the input power supply, and the number of clock cycles required for the voltage of the input power supply to drop to the minimum voltage value. The guard band voltage calculation subunit 1032 determines the guard band voltage based on the extracted feature value (a detailed scheme is described later), and generates a first feedback control signal (which may be represented as feedback control signal 1) based on the guard band voltage, and feeds it back to the second filter subunit 1013, so that the second filter subunit 1013 obtains a static voltage drop signal based on the guard band voltage and the second voltage data.

[0064] In the embodiment of the present application, the protection band voltage is the voltage margin required to prevent abnormal chip operation caused by voltage drop, which can be regarded as a voltage value that needs to be higher than the normal working voltage; the static voltage drop signal is the voltage drop value when the current voltage is lower than the normal working voltage.

[0065] In an embodiment of the present application, after performing the second response operation based on the static voltage drop signal, the static voltage drop can be compensated, that is, the voltage drop value indicated by the current static voltage drop signal can be compensated, so that the voltage value of the input power supply can be higher than or equal to the sum of the preset minimum voltage threshold value and the protection band voltage value.

[0066] In an embodiment of the present application, as shown in FIG7 , the response unit 102 may be configured to output a control signal when a transient voltage drop occurs in the power supply voltage, wherein the control signal is configured to control execution of the first response operation and the second response operation.

[0067] In an embodiment of the present application, the response unit 102 may include a fast response sub-unit 1021, and the control signal may include a first control signal (which may be represented as control signal 1). The fast response sub-unit 1021 sends a first control signal based on the detection result of a transient voltage drop in the power supply to control the corresponding device to perform a first response operation (also referred to as a fast response operation).

[0068] In an embodiment of the present application, the first control signal may include but is not limited to: a clock throttling enable signal and a clock throttling level signal (the clock throttling level signal is a multi-bit signal that can be used to represent different clock throttling levels. The high and low clock throttling levels are used to indicate the degree of clock frequency reduction. For example, a high clock throttling level means a high degree of clock frequency reduction).

[0069] In the embodiment of the present application, the first response operation may include but is not limited to: enabling clock throttling, and adjusting the clock frequency according to the clock throttling level signal (for example, reducing the clock frequency).

[0070] In the embodiment of the present application, the first control signal may also include but is not limited to: a current injection signal.

[0071] In the embodiment of the present application, the first response operation may also include but is not limited to: injecting current into the power rail.

[0072] In an embodiment of the present application, the response unit 102 may include a low-speed response sub-unit 1022, and the control signal may include a second control signal (which can be expressed as control signal 2). The low-speed response sub-unit 1022 can generate a second control signal based on the aforementioned static voltage drop signal and the state in which the fast response sub-unit 1021 does not issue the first control signal to control the corresponding device to perform a second response operation (also referred to as a low-speed response operation).

[0073] In the embodiment of the present application, the second control signal may include but is not limited to: a power supply voltage adjustment signal, etc.

[0074] In the embodiment of the present application, the second response operation may include but is not limited to: adjusting the power supply voltage.

[0075] In the embodiment of the present application, the response speed of the second response operation is lower than the response speed of the first response operation, and the execution degree of the second response operation is determined according to the voltage drop value indicated by the static voltage drop signal.

[0076] In the embodiment of the present application, the first control signal and the second control signal mentioned above can be used as output data of the voltage drop processing device 100 in the embodiment of the present application.

[0077] In an embodiment of the present application, after detecting whether a transient voltage drop occurs in the power supply based on voltage data, the method may further include: setting a preset detection flag signal based on the detection result; wherein, when the detection result is that a transient voltage drop occurs in the power supply, the detection flag signal is set to valid; when the detection result is that no transient voltage drop occurs in the power supply, the detection flag signal is set to invalid; and according to the change of the detection flag signal, outputting a corresponding control signal to control the first response operation and / or the second response operation to make corresponding adjustments.

[0078] In an embodiment of the present application, as shown in Figure 5, the detection result of whether a transient voltage drop occurs in the power supply can be indicated by a preset detection flag signal. For example, when a transient voltage drop occurs in the power supply, the detection flag signal is set to be valid; when a transient voltage drop does not occur in the power supply, the detection flag signal is set to be invalid.

[0079] In an embodiment of the present application, as shown in FIG7 , the detection flag signal is input to the aforementioned fast response subunit 1021 , and the fast response subunit 1021 can determine whether a transient voltage drop occurs in the power supply based on whether the detection flag signal is valid or invalid.

[0080] In an embodiment of the present application, when the detection flag signal is valid, the fast response subunit 1021 outputs a first control signal (which can be expressed as control signal 1). For example, control signal 1 can include a clock throttling enable signal and a clock throttling level signal. When the detection flag signal changes from valid to invalid, the control signal 1 output by the fast response subunit 1021 gradually becomes invalid. The process of gradually invalidating the control signal 1 may include but is not limited to: first gradually reducing the clock throttling level, and when the clock throttling level is reduced to below the preset throttling level threshold, then invalidating the clock throttling enable signal; when the detection flag signal changes from valid to invalid, as shown in Figure 7, the fast response subunit 1021 also sends an enable signal to the low-speed response subunit 1022, and then the low-speed response subunit 1022 outputs a control signal 2. The control signal 2 may include but is not limited to a power supply voltage adjustment signal. The control signal 2 output by the low-speed response subunit 1022 may be a function related to the static voltage drop signal.

[0081] In the embodiment of the present application, the aforementioned method for obtaining the guard band voltage is described in detail below.

[0082] In the embodiment of the present application, determining the guard band voltage based on the eigenvalue may include: calculating the guard band voltage according to the eigenvalue extracted currently and the historical eigenvalue.

[0083] In an embodiment of the present application, calculating the guard band voltage based on the currently extracted eigenvalue and the historical eigenvalue may include: performing a weighted summation on the currently extracted eigenvalue and at least one historical eigenvalue to obtain the guard band voltage.

[0084] In the embodiment of the present application, a schematic diagram of data interaction between the eigenvalue extraction subunit 1031 and the guardband voltage calculation subunit 1032 in the feedback unit 103 is shown in FIG8 , wherein the eigenvalue extraction subunit 1031 can input voltage data, an enable signal, and a clock signal, and send the extracted eigenvalues ​​to the guardband voltage calculation subunit 1032. The following describes an implementation scheme for calculating the guardband voltage by the guardband voltage calculation subunit 1032, taking a voltage drop value (for example, including but not limited to a maximum voltage drop value) as an example of the eigenvalue being an example.

[0085] In an embodiment of the present application, the guard band voltage calculation subunit 1032 may include k+2 (k is a positive integer) registers, the first register may be used to store the maximum voltage drop value caused by the first m (m is a positive integer) power supply voltage drops (m>>k, that is, m is much greater than k), which may be identified as a voltage drop value k+2; the second register may be used to store the maximum voltage drop value caused by the current power supply voltage drop, which may be identified as a voltage drop value k+1; the third to k+2 registers respectively store the voltage drop values ​​caused by the first k power supply voltage drops, which may be identified as voltage drop 1, ..., voltage drop value k. Based on the voltage drop values ​​stored in the k+2 registers and the weight values ​​corresponding to the k+2 registers (which may be weights w1, ..., wk, wk+1, wk+2 respectively), the product of the voltage drop value stored in each register and the corresponding weight value is calculated, and the k+2 products obtained are summed to obtain the guard band voltage.

[0086] In an embodiment of the present application, the initial values ​​of the registers can be determined during the chip testing phase. During this phase, the voltage drop handling apparatus 100 of the embodiment of the present application is disabled, and chip use cases that can induce voltage drops are repeatedly run. The maximum voltage drop values ​​caused by voltage drops during these chip use cases are recorded. After the chip testing phase ends, the recorded maximum voltage drop values ​​are set as the initial values ​​of the k+2 registers.

[0087] In an embodiment of the present application, the weight value corresponding to each register may have multiple setting modes, for example, including but not limited to: performance mode, minimum power consumption mode, user-defined mode, etc.

[0088] In an embodiment of the present application, in performance mode, the guard band voltage is mainly determined by the maximum voltage drop value, so the first register is assigned the highest weight value w, and the weight values ​​of the remaining k+1 registers are equal to (1-w) / (k+1).

[0089] In an embodiment of the present application, in the lowest power consumption mode, the guard band voltage is mainly determined by the maximum voltage drop value caused by the most recent multiple voltage drops. Therefore, the weight value w of the first register is reduced, and the weight value of the Xth (X is a positive integer, 1≤X≤k) register is equal to (1-w) / (k+1)×[2-2×(X-2) / k].

[0090] In an embodiment of the present application, in user-defined mode, the weight value of each register can be customized.

[0091] In an embodiment of the present application, after the second response operation is completed, the method may further include: adjusting a detection parameter and / or a first response operation parameter according to the characteristic value; wherein the detection parameter is used to detect whether a transient voltage drop occurs in the power supply; the detection parameter includes but is not limited to a detection threshold and / or a parameter affecting the detection threshold; the first response operation parameter is a parameter affecting the response speed of the first response operation.

[0092] In the embodiment of the present application, for example, the detection threshold may include but is not limited to a voltage threshold; the parameters affecting the detection threshold and the first response operation parameters may include but are not limited to a clock throttling level.

[0093] In an embodiment of the present application, as shown in FIG6 , the feedback unit 103 may further include a detection threshold control subunit 1033 , which may be configured to adjust the detection threshold according to the characteristic value.

[0094] For example, when the characteristic value is the minimum voltage value of the input power supply and / or the number of clock cycles required for the voltage of the input power supply to drop to the minimum voltage value, and the detection parameter is the detection threshold (such as the first preset voltage threshold or the second preset voltage threshold) and / or the clock throttling level: when any one or more of the minimum voltage value is lower than the first preset voltage threshold and the number of clock cycles is less than the first preset number threshold is satisfied, a second feedback control signal (which can be expressed as feedback control signal 2) is output, and the voltage drop detection subunit 1012 is controlled by the second feedback control signal to lower the first preset voltage threshold (detection threshold) and / or increase the clock throttling level; or, when any one or more of the minimum voltage value is higher than the second preset voltage threshold and the number of clock cycles is greater than the second preset number threshold is satisfied, a second feedback control signal (which can be expressed as feedback control signal 2) is output, and the voltage drop detection subunit 1012 is controlled by the second feedback control signal to increase the second preset voltage threshold (detection threshold) and / or reduce the clock throttling level; wherein the first preset voltage threshold is less than the second preset voltage threshold, and the first preset number threshold is less than the second preset number threshold.

[0095] In the embodiment of the present application, as shown in FIG6 , the feedback unit 103 may further include a fast response control subunit 1034 . The fast response control subunit 1034 may be configured to adjust a fast response parameter according to the characteristic value.

[0096] For example, when the characteristic value is the minimum voltage value of the input power supply and / or the number of clock cycles required for the voltage of the input power supply to drop to the minimum voltage value, and the fast response parameter is the clock throttling level: when the minimum voltage value is lower than any one or more of the third preset voltage threshold and the number of clock cycles is less than any one or more of the third preset number threshold, a third feedback control signal (which can be expressed as feedback control signal 3) is output, and the third feedback control signal controls the fast response subunit 1021 to increase the clock throttling level; or, when the minimum voltage value is higher than any one or more of the fourth preset voltage threshold and the number of clock cycles is more than any one or more of the fourth preset number threshold, a third feedback control signal (which can be expressed as feedback control signal 3) is output, and the third feedback control signal controls the fast response subunit 1021 to reduce the clock throttling level; wherein the third preset voltage threshold is less than the fourth preset voltage threshold, and the third preset number threshold is less than the fourth preset number threshold.

[0097] In the embodiment of the present application, as shown in FIG9 , there is a waveform diagram of the voltage drop processing method of the embodiment of the present application. The implementation steps of the solution of the present application are given below in conjunction with the diagram.

[0098] VDD is the power supply voltage, CLK is the clock signal. At time node 1, the power supply voltage (VDD) begins to drop; at time node 2, the input data (i.e., power supply data) is lower than the detection threshold; after a delay (time node 3), the detection flag signal changes from invalid to valid; after another delay (time node 4), the control signal 1 changes from invalid to valid, and the clock begins to reduce the frequency at this time, which is only a few clock cycles behind the start of the power supply voltage drop, so it is called fast response; at time node 5, the power supply voltage gradually recovers, the input data is higher than the detection threshold, and the control signal 1 changes from valid to invalid; at time node 6, the feedback unit calculates the latest guard band voltage signal; at time node 7, the low-speed response subunit outputs control signal 2 to adjust the power supply voltage; finally, the power supply voltage gradually increases to ensure sufficient voltage margin.

[0099] In the embodiments of the present application, at least the following advantages are included:

[0100] 1. Can significantly reduce the power consumption of SOC chips;

[0101] 2. A voltage margin (i.e., guard band voltage) update method based on the transient voltage drop processing effect is proposed. The voltage margin can guide the power supply voltage regulation, eliminate static voltage drop, and ensure the lowest system operating voltage (i.e., the least power consumption) in various business scenarios.

[0102] The embodiment of the present application further provides a voltage drop processing device 100 , as shown in FIG4 , comprising: a detection unit 101 , a response unit 102 and a feedback unit 103 .

[0103] The detection unit 101 is configured to obtain voltage data of an input power supply and detect whether a transient voltage drop occurs in the power supply according to the voltage data.

[0104] The response unit 102 is configured to generate a first control signal when a transient voltage drop of the power supply is detected, so as to control the execution of a preset first response operation based on the first control signal until no transient voltage drop of the power supply is detected within a first preset time period.

[0105] The feedback unit 103 is configured to extract a characteristic value of the input power during the execution of the first response operation.

[0106] The feedback unit 103 is further configured to determine a guard band voltage based on the characteristic value after stopping the first response operation; the guard band voltage is a voltage margin required to prevent voltage drop.

[0107] The detection unit 101 is further configured to obtain a static voltage drop signal according to the guard band voltage and the voltage data.

[0108] The response unit 102 is further configured to generate a second control signal based on the static voltage drop signal to control the execution of a second response operation based on the second control signal until the voltage data meets the preset requirements; wherein the response speed of the second response operation is lower than the response speed of the first response operation.

[0109] In the embodiments of the present application, any of the aforementioned method embodiments are applicable to the device embodiments and will not be described in detail here.

[0110] The embodiment of the present application further provides a voltage drop processing system 200 , as shown in FIG10 , comprising: the voltage drop processing device 100 , a power supply voltage generating circuit 201 , a clock generating circuit 202 , a clock frequency reduction circuit 203 and a control unit 204 .

[0111] The control unit 204 is configured to output a first control command to control the voltage of the input power supply, and output a second control command to control the clock frequency.

[0112] The power supply voltage drop processing device 100 is configured to detect whether a transient voltage drop occurs in the power supply, and generate a control signal to control the power supply voltage and / or clock frequency to be reduced when a transient voltage drop is detected.

[0113] The power supply voltage generating circuit 201 is configured to output a corresponding power supply voltage according to the control signal and the first control command.

[0114] The clock frequency reduction circuit 203 is configured to output a corresponding clock frequency reduction signal according to the control signal.

[0115] The clock generating circuit 202 is configured to generate a corresponding clock signal according to the clock frequency reduction signal and the second control command.

[0116] In an embodiment of the present application, the control unit 204 can control the power supply voltage by sending VID1 (a first control command, which can include a first power supply voltage value) to the power supply voltage generating circuit; the power supply voltage drop processing device 100 is used to control the power supply voltage and clock frequency reduction, wherein the power supply voltage drop processing device 100 controls the power supply voltage by sending VID2 (i.e., a control signal, which can include a second power supply voltage value, and the first power supply voltage value and the second power supply voltage value can be the same or different) to the power supply voltage generating circuit 201, and controls the clock frequency reduction by sending a clock throttling enable signal and a clock throttling level signal (control signal) to the clock frequency reduction circuit 203; VID1 and VID2 are added to obtain VID, which is input to the power supply voltage generating circuit 201 and determines the power supply voltage value output by the power supply voltage generating circuit 201. It should be emphasized that VID2 can only achieve voltage adjustment within a narrow range.

[0117] In an embodiment of the present application, the voltage drop processing system 200 can, on the one hand, prevent abnormalities in the functional circuits 205 (such as processor cores, DDR (Double Data Rate) controllers and other digital systems) in the SOC chip, and on the other hand, reduce the voltage margin of the functional circuits, thereby reducing power consumption.

[0118] An embodiment of the present application also provides an electronic device 300, as shown in Figure 11, the electronic device 300 includes: one or more processors 301; a memory 302, on which one or more programs are stored, and when the one or more programs are executed by the one or more processors 301, the one or more processors 301 implement the voltage drop processing method; one or more input / output I / O interfaces 303, connected between the processor 301 and the memory 302, and configured to implement information interaction between the processor 301 and the memory 302.

[0119] Among them, the processor 301 is a device with data processing capabilities, including but not limited to a central processing unit (CPU); the memory 302 is a device with data storage capabilities, including but not limited to random access memory (RAM, more specifically SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), and flash memory (FLASH); the I / O interface (read-write interface) 303 is connected between the processor 301 and the memory 302, and can realize information interaction between the processor 301 and the memory 302, including but not limited to a data bus (Bus), etc.

[0120] In some embodiments, the processor 301 , the memory 302 , and the I / O interface 303 are connected to each other via a bus 304 , and further connected to other components of the computing device.

[0121] The embodiment of the present application further provides a computer-readable storage medium 400, as shown in FIG12 . The computer-readable storage medium 400 stores a computer program, and when the computer program is executed by a processor, the voltage drop processing method is implemented.

[0122] Those skilled in the art will appreciate that all or some of the functional modules / units disclosed above may be implemented as software, firmware, hardware, or a suitable combination thereof.

[0123] In hardware implementations, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component may have multiple functions, or one function or step may be performed by several physical components in cooperation.

[0124] Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit (CPU), a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or temporary medium). As is well known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, random access memory (RAM, more specifically SDRAM, DDR, etc.), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory (FLASH) or other disk storage; compact disc (CD-ROM), digital versatile disc (DVD) or other optical disc storage; magnetic cassettes, tapes, disk storage or other magnetic storage; any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, as is well known to those skilled in the art, communication media typically embodies computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0125] This application has disclosed example embodiments, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for limiting purposes. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly indicated, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the scope of the present application as set forth in the appended claims.

Claims

1. A method for handling voltage drops, wherein: The method comprises: Acquire voltage data of an input power supply, and detect whether a transient voltage drop occurs in the power supply according to the voltage data; When a transient voltage drop of the power supply is detected, a first control signal is generated to control a first preset device to perform a first response operation based on the first control signal until no more transient voltage drop of the power supply is detected within a first preset time period; During the execution of the first response operation, extracting a characteristic value of the input power; After stopping the first response operation, determining a guard band voltage based on the characteristic value; the guard band voltage is a voltage margin required to prevent voltage drop; Obtaining a static voltage drop signal according to the guard band voltage and the voltage data; A second control signal is generated based on the static voltage drop signal, so as to control a second preset device to perform a second response operation based on the second control signal until the voltage data meets a preset requirement.

2. The voltage drop processing method according to claim 1, wherein: The detecting whether a transient voltage drop occurs in the power supply according to the voltage data includes: Performing a first filtering on the voltage data to obtain first voltage data of a first preset bit in the voltage data; The first voltage data is compared with a preset detection threshold, and whether a transient voltage drop occurs in the power supply is determined according to the detection result.

3. The voltage drop processing method according to claim 1, wherein: The determining of the guard band voltage based on the characteristic value includes: The guard band voltage is calculated based on the currently extracted characteristic value and the historical characteristic value.

4. The voltage drop processing method according to claim 3, wherein: The calculating the guard band voltage according to the characteristic value extracted this time and the historical characteristic value includes: A weighted sum is performed on the eigenvalue extracted this time and at least one of the historical eigenvalues ​​to obtain the guard band voltage.

5. The voltage drop processing method according to claim 1, wherein: The obtaining of a static voltage drop signal according to the guard band voltage and the voltage data includes: A second filtering is performed on the guard band voltage and the voltage data to obtain second voltage data of a second preset bit position as the static voltage drop signal.

6. The voltage drop processing method according to claim 1, wherein: After detecting whether a transient voltage drop occurs in the power supply according to the voltage data, the method further includes: Setting a preset detection flag signal according to the detection result; wherein, if the detection result is that a transient voltage drop occurs in the power supply, the detection flag signal is set to be valid; if the detection result is that no transient voltage drop occurs in the power supply, the detection flag signal is set to be invalid; According to the change of the detection flag signal, the corresponding first control signal or the second control signal is generated to control the first response operation and / or the second response operation to make corresponding adjustments.

7. The voltage drop processing method according to claim 2, wherein: After the second response operation is completed, the method further includes: adjusting detection parameters and / or first response operation parameters according to the characteristic value; The detection parameter is used to detect whether a transient voltage drop occurs in the power supply; the detection parameter includes the detection threshold and / or a parameter affecting the detection threshold; The first response operation parameter is a parameter that affects the response speed of the first response operation.

8. The voltage drop processing method according to claim 7, wherein: The characteristic value includes: a minimum voltage value of the input power supply and / or the number of clock cycles required for the voltage of the input power supply to decrease to the minimum voltage value; The parameters affecting the detection threshold and the first response operation parameter include: a clock throttling level.

9. A voltage drop processing device, comprising: Detection unit, response unit and feedback unit; The detection unit is configured to obtain voltage data of an input power supply and detect whether a transient voltage drop occurs in the power supply according to the voltage data; The response unit is configured to generate a first control signal when a transient voltage drop of the power supply is detected, so as to control execution of a preset first response operation based on the first control signal until no transient voltage drop of the power supply is detected within a first preset time period; The feedback unit is configured to extract a characteristic value of the input power during the execution of the first response operation; The feedback unit is further configured to determine a guard band voltage based on the characteristic value after stopping the first response operation; the guard band voltage is a voltage margin required to prevent voltage drop; The detection unit is further configured to obtain a static voltage drop signal according to the guard band voltage and the voltage data; The response unit is further configured to generate a second control signal based on the static voltage drop signal, so as to control execution of a second response operation based on the second control signal until the voltage data meets a preset requirement.

10. A voltage drop processing system, comprising: The voltage drop processing device, power supply voltage generating circuit, clock generating circuit, clock frequency reduction circuit and control unit according to claim 9; The control unit is configured to output a first control command to control the voltage of the input power supply, and output a second control command to control the clock frequency; The power supply voltage drop processing device is configured to detect whether a transient voltage drop occurs in the power supply, and generate a control signal to control the power supply voltage and / or clock frequency reduction when a transient voltage drop is detected; The power supply voltage generating circuit is configured to output a corresponding power supply voltage according to the control signal and the first control command; The clock frequency reduction circuit is configured to output a corresponding clock frequency reduction signal according to the control signal; The clock generating circuit is configured to generate a corresponding clock signal according to the clock frequency reduction signal and the second control command.

11. An electronic device, wherein: The electronic device comprises: one or more processors; A memory having one or more programs stored thereon, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the voltage drop processing method according to any one of claims 1 to 8; One or more input / output (I / O) interfaces are connected between the processor and the memory and configured to implement information interaction between the processor and the memory. 12 . A computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the voltage drop processing method according to claim 1 .

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