Display driving chip, voltage regulation method, and related device

Abstract

A display driving chip, a voltage regulation method, and a related device. The display driving chip (002, 10, 11, 12) comprises a controller (100, 110, 120) and a voltage regulator (101, 111, 121), wherein the controller (100, 110, 120) is coupled to a first power supply chip (20, 21, 22), and the voltage regulator (101, 111, 121) is coupled to a second power supply chip (30, 31, 32); the first power supply chip (20, 21, 22) is configured to provide a first voltage for the controller (100, 110, 120); the second power supply chip (30, 31, 32) is configured to provide a second voltage for the voltage regulator (101, 111, 121); the voltage regulator (101, 111, 121) is configured to provide a third voltage for the controller (100, 110, 120) on the basis of the second voltage; the controller (100, 110, 120) is configured to control, by means of a control signal, the voltage regulator (101, 111, 121) to adjust a voltage value of the third voltage; when the voltage value of the third voltage is less than a voltage value of the first voltage, an operating current of the controller (100, 110, 120) is provided by the first voltage; and when the voltage value of the third voltage is greater than or equal to the voltage value of the first voltage, the operating current of the controller (100, 110, 120) is provided by both the first voltage and the third voltage.

Description

A display driver chip, voltage regulation method and related equipment

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office of China on February 23, 2024, with application number 202410204996.1 and application name “A display driver chip, voltage regulation method and related equipment”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of chip technology, and in particular to a display driver chip, a voltage regulation method, and related equipment. Background Art

[0003] With the continuous development of science and technology and the continuous improvement of people's living standards, various electronic devices such as personal computers, mobile phones, and tablets have become ubiquitous in people's daily work and entertainment, becoming an indispensable part of their lives and work. When people interact with various electronic devices, they mainly obtain visual information through their display systems.

[0004] Based on the display system's operating principle, the display system's operating area can be divided into a blanking zone and an active zone. When the display system switches from the blanking zone to the active zone, the load state undergoes a significant change, which in turn causes a significant power drop. If the power drop is large and the power supply voltage falls below a certain threshold, it can cause errors in the display system's digital and analog operations, resulting in display anomalies and even causing the device to crash and restart, seriously affecting the user experience.

[0005] Therefore, how to provide a display driver chip to ensure that the display system can operate stably when the load changes greatly is an urgent problem to be solved. Summary of the Invention

[0006] The embodiments of the present application provide a display driver chip, a voltage regulation method, and related devices, which can ensure that a display system can operate stably when the load changes greatly.

[0007] The present application is introduced below from different aspects. It should be understood that the implementation methods and beneficial effects of the following different aspects can be referenced to each other.

[0008] In a first aspect, the present application provides a display driver chip, the DDIC including a controller and a voltage regulator; the controller is coupled to a first power chip, and the voltage regulator is coupled to a second power chip; wherein the first power chip is used to provide a first voltage to the controller; the second power chip is used to provide a second voltage to the voltage regulator; the controller is used to send a control signal to the voltage regulator; the voltage regulator provides a third voltage to the controller based on the second voltage, and receives and adjusts the voltage value of the third voltage in response to the control signal; when the voltage value of the third voltage is less than the voltage value of the first voltage, the operating current of the controller is provided by the first voltage; when the voltage value of the third voltage is greater than or equal to the voltage value of the first voltage, the operating current of the controller is provided by both the first voltage and the third voltage.

[0009] In an embodiment of the present application, the display driver chip can control the voltage value of the output voltage of the voltage regulator through a controller to control the working mode of the main power supply (i.e., the first power supply chip) and the backup power supply (i.e., the voltage regulator). When the voltage value of the backup power supply output voltage is greater than or equal to the voltage value of the main power supply output voltage, the backup power supply can assist the main power supply in powering the DDIC controller. The main power supply and the backup power supply jointly power the DDIC controller. The working current of the controller is provided by the main power supply and the backup power supply. It is suitable for protecting the main power supply when the load state of the display system changes greatly, while ensuring that the display system can work normally and stably. When the voltage value of the backup power supply output voltage is less than the voltage value of the main power supply output voltage, the main power supply alone powers the DDIC controller. The working current of the controller is provided by the main power supply, and the controller no longer draws current from the backup power supply. It is suitable for reducing power consumption when the load state of the display system is stable.

[0010] In a possible implementation, the DDIC further includes a frame buffer coupled to the controller, wherein the frame buffer stores a target frame;

[0011] The controller is specifically configured to send a first control signal to the voltage stabilizer after receiving the vertical synchronization signal of the target frame;

[0012] The voltage stabilizer is further configured to receive and respond to the first control signal to increase the third voltage from an initial voltage stabilization value to a transient voltage stabilization value; the transient voltage stabilization value is greater than or equal to a drop voltage value of the first voltage, and the drop voltage value is a voltage value after the initial voltage value of the first voltage drops.

[0013] In an embodiment of the present application, the controller receives the vertical synchronization signal of the target frame, which means that the panel will scan the data of the target frame for display, indicating that the display system will switch from the blanking area to the effective area. During the switching process, the load of the display system often changes greatly, and the power provided by the first power chip will drop. In order to protect the first power chip and ensure that the display system can work normally and stably, the output voltage of the voltage regulator can be raised in advance to avoid the power supply of the first power chip dropping. The voltage value is avoided. If it is not raised in time, it will cause further drops.

[0014] In a possible implementation, the controller is further configured to send a second control signal to the voltage regulator after receiving the horizontal synchronization signal of the target frame;

[0015] The voltage stabilizer is further configured to receive and respond to the second control signal to adjust the third voltage from a regulated transient value to an initial regulated value; the initial regulated value is smaller than the initial voltage value of the first voltage.

[0016] In an embodiment of the present application, the controller receives the horizontal synchronization signal of the target frame, indicating that the display system has switched from the blanking area to the active area. After the switch is completed, the load of the display system gradually stabilizes, and the first voltage provided by the first power supply chip gradually recovers from the voltage value after the voltage drop to the normal value (i.e., the initial voltage value). Therefore, after receiving the horizontal synchronization signal of the target frame, the controller can control the voltage regulator to lower the raised voltage value through the control signal. The controller can operate under the sole power supply of the first power supply chip. The operating current of the controller is entirely provided by the first voltage. The controller no longer draws current from the voltage regulator, which can save power consumption.

[0017] In a possible implementation, the controller is specifically configured to:

[0018] After receiving the horizontal synchronization signal and a first preset duration has passed, the second control signal is sent to the voltage stabilizer; the first preset duration is greater than or equal to the duration of the back porch HBP of the horizontal synchronization signal.

[0019] In an embodiment of the present application, after receiving the horizontal synchronization signal and at least the HBP time has passed, the controller controls the voltage regulator to reduce the voltage value of the output voltage, which can improve the accuracy of voltage regulation, effectively protect the first power supply chip, and ensure stable operation of the display system.

[0020] In a possible implementation, the horizontal synchronization signal is the i-th horizontal synchronization signal following the vertical synchronization signal, where i is a positive integer less than or equal to 10.

[0021] In an embodiment of the present application, after the display system enters the valid area for several lines, the display system load tends to be stable, and the power supply of the first power chip gradually recovers and stabilizes after the drop. The controller reduces the voltage value of the output voltage of the voltage regulator within 10 lines, and the first power chip alone supplies power to the controller, which can protect the first power supply as much as possible to prevent it from further dropping, and the controller no longer draws current from the voltage regulator, reducing the additional power consumption caused by raising the voltage regulator power supply.

[0022] In a possible implementation, a difference between the initial voltage stabilization value and the transient voltage stabilization value is less than or equal to a difference between the drop voltage value and the initial voltage value.

[0023] In the embodiment of the present application, since the efficiency of the voltage regulator will affect the power supply situation, in order to reduce other impacts brought by the power supply of the voltage regulator, the output voltage rise value of the voltage regulator can be limited to be less than or equal to the voltage value of the output voltage drop of the first power supply chip, thereby ensuring that after the output voltage of the voltage regulator is raised, the controller is still mainly powered by the first power supply chip, and the voltage regulator assists the first power supply chip to power the controller, ensuring power supply efficiency and avoiding chip overheating.

[0024] In a possible implementation, the controller is specifically configured to:

[0025] After receiving the vertical synchronization signal and before a second preset duration is reached, the first control signal is sent to the regulator; the second preset duration is less than or equal to the duration of the back porch VBP of the vertical synchronization signal.

[0026] In an embodiment of the present application, the controller should control the voltage regulator to increase the output voltage value after receiving the vertical synchronization signal and before the preset time is reached, that is, before the voltage provided by the first power supply chip drops significantly, the voltage value output by the voltage regulator should be raised in advance, so as to provide timely and effective protection for the first power supply chip and ensure stable operation of the display system.

[0027] In a possible implementation, the voltage regulator includes a low dropout linear regulator (LDO), and a voltage value of the third voltage is greater than or equal to a minimum operating voltage of the controller.

[0028] In an embodiment of the present application, the display driver chip provides voltage to the controller through an LDO regulator, which can reduce the chip area occupied, and setting the voltage value of the LDO output voltage to be greater than or equal to the minimum operating voltage of the controller can reduce the amplitude value during voltage adjustment, so that the output voltage value can reach the specified value faster, thereby improving the voltage adjustment efficiency.

[0029] In a second aspect, the present application provides a voltage regulation method that can be applied to a controller of a display driver chip (DDIC), wherein the DDIC further includes a voltage regulator; the controller is coupled to a first power supply chip, and the voltage regulator is coupled to a second power supply chip; the first power supply chip is used to provide a first voltage to the controller; the second power supply chip is used to provide a second voltage to the voltage regulator; the voltage regulator is used to provide a third voltage to the controller based on the second voltage; the method includes:

[0030] A control signal is sent to the voltage regulator; the control signal is used to control the voltage value of the third voltage; when the voltage value of the third voltage is less than the voltage value of the first voltage, the operating current of the controller is provided by the first voltage; when the voltage value of the third voltage is greater than or equal to the voltage value of the first voltage, the operating current of the controller is provided by both the first voltage and the third voltage.

[0031] In a possible implementation, the DDIC further includes a frame buffer coupled to the controller, wherein the frame buffer stores a target frame; and the sending of the control signal to the voltage regulator includes:

[0032] After receiving the vertical synchronization signal of the target frame, a first control signal is sent to the voltage stabilizer; the first control signal is used to control the voltage stabilizer to increase the third voltage from the initial voltage regulation value to the transient voltage regulation value, the transient voltage regulation value is greater than or equal to the drop voltage value of the first voltage, and the drop voltage value is the voltage value of the initial voltage value of the first voltage after the drop.

[0033] In a possible implementation, the method further includes:

[0034] After receiving the horizontal synchronization signal of the target frame, a second control signal is sent to the voltage stabilizer; the second control signal is used to control the voltage stabilizer to lower the third voltage from the regulated transient value to the regulated initial value, and the regulated initial value is less than the initial voltage value of the first voltage.

[0035] In a possible implementation, the sending a second control signal to the voltage regulator includes:

[0036] After receiving the horizontal synchronization signal and a first preset duration has passed, the second control signal is sent to the voltage stabilizer; the first preset duration is greater than or equal to the duration of the back porch HBP of the horizontal synchronization signal.

[0037] In a possible implementation, the horizontal synchronization signal is the i-th horizontal synchronization signal following the vertical synchronization signal, where i is a positive integer less than or equal to 10.

[0038] In a possible implementation, a difference between the initial voltage stabilization value and the transient voltage stabilization value is less than or equal to a difference between the drop voltage value and the initial voltage value.

[0039] In a possible implementation, sending a first control signal to the voltage regulator includes:

[0040] After receiving the vertical synchronization signal and before a second preset duration is reached, the first control signal is sent to the regulator; the second preset duration is less than or equal to the duration of the back porch VBP of the vertical synchronization signal.

[0041] In a possible implementation, the voltage regulator includes a low dropout linear regulator (LDO), and a voltage value of the third voltage is greater than or equal to a minimum operating voltage of the controller.

[0042] In a third aspect, the present application provides a display driver chip DDIC, the DDIC comprising a controller and a frame buffer coupled to each other, the controller being coupled to a first power chip, the frame buffer storing a target frame; wherein,

[0043] The first power chip is configured to provide a first voltage to the controller and adjust a voltage value of the first voltage based on an instruction signal sent by the controller;

[0044] The controller is configured to send a first instruction signal to the first power chip after receiving the vertical synchronization signal of the target frame; the first instruction signal is configured to instruct the first power chip to increase the first voltage from a first voltage value to a second voltage value;

[0045] The controller is also used to send a second indication signal to the first power supply chip after receiving the horizontal synchronization signal of the target frame; the second indication signal is used to instruct the first power supply chip to lower the second voltage from the second voltage value to the third voltage value, and the first voltage value, the second voltage value and the third voltage value are all greater than or equal to the minimum operating voltage of the controller.

[0046] In a fourth aspect, the present application provides a voltage regulation method that can be applied to a controller of a display driver chip (DDIC), wherein the DDIC further includes a frame buffer coupled to the controller, wherein the frame buffer stores a target frame, and the controller is coupled to a first power chip, wherein the first power chip is configured to provide a first voltage to the controller. The method includes:

[0047] After receiving the vertical synchronization signal of the target frame, sending a first instruction signal to the first power chip; the first instruction signal is used to instruct the first power chip to increase the first voltage from a first voltage value to a second voltage value;

[0048] After receiving the horizontal synchronization signal of the target frame, a second indication signal is sent to the first power supply chip; the second indication signal is used to instruct the first power supply chip to lower the second voltage from the second voltage value to the third voltage value, and the first voltage value, the second voltage value and the third voltage value are all greater than or equal to the minimum operating voltage of the controller.

[0049] In a fifth aspect, the present application provides a semiconductor chip, which includes a display driver chip provided by any possible implementation of the first aspect, the third aspect, or any one of the aspects.

[0050] In a sixth aspect, the present application provides a computer-readable storage medium having program instructions stored thereon, which, when executed, enables the method described in any possible implementation of the second aspect, the fourth aspect, or any of the aspects above to be executed.

[0051] In a seventh aspect, the present application provides a program product comprising program instructions, which, when executed, enables the method described in any possible implementation of the second aspect, the fourth aspect, or any of the aspects above to be executed.

[0052] In an eighth aspect, the present application provides an electronic device, comprising a display driver chip provided by any one of the possible implementations of the first aspect, the third aspect, or any one of the aspects above; the electronic device also includes a memory for storing program instructions and data necessary for the operation of the display driver chip; the electronic device may further include a communication interface for the electronic device to communicate with other devices or a communication network.

[0053] In a ninth aspect, the present application provides an electronic device having the function of implementing any one of the voltage regulation methods described in the second aspect, the fourth aspect, or any of these aspects. This function can be implemented via hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the aforementioned functions.

[0054] In a tenth aspect, the present application provides a chip system, which includes a display driver chip provided by any of the possible implementations of the first aspect, the third aspect, or any of these aspects. In one possible design, the chip system also includes a memory, which is used to store program instructions and data necessary or related to the display driver chip. The chip system can be composed of a chip, or it can include a chip and other discrete components.

[0055] The technical effects achieved in the above-mentioned aspects can be referred to each other or to the beneficial effects in the method embodiments shown below, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the background technology, the drawings required for use in the embodiments of the present application or the background technology will be described below.

[0057] FIG1 is a timing diagram of a display principle provided by an embodiment of the present application.

[0058] FIG2A is a schematic structural diagram of an electronic device provided in an embodiment of the present application.

[0059] FIG2B is a schematic structural diagram of a display driver chip provided in an embodiment of the present application.

[0060] FIG2C is a schematic diagram of a controller controlling a voltage regulator provided by an embodiment of the present application.

[0061] FIG2D is a schematic diagram of another controller controlling a voltage regulator provided by an embodiment of the present application.

[0062] FIG2E is a timing diagram of a controller sending a control signal provided in an embodiment of the present application.

[0063] FIG2F is a timing diagram of another controller sending a control signal provided in an embodiment of the present application.

[0064] FIG3 is a schematic structural diagram of another display driver chip provided in an embodiment of the present application.

[0065] FIG4A is a timing diagram of a voltage regulation solution provided in an embodiment of the present application.

[0066] FIG4B is a timing diagram of a voltage regulation solution.

[0067] FIG5 is a flow chart of a voltage regulation method provided in an embodiment of the present application.

[0068] FIG6 is a schematic structural diagram of another display driver chip provided in an embodiment of the present application.

[0069] FIG7 is a flow chart of another voltage regulation method provided in an embodiment of the present application.

[0070] FIG8 is a timing diagram of another voltage regulation solution provided in an embodiment of the present application. DETAILED DESCRIPTION

[0071] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application.

[0072] In the description of the present application, words such as "first" and "second" are only used to distinguish different objects, and do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit them to be different. For example, the first control signal and the second control signal, the first indication signal and the second indication signal, etc. are only used to distinguish different signals, and do not limit their order. In addition, the terms "including" and "having" and any variations thereof (such as "for") are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units that are not listed, or optionally also includes other steps or units inherent to these processes, methods, products or devices.

[0073] In the description of this application, unless otherwise specified, " / " means "or", for example, A / B can mean A or B. "And / or" in this article is merely a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, "at least one (item)", "the following one (item) or more (items)" or similar expressions refer to any combination of these items, including any combination of single or plural items (items). For example, at least one item (item) of a, b, or c can mean: a, b, c; a and b; a and c; b and c; or a, b, and c. Among them, a, b, and c can be single or multiple.

[0074] In the description of this application, words such as "exemplary," "exemplarily," or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary," "for example," or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary," "for example," or "for example" is intended to present the relevant concepts in a concrete manner.

[0075] It can be understood that in the description of this application, "when", "if" and "if" all mean that the device will perform corresponding processing under certain objective circumstances, and do not limit the time. It does not require that the device must perform a judgment action when it is implemented, nor does it mean that there are other limitations.

[0076] The term "simultaneously" in this application may be understood as at the same time point, within a period of time, or within the same cycle, and may be understood in conjunction with the context.

[0077] Elements used in the singular herein are intended to mean "one or more" rather than "one and only one" unless specifically stated otherwise.

[0078] It is understood that in each embodiment of the present application, "A and B correspond" means that B is associated with A, and B can be determined based on A. However, it should also be understood that determining B based on A does not mean determining B based solely on A, and B can also be determined based on A and / or other information.

[0079] It is understood that in the embodiments of the present application, "used to indicate" and "indicate" can include direct indications and indirect indications, and can also include explicit indications and implicit indications. When describing "a certain indication information is used to indicate A" or "indication information of A", it can include the indication information directly indicating A or indirectly indicating A, and does not necessarily mean that the indication information carries A. The information indicated by a certain information is called the information to be indicated. During the specific implementation, there are many ways to indicate the information to be indicated. For example, but not limited to, the information to be indicated can be directly indicated, such as the information to be indicated itself or an index of the information to be indicated. The information to be indicated can also be indirectly indicated by indicating other information, where the other information is associated with the information to be indicated. It is also possible to indicate only a portion of the information to be indicated, while the other portions of the information to be indicated are known or agreed upon in advance. For example, it is also possible to indicate specific information by using a pre-agreed (e.g., protocol-specified) order of arrangement of various information, thereby reducing indication overhead to a certain extent. At the same time, it is also possible to identify common parts of various information and indicate them uniformly to reduce the indication overhead caused by indicating the same information separately. In addition, the specific indication method can also be various existing indication methods, such as, but not limited to, the indication methods described above and various combinations thereof. The specific details of various indication methods can refer to the existing technology and will not be described in detail herein. As can be seen from the above, for example, when it is necessary to indicate multiple information of the same type, different indication methods may be used for different information. In the specific implementation process, the required indication method can be selected according to specific needs. The embodiment of the present application does not limit the selected indication method. In this way, the indication method involved in the embodiment of the present application should be understood to cover various methods that can enable the party to be indicated to know the information to be indicated. The information to be indicated can be sent together as a whole, or it can be divided into multiple sub-information and sent separately, and the sending period and / or sending time of these sub-information can be the same or different. The specific sending method is not limited in this application.

[0080] In order to better understand the technical solutions of the embodiments of the present application, several terms or nouns related to the present application are briefly introduced below to facilitate understanding by those skilled in the art.

[0081] 1. Display System

[0082] A display system generally includes a system on chip (SoC), a display driver IC (DDIC) and a panel. SoC can also be other processor chips, such as a central processing unit (CPU), a graphics processing unit (GPU) or an application processor (AP). When the display system is working, the SOC is used to draw and synthesize multiple layers, and then the synthesized data is transmitted to the DDIC through a hardware interface according to a certain protocol. The DDIC then displays the synthesized data in the memory (such as a buffer) on the panel. For example, the DDIC can send drive signals and data to the display panel in the form of electrical signals, thereby controlling the brightness and color of the screen, so that image information such as letters and pictures can be displayed on the screen. In the present application, when the display system switches from the blanking area to the effective area, the controller (processing logic part) of the DDIC can increase the voltage of the backup power supply to cause a large change in the load state. When the voltage of the main power supply drops, the backup power supply can assist the main power supply to power the controller in the DDIC, that is, the main power supply and the backup power supply can jointly power the controller of the DDIC, avoiding the problem that the main power supply alone will cause the display system to malfunction after the power supply drops to a certain threshold, thereby achieving the purpose of protecting the main power supply and ensuring that the display system can work normally and stably.

[0083] 2. Voltage stabilizer

[0084] A voltage regulator can be used to stabilize the input voltage to a set output voltage. Common voltage regulators include DC-to-DC converters (DCDC) and low dropout regulators (LDO). DCDC can also be called a switching regulator. Generally, DCDC is more efficient than LDO, and LDO occupies a smaller chip area than DCDC. DCDC can boost the input voltage to output a higher output voltage, or it can buck the input voltage to output a lower output voltage, that is, the output voltage of DCDC can be greater than or less than the input voltage; LDO can only buck the input voltage, that is, the output voltage of LDO must be less than the input voltage. In the present application, when the display system switches from the blanking area to the effective area, the controller in the DDIC can control the voltage regulator to raise the output voltage value, that is, to raise the voltage of the backup power supply, so that the load state changes greatly. When the voltage of the main power supply drops, the backup power supply can assist the main power supply to supply power to the DDIC controller, that is, the main power supply and the backup power supply can jointly supply power to the DDIC controller, avoiding the problem that the main power supply alone supplies power and causes the display system to malfunction after the power supply drops to a certain threshold, thereby achieving the purpose of protecting the main power supply and ensuring that the display system can work normally and stably.

[0085] 3. Display Principle

[0086] For example, a cathode ray tube (CRT) display displays images frame by frame. The CRT's electron gun scans the image one row at a time, from top to bottom. After the scan is complete, the display displays the image. The electron gun then returns to its initial position to continue scanning, displaying the next frame.

[0087] To synchronize the display's display process with the display system's controller, the display (or other hardware) uses a hardware clock to generate a series of timing signals. When the electron gun switches to the next line, preparing to scan, the display generates a horizontal synchronization signal (Hsync). After a frame is drawn, the electron gun returns to its original position, and before drawing the next frame, the display sends a vertical synchronization signal (Vsync). Displays typically refresh at a fixed frequency, which is the frequency generated by the Vsync signal. Common refresh rates include 60Hz, 90Hz, and 120Hz.

[0088] 4. Blanking area and effective area

[0089] According to the display principle, the display starts scanning from the upper left corner of the screen, obtaining and displaying the data of each pixel line by line. When the display reaches the rightmost side of a line, it jumps to the leftmost side of the next line to start displaying the next line. When all the lines of this frame are displayed, it jumps to the upper left corner to start the next frame. The display scans along a "Z"-shaped route, using Hsync (horizontal synchronization signal) and Vsync (vertical synchronization signal) signals to control the jump of the scanning route. As shown in Figure 1, Hsync means "it's time to jump back to the leftmost side" and start displaying the next line of the current frame. Vsync means "it's time to jump to the top side". The current frame display is completed and the next frame begins. There are also some intervals between two frames (between two Vsyncs), including:

[0090] VSW (vertical synchronizing width) represents the width of the vertical synchronization signal, that is, the time interval between the falling edge and the rising edge of a Vsync signal;

[0091] VBP (vertical synchronizing back proch) indicates the back porch of the vertical synchronization signal (or frame synchronization signal);

[0092] VFP (vertical synchronizing frontproch) indicates the front shoulder of the vertical synchronization signal (or frame synchronization signal).

[0093] VPROCH, also known as the blanking period, refers to the time periods of VSW, VBP, and VFP. During these periods, the display system panel does not update pixel colors. The remaining time periods between frames are called the active period (such as "1" and "2" in Figure 1), during which the panel updates pixel colors.

[0094] First, the technical problems that this application specifically aims to solve are analyzed and proposed. Based on the above-mentioned display principle, when the display system switches from the blanking area to the active area, the load state will undergo a significant switch, which will cause a significant power drop in the power supply of the display driver chip DDIC. If the power drop is large, when the power supply voltage is lower than a certain threshold, for example, lower than the minimum operating voltage of the display driver chip, it will cause errors in the digital and analog operations of the display system, resulting in abnormal display of the display system, and may even cause the device to freeze and restart, seriously affecting the user experience.

[0095] To this end, the present application proposes a display driver chip, a voltage regulation method, and related equipment, so that the controller in the DDIC can control the voltage regulator to adjust (raise / lower) the output voltage value to control the working mode of the main power supply (i.e., the first power supply chip) and the backup power supply (i.e., the voltage regulator). Among them, raising the voltage value of the backup power supply output voltage allows the backup power supply to assist the main power supply in powering the DDIC controller, that is, the main power supply and the backup power supply jointly power the DDIC controller, and the operating current of the controller is provided by the main power supply and the backup power supply. It is suitable for when the load state of the display system changes greatly, and can avoid the problem that the main power supply alone supplies power and causes the display system to malfunction after the power drops, thereby achieving the purpose of protecting the main power supply and ensuring that the display system can operate normally and stably. Lowering the voltage value of the backup power supply output voltage after the raise can enable the main power supply to power the DDIC controller alone, and the operating current of the controller is provided by the main power supply, that is, the controller no longer draws current from the backup power supply. It is suitable for when the load state of the display system is stable, and can reduce power consumption.

[0096] Alternatively, the controller in the DDIC can directly control / instruct the main power supply to adjust (raise / lower) the output voltage. Raising the output voltage of the main power supply is suitable for compensating for power drops when the load state of the display system changes significantly, meeting the voltage requirements of the controller for normal operation and ensuring the normal operation of the display system. Lowering the output voltage of the main power supply after raising it is suitable for when the load state tends to be stable, the output voltage of the main power supply no longer drops and tends to be stable. At this time, the voltage value will be higher than the normal level due to the increase, and the power consumption will also be higher. Reducing the voltage value in a timely manner can achieve the purpose of saving power.

[0097] For ease of understanding, the technical solution provided in this application will be described below with reference to more drawings.

[0098] In this application, unless otherwise specified, the same or similar parts between the various embodiments or implementation methods can refer to each other. In the various embodiments in this application, and the various implementation methods / implementation methods / implementation methods in each embodiment, if there is no special explanation and logical conflict, the terms and / or descriptions between different embodiments and the various implementation methods / implementation methods / implementation methods in each embodiment are consistent and can be referenced to each other. The technical features in different embodiments and the various implementation methods / implementation methods / implementation methods in each embodiment can be combined to form new embodiments, implementation methods, implementation methods, or implementation methods according to their inherent logical relationships. The implementation methods of this application described below do not constitute a limitation on the scope of protection of this application.

[0099] The following is an illustrative description of the structure of an electronic device applicable to the embodiment of the present application. Please refer to Figure 2A. Figure 2A is a structural diagram of an electronic device provided by the embodiment of the present application. As shown in Figure 2A, the electronic device

[0000] may include an application processor

[0001] , a display driver chip

[0002] and a panel

[0003] . In addition, the electronic device

[0000] may also include a power management unit for supplying power to the above-mentioned AP

[0001] , display driver chip

[0002] and panel

[0003] and other devices / units. The power management unit may include multiple power supply modules or multiple power supply chips. Among them,

[0100] The application processor

[0001] may include one or more processing units. Different processing units may be independent devices or integrated into one or more processors. The AP

[0001] in the electronic device

[0000] may also include a processor such as an SoC, a CPU, or a GPU, or may also be a neural network processing unit (NPU). In the process of processing image information in the display system, the AP

[0001] is mainly responsible for drawing and synthesizing multiple layers, and then transmitting the synthesized data to the DDIC

[0002] through a hardware interface according to a certain protocol. For example, the hardware interface may be a digital video port (DVP), a low voltage differential signaling (LVDS) interface, a mobile industry processor interface (MIPI), or an embedded display port (eDP). The protocol may be the MIPI protocol or other protocols.

[0101] The display driver chip

[0002] can obtain processed data from the AP

[0001] and temporarily save the data in a frame buffer (such as GRAM). For example, the DDIC

[0002] can obtain the synthesized data from the AP

[0001] through the MIPI interface and the display serial interface (DSI) bus, and then save the data in the GRAM, waiting for the panel

[0003] to scan the data and display it. In addition, in an embodiment of the present application, the display driver chip

[0002] can also be used to control / instruct the power management unit to adjust the voltage value of the power supply voltage through a control signal or an indication signal to adapt to the display driver chip's demand for the power supply voltage under different load states. For example, the voltage value can be raised to compensate for the power drop that occurs when the load state changes significantly, ensuring that the display system can work normally, and when the load state is stable, the voltage value after the increase can be timely reduced to reduce the power consumption caused by the display system when it is working.

[0102] A panel

[0003] , or display, can display content by continuously scanning a frame buffer, so that image information such as letters and pictures can appear on the screen.

[0103] As for the structure of the display driver chip in this application, please refer to Figure 2B, which is a schematic diagram of the structure of a display driver chip provided in an embodiment of this application. The display driver chip

[0010] may include a controller

[0100] and a voltage regulator

[0101] . The controller

[0100] may be coupled to a first power chip

[0020] , and the voltage regulator

[0101] may be coupled to a second power chip

[0030] .

[0104] The first power chip

[0020] can be used to provide a first voltage to the controller

[0100] as a main power supply;

[0105] The second power supply chip

[0030] can be used to provide a second voltage for the voltage regulator

[0101] ;

[0106] The controller

[0100] may be configured to send a control signal to the voltage regulator

[0101] ;

[0107] The voltage regulator

[0101] may be configured to provide a third voltage to the controller

[0100] based on the second voltage as a backup power supply; and to receive and adjust a voltage value of the third voltage in response to the control signal;

[0108] When the voltage value of the third voltage is less than the voltage value of the first voltage, the controller

[0100] operates under the power supply of the first voltage alone; that is, the operating current of the controller

[0100] is entirely provided by the first voltage;

[0109] When the voltage value of the third voltage is greater than or equal to the voltage value of the first voltage, the controller

[0100] operates under the common power supply of the first voltage and the third voltage, that is, the operating current of the controller

[0100] is provided by the first voltage and the third voltage.

[0110] In one possible implementation, as shown in FIG2C , the display driver chip

[0010] further includes a frame buffer

[0102] coupled to the controller

[0100] , or the electronic device using the display driver chip further includes a frame buffer coupled to the controller

[0100] , wherein a target frame is stored in the frame buffer. It is understandable that the target frame can be any frame stored in the frame buffer; after receiving a vertical synchronization signal for the target frame, the controller

[0100] can send a first control signal to the voltage regulator

[0101] , wherein the first control signal is used to control the voltage regulator

[0101] to increase the third voltage from the initial voltage stabilization value to the transient voltage stabilization value. Accordingly, the voltage regulator

[0101] is further used to receive and respond to the first control signal to increase the third voltage from the initial voltage stabilization value to the transient voltage stabilization value. The controller

[0100] receives the vertical synchronization signal of the target frame, which means that the panel will scan the data of the target frame for display, indicating that the display system will switch from the blanking area to the effective area. During the switching process, the load of the display system often changes greatly, and the power provided by the first power chip

[0020] will drop. In order to protect the first power chip

[0020] and ensure that the display system can operate normally and stably, the output voltage of the voltage regulator

[0101] can be raised in advance. When the voltage value provided by the voltage regulator

[0101] to the controller is greater than or equal to the voltage value provided by the first power chip

[0020] to the controller

[0100] , the controller

[0100] can operate under the common power supply of the first power chip

[0020] and the voltage regulator

[0101] . That is, the operating current of the controller

[0100] is provided by the first voltage and the third voltage.

[0111] Optionally, when the display system switches from the blanking area to the active area, the first voltage provided by the first power chip

[0020] may drop to a certain extent. At this time, if the voltage value output by the voltage regulator

[0101] is greater than or equal to the voltage value of the first power chip

[0020] after the voltage drop, the voltage regulator

[0101] and the first power chip

[0020] can jointly power the controller

[0100] . In other words, the voltage transient value is greater than or equal to the voltage drop value of the first voltage, and the voltage drop value is the voltage value of the first voltage after the initial voltage value drops. The controller

[0100] can operate under the combined power supply of the first voltage and the third voltage, for example, to process the target frame and display it on the panel.

[0112] Optionally, as shown in FIG2D , after controlling the voltage stabilizer

[0101] to raise the voltage value of the output voltage, the controller

[0100] may also send a second control signal to the voltage stabilizer

[0101] after receiving the horizontal synchronization signal of the target frame, wherein the second control signal is used to control the voltage stabilizer

[0101] to lower the third voltage from the voltage stabilization transient value to the voltage stabilization initial value. Accordingly, the voltage stabilizer

[0101] is also used to receive and respond to the second control signal to lower the third voltage from the voltage stabilization transient value to the voltage stabilization initial value. Optionally, the second control signal may also control the voltage stabilizer to lower the third voltage from the voltage stabilization transient value to another value, wherein the other value may be greater than the voltage stabilization initial value or less than the voltage stabilization initial value, as long as the other value is less than the initial voltage value of the first voltage. The controller

[0100] receives the horizontal synchronization signal of the target frame, indicating that the display system has switched from the blanking area to the effective area. After the switching is completed, the load of the display system gradually stabilizes, and the first voltage provided by the first power supply chip also gradually recovers from the voltage value after the drop to the normal value (i.e., the initial voltage value). Therefore, after receiving the horizontal synchronization signal of the target frame, the controller

[0100] can control the voltage regulator

[0101] to lower the raised voltage value through the control signal. When the output voltage of the voltage regulator

[0101] is less than the voltage value provided by the first power supply chip to the controller

[0100] , the controller

[0100] can operate under the sole power supply of the first power supply chip, that is, the operating current of the controller

[0100] is entirely provided by the first voltage, and the controller

[0100] no longer draws current from the voltage regulator

[0101] , which can save power consumption.

[0113] It should be noted that the operating current of the controller

[0100] described in this application is entirely provided by the first voltage, which may include a situation where a very small amount of the operating current of the controller

[0100] is provided by the third voltage. For example, the first voltage provides 99% of the operating current required for the operation of the controller, and the third voltage provides 1% of the operating current required for the operation of the controller, and the proportion of the current provided by the third voltage to the total current is less than a certain threshold (such as 3% or 5%). It can be understood that the operating current of the controller is entirely provided by the first voltage, and no specific limitation is made here.

[0114] In one possible implementation, as shown in FIG2E , after receiving the horizontal synchronization signal of the target frame (e.g., at time t1), the controller

[0100] may wait for a certain period of time (i.e., a first preset period of time, such as the time period from t1 to t2) before sending a second control signal to the voltage regulator

[0101] (e.g., at time t3, where t3 may be greater than or equal to t2). The first preset period of time is greater than or equal to the duration of the horizontal synchronizing back proch (HBP) of the horizontal synchronization signal. This is because after the horizontal synchronization signal arrives, it may take the HBP period of time before the transmission of valid data for the row corresponding to the signal begins. At this time, the load state of the display system is more stable. Therefore, after receiving the horizontal synchronization signal and at least the HBP period of time has passed, the controller controls the voltage regulator to reduce the output voltage value, thereby improving the accuracy of voltage regulation, effectively protecting the first power supply chip, and ensuring stable operation of the display system. The specific value of the HBP duration can be set according to the actual application scenario. Usually, calculations related to rows are mostly in clock (CLK) units. For example, the specific value of the HBP duration can be 2CLK, which is not specifically limited here.

[0115] Furthermore, the horizontal synchronization signal is the i-th horizontal synchronization signal after the vertical synchronization signal, where i is a positive integer less than or equal to 10. During the stage when the display system switches from the blanking area to the first few lines of the active area (such as the first i lines), the load of the display system changes significantly, thereby causing a power drop, affecting the normal operation of the display system. Based on this, the controller can change the configuration of the voltage regulator to control the voltage regulator to raise the output voltage in advance, so that the first power chip and the voltage regulator jointly supply power to the controller, compensating for the power drop of the first power supply voltage when the load changes, thereby effectively protecting the first power chip and ensuring the normal operation of the display system. After the display system enters the active area for several lines, the load of the display system tends to be stable, and the power supply of the first power chip gradually recovers and stabilizes after the drop. Based on this, the controller can again change (or restore) the configuration of the voltage regulator, control the voltage regulator to reduce the output voltage to a normal level, and the first power chip alone supplies power to the controller. The controller no longer draws current from the voltage regulator, reducing the additional power consumption caused by raising the voltage regulator power supply.

[0116] Optionally, when the controller controls the voltage regulator to raise the output voltage, the raised voltage value can be less than or equal to the voltage value of the output voltage drop of the first power chip, that is, the difference between the initial voltage regulation value and the transient voltage regulation value is less than or equal to the difference between the drop voltage value and the initial voltage value. This is because the voltage regulator needs to first convert the voltage provided by the second power chip, and then provide the converted voltage to the controller for power supply. The efficiency of the voltage regulator will affect the power supply situation. In order to reduce other effects brought by the voltage regulator power supply, the voltage regulator output voltage raising value can be limited to be less than or equal to the voltage value of the output voltage drop of the first power chip, thereby ensuring that after the output voltage of the voltage regulator is raised, the controller is still mainly powered by the first power chip. The voltage regulator assists the first power chip in powering the controller, ensuring power supply efficiency and avoiding chip overheating. It should be noted that for different application scenarios, the drop value of the display system power supply voltage is generally different. For some scenarios with relatively large loads, the voltage value will often drop significantly when the display system switches from the blanking area to the active area; while for scenarios with relatively small loads, the voltage value will drop less when the display system switches from the blanking area to the active area.

[0117] In one possible implementation, as shown in FIG2F , after receiving the vertical synchronization signal of the target frame (e.g., at time t4), the controller may send a first control signal to the voltage regulator (e.g., at time t5, where t5 is less than t6) before a preset duration (i.e., a second preset duration, such as the time period from t4 to t6) arrives. The second preset duration is greater than or equal to the duration of the vertical synchronizing back porch (VBP) of the vertical synchronization signal. This is because, after the vertical synchronization signal arrives and the VBP duration has passed, the first row of valid data in the frame corresponding to the vertical synchronization signal may begin to be transmitted and displayed on the panel. At this time, the display system switches from the blanking area to the active area, and its load state changes significantly, causing the power supply to drop. Therefore, the controller should control the voltage regulator to increase the output voltage value after receiving the vertical synchronization signal and before the second preset duration expires. That is, before the voltage provided by the first power chip drops significantly, the voltage value output by the voltage regulator should be raised in advance, thereby providing timely and effective protection for the first power chip and ensuring stable operation of the display system. The specific value of the duration of VBP can be set according to the actual application scenario. Usually, vertical calculations are mostly based on lines. For example, the specific value of the duration of VBP can be 2 lines, which is not specifically limited here.

[0118] Optionally, as shown in FIG2B above, the voltage regulator of the display driver chip can be a DCDC, or it can be an LDO, or it can be other types of voltage regulators, which are not listed here one by one. For example, the above-mentioned voltage regulator can be an LDO, and the voltage value of the third voltage provided by the voltage regulator (including the initial value of the voltage regulation and the transient value of the voltage regulation) is greater than or equal to the minimum operating voltage of the controller. Compared with DCDC, the display driver chip provides voltage to the controller through the LDO voltage regulator, which can reduce the chip area occupied, and setting the voltage value of the LDO output voltage to be greater than or equal to the minimum operating voltage of the controller can reduce the amplitude value during voltage adjustment, so that the output voltage value can reach the specified value faster, thereby improving the voltage adjustment efficiency.

[0119] For ease of understanding, the display driver chip structure and voltage regulation scheme provided in the embodiment of the present application are briefly described by taking the power supply of the display driver chip as a digital power supply as an example. As shown in Figure 3, the digital power supply for powering the DDIC chip

[0011] may include two parts. One part may be a voltage Vout_DCDC1 (corresponding to a first voltage) provided by a board-level DC-DC converter 1

[0021] (DCDC1, corresponding to a first power supply chip), and the other part is a voltage Vout_LDO (corresponding to a third voltage) provided after converting the output voltage (such as Vout_DCDC2, corresponding to a second power supply chip) of a board-level DC-DC converter 2

[0031] (DCDC2, corresponding to a second power supply chip) through an LDO

[0111] inside the display driver chip. Inside the display driver chip

[0011] , both Vout_DCDC1 and Vout_LDO are connected to a controller

[0110] to power the controller

[0110] of the DDIC chip. When the value of Vout_DCDC1 is greater than the value of Vout_LDO, the controller

[0110] operates under the power supply of Vout_DCDC1 alone; and when the value of Vout_DCDC1 is less than or equal to the value of Vout_LDO, the controller

[0110] operates under the common power supply of Vout_DCDC1 and Vout_LDO, that is, the operating current of the controller is jointly provided by Vout_DCDC1 and Vout_LDO.

[0120] For example, the minimum operating voltage of the controller in the DDIC is 1.10V, and the maximum operating voltage is 1.30V. When the load state of the display system is stable, the voltage Vout_DCDC1 provided by the first power chip is 1.20V (corresponding to the initial voltage value), the voltage Vout_DCDC2 provided by the second power chip is 1.8V, and the output voltage Vout_LDO of the LDO is 1.13V (corresponding to the initial value of voltage regulation). The value of Vout_DCDC1 is greater than the value of Vout_LDO. At this time, the controller operates under the sole power supply of Vout_DCDC1, that is, the operating current of the controller is provided by Vout_DCDC1.

[0121] When the load state of the display system changes significantly, Vout_DCDC1 drops. For example, after the drop, the voltage value of Vout_DCDC1 is 1.15V (corresponding to the drop voltage value), and the drop amplitude is 0.05V. To prevent Vout_DCDC1 from dropping further, Vout_LDO can be raised from 1.13V to 1.18V (corresponding to the transient value of the voltage regulation) with an increase of 0.05V. At this time, the controller can extract current from Vout_LDO and operate under the common power supply of Vout_DCDC1 and Vout_LDO. Subsequently, when the load state of the display system tends to be stable again, Vout_DCDC1 will gradually recover from 1.15V to 1.20V after the drop. To save power, Vout_LDO can be lowered from 1.18V to the original 1.13V, or other voltage values, such as 1.12V or 1.14V. It should be noted that if the voltage regulator of the display driver chip shown in FIG3 is an LDO, the voltage value of the voltage Vout_DCDC2 provided by the second power supply chip should be greater than the voltage value of the output voltage Vout_LDO of the LDO. If the voltage regulator of the display driver chip shown in FIG3 is a DCDC, the voltage value of the voltage Vout_DCDC2 provided by the second power supply chip can be greater than the voltage value of the output voltage of the voltage regulator or less than the voltage value of the output voltage of the voltage regulator.

[0122] It is understandable that the specific voltage values ​​of the above-mentioned various voltages are only used as examples to illustrate the voltage regulation scheme, which is more convenient for understanding the scheme provided by this application and should not constitute a limitation on the scheme of this application. In addition, the power supply of the display driver chip can also be an analog power supply, which is not specifically limited here.

[0123] Below, the timing of the voltage regulation scheme described in Figures 2B and 3 is briefly explained. Please refer to Figure 4A, which is a timing diagram of a voltage regulation scheme provided in an embodiment of the present application. Among them, when the display system switches from the blanking area to the first few rows of the active area, the load state switches significantly, and Vout_DCDC1 will drop. For this stage, the controller can control the LDO regulator to raise the output voltage value through a control signal (i.e., the first control signal), so that the controller can operate under the common power supply of the first power chip and the LDO, and draw current from the LDO to compensate for the drop in the Vout_DCDC1 voltage value. For example, the controller controls the LDO to change the configuration from configuration A to configuration B. The output voltage value set by configuration A is smaller (such as 1.13V), and the output voltage value set by configuration B is larger (such as 1.18V). After the display system enters the active area for a few rows, the voltage value of Vout_DCDC1 gradually returns to the value before the drop and tends to be stable. During this phase, the controller can control the LDO regulator to reduce the output voltage via a control signal (i.e., a second control signal), allowing the controller to operate solely with the power supply of the first power chip. The controller's operating current is provided by the first power chip, and the controller does not draw current from the LDO. For example, the controller controls the LDO to restore the configuration from configuration B to configuration A, or to change from configuration B to configuration C (not shown in FIG4A ), where the output voltage set in configuration C (e.g., 1.12V or 1.14V) is lower than that in configuration B.

[0124] Unlike solutions where a controller controls DCDC1 to adjust Vout_DCDC1, controlling the voltage regulator with a controller allows for quick and timely adjustment of Vout_LDO, saving even more power. Because DCDC1 is external to the display driver chip, control signals sent by the controller take longer to arrive, and DCDC1's voltage regulation speed is typically in the millisecond range. After the control signal reaches DCDC1, DCDC1 may not respond immediately. As shown in Figure 4B, this can cause Vout_DCDC1 to rise but then take a long time to adjust to its normal level. It may even remain at this level until all frames are displayed, resulting in higher power consumption.

[0125] It should be noted that the function of Vout_LDO is to protect the digital power supply Vout_DCDC1 and can serve as a backup power supply for Vout_DCDC1. Under normal conditions, the load state of the display system is stable. At this time, the voltage value of Vout_LDO is less than Vout_DCDC1. The controller operates under the sole power supply of Vout_DCDC1 of DCDC1. In other words, the digital current of the controller is completely derived from DCDC1. The LDO is basically in the off state. The controller does not draw current from the LDO (or DCDC2), which can save power. However, when the load of the display system changes significantly, the digital power supply Vout_DCDC1 will drop. To protect Vout_DCDC1, the voltage value of Vout_LDO can be raised so that the voltage value of Vout_LDO is greater than or equal to the voltage value after the drop of Vout_DCDC1. This allows the controller to operate under the common power supply of Vout_DCDC1 of DCDC1 and Vout_LDO of LDO. In other words, the digital current of the controller can be derived from both DCDC1 and LDO (or DCDC2). Or when Vout_DCDC1 fails to supply power, Vout_LDO can be used as a backup power supply for temporary power supply.

[0126] Optionally, the value of Vout_LDO may be greater than or equal to the minimum operating voltage of the controller, so that the voltage regulation amplitude is smaller during subsequent voltage adjustment, thereby ensuring voltage regulation efficiency.

[0127] For ease of understanding, the following briefly describes the process of the voltage regulation method provided in the embodiment of the present application based on the display driver chip shown in FIG2B . The voltage regulation method provided in the embodiment of the present application can be applied to the controller in the display driver chip shown in FIG2B , as well as controllers in other chips derived from variations or combinations of the display driver chip shown in FIG2B , without further limitation.

[0128] Please refer to FIG5 , which is a flow chart of a voltage regulation method provided in an embodiment of the present application. The method includes but is not limited to the following steps S501-S503:

[0129] S501: The controller controls the voltage regulator to adjust the voltage value of the third voltage through a control signal.

[0130] S502: When the voltage value of the third voltage is less than the voltage value of the first voltage, the controller operates under the power supply of the first voltage alone, that is, the operating current of the controller is provided by the first voltage.

[0131] S503: When the voltage value of the third voltage is greater than or equal to the voltage value of the first voltage, the controller operates under the combined power supply of the first voltage and the third voltage. In other words, the operating current of the controller is provided by the combined power supply of the first voltage and the third voltage.

[0132] As shown in Figure 2B above, the display driver chip (DDIC) includes a controller and a voltage regulator. The controller is coupled to a first power chip, and the voltage regulator is coupled to a second power chip. The first power chip can be used to provide a first voltage to the controller; the second power chip can be used to provide a second voltage to the voltage regulator; and the voltage regulator can be used to provide a third voltage to the controller based on the second voltage.

[0133] In one possible implementation, the controller's adjustment of the voltage value in step S501 may be to control a voltage regulator to raise the voltage value of the third voltage via a control signal. Optionally, the display driver chip further includes a frame buffer coupled to the controller, or the electronic device using the display driver chip further includes a frame buffer coupled to the controller, wherein the frame buffer stores a target frame. Exemplarily, after receiving the vertical synchronization signal of the target frame, the controller may send a first control signal to the voltage regulator; the first control signal is used to control the voltage regulator to raise the third voltage from an initial voltage stabilization value to a transient voltage stabilization value, wherein the transient voltage stabilization value is greater than or equal to a dropout voltage value of the first voltage, wherein the dropout voltage value is the voltage value of the initial voltage of the first voltage after a dropout. This approach can be applied to scenarios where the load state of the display system changes significantly and the voltage value of the first voltage drops. By raising the voltage value of the third voltage, the controller operates under the combined power supply of the first and third voltages, preventing the first voltage from further dropping and affecting the normal operation of the display system. Optionally, when the controller controls the voltage regulator to raise the output voltage, the raised voltage value can be less than or equal to the voltage value of the output voltage drop of the first power supply chip, that is, the difference between the initial voltage regulation value and the transient voltage regulation value is less than or equal to the difference between the drop voltage value and the initial voltage value.

[0134] In one possible implementation, the controller adjusts the voltage value in step S501 by controlling the voltage regulator to lower the voltage value of the third voltage through a control signal. Optionally, the display driver chip further includes a frame buffer coupled to the controller, or the electronic device using the display driver chip further includes a frame buffer coupled to the controller, wherein the frame buffer stores the target frame. Exemplarily, after receiving the horizontal synchronization signal of the target frame, the controller may send a second control signal to the voltage regulator; the second control signal is used to control the voltage regulator to lower the third voltage from a transient voltage stabilization value to an initial voltage stabilization value, wherein the initial voltage stabilization value is less than the initial voltage value of the first voltage. This method can be applied to a scenario where the load state of the display system tends to be stable after the voltage value of the third voltage is raised, and the voltage value of the first voltage gradually recovers after a drop. By lowering the voltage value of the third voltage, the controller operates under the sole power supply of the first voltage, thereby reducing the additional power consumption caused by the third voltage power supply.

[0135] Optionally, after receiving the horizontal synchronization signal of the target frame, the controller can wait for a certain period of time (i.e., a first preset period of time) before sending a second control signal to the regulator. The first preset period of time is greater than or equal to the period of the back porch (HBP) of the horizontal synchronization signal.

[0136] Furthermore, the horizontal synchronization signal is the i-th horizontal synchronization signal after the vertical synchronization signal, where i is a positive integer less than or equal to 10.

[0137] Optionally, after receiving the vertical synchronization signal of the target frame, the controller can send a first control signal to the regulator before a preset duration (i.e., a second preset duration) arrives, and the second preset duration is greater than or equal to the duration of the vertical synchronization signal back porch (VBP).

[0138] Optionally, the voltage regulator may be an LDO, and a voltage value of the third voltage provided by the voltage regulator (including an initial voltage regulation value and a transient voltage regulation value) is greater than or equal to a minimum operating voltage of the controller.

[0139] The above is an exemplary description of a scheme in which the controller controls the backup power supply (voltage regulator) to adjust the output voltage value to achieve the adjustment of the working modes of the main power supply and the backup power supply. This scheme can protect the main power supply, ensure the normal operation of the display system, and reduce power consumption.

[0140] Below, we briefly explain how a controller can directly control a single power supply (or main power supply) to adjust the output voltage. For example, the voltage can be raised to compensate for power drops when the display system load changes significantly, and the voltage can be lowered in time to reduce power consumption after the display system load stabilizes.

[0141] Please refer to FIG6 , which is a schematic diagram of the structure of another display driver chip provided by an embodiment of the present application. The display driver chip

[0012] may include a controller

[0120] and a frame buffer

[0122] coupled to each other. The controller

[0120] may be coupled to a first power chip

[0022] .

[0142] The first power chip

[0022] can be used to provide a first voltage to the controller

[0120] and adjust the voltage value of the first voltage based on an instruction signal sent by the controller

[0120] ;

[0143] The controller

[0120] is configured to send a first instruction signal to the first power chip

[0022] after receiving the vertical synchronization signal of the target frame; the first instruction signal is configured to instruct the first power chip

[0022] to increase the first voltage from a first voltage value to a second voltage value;

[0144] The controller

[0120] is further configured to, after receiving the horizontal synchronization signal of the target frame, send a second instruction signal to the first power chip

[0022] ; the second instruction signal is configured to instruct the first power chip

[0022] to lower the second voltage from the second voltage value to a third voltage value, wherein the first voltage value, the second voltage value, and the third voltage value are all greater than or equal to the minimum operating voltage of the controller

[0120] . Exemplarily, the controller

[0120] may send the first instruction signal and the second instruction signal to the first power chip

[0022] via an inter-integrated circuit bus (IIC bus, or I2C bus for short).

[0145] Optionally, the voltage regulation speed of the first power chip

[0022] is in the microsecond (us) level. For example, the first power chip

[0022] can be a board-level power management chip (Power Management IC, PMIC), which supports adjustable output voltage and a voltage regulation speed in the us level. Since the first power chip

[0022] is generally deployed outside the display driver chip

[0012] , when the controller in the display driver chip

[0012] uses the indication signal to instruct and control the first power chip

[0022] , the transmission and response of the signal often require a certain amount of time. If the voltage regulation speed of the first power chip

[0022] is slow (for example, in the millisecond (ms) level), the problem of voltage regulation lag is likely to occur. This may result in a situation where the voltage value of the first voltage drops, but the voltage value is not raised in time to compensate for the drop, resulting in an error in the display system; or the voltage value of the first voltage is raised, but the voltage value is not lowered in time when the load is stable, which increases power consumption and affects the battery life of the device.

[0146] Optionally, after receiving the horizontal synchronization signal of the target frame, the controller

[0120] may wait for a preset period of time before sending a second indication signal to the first power supply chip

[0022] . The preset period of time may be greater than or equal to the period of the back shoulder (HBP) of the horizontal synchronization signal. Please refer to the relevant description in the corresponding embodiment of Figure 2B above, which will not be repeated here.

[0147] Furthermore, the horizontal synchronization signal is the i-th horizontal synchronization signal after the vertical synchronization signal, where i is a positive integer less than or equal to 10.

[0148] Optionally, when the controller

[0120] controls the first power supply chip

[0022] to raise the voltage value of the output voltage, the raised voltage value may be less than or equal to the voltage value of the output voltage drop of the first power supply chip

[0022] . That is, the difference between the first voltage value and the second voltage value is less than or equal to the voltage value of the output voltage drop, thereby avoiding the situation where the raised value is too large and exceeds the maximum operating voltage of the controller

[0120] , thereby affecting the normal operation of the display system.

[0149] Optionally, after receiving the vertical synchronization signal of the target frame and before the preset duration is reached, the controller sends a first indication signal to the first power supply chip

[0022] . The preset duration is greater than or equal to the duration of the back shoulder (VBP) of the vertical synchronization signal. Please refer to the relevant description in the corresponding embodiment of Figure 2B above, which will not be repeated here.

[0150] In one possible implementation, the display driver chip

[0012] may further include a voltage regulator

[0121] , the voltage regulator

[0121] may be coupled to a second power supply chip

[0032] , the second power supply chip

[0032] may be used to provide a second voltage to the voltage regulator

[0121] ; the voltage regulator

[0121] may be used to provide a third voltage to the controller

[0120] based on the second voltage; the voltage value of the third voltage is less than the voltage value of the first voltage. It is understood that the second power supply chip

[0032] and the voltage regulator

[0121] together serve as a backup power source for the first power supply chip

[0022] . When the first power supply chip

[0022] is unable to supply power to the controller

[0120] , such as when a power failure occurs, the second power supply chip

[0032] and the voltage regulator

[0121] serve as a temporary power source to supply power to the controller

[0120] , so that the display system can operate normally and ensure user experience.

[0151] For ease of understanding, another voltage regulation method provided in an embodiment of the present application will be described below based on the display driver chip shown in FIG6 . It is understood that the another voltage regulation method provided in an embodiment of the present application can be applied to the controller in the display driver chip shown in FIG6 , as well as controllers in other chips derived from variations or combinations of the display driver chip shown in FIG6 , without specific limitation herein.

[0152] Please refer to FIG7 , which is a flow chart of another voltage regulation method provided in an embodiment of the present application. The method includes but is not limited to the following steps S701-S702:

[0153] S701: After receiving the vertical synchronization signal of the target frame, send a first indication signal to the first power chip.

[0154] S702: After receiving the horizontal synchronization signal of the target frame, send a second indication signal to the first power chip.

[0155] In which, the target frame can be saved in a frame buffer, and the frame buffer can be coupled to a controller; the first indication signal is used to instruct the first power supply chip to increase the first voltage from a first voltage value to a second voltage value; the second indication signal is used to instruct the first power supply chip to decrease the second voltage from a second voltage value to a third voltage value, and the first voltage value, the second voltage value and the third voltage value are all greater than or equal to the minimum operating voltage of the controller.

[0156] Optionally, after receiving the horizontal synchronization signal of the target frame, the controller may wait for a certain period of time before sending a second indication signal to the first power chip, and the period of time is greater than or equal to the period of the back porch (HBP) of the horizontal synchronization signal.

[0157] Furthermore, the horizontal synchronization signal is the i-th horizontal synchronization signal after the vertical synchronization signal, where i is a positive integer less than or equal to 10.

[0158] Optionally, after receiving the vertical synchronization signal of the target frame and before a preset duration arrives, the controller sends a first indication signal to the first power chip, where the preset duration is greater than or equal to the duration of the back porch (VBP) of the vertical synchronization signal.

[0159] For ease of understanding, the timing of the voltage regulation scheme described in FIG. 7 is briefly described below. Please refer to FIG. 8 , which is a timing diagram of another voltage regulation scheme provided by an embodiment of the present application. When the display system switches from the blanking area to the first few rows of the active area, the load state undergoes a significant change, and the output voltage Vout_PMIC of the first power supply chip drops. During this phase, the controller can instruct the first power supply chip (e.g., PMIC) to increase the output voltage Vout_PMIC via an indication signal (i.e., a first indication signal) to compensate for the drop in power supply voltage and meet the voltage requirements for normal operation of the controller. For example, the controller instructs the PMIC to change the configuration from configuration A to configuration B. Configuration A sets a lower output voltage value (e.g., 1.13V), while configuration B sets a higher output voltage value (e.g., 1.18V). After the display system enters the active area for a few rows, the load state stabilizes, and the voltage value of Vout_PMIC no longer drops and also stabilizes. At this time, the voltage value of Vout_PMIC will be higher than normal due to the increase, resulting in higher power consumption. For this stage, the controller can instruct the PMIC to lower the output voltage value through an indication signal (i.e., the second indication signal), thereby reducing power consumption. For example, the controller instructs the PMIC to restore the configuration from configuration B to configuration A, or change from configuration B to configuration C. The output voltage value set by configuration C (such as 1.12V or 1.14V) is lower than that of configuration B.

[0160] The present application also provides a semiconductor chip, which may include the display driver chip provided in any of the above embodiments of the present application. It is understood that the functions and effects of each component of the display driver chip can be referred to the specific implementation methods of the embodiments described in Figures 2A to 8 above, and will not be further described here.

[0161] The present application also provides an electronic device, which includes a display driver chip provided in any of the above embodiments of the present application. It is understood that the functions and effects of each part of the display driver chip can be referred to the specific implementation methods of the embodiments in Figures 2A to 8 above, and will not be repeated here. Optionally, the electronic device may also include a communication interface for the electronic device to communicate with other devices or communication networks.

[0162] The present application also provides an electronic device that implements the voltage regulation method provided in any of the above embodiments. This function can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0163] The present application provides a computer storage medium, wherein the computer storage medium stores a computer program. When the computer program is executed, the display driver chip can perform the functions involved in the voltage regulation method process.

[0164] The present application provides a computer program, which includes instructions. When the computer program is executed, the display driver chip can perform the functions involved in the voltage regulation method process.

[0165] The present application provides a chip system comprising any of the above-described display driver chips. In one possible design, the chip system further comprises a memory for storing program instructions and data necessary or relevant for the operation of the display driver chip. The chip system may consist of a chip alone or may include a chip and other discrete components.

[0166] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0167] It should be noted that, for the sake of simplicity, the aforementioned method embodiments are described as a series of action combinations. However, those skilled in the art should be aware that this application is not limited by the order of the actions described, because according to this application, certain steps may be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in this specification are all preferred embodiments, and the actions and modules involved are not necessarily required by this application.

[0168] In several embodiments provided in this application, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices or units, or may be an electrical, mechanical or other form of connection.

[0169] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A display driver chip DDIC, characterized in that: The DDIC includes a controller and a voltage regulator; the controller is coupled to a first power chip, and the voltage regulator is coupled to a second power chip; wherein, The first power chip is used to provide a first voltage to the controller; The second power chip is used to provide a second voltage for the voltage stabilizer; The controller is configured to send a control signal to the voltage stabilizer; The voltage regulator provides a third voltage to the controller based on the second voltage, and receives and adjusts a voltage value of the third voltage in response to the control signal; When the voltage value of the third voltage is less than the voltage value of the first voltage, the operating current of the controller is provided by the first voltage; When the voltage value of the third voltage is greater than or equal to the voltage value of the first voltage, the operating current of the controller is provided by both the first voltage and the third voltage.

2. The chip according to claim 1, wherein: The DDIC further includes a frame buffer coupled to the controller, wherein the frame buffer stores a target frame; The controller is specifically configured to send a first control signal to the voltage stabilizer after receiving the vertical synchronization signal of the target frame; The voltage stabilizer is further configured to receive and respond to the first control signal to increase the third voltage from an initial voltage stabilization value to a transient voltage stabilization value; the transient voltage stabilization value is greater than or equal to a drop voltage value of the first voltage, and the drop voltage value is a voltage value after the initial voltage value of the first voltage drops.

3. The chip according to claim 2, wherein: The controller is further configured to send a second control signal to the voltage stabilizer after receiving the horizontal synchronization signal of the target frame; The voltage regulator is further configured to receive and respond to the second control signal to adjust the third voltage from a regulated transient value to an initial regulated value, where the initial regulated value is smaller than the initial voltage value of the first voltage.

4. The chip according to claim 3, wherein: The controller is specifically used for: After receiving the horizontal synchronization signal and a first preset duration has passed, the second control signal is sent to the voltage stabilizer; the first preset duration is greater than or equal to the duration of the back porch HBP of the horizontal synchronization signal.

5. The chip according to any one of claims 2 to 4, characterized in that The difference between the regulated voltage initial value and the regulated voltage transient value is less than or equal to the difference between the drop voltage value and the initial voltage value.

6. The chip according to any one of claims 2 to 5, characterized in that The controller is specifically used for: After receiving the vertical synchronization signal and before a second preset duration is reached, the first control signal is sent to the regulator; the second preset duration is less than or equal to the duration of the back porch VBP of the vertical synchronization signal.

7. The chip according to any one of claims 1 to 6, characterized in that The voltage regulator includes a low dropout linear regulator (LDO), and a voltage value of the third voltage is greater than or equal to a minimum operating voltage of the controller.

8. A voltage regulation method, characterized in that: A controller for a display driver chip (DDIC), wherein the DDIC further comprises a voltage regulator; the controller is coupled to a first power chip, and the voltage regulator is coupled to a second power chip; the first power chip is used to provide a first voltage for the controller; The second power chip is used to provide a second voltage for the voltage stabilizer; The voltage regulator is configured to provide a third voltage to the controller based on the second voltage; and the method comprises: A control signal is sent to the voltage regulator; the control signal is used to control the voltage value of the third voltage; when the voltage value of the third voltage is less than the voltage value of the first voltage, the operating current of the controller is provided by the first voltage; when the voltage value of the third voltage is greater than or equal to the voltage value of the first voltage, the operating current of the controller is provided by both the first voltage and the third voltage.

9. The method according to claim 8, wherein The DDIC further includes a frame buffer coupled to the controller, wherein the frame buffer stores a target frame; and sending a control signal to the voltage regulator includes: After receiving the vertical synchronization signal of the target frame, a first control signal is sent to the voltage stabilizer; the first control signal is used to control the voltage stabilizer to increase the third voltage from the initial voltage regulation value to the transient voltage regulation value, the transient voltage regulation value is greater than or equal to the drop voltage value of the first voltage, and the drop voltage value is the voltage value of the initial voltage value of the first voltage after the drop.

10. The method according to claim 9, wherein The method further comprises: After receiving the horizontal synchronization signal of the target frame, a second control signal is sent to the voltage stabilizer; the second control signal is used to control the voltage stabilizer to lower the third voltage from the regulated transient value to the regulated initial value, and the regulated initial value is less than the initial voltage value of the first voltage.

11. The method according to claim 10, wherein The sending a second control signal to the voltage regulator includes: After receiving the horizontal synchronization signal and a first preset duration has passed, the second control signal is sent to the voltage stabilizer; the first preset duration is greater than or equal to the duration of the back porch HBP of the horizontal synchronization signal.

12. The method according to claims 9-11, characterized in that The difference between the regulated voltage initial value and the regulated voltage transient value is less than or equal to the difference between the drop voltage value and the initial voltage value.

13. The method according to any one of claims 9 to 12, wherein: The sending a first control signal to the voltage regulator includes: After receiving the vertical synchronization signal and before a second preset duration is reached, the first control signal is sent to the regulator; the second preset duration is less than or equal to the duration of the back porch VBP of the vertical synchronization signal.

14. The method according to any one of claims 8 to 13, wherein The voltage regulator includes a low dropout linear regulator (LDO), and a voltage value of the third voltage is greater than or equal to a minimum operating voltage of the controller.

15. A display driver chip DDIC, characterized in that: The DDIC includes a controller and a frame buffer coupled to each other, the controller is coupled to the first power chip, and the frame buffer stores a target frame; wherein, The first power chip is configured to provide a first voltage to the controller and adjust a voltage value of the first voltage based on an instruction signal sent by the controller; The controller is configured to send a first instruction signal to the first power chip after receiving the vertical synchronization signal of the target frame; the first instruction signal is configured to instruct the first power chip to increase the first voltage from a first voltage value to a second voltage value; The controller is also used to send a second indication signal to the first power supply chip after receiving the horizontal synchronization signal of the target frame; the second indication signal is used to instruct the first power supply chip to lower the second voltage from the second voltage value to the third voltage value, and the first voltage value, the second voltage value and the third voltage value are all greater than or equal to the minimum operating voltage of the controller.

16. A voltage regulation method, characterized in that: A controller applied to a display driver chip (DDIC), the DDIC further comprising a frame buffer coupled to the controller, the frame buffer storing a target frame, the controller coupled to a first power chip, the first power chip being configured to provide a first voltage to the controller; the method comprising: After receiving the vertical synchronization signal of the target frame, sending a first instruction signal to the first power chip; the first instruction signal is used to instruct the first power chip to increase the first voltage from a first voltage value to a second voltage value; After receiving the horizontal synchronization signal of the target frame, a second indication signal is sent to the first power supply chip; the second indication signal is used to instruct the first power supply chip to lower the second voltage from the second voltage value to the third voltage value, and the first voltage value, the second voltage value and the third voltage value are all greater than or equal to the minimum operating voltage of the controller.

17. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program or instruction. When the computer program or instruction is executed, the method according to any one of claims 8 to 14 or 16 is implemented.

18. A computer program, characterized in that The computer program comprises instructions, and when the computer program is executed, the method according to any one of claims 8 to 14 or 16 is implemented.

19. An electronic device, characterized in that: The electronic device comprises a display driver chip DDIC according to any one of claims 1 to 7 or 15, wherein the electronic device further comprises a processor, the processor is coupled to the DDIC, the processor is used to process image information and send the processing result to the DDIC; the electronic device further comprises a panel, the panel is coupled to the DDIC, and the DDIC is further used to display the processing result of the processor on the panel.

Images