Test system

Abstract

The invention relates to a test system comprising: a load inverter device which has a load inverter unit which is designed to convert DC voltage into a first AC voltage, preferably bidirectionally, and a load inverter control unit which is designed to control the load inverter unit using a first pulse width modulation (PWM) control signal which is determined on the basis of a first setpoint value; a test inverter device which has a test inverter unit which is designed to convert DC voltage into a second AC voltage, preferably bidirectionally, and a test inverter control unit which is designed to control the test inverter unit using a second PWM control signal which is determined on the basis of a second setpoint value; and an inductive load which at a first terminal is connected to the load inverter unit in order to receive the first AC voltage, and at a second terminal is connected to the test inverter unit in order to receive the second AC voltage. The test system has a voltage measuring unit which is designed to measure the second AC voltage, and the load inverter control unit is designed to synchronise the first PWM control signal with the second PWM control signal using the measured second AC voltage.

Description

[0001] Description

[0002] test system

[0003] The present invention relates to a test system that can be used for testing an inverter device consisting of an inverter unit for converting direct current to alternating current and an inverter control unit for controlling the operation of the inverter unit. The inverter device is particularly intended for use in a drive system of a (partially) electric vehicle, such as a battery-electric vehicle or a hybrid vehicle.

[0004] During the development and production of an inverter device, it is necessary to comprehensively test and measure it at various stages during the development process. Tests and measurements can focus on the following:

[0005] - Early functional testing of the inverter device at an early stage of development to verify its intended function and identify design errors

[0006] - Measurement of losses or efficiencies across the entire operating range, taking into account different operating conditions, e.g. ambient and / or coolant temperature

[0007] - thermal tests during continuous operation or dynamic processes as well as short-term overload, in particular with regard to compliance with specified specifications

[0008] - Endurance tests with a focus on lifetime requirements and degradation effects

[0009] - Specific tests, e.g. regarding electromagnetic compatibility, influence of environmental conditions, etc.

[0010] - Acceptance test (EOL = End of line) for functional testing at the end of production Such tests and measurements require the operation of the inverter device under load, whereby the inverter device to be tested performs its intended task of converting electrical energy within operating limits and, if necessary, beyond them. This means that the inverter device is connected to at least one source and at least one sink. A typical example of operation of the inverter device is operation as an inverter, in which a direct voltage from a direct voltage source (e.g. a battery or a direct voltage network) is converted into an alternating voltage, in particular a three-phase alternating voltage, in order to operate a load, such as an electrical machine. The inverter device, i.e. the inverter unit, can thereby convert the electrical quantities, i.e.Current, voltage, frequency, and phase angle for the load can be largely freely generated or adjusted according to a control algorithm implemented in the inverter control unit. Consequently, any test system used must also be designed for this free adjustment of the electrical variables.

[0011] For this purpose, machine test benches consisting of two electrical machines, a load inverter device, and a test inverter device can be used as a test system. The first electrical machine is driven by the test inverter device. The second electrical machine is connected to the first electrical machine as a load and is driven by the load inverter device. This type of test system is resource-, space-, maintenance-, and personnel-intensive, and thus ultimately very costly.

[0012] Another test system is a PHIL (Power Hardware in the Loop) system. Here, a complex electronic system emulates the behavior of an electrical machine or any load without actually requiring an electrical machine or load machine.

[0013] A simple solution is to test on a passive load. Typically, an ohmic-inductive load in the form of a choke coil is used here. However, this variant severely limits the possible operating range compared to a test on an electrical machine. Another option is the so-called pure inverter back-to-back setup, in which two inverter devices are connected to each other on both the DC and AC sides. On the AC side, the two inverter devices act on a common load, which in the simplest case is designed as an inductor. The two inverter devices can be synchronized by implementing the respective control algorithms in a common control unit. Alternatively, synchronization can be performed via a dedicated signal line.Such test systems are known, for example, from JP 2000 - 069 765 A, CN 110 286 316 A and CN 101 118 266 A. These approaches therefore require software and hardware adaptation of the inverter device to be tested.

[0014] If the control algorithms of the two inverter devices in the back-to-back configuration are not synchronized, harmonic currents would be generated, severely limiting or even making test and measurement operations impossible. Adequate attenuation can be achieved by using a complex filter circuit (e.g., LCL) instead of a simple inductor as the load. However, this measure severely limits the operating range and results in additional costs.

[0015] The object of the present invention is therefore to eliminate or at least mitigate the aforementioned disadvantages. In particular, testing and measurement of an inverter device across the entire operating range should be enabled with minimal hardware and cost requirements. Furthermore, modifications to the hardware and / or software required for testing and measurement, which are required to control the inverter device, should be avoided.

[0016] The problem is solved by the test system having the features according to the independent claim. Advantageous embodiments are the subject of the dependent claims. A test system comprises: a load inverter device comprising a load inverter unit configured to convert direct current into a first alternating current, preferably bidirectionally, and a load inverter control unit configured to control the load inverter unit using a first pulse width modulation (PWM).pulse width modulation) drive signal that is determined on the basis of a first setpoint, a test inverter device that has a test inverter unit that is designed to convert direct voltage into a second alternating voltage, preferably bidirectionally, and a test inverter control unit that is designed to control the test inverter unit using a second PWM drive signal that is determined on the basis of a second setpoint, and an inductive load that is connected to the load inverter unit at a first terminal to receive the first alternating voltage, and to the test inverter unit at a second terminal to receive the second alternating voltage. Accordingly, the test system has a back-to-back structure.

[0017] The test system further comprises a voltage measuring unit configured to measure the second AC voltage. The load inverter control unit is then configured to synchronize the first PWM drive signal with the second PWM drive signal using the measured second AC voltage.

[0018] Accordingly, the first PWM control signal is synchronized with the second PWM control signal by the load inverter control unit using the second AC voltage measured by the voltage measuring unit. Consequently, only the load inverter control unit needs to be configured to receive the voltage values ​​acquired by the voltage measuring unit. The voltage measuring unit can also be formed by the load inverter control unit. By synchronizing the two PWM control signals, the first AC voltage and the second AC voltage are synchronized, thus reducing the generation of harmonic currents. Synchronization by measuring the second AC voltage eliminates the need to modify the hardware and / or software of the test inverter control unit compared to an intended application.In particular, no further input signals and their software processing in the test inverter control unit are required.

[0019] Preferably, both the load inverter unit and the test inverter unit can be configured to convert direct current into three-phase alternating current, preferably bidirectionally. The load inverter control unit can then be configured to synchronize the PWM control signals for all phases separately based on the corresponding phase voltages of the second alternating current. Consequently, the PWM control signal is synchronized individually for each phase. The number of phases of the load inverter control unit and the test inverter control unit can also be set to a number other than three.

[0020] In the case of full or zero modulation and / or modulation below the minimum duty cycle for a phase, it is also possible to use another phase of the measured second AC voltage, in which this condition does not occur, for synchronization. This ensures a robust approach.

[0021] The load inverter control unit can preferably be configured to synchronize a first carrier signal, which is used to determine the first PWM drive signal, with the measured second AC voltage or a second carrier signal reconstructed from the measured second AC voltage. Accordingly, the first carrier signal, which is used in the load inverter control unit to generate the first PWM drive signal from an input signal, is adapted or approximated to the measured second AC voltage or the reconstructed second carrier signal. In this way, frequency-correct synchronization is achieved, which leads to an appropriate reduction of the harmonic currents through the inductive load.

[0022] The load inverter control unit can be configured to adjust a specific counter value used for the first carrier signal to synchronize the first carrier signal with the measured second AC voltage or the reconstructed second carrier signal. Consequently, hardware differences in the load inverter control unit and the test inverter control unit, which result in a different PWM clock period when using the same counter value, can be compensated for, thus achieving frequency-correct synchronization between the first carrier signal and the measured second AC voltage or the reconstructed second carrier signal.

[0023] Furthermore, the load inverter control unit can be configured to adjust the determined counter value according to a distance between a reference time point relating to the first carrier signal and a reference time point relating to the measured second AC voltage or the reconstructed second carrier signal. Accordingly, a reference time point for the first carrier signal and a reference time point for the measured second AC voltage or the reconstructed carrier signal are determined. A distance between the reference times is then determined.

[0024] The load inverter control unit can be configured to determine a reference time based on one or more edges in an AC voltage or in a carrier signal. The edge(s) can be detected using the threshold method, the derivative method, a Schmitt trigger, or another known method. This allows for a simple determination of a reference time.

[0025] A reference time point can be selected from a group consisting of: the start of a PWM clock, the middle of a PWM pulse in the PWM clock, the rising edge of the PWM pulse, or the falling edge of the PWM pulse. When synchronizing two carrier signals, the reference times for one carrier signal and the other carrier signal can be set to the same type. If the two carrier signals are synchronous, the distance between the two reference times is zero. Alternatively, the reference times for the first carrier signal and the second carrier signal can be of a different type. Consequently, a predetermined distance exists between the two reference times when synchronous.

[0026] The load inverter control unit can be configured to determine the interval between the reference times using a counter. The counter is reset, in particular, when an integer multiple of the previously adjusted counter value is reached. It has proven advantageous if the counter is reset when twice the adjusted maximum counter value is reached, so that a reset occurs at the start of a new PWM clock. In this case, if the reference time for one carrier signal is set to the middle of a PWM pulse and the reference time for the other carrier signal is set to the start of a PWM clock, the specified interval corresponds to the adjusted counter value when synchronized.

[0027] The load inverter control unit can preferably be designed to detect a current through the inductive load. A current sensor present in the load inverter unit can preferably be used for this purpose. Alternatively, a dedicated current sensor can be installed. The load inverter control unit can then be designed to determine a ripple current in the detected current and to shift the first carrier signal such that the ripple current is minimized or eliminated. Consequently, a phase shift that is present due to an overall latency between the application of a PWM control signal and the detection of the measured values ​​of the output AC voltage can also be taken into account when synchronizing the first carrier signal. In this way, harmonic currents through the load can be further reduced or even eliminated.

[0028] Alternatively, the load inverter control unit can be configured to shift the first carrier signal by a fixed offset, which is previously determined mathematically or by measurement and stored in the load inverter control unit. The fixed offset thus corresponds to the total latency, which can be taken into account in this way. Again, harmonic currents through the load can be further reduced or even eliminated.

[0029] The voltage measuring unit can be configured to measure the first AC voltage. The load inverter control unit can then be configured to determine a reconstructed first carrier signal from the measured first AC voltage and to temporally adjust the first carrier signal synchronized with the second AC voltage or the reconstructed second carrier signal according to the determined offset to the reconstructed first carrier signal. Consequently, variable influences on the overall latency can be reliably taken into account.

[0030] The load inverter control unit can be configured to determine the offset according to a distance between a reference time point relating to the reconstructed first carrier signal and a reference time point relating to the first carrier signal synchronized with the second AC voltage or the reconstructed second carrier signal. The reference times can be specified or determined in the manner described above.

[0031] The load inverter control unit can be configured to determine the interval between the reference times using the counter. Accordingly, the determination of the interval corresponds to the procedure described above for determining the interval between the reference time of the first carrier signal and the reference time for the measured second AC voltage or the reconstructed second carrier signal.

[0032] The test system thus makes it possible to avoid adjustment of the test inverter device. Furthermore, harmonic currents can be avoided by appropriate synchronization of the carrier signals.

[0033] The present invention is described in detail below with reference to the figures. They show:

[0034] Fig. 1 shows a schematic structure of a test system according to an embodiment;

[0035] Fig. 2 shows a schematic structure of a load inverter control unit for controlling a load inverter unit; Fig. 3 shows exemplary time profiles of an alternating voltage, a carrier signal reconstructed therefrom, and a counter for determining a distance between two carrier signals in a case where the two carrier signals are synchronous and have no phase difference;

[0036] Fig. 4 shows exemplary time courses of the alternating voltage, the carrier signal reconstructed therefrom and the counter for determining a distance between the reconstructed carrier signal and another carrier signal in a case that the other carrier signal lags behind the reconstructed carrier signal;

[0037] Fig. 5 shows exemplary time courses of the alternating voltage, the carrier signal reconstructed therefrom and the counter for determining a distance between the reconstructed carrier signal and another carrier signal in a case that the other carrier signal leads the reconstructed carrier signal;

[0038] Fig. 6 shows exemplary time courses of an actual carrier signal, a resulting alternating voltage, the measured alternating voltage and the carrier signal reconstructed from the measured alternating voltage; and

[0039] Fig. 7 shows a schematic structure of a test system according to another embodiment.

[0040] The present invention will be described below using embodiments with reference to the figures. However, the description of the embodiments should not be considered exhaustive.

[0041] Fig. 1 shows a structure of a test system 1. The test system 1 has a load inverter device 2, which consists of a load inverter unit 4 for converting DC voltage m into a first AC voltage g and a load inverter control unit 6 for controlling operation of the load inverter unit 4. In the load inverter control unit 6, a controller 8, in which a synchronization algorithm is implemented, and a modulator 10 for outputting a PWM control signal d are formed as functional units. The test system 1 also has a test inverter device 12, which is to be subjected to a test and measurement. The test inverter device 12 has a test inverter unit 14 for converting DC voltage m into a second AC voltage h and a test inverter control unit 16 for controlling operation of the test inverter unit 14.In the test inverter unit 16, a controller 18 in which a current control algorithm is implemented and a modulator 20 for outputting a PWM control signal e are formed as functional units.

[0042] The load inverter device 2, i.e., the load inverter unit 4, and the test inverter device 12, i.e., the test inverter unit 14, are connected on the AC voltage side to an inductive load 22. In this case, the load inverter unit 4 and the test inverter unit 14 are configured to output a three-phase AC voltage. Alternatively, outputting an AC voltage with a different number of phases is also conceivable.

[0043] The operation of the load inverter device 2 and the test inverter device 12 is specified by an input via a user interface 24. This means that a first setpoint a1 for the load inverter device 2 and / or a second setpoint a2 for the test inverter device 12 are entered via the user interface 24. In return, actual values ​​a2 and control parameters b2 can be returned to the user interface 24.

[0044] Based on the first setpoint a1 and the second setpoint f, the two inverter devices 2 and 12 are then controlled or regulated in order to convert a direct voltage m, which is provided by a direct voltage power supply 26, into the first alternating voltage g and the second alternating voltage h, respectively. Bidirectional conversion is also conceivable. The direct voltage power supply 26 can be formed by a rectifier 26 and a network 30 that provides a three-phase mains voltage n. For the purpose of efficiency, the inputs of the load inverter unit 4 and the test inverter unit 14 are connected to the same direct voltage power supply 26. Of course, it is also conceivable for the inputs of the load inverter unit 4 and the test inverter unit 14 to be connected to different direct voltage sources.In this case, any energy fed back would have to be consumed via a load resistor or fed back into the grid 30.

[0045] The test system 1 in Fig. 1 also has a voltage measuring unit 32 configured to detect the first alternating voltage h. The detected measured values ​​k are then transmitted to the load inverter control unit 6 and processed by it. The voltage measuring unit 32 can transmit the detected voltages as analog values ​​or as digital values. The voltage measuring unit 32 can be configured in the load inverter control unit 6 or as a separate unit. Accordingly, the voltage measuring unit 32 can also be configured to detect the first alternating voltage g and transmit the measured values ​​k to the load inverter control unit 6.

[0046] In the load inverter control unit 6, the first PWM control signal d is then synchronized with the second PWM control signal e on the basis of the detected voltage values ​​k with the aim of synchronizing the first alternating voltage g with the second alternating voltage h, so that harmonic currents are reduced or even eliminated.

[0047] The first PWM control signal d is synchronized with the second PWM control signal e in particular by synchronizing a first carrier signal used in the modulator 10 (represented in block 10 as a triangular signal) with a second carrier signal reconstructed from the measured second voltage h.

[0048] With reference to Fig. 2, an embodiment for synchronizing two carrier signals is described below. Fig. 2 shows an exemplary structure of the controller 8, in which, as already mentioned, a synchronization algorithm for synchronizing the two carrier signals is implemented. The synchronization algorithm can, as will be described later, also be used to determine an offset between carrier signals that are phase-shifted due to latency, so that a general description is given below. The analog measured values ​​k received by the voltage measuring unit 32 are sampled at high frequency by an analog / digital (AZD) converter 38 and converted into digital measured values ​​p. In an edge detection unit 40, edges in the digital measured values ​​p are detected, e.g. using a threshold method, and correlated with a counter value q provided by a counter 42.Counter 42 counts at a clock rate that is several times higher than the clock frequency of the PWM control signals d and e. The counter values ​​r at the occurrence of edges are then output to an offset calculation unit 44, which determines an offset between the first carrier signal and the second carrier signal.

[0049] The offset calculation unit 44 then outputs a correction signal t to a trigger signal output unit 46, which outputs a trigger signal and a duty cycle b1 to the modulator 10 to start a PWM clock. When the trigger signal and the duty cycle b1 are output to the modulator 10, a reset signal s, which includes the correction signal t, is simultaneously output from the trigger signal output unit 46 to the edge detection unit 40, the counter 42, and the offset calculation unit 44, thus starting a new cycle for determining the offset.

[0050] The correction signal t can be easily determined from the previous offset, allowing for a simple determination. Alternatively, the correction signal t can also be determined from an average of several offsets from a certain number of previous PWM cycles. Alternatively, the correction signal t can also be a predetermined value that is used for an incremental correction until the offset is eliminated. By using the average or the incremental correction, a robust solution can be obtained while simultaneously avoiding system oscillation.

[0051] Fig. 3 shows a case in which the two reconstructed carrier signals are synchronous. In the upper diagram, a measured AC voltage is represented as rectangular pulses. The AC voltage can, for example, correspond to the measured values ​​k of the second AC voltage h. A triangular carrier signal reconstructed from the AC voltage is also shown. At the start of a PWM cycle, the carrier signal counts down from a counter value CountMax to a counter value CountMin in the middle of the PWM cycle and from there counts up again to the counter value CountMax at the end of the current PWM cycle or at the start of the new PWM cycle. For simplicity, CountMin can, for example, be set to a value of zero.

[0052] In the lower diagram in Fig. 3, the measured AC voltage is again shown as rectangular pulses. Furthermore, the count values ​​q output by counter 42 are shown as a sawtooth waveform. It can be seen that counter 42 counts up to twice the value of CountMax during one PWM cycle. When the maximum value is reached, counter 42 is reset.

[0053] As already mentioned, the edge detection unit 40 detects edges in the waveform of the second AC voltage h and links them to the current counter value q. When a rising edge occurs, the counter value Cupo is determined, whereas when a falling edge occurs, the counter value Cdowno is determined.

[0054] In order to calculate the offset between the reconstructed carrier signals, a center of the PWM pulse is defined as the reference time for one carrier signal and a start of a PWM clock is defined as the reference time for the other carrier signal.

[0055] A determined distance between the reference time for the second carrier signal, i.e., the center of the PWM pulse, and the reference time, i.e., the start of the next PWM clock, must correspond to a specified distance for the two carrier signals to be synchronized. If the determined distance deviates from the specified distance, the first carrier signal and the second carrier signal are not synchronized, and the difference corresponds to the offset. Because the maximum value of the counter is set to twice the value of CountMax, the specified distance in this case corresponds to CountMax. The distance CountMinDistance(O) between the two reference times can be determined in this case using the following formula (1):

[0056] If this value is equal to CountMax, as shown in Fig. 3, the first and second carrier signals are synchronous.

[0057] In the case where the other carrier signal lags the reconstructed carrier signal, as shown in Fig. 4, the determined value of CountMinDistance(O) is greater than CountMax. Consequently, the relationship given in equation (2) applies:

[0058] CountMinDistance(ß) — CountMax > 0 (2)

[0059] Using the values ​​of CountMinDistance(O) and CountMax, the value CountMaxDistance(O) can be calculated as the offset between the two carrier signals using the following equation (3):

[0060] Count axDistance(O) = CountMinDistance(0) — CountMax (3)

[0061] In the case that the other carrier signal leads the reconstructed carrier signal, as shown in Fig. 5, the determined value of CountMinDistance(O) is smaller than CountMax and the relationship given in equation (4) applies:

[0062] CountMinDistance(ß) — CountMax < 0 (4)

[0063] The offset between the two carrier signals can then be calculated using equation (3).

[0064] As already described, a correction signal t can be derived from the offset determined in this way between the two carrier signals. When the first carrier signal is synchronized with the carrier signal reconstructed from the measured second AC voltage h, the counter value for the first carrier signal is adjusted. Initially, the same counter value is used for the first carrier signal and the second carrier signal in the load inverter control unit 6 and the test inverter control unit 16. However, due to hardware differences in the load inverter control unit 6 and the test inverter control unit 16, the same counter values ​​result in different PWM clock periods. By adjusting the counter value in the load inverter control unit 6, the PWM clock period of the first carrier signal can be approximated to or equated with that of the second carrier signal.

[0065] As already generally described, the counter value for the first carrier signal can be easily corrected by the previously determined offset, thus enabling a simple correction. Alternatively, the counter value can also be corrected by an average of several offsets from a specific number of previous PWM cycles. Alternatively, the counter value can also be corrected step by step by an incremental value per PWM cycle.

[0066] The test system 1 described in the embodiment thus makes it possible to synchronize the first carrier signal and the second carrier signal, ie, the first PWM drive signal d with the second PWM drive signal e, without requiring any adjustments to the hardware or software of the test inverter device 12. The test inverter device 12 can therefore be tested as it is actually used.

[0067] The embodiment described above already ensures an appropriate reduction of harmonic currents through the inductive load 22. Due to an overall latency in the load inverter device 2, an offset or phase shift still exists when the first carrier signal is synchronized with the second AC voltage h or the carrier signal reconstructed from the second AC voltage. This situation, which occurs in both inverter devices 2 and 12, will be described below with reference to Fig. 6. Fig. 6 shows the curve of the PWM control signal d or e, with which the inverter unit 4 or 14 is controlled. It can also be seen that a delay occurs between the application of the PWM control signal d or e and the output of the AC voltage g or h, which delay is referred to as control latency. In addition, a delay occurs between the output of the AC voltage g orh and acquiring the measured values ​​k of the AC voltage g or h, there is a delay due to a measurement latency and an A / D converter latency. This delay is referred to as the acquisition latency. Accordingly, a total latency 48, which is the sum of the control latency and the acquisition latency, exists between a real carrier signal 50, which is actually used to determine the PWM control signal d or e, and an ideal carrier signal 52, which is reconstructed from the measured values ​​k of the AC voltage g or h.

[0068] This total latency is therefore also present between the first carrier signal and the second carrier signal when synchronizing the first carrier signal with the carrier signal reconstructed from the measured values ​​k of the second AC voltage h. To further reduce or even eliminate harmonic currents through the inductive load 22, the total latency can be compensated using the following procedures.

[0069] In one embodiment, the load inverter control unit 6 can be designed to detect a current through the inductive load 22. This can be done, for example, using current sensors that are already present in the load inverter unit 4. Alternatively, additional current sensors can also be installed. The load inverter control unit 6 can then be designed to determine a ripple current from the detected current, e.g., using Fourier analysis. Furthermore, the load inverter control unit 6 can be designed to shift the first carrier signal, in particular shift it forward in time, such that the ripple current is minimized or eliminated. For this purpose, the first carrier signal can be shifted, for example, over several PWM cycles from 0° to 360° in order to find a global minimum of the ripple current. The phase shift at the global minimum can then be taken into account as a constant offset.In a further embodiment, the total latency in the load inverter device 2 can also be determined beforehand by measurement or calculation. This previously determined total latency can then be considered as a constant offset between the first carrier signal and the second carrier signal.

[0070] Fig. 7 shows a further embodiment of the test system 1, which essentially corresponds to the test system 1 of Fig. 1. In addition to the test system 1 of Fig. 1, the voltage measuring unit 32 is designed to additionally detect the first alternating voltage g. It should be noted that the load inverter control unit 6 shown in Fig. 2 is designed in the further embodiment to receive and process the measured values ​​k of the first alternating voltage g.

[0071] The load inverter control unit 6 is configured to first synchronize the first carrier signal with the second carrier signal reconstructed from the second AC voltage h. As explained, an offset then exists between the two carrier signals due to the overall latency in the load inverter device 6.

[0072] The load inverter control unit 6 can then be designed such that it reconstructs a reconstructed first carrier signal from the first alternating voltage g. The first carrier signal synchronized with the second alternating voltage h or the reconstructed second carrier signal can then be shifted, in particular shifted forward in time, according to an offset to the reconstructed first carrier signal. The procedure described above can be used to determine the offset between these two first carrier signals, so that a repeated description is omitted. In contrast to the method described above, however, the maximum counter value for the first carrier signal is retained and only an early triggering of the PWM clock and thus an early resetting of the counter 42 takes place in order to perform a phase correction.As already generally described, the offset can be easily corrected by the previously determined offset, allowing for a simple correction. Alternatively, the offset can also be corrected by an average of several offsets from a specific number of previous PWM cycles. Alternatively, the offset can also be corrected step by step by an incremental value per PWM cycle.

[0073] By taking into account the total deferred tax assets and

[0074] Acquisition latency, a further reduction or elimination of harmonic currents through the inductive load 22 can be achieved.

[0075] List of reference symbols

[0076] 1 test system

[0077] 2 load inverter device

[0078] 4 Load inverter unit

[0079] 6 Load inverter control unit

[0080] 8 Regulation

[0081] 10 Modulator

[0082] 12 Test inverter device 14 Test inverter unit 16 Test inverter control unit 18 Control 20 Modulator

[0083] 22 inductive load 24 user interface 26 DC power supply 28 rectifier 30 mains

[0084] 32 Voltage measurement unit 38 Analog / Digital (AZD) converter 40 Edge detection unit 42 Counter 44 Offset calculation unit

[0085] 46 Trigger signal output unit 48 Total latency 50 Real carrier signal 52 Ideal carrier signal a1 First setpoint a2 Actual value b1 Trigger signal and duty cycle b2 Control parameter c Trigger signal and duty cycle d First PWM control signal e Second PWM control signal f Second setpoint g First AC voltage h Second AC voltage k Analog measured value m DC voltage n Three-phase mains voltage p Digital measured value q Counter value r Counter value at voltage edges s Reset signal t Correction signal

Claims

Claims 1. Test system (1) comprising: a load inverter device (2) comprising a load inverter unit (4) configured to convert DC voltage (m) into a first AC voltage (g), preferably bidirectionally, and a load inverter control unit (8) configured to control the load inverter unit (4) using a first pulse width modulation (PWM) control signal (d) determined on the basis of a first setpoint value (a1); a test inverter device (12) comprising a test inverter unit (14) configured to convert DC voltage (m) into a second AC voltage (h), preferably bidirectionally, and a test inverter control unit (16) configured to control the test inverter unit (14) using a second PWM control signal (e) determined on the basis of a second setpoint value (f); and inductive load (22) connected to the load inverter unit (4) at a first terminal,to receive the first alternating voltage (g), and is connected at a second terminal to the test inverter unit (14) to receive the second alternating voltage (h), characterized in that the test system (1) has a voltage measuring unit (32) which is designed to measure the second alternating voltage (h), and the load inverter control unit (6) is designed to synchronize the first PWM drive signal (d) with the second PWM drive signal (e) using the measured second alternating voltage (h).

2. Test system (1) according to claim 1, characterized in that the load inverter control unit (6) is designed to synchronize a first carrier signal, which is used to determine the first PWM control signal (d), with the measured second AC voltage (h) or a second carrier signal reconstructed from the measured second AC voltage.

3. Test system (1) according to claim 2, characterized in that the load inverter control unit (6) is designed to adapt a counter value used for the first carrier signal in order to synchronize the first carrier signal with the measured second AC voltage (h) or the reconstructed second carrier signal.

4. Test system (1) according to claim 3, characterized in that the load inverter control unit (6) is designed to adapt the counter value according to a distance between a reference time point relating to the first carrier signal and a reference time point relating to the measured second AC voltage (h) or the reconstructed second carrier signal.

5. Test system (1) according to claim 4, characterized in that the load inverter control unit (6) is designed to determine the distance between the reference times using a counter (42) which is reset in particular when an integer multiple, preferably twice the value, of the adjusted counter value is reached.

6. Test system (1) according to one of claims 2 to 5, characterized in that the load inverter control unit (6) is designed to detect a current through the inductive load (22), in particular by means of a current sensor present in the load inverter unit (4), to determine a ripple current in the detected current and to shift the first carrier signal such that the ripple current is minimized or eliminated.

7. Test system (1) according to one of claims 2 to 5, characterized in that the load inverter control unit (6) is designed to shift the first carrier signal by a fixed offset, which is previously determined by calculation or measurement and stored in the load inverter control unit (6).

8. Test system (1) according to one of claims 2 to 5, characterized in that the voltage measuring unit (32) is designed to measure the first alternating voltage (g), and the load inverter control unit (6) is designed to reconstruct a reconstructed first carrier signal from the measured first alternating voltage (g) and to shift the first carrier signal synchronized with the measured second alternating voltage (h) or the reconstructed second carrier signal according to an offset to the reconstructed first carrier signal.

9. Test system (1) according to claim 8, characterized in that the load inverter control unit (6) is designed to determine the offset according to a distance between a reference time point relating to the reconstructed first carrier signal and a reference time point relating to the first carrier signal synchronized with the second AC voltage (h) or the reconstructed second carrier signal.

10. Test system (1) according to claim 9, characterized in that the load inverter control unit (6) is designed to determine the distance between the reference times using the counter (42).

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