Continuous time delta sigma analog-digital conversion device capable of simultaneously measuring voltage and current

Abstract

Disclosed is an analog-digital converter capable of simultaneously obtaining a voltage and a current. The disclosed analog-digital converter can simultaneously obtain a voltage and a current by using a hybrid integrator for simultaneously receiving and integrating the voltage and the current and a quantizer for generating a differential mode output and a common mode output through comparison with a reference voltage. By using the analog-digital converter according to an exemplary embodiment, the size of a system can be maintained small while consuming less power, and thus a biometric response can be easily identified and analyzed.

Description

Continuous-time delta-sigma analog-to-digital converter capable of measuring voltage and current simultaneously

[0001] The following examples relate to an analog-to-digital conversion device, and more particularly, to a continuous-time delta-sigma analog-to-digital conversion device capable of simultaneously measuring voltage and current.

[0002] Many bodily responses, such as the human heartbeat and arm / leg movements, utilize electrical signals. Therefore, measuring electrical signals within the body can help determine whether the heartbeat is normal, whether brain activity is normal, and so on.

[0003] However, many medical devices / diagnostic devices acquire only voltage or current from electrical signals and analyze only voltage or current to identify diseases or biological reactions, which limits their ability to analyze human activity in three dimensions.

[0004] To overcome this, medical and diagnostic devices are being developed that utilize multiple analog-to-digital converters to acquire both voltage and current. However, systems utilizing multiple analog-to-digital converters suffer from limitations in terms of power consumption and size, leading to a growing demand for systems that acquire both voltage and current using a single analog-to-digital converter.

[0005] The technical task of the present invention is to obtain voltage and current simultaneously using one analog-to-digital converter through embodiments.

[0006] According to an exemplary embodiment, an analog-to-digital conversion device is disclosed, including a hybrid integrator that receives an input voltage through a first integrator input port and a second integrator input port, receives an input current through a third integrator input port, and integrates the input voltage and the input current to generate an output voltage, and a quantizer that receives the output voltage through a first quantizer input port and a second quantizer input port, receives a reference voltage through a third quantizer input port, and generates a differential mode output and a common mode output of the output voltage using the reference voltage, wherein the differential mode output is fed back to the first integrator input port and the second integrator input port, and the common mode output is fed back to the third integrator input port.

[0007] Here, the hybrid integrator can generate an internal current corresponding to the input voltage, integrate the sum of the input current and the internal current to produce a first voltage, integrate the difference between the input current and the internal current to produce a second voltage, and generate the difference between the first voltage and the second voltage as the output voltage.

[0008] Here, the internal current may be generated by applying the input voltage to a resistance inside the hybrid integrator.

[0009] And, the first integrator input port is connected to the non-inverting input terminal of the first OP amplifier, the second integrator input port is connected to the non-inverting input terminal of the second OP amplifier, and the inverting input terminal of the first OP amplifier, the inverting input terminal of the second OP amplifier, and the resistance inside the hybrid integrator can be located.

[0010] Additionally, the resistance inside the hybrid integrator is configured by connecting two intermediate resistors in series, and the third integrator input port can be connected between the two intermediate resistors.

[0011] Here, the quantizer includes a first voltage-controlled oscillator (VCO) connected to the first quantizer input port, a second voltage-controlled oscillator connected to the second quantizer input port, and a third voltage-controlled oscillator connected to the third quantizer input port, and includes a frequency-phase converter that converts the frequency of each voltage-controlled oscillator into a phase, and can generate the differential mode output and the common mode output by comparing the phases corresponding to each port with each other.

[0012] And, the differential mode output can be generated according to the difference between the phase corresponding to the first quantizer input port and the phase corresponding to the second quantizer input port.

[0013] Additionally, the common mode output can be generated according to the difference between the phase corresponding to the first quantizer input port and the phase corresponding to the second quantizer input port and the phase corresponding to the third quantizer input port.

[0014] Here, the common mode output may be generated by selecting a smaller value among the difference between the phase corresponding to the first quantizer input port and the phase corresponding to the third quantizer input port and the difference between the phase corresponding to the second quantizer input port and the phase corresponding to the third quantizer input port, and adding the selected value to a value obtained by dividing the difference between the phase corresponding to the first quantizer input port and the phase corresponding to the second quantizer input port by 2.

[0015] The present invention can simultaneously obtain voltage and current using one analog-to-digital converter.

[0016] FIG. 1 is a diagram illustrating the concept of an analog-to-digital converter according to an exemplary embodiment.

[0017] FIG. 2 is a diagram illustrating the overall structure of an analog-to-digital converter according to an exemplary embodiment.

[0018] FIG. 3 is a diagram illustrating the structure of a hybrid integrator according to an exemplary embodiment.

[0019] FIG. 4 is a diagram illustrating the operation of a hybrid integrator with respect to an input voltage according to an exemplary embodiment.

[0020] FIG. 5 is a diagram illustrating the operation of a hybrid integrator with respect to input current according to an exemplary embodiment.

[0021] Fig. 6 is a block diagram illustrating the structure of a quantizer according to an exemplary embodiment.

[0022] Fig. 7 is a drawing explaining the operation of a quantizer according to an exemplary real example.

[0023] Figure 8 is a diagram illustrating a concept of generating differential mode output and common mode output by comparing phases.

[0024] Structural or functional descriptions are merely illustrative for the purpose of explaining embodiments according to the concept of the present invention, and embodiments according to the concept of the present invention may be implemented in various forms and are not limited to the embodiments described herein.

[0025] Embodiments according to the concept of the present invention may have various modifications and take various forms, and thus, embodiments are illustrated in the drawings and described in detail in this specification. However, this is not intended to limit embodiments according to the concept of the present invention to specific disclosed forms, but rather includes modifications, equivalents, or alternatives that fall within the spirit and technical scope of the present invention.

[0026] While terms such as "first" or "second" may be used to describe various components, these components should not be limited by these terms. These terms are intended solely to distinguish one component from another. For example, a first component may be referred to as a "second component," and similarly, a second component may also be referred to as a "first component," without departing from the scope of the invention.

[0027] When a component is referred to as being "connected" or "connected" to another component, it should be understood that it may be directly connected or connected to that other component, but that there may be other components in between. Conversely, when a component is referred to as being "directly connected" or "directly connected" to another component, it should be understood that there are no other components in between. Expressions that describe relationships between components, such as "between," "immediately between," or "directly adjacent to," should be interpreted similarly.

[0028] The terminology used herein is for the purpose of describing specific embodiments only and is not intended to limit the present invention. The singular expressions include plural expressions unless the context clearly indicates otherwise. In this specification, it should be understood that the terms "comprises" or "has" are intended to specify the presence of a described feature, number, step, operation, component, part, or combination thereof, but do not preclude the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof.

[0029] Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and will not be interpreted in an idealized or overly formal sense unless explicitly defined herein.

[0030]

[0031] Hereinafter, embodiments will be described in detail with reference to the attached drawings. However, the scope of the patent application is not limited or restricted by these embodiments. The same reference numerals provided in each drawing represent the same components.

[0032]

[0033] FIG. 1 is a diagram illustrating the concept of an analog-to-digital converter according to an exemplary embodiment.

[0034] An analog-to-digital converter according to an exemplary embodiment can simultaneously receive voltage (111) and current (112) and convert them into analog-to-digital signals respectively. Therefore, since both voltage and current can be converted using only one analog-to-digital converter, power consumption can be reduced and the size of the system can also be reduced.

[0035] The hybrid integrator (120) receives an input voltage (111) and an input current (112). The hybrid integrator (120) converts the input voltage (111) into an internal current using an internal resistance, integrates the sum and difference of the input current (112) and the internal current, converts it into a voltage, and then outputs it to two output ports.

[0036] The quantizer (130) receives a voltage signal from the hybrid integrator (120) through two input ports. Additionally, the quantizer (130) receives a reference voltage through a separate input port.

[0037] The quantizer (130) can generate a differential mode output (131) and a common mode output (132) using a voltage signal and a reference signal.

[0038] According to one side, the output of the quantizer (130) can be fed back to the input of the hybrid integrator (120). The differential mode output (131) is fed back as the input voltage (111) through the digital-to-analog converter (151), and the common mode output (132) is fed back as the input current (112).

[0039]

[0040] FIG. 2 is a diagram illustrating the overall structure of an analog-to-digital converter according to an exemplary embodiment.

[0041] An analog-to-digital converter according to an exemplary embodiment includes a hybrid integrator (220), a first integrator input port (211), a second integrator input port (212), a third integrator input port (215), a quantizer (230), a tri-level decoder (244, 254, 255), a digital-to-analog converter (245, 246, 256, 257), a DWA (252), and a TNS-BS Filter (253).

[0042] The hybrid integrator (220) receives an input voltage through a first integrator input port (211) and a second integrator input port (212), and receives an input current through a third integrator input port. The hybrid integrator (220) generates an internal current corresponding to the input voltage, and generates an output voltage corresponding to the sum of the input current and the internal current and the difference between the input current and the internal current.

[0043] The operation of the hybrid integrator is specifically described with reference to FIGS. 3 to 5 below.

[0044]

[0045] FIG. 3 is a diagram illustrating the structure of a hybrid integrator according to an exemplary embodiment.

[0046] A hybrid integrator according to an exemplary embodiment includes a plurality of transistors (333, 334, 343, 344, 351, 352, 363, 364) and an operational amplifier (310, 320).

[0047] A plurality of transistors (333, 334, 343, 344, 351, 352, 363, 364) and an OP amplifier (310, 320) are driven by a driving voltage (331, 332, 341). A first integrator input port (211) is connected to a non-inverting input terminal of the first OP amplifier (310), and a second integrator input port (212) is connected to a non-inverting input terminal of the second OP amplifier (320). In addition, a third integrator input port (215) can be input between two intermediate resistors (361, 362) connected in series between the inverting input terminals of the OP amplifiers (310, 320).

[0048]

[0049] FIG. 4 is a diagram illustrating the operation of a hybrid integrator with respect to an input voltage according to an exemplary embodiment.

[0050] The transistors (433, 434, 435, 436, 441, 442) inside the hybrid integrator are operated by the driving voltage (431, 432) and the bias voltage (435). In addition, the current flowing in the hybrid integrator is integrated to generate a voltage corresponding to each current. Voutp(451) and Voutn(452) are output.

[0051] An input voltage Vinp (410) is applied to the first integrator input port (211), and the non-inverting input terminal of the first operational amplifier connected to the first integrator input port (211) is also applied with the input voltage Vinp (410). Therefore, depending on the characteristics of the operational amplifier, the input voltage Vinp is also applied to the inverting input terminal.

[0052] An input voltage Vinn is applied to the second integrator input port (212), and the input voltage Vinn is also applied to the non-inverting input terminal of the second OP amplifier connected to the second integrator input port (212). Accordingly, the input voltage Vinn is also applied to the inverting input terminal according to the characteristics of the OP amplifier.

[0053] Since the potential difference between the two intermediate resistors Rs is Vinp-Vinn, an internal current flows through the intermediate resistor Rs due to the input voltages Vinp and Vinn. The internal current Idm can be expressed as in the following mathematical equation 1.

[0054]

[0055] [Mathematical Formula 1]

[0056]

[0057]

[0058]

[0059] FIG. 5 is a diagram illustrating the operation of a hybrid integrator with respect to input current according to an exemplary embodiment.

[0060] Transistors (533, 534, 535, 536, 541, 542) inside the hybrid integrator are operated by the driving voltage (531, 532) and the bias voltage (535). In addition, the current flowing in the hybrid integrator is integrated, and voltages Voutp (551) and Voutn (552) corresponding to each current are output.

[0061] The third integrator input port (215) is connected between two intermediate resistors Rs. The intermediate resistors Rs are connected in series to the inverting input terminals of the OP amplifiers (510, 520), but are connected in parallel with each other when viewed from the third integrator input port (215). Therefore, the input current Iin input through the third integrator input port (215) is divided using the two intermediate resistors Rs.

[0062] If the divided current is Icm, the current flowing toward the transistor (535) can be called Icm-Idm, and the current flowing toward the transistor (536) can be called Icm+Idm.

[0063] At the output terminal of the hybrid integrator, the currents Icm+Idm and Icm-Idm are integrated to output the first voltage Voutp (551) and the second voltage Voutn (552) corresponding to each current. Here, the first voltage Voutp (551) is a voltage corresponding to the sum of the input current and the internal current, and may be referred to as a common mode output voltage, and the second voltage Voutn (552) is an output voltage corresponding to the difference between the input current and the internal current, and may be referred to as a differential mode output voltage. The output voltage of the hybrid integrator may be the difference between the first voltage Voutp (551) and the second voltage Voutn (552).

[0064]

[0065] The quantizer (230) receives the output voltage of the hybrid integrator through the first quantizer input port and the second quantizer input port, and receives the reference voltage through the third quantizer input port. The quantizer (230) generates and outputs differential mode output and common mode output of the output voltage using the reference voltage.

[0066] The operation of the quantizer will be described in detail with reference to FIGS. 6 to 8 below.

[0067]

[0068] Fig. 6 is a block diagram illustrating the structure of a quantizer according to an exemplary embodiment.

[0069] The input voltage Vin (610) input to the quantizer according to the exemplary embodiment is an output voltage of the hybrid integrator, and is a voltage corresponding to the sum of the input current and the internal current of the hybrid integrator, or corresponding to the difference between the input current and the internal current.

[0070] A voltage controlled oscillator (620, VCO) produces an output having a frequency proportional to the input voltage Vin (610).

[0071] A frequency-to-phase converter (630) converts an input frequency into a phase and produces an output with a phase proportional to the frequency.

[0072] The sampler (640) and the adder (650) were used to mathematically model that the phase output is converted into a digital signal synchronized to the sampling clock. First, the sampler is applied to the sampling clock (f) applied to the quantizer (230). S = 1 / T S ) is used to extract the phase output synchronized to the adder. Afterwards, the quantization noise (Q) in the adder N ) is added to indicate that the extracted phase output is converted into a digital signal.

[0073] The differential / common mode separator (660) compares the phases corresponding to each input port with each other and generates the input voltage Vin (610) by decomposing it into a common mode output and a differential mode output.

[0074]

[0075] Fig. 7 is a drawing explaining the operation of a quantizer according to an exemplary real example.

[0076] The quantizer receives the output voltages (711, 713) of the hybrid integrator through the first quantizer input port and the second quantizer input port. The quantizer receives the reference voltage (712) through the third quantizer input port.

[0077] The quantizer includes three voltage-controlled oscillators (721, 722, 723) corresponding to their respective input ports. Vin+ (711), which corresponds to the sum of the input current and the internal current of the hybrid integrator, is input to the first quantizer input port, and Vin- (713), which corresponds to the difference between the input current and the internal current of the hybrid integrator, is input to the second quantizer input port. A reference voltage Vbias (712) is received to the third quantizer input port.

[0078] Each voltage controlled oscillator (721, 722, 723) produces an output having a frequency proportional to the input voltage.

[0079] DFF (731, 732, 733) samples the output signal of the VCO and converts it into the digital domain. In this case, the voltage value is converted into phase information (741, 742, 743) of DFF (731, 732, 733).

[0080] PEQ (751, 752, 753, Phase-Extended Quantizer) compares phase information with each other and quantizes the difference into sign and magnitude bits.

[0081] T-PDC Logic (760) generates differential mode output and common mode output using the quantized results in sign and magnitude.

[0082] The specific operation of the T-PDC Logic (760) below is described with reference to FIG. 8.

[0083]

[0084] Figure 8 is a diagram illustrating a concept of generating differential mode output and common mode output by comparing phases.

[0085] In Fig. 8, phase Phi+ is a phase corresponding to Vin+ (711) input to the first quantizer input port, phase Phi- is a phase corresponding to Vin- (713) input to the second quantizer input port, and phase Phi_ref is a phase corresponding to the reference voltage Vbias (712) input to the third quantizer input port.

[0086] The differential mode output of the quantizer can be simply calculated using the phases Phi+ and Phi-. The differential mode output can be generated according to the difference between the phase corresponding to the first quantizer input port and the phase corresponding to the second quantizer input port. Therefore, the differential mode output can be generated as Phi+ - Phi-.

[0087] In contrast, the common mode output of a quantizer can be produced through a relatively complex process.

[0088] In the first step, the phase Phi_ref corresponding to the reference voltage Vbias (712) can be used to calculate the common mode output of the quantizer. In this case, Phic, which is an intermediate value between the phase Phi+ corresponding to the first quantizer input port and the phase Phi- corresponding to the second quantizer input port, can be calculated. According to one side, Phic can be calculated by adding the phase Phi+ corresponding to the first quantizer input port and the phase Phi- corresponding to the second quantizer input port and then dividing by 2.

[0089] In the second step, the difference between Phic and the phase Phi+ corresponding to the first quantizer input port can be calculated, or the difference between Phic and the phase Phi- corresponding to the second quantizer input port can be calculated. Since the phase Phic is an intermediate value between the phase Phi+ and the phase Phi-, the value is the same regardless of which value is selected.

[0090] In the third step, the difference (Phi+ - Phi_ref) between the phase Phi_ref corresponding to the reference voltage Vbias (712) and the phase Phi+ corresponding to the first quantizer input port is calculated, and the difference (Phi- - Phi_ref) between the phase Phi_ref corresponding to the reference voltage Vbias (712) and the phase Phi- corresponding to the first quantizer input port is calculated, and then the smaller value among them can be selected.

[0091] In the fourth step, the common mode output can be produced by adding the value produced in the second step and the value produced in the third step.

[0092]

[0093] In Fig. 8, the magnitude and sign of the differential mode output can be quantized as MAGdm / SIGNdm, and the magnitude and sign of the common mode output can be quantized as MAGcm / SIGNcm.

[0094]

[0095] The differential mode output can be fed back to the first integrator input port and the second integrator input port, and the common mode output can be fed back to the second integrator input port.

[0096]

[0097] The devices described above may be implemented as hardware components, software components, and / or a combination of hardware components and software components. For example, the devices and components described in the embodiments may be implemented using one or more general-purpose computers or special-purpose computers, such as, for example, a processor, a controller, an arithmetic logic unit (ALU), a digital signal processor, a microcomputer, a field programmable array (FPA), a programmable logic unit (PLU), a microprocessor, or any other device capable of executing instructions and responding to them. The processing device may execute an operating system (OS) and one or more software applications running on the operating system. The processing device may also access, store, manipulate, process, and generate data in response to the execution of the software. For ease of understanding, the processing device is sometimes described as being used alone; however, one of ordinary skill in the art will recognize that the processing device may include multiple processing elements and / or multiple types of processing elements. For example, a processing unit may include multiple processors, or a processor and a controller. Other processing configurations, such as parallel processors, are also possible.

[0098] Software may include a computer program, code, instructions, or a combination of one or more of these, which may configure a processing device to perform a desired operation or may, independently or collectively, command the processing device. The software and / or data may be permanently or temporarily embodied in any type of machine, component, physical device, virtual equipment, computer storage medium or device, or transmitted signal wave, for interpretation by the processing device or for providing instructions or data to the processing device. The software may also be distributed over networked computer systems and stored or executed in a distributed manner. The software and data may be stored on one or more computer-readable recording media.

[0099] The method according to the embodiment may be implemented in the form of program commands that can be executed through various computer means and recorded on a computer-readable medium. The computer-readable medium may include program commands, data files, data structures, etc., alone or in combination. The program commands recorded on the medium may be those specially designed and configured for the embodiment or may be those known and available to those skilled in the art of computer software. Examples of the computer-readable recording medium include magnetic media such as hard disks, floppy disks, and magnetic tapes, optical media such as CD-ROMs and DVDs, magneto-optical media such as floptical disks, and hardware devices specially configured to store and execute program commands, such as ROMs, RAMs, and flash memories. Examples of the program commands include not only machine language codes generated by a compiler, but also high-level language codes that can be executed by a computer using an interpreter, etc. The hardware devices described above may be configured to operate as one or more software modules to perform the operations of the embodiment, and vice versa.

[0100] Although the embodiments described above have been described with limited drawings, those skilled in the art will recognize that various modifications and variations can be made based on the above description. For example, appropriate results can still be achieved even if the described techniques are performed in a different order than described, and / or components of the described systems, structures, devices, circuits, etc. are combined or combined in a different manner than described, or are replaced or substituted with other components or equivalents.

[0101] Therefore, other implementations, other embodiments, and equivalents to the claims also fall within the scope of the claims described below.

Claims

1. A hybrid integrator that receives an input voltage through a first integrator input port and a second integrator input port, receives an input current through a third integrator input port, and integrates the input voltage and input current to generate an output voltage; and A quantizer that receives the output voltage through a first quantizer input port and a second quantizer input port, receives a reference voltage through a third quantizer input port, and generates a differential mode output and a common mode output of the output voltage using the reference voltage. Including, The above differential mode output is fed back to the first integrator input port and the second integrator input port, An analog-to-digital conversion device in which the common mode output is fed back to the third integrator input port.

2. In the first paragraph, the hybrid integrator Generate an internal current corresponding to the above input voltage, The first voltage is calculated by integrating the sum of the input current and the internal current, The second voltage is calculated by integrating the difference between the input current and the internal current, An analog-to-digital conversion device that generates the difference between the first voltage and the second voltage as the output voltage.

3. In paragraph 2, An analog-to-digital conversion device in which the internal current is generated when the input voltage is applied to a resistance inside the hybrid integrator.

4. In paragraph 3, The first integrator input port is connected to the non-inverting input terminal of the first OP amplifier, and the second integrator input port is connected to the non-inverting input terminal of the second OP amplifier. An analog-to-digital conversion device in which the inverting input terminal of the first OP amplifier and the inverting input terminal of the second OP amplifier are located at a resistance inside the hybrid integrator.

5. In paragraph 4, The resistance inside the above hybrid integrator is composed of two intermediate resistors connected in series, The third integrator input port is an analog-to-digital conversion device connected between the two intermediate resistors.

6. In the first paragraph, the quantizer, A first voltage controlled oscillator (VCO) connected to the first quantizer input port, a second voltage controlled oscillator connected to the second quantizer input port, and a third voltage controlled oscillator connected to the third quantizer input port, Includes a frequency-phase converter that converts the frequency of each of the above voltage-controlled oscillators into a phase, An analog-to-digital conversion device that compares the phases corresponding to each of the above ports to generate the differential mode output and common mode output.

7. In paragraph 5, An analog-to-digital conversion device in which the differential mode output is generated according to the difference between the phase corresponding to the first quantizer input port and the phase corresponding to the second quantizer input port.

8. In paragraph 6, An analog-to-digital conversion device in which the common mode output is generated according to the difference between the phase corresponding to the first quantizer input port and the phase corresponding to the second quantizer input port and the phase corresponding to the third quantizer input port.

9. In the 6th paragraph, the common mode output is Select a smaller value among the difference between the phase corresponding to the first quantizer input port and the phase corresponding to the third quantizer input port and the difference between the phase corresponding to the second quantizer input port and the phase corresponding to the third quantizer input port, An analog-to-digital conversion device generated by adding the value obtained by dividing the difference between the phase corresponding to the first quantizer input port and the phase corresponding to the second quantizer input port by 2.

Images