Member for semiconductor manufacturing apparatus

Abstract

Provided is a member for a semiconductor manufacturing apparatus, said member including a plurality of heater electrodes, wherein the number of jumper electrode layers is reduced. This member for a semiconductor manufacturing apparatus comprises a ceramic substrate having: an upper surface where a wafer can be placed; terminal dense portions where ten or more terminals are arranged in a single section; a plurality of zoned heater electrodes; and a plurality of jumper electrode layers. Each jumper electrode layer is composed of a plurality of planar jumper electrodes electrically isolated by means of an insulator. In at least one terminal dense portion, at least 70% of all the terminals arranged in the terminal dense portion are electrically connected to a predetermined planar jumper electrode via a first via extending in the vertical direction, while satisfying the condition that the terminals in question are not electrically connected to a planar jumper electrode positioned above any planar jumper electrode to which another terminal further from the outer periphery of the terminal dense portion is electrically connected.

Description

Semiconductor manufacturing equipment components

[0001] The present invention relates to a member for a semiconductor manufacturing device.

[0002] Conventionally, semiconductor manufacturing equipment components have been known that are used for wafer holding, temperature control, transport, etc. These types of semiconductor manufacturing equipment components are also called wafer mounting tables, electrostatic chucks, susceptors, etc., and generally have the function of applying electrostatic attraction power to a built-in electrode to attract a wafer by electrostatic force.

[0003] Wafer processing is diverse, including etching and CVD, and the optimal wafer temperature distribution varies depending on the type of processing. For this reason, semiconductor manufacturing equipment components are required to be able to control the wafer temperature distribution. To meet this requirement, semiconductor manufacturing equipment components equipped with multi-zone heaters, which have a ceramic substrate with multiple built-in heater electrodes, are known.

[0004] Japanese Patent Application Laid-Open Publication No. 2021-015933 describes a ceramic plate-shaped member that includes a heater electrode layer having multiple heater electrodes formed from a conductive material, a driver electrode layer having multiple driver electrodes for supplying power to the heater electrode layer, and various vias. The publication also describes that multiple power supply pads are arranged in a positioning recess on the underside of the plate-shaped member in a direction substantially perpendicular to the vertical direction, and that each power supply pad is electrically connected to a driver electrode on the driver electrode layer via a via. Drawings in the publication show multiple driver electrodes arranged at different heights.

[0005] Japanese Patent Application Laid-Open No. 2021-015933

[0006] In semiconductor manufacturing equipment components with such multi-zone heaters, improved wafer temperature distribution control is required to accommodate more precise wafer processing. To improve wafer temperature distribution control, it is necessary to increase the number of heater electrodes, thereby increasing the number of zones. However, as the number of heater electrodes increases, the number of driver electrodes (hereinafter referred to as "jumper electrodes" in this specification) for supplying power to the heater electrodes also increases. Increasing the number of jumper electrodes requires the jumper electrodes to be multi-layered, and the number of layers also increases, which increases the number of manufacturing steps for the ceramic substrate and tends to increase the manufacturing cost of the semiconductor manufacturing equipment component.

[0007] In view of the above circumstances, an object of one embodiment of the present invention is to reduce the number of jumper electrode layers in a semiconductor manufacturing equipment component having a plurality of zoned heater electrodes.

[0008] The present inventors have conducted extensive research to solve the above problems and have created the present invention as exemplified below. a plurality of jumper electrode layers electrically connecting the plurality of heater electrodes to each terminal of the dense terminal portion and stacked vertically via an insulator, wherein each jumper electrode layer is composed of a plurality of planar jumper electrodes electrically separated by an insulator, and in at least one of the dense terminal portion, 70% or more of all the terminals arranged in the dense terminal portion are electrically connected to a predetermined planar jumper electrode via a first via extending vertically, while satisfying the condition that the terminals are not electrically connected to a planar jumper electrode located above any planar jumper electrode to which another terminal electrically connected that is farther away from the outer periphery of the dense terminal portion is electrically connected, and each of the plurality of planar jumper electrodes is electrically connected to a first connection portion of a predetermined heater electrode selected from the plurality of heater electrodes via a second via extending vertically. [Aspect 2] In at least one of the densely packed terminal portions, at least one terminal T1 is electrically connected to a planar jumper electrode that is located in a layer above a planar jumper electrode to which at least one other terminal T2, which is farther away from the outer periphery of the densely packed terminal portion than at least one terminal T1, is electrically connected, and where the distance between the at least one terminal T1 and the outer periphery is M1 (mm) and the distance between the at least one other terminal T2 and the outer periphery is M2 (mm), the following equation 1: M1 < M2 ≦ M1 + 2 holds for all terminals T1.[Aspect 3] The semiconductor manufacturing equipment member according to Aspect 1, wherein in at least one of the densely-packed terminal portions, all of the terminals arranged in the densely-packed terminal portion are electrically connected to a predetermined planar jumper electrode through a first via extending in the vertical direction, while satisfying the condition that all of the terminals arranged in the densely-packed terminal portion are not electrically connected to any planar jumper electrode located in a layer above any of the planar jumper electrodes to which other terminals that are farther away from the outer periphery of the densely-packed terminal portion are electrically connected. [Aspect 4] The semiconductor manufacturing equipment member according to any of Aspects 1 to 3, wherein at least one jumper electrode layer of the plurality of jumper electrode layers electrically connected to 10 or more terminals that make up the densely-packed terminal portion in each single compartment is composed of 8 to 12 planar jumper electrodes. [Aspect 5] A component for semiconductor manufacturing equipment according to any one of Aspects 1 to 4, wherein the number of planar jumper electrodes constituting an Nth jumper electrode layer from the bottom (N is a natural number from 1 to A) that is electrically connected to 10 or more terminals that constitute the densely packed terminal portion in each single section is A, and the number of planar jumper electrodes constituting an Nth jumper electrode layer from the bottom (N is a natural number from 1 to A) is the same as or less than the number of planar jumper electrodes constituting an N-1th jumper electrode layer from the bottom, and the number of planar jumper electrodes constituting the topmost jumper electrode layer is less than the number of planar jumper electrodes constituting the bottommost jumper electrode layer. [Aspect 6] A component for semiconductor manufacturing equipment according to any one of Aspects 1 to 5, wherein the planar jumper electrodes constituting at least one jumper electrode layer among the plurality of jumper electrode layers that are electrically connected to 10 or more terminals that constitute the densely packed terminal portion in each single section each have a planar shape whose components are two line segments that are adjacent to each other at the same angle with the position of the first via as an apex. [Aspect 7] The semiconductor manufacturing equipment member according to any one of Aspects 1 to 6, wherein the plurality of heater electrodes each have a second connection portion, and the second connection portion is connected to a common terminal for grounding via a common jumper. [Aspect 8] The semiconductor manufacturing equipment member according to Aspect 7, wherein the common jumper is electrically connected to the common terminal via a third via extending in a vertical direction, and the diameter of the third via is larger than the diameter of the first via.[Aspect 9] A semiconductor manufacturing equipment component according to any one of Aspects 1 to 8, wherein in each jumper electrode layer of the plurality of jumper electrode layers connected to 10 or more terminals constituting the terminal-dense portion in each single compartment, adjacent planar jump electrodes are electrically separated by a linear insulator, and the linear insulator does not linearly overlap in the vertical direction with any linear insulator in a different jumper electrode layer. [Aspect 10] A semiconductor manufacturing equipment component according to any one of Aspects 1 to 9, wherein the spacing between adjacent planar jump electrodes in the same layer of at least one jumper electrode layer among the plurality of jumper electrode layers connected to 10 or more terminals constituting the terminal-dense portion in each single compartment is 0.3 mm or more.

[0009] According to the semiconductor manufacturing equipment member of one embodiment of the present invention, by increasing the number of heater electrodes, it is possible to reduce the number of layers of jumper electrodes when the jumper electrodes are multi-layered, thereby making it possible to manufacture at low cost a semiconductor manufacturing equipment member with a multi-zone heater that has improved wafer temperature distribution control performance.

[0010] 1 is a schematic longitudinal cross-sectional view (a cross-sectional view when cut at a plane including the central axis of the semiconductor manufacturing equipment member) of a semiconductor manufacturing equipment member according to one embodiment of the present invention. It is a schematic partial enlarged view of the framed area in FIG. 1. It is an arrangement example 1 of a semiconductor manufacturing equipment member according to one embodiment of the present invention, in which a densely packed terminal portion in a single compartment is observed from the underside of the ceramic substrate. It is a diagram illustrating, by way of example, which terminals in the densely packed terminal portion in Arrangement Example 1 are connected to, from the bottom layer (first layer) to the top layer (fifth layer) of the jumper electrode layer. It is an arrangement example 2 of a semiconductor manufacturing equipment member according to one embodiment of the present invention, in which a densely packed terminal portion in a single compartment is observed from the bottom side of the ceramic substrate. It is a diagram illustrating, by way of example, which terminals in the densely packed terminal portion in Arrangement Example 2 are connected to, from the bottom layer (first layer) to the top layer (fifth layer) of the jumper electrode layer. 5A and 5B are schematic diagrams showing examples of the shapes of a plurality of planar jumper electrodes constituting each of the first to fifth jumper electrode layers and an example of the shape of a common jumper when the upper surface, which is the wafer mounting surface of the ceramic substrate, is circular, the number of densely-packed terminal portions is 3, and the number of jumper electrode layers is 5.

[0023] Fig. 5A is a schematic plan view of each of the first to third jumper electrode layers. Fig. 5B is a schematic diagram of the five jumper electrode layers shown in Fig. 5A when viewed virtually from above.

[0011] Next, embodiments of the present invention will be described in detail with reference to the drawings. It should be understood that the present invention is not limited to the following embodiments, and that appropriate design changes, improvements, and the like may be made based on the common knowledge of those skilled in the art without departing from the spirit of the present invention. Furthermore, in this specification, "upper" and "lower" are used for convenience to represent the relative positional relationship when a semiconductor manufacturing equipment component is placed on a horizontal surface with the upper surface on which a wafer can be placed facing upward, and do not represent an absolute positional relationship. Therefore, depending on the orientation of the semiconductor manufacturing equipment component, "upper" and "lower" may become "lower" and "upper," "left" and "right," or "front" and "rear."

[0012] 1 and 2 , a semiconductor manufacturing equipment member 10 according to one embodiment of the present invention can be used when performing processes such as CVD and etching on a wafer W using plasma, and can be fixed to a mounting plate (not shown) provided inside a semiconductor process chamber. The semiconductor manufacturing equipment member 10 includes a ceramic substrate 20 and a base plate 30 located on a lower surface 23 of the ceramic substrate 20 and incorporating a coolant flow path 32. The ceramic substrate 20 and the base plate 30 can be bonded together by, for example, a bonding layer 40.

[0013] (1-1. Ceramic Substrate) A ceramic substrate 20 according to one embodiment of the present invention has an upper surface 21a on which a wafer W can be placed, a terminal-dense section 52 in which 10 or more terminals 52a are arranged within a single section, a plurality of zoned heater electrodes 27, and a plurality of jumper electrode layers 29 that electrically connect the heater electrodes 27 to the respective terminals 52a of the terminal-dense section 52 and are stacked in the vertical direction via insulators 28.

[0014] More specifically, the ceramic substrate 20 according to one embodiment of the present invention includes a central portion 20a having a circular upper surface 21a in a planar view, and an outer peripheral portion 20b having an annular upper surface 21b in a planar view, located around the central portion 20a. A wafer W can be placed on the upper surface 21a, and a focus ring 78 can be placed on the upper surface 21b. The ceramic substrate 20 is formed of a ceramic material, typically alumina or aluminum nitride. The upper surface 21b of the outer peripheral portion 20b is one step lower than the upper surface 21a of the central portion 20a. The central portion 20a and the lower surface 23 of the outer peripheral portion 20b may be flush with each other. The ceramic substrate 20 may have the central portion 20a but not the outer peripheral portion 20b, i.e., it may not have the one-step lower upper surface 21b.

[0015] 1, focus ring 78 and the upper surface of wafer W are flush with each other, but the upper surface of focus ring 78 may be located higher than the wafer. In the embodiment shown in FIG. 1, the outer diameter of focus ring 78 and the outer diameter of outer periphery 20b of ceramic substrate 20 are the same, but the outer diameters of both may not be the same.

[0016] The upper surface 21a on which the wafer W can be placed may be provided with a plurality of small protrusions (not shown). Also, a seal band (not shown) may be formed along the outer edge of the upper surface 21a. In this case, the wafer W may be supported by the top surface of the seal band and the top surfaces of the plurality of small protrusions.

[0017] The central portion 20a of the ceramic substrate 20 can have a diameter of 190 to 450 mm and a thickness of 1 to 20 mm, for example. Furthermore, the central portion 20a of the ceramic substrate 20 can have an electrostatic attraction electrode 26 built in on the side closer to the upper surface 21a. The electrostatic attraction electrode 26 can be formed from a material containing, for example, W, Mo, WC, MoC, or the like. The electrostatic attraction electrode 26 can be, for example, a planar electrode. The ceramic substrate 20 may have one layer of electrostatic attraction electrodes 26 built in, or two or more layers spaced apart.

[0018] The electrostatic attraction electrode 26 is connected to an external DC power supply via a power supply member (not shown). A low-pass filter may be disposed midway along the power supply member. The power supply member is electrically insulated from the bonding layer 40 and the base plate 30. When a DC voltage is applied to the electrostatic attraction electrode 26, the wafer W is attracted and fixed to the upper surface 21 a by electrostatic attraction force, and when the application of the DC voltage is stopped, the wafer W is released from the attraction and fixation to the upper surface 21 a. The ceramic substrate 20 may have an RF electrode for generating plasma built in instead of or in addition to the electrostatic attraction electrode 26.

[0019] The ceramic substrate 20 also has a plurality of zoned heater electrodes 27. The plurality of heater electrodes 27 are arranged, for example, so that a plurality of zones are formed in a plane direction parallel to the upper surface 21 a of the ceramic substrate 20. The output of each of the plurality of zoned heater electrodes 27 can be controlled. This allows the upper surface 21 a of the ceramic substrate 20 to be divided into a plurality of zones, enabling temperature control for each zone, thereby improving the ability to control the temperature distribution of the wafer.

[0020] The heater electrode 27 may be provided only in the central portion 20a of the ceramic substrate 20, but the heater electrode 27 may also be provided in the outer peripheral portion 20b of the ceramic substrate 20 (i.e., below the focus ring 78).

[0021] In order to improve the performance of controlling the temperature distribution of the wafer, the ceramic substrate 20 preferably has 10 or more heater electrodes 27 in total, more preferably 50 or more heater electrodes, and even more preferably 100 or more heater electrodes 27. Each heater electrode 27 may be, for example, a linear electrode extending in a direction parallel to the upper surface 21 a of the ceramic substrate 20 in a single stroke. Each heater electrode 27 has a first connection portion 27 a that is a connection point with the second via 62 and a second connection portion 27 b that is a connection point with the fourth via 64.

[0022] The heater electrode 27 can be formed, for example, from a mixed material of a metal and a ceramic. Examples of metals include Ru, W, and Mo. These metals can be used alone or in combination of two or more. However, a material with a thermal expansion coefficient close to that of the ceramic material constituting the ceramic substrate 20 is preferred. The ceramic material is preferably the same material as that of the ceramic substrate 20 (e.g., alumina or aluminum nitride). Forming the heater electrode 27 from such a mixed material can reduce the risk of cracks occurring between the heater electrode 27 and the ceramic substrate 20 due to the difference in thermal expansion between them.

[0023] Each jumper electrode layer 29 is composed of multiple planar jumper electrodes 29a electrically isolated by insulators 29b (see FIG. 6). The planar shape of the jumper electrodes 29a offers the advantage of suppressing heat generation in the jumper electrodes compared to linear jumper electrodes. The planar shape of the jumper electrodes 29a means that the jumper electrodes 29a extend in a plane parallel to the upper surface 21a of the ceramic substrate 20. Typically, the jumper electrodes 29a are flat (e.g., foil-like), but may also have an irregular shape such as a mesh. The thickness of each planar jumper electrode 29a can be, for example, 10 to 100 μm, and typically 20 to 50 μm.

[0024] Among the multiple jumper electrode layers 29 connected to the 10 or more terminals constituting the densely-packed terminal area 52 in each single compartment 55, at least one jumper electrode layer 29, preferably at least half of the jumper electrode layers 29, and more preferably all of the multiple planar jumper electrodes 29a constituting the jumper electrode layers have a distance D between adjacent planar jumper electrodes 29a in the same layer of preferably 0.1 mm or more, more preferably 0.2 mm or more, and even more preferably 0.3 mm or more (see FIG. 4 ). This reduces the risk of electrical connection between adjacent planar jumper electrodes 29a, resulting in malfunction. On the other hand, from the viewpoint of reducing the risk of increased heat generation due to narrow jumper electrode widths, the distance D is preferably 2 mm or less, more preferably 1.5 mm or less, and even more preferably 1 mm or less. Therefore, among the multiple jumper electrode layers 29 connected to 10 or more terminals constituting the terminal-dense area 52 in each single section 55, the multiple planar jump electrodes 29a constituting at least one jumper electrode layer 29, preferably more than half of the jumper electrode layers 29, and more preferably all of the jumper electrode layers 29, preferably all of the planar jump electrodes 29a have a distance D between adjacent planar jump electrodes 29a in the same layer of 0.1 to 2 mm, more preferably 0.2 to 1.5 mm, and even more preferably 0.3 to 1 mm.

[0025] The area of ​​one planar jumper electrode 29a (excluding the opening) when viewed from above is 450 mm 2 It is preferable that the length is 700 mm or more. 2 More preferably, it is 1400 mm or more. 2 Furthermore, the area of ​​one planar jumper electrode 29a (excluding the opening) in plan view is preferably 15,000 mm² or more for the reason of simplifying electrode zoning. 2 It is preferable that the length is not more than 7000 mm. 2 More preferably, it is 4000 mm or less. 2 Therefore, the area of ​​one planar jumper electrode 29a (excluding the opening) in plan view is, for example, 450 to 15,000 mm 2 It is preferable that the length is 700 to 7000 mm 2 More preferably, it is 1400 to 4000 mm 2 It is even more preferable that:

[0026] Each terminal 52a in the terminal-dense portion 52 is electrically connected to a predetermined planar jumper electrode 29a through a first via 61 extending in the vertical direction. Each terminal 52a can be fixed to the ceramic substrate 20 by brazing, for example. Each terminal 52a in the terminal-dense portion 52 can also be connected to a power supply member (not shown) that is connected to a heater power source. There are no particular limitations on the type of each terminal 52a, but it can be, for example, a rigid rod-like shape extending in the vertical direction, or a flexible wire.

[0027] Each of the multiple planar jumper electrodes 29a is electrically connected to the first connection portion 27a of a specific heater electrode 27 selected from the multiple heater electrodes 27 via a second via 62 extending in the vertical direction. The second connection portion 27b of each of the multiple heater electrodes 27 can be electrically connected to a common terminal 72 via a common jumper 71. The common terminal 72 can be connected to, for example, a ground (earth) wire. The common terminal 72 may also be connected to a heater power supply. The common jumper 71 can be electrically connected to the common terminal 72 via a third via 63 extending in the vertical direction. The second connection portion 27b can also be electrically connected to the common jumper 71 via a fourth via 64 extending in the vertical direction. In the illustrated embodiment, the common terminal 72 is inserted into the ceramic substrate 20 and can be fixed by brazing. This configuration can increase the bonding strength of the common terminal 72. However, the common terminal 72 only needs to be electrically connected to the common jumper 71; it does not need to be inserted into the ceramic substrate 20. For example, the common terminal 72 may be fixed to the lower surface 23 of the ceramic substrate 20 or to the bottom surface of the recess 35 provided in the lower surface 23 by brazing.

[0028] The common jumper 71 can be formed at a different height from the jumper electrode layer 29 and the heater electrode 27 via the insulator 28. In the embodiment shown in FIG. 1 , the common jumper 71 is formed between the jumper electrode layer 29 and the heater electrode 27. The position of the common jumper 71 is not limited to this, and it can also be provided at a position above the heater electrode 27, for example.

[0029] One common jumper 71 can be electrically connected to all or some of the multiple terminals of one or more densely-packed terminal sections 52. In one embodiment, all of the multiple terminals of one densely-packed terminal section 52 may be electrically connected to one common jumper 71. In another embodiment, some of the multiple terminals of one densely-packed terminal section 52 may be electrically connected to one common jumper 71, and the remaining terminals may be electrically connected to another common jumper 71. While having more common jumpers 71 has the advantage of dispersing current and reducing heat generation, it has the disadvantage of increasing the number of common terminals 72, resulting in increased costs and more complex wiring. Therefore, the semiconductor manufacturing equipment member 10 preferably has 1 to 5 common jumpers 71 in total, and more preferably has 1 to 3 common jumpers 71.

[0030] In a preferred embodiment, the common jumper 71 is planar. The planar shape of the common jumper 71 offers the advantage of suppressing heat generation compared to when the common jumper 71 is linear. The planar shape of the common jumper 71 means that the common jumper extends in a plane direction parallel to the upper surface 21a of the ceramic substrate 20, and can typically be flat (e.g., foil-like), but may also be in an uneven shape such as a mesh. The thickness of the common jumper 71 can be, for example, 10 to 100 μm, and typically 30 to 80 μm. Furthermore, the area of ​​one common jumper 71 when viewed in plan (excluding openings) is set to 3500 mm² for the purpose of suppressing heat generation. 2 It is preferable that the length is 7000 mm or more. 2 More preferably, it is 14,000 mm or more. 2 Furthermore, the area of ​​one common jumper 71 in plan view (excluding the opening) is set to 70,000 mm or less for the purpose of simplifying electrode zoning. 2 It is preferable that the length is equal to or less than 40,000 mm 2 Therefore, the area of ​​one common jumper 71 (excluding the opening) in plan view is, for example, 3,500 to 70,000 mm 2It is preferable that the thickness is 7000 to 40000 mm 2 More preferably, it is 14,000 to 40,000 mm 2 It is even more preferable that:

[0031] One or more common terminals 72 may be provided for one terminal-dense portion 52. However, from the viewpoint of suppressing heat generation due to current concentration in the common terminal, it is preferable to provide more than one common terminal 72 for one terminal-dense portion 52.

[0032] In the illustrated embodiment, the common terminal 72 is provided in a recess 35 provided in the lower surface 23 of the ceramic substrate 20. The recess 35 may be omitted. The common terminal 72 can be joined to the ceramic substrate 20 by brazing or soldering, for example. There are no particular limitations on the common terminal 72, but it can be, for example, a rigid rod extending in the vertical direction or a flexible cable.

[0033] The planar jumper electrode 29a and the common jumper 71 can be formed of a mixed material of ceramics and one or more types selected from W, Mo, and Ru, for example. The first via 61, the second via 62, the third via 63, and the fourth via 64 can be formed of a mixed material of ceramics and one or more types selected from W, Mo, and Ru, for example. The terminal 52a and the common terminal 72 can be formed of a material such as Mo or Kovar (Fe—Ni—Co alloy).

[0034] The third via 63 is prone to heat generation because current supplied via each terminal 52a is concentrated in the third via 63. Therefore, in order to prevent excessive heat generation in the third via 63, it is preferable that the diameter of the third via 63 is larger than the diameter of the first via. The ratio of the diameter X3 of the third via to the diameter X1 of the first via may be set appropriately taking into consideration the current flowing through the third via, but can be, for example, 2≦X3 / X1≦25, and can typically be 4≦X3 / X1≦10.

[0035] The diameter X1 of the first via can be, for example, 50 to 1000 μm, typically 100 to 400 μm. The diameter X2 of the second via can be, for example, 50 to 1000 μm, typically 100 to 400 μm. The diameter X3 of the third via can be, for example, 300 to 5000 μm, typically 500 to 2000 μm. The diameter X4 of the fourth via can be, for example, 50 to 1000 μm, typically 100 to 400 μm.

[0036] In this specification, the diameters of the first, second, third, and fourth vias refer to the equivalent circle diameters in a cross section perpendicular to the extension direction of each via.

[0037] The densely-packed terminal portion 52 is a portion in which 10 or more terminals 52a are arranged within a single compartment 55 (see FIG. 3). In the embodiment shown in FIG. 1, only one densely-packed terminal portion 52 is shown. Depending on the wiring that supplies power to the terminals, the ceramic substrate 20 may be provided with multiple densely-packed terminal portions 52, i.e., multiple single compartments 55. There is no particular limit to the number of terminals 52a arranged in the densely-packed terminal portion 52 within a single compartment 55, but it may illustratively be 10 to 100, and typically 20 to 70. In the embodiment shown in FIG. 1, the densely-packed terminal portion 52 is provided in a recess 34 provided on the lower surface 23 of the ceramic substrate 20, and the recess 34 separates the single compartment 55. The recess 34 may be omitted. Furthermore, the density of the terminals 52a arranged in the densely-packed terminal portion 52 is set to 10 to 100 terminals / cm from the viewpoints of saving space and ensuring insulation between the terminals. 2 It is preferable that the density is 30 to 90 particles / cm 2 It is more preferable to set the density to 50 to 80 / cm 2 The number density of the terminals 52a arranged in the terminal-dense portion 52 is calculated by dividing the number of terminals arranged in the terminal-dense portion 52 by the area of ​​the region surrounded by the outer periphery 54 of the terminal-dense portion 52. The outer periphery 54 will be defined later.

[0038] From the viewpoint of saving space and ensuring insulation between the terminals, the shortest distance X (insulated distance) between each of the 10 or more terminals 52a arranged in a single compartment 55 and the nearest terminal 52a among the adjacent terminals 52a is preferably 0.3 to 2 mm, more preferably 0.5 to 1.5 mm, and even more preferably 0.7 to 1.3 mm (see FIGS. 3-1 and 4-1).

[0039] The multiple jumper electrode layers 29 electrically connect the multiple heater electrodes 27 to each terminal 52a of the densely-packed terminal portion 52, and are stacked in the vertical direction via insulators 28. The distance between vertically adjacent jumper electrode layers 29 (equal to the thickness T of the insulator 28 between the layers) is preferably 0.02 to 1 mm, more preferably 0.02 to 0.5 mm, and even more preferably 0.02 to 0.2 mm, in order to strike a balance between ensuring insulation between the vertically adjacent jumper electrode layers 29 and reducing manufacturing costs by thinning the ceramic substrate 20.

[0040] Since an increase in the number of jumper electrode layers 29 increases the number of laminations, which increases the manufacturing cost, it is desirable to reduce the number of jumper electrode layers 29 as much as possible. In order to reduce the number of jumper electrode layers 29, it is preferable that each jumper electrode layer 29 has a plurality of planar jumper electrodes 29a.

[0041] For this reason, in one embodiment, each jumper electrode layer 29 can be composed of multiple planar jumper electrodes 29a electrically separated by insulators 29b (see FIG. 6 ). While having a larger number of jumper electrodes 29a in the same jumper electrode layer 29 helps reduce the number of jumper electrode layers 29, it is best not to have an excessively large number of jumper electrodes 29a because narrower widths of each jumper electrode 29a increase heat generation. Therefore, it is preferable that at least one jumper electrode layer 29, preferably more than half of the jumper electrode layers 29, and more preferably all of the jumper electrode layers 29 electrically connected to 10 or more terminals 52a constituting the densely packed terminal area 52 in each single section 55 are composed of 5 to 15 planar jumper electrodes 29a, and more preferably 8 to 12 planar jumper electrodes 29a.

[0042] The insulators 29b that electrically separate the plurality of planar jumper electrodes 29a can be made of, for example, the ceramics (alumina and / or aluminum nitride, etc.) that make up the ceramic substrate 20. However, without being limited to this, a different type of ceramic from the ceramics that make up the ceramic substrate 20 may also be used for the insulators 29b.

[0043] Each terminal 52a in the terminal-dense section 52 is electrically connected to a predetermined planar jumper electrode 29a through a first via 61 extending in the vertical direction. One terminal 52a may be electrically connected to multiple planar jumper electrodes 29a, or multiple terminals 52a may be electrically connected to one planar jumper electrode 29a. In a preferred embodiment, each terminal 52a is connected to one predetermined planar jumper electrode 29a.

[0044] In order to reduce the number of jumper electrode layers 29, it is necessary to electrically connect, with high spatial efficiency, the large number of terminals 52a arranged in the terminal-dense portion 52 to each jumper electrode 29a via the first vias 61. Specifically, it is desirable to connect the first vias 61 connected to the terminals 52a on the outer periphery of the terminal-dense portion 52 to the lower jumper electrode layer 29, and to connect the first vias 61 connected to the terminals 52a on the inner periphery to the upper jumper electrode layer 29. Therefore, in one embodiment, in at least one terminal-dense portion 52, 70% or more of all the terminals 52a arranged in the terminal-dense portion 52, preferably 80% or more of the terminals 52a, and more preferably all the terminals 52a arranged in the terminal-dense portion 52, are electrically connected to a predetermined planar jumper electrode 29a through a first via 61 extending in the vertical direction, while satisfying the condition that they are not electrically connected to any planar jumper electrode 29a located in a layer above any of the planar jumper electrodes 29a to which other terminals 52a that are farther away from the outer peripheral edge 54 of the terminal-dense portion 52 are electrically connected. That is, when comparing terminal A, which is closer to the outer peripheral edge 54 of the terminal-dense portion 52, with terminal B, which is farther from the outer peripheral edge 54 of the terminal-dense portion 52 than terminal A, it is preferable that the planar jumper electrode 29a to which terminal A is connected belongs to the same jumper electrode layer 29 as the planar jumper electrode 29a to which terminal B is connected, or belongs to a jumper electrode layer 29 located lower than the planar jumper electrode 29a to which terminal B is connected.

[0045] Of all the terminals 52a arranged in the densely packed terminal portion 52, some of the terminals 52a may not satisfy the above condition. Thus, in at least one densely packed terminal portion 52, at least one terminal 52a (T1) may be electrically connected to a planar jumper electrode 29a located in an upper layer than a planar jumper electrode 29a to which at least one other terminal 52a (T2), which is farther away from the outer peripheral edge 54 of the densely packed terminal portion 52, is electrically connected. However, if the distance between the at least one terminal 52a (T1) and the outer peripheral edge 54 is M1 (mm) and the distance between the at least one other terminal 52a (T2) and the outer peripheral edge 54 is M2 (mm), it is preferable that Equation 1: M1 < M2 ≦ M1 + 2 hold for all the terminals 52a (T1).

[0046] When the ceramic substrate 20 has a plurality of dense terminal portions 52, it is preferable that more than half of the dense terminal portions 52 satisfy the above condition, and it is more preferable that all of the dense terminal portions 52 satisfy the above condition. There is no particular limit to the number of dense terminal portions 52, and it may be set appropriately depending on the area of ​​the upper surface 21a, which is the wafer mounting surface of the ceramic substrate 20, the number of heater electrodes 27, the number of jumper electrode layers 29, etc. Illustratively, it can be 1 to 10, and typically 1 to 5.

[0047] 3-1 and 4-1 show arrangement examples 1 and 2 when the densely terminal portion 52 in a single section 55 is observed from the lower surface 23 side of the ceramic substrate 20. The outer periphery 54 of the densely terminal portion 52 is defined as a convex hull (smallest convex set) that encompasses all of the terminals 52a in the single section 55 to which the densely terminal portion 52 belongs. Furthermore, the distance between each terminal 52a and the outer periphery 54 refers to the shortest distance M from the center of gravity of the terminal 52a to the outer periphery 54 when the terminal 52a is observed from a direction perpendicular to the surface to which the terminal 52a is connected.

[0048] FIG. 3-2 is an exemplary diagram illustrating the assignment of terminals 52 a in the terminal-dense portion 52 according to Arrangement Example 1 when electrically connecting the terminals 52 a to planar jumper electrodes 29 a of the five-layer jumper electrode layer 29 via first vias 61. In other words, FIG. 3-2 exemplarily illustrates to which layer, from the bottom (first layer) to the top (fifth layer) of the jumper electrode layer 29, each terminal 52 a in the terminal-dense portion 52 is electrically connected. Eleven outermost terminals 52 a are assigned to the first layer. Nine outermost terminals 52 a and two terminals 52 a located one step inward from the outermost periphery are assigned to the second layer. Ten terminals 52 a are assigned to the third layer. Six terminals 52 a located one step inward from the outermost periphery and three terminals 52 a located two steps inward from the outermost periphery are assigned to the fourth layer. Nine terminals 52a located two steps inward from the outermost periphery are assigned to the fifth layer.

[0049] In arrangement example 1, all terminals 52a satisfy the condition that they are not electrically connected to any planar jumper electrode located in a layer above any planar jumper electrode to which other terminals that are farther away from the outer peripheral edge 54 of the terminal-dense portion 52 than the terminals themselves are electrically connected.

[0050] FIG. 4-2 is an exemplary diagram illustrating the assignment of the terminals 52a in the terminal-dense portion 52 according to Arrangement Example 2 when electrically connecting the terminals 52a to the planar jumper electrodes 29a of the jumper electrode layer 29, which is composed of five layers, via the first vias 61. In other words, FIG. 4-2 exemplarily illustrates to which layer, from the bottommost layer (first layer) to the topmost layer (fifth layer) of the jumper electrode layer 29, the terminals 52a in the terminal-dense portion 52 are electrically connected. Eleven terminals 52a are assigned to the first layer. Eleven terminals 52a are assigned to the second layer. Ten terminals 52a are assigned to the third layer. Ten terminals 52a are assigned to the fourth layer. Eight terminals 52a are assigned to the fifth layer.

[0051] In Arrangement Example 2, a total of 50 terminals 52a are arranged in the terminal-dense portion 52. In FIG. 4-2, 13 terminals 52a (9 on the second layer and 4 on the fourth layer) enclosed by thick circles do not satisfy the condition that they are not electrically connected to any planar jumper electrode located in a layer above any planar jumper electrode to which other terminals 52a that are farther away from the outer periphery 54 of the terminal-dense portion 52 are electrically connected. The remaining 37 terminals 52a (74%) satisfy this condition.

[0052] In a preferred embodiment, if the total number of jumper electrode layers 29 electrically connected to 10 or more terminals 52a constituting the densely-packed terminal section 52 in each single section 55 is A, the number of planar jump electrodes 29a constituting the Nth jumper electrode layer 29 (N is a natural number from 1 to A) from the bottom is equal to or less than the number of planar jump electrodes 29a constituting the N-1th jumper electrode layer 29 from the bottom, and the number of planar jump electrodes 29a constituting the uppermost jumper electrode layer 29 is less than the number of planar jump electrodes 29a constituting the lowermost jumper electrode layer 29. A wider inter-electrode distance between the jumper electrodes 29a is preferable from the viewpoint of insulation between the electrodes, and a wider electrode width is preferable from the viewpoint of suppressing heat generation. However, by adopting this configuration in which jump electrodes connected to outer peripheral terminals where the inter-electrode distance and electrode width can be more easily ensured are arranged on the lower layer, an advantage is obtained in that jump electrodes can be arranged efficiently with a minimum number of layers.

[0053] FIG. 5 shows examples of the shapes of the planar jumper electrodes 29a constituting each of the first to fifth jumper electrode layers 29 and examples of the shape of the common jumper when the upper surface 21a, which is the wafer mounting surface of the ceramic substrate 20, is circular, the number of densely-packed terminal portions 52 is three, and the number of jumper electrode layers 29 is five. In the embodiment shown in FIG. 5 , the planar shape of one jumper electrode layer 29 electrically connected to the multiple terminals 52a of one densely-packed terminal portion 52 is a substantially sector shape with the center of the circle formed by the upper surface 21a as the reference for the central angle. In the embodiment shown in FIG. 5 , three jumper electrode layers 29 are arranged at the same height position in each of the first to fifth layers. Each of the three jumper electrode layers 29 is electrically connected to a corresponding one of the densely-packed terminal portions 52. The three jumper electrode layers 29 at the same height position (same number) are arranged so as to correspond as a whole to the planar shape (circular in FIG. 5 ) of the upper surface 21a, which is the wafer mounting surface.

[0054] In the embodiment shown in FIG. 5 , three jumper electrode layers 29 at the same height (same number) are all substantially sector-shaped with substantially the same central angle (specifically, 120°) and are electrically isolated from one another via linear insulators 29c (e.g., ceramics) extending along the radius. The linear insulators 29c electrically isolating adjacent jumper electrode layers 29 preferably do not vertically overlap with any of the linear insulators 29c in different jumper electrode layers 29. FIG. 7 shows a schematic diagram of a virtual perspective view from above of multiple planar jumper electrodes constituting the five jumper electrode layers exemplified in FIG. 5 . This reduces the risk of cracks occurring in the ceramic substrate 20. The line width of the linear insulators 29c (equal to the distance between adjacent jumper electrode layers 29) is not limited, but can be, for example, 0.3 to 2 mm, typically 0.3 to 1 mm.

[0055] 6 exemplarily shows a schematic plan view of each of the first to third jumper electrode layers 29. At least one of the jumper electrode layers 29 electrically connected to the 10 or more terminals 52a constituting the densely-packed terminal area 52 in each single section 55, preferably more than half of the jumper electrode layers 29, and more preferably all of the planar jumper electrodes 29a constituting the jumper electrode layers 29 each preferably have a planar shape formed by two adjacent line segments at the same angle, with the first via 61 as the vertex. Current tends to concentrate near the first via 61 extending vertically from the densely-packed terminal area 52, thereby generating heat. Therefore, spreading the planar jumper electrodes 29a at equal intervals has the advantage of facilitating heat dispersion.

[0056] 6, in the first and second jumper electrode layers 29, eleven jumper electrodes 29a each have a planar shape whose constituent elements are two adjacent line segments that are spaced apart by 32.7° (=360°÷11). In the third jumper electrode layer 29, ten jumper electrodes 29a each have a planar shape whose constituent elements are two adjacent line segments that are spaced apart by 36° (=360°÷10).

[0057] In each of the multiple jumper electrode layers 29 connected to ten or more terminals 52a constituting the densely packed terminal area 52 within each single section 55, adjacent planar jumper electrodes 29a can be electrically isolated from each other via linear insulators 29b (e.g., ceramic). The linear insulators 29b can be formed, for example, as straight lines, curved lines, or a combination of both. In this case, it is preferable that the linear insulators 29b do not vertically overlap with any of the linear insulators 29b in different jumper electrode layers 29. FIG. 7 shows a schematic diagram of a virtual see-through view from above of multiple planar jumper electrodes constituting the five jumper electrode layers exemplified in FIG. 5. This reduces the risk of cracks occurring in the ceramic substrate. The line width of the linear insulators 29b (equal to the distance between adjacent jumper electrodes 29a) is not limited, but can be, for example, 0.3 to 2 mm, typically 0.5 to 1 mm.

[0058] From the viewpoint of reducing manufacturing costs, the total number A of jumper electrode layers 29 is preferably 20 or less, more preferably 10 or less, and even more preferably 5 or less. On the other hand, from the viewpoint of increasing the number of heater electrodes to increase the number of zones and thereby improving the performance of controlling the temperature distribution of the wafer, the total number A of jumper electrode layers 29 is preferably 2 or more, more preferably 3 or more, and even more preferably 4 or more. Therefore, the total number A of jumper electrode layers 29 is, for example, preferably 2 to 20, more preferably 3 to 10, and even more preferably 4 to 5.

[0059] (1-2. Base Plate) The base plate 30 may be, for example, disk-shaped. In one embodiment, the base plate 30 includes a central portion 30a having a circular upper surface 31a in plan view, and a flange portion 30b having an annular upper surface 31b in plan view, located on the outer periphery of the central portion 30a. The thickness of the central portion 30a may be, for example, 5 to 30 mm. The flange portion 30b can be used to clamp or bolt the semiconductor manufacturing equipment member 10 to a mounting plate disposed on the lower surface 33 side. A ring heater (not shown) may also be placed on the flange portion 30b. In this case, the ring heater can be bolted to the mounting plate.

[0060] The base plate 30 can be made of, for example, a metal material or a composite material of metal and ceramic. Examples of metal materials include Al, Ti, Mo, and alloys thereof. Examples of composite materials of metal and ceramic include metal matrix composites (MMCs) and ceramic matrix composites (CMCs). Specific examples of such composite materials include a material containing Si, SiC, and Ti (also known as SiSiCTi), a material in which porous SiC is impregnated with Al and / or Si, and a composite material of AlO and TiC. A material in which porous SiC is impregnated with Al is called AlSiC, and a material in which porous SiC is impregnated with Si is called SiSiC. It is preferable to select a material for the base plate 30 that has a thermal expansion coefficient similar to that of the ceramics constituting the ceramic substrate 20. For example, if the ceramic substrate 20 is made of alumina, the base plate 30 is preferably made of SiSiCTi or AlSiC, which have a thermal expansion coefficient similar to that of alumina.

[0061] The base plate 30 can be used as an RF electrode by connecting it to an RF power supply via a power supply terminal (not shown). A high-pass filter (HPF) can be disposed between the base plate 30 and the RF power supply.

[0062] A refrigerant flow path 32 through which a refrigerant circulates may be formed within the base plate 30. The refrigerant flowing through the refrigerant flow path 32 is preferably a liquid, and is preferably electrically insulating. Examples of electrically insulating liquids include a fluorine-based inert liquid. The refrigerant flow path 32 can be formed, for example, in a single stroke across the entire base plate 30 in a plan view from one end (inlet) to the other end (outlet). One end and the other end of the refrigerant flow path 32 are connected to a supply port and a recovery port, respectively, of an external refrigerant device (not shown). The refrigerant supplied from the supply port of the external refrigerant device to one end of the refrigerant flow path 32 passes through the refrigerant flow path 32, returns from the other end of the refrigerant flow path 32 to the recovery port of the external refrigerant device, has its temperature adjusted, and is then supplied again from the supply port to one end of the refrigerant flow path 32.

[0063] (1-3. Bonding Layer) The bonding layer 40 bonds the lower surface 23 of the ceramic substrate 20 and the upper surface 31a of the base plate 30. The bonding layer 40 may be composed of a metal layer formed of, for example, solder or a metal brazing material. The bonding layer 40 is formed, for example, by TCB (thermal compression bonding). TCB refers to a known method in which a metal bonding material is sandwiched between two components to be bonded and the two components are pressure-bonded while heated to a temperature below the solidus temperature of the metal bonding material. The bonding layer 40 is not limited to a metal layer. For example, a resin bonding layer may be used instead of the metal layer. The resin bonding layer may be composed of, for example, a cured product of a silicone resin adhesive, an epoxy resin adhesive, an acrylic resin adhesive, or a urethane resin adhesive.

[0064] The bonding layer 40 and the base plate 30 may have through holes at locations corresponding to the densely-packed terminal portion 52 to facilitate connecting the power supply member to each terminal 52a in the densely-packed terminal portion 52. The bonding layer 40 and the base plate 30 may also have through holes at locations corresponding to the recessed portion 34 where the common terminal 72 is located to facilitate connecting the earth wire 73 to the common terminal 72.

[0065] (1-4. Others) The side surface of the outer peripheral portion 20b of the ceramic substrate 20, the outer periphery of the bonding layer 40, the side surface of the base plate 30, and the upper surface 31b of the flange portion 30b can be covered with an insulating film 42. Examples of the insulating film 42 include a thermally sprayed film of alumina, yttria, or the like.

[0066] In the above-described embodiment, the semiconductor manufacturing equipment component 10 may have a plurality of holes penetrating the semiconductor manufacturing equipment component 10 in the vertical direction. Examples of such holes include a plurality of gas holes opening in the upper surface 21a and lift pin holes for inserting lift pins that move the wafer W up and down relative to the upper surface 21a. A plurality of gas holes may be provided at appropriate positions when the upper surface 21a is viewed from above. A thermally conductive gas such as He gas is supplied to the gas holes. Typically, the gas holes may be provided so as to open to a portion of the upper surface 21a where the aforementioned seal band or small protrusions are provided but where the seal band or small protrusions are not provided. When the thermally conductive gas is supplied to the gas holes, the thermally conductive gas fills the space on the backside of the wafer W placed on the upper surface 21a. A plug having a gas flow path may be embedded in the gas holes. A plurality of lift pin holes may be provided at equal intervals along concentric circles on the upper surface 21a when the upper surface 21a is viewed from above.

[0067] 2. Method of Using the Semiconductor Manufacturing Equipment Component Next, an exemplary method of using the semiconductor manufacturing equipment component 10 will be described. The common terminal 72 of the semiconductor manufacturing equipment component 10 is connected to ground via a ground wire 73. Furthermore, each terminal 52a of the densely-packed terminal portion 52 is connected to a heater power supply via a power supply (not shown). When voltage is applied from the heater power supply in this state, current flows in the following order: each terminal 52a of the densely-packed terminal portion 52 → first via 61 → jumper electrode layer 29 → second via 62 → each heater electrode 27 → fourth via 64 → common jumper 71 → third via 63 → common terminal 72, causing each heater electrode 27 to heat. By changing the voltage applied to each terminal 52a, it is possible to change the amount of heat generated by the multiple zoned heater electrodes 27. This allows a desired heat distribution to be achieved on the ceramic substrate 20, thereby enabling control of the temperature distribution of, for example, a wafer W suction-fixed to the upper surface 21a of the ceramic substrate 20.

[0068] A method for attracting and fixing the wafer W will now be described. First, with the semiconductor manufacturing equipment member 10 installed in a chamber (not shown), the wafer W is placed on the upper surface 21 a of the ceramic substrate 20. The chamber is then depressurized using a vacuum pump to adjust the chamber to a predetermined degree of vacuum, and a voltage is applied to the electrostatic attraction electrode 26 to generate an electrostatic attraction force, thereby attracting and fixing the wafer W to the upper surface 21 a of the ceramic substrate 20.

[0069] A method for processing the wafer W will now be described. The chamber is filled with a reactive gas atmosphere at a predetermined pressure (e.g., several tens to several hundreds of Pa), and the zoned heater electrodes 27 are controlled so that the temperature distribution of the wafer W, which is fixed by suction to the upper surface 21a of the ceramic substrate 20, is set to a desired state. Then, a high-frequency voltage such as an RF voltage is applied between an upper electrode (not shown) provided on the ceiling of the chamber and the base plate 30 of the semiconductor manufacturing equipment member 10 to generate plasma. The surface of the wafer W is processed by the generated plasma.

[0070] 3. Manufacturing Method of Semiconductor Manufacturing Equipment Member Next, a manufacturing method of the semiconductor manufacturing equipment member 10 will be described by way of example.

[0071] First, a method for producing the ceramic substrate 20 will be described. A plurality of disk-shaped green sheets that form the ceramic substrate 20 are produced. The green sheets can be produced, for example, by tape casting. Grooves are formed on the underside of the first green sheet from the bottom layer at locations where the recesses 34 and 35 will be formed. Furthermore, through holes are formed in the green sheet at positions corresponding to the first vias 61, and the through holes are filled with conductive paste to form paste-filled portions. Furthermore, as necessary, through holes are also formed at positions where the common terminals 72 will be inserted. Next, a conductive paste is printed on the top surface of the green sheet so as to obtain the same pattern as the first jumper electrode layer 29, thereby forming a first jumper precursor layer.

[0072] For the second and subsequent green sheets (Nth sheet) from the bottom layer, through holes are formed as needed at positions corresponding to the first via 61, second via 62, third via 63, and fourth via 64, and the through holes are filled with conductive paste to form paste-filled sections. Furthermore, through holes are formed as needed at positions where the common terminal 72 will be inserted. Next, conductive paste is printed on the top surface of the green sheet in the same pattern as the jumper electrode layer 29, common jumper 71, or heater electrode 27 required in the order from the bottom layer to form a jumper precursor. The topmost green sheet can be used without processing.

[0073] Green sheets that have been subjected to the required processing are stacked in order from the bottom to the top to form a laminate. This laminate is then fired to obtain the ceramic substrate 20. The electrostatic attraction electrode 26 and vias (not shown) connected to the electrostatic attraction electrode 26 can be formed inside the ceramic substrate 20 by standard methods.

[0074] A base plate 30 and a metal bonding material are prepared separately from the ceramic substrate 20. The base plate 30 has a coolant flow path 32. Furthermore, the base plate 30 and the metal bonding material may have through holes for accessing the recesses 34 and 35 of the ceramic substrate 20. The base plate 30 having the coolant flow path 32 can be manufactured, for example, by joining multiple aluminum or MMC plate members, in which grooves or holes corresponding to the coolant flow path 32 have been formed by machining, using a method such as electron beam welding, welding, diffusion bonding, or TCB. The through holes can be formed by machining.

[0075] Next, a resin or metal bonding material is sandwiched between the lower surface 23 of the ceramic substrate 20 and the upper surface 31 of the base plate 30 to form a laminate. The laminate is then pressed and bonded at a temperature below the solidus temperature of the metal bonding material (e.g., a temperature 20°C below the solidus temperature but below the solidus temperature), and then returned to room temperature (TCB). This turns the metal bonding material into a bonding layer 40, resulting in a bonded structure in which the ceramic substrate 20 and the base plate 30 are bonded together by the bonding layer 40. It is preferable to use a metal bonding material with a thickness of approximately 100 μm (e.g., 80 to 240 μm).

[0076] Thereafter, the plurality of terminals 52a constituting the densely-packed terminal portion 52 are connected to the corresponding first vias 61 by brazing or the like. In addition, the common terminal 72 is connected to the third via 63 by brazing or the like. Thereafter, the semiconductor manufacturing equipment member 10 is completed by appropriately going through processes such as adjusting the overall shape.

[0077] DESCRIPTION OF SYMBOLS 10: Member for semiconductor manufacturing equipment 20: Ceramic substrate 20a: Central portion 20b: Peripheral portion 21a: Upper surface 21b: Upper surface 23: Lower surface 26: Electrostatic attraction electrode 27: Heater electrode 27a: First connection portion 27b: Second connection portion 28: Insulator 29: Jumper electrode layer 29a: (Planar) jumper electrode 29b: Insulator 29c: Insulator 30: Base plate 30a: Central portion 30b: Flange portion 31: Upper surface 31a: Upper surface 31b: Upper surface 32: Coolant flow path 33: Lower surface 34: Recess 35: Recess 40: Bonding layer 42: Insulating film 52: Densely packed terminal portion 52a: Terminal 54: Peripheral edge 55: Single section 61: First via 62: Second via 63: Third via 64: Fourth via 71: Common jumper 72: Common terminal 73: Earth wire 78: Focus ring W: Wafer

Claims

1. A component for semiconductor manufacturing equipment comprising a ceramic substrate having: an upper surface on which a wafer can be placed; a terminal-dense area in which 10 or more terminals are arranged within a single section; a plurality of zoned heater electrodes; and a plurality of jumper electrode layers electrically connecting the plurality of heater electrodes to each terminal of the terminal-dense area and stacked vertically via insulators, wherein each jumper electrode layer is composed of a plurality of planar jumper electrodes electrically separated by insulators, and in at least one of the terminal-dense area, 70% or more of all the terminals arranged in the terminal-dense area are electrically connected to a predetermined planar jumper electrode via first vias extending vertically, while satisfying the condition that the terminals are not electrically connected to any planar jumper electrode located above any planar jumper electrode to which another terminal electrically connected that is farther away from the outer periphery of the terminal-dense area is electrically connected, and each of the plurality of planar jumper electrodes is electrically connected to a first connection portion of a predetermined heater electrode selected from the plurality of heater electrodes via second vias extending vertically.

2. A semiconductor manufacturing equipment component as described in claim 1, wherein in at least one of the terminal-dense portions, at least one terminal T1 is electrically connected to a planar jumper electrode located in a layer above a planar jumper electrode to which at least one other terminal T2, which is farther away from the outer periphery of the terminal-dense portion than at least one terminal T1, is electrically connected, and where the distance between the at least one terminal T1 and the outer periphery is M1 (mm) and the distance between the at least one other terminal T2 and the outer periphery is M2 (mm), the formula 1: M1 < M2 ≦ M1 + 2 holds for all terminals T1.

3. A component for semiconductor manufacturing equipment as described in claim 1, wherein in at least one of the densely packed terminal areas, all of the terminals arranged in the densely packed terminal area are electrically connected to a predetermined planar jumper electrode through a first via extending in the vertical direction, while satisfying the condition that each of the terminals is not electrically connected to a planar jumper electrode located in a layer above any of the planar jumper electrodes to which other terminals that are farther away from the outer periphery of the densely packed terminal area are electrically connected.

4. A semiconductor manufacturing equipment component according to claim 1 or 2, wherein at least one of the plurality of jumper electrode layers electrically connected to 10 or more terminals constituting the terminal-dense area in each single compartment is composed of 8 to 12 planar jumper electrodes.

5. A semiconductor manufacturing equipment component according to claim 1 or 2, wherein, when the total number of the plurality of jumper electrode layers electrically connected to 10 or more terminals constituting the terminal-dense area in each single section is A, the number of planar jumper electrodes constituting the Nth jumper electrode layer from the bottom (N is a natural number from 1 to A) is the same as or less than the number of planar jumper electrodes constituting the N-1th jumper electrode layer from the bottom, and the number of planar jumper electrodes constituting the topmost jumper electrode layer is less than the number of planar jumper electrodes constituting the bottommost jumper electrode layer.

6. A component for semiconductor manufacturing equipment as described in claim 1 or 2, wherein each of the plurality of planar jumper electrodes constituting at least one of the plurality of jumper electrode layers electrically connected to 10 or more terminals constituting the terminal-dense area in each single compartment has a planar shape whose components are two adjacent line segments at the same angle with the position of the first via as a vertex.

7. A semiconductor manufacturing equipment component according to claim 1 or 2, wherein each of the plurality of heater electrodes has a second connection portion, and the second connection portion is connected to a common terminal for grounding via a common jumper.

8. A component for semiconductor manufacturing equipment as described in claim 7, wherein the common jumper is electrically connected to the common terminal via a third via extending in the vertical direction, and the diameter of the third via is larger than the diameter of the first via.

9. A component for semiconductor manufacturing equipment as described in claim 1 or 2, wherein in each of the plurality of jumper electrode layers connected to 10 or more terminals constituting the terminal-dense area in each single compartment, adjacent planar jumper electrodes are electrically separated by linear insulators, and the linear insulators do not linearly overlap in the vertical direction with any of the linear insulators in different jumper electrode layers.

10. A component for semiconductor manufacturing equipment as described in claim 1 or 2, wherein the spacing between adjacent planar jumper electrodes in the same layer is 0.3 mm or more for each of the plurality of planar jumper electrodes constituting at least one of the plurality of jumper electrode layers connected to 10 or more terminals constituting the terminal-dense area in each single compartment.

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