Chip resistor

Abstract

This chip resistor is provided with a ceramic substrate, two electrodes that are disposed on the ceramic substrate, and a resistor that electrically connects the two electrodes. The ceramic substrate comprises a base material that contains a sintered body of ceramic particles (A) and a covering that contains a sintered body of α-alumina particles (B). The covering covers at least a part of the surface of the base material. The average particle diameter of the α-alumina particles (B) is smaller than the average particle diameter of the ceramic particles (A). The ceramic substrate has a support surface, the support surface-side surface of the base material is covered with the covering, and the resistor overlaps the support surface.

Description

Chip Resistors

[0001] The present disclosure relates to chip resistors used in various electronic devices.

[0002] Patent Document 1 discloses a technique in which a small amount of silica glass is contained in an alumina substrate itself, a glass coating is formed on the entire surface of the alumina substrate, and an upper electrode, resistor, etc. are formed on the glass coating.

[0003] JP 2017-168749 A

[0004] Chip resistors manufactured using glass-coated substrates have the problem that the thermal conductivity of the substrate is not high, making it difficult to ensure sufficient thermal conductivity. Furthermore, the substrate is not sufficiently smooth, making it difficult to suppress electrostatic discharge (ESD) that occurs in the chip resistor. Therefore, there is a need to improve the thermal conductivity and ESD resistance of chip resistors.

[0005] A chip resistor according to one aspect of the present disclosure includes a ceramic substrate, two electrodes disposed on the ceramic substrate, and a resistor electrically connecting the two electrodes. The ceramic substrate has a base material containing a sintered body of ceramic particles (A) and a coating containing a sintered body of alpha-alumina particles (B). The coating covers at least a portion of the surface of the base material. The average particle diameter of the alpha-alumina particles (B) is smaller than the average particle diameter of the ceramic particles (A). The ceramic substrate has a support surface, the surface of the base material facing the support surface is coated with the coating, and the resistor is overlaid on the support surface.

[0006] According to the present disclosure, a chip resistor capable of improving thermal conductivity and ESD resistance can be provided.

[0007] Fig. 1 is an example of a schematic cross-sectional view of a chip resistor according to a first embodiment of the present disclosure. Fig. 2 is an example of a schematic cross-sectional view of a chip resistor according to a second embodiment of the present disclosure. Fig. 3 is a schematic cross-sectional view of a modified example of the chip resistor according to the present disclosure.

[0008] 1. Overview Embodiments of the present disclosure will be described with reference to the drawings. Note that the following embodiments are merely a portion of various embodiments of the present disclosure. Furthermore, the following embodiments can be modified in various ways depending on the design, etc., as long as the object of the present disclosure can be achieved. The figures referred to below are schematic diagrams, and the dimensional ratios of the components in the figures do not necessarily reflect the actual dimensional ratios. Arrows indicating directions in the figures (arrows indicating the up-down and left-right directions) are not intended to define the directions when the chip resistor 10 is in use, but are merely shown to make the explanation easier to understand and do not have any substance. In the present disclosure, a view along the up-down direction is referred to as a plan view, and a view along the left-right direction is referred to as a side view.

[0009] The chip resistor 10 of the present disclosure includes a ceramic substrate 1, two electrodes 4 disposed on the ceramic substrate 1, and a resistor 5 electrically connecting the two electrodes 4. The ceramic substrate 1 has a base 2 containing a sintered body of ceramic particles (A) and a coating 3 containing a sintered body of alpha-alumina particles (B). The coating 3 covers at least a portion of the surface of the base 2. The average particle diameter of the alpha-alumina particles (B) is smaller than the average particle diameter of the ceramic particles (A). The ceramic substrate 1 has a support surface 111, and the surface of the base 2 facing the support surface 111 is coated with the coating 3, with the resistor 5 overlying the support surface 111.

[0010] As described above, the ceramic substrate 1 includes a base material 2 containing a sintered body of ceramic particles (A). The ceramic substrate 1 can impart high thermal conductivity to the chip resistor 10. Therefore, the thermal conductivity of the chip resistor 10 can be improved. Furthermore, the surface of the base material 2 facing the support surface 111 is coated with a coating 3 containing a sintered body of α-alumina particles (B), and the average particle diameter of the α-alumina particles (B) is smaller than the average particle diameter of the ceramic particles (A). This enhances the smoothness of the support surface 111 of the ceramic substrate 1. The resistor 5 formed on the support surface 111 of the ceramic substrate 1 can be formed without localized discontinuities, or unevenness in the film thickness of the resistor 5 can be reduced. This reduces the likelihood of breakdown (disconnection) in the resistor 5. As a result, electrostatic discharge (ESD) occurring in the chip resistor 10 can be suppressed. In this way, the thermal conductivity and ESD resistance of the chip resistor 10 can be improved.

[0011] Here, the support surface 111 of the ceramic substrate 1 refers to a part of the first main surface 11 of the ceramic substrate 1, and refers to the surface on which the resistor 5 is disposed. Note that disposing the resistor 5 on the ceramic substrate 1 means that the resistor 5 is disposed so as to overlap either the first main surface 11 or the second main surface 12 of the ceramic substrate 1 in the up-down direction, directly or via a different element.

[0012] Furthermore, the two electrodes 4 are disposed on the ceramic substrate 1, but they do not have to be disposed on the support surface 111. In other words, the portion of the surface of the base material 2 where the resistor 5 and the base material 2 overlap in the vertical direction is covered with the coating 3, but the portion of the surface of the base material 2 where the resistor 5 and the base material 2 overlap in the vertical direction may or may not be covered with the coating 3. Note that "the surface of the base material 2 is covered with the coating 3" means that the coating 3 covers the surface of the base material 2 so that it is in direct contact with the surface of the base material 2. Furthermore, the electrode 4 may be in direct contact with the ceramic substrate 1, or an element other than the ceramic substrate 1 and the electrode 4 may be interposed between the electrode 4 and the ceramic substrate 1.

[0013] Furthermore, the resistor 5 electrically connects the two electrodes 4, but it is preferable that the two electrodes 4 and the resistor 5 are in direct contact with each other. Note that, as long as the resistor 5 does not impair the advantage of the enhanced smoothness of the support surface 111, an element other than the electrode 4 and the resistor 5 may be interposed between the electrode 4 and the resistor 5. Furthermore, it is also acceptable for a portion of the resistor 5 not to overlap the support surface 111.

[0014] 2. Details Hereinafter, a chip resistor 10 according to an embodiment of the present disclosure will be described with reference to the drawings.

[0015] 2.1 First Embodiment FIG. 1 is a cross-sectional view of a chip resistor 10 according to a first embodiment of the present disclosure.

[0016] (Ceramic Substrate) As shown in FIG. 1 , the chip resistor 10 includes a ceramic substrate 1. The ceramic substrate 1 includes a base material 2 containing a sintered body of ceramic particles (A) and a coating 3 containing a sintered body of α-alumina particles (B). The ceramic particles (A) contain alumina particles (A1). In other words, the base material 2 is an alumina sintered body substrate. The content of alumina particles (A1) in the entire ceramic particles (A) is preferably 96% by mass or more. In other words, the content of sintered alumina particles (A1) in the entire base material 2 is preferably 96% by mass or more. In this case, the thermal conductivity of the ceramic substrate 1 can be improved. This also improves the thermal conductivity of the chip resistor 10. The upper limit of the content of alumina particles (A1) in the entire ceramic particles (A) is, for example, 100% by mass.

[0017] The ceramic substrate 1 has a rectangular shape when the chip resistor 10 is viewed from above. The ceramic substrate 1 has a thickness of, for example, 100 μm or more and 600 μm or less.

[0018] The coating 3 covers at least a portion of the surface of the substrate 2. In this case, the smoothness of the first main surface 11 coated with the coating 3 is enhanced. Therefore, if the surface of the substrate 2 facing the support surface 111 is coated with the coating 3, the smoothness of the support surface 111 of the ceramic substrate 1 can be enhanced. As a result, the ESD resistance of the chip resistor 10 can be improved. Note that "the coating 3 covers at least a portion of the surface of the substrate 2" means that as long as the surface of the substrate 2 facing the support surface 111 is coated with the coating 3, the surfaces of the substrate 2 other than the surface facing the support surface 111 may or may not be coated with the coating 3. Furthermore, "coated with the coating 3" may mean that the entire target surface is covered with the coating 3 without any gaps, or that the target surface is partially covered with the coating 3, leaving dispersed portions of the target surface uncovered by the coating 3. Furthermore, the structure of the coating 3 is not particularly limited as long as it can enhance the smoothness of the support surface 111 of the ceramic substrate 1. For example, the coating 3 may be a continuous surface. Alternatively, the coating 3 may be a discontinuous surface. Note that the coating 3 is preferably a continuous surface, in which case the smoothness of the support surface 111 of the ceramic substrate 1 can be more easily improved.

[0019] The average particle diameter of the α-alumina particles (B) is smaller than the average particle diameter of the ceramic particles (A). In this case, even if the shape of the minute irregularities generated on the substrate 2 has a complex shape at the back, the coating 3 can be arranged so as to sufficiently fill the irregularities. This makes it less likely that gaps will form between the substrate 2 and the coating 3. As a result, the ESD resistance of the chip resistor 10 can be further improved. The average particle diameter of the ceramic particles (A) is, for example, 0.5 μm or more and 8 μm or less. The average particle diameter of the α-alumina particles (B) is, for example, 30 nm or more and 1000 nm or less. The ratio of the average particle diameter of the α-alumina particles (B) to the average particle diameter of the ceramic particles (A) is, for example, 1 / 3 or less. When the relationship between the average particle diameter of the ceramic particles (A), the average particle diameter of the α-alumina particles (B), or the ratio thereof is within the above-mentioned range, the ESD resistance of the chip resistor 10 can be further improved.

[0020] Furthermore, the maximum particle size of the α-alumina particles (B) is preferably 1500 nm or less. In this case, the thermal conductivity and smoothness of the ceramic substrate 1 can be further improved. As a result, the thermal conductivity and ESD resistance of the chip resistor 10 can be further improved.

[0021] The coating 3 may contain a sintered body of another inorganic material (hereinafter also referred to as inorganic material (C)) in addition to the sintered body of α-alumina particles (B). However, from the viewpoint of forming the coating 3, it is preferable that the proportion of the α-alumina particles (B) in the entire raw materials for producing the coating 3 is 50 mass % or more. The inorganic material (C) is, for example, boehmite (AlOOH), zirconia (ZrO ２ ), silica (SiO ２ The inorganic material (C) preferably contains at least one selected from the group consisting of α-alumina particles (B), magnesia (MgO), calcia (CaO), aluminum nitride (AlN), etc. Among these, the inorganic material (C) preferably contains boehmite. In this case, the boehmite can enhance the sinterability of the α-alumina particles (B).

[0022] The ceramic substrate 1 has a first main surface 11, a second main surface 12 opposite the first main surface 11, and two side surfaces 13 connecting the first main surface 11 and the second main surface 12. These two side surfaces 13 are visible when the chip resistor 10 is viewed from the side, and face each other in the left-right direction. In this embodiment, the entire first main surface 11 is the support surface 111. In other words, the coating 3 is disposed on the entire surface of the base material 2 on the support surface 111 side.

[0023] (Electrodes) As described above, the chip resistor 10 includes two electrodes 4. Each of the two electrodes 4 is electrically connected to the resistor 5. More specifically, each of the two electrodes 4 includes a surface electrode 41, a back electrode 42, and an end electrode 43. The surface electrode 41 is disposed on the first main surface 11 of the ceramic substrate 1 and is electrically connected to the resistor 5. The back electrode 42 is disposed on the second main surface 12 of the ceramic substrate 1. The end electrode 43 electrically connects the surface electrode 41 and the back electrode 42. In this embodiment, the end electrode 43 is disposed on the side surface 13 of the ceramic substrate 1. Note that "the surface electrode 41 is disposed on the first main surface 11" means that the surface electrode 41 is disposed so as to be in direct contact with the first main surface 11, or that the surface electrode 41 is disposed on the first main surface 11 via an element different from the surface electrode 41. Furthermore, "the back surface electrode 42 is disposed on the second main surface 12" means that the back surface electrode 42 is disposed on the second main surface 12 so as to be in direct contact with the second main surface 12, or that the back surface electrode 42 is disposed on the second main surface 12 via an element different from the back surface electrode 42. "The end surface electrode 43 is disposed on the side surface 13" means that the end surface electrode 43 is disposed on the side surface 13 so as to be in direct contact with the side surface 13, or that the end surface electrode 43 is disposed on the side surface 13 via an element different from the end surface electrode 43.

[0024] As described above, the surface electrode 41 does not have to be in direct contact with the first main surface 11 of the ceramic substrate 1. In this embodiment, the surface electrode 41 is disposed on the first main surface 11 via the resistor 5. In this embodiment, the surface electrode 41 is made of a Ni-based alloy. For example, the surface electrode 41 can be formed from a thin-film conductor obtained by a thin-film process. Therefore, the thin-film conductor for forming the surface electrode 41 contains a Ni-based alloy. Note that each of the two surface electrodes 41 may be composed of multiple electrodes. In this embodiment, the surface electrode 41 has a first surface electrode 411 and a second surface electrode 412 disposed on the first surface electrode 411.

[0025] As described above, the back surface electrode 42 does not need to be in direct contact with the ceramic substrate 1. Therefore, in this embodiment, the chip resistor 10 includes a back surface protective layer 8 disposed on the second main surface 12, and the back surface electrode 42 is disposed on the second main surface 12 of the ceramic substrate 1 via the back surface protective layer 8. In this embodiment, the back surface electrode 42 is made of a Ni-based alloy. For example, the back surface electrode 42 can be formed from a thin-film conductor obtained by a thin-film process. Therefore, the thin-film conductor for forming the back surface electrode 42 contains a Ni-based alloy. Note that when the chip resistor 10 includes the back surface protective layer 8, stress generated in the ceramic substrate 1 can be alleviated. For example, the back surface protective layer 8 can be formed from a resin composition and disposed on the second main surface 12 of the ceramic substrate 1. In this embodiment, the back surface protective layer 8 can be formed from an epoxy resin composition. The thickness of the back surface protective layer 8 is not particularly limited, but is smaller than that of the ceramic substrate 1, for example, approximately 30 μm.

[0026] The end electrode 43 is disposed on the side surface 13 of the ceramic substrate 1. The end electrode 43 contacts a portion of the front surface electrode 41 and a portion of the back surface electrode 42. Specifically, the end electrode 43 is disposed on the side surface 13 so as to contact an end of the first surface electrode 411, an end of the second surface electrode 412, and an end of the back surface electrode 42. In this embodiment, the end electrode 43 is made of a Ni-based alloy. For example, the end electrode 43 can be formed from a thin-film conductor obtained by a thin-film process. Therefore, the thin-film conductor for forming the end electrode 43 contains a Ni-based alloy.

[0027] In this embodiment, the electrode 4 further includes an intermediate electrode 44. Each of the two intermediate electrodes 44 covers the front electrode 41, the back electrode 42, and the end electrode 43, and also covers a portion of the protective film 6. The intermediate electrode 44 is made of Ni plating. The electrode 4 further includes an external electrode 45. Each of the two external electrodes 45 covers the intermediate electrode 44. The external electrode 45 is made of Sn plating.

[0028] (Resistor) The resistor 5 electrically connects the two electrodes 4. As described above, the resistor 5 is superimposed on the support surface 111 of the ceramic substrate 1. In this embodiment, the resistor 5 is disposed on the support surface 111 of the ceramic substrate 1, and two surface electrodes 41 are further disposed thereon (see FIG. 1 ). In this embodiment, the resistor 5 is made of a NiCr-based alloy. For example, the resistor 5 can be formed from a thin-film conductor obtained by a thin-film process. Therefore, in this embodiment, the thin-film conductor used to form the resistor 5 contains a NiCr-based alloy. Furthermore, the resistor 5 is formed in the form of a thin film. In this embodiment, the thickness of the resistor 5 is, for example, 10 nm or more and 1000 nm or less.

[0029] (Protective Film) In this embodiment, the chip resistor 10 further includes a protective film 6 that covers a portion of each of the two electrodes 4 and the resistor element 5. In this embodiment, a portion of the protective film 6 is covered with the second surface electrode 412, the intermediate electrode 44, and the external electrode 45. The protective film 6 can be formed, for example, from an epoxy resin composition containing an epoxy resin, an inorganic filler, a pigment, and the like. The protective film 6 does not need to be in direct contact with the first main surface 11, and in this embodiment, the chip resistor 10 further includes an inorganic protective film 7 interposed between the first main surface 11 and the protective film 6. The inorganic protective film 7 is made of a metal oxide. The metal oxide can be, for example, magnesium oxide (MgO), aluminum oxide (Al ２ O ３ ), silicon oxide (SiO ２ ), nickel oxide (Ni ３ O ４ ) and zirconium oxide (ZrO ２ ) and the like.

[0030] (Manufacturing Method) A manufacturing method for the chip resistor 10 according to this embodiment will be described.

[0031] First, a thin film conductor containing a NiCr-based alloy is formed on the first main surface 11 of the ceramic substrate 1 by a thin film process such as sputtering, and then unnecessary portions of the thin film conductor are removed by a photolithography process to form the resistor 5.

[0032] Next, a thin film conductor containing a Ni-based alloy is formed on the resistor 5 by a thin film process such as sputtering, and then unnecessary portions of the thin film conductor are removed by a photolithography process to form two first surface electrodes 411.

[0033] Next, metal oxide is sputtered to adhere to the resistor 5, a portion of the first surface electrode 411 on the right side in the left-right direction, and a portion of the first surface electrode 411 on the left-right direction, thereby forming the inorganic protective film 7.

[0034] Then, an epoxy resin composition is applied onto the inorganic protective film 7 and heated to harden it, thereby forming the protective film 6 .

[0035] Furthermore, an epoxy resin composition is applied to the second main surface 12 of the ceramic substrate 1 and then dried and cured to form the back surface protection layer 8 .

[0036] Next, a thin-film conductor containing a Ni-based alloy is formed on a portion of the back surface protective layer 8 by a thin-film process such as sputtering, thereby forming two back surface electrodes 42 that overlap the back surface protective layer 8. When forming this thin-film conductor, a metal mask is used in the thin-film process, so that the thin-film conductor is formed only in desired locations on the back surface protective layer 8. The formed thin-film conductor then serves as the back surface electrodes 42.

[0037] Then, two second surface electrodes 412 are formed by forming a thin-film conductor containing a Ni-based alloy by a thin-film process such as sputtering so as to cover a part of the first surface electrode 411 and a part of the protective film 6. When forming this thin-film conductor, a metal mask is used in the thin-film process, so that the thin-film conductor is formed only in desired locations of the first surface electrode 411 and the protective film 6. The formed thin-film conductor then becomes the second surface electrode 412.

[0038] Furthermore, two end electrodes 43 are formed by forming a thin-film conductor containing a Ni-based alloy on each of the two side surfaces 13 of the ceramic substrate 1 using a procedure similar to that used to form the back surface electrode 42. When the front surface electrode 41 and the back surface electrode 42 are formed using the above-described thin-film process, a thin-film conductor may be formed on the side surface 13. Therefore, the end electrode 43 may cover the thin-film conductor formed when the front surface electrode 41 and the back surface electrode 42 are formed.

[0039] Then, the chip resistor 10 is plated with Ni to form two intermediate electrodes 44. Thereafter, the chip resistor 10 is plated with Sn to form two external electrodes 45.

[0040] According to this procedure, the chip resistor 10 according to the first embodiment can be fabricated. Note that the above method is merely one example of a method for fabricating the chip resistor 10 according to this embodiment, and any appropriate method can be adopted.

[0041] 2.2 Second Embodiment A chip resistor 10 according to a second embodiment of the present disclosure will be described. Fig. 2 is a cross-sectional view of the chip resistor 10 according to the second embodiment of the present disclosure. Note that the same description as in the first embodiment may be omitted.

[0042] (Ceramic Substrate) The ceramic substrate 1 may be the same as that in the first embodiment. The shape and thickness of the ceramic substrate 1 may be the same as those of the ceramic substrate 1 in the first embodiment.

[0043] (Electrodes) In this embodiment, similar to the first embodiment, each of the two electrodes 4 has a surface electrode 41, a back electrode 42, and an end electrode 43. The surface electrode 41 is disposed on the first main surface 11 of the ceramic substrate 1 and is electrically connected to the resistor 5. The back electrode 42 is disposed on the second main surface 12 of the ceramic substrate 1. The end electrode 43 electrically connects the surface electrode 41 and the back electrode 42. Similar to the first embodiment, the end electrode 43 is disposed on the side surface 13 of the ceramic substrate 1 and is in contact with the surface electrode 41 and the back electrode 42. More specifically, in this embodiment, the end electrode 43 covers a portion of the second surface electrode 412 from above and a portion of the back electrode 42 from below (see FIG. 2 ).

[0044] The present embodiment differs from the first embodiment in the materials constituting the electrodes. Specifically, in the present embodiment, the first surface electrode 411 is formed from a conductive paste containing Au. Similar to the first embodiment, the surface electrode 41 includes a first surface electrode 411 and a second surface electrode 412 disposed on the first surface electrode 411. However, unlike the first embodiment, the material constituting the second surface electrode 412 is different from the material constituting the first surface electrode 411. Specifically, the second surface electrode 412 is formed from a conductive paste containing Ag and a resin. Similarly to the second surface electrode 412, in the present embodiment, both the back surface electrode 42 and the end surface electrode 43 are formed from a conductive paste containing Ag and a resin.

[0045] The present embodiment also differs from the first embodiment in that the chip resistor 10 does not have a back surface protection layer 8. In other words, the back surface electrode 42 is disposed so as to be in direct contact with the second main surface 12 of the ceramic substrate 1.

[0046] As in the first embodiment, the electrode 4 further includes an intermediate electrode 44 and an external electrode 45. Each of the two intermediate electrodes 44 covers the front electrode 41, the back electrode 42, and the end electrode 43, and also covers a portion of the protective film 6. The intermediate electrode 44 is made of Ni plating. Each of the two external electrodes 45 covers the intermediate electrode 44. The external electrodes 45 are made of Sn plating.

[0047] (Resistor) In the first embodiment, the resistor 5 is disposed on the support surface 111 of the ceramic substrate 1, and further, two surface electrodes 41 are disposed thereon. In contrast, in the present embodiment, the resistor 5 is not interposed between the first surface electrode 411 and the ceramic substrate 1, and the first surface electrode 411 is formed on the ceramic substrate 1, and the resistor 5 is formed so as to cover a part of it.

[0048] The resistor 5 can be formed from a thin-film conductor obtained by a thin-film process, as in the first embodiment, and is made of a NiCr-based alloy. The resistor 5 is also formed in a thin film shape, as in the first embodiment. In this embodiment, the thickness of the resistor 5 may be the same as in the first embodiment, and is, for example, 10 nm to 1000 nm.

[0049] (Protective Film) As in the first embodiment, the chip resistor 10 further includes a protective film 6 that covers a portion of each of the two electrodes 4 and the resistor element 5, and can be formed from an epoxy resin composition containing epoxy resin, inorganic filler, pigment, etc. In the first embodiment, a portion of the protective film 6 was covered by the second surface electrode 412, but in this embodiment, the protective film 6 covers a portion of the second surface electrode 412. Note that, as in the first embodiment, a portion of the protective film 6 is covered by the intermediate electrode 44 and the external electrode 45 in this embodiment as well.

[0050] (Manufacturing Method) A manufacturing method for the chip resistor 10 according to this embodiment will be described.

[0051] First, a conductive paste containing Au is applied onto the first main surface 11 of the ceramic substrate 1 by printing, and then fired at 850° C. to form two first surface electrodes 411 .

[0052] Next, a thin film conductor containing a NiCr-based alloy is formed on the support surface 111 of the ceramic substrate 1 by a thin film process such as sputtering, and then unnecessary portions of the thin film conductor are removed by a photolithography process to form the resistor 5 .

[0053] Next, metal oxide is sputtered to cover the resistor 5, thereby forming the inorganic protective film 7.

[0054] Next, a conductive paste containing resin and Ag is applied onto the inorganic protective film 7. Then, the paste is heated and cured to form two second surface electrodes 412.

[0055] Next, an epoxy resin composition is applied to the inorganic protective film 7 and a portion of the second surface electrode 412, and the epoxy resin composition is heated and cured, thereby forming the protective film 6 that covers the inorganic protective film 7 and a portion of the second surface electrode 412.

[0056] Next, using the same procedure as that used to form the second surface electrode 412, a conductive paste containing resin and Ag is applied to the second main surface 12 of the ceramic substrate 1. This paste is then heated and cured to form two back surface electrodes 42. Furthermore, a conductive paste containing resin and Ag is applied to each of the two side surfaces 13 of the ceramic substrate 1. This paste is then heated and cured to form two end surface electrodes 43.

[0057] Then, the chip resistor 10 is plated with Ni to form two intermediate electrodes 44. Thereafter, the chip resistor 10 is plated with Sn to form two external electrodes 45.

[0058] According to this procedure, the chip resistor 10 according to the second embodiment can be fabricated. Note that the above method is merely one example of a method for fabricating the chip resistor 10 according to this embodiment, and any appropriate method can be adopted.

[0059] 2.3 Modifications The embodiments of the present disclosure are not limited to the above-described embodiments. The above-described embodiments can be modified in various ways depending on the design, etc., as long as the object of the present disclosure can be achieved. Modifications of the above-described embodiments are listed below.

[0060] (Modification 1) The substrate 2 is not limited to an alumina sintered body substrate. That is, the ceramic particles (A) may be aluminum nitride (AlN), zirconia (ZrO ２ ) and silicon nitride (Si ３ N ｉ４In other words, the base material 2 may contain, in addition to the sintered body of alumina particles (A1), a sintered body of at least one type of inorganic particles selected from the group consisting of aluminum nitride, zirconia, silicon nitride, etc.

[0061] (Variation 2) The support surface 111 may have dispersed portions not covered by the coating 3. For example, as shown in FIG. 3 , the coating 3 may be disposed so as to be embedded between minute irregularities on the surface of the substrate 2 and so as to expose a portion of the surface of the substrate 2. When the coating 3 is disposed so as to be embedded between minute irregularities, a portion of the surface of the substrate 2 facing the support surface 111 can be exposed. This can further improve the ESD resistance of the chip resistor 10. Note that the proportion of the area of ​​the portions not covered by the coating 3 to the entire surface of the substrate 2 facing the support surface 111 is preferably 5% or more and 70% or less. If this proportion is 5% or more, the thermal conductivity of the ceramic substrate 1 can be improved. If this proportion is 70% or less, the smoothness of the support surface 111 of the ceramic substrate 1 can be sufficiently improved.

[0062] 3. Aspects As is clear from the above embodiments, the present disclosure includes the following aspects. In the following, reference numerals are given in parentheses only to clarify the correspondence with the embodiments.

[0063] A chip resistor (10) according to a first aspect of the present disclosure includes a ceramic substrate (1), two electrodes (4) disposed on the ceramic substrate (1), and a resistor (5) electrically connecting the two electrodes (4). The ceramic substrate (1) has a base (2) containing a sintered body of ceramic particles (A) and a coating (3) containing a sintered body of alpha-alumina particles (B). The coating (3) covers at least a portion of the surface of the base (2). The average particle diameter of the alpha-alumina particles (B) is smaller than the average particle diameter of the ceramic particles (A). The ceramic substrate (1) has a support surface (111), the surface of the base (2) facing the support surface (111) is coated with the coating (3), and a resistor (5) is overlaid on the support surface (111).

[0064] According to the first aspect, it is possible to provide a chip resistor (10) that can improve thermal conductivity and ESD resistance.

[0065] In a chip resistor (10) according to a second aspect of the present disclosure, in the first aspect, a ceramic substrate (1) has a first main surface (11) and a second main surface (12) opposite the first main surface (11). The support surface (111) is a part of the first main surface (11). Each of the two electrodes (4) has a front electrode (41), a back electrode (42), and an end electrode (43). The front electrode (41) is disposed on the first main surface (11) of the ceramic substrate (1) and electrically connects to the resistor (5). The back electrode (42) is disposed on the second main surface (12) of the ceramic substrate (1). The end electrode (43) electrically connects the front electrode (41) and the back electrode (42).

[0066] The chip resistor (10) according to the third aspect of the present disclosure is the first or second aspect, further comprising a protective film (6) covering a portion of each of the two electrodes (4) and the resistor (5).

[0067] The chip resistor (10) according to a fourth aspect of the present disclosure is the third aspect, further comprising an inorganic protective film (7) interposed between the resistor (5) and the protective film (6).

[0068] The chip resistor (10) according to a fifth aspect of the present disclosure is any one of the second to fourth aspects, further comprising a back surface protection layer (8) disposed on the second main surface (12). A back surface electrode (42) is disposed on the second main surface (12) of the ceramic substrate (1) via the back surface protection layer (8).

[0069] REFERENCE SIGNS LIST 1 ceramic substrate 2 base material 3 coating 4 electrode 5 resistor 6 protective film 7 inorganic protective film 8 back surface protective layer 10 chip resistor 11 first main surface 12 second main surface 13 side surface 41 front surface electrode 42 back surface electrode 43 end surface electrode 111 support surface 411 first surface electrode 412 second surface electrode

Claims

1. A chip resistor comprising: a ceramic substrate; two electrodes disposed on the ceramic substrate; and a resistor electrically connecting the two electrodes; the ceramic substrate has a base material containing a sintered body of ceramic particles (A) and a coating containing a sintered body of alpha-alumina particles (B), the coating covering at least a portion of the surface of the base material, the average particle diameter of the alpha-alumina particles (B) being smaller than the average particle diameter of the ceramic particles (A), the ceramic substrate having a support surface, the surface of the base material facing the support surface being coated with the coating, and the resistor overlying the support surface.

2. The chip resistor according to claim 1, wherein the ceramic substrate has a first main surface and a second main surface opposite the first main surface, the support surface is a part of the first main surface, each of the two electrodes has a front electrode, a back electrode, and an end electrode, the front electrode is disposed on the first main surface of the ceramic substrate and is electrically connected to the resistor, the back electrode is disposed on the second main surface of the ceramic substrate, and the end electrode electrically connects the front electrode and the back electrode.

3. The chip resistor according to claim 2, further comprising a protective film covering a portion of each of the two electrodes and the resistor body.

4. The chip resistor according to claim 3, further comprising an inorganic protective film interposed between the resistor element and the protective film.

5. The chip resistor according to claim 2, further comprising a back surface protection layer disposed on the second main surface, and the back surface electrode is disposed on the second main surface of the ceramic substrate via the back surface protection layer.

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