DC-DC converter and control method

Abstract

The present invention provides a DC-DC converter that is capable of suppressing the overall loss occurring in semiconductor switches and a rectifier circuit while taking into consideration the temperatures of the semiconductor switches and rectifier circuit. A DC-DC converter (1) comprises: a first switch (S1), a second switch (S2), a third switch (S3) and a fourth switch (S4) that are provided on a primary side; a rectifier circuit (D10) including a diode (D5) provided on a secondary side; and a control circuit (10). The control circuit (10): acquires the output voltage of the DC-DC converter (1); acquires the temperatures of the first switch (S1), the second switch (S2), and the diode (D5); in a case in which the output voltage is equal to or greater than a prescribed voltage threshold, lowers the switching frequencies of the first switch (S1), the second switch (S2), the third switch (S3), and the fourth switch (S4); and, in a case in which the output voltage is less than the prescribed voltage threshold, controls the abovementioned switching frequencies on the basis of the acquired temperatures.

Description

DC-DC converter and control method

[0001] The present disclosure relates to an isolated DC-DC converter and a control method.

[0002] Patent Document 1 discloses a DC-DC converter including an isolation transformer, a primary-side full-bridge circuit, a control device that drives switches in the primary-side full-bridge circuit, an output voltage acquisition unit that acquires an output voltage, and a frequency setting unit that sets a frequency according to the output voltage. In this DC-DC converter, the higher the output voltage, the higher the frequency is set, thereby suppressing iron loss in the transformer.

[0003] Japanese Patent Application Laid-Open No. 2019-154209

[0004] However, Patent Document 1 does not disclose a technology for suppressing losses generated in each semiconductor switch and in the rectifier circuit in a DC-DC converter. In a DC-DC converter, suppressing losses generated in each semiconductor switch and in the rectifier circuit is as important as suppressing losses generated in the transformer. Attempting to suppress losses in some semiconductor switches may increase losses in other semiconductor switches, resulting in an increase in the temperature of those switches. Therefore, it is desirable to suppress the sum of the losses generated in each semiconductor switch and the losses generated in the rectifier circuit (referred to as overall loss) while suppressing the temperature increase of each semiconductor switch and the rectifier circuit.

[0005] Therefore, the present disclosure provides a DC-DC converter and the like that can suppress the overall loss generated in each semiconductor switch and rectifier circuit while taking into consideration the temperature of each semiconductor switch and rectifier circuit.

[0006] The DC-DC converter according to the present disclosure is an isolated DC-DC converter and includes a first switch, a second switch, a third switch, a fourth switch, an isolation transformer, a rectifier circuit, and a control circuit. The first switch is provided on a first path connecting an input terminal and a first ground terminal. The second switch is provided on the first path and connected in series with the first switch. The third switch is provided on a second path connecting the input terminal and the first ground terminal, different from the first path. The fourth switch is provided on the second path and connected in series with the third switch. The isolation transformer has a primary winding and a secondary winding, and the primary winding is connected between a first node on the first path between the first switch and the second switch and a second node on the second path between the third switch and the fourth switch. The rectifier circuit includes a semiconductor device and is connected to the secondary winding of the isolation transformer and between the output terminal and a second ground terminal. The control circuit controls switching of the first switch, the second switch, the third switch, and the fourth switch. The control circuit acquires an output voltage between the output terminal and the second ground terminal and acquires temperatures of at least two of the first switch, the second switch, the third switch, and the fourth switch as well as the temperature of the semiconductor device. The control circuit also reduces the switching frequencies of the first switch, the second switch, the third switch, and the fourth switch when the output voltage is equal to or greater than a predetermined voltage threshold, and controls the switching frequency based on the acquired temperatures when the output voltage is less than the predetermined voltage threshold.

[0007] A control method according to the present disclosure is a control method executed by an isolated DC-DC converter, the DC-DC converter including a first switch, a second switch, a third switch, a fourth switch, an isolation transformer, a rectifier circuit, and a control circuit. The first switch is provided on a first path connecting an input terminal and a first ground terminal. The second switch is provided on the first path and connected in series with the first switch. The third switch is provided on a second path connecting the input terminal and the first ground terminal, different from the first path. The fourth switch is provided on the second path and connected in series with the third switch. The isolation transformer has a primary winding and a secondary winding, and the primary winding is connected between a first node on the first path between the first switch and the second switch and a second node on the second path between the third switch and the fourth switch. The rectifier circuit includes a semiconductor device, is connected to a secondary winding of the isolation transformer, and is connected between the output terminal and a second ground terminal. The control method acquires an output voltage between the output terminal and the second ground terminal, and acquires temperatures of at least two of the first switch, the second switch, the third switch, and the fourth switch, and a temperature of the semiconductor device. The control method reduces the switching frequencies of the first switch, the second switch, the third switch, and the fourth switch when the output voltage is equal to or greater than a predetermined voltage threshold, and controls the switching frequencies based on the acquired temperatures when the output voltage is less than the predetermined voltage threshold.

[0008] These comprehensive or specific aspects may be realized as a system, a method, an integrated circuit, a computer program, or a computer-readable recording medium such as a CD-ROM, or may be realized as any combination of a system, a method, an integrated circuit, a computer program, and a recording medium.

[0009] According to a DC-DC converter and a control method according to an aspect of the present disclosure, it is possible to suppress the overall loss occurring in each semiconductor switch and rectifier circuit while taking into consideration the temperature of each semiconductor switch and rectifier circuit.

[0010] FIG. 1 is a circuit configuration diagram showing an example of a DC-DC converter according to an embodiment. FIG. 2 is a diagram for explaining a duty control mode of the DC-DC converter according to an embodiment. FIG. 3 is a diagram showing an example of losses generated in each switch and each diode. FIG. 4 is a graph showing the relationship between a switching frequency and a duty ratio for outputting a target voltage. FIG. 5 is a graph showing the relationship between the switching frequency and the magnitude of various losses for each element. FIG. 6 is a graph showing the relationship between a switching frequency and a duty ratio for outputting each target voltage. FIG. 7 is a graph showing the relationship between a switching frequency for each output voltage and the magnitude of total loss for each element. FIG. 8 is a graph showing the relationship between a switching frequency for each output voltage and the overall loss. FIG. 9 is a diagram for explaining an example of operation of the DC-DC converter according to an embodiment when the output voltage is equal to or higher than a predetermined voltage threshold. FIG. 10 is a diagram for explaining an example of operation of the DC-DC converter according to an embodiment when the output voltage is less than a predetermined voltage threshold. FIG. 11 is a diagram for explaining a method of setting a predetermined voltage threshold. FIG. 12 is a diagram for explaining a phase shift control mode of the DC-DC converter according to an embodiment. FIG. 13 is a flowchart showing an example of a control method according to another embodiment.

[0011] Hereinafter, the embodiments will be specifically described with reference to the drawings.

[0012] The embodiments described below are all comprehensive or specific examples, and the numerical values, shapes, materials, components, arrangement and connection of the components, steps, and order of steps shown in the following embodiments are merely examples and are not intended to limit the present disclosure.

[0013] (Embodiment) Hereinafter, a DC-DC converter according to an embodiment will be described.

[0014] Fig. 1 is a circuit diagram showing an example of a DC-DC converter 1 according to an embodiment. In addition to the DC-DC converter 1, Fig. 1 shows capacitors Cin and Cout and a voltage detection circuit 20. Note that the capacitors Cin and Cout and the voltage detection circuit 20 may be provided in the DC-DC converter 1.

[0015] The DC-DC converter 1 is an isolated DC-DC converter that boosts or drops an input voltage to a predetermined voltage and outputs it. The DC-DC converter 1 has terminals t1, t2, t3, and t4. The terminal t1 is an example of an input terminal. The terminal t2 is an example of a first ground terminal. The terminal t3 is an example of an output terminal. The terminal t4 is an example of a second ground terminal. Note that, since the DC-DC converter 1 is an isolated DC-DC converter, the terminals t2 and t4 are electrically isolated. An input voltage and an input current are input to the terminal t1. The input voltage is the voltage between the terminals t1 and t2. An output voltage and an output current are output from the terminal t3. The output voltage is the voltage between the terminals t3 and t4.

[0016] Capacitor Cin is an input capacitor connected between terminals t1 and t2, and capacitor Cout is an output capacitor (smoothing capacitor) connected between terminals t3 and t4. Voltage detection circuit 20 is a circuit that detects the output voltage between terminals t3 and t4 (the voltage across capacitor Cout).

[0017] The DC-DC converter 1 includes switches S1, S2, S3, and S4, an inductor L1, a transformer T1, a rectifier circuit D10, and a control circuit 10.

[0018] The switch S1 is an example of a first switch provided on a path P1 connecting the terminal t1 and the terminal t2. The path P1 is an example of a first path. The switch S1 is, for example, an N-channel metal oxide semiconductor field effect transistor (MOSFET). The drain of the switch S1 is connected to the terminal t1, and the source of the switch S1 is connected to the drain of the switch S2. FIG. 1 also shows a parasitic diode of the switch S1, and in an equivalent circuit, the anode of the diode is connected to the source of the switch S1 and the cathode is connected to the drain of the switch S1.

[0019] The switch S2 is an example of a second switch that is provided on the path P1 and connected in series with the switch S1. The switch S2 is, for example, an N-channel MOSFET. The drain of the switch S2 is connected to the source of the switch S1, and the source of the switch S2 is connected to the terminal t2. FIG. 1 also shows a parasitic diode of the switch S2, and in the equivalent circuit, the anode of the diode is connected to the source of the switch S2 and the cathode is connected to the drain of the switch S2.

[0020] The switch S3 is an example of a third switch provided on a path P2 that connects the terminal t1 and the terminal t2 and is different from the path P1. The path P2 is an example of a second path. The switch S3 is, for example, an N-channel MOSFET. The drain of the switch S3 is connected to the terminal t1, and the source of the switch S3 is connected to the drain of the switch S4. FIG. 1 also shows a parasitic diode of the switch S3, and in the equivalent circuit, the anode of the diode is connected to the source of the switch S3 and the cathode is connected to the drain of the switch S3.

[0021] The switch S4 is an example of a fourth switch that is provided on the path P2 and connected in series with the switch S3. The switch S4 is, for example, an N-channel MOSFET. The drain of the switch S4 is connected to the source of the switch S3, and the source of the switch S4 is connected to the terminal t2. FIG. 1 also shows a parasitic diode of the switch S4, and in the equivalent circuit, the anode of the diode is connected to the source of the switch S4 and the cathode is connected to the drain of the switch S4.

[0022] The transformer T1 is an isolation transformer and has a primary winding and a secondary winding that are insulated from each other. The primary winding is connected between a node N1 on a path P1 between the switches S1 and S2 and a node N2 on a path P2 between the switches S3 and S4. The node N1 is an example of a first node, and the node N2 is an example of a second node. Both ends of the secondary winding are connected to a rectifier circuit D10. For example, the turns ratio of the transformer T1 is 1:N.

[0023] 1 , inductor L1 is connected between node N1 and the primary winding, and the primary winding is connected between inductor L1 and node N2. Note that inductor L1 may be connected between the secondary winding of transformer T1 and rectifier circuit D10. Alternatively, inductor L1 may be a leakage inductance of transformer T1. Furthermore, in addition to the inductor provided between the primary winding of transformer T1 and node N1 or between the secondary winding of transformer T1 and rectifier circuit D10, an inductor may be provided between terminal t3 and rectifier circuit D10.

[0024] The rectifier circuit D10 is connected to the secondary winding of the transformer T1 and between terminals t3 and t4. The rectifier circuit D10 includes semiconductor elements. For example, the semiconductor elements are diodes. In the example shown in FIG. 1 , the rectifier circuit D10 includes diodes D5, D6, D7, and D8. For example, the rectifier circuit D10 has a full-bridge configuration including diodes D5, D6, D7, and D8, enabling full-wave rectification. One end of the secondary winding is connected to the anode of diode D5 and the cathode of diode D6, and the other end of the secondary winding is connected to the anode of diode D7 and the cathode of diode D8. The rectifier circuit D10 may also have a full-bridge configuration including four semiconductor switches (e.g., MOSFETs). In other words, the semiconductor elements included in the rectifier circuit D10 may be semiconductor switches having body diodes. In the following, an example will be described in which the semiconductor elements included in the rectifier circuit D10 are diodes, but the diodes may be replaced with semiconductor switches.

[0025] The control circuit 10 is a circuit for controlling the switching (on and off) of switches (e.g., switches S1, S2, S3, and S4) included in the DC-DC converter 1. For example, the control circuit 10 controls the switching of the switches S1, S2, S3, and S4 by controlling a gate drive circuit (not shown) connected to the gates of the switches S1, S2, S3, and S4 via a PWM generator (not shown) or the like.

[0026] The control circuit 10 also acquires the output voltage between the terminal t3 and the terminal t4. For example, the control circuit 10 acquires the output voltage from the voltage detection circuit 20.

[0027] The control circuit 10 also acquires the temperatures of at least two of the switches S1, S2, S3, and S4.

[0028] In a duty control mode described below, the control circuit 10 acquires the temperature of at least one of the high-side switches S1 and S3 and the temperature of at least one of the low-side switches S2 and S4 as the temperatures of at least two switches. For example, in the duty control mode, the control circuit 10 may acquire the temperatures of the switches S1 and S2, the temperatures of the switches S1 and S4, the temperatures of the switches S2 and S3, or the temperatures of the switches S3 and S4.

[0029] In a phase shift control mode described below, the control circuit 10 acquires, as the temperatures of at least two switches, the temperature of at least one switch in a first switch group consisting of switches S1 and S2 and the temperature of at least one switch in a second switch group consisting of switches S3 and S4. For example, in the phase shift control mode, the control circuit 10 may acquire the temperatures of switches S1 and S3, or the temperatures of switches S1 and S4, or the temperatures of switches S2 and S3, or the temperatures of switches S2 and S4.

[0030] Furthermore, for example, in the duty control mode or the phase shift control mode, the control circuit 10 may acquire the temperatures of three of the switches S1, S2, S3, and S4 (regardless of the combination of the three switches), or may acquire the temperatures of all of the switches S1, S2, S3, and S4.

[0031] The control circuit 10 also acquires the temperature of the semiconductor elements of the rectifier circuit D10. Specifically, the control circuit 10 acquires the temperature of at least one of the diodes D5, D6, D7, and D8. For example, the control circuit 10 may acquire the temperature of one, two, three, or all four of the diodes D5, D6, D7, and D8.

[0032] For example, temperature sensors are provided in at least two switches and semiconductor elements of the rectifier circuit D10 from which temperatures are acquired, and the control circuit 10 acquires the temperatures from the temperature sensors.

[0033] For example, upper limit temperatures are set for at least two switches and semiconductor elements of the rectifier circuit D10, whose temperatures are acquired, taking into consideration the rated temperature, thermal resistance due to the structure, sensor variations, design margins, and the like.

[0034] The control circuit 10 is a computer including, for example, a processor (microprocessor) and a memory. The memory may be a read-only memory (ROM) or a random access memory (RAM), and can store programs executed by the processor. For example, the control circuit 10 may be implemented by a microcontroller.

[0035] The control circuit 10 has a duty control mode that controls the duty ratio of the switching of the switches S1, S2, S3, and S4, or a phase shift control mode that controls the phase difference between the switching of a first switch group consisting of the switches S1 and S2 and the switching of a second switch group consisting of the switches S3 and S4. The control circuit 10 may have both the duty control mode and the phase shift control mode, or may be switchable between the duty control mode and the phase shift control mode. First, a case where the control circuit 10 operates in the duty control mode will be described.

[0036] 2 is a diagram for explaining the duty control mode of the DC-DC converter 1 according to the embodiment. From the top, Fig. 2 shows graphs of the gate voltage of each switch, the drain current (Id1) and drain-source voltage (Vds1) of the switch S1, the drain current (Id2) and drain-source voltage (Vds2) of the switch S2, the transformer current (IT1) and transformer voltage (VT1) of the transformer T1, and the currents (ID5, ID7) flowing through the diodes D5 and D7 and the voltage (VD5) applied to the diode D5.

[0037] The switches S1, S2, S3, and S4 are each turned on when the gate voltage is high and turned off when the gate voltage is low. When the switches S1 and S4 are on and the switches S2 and S3 are off, a current flows from the terminal t1 to the switch S1, the transformer T1, the switch S4, and the terminal t2. When the switches S1 and S4 are off and the switches S2 and S3 are on, a current flows from the terminal t1 to the switch S3, the transformer T1, the switch S2, and the terminal t2. When the switches S1 and S3 are off and the switches S2 and S4 are on, a freewheeling current flows through the switches S2 and S4. The switches S2 and S4 are an example of two switches through which a freewheeling current flows when the control circuit 10 operates in the duty control mode. The switches S1 and S3 are an example of two switches through which a freewheeling current does not flow when the control circuit 10 operates in the duty control mode.

[0038] In the duty control mode, the control circuit 10 adjusts the duty ratios of the switches S1, S2, S3 and S4 so that the output voltage of the DC-DC converter 1 becomes a desired voltage.

[0039] As shown in FIG. 2 , in the duty control mode in which the duty ratios of the switches S1 and S3 are reduced, zero current switching (ZCS) is not established when the switch S1, which does not pass a freewheeling current, is turned off, resulting in a hard switching state. Although not shown, the switch S3, which does not pass a freewheeling current, also does not establish ZCS when turned off, resulting in a hard switching state. On the other hand, as shown in FIG. 2 , the switch S2, which passes a freewheeling current, establishes zero voltage switching (ZVS) when turned on and ZCS when turned off, resulting in a soft switching state. Although not shown, the switch S4, which passes a freewheeling current, also establishes ZVS when turned on and ZCS when turned off, resulting in a soft switching state.

[0040] 2, a recovery current flows through diodes D5 and D7, causing recovery loss. Although not shown, recovery loss also occurs in diodes D6 and D8.

[0041] Figure 3 is a diagram showing an example of the loss generated in each switch and each diode. In Figure 3, the switching frequency is 100 kHz, the input voltage is 400 V, the output voltage is 850 V, and the output power is 3500 W. Note that each loss varies greatly depending on the characteristics of the semiconductor, so the loss shown in Figure 3 is just an example.

[0042] Switches S1 and S3, which do not pass a freewheeling current, are in a hard switching state, so switches S1 and S3 experience switching loss in addition to conduction loss, as shown in Fig. 3. Switches S2 and S4, which pass a freewheeling current, are in a soft switching state, so switches S2 and S4 experience little switching loss but do experience conduction loss, as shown in Fig. 3. Diodes D5, D6, D7, and D8 experience large recovery loss in addition to conduction loss, as shown in Fig. 3.

[0043] Since switching loss, conduction loss, and recovery loss vary depending on the switching frequency, the control circuit 10 controls the switching frequency so as to reduce losses generated in the switches S1, S2, S3, and S4 and the diodes D5, D6, D7, and D8. Since changing the switching frequency also changes the output voltage, when changing the switching frequency, the control circuit 10 also controls the duty ratios of the switches S1, S2, S3, and S4 to set the output voltage to a target voltage.

[0044] The sum of the various losses (switching loss, recovery loss, conduction loss, etc.) that occur in one switch or one diode is called the total loss. The sum of the losses that occur in switches S1, S2, S3, and S4 and diodes D5, D6, D7, and D8 is called the overall loss.

[0045] 4 is a graph showing the relationship between the switching frequency and duty ratio for setting the output voltage to a target voltage. ｏｕｔ ) to 3500W, output voltage (V ｏｕｔ The figure shows the relationship between the switching frequency and duty ratio to set the input voltage (V) of the inductor L1 to 850 V. The input voltage is 400 V, the inductance of the inductor L1 is 7 μH, the turns ratio of the transformer T1 is √(9000 μH / 1200 μH), and the coupling coefficient is 0.9999.

[0046] As shown in Figure 4, in order to make the output voltage a target voltage when the switching frequency is changed, it is best to monotonically increase the duty ratio as the switching frequency increases. ｏｕｔ , the inductance of the inductor L1 is L ｃｈｏｋｅ , the switching frequency is f ｃ , input voltage is V ｉｎ , output voltage V ｏｕｔ When the winding ratio of the transformer T1 is N, the duty ratio can be expressed by the following equation 1.

[0047]

[0048] Due to the influence of voltage drop or parasitic components, the duty ratio in an actual device may deviate slightly from the value expressed by the above formula 1.

[0049] FIG. 5 is a graph showing the relationship between the switching frequency and the magnitude of various losses for each element. ｏｕｔ ) is 3500W, output voltage (V ｏｕｔ ) is 850V, the input voltage is 400V, the inductance of the inductor L1 is 7 μH, the turns ratio of the transformer T1 is √(9000 μH / 1200 μH), and the coupling coefficient is 0.9999.

[0050] 5A shows the relationship between the switching frequency of switch S1 and the magnitude of various losses generated in switch S1. The relationship between the switching frequency of switch S3 and the magnitude of various losses generated in switch S3 is also shown in FIG.

[0051] 5B shows the relationship between the switching frequency of switch S2 and the magnitude of various losses generated in switch S2. The relationship between the switching frequency of switch S4 and the magnitude of various losses generated in switch S4 is also shown in FIG.

[0052] 5(c) shows the relationship between the switching frequency of diode D5 and the magnitude of various losses occurring in diode D5. The relationship between the switching frequency of diodes D6, D7, and D8 and the magnitude of various losses occurring in diodes D6, D7, and D8 is also shown in FIG.

[0053] In (a) and (b) of FIG. 5, the graph indicated by triangular points represents switching loss, and in (c) of FIG. 5, the graph indicated by triangular points represents recovery loss.

[0054] For switches S1 and S3 through which no freewheeling current flows, as shown in FIG. 5A, the switching loss increases as the switching frequency increases, and therefore the total loss (switching loss and conduction loss) generated in switches S1 and S3 increases monotonically with an increase in the switching frequency.

[0055] For switches S2 and S4 through which the freewheeling current flows, as shown in Figure 5(b), the effective current value decreases as the switching frequency increases, so the total loss (mostly conduction loss) generated in switches S2 and S4 decreases monotonically with increasing switching frequency. As shown in Equation 1 above, as the frequency increases, the duty ratio increases, so the current peak decreases under the condition that the average current is kept the same, and as a result, the effective current value decreases. This is the mechanism by which the effective current value decreases.

[0056] Regarding diodes D5, D6, D7, and D8, as shown in FIG. 5C, the recovery loss increases as the switching frequency increases, and therefore the total loss (recovery loss and conduction loss) generated in diodes D5, D6, D7, and D8 increases monotonically with an increase in the switching frequency.

[0057] As shown in Figures 5(a), (b), and (c), the switching loss and recovery loss increase significantly at switching frequencies of 175 kHz or higher. This is because the conditions for soft switching are no longer satisfied. The conditions for soft switching can be expressed as Equation 2 below.

[0058]

[0059] Batteries mounted on BEVs (Battery Electric Vehicles) are becoming higher in voltage, and when a DC-DC converter 1 is mounted on such a BEV, the output voltage of the DC-DC converter 1 may become large, and when the output voltage is large, the recovery loss of the rectifier diode increases. Here, the relationship between the switching frequency and the duty ratio for outputting each target voltage when the output voltage is changed will be described with reference to FIG.

[0060] 6 is a graph showing the relationship between the switching frequency and duty ratio for outputting each target voltage. ｏｕｔ ) to 3500W, output voltage (V ｏｕｔThe figure shows the relationship between the switching frequency and duty ratio for setting the input voltage (V) of the inductor L1 to 850 V, 675 V, or 500 V. The input voltage is 400 V, the inductance of the inductor L1 is 7 μH, the turns ratio of the transformer T1 is √(9000 μH / 1200 μH), and the coupling coefficient is 0.9999.

[0061] From the above equation 1, the relationship between the switching frequency and the duty ratio shown in Fig. 6 is calculated for each output voltage. As shown in Fig. 6, in order to make the output voltage match the target voltage when the switching frequency is changed, it is clear that it is best to monotonically increase the duty ratio as the switching frequency increases.

[0062] 7 is a graph showing the relationship between the switching frequency for each output voltage and the magnitude of the total loss for each element. ｏｕｔ ) is 3500 W, the output voltage is 850 V, 675 V or 500 V, the input voltage is 400 V, the inductance of the inductor L1 is 7 μH, the turns ratio of the transformer T1 is √(9000 μH / 1200 μH), and the coupling coefficient is 0.9999.

[0063] 7A shows the relationship between the switching frequency of switch S1 and the magnitude of the total loss generated in switch S1 when the output voltage is 850 V, 675 V, and 500 V. The relationship between the switching frequency of switch S3 and the magnitude of the total loss generated in switch S3 when the output voltage is 850 V, 675 V, and 500 V is also shown in FIG.

[0064] Figure 7(b) shows the relationship between the switching frequency of switch S2 and the magnitude of the total loss generated in switch S2 when the output voltage is 850 V, 675 V, and 500 V. Figure 7(b) also shows the relationship between the switching frequency of switch S4 and the magnitude of the total loss generated in switch S4 when the output voltage is 850 V, 675 V, and 500 V.

[0065] Figure 7(c) shows the relationship between the switching frequency of diode D5 and the magnitude of the total loss generated in diode D5 when the output voltage is 850 V, 675 V, and 500 V. Figure 7(c) also shows the relationship between the switching frequency of diodes D6, D7, and D8 and the magnitude of the total loss generated in diodes D6, D7, and D8 when the output voltage is 850 V, 675 V, and 500 V.

[0066] As shown in FIG. 7A, the switches S1 and S3 that do not pass a freewheeling current have a larger total loss as the output voltage decreases due to the influence of conduction loss, and a larger total loss as the switching frequency increases due to the influence of switching loss.

[0067] As shown in FIG. 7B, the total loss of switches S2 and S4 through which the freewheeling current flows increases as the output voltage decreases due to the influence of conduction loss, and the total loss decreases as the switching frequency increases under conditions where soft switching is established.

[0068] As shown in FIG. 7C, the total loss of diodes D5, D6, D7 and D8 increases as the output voltage increases and as the switching frequency increases due to the effect of recovery loss.

[0069] FIG. 8 is a graph showing the relationship between the switching frequency and the total loss (the sum of the total losses of all elements (switches S1, S2, S3, and S4 and diodes D5, D6, D7, and D8)) for each output voltage.

[0070] As shown in FIG. 8 , the lower the switching frequency, the smaller the overall loss, regardless of the output voltage. However, when the output voltage is low, as shown in FIGS. 7A and 7B , the losses generated by the primary-side switches S1, S2, S3, and S4 increase, while the losses generated by the secondary-side diodes D5, D6, D7, and D8 decrease, as shown in FIG. 7C . Therefore, the impact of the losses generated by the switches S1, S2, S3, and S4 on the overall loss generated by the switches S1, S2, S3, and S4 and the diodes D5, D6, D7, and D8 increases. Depending on how the semiconductor switches are controlled, some switches (e.g., switches S1 and S3 that do not pass a freewheeling current) will have smaller losses as the switching frequency decreases, while others (e.g., switches S2 and S4 that pass a freewheeling current) will have smaller losses as the switching frequency increases. In other words, depending on how the semiconductor switches are controlled, some switches will have larger losses as the switching frequency decreases, while others will have larger losses as the switching frequency increases. In other words, when the switching frequency is controlled, the loss in some semiconductor switches is reduced, but the loss in other semiconductor switches is increased, which may cause the temperature of those semiconductor switches to exceed the upper limit temperature. Furthermore, since the loss in the rectifier circuit D10 increases as the switching frequency increases, the temperature of the rectifier circuit D10 may exceed the upper limit temperature.

[0071] In response to this, control circuit 10 controls the switching of switches S1, S2, S3, and S4 in consideration of the output voltage dependence and switching frequency dependence of the total loss of each element and the overall loss of all elements, so as to improve efficiency while ensuring safety. Specifically, control circuit 10 lowers the switching frequency of switches S1, S2, S3, and S4 when the output voltage is equal to or higher than a predetermined voltage threshold, and controls the switching frequency of switches S1, S2, S3, and S4 based on the acquired temperature when the output voltage is below the predetermined voltage threshold. Details of the operation of control circuit 10 will be described using FIGS. 9 and 10 .

[0072] 9 is a diagram illustrating an example of operation of the DC-DC converter 1 according to the embodiment when the output voltage is equal to or greater than a predetermined voltage threshold. From the top to the bottom, FIG. 9 shows graphs of the temperature (Tc1_meas) of switch S1 and the upper limit temperature (Tc1_limit) set for that temperature, the temperature (Tc2_meas) of switch S2 and the upper limit temperature (Tc2_limit) set for that temperature, the temperature (Tc5_meas) of diode D5 and the upper limit temperature (Tc5_limit) set for that temperature, the switching frequency (fsw), the upper limit frequency (f_UlimitA) of the switching frequency and the lower limit frequency (f_Llimit) of the switching frequency, and the total loss (All loss) of all elements. The horizontal axis of the graph represents time. Although not shown, the graph for switch S3 is the same as that for switch S1, the graph for switch S4 is the same as that for switch S2, and the graph for diodes D6, D7, and D8 is the same as that for diode D5.

[0073] 9, the output voltage is 850 V, which is equal to or greater than a predetermined voltage threshold. Details of the predetermined voltage threshold will be described later with reference to FIG.

[0074] When the output voltage is high, as shown in (a) and (b) of Figure 7, the losses generated in switches S1, S2, S3, and S4 are small, so the temperatures of switches S1, S2, S3, and S4 are likely to be low, and the upper limit temperature is unlikely to be exceeded even when the switching frequency is controlled, as shown in Figure 9. On the other hand, when the output voltage is high, as shown in (c) of Figure 7, the losses generated in diodes D5, D6, D7, and D8 are large, so the temperatures of diodes D5, D6, D7, and D8 are likely to be high, and as shown in Figure 9, the upper limit temperature is likely to be exceeded when the switching frequency is high.

[0075] Therefore, when the output voltage is equal to or greater than a predetermined voltage threshold, the control circuit 10 reduces the switching frequency of the switches S1, S2, S3, and S4. For example, at timing "0," the temperature of the diode D5 exceeds the upper limit temperature, but as the switching frequency decreases, the temperature of the diode D5 falls below the upper limit temperature at timing "1." Furthermore, as the switching frequency decreases, the overall loss of all elements also decreases.

[0076] When the switching frequency is low, the excitation current becomes large and the iron loss of the transformer T1 increases. Therefore, if the switching frequency is lowered too much, the core temperature of the transformer T1 increases, and there is a risk that it may eventually be destroyed.

[0077] Therefore, for example, a lower limit frequency may be set for when the switching frequency is lowered, and when the switching frequency reaches the lower limit frequency, the switching frequency may be maintained at the lower limit frequency. For example, the lower limit frequency is set in advance according to the lowest switching frequency that does not damage the transformer T1. This makes it possible to prevent the core temperature of the transformer T1 from increasing and damaging the transformer T1 due to an excessive decrease in the switching frequency.

[0078] Note that the control circuit 10 may acquire the temperature of the transformer T1, and when lowering the switching frequency, if the temperature of the transformer T1 becomes equal to or higher than the upper limit temperature set for the transformer T1, increase the switching frequency until the temperature of the transformer T1 becomes lower than the upper limit temperature set for the transformer T1. In this case, too low a switching frequency can be prevented from increasing the core temperature of the transformer T1 and damaging the transformer T1.

[0079] 10 is a diagram illustrating an example of operation of the DC-DC converter 1 according to the embodiment when the output voltage is less than a predetermined voltage threshold. From the top to the bottom, FIG. 10 shows graphs of the temperature (Tc1_meas) of switch S1 and the upper limit temperature (Tc1_limit) set for that temperature, the temperature (Tc2_meas) of switch S2 and the upper limit temperature (Tc2_limit) set for that temperature, the temperature (Tc5_meas) of diode D5 and the upper limit temperature (Tc5_limit) set for that temperature, the switching frequency (fsw), the upper limit frequency (f_UlimitB) of the switching frequency and the lower limit frequency (f_Llimit) of the switching frequency, and the total loss (All loss) of all elements. The horizontal axis of the graph represents time. Although not shown, the graph for switch S3 is the same as that for switch S1, the graph for switch S4 is the same as that for switch S2, and the graph for diodes D6, D7, and D8 is the same as that for diode D5.

[0080] In FIG. 10, it is assumed that the output voltage is 500V, which is less than a predetermined voltage threshold.

[0081] When the output voltage is low, as shown in (a) and (b) of Figure 7, the losses generated in switches S1, S2, S3, and S4 become large, so the temperatures of switches S1, S2, S3, and S4 tend to rise, and the upper limit temperature is likely to be exceeded when the switching frequency is controlled, as shown in Figure 10. On the other hand, when the output voltage is low, as shown in (c) of Figure 7, the losses generated in diodes D5, D6, D7, and D8 become small, so the temperatures of diodes D5, D6, D7, and D8 tend to be low, and the upper limit temperature is unlikely to be exceeded when the switching frequency is controlled, as shown in Figure 10.

[0082] Therefore, when the output voltage is less than a predetermined voltage threshold, the control circuit 10 controls the switching frequency of the switches S1, S2, S3, and S4 based on the acquired temperatures of at least two switches and the temperatures of the semiconductor elements of the rectifier circuit D10 (e.g., the temperatures of the switches S1 and S2 and the diode D5). For example, when operating in the duty control mode, the control circuit 10 acquires the temperatures of at least two switches, including a first temperature of one of the two switches that passes a freewheeling current and a second temperature of one of the two switches that does not pass a freewheeling current, as well as the temperatures of the semiconductor elements of the rectifier circuit D10. For example, the first temperature is the temperature of the switch S2 (Tc2_meas shown in FIG. 10 ), the second temperature is the temperature of the switch S1 (Tc1_meas shown in FIG. 10 ), and the temperature of the semiconductor element of the rectifier circuit D10 is the temperature of the diode D5 (Tc5_meas shown in FIG. 10 ). For example, when the output voltage is less than a predetermined voltage threshold, the control circuit 10 increases the switching frequency when the temperature of the switch S2 is equal to or higher than the upper limit temperature set for that temperature (Tc2_limit shown in FIG. 10), and decreases the switching frequency when the temperature of the switch S1 is equal to or higher than the upper limit temperature set for that temperature (Tc1_limit shown in FIG. 10).

[0083] For example, at timing "0," the temperature of switch S1 exceeds the upper limit temperature, but as the switching frequency decreases, the temperature of switch S1 falls below the upper limit temperature at timing "1." Furthermore, as the switching frequency decreases, the overall loss of all elements also decreases. When the output voltage is below a predetermined voltage threshold, the control circuit 10 lowers the switching frequency if the acquired temperatures of at least two switches and the temperatures of the semiconductor elements of the rectifier circuit D10 are below their respective upper limit temperatures. For example, at timing "1," the temperatures of all elements, including switches S1 and S2 and diode D5, are normal, so the switching frequency is lowered to reduce the overall loss of the entire system.

[0084] For example, at time "2", the temperature of switch S2 exceeds the upper limit temperature, but as the switching frequency increases, the temperature of switch S2 falls below the upper limit temperature at time "3". On the other hand, at time "3", the temperature of switch S1 exceeds the upper limit temperature again, so the switching frequency is lowered. Thereafter, by repeatedly raising and lowering the switching frequency in this manner, it is possible to prevent the temperatures of all elements from rising too much, while maintaining a small overall loss in all elements.

[0085] Thus, in the duty control mode, the higher the switching frequency, the smaller the loss of two of the switches S1, S2, S3, and S4 through which a freewheeling current flows, and the lower the switching frequency, the smaller the loss of two of the switches S1, S2, S3, and S4 through which a freewheeling current does not flow. Therefore, when the first temperature is equal to or higher than the upper limit temperature, the switching frequency can be increased to reduce the loss generated in the two switches through which a freewheeling current flows, thereby lowering the temperature of the two switches through which a freewheeling current flows. Furthermore, when the second temperature is equal to or higher than the upper limit temperature, the switching frequency can be decreased to reduce the loss generated in the two switches through which a freewheeling current does not flow, thereby lowering the temperature of the two switches through which a freewheeling current does not flow.

[0086] Next, the predetermined voltage threshold will be described with reference to FIG.

[0087] Fig. 11 is a diagram for explaining a method for setting a predetermined voltage threshold, showing a graph illustrating the relationship between the output voltage and the magnitude of the total loss for each element when the switching frequency is 100 kHz and the output power is 3500 W.

[0088] For example, the predetermined voltage threshold is preset according to the lowest output voltage at which the loss generated by a semiconductor element (e.g., diode D5) of rectifier circuit D10 is greater than the loss generated by any of switches S1, S2, S3, and S4 within the variable switching frequency range. For example, if the lowest frequency within the variable switching frequency range is 100 kHz, the loss generated by diode D5 is smallest at 100 kHz. As shown in FIG. 11 , at a switching frequency of 100 kHz, when the output voltage is approximately 700 V or higher, the loss generated by diode D5 is greater than the loss generated by switches S1 and S2. Because a switching frequency of 100 kHz is the frequency condition under which the loss generated by diode D5 is smallest, when the output voltage is approximately 700 V or higher, the loss generated by diode D5 is greater than the loss generated by switches S1 and S2, regardless of the frequency within the variable switching frequency range. Therefore, by setting the predetermined voltage threshold to, for example, 700 V, when the output voltage is equal to or higher than the predetermined voltage threshold of 700 V, the switching frequency is lowered, the loss of diode D5, which has the largest loss, is reduced, and the overall loss can also be reduced.

[0089] In order to set the predetermined voltage threshold precisely, the relationship between the output voltage and loss of each element may be plotted for each switching frequency, and the minimum output voltage at which the loss generated in the semiconductor element of rectifier circuit D10 is greater than the loss generated in any of switches S1, S2, S3, and S4 may be set as the predetermined voltage threshold, regardless of the switching frequency. In this case, a lower voltage can be set as the predetermined voltage threshold than when the predetermined voltage threshold is set only from data at a switching frequency of 100 kHz, and the output voltage range that does not require temperature monitoring is widened; in other words, the output voltage range that requires temperature monitoring is narrowed, simplifying processing.

[0090] Next, the case where the control circuit 10 operates in the phase shift control mode will be described.

[0091] 12 is a diagram for explaining the phase shift control mode of the DC-DC converter 1 according to the embodiment. From the top, Fig. 12 shows graphs of the gate voltage of each switch, the drain current (Id1) and drain-source voltage (Vds1) of the switch S1, and the drain current (Id3) and drain-source voltage (Vds3) of the switch S3.

[0092] The switches S1, S2, S3, and S4 are each turned on when the gate voltage is high and turned off when the gate voltage is low. When the switches S1 and S4 are on and the switches S2 and S3 are off, a current flows from the terminal t1 to the switch S1, the transformer T1, the switch S4, and the terminal t2. When the switches S1 and S4 are off and the switches S2 and S3 are on, a current flows from the terminal t1 to the switch S3, the transformer T1, the switch S2, and the terminal t2. For example, the switching of the first switch group consisting of the switches S1 and S2 leads the switching of the second switch group consisting of the switches S3 and S4. In other words, the switching of the second switch group consisting of the switches S3 and S4 lags the switching of the first switch group consisting of the switches S1 and S2. The switches S1 and S2 are an example of a switch group whose switching phase leads when the control circuit 10 operates in the phase-shift control mode. Switches S3 and S4 are an example of a group of switches whose switching phase lags when control circuit 10 operates in the phase shift control mode.

[0093] In the phase shift control mode, the control circuit 10 adjusts the phase difference between the switching of the switches S1 and S2 and the switching of the switches S3 and S4 so that the output voltage of the DC-DC converter 1 becomes a desired voltage.

[0094] As shown in Figure 12, in the phase-shift control mode in which the switching phases of switches S3 and S4 are delayed relative to the switching phases of switches S1 and S2, when switch S3, whose switching phase is delayed, turns off, ZCS is not established, resulting in a hard switching state. Although not shown, when switch S4, whose switching phase is delayed, turns off, ZCS is not established, resulting in a hard switching state. On the other hand, when switch S1, whose switching phase is advanced, turns on and off, ZCS is established, resulting in a soft switching state, as shown in Figure 12. When switch S2, whose switching phase is advanced, turns on and off, ZCS is also established, resulting in a soft switching state, although not shown.

[0095] Although not shown, in the phase shift control mode as in the duty control mode described with reference to FIG. 2, a recovery current flows through the diodes D5, D6, D7 and D8, causing a recovery loss.

[0096] Switches S3 and S4, which have a delayed switching phase, are in a hard switching state, so switches S3 and S4 experience switching loss in addition to conduction loss. Switches S1 and S2, which have an advanced switching phase, are in a soft switching state, so switches S1 and S2 experience little switching loss but experience conduction loss. Diodes D5, D6, D7, and D8 experience large recovery loss in addition to conduction loss.

[0097] When operating in the phase shift control mode, if the output voltage is equal to or higher than a predetermined voltage threshold, the control circuit 10 reduces the switching frequency of the switches S1, S2, S3 and S4, similar to when operating in the duty control mode.

[0098] When the control circuit 10 operates in the phase-shift control mode and the output voltage is less than a predetermined voltage threshold, the control performed on the two switches (e.g., switches S2 and S4) through which a freewheeling current flows in the duty control mode is performed on the switch group (e.g., switches S1 and S2) of the first and second switch groups whose switching phase is advanced. Also, the control performed on the two switches (e.g., switches S1 and S3) through which a freewheeling current does not flow in the duty control mode is performed on the switch group (e.g., switches S3 and S4) of the first and second switch groups whose switching phase is delayed. Since FIG. 10 can also be used to explain the operation of the DC-DC converter 1 when the control circuit 10 operates in the phase-shift control mode and the output voltage is less than a predetermined voltage threshold, the following explanation will be made again using FIG. 10 .

[0099] However, when the control circuit 10 operates in the phase shift control mode, FIG. 10 shows, from the top, a graph of the temperature of switch S3 (Tc1_meas) and the upper limit temperature (Tc1_limit) set for that temperature, the temperature of switch S1 (Tc2_meas) and the upper limit temperature (Tc2_limit) set for that temperature, the temperature of diode D5 (Tc5_meas) and the upper limit temperature (Tc5_limit) set for that temperature, the switching frequency (fsw), the upper limit frequency (f_UlimitB) and the lower limit frequency (f_Llimit) of the switching frequency, and the total loss of all elements (All loss).

[0100] When the output voltage is less than a predetermined voltage threshold, the control circuit 10 controls the switching frequency of the switches S1, S2, S3, and S4 based on the acquired temperatures of at least two switches and the temperatures of semiconductor elements of the rectifier circuit D10 (e.g., the temperatures of the switches S1 and S3 and the diode D5). For example, when operating in the phase-shift control mode, the control circuit 10 acquires temperatures of at least two switches, including a third temperature of one switch included in a switch group of the first and second switch groups whose switching phase is advanced and a fourth temperature of one switch included in a switch group of the first and second switch groups whose switching phase is delayed, as well as the temperatures of the semiconductor elements of the rectifier circuit D10. For example, the third temperature is the temperature of the switch S1 (Tc2_meas shown in FIG. 10 ), the fourth temperature is the temperature of the switch S3 (Tc1_meas shown in FIG. 10 ), and the temperature of the semiconductor element of the rectifier circuit D10 is the temperature of the diode D5 (Tc5_meas shown in FIG. 10 ). For example, when the output voltage is less than a predetermined voltage threshold, the control circuit 10 increases the switching frequency when the temperature of switch S1 is equal to or higher than the upper limit temperature set for that temperature (Tc2_limit shown in FIG. 10), and decreases the switching frequency when the temperature of switch S3 is equal to or higher than the upper limit temperature set for that temperature (Tc1_limit shown in FIG. 10).

[0101] For example, at timing "0," the temperature of switch S3 exceeds the upper limit temperature, but as the switching frequency decreases, the temperature of switch S3 falls below the upper limit temperature at timing "1." Furthermore, as the switching frequency decreases, the overall loss of all elements also decreases. When the output voltage is below a predetermined voltage threshold, the control circuit 10 lowers the switching frequency if the acquired temperatures of at least two switches and the temperatures of the semiconductor elements of the rectifier circuit D10 are below their respective upper limit temperatures. For example, at timing "1," the temperatures of all elements, including switches S1 and S3 and diode D5, are normal, so the switching frequency is lowered to reduce the overall loss of the entire system.

[0102] For example, at time "2", the temperature of switch S1 exceeds the upper limit temperature, but as the switching frequency increases, the temperature of switch S1 falls below the upper limit temperature at time "3". On the other hand, at time "3", the temperature of switch S3 exceeds the upper limit temperature again, so the switching frequency is lowered. Thereafter, by repeatedly raising and lowering the switching frequency in this manner, it is possible to prevent the temperatures of all elements from rising too much, while maintaining a small overall loss in all elements.

[0103] In this way, in the phase-shift control mode, the higher the switching frequency, the smaller the loss of the group of switches S1, S2, S3, and S4 whose switching phase is advanced, and the lower the switching frequency, the smaller the loss of the group of switches S1, S2, S3, and S4 whose switching phase is delayed. Therefore, when the third temperature is equal to or higher than the upper limit temperature, the switching frequency can be increased to reduce the loss generated in the group of switches whose switching phase is advanced, thereby lowering the temperature of the group of switches whose switching phase is advanced. On the other hand, when the fourth temperature is equal to or higher than the upper limit temperature, the switching frequency can be decreased to reduce the loss generated in the group of switches whose switching phase is delayed, thereby lowering the temperature of the group of switches whose switching phase is delayed.

[0104] For example, the upper limit frequency when the switching frequency is increased is set in advance according to the maximum switching frequency at which soft switching of the switches S1, S2, S3, and S4 is established. For example, the upper limit frequency can be expressed by the following equation 3.

[0105]

[0106] This prevents the switching frequency from rising too high, preventing soft switching from being achieved. Note that the switching frequency in an actual device may deviate slightly from the value expressed by Equation 3 above due to the effects of voltage drop or parasitic components.

[0107] Note that even if the switching frequency is controlled, at least one of the temperatures of the at least two switches and the semiconductor elements of the rectifier circuit D10 may not fall below the upper limit temperature. Therefore, when at least one of the temperatures of the at least two switches and the semiconductor elements of the rectifier circuit D10 remains above a set upper limit temperature for a predetermined period of time, the control circuit 10 may control the switching of the switches S1, S2, S3, and S4 to reduce the output power, or may stop the switching of the switches S1, S2, S3, and S4. In this way, when the temperature of the semiconductor switch or the temperature of the rectifier circuit D10 continues to remain above the upper limit temperature, the temperature can be forcibly lowered.

[0108] Furthermore, there may be cases where at least one of the temperatures of the at least two switches and the semiconductor elements of the rectifier circuit D10 significantly exceeds the upper limit temperature. Therefore, when at least one of the temperatures of the at least two switches and the semiconductor elements of the rectifier circuit D10 exceeds the set upper limit temperature by a certain amount, the control circuit 10 may control the switching of the switches S1, S2, S3, and S4 to reduce the output power, or may stop the switching of the switches S1, S2, S3, and S4. In this way, when the temperature of the semiconductor switches or the temperature of the rectifier circuit D10 exceeds the upper limit temperature by a certain amount, the temperature can be forcibly lowered.

[0109] Furthermore, the temperatures of multiple elements may simultaneously exceed the upper limit temperature. Therefore, when at least two of the temperatures of at least two switches and the temperatures of the semiconductor elements of the rectifier circuit D10 are equal to or higher than their respective upper limit temperatures, the control circuit 10 may control the switching of the switches S1, S2, S3, and S4 to reduce the output power, or may stop the switching of the switches S1, S2, S3, and S4. In this way, when the temperature of the semiconductor switches or the temperature of the rectifier circuit D10 is equal to or higher than the upper limit temperature at multiple points, the temperature can be forcibly lowered.

[0110] As described above, when the output voltage is high, the losses generated in the switches S1, S2, S3, and S4 are small and the losses generated in the rectifier circuit D10 are large, so the impact of the losses generated in the rectifier circuit D10 on the overall losses generated in the switches S1, S2, S3, and S4 and the rectifier circuit D10 is greater. Furthermore, the lower the switching frequency, the smaller the losses generated in the rectifier circuit D10. For these reasons, when the output voltage is high, the overall losses generated in the switches S1, S2, S3, and S4 and the rectifier circuit D10 can be suppressed by lowering the switching frequency.

[0111] When the output voltage is low, the losses generated by the switches S1, S2, S3, and S4 increase, while the losses generated by the rectifier circuit D10 decrease. This increases the impact of the losses generated by the switches S1, S2, S3, and S4 on the overall losses generated by the switches S1, S2, S3, and S4 and the rectifier circuit D10. Depending on how the semiconductor switches are controlled, some switches experience smaller losses as the switching frequency decreases, while others experience smaller losses as the switching frequency increases. In other words, depending on how the semiconductor switches are controlled, some switches experience larger losses as the switching frequency decreases, while others experience larger losses as the switching frequency increases. In other words, controlling the switching frequency reduces losses in some semiconductor switches, but increases losses in others, potentially causing the temperature of those switches to exceed their upper limit. Because the rectifier circuit D10 experiences larger losses as the switching frequency increases, the temperature of the rectifier circuit D10 may exceed its upper limit.

[0112] Therefore, the temperatures of at least two of the switches S1, S2, S3, and S4 and the temperature of the semiconductor elements of the rectifier circuit D10 (e.g., the temperature of at least one of the diodes D5, D6, D7, and D8) are monitored. It is not necessary to monitor all of the temperatures of the switches S1, S2, S3, and S4. Two of the switches S1, S2, S3, and S4 experience similarly large losses (i.e., similar temperature increases) as the switching frequency decreases, while the other two switches experience similarly large losses (i.e., similar temperature increases) as the switching frequency increases. Therefore, it is sufficient to monitor the temperature of one of the two switches whose losses increase as the switching frequency decreases, and the temperature of one of the two switches whose losses increase as the switching frequency increases. When the output voltage is low, controlling the switching frequency based on the temperatures of at least two switches and the semiconductor elements of the rectifier circuit D10 prevents the temperatures of the semiconductor switches and the rectifier circuit from rising too high.

[0113] In this way, the overall loss occurring in each semiconductor switch and rectifier circuit can be suppressed while taking into consideration the temperature of each semiconductor switch and rectifier circuit.

[0114] (Other Embodiments) As described above, the embodiments have been described as examples of the technology according to the present disclosure. However, the technology according to the present disclosure is not limited to these, and can be applied to embodiments in which modifications, substitutions, additions, omissions, etc. are made as appropriate. For example, the following modifications are also included in one embodiment of the present disclosure.

[0115] For example, the present disclosure can be realized not only as the DC-DC converter 1 but also as a control method including steps (processing) performed by the components that make up the DC-DC converter 1 .

[0116] FIG. 13 is a flowchart showing an example of a control method according to another embodiment.

[0117] The control method is executed by an isolated DC-DC converter 1, and the DC-DC converter 1 includes: a first switch provided on a first path connecting an input terminal and a first ground terminal; a second switch provided on the first path and connected in series with the first switch; a third switch provided on a second path different from the first path connecting the input terminal and the first ground terminal; a fourth switch provided on the second path and connected in series with the third switch; an isolation transformer having a primary winding connected between a first node on the first path between the first switch and the second switch and a second node on the second path between the third switch and the fourth switch; and a rectifier circuit including a semiconductor element connected between the output terminal and a second ground terminal. The control method includes acquiring an output voltage between the output terminal and the second ground terminal (step S11), acquiring temperatures of at least two of the first switch, the second switch, the third switch, and the fourth switch, and acquiring temperatures of the semiconductor elements (step S12), and if the output voltage is equal to or greater than a predetermined voltage threshold (Yes in step S13), lowering the switching frequencies of the first switch, the second switch, the third switch, and the fourth switch (step S14), and if the output voltage is less than the predetermined voltage threshold (No in step S13), controlling the switching frequency based on the acquired temperatures (step S15).

[0118] For example, the present disclosure can be realized as a program for causing a computer (processor) to execute steps included in the control method. Furthermore, the present disclosure can be realized as a non-transitory computer-readable recording medium, such as a CD-ROM, on which the program is recorded.

[0119] For example, when the present disclosure is realized as a program (software), each step is performed by running the program using hardware resources such as a computer's CPU, memory, input / output circuits, etc. In other words, each step is performed by the CPU acquiring data from memory or input / output circuits, etc., performing calculations, and outputting the calculation results to memory or input / output circuits, etc.

[0120] In the above embodiment, each component included in the DC-DC converter 1 may be configured with dedicated hardware or may be realized by executing a software program suitable for each component. Each component may be realized by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0121] Some or all of the functions of the DC-DC converter 1 according to the above embodiment are typically realized as an LSI, which is an integrated circuit. These may be individually integrated into single chips, or some or all of them may be integrated into a single chip. Furthermore, the integrated circuit is not limited to an LSI, and may be realized using a dedicated circuit or a general-purpose processor. It is also possible to use an FPGA (Field Programmable Gate Array) that can be programmed after LSI manufacturing, or a reconfigurable processor that can reconfigure the connections and settings of circuit cells within the LSI.

[0122] Furthermore, if an integrated circuit technology that can replace LSIs emerges due to advances in semiconductor technology or other derived technologies, it is natural that each component included in the DCDC converter 1 can be integrated using that technology.

[0123] In addition, this disclosure also includes forms obtained by making various modifications to the embodiments that a person skilled in the art would think of, and forms realized by arbitrarily combining the components and functions in each embodiment within the scope of the present disclosure.

[0124] (Additional Notes) The above description of the embodiments discloses the following techniques.

[0125] (Technology 1) An isolated DC-DC converter includes: a first switch provided on a first path connecting an input terminal and a first ground terminal; a second switch provided on the first path and connected in series with the first switch; a third switch provided on a second path different from the first path connecting the input terminal and the first ground terminal; a fourth switch provided on the second path and connected in series with the third switch; an isolation transformer having a primary winding connected between a first node on the first path between the first switch and the second switch and a second node on the second path between the third switch and the fourth switch; and a second winding connected to a secondary winding of the isolation transformer and connecting an output terminal and a second ground terminal. and a control circuit that controls switching of the first switch, the second switch, the third switch, and the fourth switch, wherein the control circuit obtains an output voltage between the output terminal and the second ground terminal, obtains temperatures of at least two of the first switch, the second switch, the third switch, and the fourth switch, and a temperature of the semiconductor device, and reduces a switching frequency of the first switch, the second switch, the third switch, and the fourth switch when the output voltage is equal to or greater than a predetermined voltage threshold, and controls the switching frequency based on the obtained temperatures when the output voltage is less than the predetermined voltage threshold.

[0126] When the output voltage is high, the losses generated in each semiconductor switch (first switch, second switch, third switch, and fourth switch) on the primary side are small, while the losses generated in the rectifier circuit on the secondary side are large, so the impact of the losses generated in the rectifier circuit on the overall losses generated in each semiconductor switch and rectifier circuit is large. Also, the lower the switching frequency, the smaller the losses generated in the rectifier circuit. For these reasons, when the output voltage is high, the overall losses generated in each semiconductor switch and rectifier circuit can be suppressed by lowering the switching frequency.

[0127] When the output voltage is low, the losses generated in each semiconductor switch on the primary side increase and the losses generated in the rectifier circuit on the secondary side decrease, resulting in a greater impact on the overall losses generated in each semiconductor switch and rectifier circuit. Furthermore, depending on how the semiconductor switches are controlled, some losses decrease as the switching frequency decreases, while others decrease as the switching frequency increases. In other words, depending on how the semiconductor switches are controlled, some losses increase as the switching frequency decreases, while others increase as the switching frequency increases. In other words, controlling the switching frequency reduces losses in some semiconductor switches, but increases losses in others, potentially causing the temperature of those switches to exceed their upper limit. Furthermore, because the rectifier circuit experiences greater losses as the switching frequency increases, there is a risk that the temperature of the rectifier circuit may exceed its upper limit.

[0128] Therefore, the temperatures of at least two of the semiconductor switches and the temperature of the semiconductor elements of the rectifier circuit are monitored. It is not necessary to monitor all of the temperatures of the first, second, third, and fourth switches. Two of the first, second, third, and fourth switches experience similar increases in loss (i.e., similar increases in temperature) as the switching frequency decreases, while the other two switches experience similar increases in loss (i.e., similar increases in temperature) as the switching frequency increases. Therefore, it is sufficient to monitor the temperature of one of the two switches whose losses increase as the switching frequency decreases, and the temperature of one of the two switches whose losses increase as the switching frequency increases. When the output voltage is low, controlling the switching frequency based on the temperatures of at least two switches and the semiconductor elements of the rectifier circuit can prevent the temperatures of the semiconductor switches and the rectifier circuit from rising too high.

[0129] In this way, the overall loss occurring in each semiconductor switch and rectifier circuit can be suppressed while taking into consideration the temperature of each semiconductor switch and rectifier circuit.

[0130] (Technology 2) A DC-DC converter according to Technology 1, wherein upper limit temperatures are set for the at least two switches and the semiconductor element, respectively, and the control circuit reduces the switching frequency when the output voltage is below a predetermined voltage threshold and the temperatures of the at least two switches and the semiconductor element are below their respective upper limit temperatures.

[0131] Basically, the lower the switching frequency, the smaller the loss generated in the semiconductor elements of each semiconductor switch and rectifier circuit. Therefore, if the temperatures of at least two switches and the semiconductor elements of the rectifier circuit are all below the upper limit temperature, the overall loss generated in each semiconductor switch and rectifier circuit can be suppressed by lowering the switching frequency.

[0132] (Technology 3) The DC-DC converter according to Technology 1 or 2, wherein the control circuit has a duty control mode that controls switching duty ratios of the first switch, the second switch, the third switch, and the fourth switch, and when operating in the duty control mode, acquires temperatures of the at least two switches, including a first temperature of one of the two switches that passes a reflux current and a second temperature of one of the two switches that does not pass a reflux current, as well as a temperature of the semiconductor element, and when the output voltage is less than a predetermined voltage threshold, increases the switching frequency if the first temperature is equal to or higher than an upper limit temperature set for the first temperature, and decreases the switching frequency if the second temperature is equal to or higher than an upper limit temperature set for the second temperature.

[0133] In the duty control mode, the higher the switching frequency, the smaller the loss of two of the first, second, third, and fourth switches through which a freewheeling current flows, and the lower the switching frequency, the smaller the loss of two of the first, second, third, and fourth switches through which a freewheeling current does not flow. Therefore, when the first temperature is equal to or higher than the upper limit temperature, the switching frequency can be increased to reduce the loss generated in the two switches through which a freewheeling current flows, thereby lowering the temperature of the two switches through which a freewheeling current flows. Furthermore, when the second temperature is equal to or higher than the upper limit temperature, the switching frequency can be decreased to reduce the loss generated in the two switches through which a freewheeling current does not flow, thereby lowering the temperature of the two switches through which a freewheeling current does not flow.

[0134] (Technology 4) The DC-DC converter according to any one of Technologies 1 to 3, wherein the control circuit has a phase shift control mode for controlling a phase difference between switching of a first switch group consisting of the first switch and the second switch and switching of a second switch group consisting of the third switch and the fourth switch, and when operating in the phase shift control mode, acquires temperatures of the at least two switches, including a third temperature of one switch included in a switch group of the first switch group and the second switch group whose switching phase is advanced and a fourth temperature of one switch included in a switch group of the first switch group and the second switch group whose switching phase is delayed, as well as a temperature of the semiconductor element, and when the output voltage is less than a predetermined voltage threshold, increases the switching frequency if the third temperature is equal to or higher than an upper limit temperature set for the third temperature, and decreases the switching frequency if the fourth temperature is equal to or higher than an upper limit temperature set for the fourth temperature.

[0135] In the phase-shift control mode, the higher the switching frequency, the smaller the loss of the group of switches among the first switch, the second switch, the third switch, and the fourth switch whose switching phase is advanced, and the lower the switching frequency, the smaller the loss of the group of switches among the first switch, the second switch, the third switch, and the fourth switch whose switching phase is delayed. Therefore, when the third temperature is equal to or higher than the upper limit temperature, the switching frequency can be increased to reduce the loss generated in the group of switches whose switching phase is advanced, thereby lowering the temperature of the group of switches whose switching phase is advanced. On the other hand, when the fourth temperature is equal to or higher than the upper limit temperature, the switching frequency can be decreased to reduce the loss generated in the group of switches whose switching phase is delayed, thereby lowering the temperature of the group of switches whose switching phase is delayed.

[0136] (Technology 5) A DC-DC converter according to any one of Technologies 1 to 4, wherein the predetermined voltage threshold is set in advance according to the lowest output voltage at which the loss generated in the semiconductor element is greater than the loss generated in any of the first switch, the second switch, the third switch, and the fourth switch within a variable range of the switching frequency.

[0137] In this way, a predetermined threshold voltage can be set.

[0138] (Technology 6) The DC-DC converter according to any one of Technologies 1 to 5, wherein a lower limit frequency when the switching frequency is lowered is set in advance according to the lowest switching frequency at which the isolation transformer is not broken.

[0139] This makes it possible to prevent the core temperature of the isolation transformer from rising and breaking down due to an excessive decrease in the switching frequency.

[0140] (Technology 7) In the DC-DC converter according to any one of Technologies 1 to 6, the control circuit further acquires a temperature of the isolation transformer, and when lowering the switching frequency, if the temperature of the isolation transformer becomes equal to or higher than an upper limit temperature set for the isolation transformer, increases the switching frequency until the temperature of the isolation transformer becomes lower than the upper limit temperature set for the isolation transformer.

[0141] This makes it possible to prevent the core temperature of the isolation transformer from rising and breaking down due to an excessive decrease in the switching frequency.

[0142] (Technology 8) A DC-DC converter according to any one of Technologies 1 to 7, wherein an upper limit frequency when the switching frequency is increased is set in advance according to the maximum switching frequency at which soft switching of the first switch, the second switch, the third switch, and the fourth switch is established.

[0143] This makes it possible to prevent the switching frequency from increasing too much, preventing soft switching from being achieved.

[0144] (Technology 9) A DC-DC converter according to any one of Technologies 1 to 8, wherein the control circuit controls the switching of the first switch, the second switch, the third switch, and the fourth switch so as to reduce output power when at least one of the temperatures of the at least two switches and the temperature of the semiconductor element is equal to or higher than a set upper limit temperature for a predetermined period of time, or stops switching of the first switch, the second switch, the third switch, and the fourth switch.

[0145] According to this, if the temperature of the semiconductor switch or the temperature of the rectifier circuit continues to be equal to or higher than the upper limit temperature, the temperature can be forcibly lowered.

[0146] (Technology 10) A DC-DC converter according to any one of Technologies 1 to 9, wherein the control circuit controls switching of the first switch, the second switch, the third switch, and the fourth switch so as to reduce output power when the temperature of at least one of the at least two switches and the temperature of the semiconductor element exceeds a set upper limit temperature by a certain amount or more, or stops switching of the first switch, the second switch, the third switch, and the fourth switch.

[0147] According to this, when the temperature of the semiconductor switch or the temperature of the rectifier circuit exceeds the upper limit temperature by a certain amount, the temperature can be forcibly lowered.

[0148] (Technology 11) A DC-DC converter according to any one of Technologies 1 to 10, wherein the control circuit controls switching of the first switch, the second switch, the third switch, and the fourth switch so as to reduce output power when at least two temperatures of the at least two switches and the temperature of the semiconductor element are equal to or higher than upper limit temperatures set for the respective switches, or stops switching of the first switch, the second switch, the third switch, and the fourth switch.

[0149] According to this, when the temperature of the semiconductor switch or the temperature of the rectifier circuit is equal to or higher than the upper limit temperature at multiple points, the temperature can be forcibly lowered.

[0150] (Technology 12) A control method executed by an isolated DC-DC converter, the DC-DC converter including: a first switch provided on a first path connecting an input terminal and a first ground terminal; a second switch provided on the first path and connected in series with the first switch; a third switch provided on a second path different from the first path connecting the input terminal and the first ground terminal; a fourth switch provided on the second path and connected in series with the third switch; and a primary winding connected between a first node on the first path between the first switch and the second switch and a second node on the second path between the third switch and the fourth switch. and a rectifier circuit including a semiconductor element connected to a secondary winding of the isolation transformer and connected between an output terminal and a second ground terminal, wherein the control method includes acquiring an output voltage between the output terminal and the second ground terminal, acquiring temperatures of at least two switches from among the first switch, the second switch, the third switch, and the fourth switch, and acquiring a temperature of the semiconductor element, and lowering a switching frequency of the first switch, the second switch, the third switch, and the fourth switch when the output voltage is equal to or greater than a predetermined voltage threshold, and controlling the switching frequency based on the acquired temperatures when the output voltage is less than the predetermined voltage threshold.

[0151] This makes it possible to provide a control method that can suppress the overall loss occurring in each semiconductor switch and rectifier circuit while taking into consideration the temperature of each semiconductor switch and rectifier circuit.

[0152] The present disclosure can be applied to an isolated DC-DC converter or the like.

[0153] 1 DC-DC converter 10 Control circuit 20 Voltage detection circuit Cin, Cout Capacitors D5, D6, D7, D8 Diode D10 Rectifier circuit L1 Inductors N1, N2 Nodes P1, P2 Paths S1, S2, S3, S4 Switch T1 Transformer t1, t2, t3, t4 Terminals

Claims

1. An isolated DC-DC converter comprising: a first switch provided on a first path connecting an input terminal and a first ground terminal; a second switch provided on the first path and connected in series with the first switch; a third switch provided on a second path different from the first path connecting the input terminal and the first ground terminal; a fourth switch provided on the second path and connected in series with the third switch; an isolated transformer having a primary winding connected between a first node on the first path between the first switch and the second switch and a second node on the second path between the third switch and the fourth switch; a rectifier circuit including a semiconductor element connected to the secondary winding of the isolated transformer and connected between an output terminal and a second ground terminal; and a control circuit that controls switching of the first switch, the second switch, the third switch, and the fourth switch, wherein the control circuit obtains an output voltage between the output terminal and the second ground terminal, a temperature of at least two of the first switch, the second switch, the third switch, and the fourth switch, and a temperature of the semiconductor element are acquired; when the output voltage is equal to or higher than a predetermined voltage threshold, the switching frequency of the first switch, the second switch, the third switch, and the fourth switch is reduced; and when the output voltage is lower than the predetermined voltage threshold, the switching frequency is controlled based on the acquired temperatures.

2. The DC-DC converter according to claim 1, wherein upper limit temperatures are set for the at least two switches and the semiconductor element, and when the output voltage is below a predetermined voltage threshold, the control circuit reduces the switching frequency if the temperatures of the at least two switches and the semiconductor element are below their respective upper limit temperatures.

3. The DC-DC converter according to claim 1, wherein the control circuit has a duty control mode that controls the switching duty ratios of the first switch, the second switch, the third switch, and the fourth switch, and when operating in the duty control mode, acquires temperatures of the at least two switches, including a first temperature of one of the two switches that passes a reflux current and a second temperature of one of the two switches that does not pass a reflux current, as well as the temperature of the semiconductor element, and when the output voltage is less than a predetermined voltage threshold, increases the switching frequency when the first temperature is equal to or higher than an upper limit temperature set for the first temperature, and decreases the switching frequency when the second temperature is equal to or higher than an upper limit temperature set for the second temperature.

4. The DC-DC converter according to claim 1, wherein the control circuit has a phase shift control mode for controlling a phase difference between switching of a first switch group consisting of the first switch and the second switch and switching of a second switch group consisting of the third switch and the fourth switch, and when operating in the phase shift control mode, acquires temperatures of the at least two switches, including a third temperature of one switch included in the switch group of the first switch group and the second switch group whose switching phase is advanced and a fourth temperature of one switch included in the switch group of the first switch group and the second switch group whose switching phase is delayed, as well as the temperature of the semiconductor element, and when the output voltage is less than a predetermined voltage threshold, increases the switching frequency when the third temperature is equal to or higher than an upper limit temperature set for the third temperature, and decreases the switching frequency when the fourth temperature is equal to or higher than an upper limit temperature set for the fourth temperature.

5. The DC-DC converter according to any one of claims 1 to 4, wherein the predetermined voltage threshold is set in advance according to the lowest output voltage at which loss generated in the semiconductor element is greater than loss generated in any of the first switch, the second switch, the third switch, and the fourth switch within the variable range of the switching frequency.

6. The DC-DC converter according to any one of claims 1 to 4, wherein a lower limit frequency when the switching frequency is lowered is set in advance according to the lowest switching frequency at which the isolation transformer is not destroyed.

7. The DC-DC converter according to any one of claims 1 to 4, wherein the control circuit further acquires the temperature of the isolation transformer, and when the temperature of the isolation transformer becomes equal to or higher than an upper limit temperature set for the isolation transformer while lowering the switching frequency, increases the switching frequency until the temperature of the isolation transformer becomes less than the upper limit temperature set for the isolation transformer.

8. The DC-DC converter according to any one of claims 1 to 4, wherein an upper limit frequency when the switching frequency is increased is set in advance according to the maximum switching frequency at which soft switching of the first switch, the second switch, the third switch, and the fourth switch is established.

9. The DC-DC converter according to any one of claims 1 to 4, wherein the control circuit controls the switching of the first switch, the second switch, the third switch, and the fourth switch so as to reduce output power when at least one of the temperatures of the at least two switches and the temperature of the semiconductor element remains above a set upper limit temperature for a predetermined period of time, or stops switching of the first switch, the second switch, the third switch, and the fourth switch.

10. The DC-DC converter according to any one of claims 1 to 4, wherein the control circuit controls switching of the first switch, the second switch, the third switch, and the fourth switch so as to reduce output power when the temperature of at least one of the at least two switches and the temperature of the semiconductor element exceeds a set upper limit temperature by a certain amount or more, or stops switching of the first switch, the second switch, the third switch, and the fourth switch.

11. The DC-DC converter according to any one of claims 1 to 4, wherein the control circuit controls switching of the first switch, the second switch, the third switch, and the fourth switch so as to reduce output power when at least two of the temperatures of the at least two switches and the temperature of the semiconductor element are equal to or higher than upper limit temperatures set for each of them, or stops switching of the first switch, the second switch, the third switch, and the fourth switch.

12. A control method executed by an isolated DC-DC converter, wherein the DC-DC converter comprises: a first switch provided on a first path connecting an input terminal and a first ground terminal; a second switch provided on the first path and connected in series with the first switch; a third switch provided on a second path different from the first path connecting the input terminal and the first ground terminal; a fourth switch provided on the second path and connected in series with the third switch; an isolated transformer having a primary winding connected between a first node on the first path between the first switch and the second switch and a second node on the second path between the third switch and the fourth switch; and a rectifier circuit including a semiconductor element connected to the secondary winding of the isolated transformer and connected between an output terminal and a second ground terminal, wherein the control method comprises: acquiring an output voltage between the output terminal and the second ground terminal; a control method comprising: acquiring temperatures of at least two of the first switch, the second switch, the third switch, and the fourth switch, and a temperature of the semiconductor element; lowering a switching frequency of the first switch, the second switch, the third switch, and the fourth switch when the output voltage is equal to or higher than a predetermined voltage threshold; and controlling the switching frequency based on the acquired temperatures when the output voltage is lower than the predetermined voltage threshold.

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