Power converter and battery charging architecture systems and methods

Abstract

Circuits and methods are provided that more effectively and efficiently implement multi-level converter circuits. A system includes an integrated circuit having power switch circuitry operable to couple a first terminal and a second terminal, with the first terminal electrically couplable to an external load and the second terminal electrically couplable to a battery. Control circuitry is configurable to receive a first voltage and generate a second voltage by operating the power switch circuitry to charge and / or discharge one or more energy storage components in accordance with a selected mode of operation. An inductor switch is couplable between the second terminal and one or more of a plurality of inductors comprising a first inductor and a second inductor, with the first inductor couplable to a first terminal of a battery switch coupled to the battery, and the second inductor couplable to the battery and a second terminal of the battery switch.

Description

POWER CONVERTER AND BATTERY CHARGING ARCHITECTURE SYSTEMS AND METHODS

[0001] CROSS REFERENCE TO RELATED APPLICATIONS This application claims the benefit of and priority to U.S. Provisional Patent Application No. 63 / 559,164 filed February 28, 2024 and entitled “Power Converter And Battery Charging Architecture Systems And Methods,” and U.S. Provisional Patent Application No. 63 / 559,163 filed February 28, 2024 and entitled “Power Converter And Battery Charging Architecture Systems And Methods,” both of which are incorporated herein by reference in their entirety.

[0002] This disclosure relates to electronic circuits, and more particularly for example to power converter and battery charging architectures.

[0003] Many electronic products, including mobile computing and / or communication products and components (e.g., notebook computers, ultra-book computers, tablet devices, LCD, LED displays, and the like) use multiple voltage levels for operation. For example, radio frequency (RF) transmitter power amplifiers may operate at relatively high voltages (e.g., 12V or more), whereas logic circuitry may operate at a relatively low voltage level (e.g., 1-3V) and other circuitry may operate at an intermediate voltage level (e.g., 5-10V).

[0004] Direct current power converters are often used to generate a lower or higher voltage from a common power source, such as a battery, solar cells, and rectified AC sources. Power converters which generate a lower output voltage level from a higher input voltage power source are commonly known as buck converters, so-called because the output voltage VOUTis less than the input voltage VIN, and hence the converter is “bucking” the input voltage. Power converters which generate a higher output voltage level from a lower input voltage power source are commonly known as boost converters, because VOUTis greater than VIN. Some power converters may be either a buck converter or a boost converter depending on which terminals are used for input and output. Some power converters may provide an inverted output.

[0005] One type of direct current power converter known as a multi-level power converter includes charge transfer capacitors as energy storage elements coupled by controlled switches to transfer charge from VINto VOUT. Such charge transfer capacitors are commonly known as “fly capacitors” or “pump capacitors”. When a fly capacitor is used (i.e., not bypassed), the electrical energy flowing through that fly capacitor generally will either charge it or discharge it.

[0006] There is a continued need for improved circuits and methods for more effectively and efficiently operating and implementing various type of electrical circuits and devices, including for example multi-level converter circuits.

[0007] Embodiments of the present disclosure include systems, circuits, and methods for operating and implementing various electronics circuits, including multi-level converter circuits.

[0008] In various embodiments, an integrated circuit includes power switch circuitry having a plurality of switches operable to couple a first terminal and a second terminal, wherein the first terminal is electrically couplable to an external load and wherein the second terminal is electrically couplable to a battery; control circuitry configurable to receive a first voltage and generate a second voltage by operating the power switch circuitry to charge and / or discharge one or more energy storage components in accordance with a selected mode of operation of a plurality of operating modes; and an inductor switch couplable between the second terminal and one or more of a plurality of inductors comprising a first inductor and a second inductor, wherein the first inductor is couplable to a first terminal of a battery switch coupled to the battery, and wherein the second inductor is coupled to the battery and a second terminal of the battery switch.

[0009] In various embodiments, a method includes selectively coupling a wired load and / or a wireless to a first node of power convert switching circuitry on a primary path, and the other of the wired load and / or wireless load to a battery voltage and / or system voltage via a secondary path; operating the power converter switching circuitry according to a selected mode of operation to convert an input voltage received at the first node to an output voltage at a second node to charge the battery; and supplying via the secondary path the battery voltage and / or system voltage to provide power to the coupled wired load and / or wireless load.

[0010] In various embodiments, a system includes multi-level switching circuitry selectively couplable to one or more capacitors; multi-level control circuitry configurable to operate the multi-level switching circuitry in accordance with a selected mode of operation to convert an input voltage received at a first node to an output voltage at a second node to charge a battery; power path switching circuitry configurable to form a first power path by selectively coupling one of a wireless electrical path and a wired electrical path to the first node, and a second power path by selectively coupling the other of the wireless electrical path and wired electrical path to the battery; power path control circuitry configurable to operate the power path switching circuitry based at least in part on a detection of whether each of the wireless electrical path and / or the wired electrical path is coupled to a voltage supply and / or load, and / or a status of the battery; and an inductor switch couplable between the second node and one or more of a plurality of inductors comprising a first inductor and a second inductor, wherein the first inductor and second inductor are couplable to the battery through different terminals of a battery switch.

[0011] The scope of the present disclosure is defined by the claims, which are incorporated into this section by reference. A more complete understanding of embodiments of the present disclosure will be afforded to those skilled in the art, as well as a realization of additional advantages thereof, by a consideration of the following detailed description of one or more embodiments. Reference will be made to the appended sheets of drawings that will first be described briefly.

[0012] FIG. 1A is an example power converter circuit with internal input current sense, in accordance with one or more embodiments of the present disclosure.

[0013] FIG. 1B is an example power converter circuit with external input current sense, in accordance with one or more embodiments of the present disclosure.

[0014] FIG. 2A is an example dual integrated circuit (IC) power converter circuit with internal input current sense, in accordance with one or more embodiments of the present disclosure.

[0015] FIG. 2B is an example dual IC power converter circuit with external input current sense, in accordance with one or more embodiments of the present disclosure.

[0016] FIG. 3A is an example functional block diagram of a power converter circuit, in accordance with one or more embodiments of the present disclosure.

[0017] FIG. 3B is an example functional block diagram of a power converter circuit, in accordance with one or more embodiments of the present disclosure.

[0018] FIG. 4 is a diagram illustrating an example charging function in step down regulation mode of an example power converter circuit, in accordance with one or more embodiments of the present disclosure.

[0019] FIG. 5 is a diagram illustrating an example charging function in step down divide by 3 charge pump mode, in accordance with one or more embodiments of the present disclosure.

[0020] FIG. 6 is a functional block diagram illustrating aspects of an example power converter circuit, in accordance with one or more embodiments of the present disclosure.

[0021] FIG. 7 is a block diagram illustrating an example system implementing a power converter circuit, in accordance with one or more embodiments of the present disclosure.

[0022] FIG. 8A is a circuit diagram illustrating an example 3-level converter circuit, in accordance with one or more embodiments of the present disclosure.

[0023] FIG. 8B is a circuit diagram illustrating an example 4-level converter circuit, in accordance with one or more embodiments of the present disclosure.

[0024] FIG. 8C is a circuit diagram illustrating an example M-level converter circuit, in accordance with one or more embodiments of the present disclosure.

[0025] FIG. 9 is an example M-level converter circuit, in accordance with one or more embodiments of the present disclosure.

[0026] FIG. 10 is a block diagram of an example embodiment of control circuitry for an M-level converter cell, in accordance with one or more embodiments of the present disclosure.

[0027] FIG. 11 illustrates an example mobile battery charging architecture, in accordance with one or more embodiments of the present disclosure.

[0028] FIG. 12 illustrates an example battery charging architecture including a battery pack with internal protection circuitry, in accordance with one or more embodiments of the present disclosure.

[0029] FIG. 13 illustrates an example system with example battery protection circuitry, in accordance with one or more embodiments of the present disclosure.

[0030] FIG. 14 illustrates an example process for operating power converter circuitry with battery protection circuitry, in accordance with one or more embodiments of the present disclosure.

[0031] FIG. 15A illustrates an example multi-mode battery charging system, in accordance with one or more embodiments of the present disclosure.

[0032] FIG. 15B illustrates an example multi-mode battery charging system, in accordance with one or more embodiments of the present disclosure.

[0033] FIG. 16 illustrates example power path switching circuitry, in accordance with one or more embodiments of the present disclosure.

[0034] FIGs. 17A-C illustrate embodiments of switching configurations, in accordance with one or more embodiments of the present disclosure.

[0035] FIGs. 18A-C illustrate embodiments of switching configurations including a linear regulator, in accordance with one or more embodiments of the present disclosure.

[0036] FIG. 19 illustrates another embodiment of a switching configuration, in accordance with one more embodiments.

[0037] FIGs. 20A-C illustrates example of battery charging mode and power path configurations for operating and configuring one or more of the systems of FIGs. 15-19, in accordance with one or more embodiments of the present disclosure.

[0038] Embodiments of the present disclosure and their advantages are best understood by referring to the detailed description that follows. It is noted that sizes of various components and distances between these components are not drawn to scale in the figures. It should be appreciated that like reference numerals are used to identify like elements illustrated in one or more of the figures.

[0039] The present disclosure encompasses novel circuits, architectures, systems, and methods that more effectively and efficiently address the configuration and operation of multi-level converter circuits. It will be appreciated that various improvements disclosed herein encompass innovative circuits, hardware components, architectures, and related logic that are applicable to applications beyond multi-level converter circuits.

[0040] FIGs. 1-6 illustrate various embodiments of a high efficiency 4-level step-down and step-up power converter for battery charging applications, such as single cell Li-ion and Li-polymer battery applications. In the illustrated embodiments, the power converter is configured to deliver up to 5 amperes (A) of charging current in regulation mode and in a divide-by-3 charge pump mode, though other configurations are within the scope of the present disclosure. The power converter can be configured, for example, into dual ICs operation for 9A charging current in regulation mode and in divide-by-3 charge pump mode. Although a 4-level power converter is illustrated, it will be appreciated that the embodiments described herein may be applicable to various M-level implementations, where M >= 3.

[0041] In some implementations, for example, the power converter may supply an input range of approximately 4.5 V to 18 V input to support both universal serial bus (USB) and wireless inputs, and in a reverse step-up mode, the output may be programmable from 4.8 V to 16 V in 100 mV step with a programmable output current limit up to 1.7 A. This input voltage range may be used, for example, to support fast charging of single Li-Ion cells from USB and wireless input. It will be appreciated that other voltage and current ranges and limits may be implemented depending on the application. It will also be appreciated that while compatibility with USB is described herein, other wired interfaces and protocols may be implemented with the power converter of the present disclosure.

[0042] In various embodiments, the power converter may be implemented as a single integrated circuit (IC) (see, e.g., Figs. 1A-B), dual-integrated circuits (see, e.g., Figs. 2A-B), or in other configurations depending on the implementation. In various embodiments, the power converter may operate as a parallel charger along with a main charger, as shown in Fig. 3B, to provide the desired functionality noted herein and, for example, as illustrated in Figs. 4 and 5 for the desired charging functionality for various applications, as would be understood by one skilled in the art. Fig. 3B may represent a system level point of view of a mobile architecture having a parallel charger and a main charger that accepts power from a wired port (e.g., a wired USB) or from a wireless interface. The parallel charger for one or more embodiments may represent an IC as illustrated in Figs. 1-3A, for example, and may function to charge a battery for some portion of the charging profile (e.g., as shown in Figs. 4 and 5), while the main charger charges the battery for other portions of the charging profile. In various embodiments, the parallel charger may also be configured to function as the main charger as well, depending upon the desired application. The novel architecture disclosed herein may be implemented to enable (i) improved efficiency (e.g., at 9A charging current) in a low-profile solution; (ii) low electromagnetic interference (EMI) fixed-frequency operation under heavy load conditions; (iii) input and output current and voltage, IC temperature monitoring and telemetry via inter-integrated circuit (I2C) technology; and / or (iv) full protection including input and output under voltage lockout (UVLO), input and output over voltage protection (OVP), input and output over current protection (OCP), and IC over-temperature with fault and warning status. In some implementations, the power converter supports divide-by-3, step-down and step-up regulating modes, dual external disconnect switch control, and / or paralleled operation.

[0043] In the illustrated embodiments, the power converter is implemented as a multi-level charge pump incorporating power switches and control circuitry. The power converter’s internal bias may be provided by the system battery through a VOUT connection (e.g., pin). The charging input can be USB (or other wired input) or wireless input by an external FET register control. In some implementations, the power converter may be programmed to different operating modes, which may include a step-down regulation mode, a step-down divide-by-3 charge pump mode, and a reverse step-up mode.

[0044] In a step-down regulation mode, the power converter operates as a multi-level step-down regulator to support USB power delivery (USB-PD) (or other wired protocol) or fixed input charging. During a constant-current (CC) phase, the maximum charging current may be limited for example, by configuring registers. When the input current does not reach a predetermined maximum input setting, the charge current is set to a predetermined maximum output setting. If the input current reaches the input maximum setting, then the charge current throttles and maintains input current at the input maximum setting. This allows maximum charging current while ensuring that the charge current does not go above a battery maximum current rating and the input current does not trip adapter over-current protection.

[0045] During a constant-voltage (CV) phase, the CV regulation may be limited, for example, by configuring registers. In operation, a single-wire sense pin or other sensor is configured to sense the output voltage VOUT, which is compared to a predetermined value stored in a register, VOUT_REG. The voltage differential between the battery’s positive terminal and negative terminal is sensed and compared to a predetermined value stored in a register, VBATT_REG. In some implementations, a single-wire sense pin or other sensor senses VBATTP (battery voltage at positive terminal) and a single-wire sense pin or other sensor senses VBATTN (battery volage at negative terminal). The CV regulates to the lower of the two settings. If the VOUT sensed voltage reaches VOUT_REG first, then CV is regulated to VOUT_REG. If the VBATTP sensed voltage reaches VBATT_REG first, then CV is regulated to VBATT_REG. This provides a fast battery top off while preventing voltage above safety limit.

[0046] In a step-down divide-by-3 charge pump mode (which may be selected, for example, by setting a corresponding register), the power converter is configured as a divide-by-3 step-down charge divider to support USB-Programmable Power Supply (USB-PPS) or other charging protocol or programmable input charging (e.g., adjustable voltage supply (AVS)). In some embodiments, the power converter allows the USB-PPS adapter to control voltage and current and ignores conflicting settings (e.g., settings stored in registers for IOUT_MAX, VOUT_REG and VBATT_REG). In this mode, the power converter monitors an IIN_MAX setting, shuts down the power train (which includes switches to configure, enable and disable various modes of operation) and disconnects external FET when IIN current exceeds IIN_MAX setting. In the illustrated embodiment, the output current is up to 10A in dual IC operation and 5A in single IC operation.

[0047] In a reverse step-up mode (which may be selected, for example, by setting a corresponding register) the power converter is configured as a multi-level step-up regulator to power peripheral device(s) connected to USB (or other wired protocol or standard) or wireless input. The power converter draws power from the system battery and regulates VIN to the VOUT_REG programmable setting of 4.8V to 16V. The VIN output current limit may be set, for example, by an IIN_MAX register.

[0048] In some embodiments, to enable the IC, both an EN pin and an IC_EN bit are set to logic high (1). When either the EN pin or IC_EN bit is set to logic low (0), the IC is disabled. After the IC is enabled, the POR status bit sets to 1 to indicate the IC has a fresh power up.

[0049] In some embodiments, the power converter provides a gate driver to control two external N-channel MOSFETs and sense inputs to monitor source input voltage at each FET. The external FETs may be controlled by registers (e.g., 1-bit registers V_EXTG, EXTG_EN and EXTGX). The V_EXTG bit sets the gate drive voltage and can be set to 9V or 5V, in the illustrated embodiment. The EXTGX bits select which FET(s) to turn on. The EXTG_EN bit enables the gate driver to turn on the selected FET(s). In various embodiments, the external FET can be turned on or off independently from other IC operations except when the IC is disabled. The EXT_EN_IND status bit set to 1 when external FET is enabled. When a fault is detected and triggers a shutdown, the external FET may be turned off automatically. If EXT1 or EXT2 detects an OVP, then the respected FET would not turn on from the off mode.

[0050] In various embodiments, the power train is enabled after all the registers have been initialized and the target input external FET is turned on. Sufficient time based on capacitance on the power path may be configured between the external FET on time and the power train on time to minimize in-rush current. Next, both PT_EN pin and PT_EN bit are set to logic high (1) to turn on the power train. When either PT_EN pin or PT_EN pin is logic low, the power train is off. In dual IC operation, the slave IC power train may be configured to turn on first before the master IC. The COMP, SYNC and SYNCH pins from two ICs gate the power train and synchronize the operation. The SYNC_SEL pin sets the IC to master mode or slave mode. IC internal fault and programmable fault detection shuts down the power train operation when fault is detected.

[0051] In a reverse step-up mode (which may be selected, for example, by setting a corresponding register), the power converter is configured as a multi-level step-up regulator to power peripheral device(s) connected to USB (or other wired port) or wireless input. The power converter draws power from the system battery and regulates VIN pin to a VOUT_REG programmable setting of 4.8V to 16V. The VIN output current limit is set by IIN_MAX register.

[0052] To enable the IC, both the EN pin and IC_EN bit are set to logic high (1). When either EN pin or IC_EN bit is set to logic low (0), the IC is disabled. After the IC enables, the POR status bit sets to 1 to indicate the IC has a fresh power up. The power converter provides a gate driver to control two external N-channel MOSFETs and sense inputs to monitor source input voltage at each FET. The external FETs are controlled by register bits, such as V_EXTG, EXTG_EN and EXTGX. The V_EXTG bit sets the gate drive voltage and can be set to 9V or 5V, for example. The EXTGX bits select which FET(s) to turn on. The EXTG_EN bit enables the gate driver to turn on the selected FET(s). The external FET can be turned on or off independently from other IC operation except when the IC is disabled. The EXT_EN_IND status bit set to 1 when external FET is enabled.

[0053] When a fault is detected and triggers a shutdown, the external FET may be turned off automatically. If EXT1 or EXT2 detects an OVP, then the respective FET would not turn on from off mode. The power train is enabled after all the registers have been initialized and the target input external FET is turned on. Sufficient time based on capacitance on the power path should be given between external FET on time to power train on time to minimize in-rush current. Next, both PT_EN pin and PT_EN bit are set to logic high (1) to turn on the power train. When either PT_EN pin or PT_EN pin is logic low, the power train is off. In dual IC operation, the slave IC power train is turned on before the master IC. The COMP, SYNC and SYNCH pins from the two ICs gate the power train and synchronize the operation. SYNC_SEL pin sets the IC to master mode or slave mode. IC internal fault and programmable fault detection shuts down power train operation when a fault is detected.

[0054] In accordance with various embodiments, an example power converter initialization, an example power up sequence, and an example fault handling will now be described for the three different operating modes. In an example step-down regulation mode, the initialization and power up sequence uses EXT1 as an example. The same sequence may apply to EXT2 with the only change in EXTGX bit and related EXT2 register settings. First, pull EN to logic high and then set IC_EN bit=1 at 100us(TBD) after EN is logic high to enable IC. IC startup from POR stage, POR bit reports 1 indicating fresh IC startup. Next, the POR bit is read to confirm the IC is enabled. The FREQUENCY register is then set to a desired setting. In dual IC operation, both ICs are set to the same frequency setting. The VOUT_REG register is set to the target regulation voltage on the VOUT sense pin in CV operation. The VBATT_REG register is set to the target regulation voltage on the VBATTP sense pin in CV operation. The IOUT_MAX register is set to the target maximum charger current in CC operation, and the IIN_MAX register is set to a value below the adapter current limit. Next, the FAULT and WARNING registers was set to a desired setting. Each Fault and Warning enables at a different time based on IC status and operating mode. The WATCHDOG register is then set to a desired setting.

[0055] The MODE register and other related registers are set for step-down regulation mode, including power train setup and enablement of an external FET, while checking for faults. In a dual IC operation, the external FETs are controlled by the master IC. If a fault (e.g., OVP event) is detected, then a shutdown register may be set to “1” to indicate a fault shutdown event and a sequence to enable the external FET after the shutdown fault is initiated. Next, the power train is enabled. In a dual IC operation, the slave IC power train is turned on before the master IC. After the power train is enabled, a bit may be set to indicate that the power train is ready and charging the battery. In some embodiments, a watchdog timer may be set to periodically check the IC status during charging operation.

[0056] If a fault event is detected, then the IC determines which faults events were triggered, such as the power train may be set to enable but it is off due to fault(s), an external FET is set to enable but the FET is off due to fault(s). The shutdown procedure may include resetting register values and repeating setup steps of enabling the power train, external FET, or other component that is disabled due to a fault.

[0057] An example step-down divide-by-3 power converter mode initialization and power up sequence will now be described. The initialization and power up sequence uses EXT1 as an example, but it will be appreciated that the same sequence applies to EXT2 with a change in EXTGX bit and related EXT2 register settings. The EN is pulled to logic high and then IC_EN bit=1 at 100us(TBD) after EN is logic high to enable IC. The IC starts up from POR stage, POR bit reports 1 indicating fresh IC startup. The POR bit is read to confirm the IC is enabled. The FREQUENCY register is set to a desired setting. In dual IC operation, both ICs are set to the same frequency setting. The IIN_MAX register is set to a value below the adapter current limit. VOUT_REG, VBATT_REG and IOUT_MAX registers are not used in step-down divide-by-3 charge pump mode. Voltage and current regulation in step-down divide-by-3 charge pump mode may be controlled by the PPS adapter. The FAULT, WARNING, and WATCHDOG registers are set to desired settings. Each Fault and Warning enables at different time based on IC status and operating mode.

[0058] The MODE register and other registers are set for step-down divide-by-three mode, including power train setup and external FET setup, while checking for faults. If a fault (e.g., OVP event) is detected, then a shutdown register may be set to “1” to indicate a fault shutdown event and a sequence to enable the power train or external FET, as appropriate, after the shutdown fault is initiated. Next, the power train is enabled. After the power train is enabled, a bit may be set to indicate that the power train is ready and charging the battery. In some embodiments, a watchdog timer may be set to periodically check the IC status during charging operation. Voltage and current regulation in step-down divide-by-3 charge pump mode may be controlled by the PPS adapter.

[0059] If a fault event is detected, then the IC determines which faults events were triggered, such as the power train may be set to enable but it is off due to fault(s), or an external FET is set to enable but the FET is off due to fault(s). The shutdown procedure may include resetting register values and repeating setup steps of enabling the power train, external FET, or other component that is disabled due to a fault.

[0060] An example reverse step-up mode initialization and power up sequence will now be described. This initialization and power up sequence uses EXT2 as an example, but the same sequence applies to EXT1 with the change in EXTGX bit and related EXT1 register setting. The value EN is pulled to logic high and then IC_EN bit is set to 1 at 100us(TBD) after EN is logic high to enable IC. The IC starts up from the POR stage, and the POR bit reports 1 indicating a fresh IC startup. The POR bit is read to confirm the IC is enabled. Next, the FREQUENCY register is set to a desired setting. In dual IC operation, both ICs are set to the same frequency setting. The VOUT_REG register is set to the target regulation voltage at VIN. Next, the IIN_MAX register is set to the target current limit. VBATT_REG and IOUT_MAX registers are not used in reverse step-up mode. FAULT, WARNING, and WATCHDOG registers are set to desired settings. Each Fault and Warning enables at a different time based on IC status and operating mode.

[0061] The MODE register and other registers are set for reverse step-up mode, including power train setup and external FET setup, while checking for faults. If a fault (e.g., OVP event) is detected, then a shutdown register may be set to “1” to indicate a fault shutdown event and a sequence to enable the power train or external FET, as appropriate, after the shutdown fault is initiated. Next, the power train is enabled. After the power train is enabled, a bit may be set to indicate that the power train is ready and charging the battery. In some embodiments, a watchdog timer may be set to periodically check the IC status during charging operation. Voltage and current regulation in step-down divide-by-3 charge pump mode may be controlled by the PPS adapter. In dual IC operation, the slave IC power train is turned on before the master IC and is controlled by the master IC.

[0062] If a fault event is detected, then the IC determines which faults events were triggered, such as the power train may be set to enable but it is off due to fault(s), or an external FET is set to enable but the FET is off due to fault(s). The shutdown procedure may include resetting register values and repeating setup steps of enabling the power train, external FET, or other component that is disabled due to a fault. The EXT2 or VIN pins are not configured to detect OVP as it is set as the output in reverse step-up mode. But if EXT2 or VIN pin detects an OVP event, then IC_STATUS1 and IC_STATUS2 would report the fault event.

[0063] In an example system 700 illustrated in FIG. 7, a power converter 720 is implemented in a host 710 (e.g., a device or system) that includes a battery 730 and various system components 740. The host 710 may be any system or device that implements a power converter as described herein, including but not limited to a smart phone, tablet, portable electronics, a mobile device, low power electronics, and other electronic systems. The battery 730 may include one or more batteries that store electricity for use by the host 710, such as single cell Li-ion and Li-polymer batteries.

[0064] The power converter 720 may be configured to convert electricity stored in the battery 730 to a desired system voltage, VSYS, for powering various system components 740, which may include one or more logic devices 742, memories 744, communications components 746, input / output (I / O) components 748, circuitry 750, and other components 752. The power converter 720 may also supply power to one or more external devices 760, such as a component connected to the host 710 through a wired or wireless connection, such as a USB compatible device. The power converter 720 may also be configured to receive power from an external power source 712 and convert the received power to the battery 730 for storage, or to the system components 740 and / or external device 760, as applicable.

[0065] In various embodiments, the one or more logic devices 742 and memories 744 may be configured to perform operations of the host 710. A logic device 742 may be implemented as a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a microcontroller, a programmable logic device (PLD), a field-programmable gate array (FPGA), or other programmable logic device(s). The logic device 742 and other components may be configured through hardwiring, software execution, or a combination of both. In various embodiments, the host 710 includes one or more memory devices designed to retain data, such as software instructions for execution by the logic device. The memory may include volatile and non-volatile memories, such as random-access memory (RAM), dynamic RAM (DRAM), static RAM (SRAM), non-volatile random-access memory (NVRAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically-erasable programmable read-only memory (EEPROM), flash memory, hard disk drives, or other memory types. The logic device may be configured to execute software instructions residing in the memory, thereby accomplishing method steps and operations.

[0066] Referring to FIGs. 8A-8C, the converter circuit may be configured to switch between two or more switch states. One or more PWM duty cycle controllers may be provided to set the time in each switch state based on the voltage at VOUT. For example, FIG. 8A is a schematic diagram of a 3-level DC-to-DC buck converter circuit 800 that may be used as the converter circuit 920 of FIG. 9. A set of four switches, S1-S4, is series-coupled between VIN and circuit ground. A fly capacitor C1 is coupled in series with switches S3 and S4, and in parallel with switches S1 and S2. An inductor L1 is coupled to an output capacitor COUT and to a node Lx between switches S1 and S2, and the voltage across the output capacitor COUT is VOUT.

[0067] In the illustrated example, the presence of the single fly capacitor C1 in the converter circuit 800 enables four switch states that each generate one of three voltage levels at node Lx. In a first switch state, S2 and S4 are closed and S1 and S3 are open, effectively bypassing C1 and connecting Lx to circuit ground (voltage level at Lx = GND). In a second switch state, S2 and S4 are open and S1 and S3 are closed, effectively bypassing C1 and connecting Lx to VIN (voltage level at Lx = VIN). In a third switch state S1 and S4 are open and S2 and S3 are closed, connecting C1 from VIN to LX, and thus charging C1 with inductor L1 current flowing into a load. The voltage across C1 will be about VIN / 2 and the voltage level at Lx will also equal about VIN / 2. In a fourth switch state, S1 and S4 are closed and S2 and S3 are open, connecting C1 from Lx to GND and thus discharging C1 with inductor L1 current flowing to a load. The voltage across C1 will be about VIN / 2 and the voltage level at Lx will also equal about VIN / 2 (e.g., this may assume that C1 was previously charged in state three). Accordingly, the illustrated converter circuit 800 has two switch states that generate a voltage level of VIN / 2 at the Lx node.

[0068] If the converter circuit 800 is toggled between switch states three and four (avoiding switch state two that bypasses the fly capacitor C1), the inductor L1 sees small jumps in the voltage level at Lx, going from GND to only VIN / 2 and back to GND, which results in reduced voltage ripple across the inductor L1 and less filtering to smooth VOUT than a converter circuit with only S1 and S2 switches.

[0069] Adding additional series switches Sx and fly capacitors Cx to the 2-level converter circuit 800 increases the number of switch states and resulting voltage levels between VIN and circuit ground that can be applied to the Lx node, thus generating an even smaller voltage ripple across the inductor L. This reduces the filtering requirements to get a smooth output voltage. For example, a 4-level DC-to-DC buck converter circuit (see, e.g., FIG. 8B) includes 6 series-coupled switches S1-S6 and two fly capacitors Cx (X = 2). Consequently, a 4-level converter circuit can define 4 voltage levels (VIN, GND, 1 / 3VIN, and 2 / 3VIN) at node LX from 8 switch states (3 switch states result in the 1 / 3VIN level at Lx, and 3 other switch states result in the 2 / 3VIN level at Lx). For some applications, VOUT is set low enough that the voltage level at node Lx alternates between GND and the next higher voltage level available. For higher output voltages, the switching pattern may never use GND. For example, in a 4-level converter circuit, an output VOUT set to 0.5*VIN can be achieved by alternating the Lx node between 2 / 3 VIN and 1 / 3 V.

[0070] A different interpretation of a multi-level converter circuit is that the fly capacitors Cx create a charge-pump for the buck converter circuit. Unlike a standard charge-pump where the output is restricted to one output, a multi-level converter circuit allows the fly capacitors Cx to be coupled to create multiple intermediate voltages. For the 4-level example, the two fly capacitors each act as a 1 / 3 charge-pump with the additional benefit that any input voltage that is a sum of 1 / 3 ratios can be created, including VIN and GND.

[0071] A multi-level converter circuit couples the fly capacitors Cx in different combinations in order to bring the voltage level at the Lx node down or up. As noted above, when a fly capacitor is used (i.e., not bypassed), the electrical energy flowing through that fly capacitor generally will either charge it or discharge it, which creates a control problem in maintaining an average voltage.

[0072] Resolving the charge-balance problem so as to maintain an average voltage across the single capacitor in a 3-level converter circuit will now be described. For example, in a 3-level converter circuit, one way to generate the Level-1 (GND) and Level-3 (VIN) voltage levels at the Lx node is to not use the fly capacitors C1 for these Lx voltage levels. However, for the Level 2 (VIN / 2) voltage level at Lx, two separate switch states can be used: one switch state charges the capacitor (S3 and S2 closed, S1 and S4 open) and the other switch state discharges the capacitor (S3 and S2 open, S1 and S4 closed). The control of a 3-level converter circuit may operate such that each time the converter circuit switches states to Level-2, a controller can alternate between charging and discharging the single capacitor to maintain its voltage. A voltage comparator can be used to monitor the capacitor to help decide on a charging state or a discharging state. For instance, if the capacitor voltage is below VIN / 2, then a controller would select charge (the third switch state), and if the capacitor voltage is above VIN / 2, then the controller would select discharge (the fourth switch state).

[0073] Referring to FIGs. 8B, a 4-level converter circuit 830 (X = 2) illustrates the charge-balance difficulty when more capacitors are present. A Level-1 voltage level (GND) and a Level-4 voltage level (VIN) at the Lx node are each determined by a single switch state. However, the Level-2 voltage level (1 / 3 VIN) and Level-3 voltage level (2 / 3 VIN) at Lx each can be achieved by any of three different switch states. At higher orders of a multi-level converter circuit (X > 2), more switch states are possible for generating the intermediate levels between VIN and GND. The problem gets more complicated with a 5-level converter circuit (X= 3). A Level-1 voltage level (GND) and a Level-5 voltage level (VIN) at the Lx node are each determined by a single switch state. However, the Level-2 voltage level (1 / 4VIN) and Level-4 voltage level (3 / 4 VIN) at Lx each can be achieved by any of four different switch states, the Level-3 voltage level (2 / 4 VIN) at Lx can be achieved by any of six different switch states.

[0074] As should be clear from these examples, determining a suitable charge-balance method can become exceedingly difficult as the complexity of a multi-level converter circuit increases. As previously noted, most conventional control methods rely on establishing a sequence of linked state-changes to try to achieve charge balance. Control systems based on long sequences of switch states generally assume that all system variables - such as input voltage and output current - are constant during the sequence. This is unrealistic for a real-world environment, where all system variables tend to be dynamic.

[0075] In a 2-Level example, the converter circuit switches between two switch states: S1 closed and S2 open (voltage level at LX=VIN), or S1 open and S2 closed (voltage level at LX= GND). A PWM duty cycle controller sets the time in each switch state based on the voltage at VOUT, which determines the amplitude of the average voltage at LX(noting that, the average LXvoltage in theory is equal to the VOUTaverage voltage, but that, due to parasitics, the LXaverage voltage is higher and / or lower (for negative currents) than the VOUTaverage). As can be appreciated, the inductor L sees large jumps in the voltage level at LX, from GND to VINand back to GND. The resulting voltage ripple across the inductor L necessitates a significant amount of filtering to smooth VOUT.

[0076] An alternative way of reducing the voltage ripple across the inductor L is to add more series switches as well as charge transfer capacitors as energy storage elements to transfer charge from VINto VOUT. As noted above, such charge transfer capacitors are commonly known as “fly capacitors” or “pump capacitors” and may be external components coupled to an integrated circuit embodiment of a converter circuit. The presence of X fly capacitors Cxdefines a multi-level capacitive converter circuit capable of generating M=X+2 voltage levels at node LXfrom 2(X+1)switch states.

[0077] FIG. 8C is schematic diagram of a generalized M-level multi-level converter cell 870 that may be used as the converter circuit 920 of FIG. 9. A set of switches, S1-S[2*(M-1)], is series-coupled between VINand circuit ground. The set of switches are organized in switch pairs: S1 & S2, S3 & S4, … S[2*(M-2)+1] & S[2*(M-1)]. A set of M-2 fly capacitor Cx is coupled in series with certain respective switches, and in parallel with switches in between those switches. In terms of switch pairs, there are M-1 pairs of switches, or one more than the number of fly capacitors. An optional inductor L is coupled to an output capacitor COUTand to a node LXbetween switches S1 and S2, and again the voltage across the output capacitor COUTis VOUT. The inductor L doubles as a virtual current source that facilitates movement of charge between the fly capacitors Cx. This creates a very efficient form of charge transfer, but introduces the problem of charge-balancing the fly capacitors Cx.

[0078] In various embodiments, each fly capacitor Cx has a first terminal coupled between an outer high-side switch S[2*x+1] and an inner high-side switch S[2*x-1], where “high-side” refers to the VINside of the converter circuit. Each fly capacitor Cx has a second terminal coupled between an outer low-side switch S[2*x+2] and an inner low-side switch S[2*x], where “low-side” refers to the circuit ground (GND) side of the converter circuit. Thus, for an M=3 multi-level converter cell, a first terminal of the single (X=1) fly capacitor C1 would be coupled between outer high-side switch S3 and inner high-side switch S1, and a second terminal of the capacitor C1 would be coupled between inner low-side switch S2 and outer low-side switch S4. Accordingly, each fly capacitor Cx within the multi-level converter cell 870 has four switches that can affect current flow through that fly capacitor Cx.

[0079] In some embodiments, a voltage detector, which may be a simple comparator-type circuit, is provided to sense the voltage across a corresponding fly capacitor Cx with respect to a reference voltage, VREF, which represents a desired target voltage for the fly capacitor Cx. Every fly capacitor Cx may have a target average voltage in order to maintain proper output level. For an M-level converter and capacitor Cx, where x=1, 2, … [M-2], its target voltage is:

[0080] The voltage detector may be configured to output a HIGH / LOW status signal, CFx_H / L, indicating with the voltage across the corresponding fly capacitor Cx is greater than VREF or less than VREF. The CFx_H / Lstatus signal is coupled to control circuitry for the switches associated with the fly capacitor Cx.

[0081] The control circuitry for the four switches that can affect current flow through a fly capacitor Cx set states for those switches in part as a function of the voltage across the fly capacitor Cx as measured by the associated voltage detector and conveyed by the CFx_H / Lx status signal. Accordingly, for ease of understanding, it can be said that each fly capacitor Cx “controls” its own pairs of high-side and low-side switches. If it is assumed that current flow in the inductor is charging the output VOUT, there are four possible states that can be defined for the pairs of high-side and low-side switches for each fly capacitor Cx.

[0082] In a switch state in which the outer high-side and inner low-side switches associated with fly capacitor Cx are closed and all other associated switches are open, fly capacitor Cx would be in a charging configuration (whether or not charging actually occurs may depend on the switch states for other fly capacitors Cx). In a switch state in which the inner high-side and outer low-side switches associated with fly capacitor Cx are closed and all other associated switches are open, fly capacitor Cx would be in a discharging configuration (whether or not discharging actually occurs may depend on the switch states for other fly capacitors Cx). In a switching state in which the inner low-side and outer low-side switches associated with fly capacitor Cx are closed and all other associated switches are open, fly capacitor Cx would be bypassed. In a switching state in which the outer high-side and inner high-side switches associated with fly capacitor Cx are closed and all other associated switches are open, fly capacitor Cx would again be bypassed.

[0083] While each fly capacitor Cx can control both of its own pairs of high-side and low-side switches, in general, methods of control disclosed herein may utilize either the outer switches or the inner switches controllable by each corresponding capacitor. For example, referring to FIG. 8B, in “outer-switch” methods, fly capacitor C1 will control its outer switches S3 and S4, fly capacitor C2 will control its outer switches S5 and S6, etc. Conversely, for example, in “inner-switch” methods, fly capacitor C1 will control its inner switches S1 and S2, fly capacitor C2 will control its inner switches S3 and S4, etc. The switch states of either pair (inner or outer) of switches controlled by a fly capacitor Cx may be complementary - that is, no fly capacitor Cx closes or opens both of its high-side and low-side controlled switches at the same time. If each fly capacitor Cx controls its outer-switches, then no fly capacitor controls the left-over innermost switches S1 and S2. If instead each fly capacitor Cx controls its inner-switches, then no fly capacitor controls the left-over outermost switches S[2*(M-1)] and S[2*(M-2)+1]. Switch states for the left-over switches are also complementary.

[0084] FIG. 9 is a high-level block diagram of an example circuit that includes a power converter 900, in accordance with one or more embodiments of the present disclosure. In the illustrated example, the power converter 900 includes a converter circuit 920 and a controller 910. The converter circuit 920 and controller 910 may be configured to implement, for example, any of the multi-level power converter circuits as previously described with reference to FIGs. 1A-8C, and as described further herein. In the illustrated embodiment, the converter circuit 920 is configured to receive an input voltage VIN from a voltage source and transform the input voltage VIN into an output voltage VOUT. In some embodiments of the power converter 900, auxiliary circuitry (not shown), such as a bias voltage generator(s), a clock generator, a voltage control circuit, etc., may also be present and coupled to the converter circuit 920 and the controller 910.

[0085] The controller 910 receives a set of input signals and produces a set of output signals. Some of these input signals arrive along a signal path connected to the converter circuit 920. These input signals carry information that is indicative of the operational state of the converter circuit 920. The controller 910 may also receive a clock signal CLK (for synchronous converter circuits 920) and one or more external input / output signals I / O that may be analog, digital (encoded or direct signal lines), or a combination of both. Based upon the received input signals, the controller 910 produces a set of control signals back to the converter circuit 920 that control the internal components of the converter circuit 920 (e.g., internal switches, such as low voltage FETs / MOSFETs) to cause the converter circuit 920 to boost or buck VIN to VOUT. In some embodiments, an auxiliary circuit (not shown) may provide various signals to the controller 910 (and optionally directly to the converter circuit 920), such as the clock signal CLK, the input / output signals I / O, as well as various voltages, such as a general supply voltage VDD and a transistor bias voltage VBIAS.

[0086] FIG. 10 is a block diagram of one embodiment of advanced control circuitry 1000 for an M-level converter cell 1000 such as the generalized version depicted in FIG. 8B. The M-level converter cell 1020 is shown coupled to an output block 1001 comprising an inductor L and an output capacitor COUT (conceptually, the inductor L also may be considered as being included within the M-level converter cell 1020). The advanced control circuitry 1000 functions as a control loop coupled to the output of the M-level converter cell 1020 and to switch control inputs of the M-level converter cell 1020. In general, the advanced control circuitry 1000 is configured to monitor the output (e.g., voltage and / or current) of the M-level converter cell 1020 and dynamically generate a set of switch control inputs to the M-level converter cell 1020 that attempt to stabilize the output voltage and / or current at specified values, taking into account variations of VINand output load. In alternative embodiments, the advanced control circuitry 1000 may be configured to monitor the input of the M-level converter cell 1020 (e.g., voltage and / or current) and / or an internal node of the M-level converter cell 1020 (e.g., the voltage across one or more fly capacitors or the current through one or more power switches). Accordingly, most generally, the advanced control circuitry 1000 may be configured to monitor the voltage and / or current of a node (e.g., input terminal, internal node, or output terminal) of the M-level converter cell 1020. The advanced control circuitry 1000 may be incorporated into, or separate from, the overall controller for a power converter 100 embodying the M-level converter cell 1020.

[0087] A first block comprises a feedback controller 1002, which may be a traditional controller such as a fixed frequency voltage mode or current mode controller, a constant-ON-time controller, a hysteretic controller, or any other variant. The feedback controller 1002 is shown as being coupled to VOUTfrom the M-level converter cell 1020. In alternative embodiments, the feedback controller 1002 may be configured to monitor the input of the M-level converter cell 1020 and / or an internal node of the M-level converter cell 1020. The feedback controller 1002 produces a signal directly or indirectly indicative of the voltage at VOUTthat determines in general terms what needs to be done in the multi-level converter cell 1020 to maintain desired values for VOUT: charge, discharge, or tri-state (i.e., open, with no current flow).

[0088] In the illustrated example, the feedback controller 1002 includes a feedback circuit 1004, a compensation circuit 1006, and a PWM generator 1008. The feedback circuit 1004 may include, for example, a feedback-loop voltage detector which compares VOUT(or an attenuated version of VOUT)to a reference voltage which represents a desired VOUTtarget voltage (which may be dynamic) and outputs a control signal to indicate whether VOUTis above or below the target voltage. The feedback-loop voltage detector may be implemented with a comparison device, such as an operational amplifier (op-amp) or transconductance amplifier (gm amplifier).

[0089] The compensation circuit 1006 is configured to stabilize the closed-loop response of the feedback controller 1002 by avoiding the unintentional creation of positive feedback, which may cause oscillation, and by controlling overshoot and ringing in the step response of the feedback controller 1002. The compensation circuit 1006 may be implemented in known manner, and may include LC and / or RC circuits.

[0090] The PWM generator 1008 generates the actual PWM control signal which ultimately sets the duty cycle of the switches of the multi-level converter cell 1020. In addition, in some embodiments, the PWM generator 1008 may pass on additional optional control signals CTRL indicating, for example, the magnitude of the difference between VOUTand the reference voltage (thus indicating that some levels of the M-level converter cell 1020 should be bypassed to get to higher or lower levels), and the direction of that difference (e.g., whether VOUTis greater than or less than the reference voltage). In other embodiments, the optional control signals CTRL can be derived from the output of the compensation circuit 1006, or from the output of the feedback circuit 1004, or from a separate comparator (not shown) coupled to, for example, VOUT. One purpose of the optional control signals CTRL is for advanced control algorithms, when it may be beneficial to know how far away VOUTis from a target output voltage, thus allowing faster charging of the inductor L if the VOUTis severely under regulated.

[0091] A second block comprises a multi-level controller 1010, the primary function of which is to select the switch states that generate a desired VOUTwhile maintaining a charge-balance state on the fly capacitors within the M-level converter cell 1020 every time an output voltage level is selected, regardless of what switch state or states were used in the past.

[0092] The multi-level controller 1010 includes a Voltage Level Selector 1012 which receives the PWM control signal and the additional control signals CTRL if available. In addition, the Voltage Level Selector 1012 may be coupled to VOUTand / or VIN, and, in some embodiments, to the HIGH / LOW status signals, CFx_H / L, from the voltage detectors coupled to corresponding fly capacitors Cx within the M-level converter cell 1020. A function of the Voltage Level Selector 1012 is to translate the received signals to an output voltage Target Level (e.g., on a cycle-by-cycle basis). The Voltage Level Selector 1012 typically will consider at least VOUTand VINto determine which Target Level should charge or discharge the output of the M-level converter cell 1020 with a desired rate. For example, in a 6-level converter circuit, the available Target Levels are Level-1 (GND), Level-2 (1 / 5VIN), Level-3 (2 / 5VIN), Level-4 (3 / 5VIN), Level-5 (4 / 5VIN), and Level-6 (VIN), which may be represented as a count value from 1-6 (or 0-5).

[0093] As an example, in a 4-Level converter circuit, if VIN= 12V and VOUTnominally should be 3V, then the Voltage Level Selector 1012 may indicate that a Target Level of “2” can be selected, which results in a 1 / 3VINvoltage level at LX(i.e., 4V). The PWM control signal sets a duty cycle between that Target Level and another Target Level (e.g., GND) so that the average voltage level at LXwill be about 3V.

[0094] In general, for steady-state operations, the Target Level voltage closest to VOUTthat either charges or discharges the inductor L may be selected for simplicity of the selection algorithm. In general, for transient response, a Target Level that is higher (for charging) or lower (for discharging) than the closest Target Level may be selected to quickly charge or discharge the inductor L. The Voltage Level Selector 1012 may be implemented, for example, as a look-up table (LUT) or as comparison circuitry and combinatorial logic or more generalized processor circuitry. In some embodiments, the Voltage Level Selector 1012 can implement advanced methods (described below) that try to speed up charging or discharging based on additional factors, such as inductor voltage drop, load transients, the magnitude of output deviations, and / or external input signals from external sources. The output of the Voltage Level Selector 1012 may include duty cycle information (e.g., derived from the input PWM control signal) as well as switch state.

[0095] The output of the Voltage Level Selector 1012 is coupled to a Multi-Level Switch State Selector 1014, which generally would be coupled to the status signals, CFx_H / L, from the voltage detectors for the fly capacitors Cx. Taking into account the Target Level generated by the Voltage Level Selector 1012, the Multi-Level Switch State Selector 1014 determines a pattern of switch states for the desired output level that generally achieves charge-balancing the fly capacitors Cx. The Multi-Level Switch State Selector 1014 may be implemented, for example, as comparison circuitry and combinatorial logic, as a look-up table (LUT), or as more generalized processor circuitry. The output of the Multi-Level Switch State Selector 1014 is coupled to the switches of the multi-level converter cell 1020 (through appropriate level-shifter circuits and drivers circuits, as may be needed for a particular converter cell) and includes a pattern of switch state settings determined by the Multi-Level Switch State Selector 1014. The pattern of switch state settings selects the configuration of the switches within the multi-level converter cell 1020.

[0096] In general (but not always), for PWM-based control systems, the Voltage Level Selector 1012 and the M-level Switch State Selector 1014 only change their states when the PWM signal changes. For example, when the PWM signal goes high, the Voltage Level Selector 1012 selects which level results in charging of the inductor L and the M-level Switch State Selector 1014 sets which version to use of that level. Then when the PWM signal goes low, the Voltage Level Selector 1012 selects which level can discharge the inductor L and the M-level Switch State Selector 1014 sets which version of that level to use. Thus, the Voltage Level Selector 1012 and the M-level Switch State Selector 1014 generally only change states when the PWM signal changes (the PWM signal is in effect their clock signal). However, there may be situations or events where it is desirable for the CTRL signal to change the state of the Voltage Level Selector 1012. Further, there may be situations or events where it is desirable for the CFx_H / Lstatus signal(s) to cause the M-level Switch State Selector 1014 to select a particular configuration of power switch settings, such as when a severe mid-cycle imbalance occurs. In some embodiments, it may be useful to include a timing function that forces the M-level Switch State Selector 1014 to re-evaluate the optimal version of the state periodically, for example, in order to avoid being “stuck” at one level for a very long time, potentially causing charge imbalances.

[0097] One notable benefit of the control circuitry shown in FIG. 10 is that it enables generation of voltages in boundary zones between voltage levels, which represent unattainable output voltages for conventional multi-level DC-to-DC converter circuits.

[0098] In alternative unregulated charge-pumps embodiments, the feedback controller 1002 and the Voltage Level Selector 1012 may be omitted, and instead a clock signal CLK may be applied to the M-level Switch State Selector 1014. The M-level Switch State Selector 1014 would generate a pattern of switch state settings that periodically charge balances the fly capacitors Cx regardless of what switch state or states were used in the past (as opposed to cycling through a pre-defined sequency of states). This ensures that if VINchanges or anomalous evens occur, the system generally always seeks charge balance for the fly capacitors Cx.

[0099] In some embodiments, the M-level Switch State Selector 1014 may take into account the current ILflowing through the inductor L by way of an optional current-measurement input 1016, which may be implemented in conventional fashion.

[0100] In an M-level multi-level converter circuit, the configuration of switches that achieves Level-1 (e.g., GND) or Level-M (e.g., VIN) effectively bypasses the fly capacitors Cx. Conversely, for all intermediate voltage levels, at least one fly capacitor Cx is coupled to VOUTand there are always at least two configurations of switches that can achieve any intermediate voltage level. For any particular intermediate voltage level, at least one configuration of switches results in charging the associated fly capacitor and at least one other configuration of switches results in discharging the associated fly capacitor. One aspect of the present disclosure is the realization that any achievable output voltage VOUTrequiring intermediate voltage levels can be attained by dynamically selecting patterns of switch configurations - that is, by selecting switch configurations without regard to or memory of the switch configurations of any previous switching cycle - to select appropriate Levels, and doing so in a way that purposefully selects either charging or discharging switch configurations that also balance charge across the fly capacitors Cx.

[0101] Embodiments of the disclosure use the following approach for positive inductor L current (charging VOUT): (1) a fly capacitor Cx that needs charging will be set to close its charging switch (the outer high-side switch in outer-switch control methods, or the inner low-side switch for inner-switch control methods); and (2) a fly capacitor Cx that needs discharging will be set to close its discharging switch (the outer low-side switch for outer-switch control methods, or the inner high-side switch for inner-switch control methods).

[0102] For negative inductor L current (discharging VOUT), the selection of switches inverts. Accordingly: (1) a fly capacitor Cx that needs charging will be set to close its charging switch (the outer low-side switch in outer-switch control methods, or the inner high-side switch for inner-switch control methods); and (2) a fly capacitor Cx that needs discharging will be set to close its discharging switch (the outer high-side switch for outer-switch control methods, or the inner low-side switch for inner-switch control methods).

[0103] Note again that whether or not charging actually occurs for a particular fly capacitor Cx generally depends on the switch states for all other fly capacitors. For a fly capacitor C(x) to actually charge or discharge, the next inward (if one exists) fly capacitor C(x-1) (for outer-switch control methods) or the previous outward (if one exists) fly capacitor C(x+1) (for inner-switch control methods) must be set to the opposite state (i.e., discharge or charge) so that a bypass situation does not occur.

[0104] For any multi-level converter circuit of order M that can create M voltage levels - i.e., Level-1 (e.g., GND) through Level-M (e.g., VIN) - then the following switch count rules apply for any Level-m: (1) M - m low-side switches must be set to be closed (ON); (2) m - 1 high-side switches must be set to be closed (ON); and (3) switches that are not required to be ON must be set to be OFF (open).

[0105] With these switch count rules in mind, the following generalized capacitor control method applies for each state change of the Multi-Level Switch State Selector 1014: Step 1) Select a fly capacitor that has not previously been selected; Step 2) If the voltage of the selected fly capacitor is above its Vtarget and there are remaining (i.e., not been set by this method in this cycle) low-side or high-side switches that can be set to be closed to enable a discharge path for the selected fly capacitor, then set those switches that enable a discharge path for the selected fly capacitor to be closed, decrement one or more appropriate counters (e.g., for the number of low-side switches set to be closed and the number of high-side switches set to be closed), and flag the current fly capacitor as “done” (i.e., as having been selected); otherwise (since the voltage of the selected fly capacitor is below its Vtarget) set the switches that enable a charging path for the selected fly capacitor to be closed and flag the current fly capacitor as “done”; Step 3) Loop to Step 1 until all fly capacitors have been selected; Step 4) For the remaining pair of left-over switches, set the high-side switch or the low-side switch to be closed based on the switch count rules and the counter values.

[0106] With the above generalized capacitor control method, more specific multi-level charge-balancing control methods can be created. Examples can be found, for example, in U.S. Patent Publication No. 20230148059, which is incorporated by reference herein in its entirety.

[0107] Referring to FIG. 11, an example mobile battery charging architecture 1102 will now be described, in accordance with one or more embodiments of the present disclosure. As illustrated, a host system 1100 includes the mobile architecture 1102 including a power converter 1110, which is electrically couplable to one or more external devices 1106 and a battery 1116. The power converter 1110 may include any component and / or circuitry configurable to receive an electrical signal at a first voltage / current and output an electrical signal at a second voltage / current to charge the battery 1116, such as one or more power converters and / or multi-level converters described herein with respect to FIGs. 1A-10.

[0108] In various embodiments, the host system 1100 may be implemented as a mobile device, such as a mobile phone, a mobile tablet, a laptop computer, or other device configurable to operate from the battery 1116 and / or an external wireless and / or wireless charging device. In some embodiments, the mobile charging architecture 1102 is configurable provide power to one or more of the external wireless devices 1112.

[0109] The external device(s) 1106 may include a wireless device 1112 and / or a wired device 1114. The wired device 1114 may include, for example, a power supply, a headset, a storage device, or other external device connected to the host system 1100 via a wired data and / or power connection (e.g., using a USB-C connection or other input / output connection protocol). The wireless device 1112 may be a wireless charger or other wireless device operable with the host system 1100. The battery 1116 may be any configurable to be charged from an external device 1106 through the power converter 1110. The battery 1116 is further configurable to provide a stored charge to a load 1140 (e.g., system components of the host system 1100, which may include, for example, an application processor) and / or an external device 1106.

[0110] In operation, the mobile battery charging architecture 1102 is configurable to detect the presence of one or more external devices 1112 which may include an external power supply, configure the mobile battery charging architecture 1102 to charge the battery 1116 from the external power supply in accordance with one or more charging modes, and supply from the battery an electrical charge to the load 1140 and / or one or more of the external devices 1112. Multiplexer 1104 is configured to route electrical signals between one or more of the external device(s) 1106 and the mobile battery charging architecture 1102.

[0111] The mobile battery charging architecture 1102 further includes battery protection circuitry 1120, including a battery switch 1124 configurable to facilitate the supply of a charge from the battery 1116 to the load 1140 during operation when the battery has sufficient charge, and mitigate current leakage from the battery 1116 when the host system 1100 and / or mobile battery charging architecture 1102 is powered down.

[0112] The battery protection circuitry 1120 further includes a linear regulator 1122, which may be implemented as a low dropout regulator (LDO) or other circuitry configurable to facilitate a trickle charge from an external power supply (e.g., an external wired device 1114) to the battery 1116. In various embodiments, for example, the power supply may include a dedicated power supply and / or a device connected via a combined data and power connection (e.g., a wired USB-C connection or other I / O connection). In operation, the battery 1116 may be charged through the power converter 1110 or through the linear regulator 1122. The battery 1116 may provide power to the load 1140 which may include components of the host system 1100 and an external device 1112.

[0113] The power converter 1110 may be implemented as a single-level power converter or a multi-level power converter and may be configured to operate in a plurality of modes including, for example, a buck mode, a boost mode, and a charge pump mode. The power converter 1110 may include power switch circuitry 1110A (e.g., as described with reference to FIGs. 8A-10) and control circuitry 1110B which is configured to operate the power converter 1110 in accordance with a mode of operation. The control circuitry 1110B operates the power switch circuitry 1110A to receive a first electrical signal from a power supply, charge and discharge external storage components 1108 (e.g., one or more capacitors, inductors, or other components as described herein with respect to FIGs. 1A-10). In some embodiments, the mobile battery charging architecture 1102 may further include optional reverse boost circuitry 1130, configurable to receive a charge from the battery 1116 and generate a charging current for an external device 1106.

[0114] It will be appreciated that the host system 1100 may include other components depending on the implementation. For example, the host system 1100 may include a controller or processor, memory, user input and output components (e.g., touch screen, one or more buttons, or other I / O components), communications components (e.g., antenna, wireless communications components, etc.), and / or other components.

[0115] The mobile battery charging architecture 1102 provides numerous advantages over conventional battery charging systems. The separate linear regulator 1122 and battery switch 1124 (in contrast to conventional systems that use a single battery protection FET) allow designers to separately optimize the selection of the linear regulator 1122 and battery switch 1124, increasing charging efficiency and mitigating current leakage. For example, a conventional approach may include a battery FET that is selected to control power flow in two directions - full current to charge the battery and discharging the battery to Vsys. To accommodate current flow in both directions, the conventional battery protection FET must be large enough to handle the full charge of a buck converter to charge the battery. In the illustrated embodiment, the battery switch 1124 is bypassed, allowing the battery 1116 to be charged directly from the power converter 1110 and / or the linear regulator 1122. In this arrangement, the battery switch 1124 only handles the discharge current from the battery 1116, which is much smaller than the full charging current and allows for a smaller battery switch 1124 to be implemented. This results in reduced area on the integrated circuit required for the conventional battery FET.

[0116] In some embodiments, the system further includes one or more sensing components couplable between the second terminal and the battery to generate a sensed current and / or sensed voltage, which may be monitored by the control circuitry and used to select a charging mode for the battery. For example, if a sensed voltage of the battery is below a first threshold and / or the battery is dead, the linear regulator may be configurable to receive the supply voltage from a wired connection and pass a trickle current to the battery 1116. If the sensed voltage exceeds a second threshold, the control circuitry may start up the power switch circuitry to charge the battery using the second voltage.

[0117] Examples of battery charging modes are illustrated in FIGs. 20A-C. Referring to the chart of FIG. 20B, battery charging zones (Z1-6) are represented on the horizontal axis and voltage levels are shown on the vertical axis. As illustrated, the battery voltage 2022 increases as the battery is charged, with each zone having a different charging mode to facilitate safe and efficient charging. The mobile charging architecture 1102 may be configured to implement a three-stage charging process for charging lithium-ion batteries to prolong battery life and improve performance: (i) the trickle charging stage to start the charging process with a very small current to protect the battery when the battery voltage is lower than a first threshold (e.g., 3 volts); (ii) the constant current charging stage when the battery voltage exceeds the first threshold; and (iii) constant voltage charging stage, when the battery reaches a second threshold (e.g., 4.2 volts), the charger decreases the current until the battery is fully charged.

[0118] Referring to the chart of FIG. 20C, each zone 2032 is listed, with the associated charging time period 2034, a description of the charging mode 2036, and a power converter configuration 2038. At the lowest voltage, charging zone Z1, the battery is dead or otherwise has a battery voltage level below the first threshold. At this level the battery is trickle charged from the power supply via the linear regulator 1122 until the battery has sufficient charge to power up the mobile battery charging architecture 1102. The power converter 1110 is started in a multi-level mode to raise the battery voltage in zone Z2. In zone Z3, the charging process enters a constant current charging stage and in zone Z4, the power converter 1110 may be changed to a charge pump mode of operation. In zone Z5 the charging process enters a constant voltage charging stage (or a taper current stage) and in zone Z6, the charging process continues with the power converter 1110 switched to a multi-level charging mode.

[0119] In some embodiments, if the sensed voltage exceeds a predetermined threshold, the battery switch 1124 is activated to connect the battery to the load 1140 to supply the system voltage. In some embodiments, the linear regulator 1122 may be a low dropout circuit operable to limit a current delivered to the battery 1116 from the supply voltage (e.g., wired device 1114) to a fraction of the battery’s constant current charging current. The battery switch 1124 may include a field-effect transistor configurable to supply the battery charge to the load during operating and to mitigate voltage leakage through the battery switch 1124 when shut down. In some embodiments, the field-effect transistor of the batter switch 1124 may have a maximum current rating and a maximum voltage rating that is higher than the battery’s maximum discharge current and discharge voltage.

[0120] In some embodiments, the power switch circuitry 1110A and the control circuitry 1110B are configurable to operate as a multi-level power converter, such as described herein with reference to FIGs. 1A-10. In some implementations, an integrated circuit comprises the power switch circuitry 1110A, the control circuitry 1110B, and the battery protection circuitry 1120. In some implementations, the battery protection circuitry 1120 is disposed within the battery as illustrated in FIG. 12 or located on another component of host system 1100.

[0121] FIG. 12 illustrates an example system 1200 including a battery pack 1250 with internal protection circuitry 1220 located in the battery pack 1250, in accordance with one or more embodiments of the present disclosure. As previously discussed, with the elimination of the lossy battery protection FET of conventional systems, the host system can rely on battery protection FETs in the battery pack 1250. Elimination of the battery protection FET on the host system chip provides a cost savings without reducing functionality or performance. In this implementation, the system further comprises a communications signal line 1256 between the control circuitry of the power management integrated circuit (PMIC) 1240 and the battery 1252, which may be used to control the battery protection circuitry 1220 and send the sensed voltage for charging and / or other operations. In some embodiments, the protection circuitry 1220 may be implemented using the protection circuitry 1120 of FIG. 11 and controlled with a protection controller 1222 or other circuitry.

[0122] The system 1200 includes components and circuitry as previously described with reference to FIGs. 1A-11, including wireless external device 1212, multiplexer 1204, wired external device 1214 which may provide a supply voltage, and one or more integrated circuits 1240 including a power converter 1244 which is coupled to the battery pack 1250 through an inductor 1248 along electrical path 1254. The integrated circuit 1240 may further includes an interface controller 1246 (e.g., USB-C controller, I2C interface, or the other interface protocols), and a fuel gauge 1242 configurable to monitor the battery 1252 status. The system 1200 may further include an optional parallel charger 1230 which is connected between the external devices 1212 and 1214 and the battery 1252 for charging an external device from the battery 1252.

[0123] FIG. 13 illustrates another example host system 1300 with an example mobile battery charging architecture 1302, in accordance with one or more embodiments of the present disclosure. In this embodiment, the protection circuitry 1320 includes a linear regulator 1322 coupled to the battery 1116 through the battery switch 1324. Like the system of FIG. 11, the power converter 1110 is coupled to the battery 1116, bypassing the battery switch 1324 and allowing a smaller battery switch 1324 FET to be selected compared to conventional systems.

[0124] FIG. 14 illustrates an example method 1400 for operating power converter circuitry with battery protection circuitry (e.g., as described with reference to FIGs. 11-13), in accordance with one or more embodiments of the present disclosure. The method 1400 starts at block 1402 by initiating, using control circuitry, a startup sequence for the mobile battery charging architecture. In block 1404, the system’s control circuitry monitors a voltage at the battery and compares it to a threshold voltage (e.g., 3 volts). In some embodiments, the battery may be monitored using a fuel gauge (e.g., as illustrated in FIG. 12), a sensing circuit including a sense resistor at or near the battery, or other current / voltage sensing circuitry. If the battery is dead or has a low voltage below the threshold, then operation passes to block 1406.

[0125] In block 1406, the battery is charged through the linear regulator which is coupled between a supply voltage and the battery. The linear regulator may be operable to limit a current delivered to the battery from the supply voltage to a fraction of the battery’s constant current charging current. The battery switch may include a field-effect transistor configurable to facilitate the transfer of power from the battery to the load.

[0126] In block 1408, after the battery voltage has risen into zone 2 (see FIG. 20C), the power switch circuitry and control circuitry are powered up and the battery is discharged to a load, such as host system components (block 1410), during charging. The method may further, in block 1412, monitoring the sensed battery voltage and configuring a charging mode of the power converter based on the level of the sensed battery voltage (see, e.g., FIG. 20C) until the battery is fully charged.

[0127] FIGs. 15A-20C illustrate example multi-level charging architectures providing improved charging performance will now be described, in accordance with one or more embodiments of the present disclosure. The multi-level charging architectures are configurable to implement two power paths that are configurable to charge the mobile battery and simultaneously deliver charge to an external load. A single power path may be configurable to charge the mobile battery or deliver charge to an external load. In some embodiments, a new battery charging architecture with a power charger solution can switch between charging modes during the charging cycles. For example, the power charger may be implemented as a multi-level power converter configurable to operate in charge pump mode and a multi-level power converter mode, which may be selected during charging.

[0128] Referring to FIG. 15A, a system 1500 includes battery charger circuitry 1510 configurable to charge a battery 1522. The components of FIG. 15A may be implemented using similar components as previously described with reference to FIGs. 1A-14, except as described below. In some embodiments, the system 1500 is implemented using one or more integrated circuits including a power converter with power switch circuitry (e.g., as described with reference to FIGs. 1A-14) configurable to receive a first voltage at a first terminal and route an electric signal through one or more energy storage components to generate a second voltage at a second terminal. The first terminal is electrically couplable to an external load and the second terminal is electrically couplable to the battery 1522. In various embodiments, the power converter 1516 is configurable to operate in a multi-level mode and a charge pump mode.

[0129] The power converter 1516 further includes an inductor switch 1530 and inductor control circuitry 1532 configurable to control the inductor switch 1530 in accordance with a mode of operation. The inductor switch 1530 is electrically couplable between a small inductor LS and a large inductor LB. The small inductor LS is electrically coupled to a first terminal of the battery switch 1524 and the battery 1522. The large inductor LB is electrically coupled to a second terminal of the battery switch 1524. Generally, the inductor switch 1530 may be couplable between the second terminal and one or more of a plurality of inductors comprising a first inductor and a second inductor, wherein the first inductor has an inductance that is larger than an inductance of the second inductor. The inductances of the first inductor and the second inductor may be selected for compatibility with one or more of the associated operating modes. The inductance control circuitry 1532 may be configurable to operate the inductor switch 1530 to match the inductance for the selected mode of operation by selectively coupling the second terminal to the first inductor, the second inductor, or a combination of the first inductor and second inductor.

[0130] In operation, the power converter 1516 is configurable to operate in a charge pump mode to generate a voltage output to the small inductor, LS, which is coupled directly to the battery 1522. The power converter 1516 is also configurable to operate in a multi-level mode to generate a voltage output to the large inductor, LB, which is coupled to the system voltage, Vsys, and a terminal of the battery switch 1524 (MBAT) to charge the battery 1522. In some embodiments, the inductance control circuitry 1532 is configurable to control the inductor switch 1530 to couple the second terminal to the small inductor, LS, when operating in the charge pump mode and supply the voltage to the battery 1522 without passing through a battery field-effect transistor (such as battery switch 1524). The inductance control circuitry 1532 is also configurable to control the inductor switch 1530 to couple the second terminal to the large inductor when operating in the multi-level mode and pass the voltage to the battery switch 1524.

[0131] The battery charger circuitry 1510 further includes a low power switcher 1518 for reverse power flow from the battery 1522 to a wired or wireless load. The system may further include a fuel gauge 1520 configured to monitor and report battery status to control circuitry. The system may further include a USB-C controller 1514 or similar I / O controller providing power and / or data lines to a wired device. In some embodiments, the wired device may include a power supply 1502 providing a supply voltage to the battery charger circuitry 1510. The battery charger circuitry 1510 further includes a feedback control signal path between the power converter and the various features as described. The feedback signal may be used by the control circuitry to operate the power converter based at least in part on the feedback signal. The battery switch 1524 is operable to couple the battery 1522 to a load (e.g., applications processor 1504) to supply a system voltage, VSYS. The low power switcher 1518 is configurable for reverse power flow from the battery 1522 to a wired and / or wireless load.

[0132] During a dead battery scenario, in which the battery 1522 has no power and / or a low voltage (e.g., a voltage in zone 1 as illustrated in FIGs. 20A-C), the components of the host system 1500 are unable to operate from the battery. For example, a host system application processor 1504 may be unable to communicate with the AC / DC adapter 1502 of a wired device. In this scenario, the USB-C controller 1514 may be used to communicate with the AC / DC adapter 1502 to draw available power. The USB-C controller 1514 may support power delivery (PD), programmable power supply (PPS), adjustable voltage supply (AVS) and / or other charging interface technologies.

[0133] As previously discussed, the power converter 1516 may enter a buck mode when plugged into a power supply to charge the battery 1522. The buck mode may include a charge pump mode and a multi-level regulator mode. The charge pump mode is more efficient, providing less voltage drop across the inductor, LS. In some embodiments, the power converter 1516 may be configurable to operate in a charge pump mode if the power supply 1502 is a programmable power supply such as a USB-PPS compatible supply. If the power supply is a USB-PD supply, the power converter 1516 may operate in a multi-level regulation mode, which is less efficient, and results in slower charging. In some embodiments, if the power converter 1516 is used to power or charge an external device, then the power converter 1516 may be configurable to operate in a reverse boost mode.

[0134] In various embodiments, the battery charger circuitry 1510 includes power path switching circuitry configurable to enable a first power path by selectively coupling one of a wireless path and a wired path to the first terminal of the power converter 1516, and a second power path by selectively coupling the other of the wireless path and wired path to the battery. The power path circuitry may include a multiplexer 1512 connecting the wireless device and wired device to the power converter 1516. In some embodiments, the second power path includes a reverse charging path comprising low power circuitry to provide a charge to a selected one of the wireless path or wired path.

[0135] In some embodiments, the system 1500 is configurable for two power paths which may be selectively configured depending, at least in part, on any wired and / or wireless devices that may be coupled to the system 1500. In a first scenario, a first path charges the battery 1522 via the wired input, and a second path is configurable to allow the battery 1522 to provide a charge via the wireless output. In a second scenario, the first path charges the battery 1522 via the wireless input and the second path is configurable to couple the battery 1522 to the wired output to provide a charge. In a third scenario, the first path is configurable to enable the battery 1522 to provide a charge with the wireless output and the second path provides a charge via a wired output. The configurations may be selected and controlled by control circuitry configured to operate as illustrated in FIGs. 20A-C.

[0136] In some configurations, an input current sense resistor measures the current at an input terminal of the power converter 1516, and a battery sense resistor measure the current at the battery 1522. The control circuitry may be configured to select the power paths and operating modes based on the sensed input current and battery current. For example, the first power path may include the wired path to provide a sensed supply voltage to an input terminal of the power converter 1516 to charge the battery in accordance with a mode of operation (e.g., a charge pump mode, a multi-level regulation mode, or other available mode), and the second power path may couple the wireless path to the voltage supplied by the battery 1522 to charge a wireless device.

[0137] In some configurations, the first power path may include the wireless path providing a supply voltage to an input terminal of the power converter 1516 to charge the battery 1522. The second path may include the wired path to charge a load using a voltage supplied by the battery 1522. The power path switching circuitry may be further configurable to form a third power path by selectively coupling one of a wireless load and a wired load to voltage boost circuitry which is configured to receive a voltage from the battery and / or a system voltage and provide a boosted voltage to charge the coupled one of the wireless load and the wired load.

[0138] Referring to FIG. 15B, another example system 1550 with power path switching circuitry is illustrated, in accordance with one or more embodiments of the present disclosure. The system 1550 illustrates an example embodiment without the low power switcher 1518 of FIG. 15A. In this embodiment, the system voltage, VSYS, is coupled between the large inductor, LB, and a first terminal of the battery switch 1524. The second terminal of the battery switch 1524 is coupled to the battery 1522.

[0139] FIG. 16 illustrates example switching circuitry 1606 which may be used in the circuitry of FIGs. 15A or 15B, in accordance with one or more embodiment of the present disclosure. In the illustrated circuitry 1600, the switching circuitry 1606 comprises one or more switches (e.g., S1 and S2) to selectively couple a wireless input / output device 1602 or a wired input / output device 1604 to the power converter 1610, which is configurable to operate in multi-level converter and charge pump modes.

[0140] Referring to FIGs. 17A-C, example embodiments of switching configurations are illustrated, in accordance with one or more embodiments. The various configurations, 2A-C, correspond to the configurations listed in the table of FIG. 20A. The table illustrates a mapping between an available power supply adapter (e.g., PPS,PD, or AVS), a charging profile identifying the charging modes selected at different stages of the battery charging (e.g., low power switch, multi-level regulation, charge pump), power path configurations that may be implemented, source / path of battery charger, and source / path for the reverse charger.

[0141] FIG. 17A illustrates a configuration 2A which includes circuitry 1700 including a wireless input / output path 1702, and a wired input / output 1704. A multiplexer 1706 selectively couples the wireless input / output path 1704 and wired input / output path 1704 to the power converter 1710 and bidirectional low power switching circuitry 1712. The inductor switch of the power converter 1710 couples the output of the power converter 1710 to Vbat when operating in a charge pump mode. Reverse charging is provided from Vbat through the power converter 1710 to the wireless and / or wired device.

[0142] FIG. 17B illustrates a configuration 2B which includes circuitry 1730 similar to the circuitry 1700 of configuration 2A. In configuration 2B, the inductor switch of power converter 1740 couples the output of the power converter 1740 to a battery switch.

[0143] FIG. 17C illustrates a configuration 2C which includes circuitry 1760, which is similar to the circuitry of configurations 2A and 2B. In configuration 2C, the inductor switch of power converter 1770 couples the output of the power converter 1770 to a battery switch. Reverse charging may be provided from Vbat to the power converter 1770 and / or a parallel reverse boost converter 1772 to the wireless and / or wired device.

[0144] Referring to FIGs. 18A-C, embodiments of switching configurations are illustrated that incorporate aspects of the circuitry from FIGs. 11-14, in accordance with one or more embodiments. The configurations of FIGs. 18A-C correspond to the configurations of FIGs. 17A-C, with the addition of a linear regulator (linear regulator 1814, linear regulator 1844, and linear regulator 1874) coupled between the battery and the power path switching circuitry (including multiplexer 1806), which provides a path for trickle charging the battery as described herein.

[0145] Referring to FIG. 19, another embodiment of a switching configuration is illustrated including a battery pack 1920, in accordance with one more embodiments. In this embodiment, the protection FETs from the battery pack are used allowing the circuitry 1900 to operate without a separate battery switch.

[0146] Referring to FIGs. 20A-C, examples of battery charging modes are illustrated, in accordance with one or more embodiments. In operation, the control circuitry (e.g., control circuitry or controller as described with reference to FIGs. 1A-19) is operable to detect and selectively couple a wired load and / or a wireless load to a first node of power switching circuitry on a primary path, and the other of the wired load and / or wireless load to a battery voltage and / or system voltage via a secondary path. The control circuitry may be further operable to select an operating mode in accordance with the tables illustrated in FIGs. 20A and 20C and operate the power switching circuitry according to the selected mode of operation to convert an input voltage received at the first node to an output voltage at a second node to charge the battery. In some embodiments, the mapping information illustrated in FIGs. 20A-C may be implemented in logic, stored in memory (e.g., as a table), and / or implemented through other circuit configurations. The control circuitry may be further operable to configure the circuitry to provide the battery voltage and / or system voltage to the coupled wired load and / or wireless load. In some embodiments, the secondary path includes a low power switch, linear regulator, and / or reverse boost circuitry.

[0147] A method of operating configuring circuitry includes detecting available wired and / or wireless devices, determining a mode of operating the power converter, configuring one or more power paths including selecting an inductance for the power converter output voltage in accordance with the selected mode of operation. The method may further include monitoring a battery charge status of the battery and switching operating modes between a multi-level power mode and a charge pump mode based on the battery charge status.

[0148] In some embodiments, the control circuitry senses the available charging adapter, such as a PPS, PD, or AVS. If a programmable power supply (PPS) is available, then the power path configurations and charge modes are selected. Including a selection of inductor and reverse charger. Further, the current sense at the input (Iin) and at the battery (Ibat) are sensed. The battery charging may start with the LP SW on and switch configurations to a the 4L converter when a certain zone is reached.

[0149] Further aspects of the present disclosure include the following:

[0150] Aspect 1 includes an integrated circuit comprising power switch circuitry comprising a plurality of switches operable to couple a first terminal and a second terminal, wherein the first terminal is electrically couplable to an external load and wherein the second terminal is electrically couplable to a battery; control circuitry configurable to receive a first voltage and generate a second voltage by operating the power switch circuitry to charge and / or discharge one or more energy storage components in accordance with a selected mode of operation of a plurality of operating modes; and an inductor switch couplable between the second terminal and one or more of a plurality of inductors comprising a first inductor and a second inductor, wherein the first inductor is couplable to a first terminal of a battery switch coupled to the battery, and wherein the second inductor is coupled to the battery and a second terminal of the battery switch.

[0151] Aspect 2 includes the integrated circuit of aspects 1, wherein the plurality of operating modes comprise a charge pump mode and a multi-level mode; wherein the first inductor has an inductance that is larger than an inductance of the second inductor; and wherein the integrated circuit further comprises inductance control circuitry configurable to operate the inductor switch to select an inductance for the selected mode of operation by selectively coupling the second terminal to the first inductor, the second inductor, or a combination of the first inductor and second inductor.

[0152] Aspect 3 includes the integrated circuit of any of aspects 1-2, wherein the inductance control circuitry is configurable to control the inductor switch to connect the second terminal to the second inductor when operating in the charge pump mode and pass the voltage to the battery without passing through a battery field-effect transistor; and wherein the inductance control circuitry is configurable to control the inductor switch to connect the second terminal to the first inductor when operating in the multi-level mode and pass the voltage to the battery field-effect transistor.

[0153] Aspect 4 includes the integrated circuit of any of aspects 1-3, further comprising a battery field-effect transistor to selectively couple the battery to a load, wherein the battery supplies a system voltage to the load.

[0154] Aspect 5 includes the integrated circuit of any of aspects 1-4, further comprising: power path switching circuitry configurable to enable a first power path by selectively coupling one of a wireless path and a wired path to the first terminal, and a second power path by selectively coupling the other of the wireless path and wired path to the battery.

[0155] Aspect 6 includes the integrated circuit of any of aspects 1-5, wherein the second power path comprises a reverse charging path comprising low power circuitry, the second power path operable to provide a charge to the selected one of the wireless path or wired path; and wherein the low power circuitry comprises a low power switcher configurable for reverse power flow from the battery to a wired and / or wireless load.

[0156] Aspect 7 includes the integrated circuit of any of aspects 1-7, wherein the wired path provides a supply voltage to the first terminal on the first power path and wherein the control circuitry is configurable to charge the battery with the second voltage; and wherein the second power path is configurable to charge a load coupled to the wireless path using a voltage supplied by the battery.

[0157] Aspect 8 includes the integrated circuit of any of aspects 1-7, wherein the wireless path provides a supply voltage to the first terminal on the first power path and wherein the control circuitry is configurable to charge the battery with the second voltage; and wherein the second power path is configurable to charge a load coupled to the wired path using a voltage supplied by the battery.

[0158] Aspect 9 includes the integrated circuit of any of aspects 1-8, wherein the battery is discharged to the wireless output; and wherein the battery is discharged to the wired load.

[0159] Aspect 10 includes the integrated circuit of any of aspects 1-9, wherein the power path switching circuitry comprises a multiplexer.

[0160] Aspect 11 includes the integrated circuit of any of aspects 1-10, wherein the power path switching circuitry is further configurable to form a third power path by selectively coupling one of a wireless load and a wired load to voltage boost circuitry which is configured to receive a voltage from the battery and / or a system voltage and provide a boosted voltage to charge the coupled one of the wireless load and the wired load.

[0161] Aspect 12 includes the integrated circuit of any of aspects 1-11, further comprising: a fuel gauge configured to monitor a status of the battery; a wired device controller; and a feedback control path providing a feedback signal; wherein the control circuitry operates the power switch circuitry based at least in part on the feedback signal; and wherein the energy storage components comprise one or more capacitors and / or inductors.

[0162] Aspect 13 includes a method comprising: selectively coupling a wired load and / or a wireless to a first node of power convert switching circuitry on a primary path, and the other of the wired load and / or wireless load to a battery voltage and / or system voltage via a secondary path; operating the power converter switching circuitry according to a selected mode of operation to convert an input voltage received at the first node to an output voltage at a second node to charge the battery; and supplying via the secondary path the battery voltage and / or system voltage to provide power to the coupled wired load and / or wireless load.

[0163] Aspect 14 includes the method of aspect 13, wherein the secondary path comprises a low power switch and / or reverse boost circuitry.

[0164] Aspect 15 includes the method of any of aspects 13-14 further comprising: selecting an inductance for the output voltage in accordance with the selected mode of operation; and coupling, using an inductor switch, the second node to a first inductor having a first inductance, a second inductor having a second inductance lower than the first inductance, or a combination of the first inductor and second inductor, based on the selected inductance, to charge the battery.

[0165] Aspect 16 includes the method of any of aspects 13-15, further comprising: monitoring a battery charge status of the battery; and switching operating modes between a multi-level power mode and a charge pump mode based on the battery charge status.

[0166] Aspect 17 includes a system comprising: multi-level switching circuitry selectively couplable to one or more capacitors; multi-level control circuitry configurable to operate the multi-level switching circuitry in accordance with a selected mode of operation to convert an input voltage received at a first node to an output voltage at a second node to charge a battery; power path switching circuitry configurable to form a first power path by selectively coupling one of a wireless electrical path and a wired electrical path to the first node, and a second power path by selectively coupling the other of the wireless electrical path and wired electrical path to the battery; power path control circuitry configurable to operate the power path switching circuitry based at least in part on a detection of whether each of the wireless electrical path and / or the wired electrical path is coupled to a voltage supply and / or load, and / or a status of the battery; and an inductor switch couplable between the second node and one or more of a plurality of inductors comprising a first inductor and a second inductor, wherein the first inductor and second inductor are couplable to the battery through different terminals of a battery switch.

[0167] Aspect 18 includes the system of aspect 17, further comprising: a fuel gauge configured to monitor the status of the battery; a USB-C controller; and a feedback control path providing a feedback signal; and wherein the multi-level control circuitry operates the multi-level switching circuitry based at least in part on the feedback signal.

[0168] Aspect 19 includes the system of any of aspects 17-18, wherein the second path comprises low power circuitry and / or reverse boost circuitry.

[0169] Aspect 20 includes the system of any of aspects 17-19, wherein the power path control circuitry operates the power path switching circuitry to charge the battery from a detected voltage supply and / or supply a battery voltage to a detected load. General Benefits and Advantages of Multi-Level Power Converters

[0170] Embodiments of the current invention improve the power density and / or power efficiency of incorporating circuits and circuit modules or blocks. As a person of ordinary skill in the art should understand, a system architecture is beneficially impacted utilizing embodiments of the current invention in critical ways, including lower power and / or longer battery life. The current invention therefore specifically encompasses system-level embodiments that are creatively enabled by inclusion in a large system design and application.

[0171] More particularly, multi-level power converters provide or enable numerous benefits and advantages, including:

[0172] - adaptability to applications in which input and / or output voltages may have a wide dynamic-range (e.g., varying battery input voltage levels, varying output voltages);

[0173] - efficiency improvements on the run-time of devices operating on portable electrical energy sources (batteries, generators or fuel cells using liquid or gaseous fuels, solar cells, etc.);

[0174] - efficiency improvements where efficiency is important for thermal management, particularly to protect other components (e.g., displays, nearby ICs) from excessive heat;

[0175] - enabling design optimizations for power efficiency, power density, and form-factor of the power converter - for example, smaller-size multi-level power converters may allow placing power converters in close proximity to loads, thus increasing efficiency, and / or to lower an overall bill of materials;

[0176] - the ability to take advantage of the performance of smaller, low voltage transistors;

[0177] - adaptability to applications in which power sources can vary widely, such as batteries, other power converters, generators or fuel cells using liquid or gaseous fuels, solar cells, line voltage (AC), and DC voltage sources (e.g., USB, USB-C, power-over Ethernet, etc.);

[0178] - adaptability to applications in which loads may vary widely, such as ICs in general (including microprocessors and memory ICs), electrical motors and actuators, transducers, sensors, and displays (e.g., LCDs and LEDs of all types);

[0179] - the ability to be implemented in a number of IC technologies (e.g., MOSFETs, GaN, GaAs, and bulk silicon) and packaging technologies (e.g., flip chips, ball-grid arrays, wafer level scale chip packages, wide-fan out packaging, and embedded packaging).

[0180] The advantages and benefits of multi-level power converters enable usage in a wide array of applications. For example, applications of multi-level power converters include portable and mobile computing and / or communication products and components (e.g., notebook computers, ultra-book computers, tablet devices, and cell phones), displays (e.g., LCDs, LEDs), radio-based devices and systems (e.g., cellular systems, WiFi, Bluetooth, Zigbee, Z-Wave, and GPS-based devices), wired network devices and systems, data centers (e.g., for battery-backup systems and / or power conversion for processing systems and / or electronic / optical networking systems), internet-of-things (IOT) devices (e.g., smart switches and lights, safety sensors, and security cameras), household appliances and electronics (e.g., set-top boxes, battery-operated vacuum cleaners, appliances with built-in radio transceivers such as washers, dryers, and refrigerators), AC / DC power converters, electric vehicles of all types (e.g., for drive trains, control systems, and / or infotainment systems), and other devices and systems that utilize portable electricity generating sources and / or require power conversion.

[0181] Radio system usage includes wireless RF systems (including base stations, relay stations, and hand-held transceivers) that use various technologies and protocols, including various types of orthogonal frequency-division multiplexing (“OFDM”), quadrature amplitude modulation (“QAM”), Code-Division Multiple Access (“CDMA”), Time-Division Multiple Access (“TDMA”), Wide Band Code Division Multiple Access (“W-CDMA”), Global System for Mobile Communications (“GSM”), Long Term Evolution (“LTE”), 5G, and WiFi (e.g., 802.11a, b, g, ac, ax), as well as other radio communication standards and protocols.

[0182] Programmable Embodiments

[0183] Some or all aspects of the invention, particularly the Multi-Level Switch State Selector 1014 of FIG. 10, may be implemented in hardware or software, or a combination of both (e.g., programmable logic arrays). Unless otherwise specified, the algorithms included as part of the invention are not inherently related to any particular computer or other apparatus. In particular, various general purpose computing machines may be used with programs written in accordance with the teachings herein, or it may be more convenient to use a special purpose computer or special-purpose hardware (such as integrated circuits) to perform particular functions. Thus, embodiments of the invention may be implemented in one or more computer programs (i.e., a set of instructions or codes) executing on one or more programmed or programmable computer systems (which may be of various architectures, such as distributed, client / server, or grid) each comprising at least one processor, at least one data storage system (which may include volatile and non-volatile memory and / or storage elements), at least one input device or port, and at least one output device or port. Program instructions or code may be applied to input data to perform the functions described in this disclosure and generate output information. The output information may be applied to one or more output devices in known fashion.

[0184] Each such computer program may be implemented in any desired computer language (including machine, assembly, or high-level procedural, logical, or object-oriented programming languages) to communicate with a computer system, and may be implemented in a distributed manner in which different parts of the computation specified by the software are performed by different computers or processors. In any case, the computer language may be a compiled or interpreted language. Computer programs implementing some or all of the invention may form one or more modules of a larger program or system of programs. Some or all of the elements of the computer program can be implemented as data structures stored in a computer readable medium or other organized data conforming to a data model stored in a data repository.

[0185] Each such computer program may be stored on or downloaded to (for example, by being encoded in a propagated signal and delivered over a communication medium such as a network) a tangible, non-transitory storage media or device (e.g., solid state memory media or devices, or magnetic or optical media) for a period of time (e.g., the time between refresh periods of a dynamic memory device, such as a dynamic RAM, or semi-permanently or permanently), the storage media or device being readable by a general or special purpose programmable computer or processor for configuring and operating the computer or processor when the storage media or device is read by the computer or processor to perform the procedures described above. The inventive system may also be considered to be implemented as a non-transitory computer-readable storage medium, configured with a computer program, where the storage medium so configured causes a computer or processor to operate in a specific or predefined manner to perform the functions described in this disclosure.

[0186] Fabrication Technologies & Options

[0187] In various embodiments of multi-level power converters, it may be beneficial to use specific types of capacitors, particularly for the fly capacitors. For example, it is generally useful for such capacitors to have low equivalent series resistance (ESR), low DC bias degradation, high capacitance, and small volume. Low ESR is especially important for multi-level power converters that incorporate additional switches and fly capacitors to increase the number of voltage levels. Selection of a particular capacitor should be made after consideration of specifications for power level, efficiency, size, etc. Various types of capacitor technologies may be used, including ceramic (including multi-layer ceramic capacitors), electrolytic capacitors, film capacitors (including power film capacitors), and IC-based capacitors. Capacitor dielectrics may vary as needed for particular applications, and may include dielectrics that are paraelectric, such as silicon dioxide (SiO2), hafnium dioxide (HFO2), or aluminum oxide Al2O3. In addition, multi-level power converter designs may beneficially utilize intrinsic parasitic capacitances (e.g., intrinsic to the power FETs) in conjunction with or in lieu of designed capacitors to reduce circuit size and / or increase circuit performance. Selection of capacitors for multi-level power converters may also take into account such factors as capacitor component variations, reduced effective capacitance with DC bias, and ceramic capacitor temperature coefficients (minimum and maximum temperature operating limits, and capacitance variation with temperature).

[0188] Similarly, in various embodiments of multi-level power converters, it may be beneficial to use specific types of inductors. For example, it is generally useful for the inductors to have low DC equivalent resistance, high inductance, and small volume.

[0189] The controller(s) used to control startup and operation of a multi-level power converter may be implemented as a microprocessor, a microcontroller, a digital signal processor (DSP), register-transfer level (RTL) circuitry, and / or combinatorial logic.

[0190] The term “MOSFET”, as used in this disclosure, includes any field effect transistor (FET) having an insulated gate whose voltage determines the conductivity of the transistor, and encompasses insulated gates having a metal or metal-like, insulator, and / or semiconductor structure. The terms “metal” or “metal-like” include at least one electrically conductive material (such as aluminum, copper, or other metal, or highly doped polysilicon, graphene, or other electrical conductor), “insulator” includes at least one insulating material (such as silicon oxide or other dielectric material), and “semiconductor” includes at least one semiconductor material.

[0191] As used in this disclosure, the term “radio frequency” (RF) refers to a rate of oscillation in the range of about 3 kHz to about 300 GHz. This term also includes the frequencies used in wireless communication systems. An RF frequency may be the frequency of an electromagnetic wave or of an alternating voltage or current in a circuit.

[0192] With respect to the figures referenced in this disclosure, the dimensions for the various elements are not to scale; some dimensions have been greatly exaggerated vertically and / or horizontally for clarity or emphasis. In addition, references to orientations and directions (e.g., “top”, “bottom”, “above”, “below”, “lateral”, “vertical”, “horizontal”, etc.) are relative to the example drawings, and not necessarily absolute orientations or directions.

[0193] Various embodiments of the invention can be implemented to meet a wide variety of specifications. Unless otherwise noted above, selection of suitable component values is a matter of design choice. Various embodiments of the invention may be implemented in any suitable integrated circuit (IC) technology (including but not limited to MOSFET structures), or in hybrid or discrete circuit forms. Integrated circuit embodiments may be fabricated using any suitable substrates and processes, including but not limited to standard bulk silicon, high-resistivity bulk CMOS, silicon-on-insulator (SOI), and silicon-on-sapphire (SOS). Unless otherwise noted above, embodiments of the invention may be implemented in other transistor technologies such as bipolar, BiCMOS, LDMOS, BCD, GaAs HBT, GaN HEMT, GaAs pHEMT, and MESFET technologies. However, embodiments of the invention are particularly useful when fabricated using an SOI or SOS based process, or when fabricated with processes having similar characteristics. Fabrication in CMOS using SOI or SOS processes enables circuits with low power consumption, the ability to withstand high power signals during operation due to FET stacking, good linearity, and high frequency operation (i.e., radio frequencies up to and exceeding 300 GHz). Monolithic IC implementation is particularly useful since parasitic capacitances generally can be kept low (or at a minimum, kept uniform across all units, permitting them to be compensated) by careful design.

[0194] Voltage levels may be adjusted, and / or voltage and / or logic signal polarities reversed, depending on a particular specification and / or implementing technology (e.g., NMOS, PMOS, or CMOS, and enhancement mode or depletion mode transistor devices). Component voltage, current, and power handling capabilities may be adapted as needed, for example, by adjusting device sizes, serially “stacking” components (particularly FETs) to withstand greater voltages, and / or using multiple components in parallel to handle greater currents. Additional circuit components may be added to enhance the capabilities of the disclosed circuits and / or to provide additional functionality without significantly altering the functionality of the disclosed circuits.

[0195] Circuits and devices in accordance with the present invention may be used alone or in combination with other components, circuits, and devices. Embodiments of the present invention may be fabricated as integrated circuits (ICs), which may be encased in IC packages and / or in modules for ease of handling, manufacture, and / or improved performance. In particular, IC embodiments of this invention are often used in modules in which one or more of such ICs are combined with other circuit blocks (e.g., filters, amplifiers, passive components, and possibly additional ICs) into one package. The ICs and / or modules are then typically combined with other components, often on a printed circuit board, to form part of an end product such as a cellular telephone, laptop computer, or electronic tablet, or to form a higher-level module which may be used in a wide variety of products, such as vehicles, test equipment, medical devices, etc. Through various configurations of modules and assemblies, such ICs typically enable a mode of communication, often wireless communication.

[0196] A number of embodiments of the disclosure have been described. It is to be understood that various modifications may be made without departing from the spirit and scope of the disclosure. For example, some of the steps described above may be order independent, and thus can be performed in an order different from that described. Further, some of the steps described above may be optional. Various activities described with respect to the methods identified above can be executed in repetitive, serial, and / or parallel fashion.

[0197] It is to be understood that the foregoing description is intended to illustrate and not to limit the scope of the disclosure, which is defined by the scope of the following claims, and that other embodiments are within the scope of the claims. In particular, the scope of the disclosure includes any and all feasible combinations of one or more of the processes, machines, manufactures, or compositions of matter set forth in the claims below. (Note that the parenthetical labels for claim elements are for ease of referring to such elements, and do not in themselves indicate a particular required ordering or enumeration of elements; further, such labels may be reused in dependent claims as references to additional elements without being regarded as starting a conflicting labeling sequence).

Claims

1. An integrated circuit comprising: power switch circuitry comprising a plurality of switches operable to couple a first terminal and a second terminal, wherein the first terminal is electrically couplable to an external load and wherein the second terminal is electrically couplable to a battery; control circuitry configurable to receive a first voltage and generate a second voltage by operating the power switch circuitry to charge and / or discharge one or more energy storage components in accordance with a selected mode of operation of a plurality of operating modes; and an inductor switch couplable between the second terminal and one or more of a plurality of inductors comprising a first inductor and a second inductor, wherein the first inductor is couplable to a first terminal of a battery switch coupled to the battery, and wherein the second inductor is coupled to the battery and a second terminal of the battery switch.

2. The integrated circuit of claim 1, wherein the plurality of operating modes comprise a charge pump mode and a multi-level mode; wherein the first inductor has an inductance that is larger than an inductance of the second inductor; and wherein the integrated circuit further comprises inductance control circuitry configurable to operate the inductor switch to select an inductance for the selected mode of operation by selectively coupling the second terminal to the first inductor, the second inductor, or a combination of the first inductor and second inductor.

3. The integrated circuit of claim 2, wherein the inductance control circuitry is configurable to control the inductor switch to connect the second terminal to the second inductor when operating in the charge pump mode and pass the voltage to the battery without passing through a battery field-effect transistor; and wherein the inductance control circuitry is configurable to control the inductor switch to connect the second terminal to the first inductor when operating in the multi-level mode and pass the voltage to the battery field-effect transistor.

4. The integrated circuit of claim 1, further comprising a battery field-effect transistor to selectively couple the battery to a load, wherein the battery supplies a system voltage to the load.

5. The integrated circuit of claim 1, further comprising: power path switching circuitry configurable to enable a first power path by selectively coupling one of a wireless path and a wired path to the first terminal, and a second power path by selectively coupling the other of the wireless path and wired path to the battery.

6. The integrated circuit of claim 5, wherein the second power path comprises a reverse charging path comprising low power circuitry, the second power path operable to provide a charge to the selected one of the wireless path or wired path; and wherein the low power circuitry comprises a low power switcher configurable for reverse power flow from the battery to a wired and / or wireless load.

7. The integrated circuit of claim 6, wherein the wired path provides a supply voltage to the first terminal on the first power path and wherein the control circuitry is configurable to charge the battery with the second voltage; and wherein the second power path is configurable to charge a load coupled to the wireless path using a voltage supplied by the battery.

8. The integrated circuit of claim 6, wherein the wireless path provides a supply voltage to the first terminal on the first power path and wherein the control circuitry is configurable to charge the battery with the second voltage; and wherein the second power path is configurable to charge a load coupled to the wired path using a voltage supplied by the battery.

9. The integrated circuit of claim 6, wherein the battery is discharged to the wireless output; and wherein the battery is discharged to the wired load.

10. The integrated circuit of claim 6, wherein the power path switching circuitry comprises a multiplexer.

11. The integrated circuit of claim 6, wherein the power path switching circuitry is further configurable to form a third power path by selectively coupling one of a wireless load and a wired load to voltage boost circuitry which is configured to receive a voltage from the battery and / or a system voltage and provide a boosted voltage to charge the coupled one of the wireless load and the wired load.

12. The integrated circuit of claim 1, further comprising: a fuel gauge configured to monitor a status of the battery; a wired device controller; and a feedback control path providing a feedback signal; wherein the control circuitry operates the power switch circuitry based at least in part on the feedback signal; and wherein the energy storage components comprise one or more capacitors and / or inductors.

13. A method comprising: selectively coupling a wired load and / or a wireless to a first node of power convert switching circuitry on a primary path, and the other of the wired load and / or wireless load to a battery voltage and / or system voltage via a secondary path; operating the power converter switching circuitry according to a selected mode of operation to convert an input voltage received at the first node to an output voltage at a second node to charge the battery; and supplying via the secondary path the battery voltage and / or system voltage to provide power to the coupled wired load and / or wireless load.

14. The method of claim 13, wherein the secondary path comprises a low power switch and / or reverse boost circuitry.

15. The method of claim 13, further comprising: selecting an inductance for the output voltage in accordance with the selected mode of operation; and coupling, using an inductor switch, the second node to a first inductor having a first inductance, a second inductor having a second inductance lower than the first inductance, or a combination of the first inductor and second inductor, based on the selected inductance, to charge the battery.

16. The method of claim 13, further comprising: monitoring a battery charge status of the battery; and switching operating modes between a multi-level power mode and a charge pump mode based on the battery charge status.

17. A system comprising: multi-level switching circuitry selectively couplable to one or more capacitors; multi-level control circuitry configurable to operate the multi-level switching circuitry in accordance with a selected mode of operation to convert an input voltage received at a first node to an output voltage at a second node to charge a battery; power path switching circuitry configurable to form a first power path by selectively coupling one of a wireless electrical path and a wired electrical path to the first node, and a second power path by selectively coupling the other of the wireless electrical path and wired electrical path to the battery; power path control circuitry configurable to operate the power path switching circuitry based at least in part on a detection of whether each of the wireless electrical path and / or the wired electrical path is coupled to a voltage supply and / or load, and / or a status of the battery; and an inductor switch couplable between the second node and one or more of a plurality of inductors comprising a first inductor and a second inductor, wherein the first inductor and second inductor are couplable to the battery through different terminals of a battery switch.

18. The system of claim 17, further comprising: a fuel gauge configured to monitor the status of the battery; a USB-C controller; and a feedback control path providing a feedback signal; and wherein the multi-level control circuitry operates the multi-level switching circuitry based at least in part on the feedback signal.

19. The system of claim 17, wherein the second path comprises low power circuitry and / or reverse boost circuitry.

20. The system of claim 17, wherein the power path control circuitry operates the power path switching circuitry to charge the battery from a detected voltage supply and / or supply a battery voltage to a detected load.

21. A system comprising: power switch circuitry configurable to receive a first voltage at first terminal and generate a second voltage at a second terminal, wherein the first terminal is electrically couplable to a supply voltage and the second terminal is electrically couplable to a battery; control circuitry configurable to generate the second voltage from the first voltage by operating the power switch circuitry to charge and / or discharge one or more energy storage components to charge the battery; and a battery protection circuitry comprising: a battery disconnect switch couplable to selectively connect and disconnect the battery from a load; and a linear regulator couplable between the supply voltage and the battery.

22. The system of claim 21, further comprising a current sensing circuit couplable between the second terminal and the battery to generate a sensed current; and wherein the control circuitry is further configurable to monitor the sensed current and select a charging mode for the battery based at least in part on the sensed current.

23. The system of claim 22, wherein if a sensed voltage of the battery is below a first threshold and / or the battery is dead, the linear regulator is configurable to receive the supply voltage from a wired connection and pass a trickle current to the battery.

24. The system of claim 23, wherein after the sensed voltage exceeds a second threshold, the control circuitry starts up the power switch circuitry to charge the battery using the second voltage.

25. The system of claim 24, wherein after the sensed voltage exceeds a second threshold, the battery disconnect switch is activated to connect the battery to the load, allowing the battery to discharge to the load.

26. The system of claim 23, wherein the linear regulator is operable to limit a current delivered to the battery from the supply voltage to a fraction of the battery’s constant current charging current.

27. The system of claim 21, wherein the energy storage components comprise one or more capacitors and / or inductors.

28. The system of claim 21, wherein the battery disconnect switch comprises a field-effect transistor configurable to disconnect the battery from the load when the system is shut down to mitigate voltage leakage; and wherein the field-effect transistor has a maximum current rating and a maximum voltage rating that is higher than the battery’s maximum discharge current and discharge voltage.

29. The system of claim 21, wherein the power switch circuitry and control circuitry are configurable to operate as a multi-level power converter.

30. The system of claim 21, further comprising the battery, wherein the battery protection circuitry is disposed within the battery; and wherein the system further comprises a communications line between the control circuitry and the battery.

31. The system of claim 21, wherein the power switch circuitry, the control circuitry, and the protection circuitry are disposed within an integrated circuit.

32. The system of claim 21, wherein the linear regulator is connected to the battery through the battery disconnect switch.

33. A method comprising: initiating, using control circuitry, a startup sequence for power switch circuitry configurable to route a supply voltage from a first terminal to second terminal to generate a second voltage, wherein the second terminal is electrically couplable to a battery to facilitate battery charging using the second voltage; sensing, via a battery voltage sensing circuit, a voltage at the battery; charging the battery through a linear regulator coupled between the supply voltage and the battery, if the sensed voltage is below a first threshold; and enabling the power switch circuitry and control circuitry if the sensed voltage is above the first threshold facilitating discharge of the battery to a load through a battery switch.

34. The method of claim 33, further comprising: monitoring, via the control circuitry, the sensed voltage; and selecting a battery charging mode based at least in part on the sensed voltage.

35. The method of claim 33, wherein the linear regulator is operable to limit a current delivered to the battery from the supply voltage to a fraction of the battery’s constant current charging current.

36. The method of claim 33, wherein the battery switch comprises a field-effect transistor configurable to disconnect the battery from the load.

37. An integrated circuit comprising: power switch circuitry configurable to receive a first voltage at first terminal and generate a second voltage at a second terminal, wherein the first terminal is electrically couplable to a supply voltage and the second terminal is electrically couplable to a battery; control circuitry configurable to generate a second voltage from the first voltage by operating the power switch circuitry to charge and / or discharge one or more energy storage components to charge the battery; and a battery protection circuit comprising: a battery disconnect switch couplable to selectively connect the battery from a load; and a liner regulator couplable between the supply voltage and the battery.

38. The integrated circuit of claim 37, further comprising: a voltage sense pin couplable between the control circuitry and the voltage sensing circuitry at the battery to provide a sensed voltage to the control circuitry; and wherein the control circuitry is configured to select a charging mode for the battery based at least in part on the sensed voltage.

39. The integrated circuit of claim 38, wherein if the sensed voltage is below a first threshold, the linear regulator is configurable to receive the supply voltage and pass a trickle voltage to the battery.

40. The integrated circuit of claim 38, wherein if the sensed voltage exceeds a second threshold, the control circuitry starts up the power switch circuitry to charge the battery using the second voltage and enables to battery disconnect switch to couple the battery to the load, facilitating discharge of the battery to the load.

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