Component carrier with resin-embedded component, and manufacturing method

Abstract

There is described a component carrier (100) comprising: i) a stack (102) having at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106); ii) a cavity in the stack (102); iii) a component (136) embedded in the cavity; and iv) a first resin (140) extending from a bottom of the cavity to at least part of the lateral side of the component (136) defining an external boundary surface (143); The component (136) comprises an external main surface opposite to the bottom of the cavity, wherein the external boundary surface (143) is vertically misaligned with respect to the external main surface of the component (136).

Description

[0001] Component carrier with resin-embedded component, and manufacturing method

[0002] Field of the Invention

[0003] The invention relates to a component carrier with a stack having at least one electrically conductive layer structure and at least one electrically insulating layer structure, a cavity, a component embedded in the cavity, and a resin extending from a bottom of the cavity to at least part of the lateral side of the component, thereby defining an external boundary surface. The invention further relates to a method of manufacturing said component carrier.

[0004] Accordingly, the invention may relate to the technical field of component carriers, such as printed circuit boards or IC substrates, and their manufacture.

[0005] Technical Background

[0006] In the context of growing product functionalities of component carriers equipped with one or more electronic components and increasing miniaturization of such electronic components as well as a rising number of electronic components to be mounted on the component carriers such as printed circuit boards, increasingly more powerful array-like components or packages having several electronic components are being employed, which have a plurality of contacts or connections, with ever smaller spacing between these contacts. Removal of heat generated by such electronic components and the component carrier itself during operation becomes an increasing issue. Also an efficient protection against electromagnetic interference (EMI) becomes an increasing issue. At the same time, component carriers shall be mechanically robust and electrically and magnetically reliable so as to be operable even under harsh conditions.

[0007] In particular, embedding a component into (the layer stack) of such a component carrier may still be seen as a challenge.

[0008] Figures 4A and 4B show a first conventional approach to embed a component 210 in a cavity 220 of a stack 201 of a circuit board 200. A non- conductive film (NCF) is used as a glue 230 and dispensed at the bottom of the cavity 220. The component 210 is placed in the cavity 220 and sticked with the glue 230 to the cavity 220. The flow of the glue 230 is very low and only distributed at the bottom of the bottom of the cavity 220. Due to the low material flow, there is a low planarity control between the component 210 and the stack surface. Thus, the top of the component 210 and the top of the cavity edge may not be arranged at the desired vertical heights.

[0009] Figures 5A to 5C show a second conventional approach to embed a component 210 in a cavity 220. The cavity 220 is formed as a through-hole and a temporary thin foil 205 is applied to close the bottom of the cavity 220. The component 210 is placed in the cavity 220 with a suitable pressing device 260. In the next step, the component 220 is encapsulated in a resin 230. Finally, the temporary thin foil 205 is removed to yield a circuit board 200 with an embedded component 210. In comparison to the example of Figures 4A and 4B, the top of the component and the top of the cavity edge may be arranged at the same vertical height (but only at the same). However, the process according to Figures 5A to 5C needs several process steps and requires cost and effort.

[0010] Summary of the Invention

[0011] There may be a need to embed a component in a cavity of a component carrier in an efficient and reliable manner. Further, there may be a need to form a component carrier with accurately defiance cavity and in a simple way.

[0012] A component carrier and a manufacturing method are described.

[0013] According to a first aspect of the invention, there is described a component carrier, comprising: i) a stack having at least one electrically conductive layer structure and / or at least one electrically insulating layer structure, ii) a cavity (formed) in the stack, iii) a component embedded in the cavity (in the stack), and iv) a first resin (e.g. a fiber-free resin and / or a (glass) filler resin, such as ABF) extending from a bottom of the cavity to at least part of the lateral side (sidewall) of the component, thereby defining an external boundary surface.

[0014] In particular, the component comprises an external main surface opposite to (away from) the bottom of the cavity, wherein the external boundary surface is vertically (in the Z-direction, parallel to the stacking / thickness direction) misaligned (in other words: not flush) with respect to the external main surface of the component (in other words: the external boundary surface of the first resin is at a different vertical height than the external main surface of the component).

[0015] According to a second aspect of the invention, there is described a method of manufacturing a component carrier, wherein the method comprises: i) providing a stack having at least one electrically conductive layer structure, at least one electrically insulating layer structure, and a cavity, ii) embedding the component in the cavity, and iii) providing a first resin to the component and / or a bottom of the cavity, so that a) the first resin extends from the bottom of the cavity to at least part of the lateral side of the component, thereby defining an external boundary surface, b) the component comprises an external main surface opposite to the bottom of the cavity, and c) the external boundary surface is vertically misaligned (offset) with respect to the external main surface of the component.

[0016] According to a further aspect of the invention, there is described a component carrier, comprising: i) a stack having a plurality of electrically conductive layer structures and electrically insulating layer structures forming a build (-up) structure, wherein said build (-up) structure comprises a cavity, ii) a component embedded in the cavity (in the stack), and iii) a first resin (e.g. a fiber-free resin such as ABF) extending from a bottom of the cavity to at least part of the lateral side (sidewall) of the component, thereby defining an external boundary surface.

[0017] In particular, the component comprises an external main surface opposite to (away from) the bottom of the cavity, wherein the external boundary surface is vertically (in the Z-direction, parallel to the stacking / thickness direction) misaligned (in other words: not flush) with respect to the external main surface of the component (in other words: the external boundary surface of the first resin is at a different vertical height than the external main surface of the component).

[0018] According to an exemplary embodiment of the invention, a component carrier is provided which comprises a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, wherein the at least one electrically insulating layer structure has a first main surface and an opposing second main surface, and at least one cavity formed in the first main surface of the at least one electrically insulating layer structure and being delimited by a bottom wall and a sidewall, wherein a surface of said bottom wall and a surface of said sidewall of the at least one cavity have a different roughness Ra than said first main surface and / or than said second main surface of the at least one electrically insulating layer structure.

[0019] According to another exemplary embodiment of the invention, a method of manufacturing a component carrier is provided, wherein the method comprises providing a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, wherein the at least one electrically insulating layer structure has a first main surface and an opposing second main surface, forming at least one cavity in the first main surface of the at least one electrically insulating layer structure and being delimited by a bottom wall and a sidewall, and forming the at least one cavity so that a surface of said bottom wall and a surface of said sidewall of the at least one cavity have a different roughness Ra than said first main surface and / or than said second main surface of the at least one electrically insulating layer structure.

[0020] In the present context, the term "component carrier" may refer to a final component carrier product as well as to a component carrier preform (i.e. a component carrier in production, in other words a semi-finished product). In an example, a component carrier preform may be a panel that comprises a plurality of semi-finished component carriers that are manufactured together. At a final stage, the panel may be separated into the plurality of final component carrier products.

[0021] In an embodiment, the component carrier "stack" comprises at least one electrically insulating layer structure and at least one electrically conductive layer structure. For example, the component carrier may be a laminate of the mentioned electrically insulating layer structure(s) and electrically conductive layer structure(s), in particular formed by applying mechanical pressure and / or thermal energy. The mentioned stack may provide a plate-shaped component carrier capable of providing a large mounting surface for further components. In an example, the stack may be nevertheless very thin and compact. In another example, the stack may be very thick for a high density product. The stacking direction (height / thickness) may be arranged in the vertical direction z. Further, the stacking direction may be perpendicular to the two directions of main extension (along x and y) of the (plate-shaped) component carrier.

[0022] In the context of the present application, the term "main surface" of a body may particularly denote one of two largest opposing surfaces of the body. The main surfaces may be connected by circumferential side walls. The thickness of a body, such as a stack, may be defined by the distance between the two opposing main surfaces.

[0023] In an example, all layers of the component carrier may form the stack. In another example, only a part of the layers of the component carrier form the stack. In this context, the term "layer structure" may in particular refer to a continuous or discontinuous layer (or separated islands within the same plane) of electrically conductive or electrically insulating material. A plurality of such layers, parallel stacked one upon the other, may form the stack in the vertical direction.

[0024] In an embodiment, the term "first resin" may in particular refer to a resin material arranged in a cavity (in a stack) of a component carrier. The first resin material may be a non-reinforced or a reinforced resin. If the resin is reinforced this may be done in a fiber or fiber-free manner. In an embodiment, particles (in particular spheres) may be applied as a reinforcement material. In a specific embodiment, the first resin may comprise Ajinomoto build-up film (ABF). In the manufacture process, the first resin may be provided to the component and / or the cavity, before the component is placed in said cavity. For example, at least one main surface of the component may be covered by first resin and is then placed (and pressed) in the cavity. In another example, at least the bottom of the cavity may be filled by first resin, and then the component is placed on (and pressed into) the first resin in the cavity. The first resin may be configured to be at least partially flowable (not fully cured), so that the component can be pressed partially into the first resin material. Furthermore, the first resin may be configured to extend (in the vertical direction) partially along the sidewall(s) of the embedded component.

[0025] In an embodiment, the term "external boundary surface" may in particular refer to a region / portion of the first resin in the cavity. When the component is at least partially pressed into said first resin material, a part of the first resin material may extend (be pressed) upwards along the lateral wall of the component up to a specific vertical level. Said vertical level (up to which the first resin extends in the cavity) may be termed the external boundary surface of the first resin. When further embedding the component (e.g. by laminating a second resin on top), a contact region may be formed at the external boundary surface.

[0026] In the context of the present application, the term "cavity" may particularly denote a blind hole or a through hole (for instance a stepped through hole) in the stack of the component carrier. For example, a cavity may be shaped and dimensioned for accommodating an electronic component (such as a semiconductor chip), a heat dissipation block (for instance a copper block or a ceramic block), or another component carrier entirely or partially therein.

[0027] In the context of the present application, the term "roughness" may particularly denote the centerline average height Ra of a surface. Ra is the arithmetic mean value of all distances of the profile from the centerline. For instance, the measurement or determination of roughness Ra, as mentioned in the context of the present application, may be carried out according to DIN EN ISO 4287:2010 (which is an industrial standard). Ra may be the arithmetic average of the absolute values of the deviations of the surface from the average surface profile. The unit of roughness parameter Ra is length and roughness parameter Ra may be measured in micrometers or nanometers. The average surface profile may be screened out from the original surface profile, i.e. the measured surface profile, for example by eliminating waviness components of the surface deviations.

[0028] In the context of the present application, the term "main surface of a body" may particularly denote one or more largest substantially planar surface area(s) or outermost opposing surfaces of the body (for instance the stack). Usually, for instance substantially cuboid bodies may have two opposing main surfaces in the form of two horizontal surface areas on top and on bottom of the body. Thus, the main surface may be different from the sidewalls of the body.

[0029] According to an exemplary embodiment, the invention may be based on the idea that a component may be embedded in a component carrier cavity in an efficient and reliable manner, when the component is placed in the cavity such that a first resin (e.g. a fiber-free resin such as ABF) extends from a bottom of the cavity to at least part of the lateral side of the component, thereby defining an external boundary surface. This structure may reflect a manufacture in which the flow of the first resin is efficiently controlled. To achieve such a control to adjust the flow (and filling height in the cavity) of the resin, several properties may be taken into account, e.g. material of the first resin, temperature / pressure conditions during manufacture, polymerization degree of the first resin, type / shape / amount of reinforcement material, etc.

[0030] In a first manufacture process (see e.g. Figure 1), the first resin may be attached to the component and the component is then pressed into the cavity such that the first resin flows to the lateral walls of the component. In a second manufacture process (see e.g. Figures 3B and 3C), the first resin may be laminated onto the stack (or only into the cavity), and the component is pressed (partially) into said first resin, thereby forming a cavity. In a specific example, the component itself is also able to create a cavity during the assembling process.

[0031] It has been surprisingly turned out that such manufacture steps may be straightforward and highly cost- and effort-efficient. Taking one or more resin- associated properties / conditions into account, the first resin flow may be adjusted to achieve a specific vertical height (external boundary surface) relative to the component in the cavity, e.g. flush with the surface of the stack at the upper edge of the cavity.

[0032] In particular, the component comprises an external main surface opposite to the bottom of the cavity, wherein the external boundary surface is vertically misaligned (in other words: not flush) with respect to the external main surface of the component. Thereby, an efficient and robust basis may be provided to enable further covering by a second resin.

[0033] In particular, the described approach may improve the accuracy of component placement (in particular vertical height).

[0034] According to an exemplary embodiment of the invention, a component carrier (such as a printed circuit board or an integrated circuit substrate) has a (preferably laminated) layer stack including an electrically insulating layer structure (for instance a glass core) with a cavity formed in a main surface thereof. The latter may be delimited by a bottom wall and a sidewall with roughness Ra differing from a roughness Ra of a main surface of said electrically insulating layer structure. Advantageously, this component carrier design and a corresponding manufacturing method may allow to selectively adjust the roughness Ra in a surface delimiting said cavity in a different way than the roughness Ra of the delimiting main surface(s) of the electrically insulating layer structure in which said cavity is formed. For instance, when a component (such as a semiconductor chip) is to be embedded in the cavity, a relatively rough cavity may be desired in order to ensure proper adhesion between cavity walls and component. When however the cavity is used for instance for a high- frequency application (for example for designing a hollow waveguide), a cavity with relatively smooth walls may be desired for suppressing losses. Thus, the selective adjustment of the roughness Ra of the cavity may be of utmost advantage for various component carrier applications. Preferably, cavity formation by a combination of laser processing for locally modifying the material of the electrically insulating layer structure and subsequent etching selectively of the modified material has turned out as a powerful method for local roughness Ra adjustment since the light of the laser can flexibly modify the material by adjusting the depth and / or length the light propagates into the material, wherein the depth of the light entering into the material may impact the roughness of the material.

[0035] Exemplary Embodiments

[0036] In an embodiment, the component carrier further comprises: a second resin (in particular a resin layer structure, for example reinforced or nonreinforced, in particular fiber-reinforced). One side (in particular the side opposed to the main surface of the second resin layer structure away from the component) of the second resin is in contact with at least one of the component, one of the layer structures of the stack, and the first resin; thereby defining an internal boundary surface. In an embodiment, the internal boundary surface and the external boundary surface define a respective contact region (where they are in physical contact with each other). This may provide the advantage that a robust and efficient embedding is enabled. The second resin can function as a protection to the embedded component, for example like a protective lid. Since the external boundary surface of the first resin is vertically misaligned with the external main surface of the component, the free space between these surfaces may be efficiently filed with the second resin. Preferably, the internal boundary surface and the external boundary surface may have a respective shape like a key-lock (positive / negative) pattern, in order to ensure good adhesion with each other. In an embodiment, the first resin is cured before the second resin. In an embodiment, the internal boundary surface and the external boundary surface are defined by the first resin and the second resin cured one before the other. This process step may be recognizable in the final component carrier product (product-by-process) through the contact region, defined by the two boundary surfaces (external boundary surface and internal boundary surface). Said contact region (interface) may be formed because the second resin, before complete curing, flows against the external boundary surface / profile of the already cured first resin. Hence, said contact region may be distinguishable through a cross section of the component carrier. By curing the first resin in the first place, the component may be positioned / embedded in a more stable and precise manner. When the second resin is added, the component is already securely fixed in its desired position and not removed / disturbed by the flowing second resin.

[0037] In an embodiment, the bottom portion of the (at least one) cavity, in particular facing the component (first main surface of the component), is fully filled with the first resin. This may provide the advantage that the component can be placed directly on the (not fully cured) first resin and gets fixed in the cavity in a flexible manner. In other words, the first resin in the cavity functions as an adhesive to fix the component. The component can be pressed into the first resin in a smooth manner, thereby avoided potential damages to the component.

[0038] In an embodiment, the component can be pressed into the middle of the lateral direction of the cavity, such that the force received by component could be equal from two lateral directions. Thus, the component can be placed to desired position without shifting.

[0039] In an embodiment, the first resin extends only around (not on) the component. In an embodiment, the upper surface (facing away from the component) of the layer structure of the stack, defining the edge of the cavity, is free of the first resin. The term "edge of the cavity" may denote in this context the edge composed by the lateral wall of the cavity intersecting with the upper surface of the layer structure defining the cavity boundary surface. Thus, the first resin is used to fix the component and embed the bottom and at least part of the sidewalls of the component. Yet, it may be not desired to also cover the top of the component (upper main surface). This may provide the advantage that a clearly defined external boundary surface is provided onto which a second resin may be efficiently placed to cover the top of the component.

[0040] In an embodiment, the component carrier further comprises a core layer structure in the stack, wherein the component and the cavity are arranged at least partially in said core layer structure. A core layer structure may comprise a robust material such as fully cured resin (e.g. FR.4), an inorganic layer structure (e.g. glass, ceramics, semiconductor material), or a metal. Such a core layer structure may be a common measure to increase the stability of a component carrier. Thus, the core layer structure may be especially suitable to securely embed a component.

[0041] In an embodiment, the component carrier further comprises a build-up structure (a plurality of electrically insulating layer structures and electrically conductive layer structures) in the stack, wherein the component and the cavity are arranged at least partially in said build-up structure. This embodiment may increase the design flexibility, because the component may be embedded in a flexible manner at the desired location. The term "build up" may refer in this context to a plurality of layer structures stacked on top of each other. These layers may be thinner than a core layer structure. A build-up can be done on top (or below) such a core layer structure. While the build-up layers are normally formed by lamination (and are hence not fully cured), the core layer structure is may comprise fully cured material.

[0042] In an embodiment, a first (external main) surface of the component, oriented towards a bottom of the (at least one) cavity, is fully covered by the first resin. In other words, the bottom part of the component is fully immersed in first resin, thereby increasing the stability of the embedding process.

[0043] In an embodiment, the external boundary surface is provided at the side of the component that is in contact with the second resin. Thereby, a contact region can be formed between first resin and the second resin at the lateral wall (sidewall) of the component.

[0044] In an embodiment, the component carrier further comprises: residues of the first resin are provided / arranged at the (second) external main surface of the component and / or at one side of the one of the layer structures being in contact with the second resin. These structural features may reflect a manufacture step of pressing the component in the (not fully cured) first resin (before adding the second resin). The residues may result from spills of the not fully cured first resin during the embedding / encapsulating process, preferably subsequently removed from the external main surface of the component, but remaining in small, preferably randomly, distributed spots.

[0045] In an embodiment, the external main surface of the component is misaligned (e.g. 1 to 5 pm, in particular + / - 2 pm) with respect to an adjacent layer structure of the stack (in particular the one of the layer structures in contact with the second resin), which defines the cavity (in particular the upper edge of the cavity). In an embodiment, the (second, upper) external main surface of the component is below / above the adjacent layer structure of the stack (in particular the layer structure in contact with the second resin), which defines the cavity (in particular the upper edge of the cavity). In other words, the external main surface of the component is not flush with the upper main surface / edge of the cavity. This may enable a more robust embedding, since the component is fully placed in the cavity, thereby increasing the protection.

[0046] In an embodiment, a portion of the first resin overlaps and is in contact with the first / second external main second surface of the component. As described above for the residues, such a contact may reflect a manufacture step of pressing the component in not fully cured first resin, thereby eventually producing spills of first resin that can then (partially) overlap upper parts of the component.

[0047] In an embodiment, the component comprises a surface with an electrically connecting portion, in particular a pad / terminal, at the second external main surface of the component. This may provide the advantage that electric contacts of the component can be easily accessed (arranged opposed to the bottom of the cavity) for further applications.

[0048] In an embodiment, the top of the component is free of first resin material. Thus, an electrical connection to the top of the component may be provided without additional process steps.

[0049] In an embodiment, the electrically connecting portion is flush with the (second external main) surface of the component. In an embodiment, the electrical connecting portion, in particular a pillar, protrudes from the surface of the component, in particular at least partially extending through the second resin (see e.g. Figure 3C). Thereby, the design and application flexibility may be increased. Embedding the electrically connecting portions in second resin may increase the reliability of these contacts. In an embodiment, the component carrier further comprises a further layer structure on the second resin. In an embodiment, the space between the second resin and the component / adjacent layer is free of the further layer structure. In an embodiment, the further layer structure can be either electrically conductive or electrically insulating. The further layer structure may stabilize the embedded component, e.g. by covering the second resin. The further layer structure can also be a further layer of a build-up structure. The further layer structure can also be a solder resist and / or a surface finish. In an embodiment, the second resin (layer structure) may have only the function to planarize the misalignment between the component and the adjacent layer. The further layer structure may then serve for the stabilisation / further build-up.

[0050] In an embodiment, an electrically conductive layer structure (being different from the further layer structure) is connected on the surface of the component and / or to the layer structure adjacent to the component. In an embodiment, the (further) electrically conductive layer structure extends at least partially through the second resin. Thereby, an efficient and reliable electrical connection of the component may be enabled. For example, the second resin (and the further layer structure) may serve as a protection to the connecting portions of the component, while the electrically conductive layer structure may serve for electrically contacting. In an embodiment, the electrically conductive layer structure may extend at least partially through the second resin and / or the further layer structure.

[0051] In an embodiment, the external boundary surface extends along the direction between the component and the cavity profile defining a rounded shape, in particular a convex shape or a concave shape (of the external boundary surface). This structural feature may reflect a manufacture step of pressing the component in first resin, so that a part of the first resin will move along the lateral wall of the component. As discussed above, the first resin may not move up to the upper main surface of the component, but stop on the way, thereby defining the external boundary surface. Said external boundary surface may not be planar, but may also be shaped rounded, e.g. concave / convex, depending on the process conditions. A rounded shape may enable a more stable connection with second resin (e.g. increasing the connection surface).

[0052] In an embodiment, the first resin comprises a resin material with reinforcement particles, in particular free of fibers, more in particular ABF. In an embodiment, the second resin comprises stack material, e.g. non-reinforced resin or prepreg). In an embodiment, the first resin and the second resin comprise the same material (e.g. ABF) or different materials. Depending on the desired application, different established materials may be directly applied. Providing a stack material (e.g. reinforced (in particular fiber) or non-reinforced resin) may improve the integrity of the second resin (and / or the first resin) in the (build-up) layer stack.

[0053] In an embodiment, the first resin is in contact with three, in particular five sides (upper main surface) of the component. Thereby, a robust embedding may be enabled.

[0054] In an embodiment, an angle between the surface of the component and a surface of a layer structure of the stack or a surface of the first resin is smaller than 2°. This feature may indicate that the difference in height is quite small in this example.

[0055] In an embodiment, when more than one component is embedded in more than one cavity, the difference level in stacking direction of respective top surface of the components is smaller than 2 pm. Thereby, a high integrity may be provided. Further, this measure may indicate a precise manufacture process.

[0056] In an embodiment, a plurality of components may have different thicknesses. In an embodiment, the top surfaces (far away from the bottom of cavity) of said plurality of components may still be (essentially) on the same level.

[0057] In an embodiment, the method further comprises: controlling the temperature and / or pressure to thereby adjust the properties of the first resin. Depending on the temperature / pressure conditions, the properties (in particular viscosity, flow behaviour) of the first resin may be controlled / regulated and adapted to specific applications. For example, a high accuracy assembling in z- axis (stack thickness direction), in particular when a vacuum may be applied.

[0058] In an embodiment, the method further comprises: providing a second resin, in particular a resin layer structure, so that the second resin is in contact with at least one of the component, one of the layer structures of the stack, and the first resin. Hence, the second resin may serve to compensate for the vertical misalignment.

[0059] In an embodiment, the first resin is (fully) cured before the second resin (is fully cured). See discussion above. In an embodiment, wherein the component is an optical component and / or wherein the second resin comprises a translucent, in particular transparent, material.

[0060] In an embodiment, the component carrier comprises at least two components (see e.g. Figure 2) electrically connected to a bridge structure. Said embodiment may further comprise a driver, surface-mounted or also embedded.

[0061] In an exemplary embodiment, ABF sheets are applied to fix a component in a cavity. A homogeneous material is hereby used, and the same material as used for build-up (no mixed materials). The resin is placed directly on the backside of the component. By Z-Axis control, the component is placed in the cavity and fixed at defined position. A combination of chip assembly and cavity fixing (no additional lamination steps needed) may hence be realized.

[0062] In the following, further exemplary embodiments of the component carrier and the method will be explained.

[0063] For example, the roughness Ra of the bottom wall and / or the sidewall of the cavity and / or for the main surfaces of the glass core may be in a range from 300 nm to 5000 nm, in particular in a range from 500 nm to 1000 nm. In an embodiment, the roughness Ra of said bottom wall and / or said sidewall in the at least one cavity is defined by peaks and valleys. Peaks may denote locally protruding structures, whereas valleys may denote locally retracted structures of the respective walls. An alternating sequence of peaks and valleys may lead to a rough or profiled surface structure corresponding to a certain roughness Ra value. Such kind of profile may be generally determined by the material composition of the component carrier considering the material is inorganic material, in particular, the material is glass material, and the depth of the laser light goes into the glass, and compressive stress of the glass.

[0064] In the entire bottom wall or side wall, the surface of glass may have a uniform or substantially uniform roughness. Such kind of texture of glass can improve the adhesion with the encapsulated material, and the adhesion may be the same or may be similar in all areas. There may be no void or delamination between the two layers. Additionally, the stress in the modified area may be also the same or similar, which may avoid cracks of the glass. The laser light emitted to the glass surface may also be uniform. The compressive stress at the primary surface of the glass substrate may be balanced by a tensile stress (also referred to as "central tension") within the interior of the glass substrate.

[0065] In an embodiment, at least part of the valleys are arranged along straight valley sections in a plan view on the at least one cavity. Straight valley sections may correspond to a surface portion of the respective cavity wall where an elongate valley section between surrounding peaks has a linear or substantially linear appearance. Such a straight valley section may function as an anchoring line for anchoring of an adhesive attaching film and / or (for instance resin-type) encapsulating material between electrically insulating layer structure and embedded component.

[0066] In an embodiment, the roughness Ra of said bottom wall in the at least one cavity is defined by peaks and valleys, wherein a majority of the valleys are arranged along straight valley sections extending substantially parallel to each other in a plan view on the at least one cavity. A majority may denote in particular more than 50% of the valleys. However, in other embodiments, around 50% of the valleys have the aforementioned feature. Said valleys may be arranged essentially parallel to each other and may therefore function as adhesion promoting structures which may enhance mechanical anchoring between an embedded component, cavity walls and connecting material in between. Such valleys arranged at said bottom may all have a uniform or substantially uniform depth or size due to the accurate modification by the laser beam, the material composition and the balanced distribution of comprehensive stress to the material to finally modify the property of material in a uniform manner.

[0067] In an embodiment, the majority of the valleys extend along an inclined direction, for instance along a diagonal direction, with respect to said sidewalls. Thus, the above-mentioned anchoring effect may be achieved along spatial contributions concerning both of two mutually perpendicular sidewalls. The valleys may extend along an inclined direction with respect to said sidewalls in a uniform manner. That means that the adhesion between the edge area and encapsulation material may be good. Additionally, the comprehensive stress at the edge can be also balanced and a crack of the component carrier can be avoided.

[0068] In an embodiment, the roughness Ra of said bottom wall and / or said sidewall in the at least one cavity is defined by peaks and valleys, wherein a thickness extension of at least a plurality of the peaks creates undercuts along a thickness direction of the stack. Such undercuts may allow excellent anchoring of connecting material (such as an attaching film and / or encapsulating resin) in the cavity between an embedded component and the electrically insulating layer structure. In the context, the attaching film can be an adhesive material with the adhesive property to connect the component with the cavity bottom wall or can be a non-adhesive material being a filling material to fill in the opening of the cavity bottom wall or recess which may be from roughness formation at the cavity bottom wall to be an intermedium layer between the cavity bottom wall and component as a bonding interface.

[0069] In an embodiment, the roughness Ra of said bottom wall and / or said sidewall in the at least one cavity is defined by peaks and valleys, wherein a thickness extension of at least a plurality of the peaks on the bottom wall follows a different direction with respect to a thickness extension of at least a plurality of the peaks on the sidewall. For instance, the valleys may extend in a direction or thickness extension substantially vertically into the bottom wall, whereas the valleys may extend in a direction or thickness extension substantially horizontally into the sidewalls. The depth or size of valleys arranged at the sidewall and the depth or size of valleys arranged at the bottom wall may be different, and / or the height or size of peaks arranged at the sidewall may be different from the height or size of peaks arranged at the bottom wall. This kind of structure may provide different level of adhesion based on the actual requirement for an application of the component carrier. This may be due to the fact that, in certain applications, a component placed in the cavity may need stronger adhesion with said bottom wall to prevent delamination between the component and the component carrier due to the CTE (coefficient of thermal expansion) mismatch between materials of the component and the component carrier.

[0070] In an embodiment, the roughness Ra of said bottom wall and / or said sidewall in the at least one cavity is defined by peaks and valleys, wherein undercuts are provided in the at least one cavity along a thickness direction of the stack by different extensions of the peaks. In particular, the peaks may have vertical sections and horizontal sections which may together form said undercuts. The latter may significantly improve the adhesion promoting effect of the cavity walls as the undercuts may provide an anchoring point for the edge of the cavity to improve the adhesion at the bonding interface between the said bottom wall and / or sidewall and the encapsulation material.

[0071] In an embodiment, the roughness Ra of said bottom wall and / or said sidewall in the at least one cavity is defined by peaks and valleys, wherein said valleys divide said peaks into islands (preferably adjacent islands) each comprising at least one of said peaks, for example a plurality of said peaks. Each island may be surrounded by valleys so as to form a rock-like profile. This may function as an efficient adhesion promoter. Additionally such kind of profile may be already structured at a distance or accuracy that the material can be modified and later on be removed without crack or damage of the component carrier.

[0072] In an embodiment, at least part of said islands has, in a plan view of the at least one cavity, a length in a range from 0.2 pm to 15 pm, for example in a range from 0.5 pm to 5 pm, in at least one horizontal direction. Islands of such a shape may function in an excellent way as anchoring structures.

[0073] In an embodiment, the peaks at the said bottom wall or said sidewall have the same height or size, and the valleys at said bottom wall or said sidewall have the same depth or size. That means that the profile at the entire bottom wall or side walls may be arranged in a uniform manner. Therefore, a good encapsulation may be guaranteed in the cavity. Furthermore, bubbles or voids may be avoided in the encapsulation material. Beyond this, this may also lead to a flat surface on the dielectric layer surface of the build-up. Meanwhile the distribution of the center strength from the component carrier during the laser treatment and after the laser treatment can be distributed evenly, thus a risk of crack or damage can be avoided, in particular at the glass component carrier.

[0074] In one embodiment, the peaks at said bottom wall and at said sidewall may have the same height or size, and the valleys at said bottom wall and said sidewall may have the same depth or size. This may lead to the same roughness on the bottom wall and the side walls of said cavity, which may result from the laser modification to materials at the same level and may result in an even distribution of the inner stress or comprehensive stress in the whole cavity. Finally the crack and damage for the inorganic layer structure or even warpage for the whole component carrier can be controlled.

[0075] In another embodiment, the peaks at said bottom wall and said sidewall have different height or size, and the valleys at said bottom wall and said sidewall have different depth or size. This may lead to different roughness on the bottom wall and the side walls of the said cavity, which may result from the laser modification to materials at the different level. As long as the roughness on the cavity surface is controlled within the tolerance, the whole component carrier will not get damaged and such kind of different texture of surface can be used in different applications. This structure and method may provide the flexibility in manufacturing for the component carrier and final application.

[0076] In an embodiment, at least one of said valleys is configured as a corridor adjacent to a plurality of said islands. Also such corridor-type structures delimiting different islands of peaks may contribute to a pronounced surface profile and thus an efficient increase of roughness. Such kind of corridor-type structures may be due to the accurate control from the laser modification (change of property) to materials, in particular to a glass, so as to form the cavity.

[0077] In an embodiment, said bottom wall and said sidewall are connected to each other by a transitional wall, for example a rounded wall. For example, the bottom wall may be substantially horizontal, whereas an exterior portion of the sidewall may be substantially vertical or slanted. In between these substantially straight sections, a rounded interface may be provided. The round interface at the transitional wall may get less laser treatment during the laser modification to materials, therefore the degree of cracks may be much less. The round interface may provide a buffer for the centre stress spreading from center to a circumference. Moreover, the round interface may reduce the risk of cracks of the whole component carrier, in particular for the glass component carrier.

[0078] In an embodiment, the transitional wall (which may be a rounded wall) has a different roughness from the bottom wall and the sidewall, in particular a smaller roughness. The round characteristic in this area may constitute a buffer area for the stress spread to the edge from the bottom and the sidewall. Therefore, cracks at the corner of the cavity, which may cause damage or crack of the whole component carrier, may be reliably avoided.

[0079] In an embodiment, the roughness Ra of said bottom wall and / or said sidewall and / or said transitional wall in the at least one cavity is defined by peaks and valleys, wherein a thickness extension of the peaks on the transitional wall is different from a thickness extension of the peaks on the bottom wall and / or the sidewall. Hence, the transitional wall may provide a continuous transition between the thickness extensions of the peaks in the respective wall portions on both sides thereof. In another embodiment, the thickness extension in bottom wall and sidewall as well as in the transitional wall may also be the same.

[0080] In an embodiment, the thickness extension of the peaks on the transitional wall varies, for example gradually varies, from the thickness extension of the peaks on the bottom wall to the thickness extension of the peaks on the sidewall. Thus, the transitional wall may provide a smooth transition between bottom wall and sidewall, which may improve the mechanical integrity of the component carrier as a whole.

[0081] In an embodiment, the sidewall of the at least one cavity is substantially perpendicular to said first main surface and / or said second main surface, for example within a deviation of ±10°, for example ±5°. Highly advantageously, the combination of a spatially-resolved glass material modification by a controlled laser beam and a subsequent selective removal of the modified glass material only by wet etching may lead to almost vertical sidewalls. A deviation of ±10° may be significantly less than a deviation obtained with conventional approaches of forming a cavity in an electrically insulating layer structure. The steeply slanted or even almost vertical sidewalls obtained by exemplary embodiments may bring the advantage that an electronic component with rectangular cross-section can be embedded in a controlled and space-saving way in the cavity. With such accuracy for said deviation, the capability to form the substantially straight cavity sidewall can make the cavity size match with the component size in different applications. What's more, the accuracy can avoid the occupation of area for the surface of the component carrier, so that the surface area can be used for the cavity in a minimum manner and more routing or wiring structure can be arranged on the surface. Therefore, this may be advantageous for a high density and fine line structuring component carrier, for instance applied for high performance computing.

[0082] In an embodiment, said first main surface and / or said second main surface is or are planar. In particular, the electrically insulating layer structure in which the at least one cavity is formed may be plate-shaped. Preferably, the electrically insulating layer structure may be an inorganic plate such as a glass plate, a ceramic plate or a semiconductor plate.

[0083] In an embodiment, said surface of said bottom wall has another roughness Ra than said surface of said sidewall. However, bottom wall and sidewall can also have the same roughness. The different roughness or the same roughness can be controlled by the laser modification to material accurately. With such an embodiment, the roughness can be adjusted flexibly based on a final product requirement and / or a manufacturing process requirement.

[0084] In an embodiment, said surface of said bottom wall has a higher roughness Ra than said surface of said sidewall. This may lead to an excellent connection between the particularly rough bottom wall and an adhesive attaching film which may be formed on a bottom main surface of a component to be embedded in the cavity. Since gaps between sidewalls of cavity and component may be filled by flowable resin or the like, lateral adhesion may be less problematic than adhesion of the component on its bottom side.

[0085] In an embodiment, said roughness Ra of said surface of said bottom wall and / or of said surface of said sidewall provide an anchoring boundary region for anchoring an attaching film and / or an encapsulating material at said bottom wall and / or said sidewall of the at least one cavity. Consequently, exemplary embodiments may allow for a highly reliable and precise embedding of a component in the cavity.

[0086] In an embodiment, a plurality of cavities are formed in the first main surface of the at least one electrically insulating layer structure, each of said cavities being delimited by a respective bottom wall and a respective sidewall. Different cavities may be arranged side-by-side, for instance at the same vertical level. It may also be possible to form different cavities at different vertical levels, for instance at least one cavity in the first main surface and at least one cavity in the second main surface of the electrically insulating layer structure. Different cavities may have the same or different shapes and / or dimensions.

[0087] In an embodiment, different ones of said cavities have different sizes, in particular in a horizontal plane and / or in a vertical direction. Such an embodiment of the invention can accurately allow to achieve different size and may allow to modify different levels of material. Hence, it may be possible to form cavities of different horizontal area and / or different depths in the same electrically insulating layer structure. For instance, different lateral extensions of different cavities may be defined by laser scanning areas of different size on the respective main surface of the electrically insulating layer structure. Different depths of different cavities may be defined by adjusting different focusing depths of the laser beam impacting the electrically insulating layer structure. This may define a depth up to which glass material is modified by the laser impact, so that the respective modified glass material up to said depth may be subsequently removed by wet etching.

[0088] In an embodiment, the component carrier comprises at least one component embedded in the at least one cavity. In the context of the present application, the term "component embedded in the at least one cavity" may particularly denote a component being fully accommodated or only partially accommodated in the cavity. In a fully accommodated embodiment, the entire vertical spatial range between upper end and lower end of the component is located inside of the cavity. In a partially accommodated embodiment, only part of a vertical spatial range between upper end and lower end of the component is located inside of the cavity, for instance the component may protrude upwardly and / or downwardly beyond the cavity. In one embodiment, the upper end of the at least partially accommodated component may be in alignment with an upper main surface of the electrically insulating layer structure and / or the lower end of the component may be in alignment with a lower main surface of the electrically insulating layer structure. For instance, the component may be an electrical component for providing an electrical function (such as a semiconductor chip), a thermal component for providing a cooling function (such as a copper or ceramic block) and / or an optical component providing an optical function. For example, the cavity may be shaped and dimensioned for accommodating an electronic component (such as a semiconductor chip), a heat dissipation block (for instance a copper block or a ceramic block), or another component carrier entirely or partially therein.

[0089] Preferably, filling the gaps between component and cavity walls with encapsulant material and laminating a further (preferably organic) electrically insulating layer structure (for instance a sheet comprising curable resin) on the cavity-containing (preferably inorganic) electrically insulating layer structure may be carried out by a single common lamination process using the same lamination material which flows partially inside the gaps and which remains partially on the top main surface of the cavity-containing electrically insulating layer structure.

[0090] In an embodiment, the component carrier comprises an attaching film in said at least one cavity, wherein the at least one component is attached by the attaching film. In one embodiment, the attaching film is already pre-attached to the bottom side of the component, so that only one body needs to be inserted into the cavity. Thus, the component can be bonded with the bottom wall firmly after the curing process. In another embodiment, the attaching film may be formed at the bottom wall of the cavity (for instance by inserting a solid adhesive tape in the cavity or by dispensing glue into the bottom of the cavity) prior to inserting the component on said attaching film.

[0091] In an embodiment, the electrically insulating layer structure comprises or consists of glass. Generally, the electrically insulating layer structure may comprise or consist of glass, a ceramic, a semiconductor, a quartz or a metal. Thus, appropriate materials for the electrically insulating layer structure are glass (in particular silicon-based glass), a ceramic (such as aluminum nitride and / or aluminum oxide), and a material comprising a semiconductor (such as silicon oxide, silicon, silicon carbide, gallium nitride, etc.). It is also possible to make the inorganic layer structure of a metallic material, such as copper.

[0092] In an embodiment, the electrically insulating layer structure comprises or consists of glass. In particular, the electrically insulating layer structure may be a glass core or glass plate. Most preferred is an electrically insulating layer structure which comprises glass or consists of glass. Such an electrically insulating layer structure may comprise or consist of silicon dioxide. In particular, the electrically insulating layer structure may have glass as main constituent. For example, the electrically insulating layer structure may be block-, strip- or plateshaped. The major material component (in particular the material component of the electrically insulating layer structure providing the highest weight percentage) of the electrically insulating layer structure is glass, in particular silicon-based glass. For instance, at least 90 weight percent of the electrically insulating layer structure may be glass. For example, the electrically insulating layer structure may consist only of glass. It is however also possible that the electrically insulating layer structure comprises one or more additional other materials. Advantageously, the electrically insulating layer structure may have very flat surfaces so that a planarization stage during processing may be dispensable and fine line processing thereon or above it may be fully supported. Furthermore, the electrically insulating layer structure may have a high degree of thermal stability so that thermally-caused undesired phenomena such as thermal stress, shrinkage, warpage and delamination will not impact the component carrier significantly. This can make the whole component carrier stable with controllable change of the dimension of the component carrier (such as shrinkage would be less), so the alignment of all elements related to the component carrier may be improved (such as layer to layer alignment, via to pad alignment, pad to via alignment, bump to opening alignment, etc.). Besides that, the coplanarity of components assembled on the component carrier may be improved (such as bumps, capacitors, etc.). Furthermore, glass material may show a low Dk and low Df behavior with good dielectric property and may therefore support low loss, high-frequency (in particular improving radio frequency, RF) and high-speed applications as well as high performance computing application with good signal integrity and low loss.

[0093] In an embodiment, the surface of said bottom wall and the surface of said sidewall have a higher roughness Ra than said first main surface and / or than said second main surface. This may be advantageous for applications in which a component is to be assembled and connected in the cavity, since the locally increased roughness Ra may promote adhesion of such a component in the cavity and may therefore improve accuracy and reliability of the embedding process.

[0094] In an embodiment, a minimum horizontal distance between the first main surface and the bottom wall is not more than 50 pm, for example not more than 15 pm and preferably not more than 10 pm. Thus, the sidewalls of the cavity may be very steep so that an almost rectangular cross-section of the cavity may be obtained. This may allow to assemble a component in the cavity with low space consumption and high spatial precision. Due to the combination of laser modification of glass materials and subsequent wet etching, significantly steeper sidewalls may be achieved as compared with conventional approaches. With such kind of structure, the alignment between the component and the component carrier, as well as the layer to layer alignment may be improved. Additionally, the encapsulation of the cavity may be also good without void.

[0095] In an embodiment, a depth of the at least one cavity is in a range from 10 pm to 200 pm, for example from 30 pm to 100 pm, preferably from 40 pm to 80 pm. For example, a depth of the cavity may be about 60 pm. Such cavity dimensions are compatible with modern semiconductor chip dimensions.

[0096] In another embodiment, the cavity has a depth of at least 500 pm, in particular of at least 700 pm. Advantageously, such a large cavity depth may be capable of supporting a number of high-tech applications, for instance an optical package comprising at least one optical component embedded in the cavity. In an embodiment, the method comprises forming the at least one cavity using a laser treatment. In particular, the method comprises forming the cavity by processing the stack with a laser beam, in particular a Bessel beam. Single laser beam -processing or multiple laser beam-processing are possible. Said laser beam may be specifically configured for attacking bonds of the material of the electrically insulating layer structure. For instance, when the electrically insulating layer structure comprises glass, the laser beam may be specifically adapted for attacking Si-0 bonds. This may be done by adjusting laser wavelength, laser pulse length and / or laser energy. Preferred may be a green picosecond laser, in particular with Bessel beam, wherein the Bessel beam may be a non-diffraction beam. Therefore, the beam distribution may be unchanged at the horizontal direction during transmission to the subject. Meanwhile the main diameter of the beam minimum can be a few micrometers, but the depth of focus can reach to a few millimetres. With such an advantageous Bessel beam shot by a picosecond laser, the glass can be modified or cut with accuracy without cracking, and surface roughness control can be achieved by an accurately controlled transmission distance of the beam with efficiency.

[0097] In an embodiment, the method comprises forming the at least one cavity using etching, for example wet etching, after said laser treatment. The wet etchant may be specifically adapted for dissolving material of the electrically insulating layer structure which has been selectively modified by a prior laser treatment. For removing modified glass material with pre-attacked Si-0 bonds, HF as wet etchant has turned out as highly appropriate. In other embodiments, other etching processes than wet etching may be possible as well. With the etching method, the modified material at the cavity area can be easily removed and no crack or damage may occur on the glass. Since the laser does not remove the material and the etching removes the material, there may be no foreign material generated from cutting. This is a big advantage (what concerns high yield, good reliability) for the manufacture of component carriers, in particular for high density and fine line structuring component carriers used for instance in the high performance computing field.

[0098] In an embodiment, the method comprises using a laser beam having a wavelength in a range from 520 nm to 580 nm, in particular a green laser, for said laser treatment. For instance, the method comprises forming the cavity by processing with a laser beam having a wavelength below 600 nm, for example in a range from 520 nm to 580 nm, such as 550 nm. A laser beam with the described properties may allow to form the cavity with locally roughened cavity surface.

[0099] In an embodiment, the cavity can be formed by a CO2 laser. The laser beam may promote a complete separation around a perforation line. Then the following laser method may produce through-body incisions of various glasses in a single pass with low subsurface damage.

[0100] In an embodiment, it may be possible that a high pressure auxiliary gas is mixed with CC .The beams are forced out collinearly through a nozzle to provide additional force to drive the glass material out of the larger glass piece.

[0101] In an embodiment, the method comprises using a pulsed laser, for example a picosecond-pulsed laser, for said laser treatment. Preferably, the method comprises forming the pulsed laser beam with laser light pulses having a temporal length and / or a temporal distance of not more than 1 ps. For example, a picosecond laser or femtosecond laser may be used for forming the cavity. In another embodiment, it may also be possible to use a nanosecond laser.

[0102] In an embodiment, the method comprises, for said laser treatment, scanning with a laser beam over a surface region of the at least one electrically insulating layer structure in which the at least one cavity is to be formed. In one embodiment, the electrically insulating layer structure or panel may remain spatially fixed while the laser source scans over its surface. In another embodiment, the electrically insulating layer structure or panel may move for scanning while the laser source remains spatially fixed.

[0103] In an embodiment, the method comprises focusing, for said laser treatment, laser light to an intended depth of the at least one cavity to be formed in the at least one electrically insulating layer structure. Highly advantageously, the laser beam may be focused to a depth beneath the first main surface of the electrically insulating layer structure. For instance, the laser beam may be focused to a depth in a range from 30 pm to 100 pm, preferably from 40 pm to 80 pm, beneath said main surface. This may allow to precisely define the cavity depth. In another embodiment, the laser beam may be changed with its centre main lobe diameter and transmission distance of non-diffraction. For instance, by reducing the centre main lobe diameter and shortening the transmission distance of non-diffraction, the taper of the laser beam may be enlarged, this can improve the results. In an embodiment, the method comprises configuring laser light, for said laser treatment, for modifying a glass property of the at least one electrically insulating layer structure in which the at least one cavity is to be formed. The laser light for the depth control may be generated with a laser by using one or more lenses which can have a long light and small focal characteristics, so that the laser light can change the property of glass for a chemical to remove the modified glass. There may be an overlapping focus.

[0104] However, other exemplary embodiments may use another etching method than wet etching. Furthermore, other exemplary embodiments may use continuous (rather than pulsed) laser beams and / or laser light in different wavelength ranges than the green laser mentioned above.

[0105] In an embodiment, the cavity extends vertically only over a single layer structure. However, in another embodiment, the cavity extends vertically over a plurality of layer structures of the stack. For instance, said plurality of layer structures over which the cavity extends vertically may be at least two, in particular at least three, preferably at least four, or even more than four, for instance at least ten. A corresponding deep cavity without structural artefacts may be formed in particular by using a pulsed laser source, for instance having a pulse length of not more than picoseconds, in particular not more than femtoseconds.

[0106] In an embodiment, multiple cavities can be formed in a single layer (such as a core) from the second main surface and first main surface. Furthermore, the component can be embedded in the cavities on two (or more) sides. Advantageously, a density can be improved and a heterogenous package can be realized as well.

[0107] In an embodiment, the cavity may be formed in a central portion of the electrically insulating layer structure or the stack. Alternatively, the cavity may be cut at the edge of the electrically insulating layer structure or the stack. Consequently, there may be only three sidewalls, and there may be a side with a lateral opening. With such kind of structure, an external connection element may be easily inserted, connected and / or disconnected with the component carrier (such as an optical plug and / or an unplug element).

[0108] In an embodiment, the component carrier comprises an electronic component mounted on or above the electrically insulating layer structure. One or more electronic components may be surface mounted. In the context of the present application, the term "electronic component" may particularly denote a member fulfilling an electronic task. Such an electronic component may be an active component such as a semiconductor chip comprising a semiconductor material, in particular as a primary or basic material. The electronic component may also be a passive component, for instance a capacitor or an inductor. Preferably, the electronic component comprises a semiconductor chip. The semiconductor chip may be made for instance based on a type IV semiconductor such as silicon or germanium, or may be a type III-V semiconductor material such as gallium arsenide. In particular, the semiconductor component may be a semiconductor chip such as a bare die or a molded die. A bare die may be a nonencapsulated (in particular non-molded) piece of semiconductor material (such as silicon) having at least one monolithically integrated circuit element (such as a diode or a transistor). Moreover, semiconductor materials suitable for photonic packages are also possible. For example, an electronic component to be surface mounted on the package may be an HBM (high-bandwidth memory) or a silicon interposer.

[0109] In an embodiment, the component carrier comprises a stack of at least one electrically insulating layer structure and at least one electrically conductive layer structure. For example, the component carrier may be a laminate of the mentioned electrically insulating layer structure(s) and electrically conductive layer structure(s), in particular formed by applying mechanical pressure and / or thermal energy. The mentioned stack may provide a plate-shaped component carrier capable of providing a large mounting surface for further components and being nevertheless very thin and compact.

[0110] In an embodiment, the at least one electrically insulating layer structure comprises an inorganic layer structure and / or comprises or consists of glass. See definitions and explanations above. This may bring the advantage of imparting physical properties, for example stiffness, and / or chemical properties, for example resistance an oxidant, to the stack.

[0111] In an embodiment, said roughness Ra of said surface of said bottom wall and / or of said surface of said sidewall provide an anchoring boundary region for anchoring the first resin and / or the second resin at said bottom wall and / or said sidewall of the at least one cavity. This may provide the advantage that the adhesion between the first resin and / or second resin and the bottom wall and / or side wall of the at least one cavity may be increased. The rough surface may for example increase the adhesion between cavity and resin, in particular when (not fully cured) resin flows into the valleys between the peaks of the rough surface and thus additionally creates a mechanical interaction between the rough surface and the resin.

[0112] In an embodiment, the first resin and / or the second resin comprise reinforcement particles, in particular reinforcement sphere (for example glass spheres). Thereby, stability / robustness may be increased while warpage may be decreased. In case of reinforcement particles, such as spheres, there may still be a certain flexibility given for the resin material (in comparison to reinforcement fibers). In an embodiment, the first / second resin may be implemented as an attaching film and / or an encapsulating material.

[0113] In an embodiment, the peaks are in direct contact with the first resin and / or the second resin. This may provide the advantage of improved stability / adhesion, since the peaks may function as anchors in the resin material. Further, the peaks may favourably influence the flow (direction) of the resin.

[0114] In an embodiment, the valleys are at least partially filled with the first resin and / or the second resin. This may also provide the advantage of improved stability / adhesion, since the valleys may function as reservoirs into which the resin can flow and accommodate.

[0115] In an embodiment, at least one reinforcement particle is at least partially provided in at least one valley. Thereby, the reinforcement particle may act as a barb between the valley and the first / second resin and thus may increase the mechanical interaction between the surface of the cavity and the resin. In an embodiment, the first resin and / or the second resin is provided between the valley and the reinforcement particle. In this manner an especially stable interface between resin and sidewall / bottom of the cavity may be provided. The valleys may serve to accommodate one or more particles, and the resin matrix may seal the particles in the valleys.

[0116] In an embodiment, the first resin extends only around the component. In an embodiment, the upper surface of the layer structure of the stack, defining the edge of the at least one cavity, is free of the first resin. Thus, the first resin is only arranged within the cavity, in this example.

[0117] In an embodiment, the external main surface of the component is planarly tilted with respect to an adjacent layer structure of the stack, in particular the one of the layer structures in contact with the second resin, which defines the at least one cavity, in particular the upper edge of the cavity. Since the second resin is at least partially deformable during manufacturing of the component carrier, when providing the component into the stack, the forces created by to provision of the component may be transmitted to the adjacent second resin away from the component. This may reduce the forces on the component and thus may ensure less component breakage during embedding of the component into the component carrier.

[0118] In an embodiment, the component carrier further comprises a further layer structure on the second resin. In an embodiment, the space between said second resin and the component / adjacent layer is free of the further layer structure. In an embodiment, an electrically conductive layer structure is connected on the surface of the component and / or to the layer structure adjacent to the component. In an embodiment, the further electrical conductive layer structure extends at least partially through the second resin. These embodiments may provide the advantage that a further build-up on the embedded component can be realized in a straightforward and efficient manner. On top of the second resin, further layers (insulating / conductive) may be stacked, depending on the desired application. Such layer structures may also (partially) extend through the second resin, e.g. as a via connection.

[0119] In an embodiment, the component carrier is shaped as a plate. This contributes to the compact design, wherein the component carrier nevertheless provides a large basis for mounting components thereon. Furthermore, in particular a bare die as example for an embedded electronic component, can be conveniently embedded, thanks to its small thickness, into a thin plate such as a printed circuit board.

[0120] In an embodiment, the component carrier is configured as one of the group consisting of a printed circuit board, a substrate (in particular an IC substrate), and an interposer.

[0121] In the context of the present application, the term "printed circuit board" (PCB) may particularly denote a plate-shaped component carrier which is formed by laminating several electrically conductive layer structures with several electrically insulating layer structures, for instance by applying pressure and / or by the supply of thermal energy. As preferred materials for PCB technology, the electrically conductive layer structures are made of copper, whereas the electrically insulating layer structures may comprise resin and / or glass fibers, so- called prepreg or FR.4 material. The various electrically conductive layer structures may be connected to one another in a desired way by forming holes through the laminate, for instance by laser drilling or mechanical drilling, and by partially or fully filling them with electrically conductive material (in particular copper), thereby forming vias or any other through-hole connections. The filled hole either connects the whole stack, (through-hole connections extending through several layers or the entire stack), or the filled hole connects at least two electrically conductive layers, called via. Similarly, optical interconnections can be formed through individual layers of the stack in order to receive an electro-optical circuit board (EOCB). Apart from one or more components which may be embedded in a printed circuit board, a printed circuit board is usually configured for accommodating one or more components on one or both opposing surfaces of the plate-shaped printed circuit board. They may be connected to the respective main surface by soldering. A dielectric part of a PCB may be composed of resin with reinforcing fibers (such as glass fibers).

[0122] In the context of the present application, the term "substrate" may particularly denote a small component carrier. A substrate may be a, in relation to a PCB, comparably small component carrier onto which one or more components may be mounted and that may act as a connection medium between one or more chip(s) and a further PCB. For instance, a substrate may have substantially the same size as a component (in particular an electronic component) to be mounted thereon (for instance in case of a Chip Scale Package (CSP)). More specifically, a substrate can be understood as a carrier for electrical connections or electrical networks as well as component carrier comparable to a printed circuit board (PCB), however with a considerably higher density of laterally and / or vertically arranged connections. Lateral connections are for example conductive paths, whereas vertical connections may be for example drill holes. These lateral and / or vertical connections are arranged within the substrate and can be used to provide electrical, thermal and / or mechanical connections of housed components or unhoused components (such as bare dies), particularly of IC chips, with a printed circuit board or intermediate printed circuit board. Thus, the term "substrate" also includes "IC substrates". A dielectric part of a substrate may be composed of resin with reinforcing particles (such as reinforcing spheres, in particular glass spheres). In the context of the present application, the term "inorganic layer structure" may particularly denote a layer structure which comprises inorganic material, such as an inorganic compound. In particular, dielectric material of the inorganic layer structure or even the entire inorganic layer structure may be made exclusively or at least substantially exclusively from inorganic material. In another embodiment, the inorganic layer structure may comprise inorganic dielectric material and additionally another dielectric material. An inorganic compound may be a chemical compound that lacks carbon-hydrogen bonds or a chemical compound that is not an organic compound. In an example, the inorganic layer structure may comprise glass, for example silicon base glass, in particular soda lime glass, and / or boro-silicate glass and / or alumo-silicate glass and / or lithium silicate glass and / or alkaline free glass. In another example, the inorganic layer structure may comprise ceramic material, for example aluminum nitride and / or aluminum oxide and / or silicon nitride and / or boron nitride and / or tungsten comprising ceramic material. Yet, in another example, the inorganic layer structure may comprise semi-conducting material, for example silicon and / or germanium and / or silicon oxide and / or germanium oxide and / or silicon carbide and / or gallium nitride. In a further embodiment, the inorganic layer structure may comprise (elemental) metal and / or metal alloys, for example, copper and / or tin and / or bronze. Yet in another embodiment, the inorganic layer structure may comprise inorganic material, which is not listed in the above mentioned example, such as: MoS2, CuGaO2, AgAIO2, LiGaTe2, AgInSe2, CuFeS2, BeO.

[0123] The substrate or interposer may comprise or consist of at least a layer of glass, silicon (Si) and / or a photoimageable or dry-etchable organic material like epoxy-based build-up material (such as epoxy-based build-up film) or polymer compounds (which may or may not include photo- and / or thermosensitive molecules) like polyimide or polybenzoxazole.

[0124] In an embodiment, the at least one electrically insulating layer structure (and / or the curable dielectric elements) comprises at least one of the group consisting of a resin or a polymer, such as epoxy resin, cyanate ester resin, benzocyclobutene resin, bismaleimide-triazine resin, polyphenylene derivate (e.g. based on polyphenylenether, PPE), polyimide (PI), polyamide (PA), liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), polyvinylidene fluoride (PVDF) and / or a combination thereof. Reinforcing structures such as webs, fibers, spheres or other kinds of filler particles, for example made of glass (multilayer glass) in order to form a composite, could be used as well. A semicured resin in combination with a reinforcing agent, e.g. fibers impregnated with the above-mentioned resins is called prepreg. These prepregs are often named after their properties e.g. FR4 or FR5, which describe their flame retardant properties. Although prepreg particularly FR4 are usually preferred for rigid PCBs, other materials, in particular epoxy-based build-up materials (such as build-up films) or photoimageable dielectric materials, may be used as well. For high frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymer and / or cyanate ester resins, may be preferred. Besides these polymers, low temperature cofired ceramics (LTCC) or other low, very low or ultra-low DK materials may be applied in the component carrier as electrically insulating structures.

[0125] In an embodiment, the at least one electrically conductive layer structure comprises at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, tungsten, carbon, platinum, (doped) silicon, and magnesium. Although copper is usually preferred, other materials or coated versions thereof are possible as well, in particular coated with supra-conductive material or conductive polymers, such as graphene or poly(3,4- ethylenedioxythiophene) (PEDOT), respectively.

[0126] At least one component may be embedded in the component carrier and / or may be surface mounted on the component carrier. Such a component can be selected from a group consisting of an electrically non-conductive inlay, an electrically conductive inlay (such as a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (for example a heat pipe), a light guiding element (for example an optical waveguide or a light conductor connection), an electronic component, or combinations thereof. An inlay can be for instance a metal block, with or without an insulating material coating (IMS- inlay), which could be either embedded or surface mounted for the purpose of facilitating heat dissipation. Suitable materials are defined according to their thermal conductivity, which should be at least 2 W / mK. Such materials are often based, but not limited to metals, metal-oxides and / or ceramics as for instance copper, aluminium oxide (AI2O3) or aluminum nitride (AIN). In order to increase the heat exchange capacity, other geometries with increased surface area are frequently used as well. Furthermore, a component can be an active electronic component (having at least one p-n-junction implemented), a passive electronic component such as a resistor, an inductance, or capacitor, an electronic chip, a storage device (for instance a DRAM or another data memory), a filter, an integrated circuit (such as field-programmable gate array (FPGA), programmable array logic (PAL), generic array logic (GAL) and complex programmable logic devices (CPLDs)), a signal processing component, a power management component (such as a field-effect transistor (FET), metal-oxide-semiconductor field-effect transistor (MOSFET), complementary metal-oxide-semiconductor (CMOS), junction field-effect transistor (JFET), or insulated-gate field-effect transistor (IGFET), all based on semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (Ga2O3), indium gallium arsenide (InGaAs) and / or any other suitable inorganic compound), an optoelectronic interface element, a light emitting diode, a photocoupler, a voltage converter (for example a DC / DC converter or an AC / DC converter), a cryptographic component, a transmitter and / or receiver, an electromechanical transducer, a sensor, an actuator, a microelectromechanical system (MEMS), a microprocessor, a capacitor, a resistor, an inductance, a battery, a switch, a camera, an antenna, a logic chip, and an energy harvesting unit. However, other components may be embedded in the component carrier. For example, a magnetic element can be used as a component. Such a magnetic element may be a permanent magnetic element (such as a ferromagnetic element, an antiferromagnetic element, a multiferroic element or a ferrimagnetic element, for instance a ferrite core) or may be a paramagnetic element. However, the component may also be a IC substrate, an interposer or a further component carrier, for example in a board-in-board configuration. The component may be surface mounted on the component carrier and / or may be embedded in an interior thereof. Moreover, also other components, in particular those which generate and emit electromagnetic radiation and / or are sensitive with regard to electromagnetic radiation propagating from an environment, may be used as component.

[0127] In an embodiment, the component carrier is a laminate-type component carrier. In such an embodiment, the component carrier is a compound of multiple layer structures which are stacked and connected together by applying a pressing force and / or heat. After processing interior layer structures of the component carrier, it is possible to cover (in particular by lamination) one or both opposing main surfaces of the processed layer structures symmetrically or asymmetrically with one or more further electrically insulating layer structures and / or electrically conductive layer structures. In other words, a build-up may be continued until a desired number of layers is obtained.

[0128] After having completed formation of a stack of electrically insulating layer structures and electrically conductive layer structures, it is possible to proceed with a surface treatment of the obtained layers structures or component carrier.

[0129] In particular, an electrically insulating solder resist may be applied to one or both opposing main surfaces of the layer stack or component carrier in terms of surface treatment. For instance, it is possible to form such a solder resist on an entire main surface and to subsequently pattern the layer of solder resist so as to expose one or more electrically conductive surface portions which shall be used for electrically coupling the component carrier to an electronic periphery. The surface portions of the component carrier remaining covered with solder resist may be efficiently protected against oxidation or corrosion, in particular surface portions containing copper.

[0130] It is also possible to apply a surface finish selectively to exposed electrically conductive surface portions of the component carrier in terms of surface treatment. Such a surface finish may be an electrically conductive cover material on exposed electrically conductive layer structures (such as pads, conductive tracks, etc., in particular comprising or consisting of copper) on a surface of a component carrier. If such exposed electrically conductive layer structures are left unprotected, then the exposed electrically conductive component carrier material (in particular copper) might oxidize, making the component carrier less reliable.

[0131] A surface finish may then be formed for instance as an interface between a surface mounted component and the component carrier. The surface finish has the function to protect the exposed electrically conductive layer structures (in particular copper circuitry) and enable a joining process with one or more components, for instance by soldering. Examples for appropriate materials for a surface finish are Organic Solderability Preservative (OSP), Electroless Nickel Immersion Gold (ENIG), Electroless Nickel Immersion Palladium Immersion Gold (ENIPIG), gold (in particular hard gold), chemical tin, nickel-gold, nickelpalladium, etc.

[0132] Further aspects of exemplary embodiments of the present disclosure are described in the following:

[0133] To meet advanced packaging interconnect scaling trends, glass core substrates may excel organic core substrates in finer pitch or features formation and has good material properties.

[0134] To achieve high density advanced packaging of multiple dies, embedding some dies into a glass core panel may be desired. As de-taping from a glass panel may be difficult, a blind hole-type cavity may be a good choice for a glass core.

[0135] Current glass cavity formation is done by etching after an ink printing process. However, this method may be insufficient to obtain an accurately designed cavity due to printing ink thickness and alignment and chemical isotropic etching challenges. Therefore, an improved method of glass cavity formation may be desired to solve current glass core fabrication issues.

[0136] According to an exemplary embodiment of the invention, a component carrier (for example a PCB or an IC substrate) may be provided with a stack of preferably laminated layers having one or more (preferably blind hole-type) cavities therein. Beneficially, a bottom wall and a sidewall of the cavity may be created with a value of the roughness Ra being different from the roughness of a main surface of said electrically insulating layer structure (for instance an inorganic carrier such as a glass carrier). This brings the advantage that the component carrier design may be adjusted in particular by an appropriate manufacturing method in combination with an appropriate material selection of the electrically insulating layer structure for setting the roughness Ra of a cavity delimiting surface differently from the roughness Ra of at least one of the main surfaces of the corresponding electrically insulating layer structure. By taking this measure, the cavity's roughness may be locally adjusted in accordance with a desired application. Just as an example, such an application may be component embedding in the cavity which may be promoted by a relatively rough cavity thanks to a resulting good adhesion of the component in the cavity. In another example, if the cavity forms part of a high-frequency member such as a waveguide for guiding high-frequency waves in an efficient way, a low roughness Ra of cavity walls may be desired. Advantageously, the cavity may be formed by laser processing for selectively weakening a defined portion of the electrically insulating layer structure material followed by an etching process for finally forming said cavity. By properly defining the parameters and characteristics of such a manufacturing method, roughness Ra of the cavity may be designed in a desired fashion.

[0137] According to an exemplary embodiment, a blind cavity formation method in an electrically insulating layer structure of a layer stack, in particular on a glass core panel, is provided. In particular, a bessel beam laser application may be provided to ensure to achieve an accurate depth of a glass property modification for precisely adjusting the cavity depth. Thus, it may be possible to embed components, preferably electronic components such as semiconductor dies, into an electrically insulating layer structure which may be embodied preferably as a glass core.

[0138] Exemplary applications of exemplary embodiments of the invention are a glass interposer or substrate, a high performance computing (HPC) device, and an elevated fan-out bridge (EFB) glass interposer product, etc.

[0139] In a preferred embodiment, the cavity with property definable roughness Ra in an electrically insulating layer structure of a component carrier may be formed by laser irradiation followed by wet etching. The laser type (in particular its wavelength, a pulse length, etc.) as well as the laser processing parameters may be used for fine-tuning the cavity surface properties, for instance may be used for large sized cavity creation.

[0140] According to an exemplary embodiment, a component carrier is provided which comprises a stack comprising at least one electrically conductive layer structure and at least one electrically insulating layer structure, wherein the at least one electrically insulating layer structure has a first main surface and an opposing second main surface, and at least one cavity (such as an opening or a recess) formed at the first main surface of the at least one electrically insulating layer structure and being delimited by a bottom wall and a sidewall, wherein the surface of said bottom wall and sidewall in the cavity has different roughness from said main surface of the at least one electrically insulating layer structure.

[0141] Advantageously, the roughness of said bottom wall and / or sidewall in the cavity is defined by peaks and valleys, the valleys being planarly linearly distributed along partially straight directions (in particular another part may be non-straight). In an embodiment, the thickness extension of (in particular at least a plurality of) the peaks follows a direction creating undercuts along the stack thickness direction. For instance, the thickness extension of the peaks on the bottom wall follows a different direction with respect to the thickness extension of the peaks on the sidewall. For example, undercuts are provided in the cavity along the stack thickness direction by the different extensions of the peaks. According to an embodiment, the overall planar linear distribution of a plurality of valleys follows the same planar directions (in particular more than 50% of the valleys planarly follow the same direction). For instance, said planar direction may be a diagonal direction. In an embodiment, the valley distribution divides the surface in adjacent islands, in particular each or the majority of said islands comprising at least one peak in particular a plurality of peaks. For example, the islands may each have a planar extension (along the xy-directions or in the xy-plane) from 0.2 pm to 15 pm. Advantageously, at least one valley may be configured as a corridor adjacent to a plurality of islands. For example, the bottom wall and the side wall are connected one to each other by a transitional wall, preferably a rounded wall (or having a different shape and / or inclination). In an embodiment, the thickness extension of the peaks on the transitional wall is different from the thickness direction of the peaks on the bottom wall and / or the lateral wall. For instance, the thickness extension of the peaks on the transitional wall is variable, in particular it is gradually variable from the thickness direction of the peaks on the bottom wall to the thickness direction of the peaks on the sidewall. With such kind of structure, in the entire bottom wall or side wall, the surface of glass may have a uniform or substantially uniform roughness. Such kind of texture of glass can improve the adhesion with the encapsulated material. In particular, the adhesion may be the same or may be similar in the entire area, thus there may be no void or delamination between the two layers. Additionally, the stress in the modified area may be also the same or similar, which may avoid cracking of the glass. The laser light to the glass surface may be also uniform. This compressive stress at the primary surface of the glass substrate may be balanced by a tensile stress (which may also be referred to as "central tension") within the interior of the glass substrate. Due to advantages provided by embodiments of the invention, the cavity can be formed with a substantially straight angle. For example, the sidewall of the cavity may be perpendicular with respect to the main surfaces of the stack, in particular within a deviation of ±10°. In an embodiment, said first and second main surfaces are planar. In particular, the surface of said bottom wall and said side wall in the cavity may have different roughness. For example, the roughness of said bottom wall is greater than the roughness of said sidewall. For instance, the roughness of the surface of said bottom wall and said sidewall provides an anchoring boundary region with said attaching film or an encapsulating material with the bottom and / or sidewalls of the cavity. In an embodiment, a plurality of cavities is provided, wherein at least two cavities may have different sizes. Advantageously, at least one component may be embedded in the cavity. For example, said component may comprise an attaching film. In an embodiment, the inorganic layer structure consists of glass.

[0142] Concerning a method of manufacturing a component carrier, a combination of laser processing and etching may be advantageous. Preferably, the cavity is formed by laser modifying the glass property and subsequently etching by a chemical. Concerning the type of laser source used, a laser source emitting green light may be preferred. According to an exemplary embodiment, a method of forming a blind cavity in an electrically insulating layer structure, preferably in a glass core, may be provided. A component, preferably an electronic component, for example an active and / or a passive semiconductor die, can be embedded in such a (preferably glass) cavity for forming a package-type component carrier. Advantageously, the cavity may be formed by greenlight laser processing followed by wet chemical etching. This may allow to manufacture a cavity with precisely definable roughness which can be different from, preferably larger than, a roughness of main surfaces of the electrically insulating layer structure (preferably a glass core) in which the cavity is formed.

[0143] Exemplary embodiments may allow to manufacture a highly accurate cavity in a glass panel. A spatial laser irradiation range or location may be precisely controlled by a laser machine. The depth of the cavity can also be accurately controlled by laser processing and / or by subsequent wet etching parameters. Descriptively speaking, a surface volume in the electrically insulating layer structure in which the cavity is later formed may be defined by correspondingly defined laser processing. This may include a definition of a surface area and a depth in which the cavity will be formed. Only this volume will be selectively modified (in particular mechanically and / or chemically weakened) by the laser processing. A subsequent etching process, preferably a wet etching process, may then selectively remove only the modified region of the electrically insulating layer structure for creating a precisely defined cavity. By adjusting the laser processing properties and / or wet etching properties, in particular the roughness Ra of at least a part of the walls delimiting the cavity may be precisely defined and may be defined in particular differently from (preferably larger than) a roughness Ra of the exterior main surfaces of the electrically insulating layer structure. This may allow to fine-tune the properties of the cavity for a desired application, in particular for embedding of a component with proper adhesion.

[0144] More specifically, greenlight laser processing may be followed by a wet chemical anisotropic etching process being selective with respect to laser- modified glass material of the electrically insulating layer structure to form one or more cavities in the electrically insulating layer structure. This may allow to define the positions and the dimensions of blind glass cavities to be accurately formed in a glass panel.

[0145] Brief Description of the Drawings

[0146] The aspects defined above and further aspects of the invention are apparent from the examples of embodiment to be described hereinafter and are explained with reference to these examples of embodiment.

[0147] Figures 1A to 1C illustrate a method of manufacturing a component carrier with a cavity, a component, and a first resin, according to an exemplary embodiment of the invention.

[0148] Figure 2A shows a side-view of a component carrier with two embedded components, Figure 2B shows a variant with a concave / convex external boundary surface, and Figure 2C shows a variant with a planarly tilted component, according to exemplary embodiments of the invention.

[0149] Figures 3A to 3C show a further method of manufacturing a component carrier with a cavity, a component, and a first resin, according to an exemplary embodiment of the invention.

[0150] Figures 4A and 4B show a first conventional approach to embed a component in a cavity.

[0151] Figures 5A to 5C show a second conventional approach to embed a component in a cavity.

[0152] Figure 6 and Figure 7 show cross-sectional views of structures obtained during carrying out a method of manufacturing a component carrier according to an exemplary embodiment of the invention.

[0153] Figure 8 illustrates a cross-sectional view of a component carrier according to an exemplary embodiment of the invention.

[0154] Figure 9 illustrates a three-dimensional image of a component carrier manufactured according to an exemplary embodiment of the invention.

[0155] Figure 10 illustrates different cross-sectional views of various portions of a component carrier manufactured according to an exemplary embodiment of the invention.

[0156] Figure 11 to Figure 14 show plan views of portions of a component carrier manufactured according to an exemplary embodiment of the invention with difference zooms.

[0157] Figure 15 is a microscopic image relating to Figure 10 bottom middle, according to an exemplary embodiment of the invention.

[0158] Detailed Description of the Drawings

[0159] Figures 1A to 1C illustrate a method of manufacturing a component carrier 100 with a cavity 116, a component 136, and a first resin 140, according to an exemplary embodiment of the invention.

[0160] Figure 1A: there is provided a component 136 comprising a first lower external main surface 137 and an opposed second upper external surface 138. Said component 136 is pressed partially onto a first resin 140, e.g. ABF material, so that (a part of) the first resin 140 sticks to the first external surface 137 of the component 136. The properties of the first resin during manufacture may controlled by varying the temperature / pressure. This process step may also be described as temperature-assisted pick-up.

[0161] Figure IB: the component 136 with the first resin 140 is placed into a cavity 116 of the stack 102. The cavity 116 can be formed in a core layer structure. This process step may also be described as temperature-assisted placement.

[0162] Figure 1C: a pressing device 180 (here a stamp) is used to press (along the vertical direction, downwards) the component 136 deeper into the first resin 140 within the cavity 116. It is schematically illustrated by arrows that the first resin 140 starts flowing, moves along the bottom of the cavity 116 and up in a gap between a lateral sidewall of the component 136 and the lateral sidewall of the cavity 116. Hereby, the first resin 140 is not pressed up to the top of the component (second main surface 138) but stops the flow at a vertical height next to the component 136 sidewall, thereby defining an external boundary surface / region 142. This process step may also be described as placement on specified height with defined pressure / temperature. Additionally the pressing device 180 may be configured to pick / suck the component 136 with attached first resin 140 and place it / them into the cavity 116. Spills of the first resin 140 can be found on top of the component 136 and / or the stack 102.

[0163] After this process, the second surface 138 of the component 136 is flush / on the same vertical level in regard to thickness direction as one (main) surface of the stack 102 / the electrically insulating layer structure 106. The first resin 140 is in contact with the electrically insulating layer structure 106 and the component 140. Additionally, the first resin 140 is in contact with the first surface of the component 137 and the sidewall of the component 136.

[0164] Figure 2A shows a side-view of a component carrier 100 with two components 136 embedded in a stack 102 with a plurality of electrically insulating layer structures 106 and electrically conductive layer structures 104, according to an exemplary embodiment of the invention. The components 136 have been embedded as described in Figures 1A to 1C or 3C. In comparison to Figure 1, a second resin (layer structure) 141 has been applied on top of the component 136, in particular the second surface of the component 138, the cavity 116, and the surface of the upper layer of the layer stack 102. Reference sign 106 may denote here a core layer structure, while the component 136 is located in a build-up layer structure / stack.

[0165] One side of the second resin 141 is in contact with the component 136, one of the layer structures 106 of the stack 102, and the first resin 140; thereby defining an internal boundary surface 143. It is indicated that the internal boundary surface 143 and the external boundary surface 142 define a respective contact region. This contact region is in particular formed due to the circumstance that the first resin 140 is cured before the second resin 141 is cured.

[0166] Then, the component 136 is in direct contact with the first resin 140 and the second resin 141, in particular the component 136 is fully embedded by the first resin 140 and the second resin 141. Optionally, the second resin 141 is in contact with the component 136, the electrically insulating layer structures 106, the electrically conductive layer structure 104 of the stack 102, and the first resin 140. The bottom portion of the cavity 116, facing the component 136, is fully filled with the first resin 140, the first resin 140 extends only (partly) around the component 136. The second external main surface 138 of the component 136, the upper surface of the layer structure 106, 104 of the stack 102, defining the edge of the cavity 116, is free of the first resin 140. The contact region, at different position relative to the component (e.g. left of the component and right of the component) may be at the same vertical level or at different vertical levels.

[0167] In this example, the external main surface 138 of the component 136 is misaligned with respect to an adjacent layer structure of the stack 102, in particular the one of the layer structures 106, in contact with the second resin 141, which defines the upper edge of the cavity 116.

[0168] Further, it can be seen in this example, that the second resin 141 covers both components 136 and both cavities 116. The components 136 are hereby flush with each other.

[0169] The two components 136 can have similar or different size / shape and / or functionality. The top surface of the component can have the same or a different vertical height as the stack 102. The amount / concentration of reinforcement material at the internal boundary surface 143 may be different, in particular lower, than the bottom region of the cavity. This may be due to flow mechanics of the liquefied polymer. In an example, the first resin (material) 140 may be similar, in particular the same, as the second resin (material) 141. Alternatively, the first resin (material) 140 may be different than the second resin (material) 141. In an example, the first resin (material) 140 and / or the second resin (material 141) may comprise epoxy resin and / or poly(meth)acrylate and / or polyamide and / or polyimide and / or polytetrafluoroethylene. Additionally the first resin (material) 140 and / or the second resin (material) 141 may comprise reinforcing material, for example glass spheres and / or ceramic spheres.

[0170] Figure 2B shows essentially the same embodiment as show in Figure 2A. Yet, the external boundary surface 142 is not planar in this embodiment but rounded. In case of the left embedded component 136, the external boundary surface 142 comprises a convex shape. In case of the right embedded component 136, the external boundary surface 142 comprises a concave shape. Further, in case of the left embedded component 136, a portion of the first resin 140 overlaps and is in contact with the second external main surface 138 of the component 116. In this embodiment, the stack 102 comprises a core layer structure and the components 136 and the at least one cavity 116 are arranged at least partially in said core layer structure.

[0171] Figure 2C shows a further embodiment, very similar to Figures 2A and 2B, yet one of the embedded components 136 is planarly tilted. Specifically, the external (upper) main surface 138 of the component 136 is planarly tilted with respect to an adjacent layer structure of the stack 102, here the one of the layer structures 106 in contact with the second resin 141, which defines the at least one cavity 116 and the upper edge of the cavity 116. It can be seen that the whole component 136 is tilted with respect to the horizontal plane. In the example shown, the bottom of the cavity 116 is also planarly tilted, so that the component 136, when placed into the cavity 116, takes this new available space and becomes tilted as well.

[0172] As a consequence, the external (upper) main surface 138 of the component 136 is partially below and misaligned to the adjacent layer structure of the stack 102, in particular the layer structure 106 in contact with the second resin 141 which defines the upper edge of the cavity 116.

[0173] Figures 3A to 3C show a further method of manufacturing a component carrier 100 with a cavity 116, a component 136, and a first resin 140, according to an exemplary embodiment of the invention.

[0174] Figure 3A: a stack 102 is provided that is covered at the upper main surface with a layer of first resin 140 (laminated core). The component 136 comprises at the second external main surface 138 a plurality of connecting portions 139 (e.g. copper pillars). In this example the plurality of connecting portions 139 are protruding out of the external main surface 138. Alternatively, the connecting portions 139 may be indented into the second external main surface 138. Said component 136 is now pressed (starting with the first external main surface 137) into the first resin 140 layer.

[0175] Figure 3B: the component 136 has been pressed into the first resin 140, so that the first resin 140 extends from a bottom of the cavity 116 (formed by the component 136 in the first resin 140) to at least part of the lateral side of the component 136, thereby defining the external boundary surface 142. Said external boundary surface 142 is vertically misaligned (not at the same height) with respect to the external main surface 138 of the component 136. Thus, an upper part of the component 136 and the connecting portions 139 on top of the second main surface 138 are exposed and free of the first resin 140. In other words, the component 136 is placed on the upper surface of the layer structure of the stack 102 and directly sticked on / in resin such as ABF.

[0176] Figure 3C: in a further step, the second resin 141 is formed on top of the first resin 140, the component 136, and the surface layer of the stack 102, e.g. by lamination. In this example, the second resin 141 is a resin layer formed of stack material (e.g. prepreg). It is indicated that the external boundary surface 142 of the first resin 140 and the internal boundary surface 143 of the second resin 141 form an interface region. The connecting portions 139 of the component 136 are encapsulated by the second resin material 141 and extend through the second resin 141. The electrical connection portion 139 protrudes from the surface of the component 116, in particular at least partially extends through the second resin 141.

[0177] A first resin 140 may be placed in the cavity 116. It may be possible that the lateral extension of the first resin 140 and the component 136 is different. Then, the component 136 is placed into the cavity 116 and the first resin (140) is squeezed out (compare Figure 1C).

[0178] Figure 6 and Figure 7 show cross-sectional views of structures obtained during carrying out a method of manufacturing a component carrier 100 according to an exemplary embodiment of the invention.

[0179] Referring to Figure 6, a stack 102 is shown which comprises an electrically insulating layer structure 106 and electrically conductive layer structures 104 therein. The electrically insulating layer structure 106 may be embodied as a glass plate or a glass core. The electrically conductive layer structures 104 are configured as copper filled laser vias extending vertically between a first main surface 108 and an opposing second main surface 110 of the electrically insulating layer structure 106. Thus, a plurality of oblong through holes may be formed in the electrically insulating layer structure 106. The through holes may then be filled with an electrically conductive material such as titanium and copper or copper, for instance by plating or sputtering (for example electroless plating followed by electroplating). In Figure 6, the copper filled laser vias have an hourglass shape (or alternatively a tapering shape or straight shape, depending on a used laser processing method). This means that the laser vias have been formed by laser drilling from one main surface 108, 110 followed by laser drilling from the opposing other main surface 110, 108. Each laser drilling process may create a blind hole in the electrically insulating layer structure 106, wherein both blind holes may connect to form together the hourglass shaped through hole.

[0180] Furthermore, blind hole-type cavities 116 are formed in the first main surface 108 of the glass material of the electrically insulating layer structure 106. As shown in Figure 2, each cavity 116 is delimited by a bottom wall 112 and a sidewall 114.

[0181] Each cavity 116 is formed by a two-stage process which will be described in the following. A first process will be described referring to Figure 6, and a subsequent second process will be described referring to Figure 7.

[0182] In said first process shown in Figure 6, a laser source 150 may be scanned over a pre-defined surface area of the electrically insulating layer structure 106. Consequently, a surface portion of the electrically insulating layer structure 106 adjacent to the first main surface 108 may be subjected to a laser impact. Thus, the boundaries of each cavity 116 may be defined by a laser treatment. Advantageously, the laser source 150 may be configured for emitting a green laser beam, especially a Bessel beam, for said laser treatment, for instance having a wavelength of 550 nm. The laser source 150 may be a pulsed laser, preferably a picosecond-pulsed laser, for said laser treatment. For said laser treatment, the laser beam of the laser source 150 may be scanned over surface regions of the first main surface 108 of the electrically insulating layer structure 106 in which the cavities 116 are to be formed. This defines the lateral boundaries and therefore the position of the sidewalls 114 of the cavities 116 to be formed. Advantageously, the laser light emitted by the laser source 150 can be focused during said laser treatment to an intended depth L of the respective cavity 116 in an interior of the electrically insulating layer structure 106. For example, said depth L of a respective cavity 116 may be in a range from 30 pm to 100 pm, for instance 60 pm.

[0183] By this processing, the laser light of green color emitted by the laser source 150 may impact the entire volume of the electrically insulating layer structure 106 in which volume the respective cavity 116 shall be formed. More precisely, the laser light impacting said glass volume of the electrically insulating layer structure 106 may locally modify glass properties of the electrically insulating layer structure 106 in which the at least one cavity 116 is to be formed. This modification may be a selective weakening of the glass material by the laser light which may render the laser irradiated glass volume of the electrically insulating layer structure 106 prone to subsequent removal in the below described second processing stage. Surprisingly, focusing the laser light to the intended depth L of the cavity 116 to be formed may reliably and precisely limit the vertical region of the electrically insulating layer structure 106 which is to be removed subsequently by etching. Summarizing, a focussed picosecond pulsed laser scans over the intended cavity region with adjusted laser beam size. The laser light is focused vertically up to an intended depth L of the cavity 116 to be created, wherein a corresponding vertical working distance of the laser beam can be adjusted by one or more lenses. Thus, a fast laser trepanning on the cavity area in focused depth treatment may be executed to modify chemical and physical properties of a defined glass volume of the electrically insulating layer structure 106. In particular, the described process is highly suitable for glass since it is capable to selectively attack silicon-oxide-bonds thereof. In particular, the power, the wavelength, the irradiation time, the scanning speed and / or the pulse parameters of the laser may be adjusted to selectively change properties of the irradiated portion of the electrically insulating layer structure 106 in accordance with its material attributes (for instance glass, ceramic or semiconductor).

[0184] Now referring to Figure 7, the second processing stage for forming the cavities 116 will be explained. After having selectively exposed the intended cavity volume to laser irradiation according to Figure 6, the modified or weakened cavity volume material of the laser irradiated glass volume of the electrically insulating layer structure 106 is removed. This may be accomplished by chemical wet etching the electrically insulating layer structure 106 after said laser treatment. Such chemical wet etching may involve subjecting the first main surface 108 of the electrically insulating layer structure 106 to hydrofluoric acid (HF) based etchant. This chemical wet etching process allows to selectively remove the modified glass material which has been subjected to laser processing according to Figure 6. More specifically, a wet chemical solution (comprising HF) may be used for etching modified glass with high etching rate compared to pristine glass. This etching may lead to a slanted sidewall with a very high slanting angle close to a vertical direction. Thus, cavities 116 with substantially rectangular cross-section may be created.

[0185] Highly advantageously, the described manufacturing method allows to form the cavities 116 so that a surface of said bottom wall 112 and a surface of said sidewall 114 of each respective cavity 116 have a different roughness Ra than said first main surface 108 and than said second main surface 110 of the electrically insulating layer structure 106. As shown in a detail 152 of Figure 7, the roughness Ra may be significantly larger at the bottom wall 112 and the sidewall 114 of the cavity 116 as compared with the first main surface 108 and the second main surface 110. Beneficially, the increased roughness Ra-surfaces delimiting the cavities 116 may promote adhesion between the electrically insulating layer structure 106 and an electronic component (such as a semiconductor chip) when the latter is embedded in the cavity 116 (compare reference sign 136 in Figure 8). Further advantageously and still referring to the detail 152 of Figure 7, a minimum horizontal distance d between the first main surface 108 and the bottom wall 112 may be not more than 15 pm, for instance 10 pm. Preferably, the minimum horizontal distance d between the first main surface 108 and the bottom wall 112 may be in the range from 1 pm to 10 pm. Thus, almost vertical sidewalls 114 may be obtained since the slanting angles of the sidewalls 114 may be much steeper than in conventional approaches of forming cavities in electrically insulating layer structures. Such almost vertical sidewalls 114 may be advantageous in terms of the compactness of the component carrier 100 and the controlled insertion of an electronic component in such a cavity 116.

[0186] Figure 8 illustrates a cross-sectional view of a component carrier 100 according to an exemplary embodiment of the invention. For instance, the component carrier 100 according to Figure 8 may be embodied as an integrated circuit (IC) substrate or as a printed circuit board (PCB).

[0187] The illustrated component carrier 100 comprises a stack 102 having a plurality of electrically insulating layer structures 106 and a plurality of electrically conductive layer structures 104. For example, stack 102 may be a laminated layer stack composed of a lower sub-stack in form of a lower multilayer build-up 154 and of an upper sub-stack in form of an upper multilayer build-up 156, wherein the build-up layers may comprise a dielectric material such as resin, glass fiber or glass filler. A glass core 158 or glass plate forming a central electrically insulating layer structure 106 may be arranged between the lower multilayer build-up 154 and the upper multilayer build-up 156. Thus, said stack 102 comprises a central inorganic layer structure which is here embodied as glass core 158, but which may also be another inorganic layer structure (such as a ceramic or a semiconductor such as silicon). The lower multilayer build-up 154 is formed below the inorganic layer structure and the upper multilayer buildup 156 is formed above the inorganic layer structure. The electrically conductive layer structures 104 may comprise patterned copper layers which may form horizontal pads and / or a horizontal wiring structure. Additionally or alternatively, the electrically conductive layer structures 104 may comprise vertical through connections such as copper pillars and / or copper filled laser vias. Such vertical through connections are shown also in the glass core 158, wherein the density for the through connection may be different on the build-up layers of the two sides of the glass core. Moreover, the electrically insulating layer structures 106 above and beneath the glass core 158 may be for example prepreg or resin sheets. More generally, they may comprise resin, such as epoxy resin, and optionally reinforcing particles such as glass fibers or glass spheres. A lowermost electrically insulating layer structure 106 may be embodied as a patterned solder resist 160. Also an uppermost electrically insulating layer structure 106 may be embodied as a patterned solder resist 162.

[0188] On a bottom main surface of the component carrier 100, a plurality of electrically conductive connection elements 164, such as solder bumps, may be exposed with respect to the patterned solder resist 160. Said bottom-sided electrically conductive connection elements 164 may be configured for mounting the illustrated (for example integrated circuit (IC) substrate-type) component carrier 100 on a mounting base, such as a printed circuit board (PCB, not shown). On a top main surface of the component carrier 100, a plurality of electrically conductive connection elements 166, such as solder bumps, may be exposed with respect to the patterned solder resist 162. Said top-sided electrically conductive connection elements 166 may be configured for mounting one or more electronic components 168 on the top side of the component carrier 100. For instance, the surface-mounted electronic components 168 may be semiconductor chips.

[0189] As shown as well in Figure 8, electronic components 136 may be embedded in the stack 102. More precisely, each of said electronic components 136 may be inserted in an assigned one of the cavities 116 formed as described above referring to Figure 6 and Figure 7. Thanks to the intentionally high and locally increased (in particular higher than at the main surfaces 108, 110) roughness Ra of the sidewalls 114 and the bottom wall 112 of the respective cavity 116, an attaching film 132 at a bottom side of the respective electronic component 136 may adhere properly to the bottom wall 112 of the cavity 116.

[0190] Preferably, the attaching film 132 may comprise or consist of the first resin 140, which is extending from the bottom of the cavity 116 to at least part of the lateral side of the component 136, defining an external boundary surface 142. The component 136 comprises an external main surface 138 opposite to the bottom of the cavity 116, and the external boundary surface 142 is vertically misaligned with respect to the external main surface 138 of the component 116.

[0191] Further preferably, the electrically insulating layer structure 106 of the upper multilayer build-up 156 may comprise or consist of the second resin 141 (a resin layer structure). Hereby, one side of the second resin 141 is in contact with the component 136, one of the layer structures (here electrically insulating layer structure 106 of the glass core 158) of the stack 102, and the first resin 140, thereby defining an internal boundary surface 143. The internal boundary surface 143 and the external boundary surface 142 define a respective contact region.

[0192] Descriptively speaking, the increased roughness Ra walls delimiting the respective cavity 116 may function as an adhesion promoter for the embedded electronic components 136 being embedded in the cavities 116. Remaining gaps in the cavity 116, i.e. gaps between the glass core 158 and the respective electronic component 136, may be filled with encapsulating material 134. Said encapsulating material 134 may originate from an electrically insulating layer structure 106 (for instance a sheet of prepreg, resin, photoimageable dielectric, a solder resist or glue) which may be attached directly to the upper main surface 108 of the inorganic electrically insulating layer structure 106 which is here embodied as glass core. Additionally or alternatively, it may be attached to the electronic component 136 as shown in Figure IB.

[0193] Thereafter, a lamination process may be executed by elevating temperature and / or applying mechanical pressure. Consequently, still uncured resin of the electrically insulating layer structure 106 directly above the glass core may become flowable and may flow into void or hollow regions between the glass core 158 and the electronic components 136 in the cavities 116.

[0194] Additionally or alternatively (see Figure 1C), during a curing process, the resin may polymerize and / or cross-link and may resolidify permanently to thereby form a solid encapsulating material 134 in direct physical contact with the glass core 158 and the embedded electronic components 136. Thus, the encapsulating material 134 is brought in direct physical contact with the sidewalls 114 and optionally the bottom wall 112 of the cavity 116 and with a surface of the electronic components 136, in particular the first surface 137 of the component and / or the sidewall of the component 136.

[0195] Also during formation of the encapsulating material 134, the locally increased roughness Ra may have a positive impact. As an alternative to the described lamination process, the encapsulating material 134 may also be inserted into the gaps between glass core 158 and electronic components 136, for instance as glue.

[0196] In an embodiment, electronic component 136 can be a bridge for components being surface mounted on the component carrier. Thus, it may be possible to shorten the electrical path among the component carrier, the bridge and the components mounted on the surface of the component carrier.

[0197] Figure 9 illustrates a three-dimensional image of a component carrier 100 manufactured according to an exemplary embodiment of the invention. Figure 10 illustrates different cross-sectional views of various portions of the component carrier 100 manufactured according to an exemplary embodiment of the invention. In particular, an overview of the region of the electrically insulating layer structure 106 around the cavity 116 shown on the top side of Figure 10. On the bottom side of Figure 10, different zoomed portions of and around the cavity 116 are shown, i.e. an interface between a left sidewall 114 and the first main surface 108 on the left-hand side, an interface between a right sidewall 114 and the first main surface 108 on the right-hand side, and a detailed view of the bottom wall 112 in the middle. Figure 11 to Figure 14 show plan views of portions of a component carrier 100 manufactured according to an exemplary embodiment of the invention with difference zooms. Figure 11 to Figure 14 show enlarged illustrations of bottom wall 112 of the cavity 116. More specifically, Figure 12 shows a magnification over Figure 11, Figure 13 shows a magnification over Figure 12, and Figure 14 shows a magnification over Figure 13.

[0198] As shown, the component carrier 100 comprises a stack 102 which may comprise one or more electrically insulating layer structures 106. The focus of Figure 9 and Figure 10 is an electrically insulating layer structure 106 made of glass and forming a core of the stack 102. In addition, one or more electrically conductive layer structures 104, for instance horizontal and / or vertically copper structure, may be present, which are however not visible in Figure 9 to Figure 14. The glass core-type electrically insulating layer structure 106 shown in Figure 6 and Figure 10 has a first main surface 108 and an opposing second main surface 110. Mostly, Figure 11 to Figure 14 show the first main surface 108 and features of a cavity 116 formed in said first main surface 108.

[0199] This cavity 116 being formed in the first main surface 108 is made of glass and is delimited by a bottom wall 112 and a sidewall 114. Advantageously, a surface of said bottom wall 112 and a surface of said sidewall 114 of the cavity 116 have a higher roughness Ra than a surrounding portion of said first main surface 108 of the electrically insulating layer structure 106, as best seen in the images on the left-hand side and on the right-hand side of Figure 10. This is due to the cavity manufacturing process which can be executed as described above referring to Figure 6 and Figure 7. Said bottom wall 112 may have another roughness Ra than or the same roughness Ra as said sidewall 114. In particular, said surface of said bottom wall 112 may have a higher roughness Ra than said surface of said sidewall 114.

[0200] The roughness Ra of said surface of said bottom wall 112 and / or of said surface of said sidewall 114 may provide an anchoring boundary region for anchoring the first resin and / or the second resin at said bottom wall 112 and / or said sidewall 114 of the at least one cavity 116.

[0201] During a process of embedding an electronic component 136 in the cavity 116 (compare reference sign 136 in Figure 8), said roughness Ra of said surface of said bottom wall 112 and said surface of said sidewall 114 may provide an anchoring boundary region for anchoring an attaching film 132 and / or an encapsulating material 134 at said bottom wall 112 and said sidewall 114 of the cavity 116. Thus, the locally increased roughness Ra of the surface delimiting the cavity 116 may be of utmost advantage for improving integrity of a component carrier 100 with embedded electronic component 136 and avoid cracking of the glass core.

[0202] As best seen in the central detailed view of Figure 10 as well as in Figure 13 and Figure 14, the roughness Ra of said bottom wall 112 in the cavity 116 is defined by peaks 118 and valleys 120. Corresponding peaks 118 and valleys 120 may also be present at sidewall 114, see Figure 10 and Figure 13. Valleys 120 may be arranged along straight valley sections 122 in a plan view on the cavity 116, see Figure 13 and Figure 14. A majority of the valleys 120 (for instance more than 50% of the number of valleys 120) may be arranged along straight valley sections 122 extending substantially parallel to each other in a plan view on the cavity 116, see Figure 14 as well. Moreover, the majority of the valleys 120 may extend along an inclined direction 124 which may be a diagonal direction with respect to said sidewalls 114. This can be taken from Figure 13. Furthermore, said peaks 118 and valleys 120 may, in a thickness extension of the peaks 118, create undercuts along a thickness direction 126 of the stack 102. This can be seen in the lowermost central image of Figure 10. A thickness extension of peaks 118 on the bottom wall 112 may follow a different direction with respect to a thickness extension of peaks 118 on the sidewall 114, compare again Figure 10. The roughness Ra of said bottom wall 112 and of said sidewall 114 in the cavity 116 may be defined by the peaks 118 and the valleys 120 with their undercuts in the cavity 116 along the thickness direction 126 of the stack 102 by different extensions of the peaks 118.

[0203] Referring to Figure 14, said valleys 120 may divide said peaks 118 into islands 128 each comprising one or more of said peaks 118. A respective island 128 may be delimited by a groove around it, said groove being defined by one or more of said valleys 120. Some of said islands 128 may have, in a plan view of the at least one cavity 116, a length B in a range from 0.2 pm to 15 pm in a horizontal direction, compare Figure 14. Valleys 120 may be configured as a corridor adjacent to said islands 128.

[0204] Now referring to the bottom-sided images on the left-hand side and the right-hand side of Figure 10, said bottom wall 112 and said sidewall 114 may be connected to each other by a transitional wall 130 which may be a rounded wall.

[0205] The roughness Ra of said sidewall 114 and / or transitional wall 130 in the cavity 116 is defined by peaks 118 and valleys 120, see Figure 10 and Figure 13. The thickness extension of the peaks 118 on the transitional wall 130 is different from a thickness extension of the peaks 118 on the bottom wall 112 and / or the sidewall 114. The thickness extension of the peaks 118 on the transitional wall 130 varies, from the thickness extension of the peaks 118 on the bottom wall 112 to the thickness extension of the peaks 118 on the sidewall 114, see Figure 10 and Figure 13.

[0206] The sidewalls 114 of the cavity 116 may be substantially perpendicular to said first main surface 108 and said second main surface 110, for example within a deviation of ±10°. This deviation is much smaller than with conventionally manufactured cavities thanks to the manufacturing process described referring to Figure 6 and Figure 7. A thickness extension of the peaks 118 on the transitional wall 130 may be different from a thickness extension of the peaks 118 on the bottom wall 112 and the sidewall 114. In particular, the thickness extension of the peaks 118 on the transitional wall 130 may vary gradually from the thickness extension of the peaks 118 on the bottom wall 112 to the thickness extension of the peaks 118 on the sidewall 114.

[0207] Figure 15 is a microscopic image relating to Figure 10 bottom middle. The bottom layer comprises the bottom wall 112 of the cavity 116 with peaks 118 and valleys 120 composing the roughness bottom wall. The top layer comprises resin, in particular the first resin 140, wherein the first resin 140 comprises reinforcement particles. The first resin 141 at least partially fills the valleys 120. Additionally or alternatively, the reinforcement particles at least partially fill the valleys 120.

[0208] It should be noted that the term "comprising" does not exclude other elements or steps and the "a" or "an" does not exclude a plurality. Also, elements described in association with different embodiments may be combined.

[0209] It should also be noted that reference signs in the claims shall not be construed as limiting the scope of the claims.

[0210] Implementation of the invention is not limited to the preferred embodiments shown in the figures and described above. Instead, a multiplicity of variants is possible which use the solutions shown and the principle according to the invention even in the case of fundamentally different embodiments. Reference signs

[0211] Component carrier

[0212] Stack

[0213] Electrically conductive layer structure

[0214] Electrically insulating layer structure

[0215] First main surface of electrically insulating layer structure

[0216] Second main surface of electrically insulating layer structure

[0217] Bottom wall of cavity

[0218] Side wall of cavity

[0219] Cavity

[0220] Peaks

[0221] Valleys

[0222] Straight valley section

[0223] Thickness direction

[0224] Island

[0225] Transitional wall

[0226] Attaching film

[0227] Encapsulating material

[0228] Component

[0229] First surface of component

[0230] Second surface of component

[0231] Electrically conductive connection portion

[0232] First resin, e.g. ABF

[0233] Second resin, e.g. stack material

[0234] External boundary surface / reg ion

[0235] Internal boundary surface / reg ion

[0236] Laser source

[0237] Lower multilayer build-up

[0238] Upper multilayer build-up

[0239] Glass core

[0240] Patterned solder resist

[0241] Further patterned solder resist

[0242] Electrically conductive connection elements

[0243] Further electrically conductive connection elements 168 Electronic components

[0244] 180 Pressing device

Claims

Claims1. A component carrier (100) comprising: a stack (102) having at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106); at least one cavity (116) in the stack (102); a component (136) embedded in the at least one cavity (116); and a first resin (140) extending from a bottom of the cavity (116) to at least part of the lateral side of the component (136) defining an external boundary surface (142); wherein the component (136) comprises an external main surface (138) opposite to the bottom of the cavity (116), and wherein the external boundary surface (142) is vertically misaligned with respect to the external main surface (138) of the component (116).

2. The component carrier (100) according to claim 1, wherein the at least one electrically insulating layer structure (106) has a first main surface (108) and an opposing second main surface (110); wherein the at least one cavity (116) is formed in the first main surface (108) of the at least one electrically insulating layer structure (106) and being delimited by a bottom wall (112) and a sidewall (114); wherein a surface of said bottom wall (112) and a surface of said sidewall (114) of the at least one cavity (116) have a different roughness Ra than said first main surface (108) and / or than said second main surface (110) of the at least one electrically insulating layer structure (106).

3. The component carrier (100) according to any of claims 1 to 2, wherein the surface of said bottom wall (112) and the surface of said sidewall (114) have a higher roughness Ra than said first main surface (108) and / or than said second main surface (110).

4. The component carrier according to any of claims 1 to 3, wherein the at least one electrically insulating layer structure (106) comprises an inorganic layer structure and / or comprises or consists of glass.

5. The component carrier (100) according to any of claims 2 to 4, wherein the roughness Ra of said bottom wall (112) and / or said sidewall(114) in the at least one cavity (116) is defined by peaks (118) and valleys (120); in particular further comprising at least one of the following features: wherein at least part of the valleys (120) are arranged along straight valley sections (122) in a plan view on the at least one cavity (116); wherein a majority of the valleys (120) are arranged along straight valley sections (122) extending substantially parallel to each other in a plan view on the at least one cavity (116); wherein said valleys (120) divide said peaks (118) into islands (128) each comprising at least one of said peaks (118), for example a plurality of said peaks (118).

6. The component carrier (100) according to any of claims 2 to 5, wherein said bottom wall (112) and said sidewall (114) are connected to each other by a transitional wall (130), for example a rounded wall.

7. The component carrier (100) according to claim 6, wherein the roughness Ra of said bottom wall (112) and / or said sidewall (114) and / or said transitional wall (130) in the at least one cavity (116) is defined by peaks (118) and valleys (120), and wherein a thickness extension of the peaks (118) on the transitional wall (130) is different from a thickness extension of the peaks (118) on the bottom wall (112) and / or the sidewall (114), in particular wherein the thickness extension of the peaks (118) on the transitional wall (130) varies, for example gradually varies, from the thickness extension of the peaks (118) on the bottom wall (112) to the thickness extension of the peaks (118) on the sidewall (114).

8. The component carrier (100) according to any of claims 2 to 7, wherein said surface of said bottom wall (112) has a higher roughness Ra than said surface of said sidewall (114).

9. The component carrier (100) according to any of claims 2 to 8,wherein the sidewall (114) of the at least one cavity (116) is substantially perpendicular to said first main surface (108) and / or said second main surface (110), for example within a deviation of ±10°.

10. The component carrier (100) according to any of claims 1 to 9, further comprising: a second resin (141), in particular a resin layer structure, wherein one side of the second resin (141) is in contact with the component (136), one of the layer structures (104, 106) of the stack (102), and the first resin (140), thereby defining an internal boundary surface (143), wherein the internal boundary surface (143) and the external boundary surface (142) defining a respective contact region.

11. The component carrier (100) according to any of claims 2 to 10, wherein said roughness Ra of said surface of said bottom wall (112) and / or of said surface of said sidewall (114) provide an anchoring boundary region for anchoring the first resin (140) and / or the second resin (141) at said bottom wall (112) and / or said sidewall (114) of the at least one cavity (116).

12. The component carrier (100) according to any of claims 5 to 11, wherein the valleys (120) are at least partially filled with the first resin(140) and / or the second resin (141).

13. The component carrier (100) according to any of claims 5 to 12, wherein a plurality of cavities (116) are formed in the first main surface(108) of the at least one electrically insulating layer structure (106), each of said cavities (116) being delimited by a respective bottom wall (112) and a respective sidewall (114), in particular wherein different ones of said cavities (116) have different sizes, in particular in a horizontal plane and / or in a vertical direction.

14. The component carrier (100) according to any of claims 1 to 13, wherein the internal boundary surface (143) and the external boundary surface (142) are defined by the first resin (140) and the second resin (141) cured one before the other.

15. The component carrier (100) according to any of claims 1 to 14, wherein the component carrier (100) further comprises: a core layer structure in the stack (102), wherein the component (136) and the at least one cavity (116) are arranged at least partially in said core layer structure.

16. The component carrier (100) according to any of claims 1 to 15, further comprising: residues of the first resin (140) are provided at the external main surface (137, 138) of the component (136) and / or at one side of the one of the layer structures (104, 106) being in contact with the second resin (141).

17. The component carrier (100) according to any of claims 1 to 16, wherein the external main surface (138) of the component (136) is misaligned with respect to an adjacent layer structure of the stack (102), in particular the one of the layer structures (106) in contact with the second resin (141), which defines the at least one cavity (116), in particular the upper edge of the cavity (116); and / or wherein the external main surface (138) of the component (116) is below the adjacent layer structure of the stack (102), in particular the layer structure (106) in contact with the second resin (141), which defines the cavity (116), in particular the upper edge of the cavity (116); and / or wherein the external main surface (138) of the component (116) is planarly tilted with respect to an adjacent layer structure of the stack (102), in particular the one of the layer structures (106) in contact with the second resin (141), which defines the at least one cavity (116), in particular the upper edge of the cavity (116).

18. The component carrier (100) according to any of claims 1 to 17, wherein a portion of the first resin (140) overlaps and is in contact withthe second external main surface (138) of the component (116).

19. The component carrier (100) according to any of claims 1 to 18, wherein the component (116) comprises a surface with an electrically connecting portion (139), in particular a pad, at the second external main surface (138) of the component (116), in particular wherein the electrically connecting portion (139) is flush with the surface of the component (116); or wherein the electrical connecting portion (139), in particular a pillar, protrudes from the surface of the component (116), in particular at least partially extending through the second resin (141).

20. The component carrier (100) according to any of claims 1 to 19, wherein the external boundary surface (142) extends along the direction between the component (136) and the cavity profile (136) defining a rounded shape, in particular a convex shape or a concave shape.

21. A method of manufacturing a component carrier (100), wherein the method comprises: providing a stack (102) having at least one electrically conductive layer structure (104) and at least one electrically insulating layer structure (106) and at least one cavity (116); embedding a component (136) in the at least one cavity (120); and providing a first resin (130) to the component (136) and / or a bottom of the cavity (116), so that a first resin (140) extends from the bottom of the at least one cavity (116) to at least part of the lateral side of the component (136), thereby defining an external boundary surface (142), the component (136) comprises an external main surface (138) opposite to the bottom of the cavity (116), and the external boundary surface (142) is vertically misaligned with respect to the external main surface (138) of the component (136).

22. The method according to claim 21, wherein the at least one electrically insulating layer structure (106) has a first main surface (108) and an opposing second main surface (110), and wherein the method further comprises: forming at least one cavity (116) in the first main surface (108) of the at least one electrically insulating layer structure (106) and being delimited by a bottom wall (112) and a sidewall (114); and forming the at least one cavity (116) so that a surface of said bottom wall (112) and a surface of said sidewall (114) of the at least one cavity (116) have a different roughness Ra than said first main surface (108) and / or than said second main surface (110) of the at least one electrically insulating layer structure (106).

23. The method according to claim 21 or 22, wherein the method comprises forming the at least one cavity (116) using a laser treatment.

24. The method according to any of claims 21 to 23, wherein the method comprises forming the at least one cavity (116) using etching, for example wet etching, after said laser treatment.

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