Systems and methods for back contacted photovoltaic cells

Abstract

Systems, articles, and methods for back contacted photovoltaic cells for applications such as thermophotovoltaic power generation, or other photovoltaic power generation, are described. Some aspects are generally related to articles, for example, for use in thermophotovoltaic power generation. The articles include a device layer having a first and second surfaces, with a first electrically conductive layer positioned adjacent to the first surface and a second electrically conductive layer positioned adjacent to the second surface. The second electrically conductive layer may include an elongated portion extending into and / or through a through hole passing through the device layer from the first surface to the second surface. An insulating layer may be positioned between the first and second electrically conductive layers. The device layer may be flexible and / or a substrate layer on which the device layer was grown is absent from the article.

Description

[0001] SYSTEMS AND METHODS FOR BACK CONTACTED PHOTOVOLTAIC CELLS

[0002] RELATED APPLICATIONS

[0003] This application claims the benefit of U.S. Provisional Patent Application Serial No. 63 / 561,581, filed March 5, 2024, entitled “Systems and Methods for Back Contacted Photovoltaic Cells,” by Chan, et al., which is incorporated herein by reference in its entirety for all purposes.

[0004] TECHNICAL FIELD

[0005] Systems, articles, and related methods for back contacted photovoltaic cells for applications such as thermophotovoltaic power generation, or other photovoltaic power generation, are generally described.

[0006] BACKGROUND

[0007] Conventional photovoltaic cells harvest energy from sunlight, an essentially free and limitless energy source. In these conventional cells, a first electrode may be present below the device layer of the photovoltaic cell and a second electrode may be present on a portion of a top surface of the device layer to apply an electric field across the device layer and to collect charge produced from the cell during photon conversion. The first and second electrodes are typically connected in electrical communication using a busbar. Busbars in conventional cells may be arranged over a portion of the top surface of the active surface and / or along an edge of the active surface to electrically connect to the second electrode present on the top surface of the device layer to the first electrode below the device layer. Accordingly, busbars may shade a portion of the top surface of the device layer, and thus lessen the amount of the device layer exposed to sunlight for power generation. This problem may be alleviated in conventional photovoltaic cells by using a larger surface area device layer to harvest more energy from sunlight.

[0008] In contrast, thermophotovoltaic power generation involves burning fuel to produce radiation, which is then converted into power using a thermophotovoltaic cell. The operation principles of thermophotovoltaic cells are similar to conventional photovoltaic cells, but the energy from fuel sources in thermophotovoltaic power generation is limited when compared to sunlight as an energy source in conventional photovoltaic s. Thus, conventional solutions utilizing busbars that shade a portion of the device layer while providing larger photovoltaic cells to increase the available surface area of the device layer are not suitable because the energy source is limited. Accordingly, improved systems, articles, and related methods are needed for thermophotovoltaic power generation.

[0009] SUMMARY

[0010] Systems, articles, and related methods for back contacted photovoltaic cells for applications such as thermophotovoltaic power generation, or other photovoltaic power generation, are generally described. The subject matter of the present disclosure involves, in some cases, interrelated products, alternative solutions to a particular problem, and / or a plurality of different uses of one or more systems and / or articles.

[0011] One aspect is generally drawn to an article. In one set of embodiments, the article comprises one or more device layers having a first surface and a second surface opposite the first surface, the one or more device layers each defining a through hole extending from the first surface to the second surface; a first electrically conductive layer positioned adjacent to a portion of the first surface; a second electrically conductive layer positioned adjacent to a portion of the second surface and comprising an elongated portion that extends into the through hole; and an insulating layer positioned between the first electrically conductive layer and the elongated portion. In some cases, the insulating layer surrounds an end portion of the elongated portion. In certain embodiments, the one or more device layers is flexible.

[0012] In another set of embodiments, the article comprises one or more device layers grown on a substrate layer, the one or more device layers having a first surface and a second surface opposite the first surface, the one or more device layers each defining a through hole extending from the first surface to the second surface; a first electrically conductive layer positioned adjacent to a portion of the first surface; a second electrically conductive layer positioned adjacent to a portion of the second surface and comprising an elongated portion that extends into the through hole; and an insulating layer formed between the first electrically conductive layer and the elongated portion. In some cases, the insulating layer surrounds an end portion of the elongated portion. In some embodiments, the substrate layer is absent.

[0013] In yet another set of embodiments, the article comprises one or more device layers having a first surface and a second surface opposite the first surface, the one or more device layers each defining a through hole extending from the first surface to the second surface; a first electrically conductive layer positioned adjacent to a portion of the first surface; a second electrically conductive layer positioned adjacent to a portion of the second surface and comprising an elongated portion that extends into the through hole; and an insulating layer formed between the first electrically conductive layer and the elongated portion. In some cases, the insulating layer surrounds an end portion of the elongated portion.

[0014] Another aspect is generally drawn to a method, e.g., a method of forming an article. In one set of embodiments, the method comprises forming a through hole through a device layer to expose a portion of a substrate layer adjacent the device layer; forming an insulating layer over a surface of the device layer; forming a mold over a portion of the insulating layer, the mold positioned around an opening through hole; forming a first electrically conductive portion over the device layer outside the mold and a second electrically conductive portion inside the mold and partially within the through hole; removing the mold to produce a cavity; and filling the cavity with an insulating material.

[0015] In another set of embodiments, the method comprises forming a through hole through a device layer to expose a portion of a substrate layer adjacent the device layer; forming an insulating layer over a surface defining the through hole and a first portion of the device layer positioned around the through hole; forming a seed layer over a second portion of the device layer, the insulating layer, and the exposed portion of the substrate layer; forming a mold over a portion of the insulating layer, the mold surrounding the through hole; forming a first electrically conductive portion over the seed layer outside the mold and a second electrically conductive portion over the seed layer inside the mold; removing the mold to produce a cavity; removing the seed layer from surfaces defining the cavity; and filling the cavity with an insulating material.

[0016] Other advantages and novel features of the present disclosure will become apparent from the following detailed description of various non-limiting embodiments of the disclosure when considered in conjunction with the accompanying figures. In cases where the present specification and a document incorporated by reference include conflicting and / or inconsistent disclosure, the present specification shall control.

[0017] BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Non-limiting embodiments of the present disclosure will be described by way of example with reference to the accompanying figures, which are schematic and are not intended to be drawn to scale unless otherwise indicated. In the figures, each identical or nearly identical component illustrated is typically represented by a single numeral. For purposes of clarity, not every component is labeled in every figure, nor is every component of each embodiment of the disclosure shown where illustration is not necessary to allow those of ordinary skill in the art to understand the disclosure. In the figures:

[0019] FIGS. 1A-1E are various views of embodiments of articles and systems, according to some embodiments; and

[0020] FIGS. 2A-2I are schematic diagrams illustrating a method of forming an article, according to some embodiments.

[0021] DETAILED DESCRIPTION

[0022] Systems, articles, and related methods for back contacted photovoltaic cells for applications such as thermophotovoltaic power generation, or other photovoltaic power generation, are generally described. Some aspects are generally related to articles, for example, for use in thermophotovoltaic power generation or other applications. The articles, in some embodiments, include a device layer having first and second surfaces, with a first electrically conductive layer positioned adjacent to the first surface and a second electrically conductive layer positioned adjacent to the second surface. In some cases, the second electrically conductive layer includes an elongated portion extending into and / or through a through hole passing through the device layer from the first surface to the second surface. In some embodiments, an insulating layer may be positioned between the first and second electrically conductive layers. In some embodiments, the device layer is flexible and / or a substrate layer on which the device layer was grown is absent from the article. Still other aspects are generally related systems including the articles, methods of making the articles, kits containing the articles, or the like. While described above and elsewhere herein in the context of photovoltaic power generation, it should be understood that the articles and systems described herein are suitable for any of a variety of applications involving photovoltaic cells. As an example, the flexibility of the articles may be desirable for certain applications where a curvature of the article may be advantageous. For instance, according to some embodiments, the articles and systems described here may be configured for use in thermophotovoltaic power generation. In some embodiments, the articles and systems described here may be configured for use in concentrator photovoltaic power generation, or other voltaic power generation applications. Still, in some embodiments, the articles and systems may be configured for use as a photovoltaic laser power converter.

[0023] FIG. 1A depicts a non-limiting example of a system including an article for use in thermophotovoltaic power generation or other photovoltaic power generation. The system includes an article 100, e.g., as described herein and a radiation source 190. The article 100 in FIG. 1A is shown from a perspective view while also showing a cross section of the article 100. FIG. IB is an enlarged cross-sectional view of the article 100. The article 100 includes a device layer 110 having a first surface 112 and a second surface 114 and further defines a through hole extending from the first surface 112 to the second surface 114. The second surface 114 may be exposed to radiation 195 from the radiation source 190, e.g., for thermophotovoltaic power generation or other applications. The article 100 may further include a first electrically conductive layer 120 positioned adjacent to a portion of the first surface 112 and a second electrically conductive layer 130 positioned adjacent to a portion of the second surface 114 of the device layer. As shown in the depicted embodiment, the first electrically conductive layer 120 may be in direct contact with a portion of the first surface 112 of the device layer 110 and second electrically conductive layer 130 may be in direct contact with a portion of the second surface 114 of the device layer 110. The second electrically conductive layer 130 additionally may include an elongated portion 132 extending into the through hole defined by the article 100 and, as shown in the depicted embodiment, may extend through the through hole. The article 100 may further include an insulating layer 140 positioned between the first electrically conductive layer 120 and the elongated portion 132 of the second electrically conductive layer 130, e.g., to avoid a short circuit between the first and second electrically conductive layers 120 and 130. A device layer of the articles described herein, in some embodiments, may be suitable for performing photovoltaic power generation or other voltaic power generation applications. A device layer of the articles described herein, in some embodiments, may be suitable for performing thermophotovoltaic power generation. One or more than one device layer may be present. According to some embodiments, a device layer may include multiple layers of different materials in contact with each other, e.g., a heterojunction. In some cases, the heterojunction may comprise an n-doped material and a p-doped material to form a p-n junction. In some embodiments, the p-n junction may be vertically oriented, relative to a direction of gravity. According to some embodiments, there may be multiple p-n junctions present within the device layer of the article, e.g., as a multijunction cell. In some embodiments, the device layer may comprise a p-i-n junction. According to some embodiments, the device layer may additionally include a window layer. In some embodiments, the device layer may additionally include a contact layer.

[0024] FIG. 1C is a schematic diagram showing a non-limiting example of an article 100 including a device layer 110 having multiple materials in adjacent layers. The device layer 110 includes multiple p-doped materials 115 and 116 as well as multiple n-doped materials 117, 118, and 119. In this embodiment, layer 115 comprises 200 nm of p- doped InGaAsP, layer 116 comprises 100 nm of p-doped InP, layer 117 comprises 2500 nm of n-doped InGaAs, layer 118 comprises 20 nm of n-doped InP, and layer 119 comprises 200 nm of n-doped InGaAs, thereby forming a heterostructure. In the depicted embodiment, a p-n junction is formed between the layers, the p-n junction extending vertically from a first electrically conductive layer 120 to a second electrically conductive layer 130. Note that there is an insulating layer 140 between a portion of the first electrically conductive layer 120 and the device layer 110. Additionally, in the depicted embodiment, the second electrically conductive layer 130 only covers a first portion of the device layer 110, facilitating exposure of a second portion of the device layer 110 by incident radiation. It should be further understood that FIG. 1C is a nonlimiting example, and that other article structures including different device layers having different materials and / or in different arrangements are possible.

[0025] The articles described herein may include one or more device layers. A device layer of the article may be made of any of a variety of materials suitable for photovoltaic power generation. Non-limiting examples of materials which the device layer may comprise include indium gallium arsenide (InGaAs; e.g., n-doped), indium phosphide (InP; n- and / or p-doped), indium gallium arsenic phosphide (InGaAsP, p-doped), indium arsenide phosphide (InAsP), indium arsenide (InAs), gallium antimonide, silicon, germanium, gallium arsenide, aluminum indium gallium arsenide (AlInGaAs) and gallium antimonide, or other III-V compounds. It should be noted that a III-V compound may include one or more elements from Group III (B, Al, Ga, In, etc.) and one or more elements from Group V (S, P, As, Sb, Bi, etc.). Other materials are also possible, as this disclosure is not so limited. For example, any of the foregoing materials may be used as an active layer (e.g., comprising a p-n junction or a p-i-n junction, etc.) in the device layer.

[0026] In some embodiments, a window layer of the device layer may comprise InP, or other compounds such as, InGaP, AllnP, AlInGaP, GaP, GaN, etc. In some cases, the window layer may comprise a III-V compound.

[0027] In some embodiments, the materials of the device layer may have certain lattice orientations. According to some embodiments, the materials of the device layer may be epitaxially grown. In some embodiment, when the device layer includes multiple materials, the materials may be lattice matched. For example, in some embodiments, the device layer comprises InGaAs and InP that are lattice matched. In some embodiments, when the device layer includes multiple materials, the materials may be lattice mismatched. For example, the device layer may comprise a layer comprising InGaAs grown lattice mismatched to a layer comprising InP. In other embodiments, the materials may also be lattice matched.

[0028] In some embodiments, the device layer material may be disposed on a substrate layer, e.g., the substrate layer upon which the device layer materials were formed and / or deposited. Alternatively, in some embodiments, the substrate layer may be absent from the article including the device layer, methods regarding which are described in more detail elsewhere herein. The absence of the substrate layer may be advantageous, in some embodiments, due to improved flexibility of the device layer in the absence of the substrate layer, decreasing the weight of the device for certain applications, and / or increased voltage of the photovoltaic cell that may be obtained in the absence of the substrate layer. In some embodiments, where a substrate layer is absent from a device layer of the article, the device layer may be flexible. In some such embodiments, articles comprising the device layer absent the substrate layer may be flexible. In some embodiments, articles comprising the device layer are flexible. Flexibility of the device layer may be desirable because it allows the article to conform to the heat source and / or a printed circuit board substrate (e.g., a circuit board in electrical communication with an article as described herein). Conformation to a heat source may advantageously facilitate exposure to incident radiation from the heat source, e.g., for thermophotovoltaic power generation, in accordance with some embodiments. The flexibility of the device layer and / or the article, according to some embodiments, may be measured by a radius of curvature that the article may be bent to without substantial electrical or mechanical damage to the article, e.g., such that the article may still operate in desired applications such as photovoltaic power generation as described herein. In some embodiments, a radius of curvature of the device layer and / or the article is determined by wrapping some or all of the device layer and / or article without substantial electrical or mechanical damage around a cylinder having a known radius. In some embodiments, the radius of curvature to which the article may be bent without substantial electrical or mechanical damage to the article is greater than or equal to 0.1 cm, greater than or equal to 0.2 cm, greater than or equal to 0.5 cm, greater than or equal to 1 cm, greater than or equal to 2 cm, greater than or equal to 3 cm, greater than or equal to 5 cm, or greater than or equal to 10 cm. In some embodiments, the radius of curvature to which the article may be bent without substantial electrical or mechanical damage to the article is less than or equal to 10 cm, less than or equal to 5 cm, less than or equal to 3 cm, less than or equal to 2 cm, less than or equal to 1 cm, less than or equal to 0.5 cm, or less than or equal to 0.2 cm. Combinations of the foregoing ranges are possible (e.g., greater than or equal to 0.1 cm and less than or equal to 10 cm, greater than or equal to 0.1 cm and less than or equal to 2 cm, greater than or equal to 0.5 cm and less than or equal to 2 cm). Other ranges are also possible.

[0029] The device layer may be any of a variety of suitable thicknesses, in accordance with some embodiments. In some embodiments, the thickness of the device layer may be selected based on the materials of the active material, the radiation source, and / or the efficiency of photovoltaic energy conversion. In some embodiments, the thickness of the device layer may be greater than or equal to 10 nm, greater than or equal to 20 nm, greater than or equal to 50 nm, greater than or equal to 100 nm, greater than or equal to 200 nm, greater than or equal to 500 nm, greater than or equal to 1 micron, greater than or equal to 2 microns, greater than or equal to 3 microns, greater than or equal to 5 microns, greater than or equal to 10 microns, greater than or equal to 25 microns, greater than or equal to 50 microns, or greater than or equal to 75 microns. In some embodiments, the thickness of the device layer may be less than or equal to 100 microns, less than or equal to 75 microns, less than or equal to 50 microns, less than or equal to 25 microns, less than or equal to 10 microns, less than or equal to 5 microns, less than or equal to 3 microns, less than or equal to 2 microns, less than or equal to 1 micron, less than or equal to 500 nm, less than or equal to 200 nm, less than or equal to 100 nm, less than or equal to 50 nm, or less than or equal to 20 nm. Combinations of the foregoing ranges are possible (e.g., greater than or equal to 10 nm and less than or equal to 100 microns, greater than or equal to 1 micron and less than or equal to 5 microns). Other ranges are also possible. In some embodiments, where the device layer comprises multiple layers of different materials, each layer of materials of the device layer may independently have a thickness corresponding to any one of the foregoing ranges.

[0030] According to some embodiments, a portion of a device layer of the article may define a through hole passing from a first surface of the device layer to a second surface of the device layer. The through hole may have a cross section having any of a variety of shapes, including a circle, a square, a rectangle, an oval, or any other regular or irregular shape. As described elsewhere herein in more detail, a portion of a second electrically conductive layer may extend into and / or through the through hole in some embodiments, to facilitate electrical connections to the second electrically conductive layer. Accordingly, the size of the through hole may be selected to allow a portion (e.g., an elongated portion) of the second electrically conductive surface of an appropriate size to extend into and / or through the through hole and facilitate charge transport with little resistance, while maintaining a surface area of the device layer configured to be exposed to radiation for photovoltaic power generation. In some embodiments, the device layer may include a plurality of through holes, e.g., into which a plurality of portions of the second electrically conductive layer may extend. The plurality of through holes may be regularly and / or uniformly spaced throughout the device layer, in some embodiments. In some embodiments, a first electrically conductive layer may be positioned adjacent to a first surface of a device layer of the article. It will be appreciated that the first electrically conductive layer may not conformally cover first surface of the device layer and may only cover a portion of the device layer, in some embodiments. In some embodiments, there may be one or more intervening layers between the first electrically conductive layer and the first surface of the device layer. In some embodiments, there may be one or more intervening layers between a first portion of the first electrically conductive layer and the first surface of the device layer, where a second portion of the first electrically conductive layer may be in direct contact with the first surface of the device layer. In some embodiments, the first electrically conductive layer may be in direct contact with the first surface of the device layer. Direct contact between at least a portion of the first electrically conductive layer and the first surface of the device layer may facilitate electrical communication between the layers, which may facilitate operation of the article in applications, for example, such as photovoltaic power generation.

[0031] A first electrically conductive layer of the article, in some embodiments, may be suitably conductive to apply a voltage across the device layer in combination with a second electrically conductive layer, as described elsewhere herein. Any of a variety of materials may be suitable for use as the first electrically conductive layer, according to some embodiments. Non-limiting examples include Au, Ag, Cu, Ni, and / or alloys thereof. Other materials are also possible.

[0032] Advantageously, in some embodiments, the material of the first electrically conductive layer may be reflective of radiation having a wavelength corresponding to the radiation incident upon the device. In some embodiments, the material of the first electrically conductive layer may be reflective of radiation having a wavelength configured to be absorbed by the device layer. In some embodiments, a portion of incident radiation on the device layer may transmit through the device layer and may be incident upon the first electrically conductive layer, where at least a portion of the incident radiation may be reflected and thus transmit through the device layer again. This may increase efficiency of a photovoltaic process occurring within the device layer, in some embodiments. A first electrically conductive layer may be any of a variety of suitable thicknesses, in accordance with some embodiments. In some embodiments, the thickness of the first electrically conductive layer may be selected based on the materials of the first electrically conductive layer and / or to provide a sufficient conductivity for operation of systems including the articles described herein. In some embodiments, the thickness of the first electrically conductive layer may be greater than or equal to 10 nm, greater than or equal to 20 nm, greater than or equal to 50 nm, greater than or equal to 100 nm, greater than or equal to 200 nm, greater than or equal to 500 nm, greater than or equal to 1 micron, greater than or equal to 2 microns, greater than or equal to 3 microns, greater than or equal to 5 microns, greater than or equal to 10 microns, greater than or equal to 25 microns, greater than or equal to 50 microns, or greater than or equal to 75 microns. In some embodiments, the thickness of the first electrically conductive layer may be less than or equal to 100 microns, less than or equal to 75 microns, less than or equal to 50 microns, less than or equal to 25 microns, less than or equal to 10 microns, less than or equal to 5 microns, less than or equal to 3 microns, less than or equal to 2 microns, less than or equal to 1 micron, less than or equal to 500 nm, less than or equal to 200 nm, less than or equal to 100 nm, less than or equal to 50 nm, or less than or equal to 20 nm. Combinations of the foregoing ranges are possible (e.g., greater than or equal to 10 nm and less than or equal to 100 microns, greater than or equal to 1 micron and less than or equal to 5 microns). Other ranges are also possible.

[0033] According to some embodiments, an article may comprise a second electrically conductive layer positioned adjacent to a second surface of a device layer, the second surface being opposite a first surface where a first electrically conductive layer may be positioned as described above. The second electrically conductive layer may comprise any of a variety of materials that are suitably conductive, in accordance with some embodiments. The materials of the second electrically conductive layer may be selected from materials that are similarly suitable for the first electrically conductive layer, in some embodiments. The first and second layers thus may independently have the same or different compositions.

[0034] Similar to the above description in the context of the first electrically conductive layer, the second electrically conductive layer may be in direct contact with the second surface and / or may have one or more intervening layers therebetween. In some embodiments, the second electrically conductive layer may be a conformal layer positioned adjacent to an entirety of the second surface of the device layer. However, in other embodiments, the second electrically conductive layer may not be a conformal layer and may only cover a portion of a second surface of the device layer. For instance, in some embodiments, the second electrically conductive layer may include grid fingers over a first portion of the second surface of the device layer to decrease the distance between the second electrically conductive layer and any position present on the second surface the device layer while also facilitating the exposure of a second portion of the second surface of the device layer where the second electrically conductive layer is absent. In some such embodiments, exposure of the second portion of the second surface of the device layer may facilitate incidence of radiation onto the device layer during applications, e.g., during thermophotovoltaic power generation.

[0035] Referring again to FIG. 1A as a non-limiting example and only for the purpose of illustrating a possible arrangement of a second electrically conductive layer 130 including grid fingers, the second electrically conductive layer 130 may only be positioned adjacent to a first portion of the second surface 114 of the device layer 110 so that radiation 195 may be incident upon a second portion where the second electrically conductive layer 130 is absent. It should be understood that other arrangements of the second electrically conductive layer are also possible, as this disclosure is not so limited.

[0036] The second electrically conductive layer may further include an elongated portion that extends at least partially into a through hole of the device layer, in some embodiments. According to some embodiments, the elongated portion extends through the through hole of the device layer. In some embodiments, the elongated portion is a via, traversing the thickness of the device layer from a first surface to a second surface of the device layer. In accordance with some embodiments, an end portion of the elongated portion of the second electrically conductive layer may be exposed and / or be configured to have an electrical connection disposed thereon from a surface of the device layer which the first electrically conductive layer is positioned adjacent. In some embodiments, both an end portion of the elongated portion of the second electrically conductive layer and the first electrically conductive layer may be exposed and / or be configured to have an electrical connection disposed thereon from the same side of the article. Advantageously, in some embodiments, the elongated portion may facilitate electrical connections to the second electrically conductive layer from the side of the first surface of the device layer. In such a manner, in some embodiments, the elongated portion and the first electrically conductive layer may both be contacted from the same surface of the article. In some embodiments, where multiple through holes are present in the device layer, there may be a corresponding number of elongated portions of the second electrically conductive layer extending into and / or through the through holes.

[0037] In some embodiments, as shown in FIG. IB, the elongated portion 132 of the second electrically conductive layer 130 has a cross section that is substantially uniform throughout a thickness of the article. In some embodiments, one or more dimensions of the cross section of the elongated portion of the second electrically conductive layer is substantially the same throughout a thickness of the article (e.g., in the direction of arrow 160 shown in FIG. IB). In some embodiments, as shown in FIG. 21, the elongated portion 132 of the second electrically conductive layer 130 has a cross section that is non-uniform throughout a thickness of the article. In some embodiments, one or more dimensions of the cross section of the elongated portion of the second electrically conductive layer is non-uniform throughout a thickness of the article (e.g., in the direction of arrow 160 shown in FIG. IB).

[0038] As a non-limiting example, in some embodiments, the first electrically conductive layer may be positioned adjacent to a back surface (e.g., a first surface) of the device layer and the second electrically conductive layer may be positioned adjacent to a top surface (e.g., a second surface) of the device layer, where the second electrically conductive layer includes an elongated portion extending through the device layer and that is configured to be contacted from the back surface of the device layer, e.g., back contacted. Such back contacting of the second electrically conductive layer, in some embodiments, may decrease the shading necessary from electrical connections between the first and second electrically conductive layers (e.g., a busbar), thereby increasing the amount of available surface area of the device layer for photovoltaic power generation.

[0039] A second electrically conductive layer may be any of a variety of suitable thicknesses, in accordance with some embodiments. In some embodiments, the thickness of the second electrically conductive layer may be selected based on the materials of the second electrically conductive layer and / or to provide a sufficient conductivity for operation of systems including the articles described herein. In some embodiments, the thickness of the second electrically conductive layer may be greater than or equal to 10 nm, greater than or equal to 20 nm, greater than or equal to 50 nm, greater than or equal to 100 nm, greater than or equal to 200 nm, greater than or equal to 500 nm, greater than or equal to 1 micron, greater than or equal to 2 microns, greater than or equal to 3 microns, greater than or equal to 5 microns, or greater than or equal to 10 microns. In some embodiments, the thickness of the second electrically conductive layer may be less than or equal to 25 microns, less than or equal to 10 microns, less than or equal to 5 microns, less than or equal to 3 microns, less than or equal to 2 microns, less than or equal to 1 micron, less than or equal to 500 nm, less than or equal to 200 nm, less than or equal to 100 nm, less than or equal to 50 nm, or less than or equal to 20 nm. Combinations of the foregoing ranges are possible (e.g., greater than or equal to 10 nm and less than or equal to 25 microns, greater than or equal to 1 micron and less than or equal to 5 microns). Other ranges are also possible.

[0040] According to some embodiments, the article may include an insulating layer. As described in the context of a first and second electrically conductive layers, the insulating layer may or may not be a conformal layer. In some embodiments, the insulating layer may be positioned between the first electrically conductive layer and the second electrically conductive layer. In some embodiments, the insulating layer may be positioned between the first electrically conductive layer and an end portion of the elongated portion of the second electrically conductive layer. In some embodiments, the insulating layer may be positioned around an opening of a through hole in the device layer, e.g., such that the insulating layer surrounds the opening of the through hole. In some embodiments, the end portion of the elongated portion may extend into and / or through the through hole and may accordingly be surrounded by the insulating layer, thereby preventing a short circuit between the first and second electrically conductive portions. In some embodiments, where the end portion of the elongated portion of the second electrically conductive layer is surrounded by the insulating layer, the end portion may still be exposed to an atmosphere and / or may be available for forming an electrical connection, e.g., to a circuit board, and / or may be in electrical communication with a circuit board.

[0041] FIG. ID is a top-down view of a schematic diagram of a non-limiting example of an article 100 viewed from direction 160 as shown in FIG. 1A. The view in FIG. ID shows an end portion of the elongated portion 132 of the second electrically conductive layer with an insulating layer 140 positioned around (e.g., surrounding) the elongated portion 132 and separating the elongated portion 132 from a first electrically conductive layer 120. The insulating layer 140 has a thickness 148, which is sufficiently thick to prevent a short circuit between the first electrically conductive layer 120 and the elongated portion 132. Additionally, as described elsewhere herein in more detail, FIG. ID depicts that the first electrically conductive layer 120 and the elongated portion 132 may both be configured to be contacted from the same surface of the article 100.

[0042] Any of a variety of dielectric materials are suitable for use as the insulating layer, according to some embodiments. In some embodiments, the insulating layer may comprise SiC , an insulating photoresist material (e.g., SU-8), and / or any other suitably insulating material. Additionally, as described above, in some embodiments, the insulating layer may cover a surface of the device layer defining the through hole. In some such embodiments, a thickness of the insulating layer may be such that the insulating layer covers the surface defining the through hole but does not fill the through hole. The thickness of the insulating layer, in some embodiments, may be sufficient to electrically isolate and / or prevent a short circuit between a first layer on a first side of the insulating layer and a second layer on a second side of the insulating layer.

[0043] An insulating layer may be any of a variety of suitable thicknesses, in accordance with some embodiments. In some embodiments, the thickness of the insulating layer may be selected based on the materials of the insulating layer. In some embodiments, the thickness of the insulating layer may be greater than or equal to 10 nm, greater than or equal to 20 nm, greater than or equal to 50 nm, greater than or equal to 100 nm, greater than or equal to 200 nm, greater than or equal to 500 nm, greater than or equal to 1 micron, greater than or equal to 2 microns, greater than or equal to 3 microns, greater than or equal to 5 microns, or greater than or equal to 10 microns. In some embodiments, the thickness of the insulating layer may be less than or equal to 25 microns, less than or equal to 10 microns, less than or equal to 5 microns, less than or equal to 3 microns, less than or equal to 2 microns, less than or equal to 1 micron, less than or equal to 500 nm, less than or equal to 200 nm, less than or equal to 100 nm, less than or equal to 50 nm, or less than or equal to 20 nm. Combinations of the foregoing ranges are possible (e.g., greater than or equal to 10 nm and less than or equal to 25 microns, greater than or equal to 1 micron and less than or equal to 5 microns). Other ranges are also possible.

[0044] According to some embodiments, a system may include an article as described herein and a circuit board contacting a first electrically conductive layer and an elongated portion of a second electrically conductive layer. In some embodiments, the circuit board may back contact the second electrically conductive layer via the elongated portion of the second electrically conductive layer, which may advantageously decrease the amount of shading associated with the electrical connections (e.g., the circuit board, a busbar, and / or any other electrical connections between the first and second electrically conductive layers). In some embodiments, the system may further include a radiation source capable of burning fuel and generating radiation. In some such embodiments, the radiation source may further be arranged and configured to direct radiation at the second surface of the device layer of the article, e.g., for applications such as thermophotovoltaic power generation, or other voltaic power generation.

[0045] Some aspects are generally related to methods of making articles described herein. In some embodiments, the method is a method of forming an article for use in photovoltaic power generation.

[0046] The method, according to some embodiments, includes providing a device layer, where the device layer may be suitable for use in photovoltaic power generation. According to some embodiments, the device layer is positioned adjacent to a substrate layer. In some embodiments, the device layer is disposed on the substrate layer. In some embodiments, where the substrate layer is present, the method may further include forming a device layer over the substrate layer. For instance, the device layer may be grown on the substrate layer, e.g., through epitaxial growth via vapor-phase, liquidphase, and / or solid-phase epitaxy. Non-limiting example methods for epitaxial growth include metalorganic vapor-phase epitaxy (MOVPE), molecular beam epitaxy (MBE), and hydride vapor-phase epitaxy (HVPE). Other methods of epitaxial growth are also possible. Accordingly, forming a device layer over the substrate layer, in some embodiments, comprises growing the device layer over substrate layer. In some embodiments, growing the device layer proceeds via metalorganic vapor-phase epitaxy (MOVPE), molecular beam epitaxy (MBE), and / or hydride vapor-phase epitaxy (HVPE). In some embodiments, as described above, the device layer may comprise multiple materials. In some such embodiments, each material of the device layer may individually be formed over the substrate layer. As a non-limiting example, a first p- doped material may be epitaxially deposited over the substrate layer, whereafter a second n-doped material may then be epitaxially deposited over the first p-doped material, the first and second materials forming the device layer. Other device layer structures and related methods of forming them are also possible, as this disclosure is not so limited.

[0047] The method may include, in some embodiments, forming a through hole through a device layer to expose a portion of a substrate layer adjacent the device layer. In some embodiments, forming the through hole through the device layer may comprise removing a portion of the device layer, e.g., physically and / or chemically. In some embodiments, forming the through hole through the device layer comprises etching the device layer. In some such embodiments, the etching is selective, and may be performed on an exposed portion of the device layer. According to some embodiments, the device layer may be partially covered to produce a covered portion and an exposed portion, e.g., for use in the selective etching. Covering a portion of the device layer may proceed in any of a variety of suitable methods, for example, lithography. In some embodiments, photolithography may be used to cover some of the device layer prior to the selective etching. For instance, a material may be photolithographically patterned to cover a portion of the device layer, whereafter the remaining exposed portion of the device layer may be etched. Accordingly, in some embodiments, methods may include photolithographically patterning a material over at least a portion of the device layer, and then exposing the uncovered portion of the device layer to an etchant. The materials used for etching, according to some embodiments, may be selected based on the identity of the materials of the device layer. In some embodiments, liquid-phase etching may be used, the materials for which may comprise a solution. In some embodiments, the solution used to etch the device layer comprises hydrochloric acid. In some embodiments, the solution used to etch the device layer comprises phosphoric acid and / or hydrogen peroxide. In some embodiments, the solution used to etch the device layer comprises sulfuric acid. In some embodiments, the solution used to etch the device layer comprises citric acid. Combinations of the foregoing components for the etching solution are also possible. Other solutions are also possible. According to some embodiments, forming a through hole through the device layer using conventional methods, e.g., physically drilling a through hole, may not be desirable with the articles described herein, for instance, given the lack of a rigid substrate layer, in some embodiments.

[0048] In some embodiments, the method may further include forming an insulating layer over a surface of the device layer. In some embodiments, forming an insulating layer over a surface of the device layer includes forming an insulating layer over a first portion of the device layer positioned around the through hole and / or over a surface defining the through hole in the device layer. In some such embodiments, where an insulating layer is formed over a surface defining the through hole in the device layer, the through hole may still extend from a first surface to a second surface of the device layer, the second surface opposite the first surface. According to some embodiments, forming the insulating layer may comprise inkjet printing, soft lithography, and / or nanoimprint lithography. According to some embodiments, forming the insulating layer may include lithographically patterning the insulating layer, e.g., spincoating and patterning a photoresist. In some embodiments, a negative or a positive photoresist are possible as the patterned photoresist. In some embodiments, SU-8 negative photoresist may be used to form the insulating layer over the device layer. Other materials and methods are also possible for forming an insulating layer over a portion of the device layer. According to some embodiments, forming an insulating layer may cover a portion of the substrate exposed through the through hole. In some such embodiments, the method may further include removing the insulating material formed over the substrate layer to expose the substrate layer through the through hole.

[0049] In some embodiments, a seed layer may then be formed over an exposed portion of the device layer, the insulating layer, and / or an exposed surface of the substrate layer. In some embodiments, the substrate layer may be exposed through the through hole and the exposed portion of the device layer may be the portion of the device layer where the insulating layer is absent. The seed layer, according to some embodiments, may be a thin layer (e.g., having a thickness of less than or equal to 1 micron, 500 nm, 100 nm, 60 nm, or the like) of electrically conductive material and may be formed by any of a variety of suitable methods. The seed layer, in some embodiments, may be formed by electronbeam physical vapor deposition, atomic layer deposition, thermal evaporation, sputtering, electroless plating, and / or direct electrochemical plating. In some embodiments, the seed layer may be formed by electron beam evaporation. According to some embodiments, the seed layer may include one or more layers of Ti, Cr, and / or Au. Other materials for the seed layer are also possible.

[0050] The method may further comprise, in some embodiments, forming a mold over a portion of the insulating layer, the mold positioned around an opening of a through hole. For instance, from a top-down perspective, the through hole defines an opening in the device layer through which the substrate is exposed. As described above, the insulating layer may be formed on a first portion of the device layer positioned around the through hole, in some embodiments, which may correspond to a portion of the device layer positioned around the opening of the through hole. Additionally, while the insulating layer may be formed over the device layer and the mold may be formed over the insulating layer, a seed layer may still be present between the insulating layer and the mold. That is, in some embodiments, the mold may be formed over a seed layer, e.g., directly on a portion of the seed layer surrounding the opening of the through hole. Accordingly, in some embodiments, the mold may cover a portion of the seed layer, and thus the portion of the seed layer covered by the mold may not be exposed and / or accessible, for example, for additional processing steps as described below. In some embodiments, the mold may form a closed shape surrounding the opening of the through hole.

[0051] The mold, in some embodiments, may be formed through any of a variety of suitable methods. In some embodiments, the mold may be formed by lithography, e.g., soft lithography, nanoimprint lithography, and / or photolithography. The mold may be formed by spincoating a photoresist material (e.g., AZ P4620), whereafter the mold may be patterned to leave the mold in a desired shape. As described above, the mold may define a closed shape surrounding an opening of a through hole of the device layer.

[0052] For example, consider FIG. IE, which is a schematic diagram showing a top- down perspective of a non-limiting example of an article 100 including a mold 145 surrounding the through hole. In FIG. IE, a device layer 110 has a mold 145 positioned adjacent a portion of it, where the mold 145 forms a closed shape surrounding an opening 113 of a through hole in the device layer 110. It should be understood that FIG. IE is a simplified diagram, and while not illustrated, other layers may also be present on the device layer as described elsewhere herein, for instance, an insulating layer, a seed layer, etc. In some embodiments, the mold may be present over and / or directly on a seed layer, where a portion of the seed layer covered by the mold is not accessible. In some embodiments, the remaining exposed portion of the seed layer may be exposed and suitable for additional processing steps.

[0053] In some embodiments, the method further comprises forming a first electrically conductive portion over the device layer outside the mold (e.g., outside a closed shape of the mold when viewing the mold from a top-down perspective) and a second electrically conductive portion inside the mold (e.g., inside a closed shape of the mold when viewed from a top-down perspective) and partially within the through hole. In some embodiments, the first electrically conductive portion is the first electrically conductive layer, as described elsewhere herein. In some embodiments, the second electrically conductive portion is a portion of the second electrically conductive layer, e.g., at least some of the elongated portion of the second electrically conductive layer. Forming the first and second electrically conductive portions may proceed by any of a variety of suitable methods, in accordance with some embodiments. In some embodiments, the first and second electrically conductive portions are formed by electroplating a conductive material onto an exposed portion of the seed layer (e.g., the portion of the seed layer where the mold is absent). In some embodiments, a layer of Ni may be electroplated, followed by a layer of Au. In some embodiments, the first and second electrically conductive portions are formed through electron beam physical vapor deposition, sputtering, electroless plating, or the like. Other methods for forming the first and second electrically conductive layers are also possible. According to some embodiments, there is a vertical clearance between a top of the mold and a top of the first and second electrically conductive portions, e.g., to maintain electrical isolation between and / or prevent a short circuit between the first and second electrically conductive portions. Accordingly, a thickness of the mold may correspond and / or be larger than a desired thickness of the first and second electrically conductive portions to provide the clearance, in some embodiments.

[0054] The method may further include removing the mold, in some embodiments. Removing the mold, according to some embodiments, may produce a cavity, for example, where the mold was before removal. In some embodiments, the size and shape of the cavity corresponds to the size and shape of the mold before removing the mold, e.g., the first and second electrically conductive layers do not substantially move following removal of the mold. Removing the mold may proceed, for example, by exposing the mold to a solvent to dissolve the mold, in some embodiments. In some embodiments, a solvent for removing the mold may comprise acetone, N-methyl pyrrolidone, or the like. Other methods for removing the mold are also possible, as this disclosure is not so limited. In some embodiments, after removing the mold, the seed layer that was covered by the mold may then be exposed. In some embodiments, the method includes removing the seed layer present on a surface defining the cavity, thereby electrically isolating and / or preventing a short circuit between the first and second electrically conductive portions. The seed layer may be removed by etching the seed layer, in some embodiments, where a solution used to etch the seed layer is compatible with other materials used in the article (e.g., comprising the conductive layers, device layer, and / or insulating layers) so as to only substantially remove the seed layer. In some embodiments, etching the seed layer uses a solvent that is not substantially compatible with other materials of the article, and thus the etching is performed quickly to substantially remove the seed layer without substantially etching any other materials of the article. According to some embodiments, materials for etching the seed layer may depend on the materials of the seed layer to obtain selective etching. For instance, in some embodiments, Au etchant GE-8110 and Chromium Etchant 1020 from Transene may be used. In some embodiments, HF may be used for Titanium etching. In some embodiments, where the seed layer comprises multiple materials (e.g., sequential Ti and Au), etching steps for each material of the seed layer may be performed.

[0055] According to some embodiments, the method may include filling the cavity with an insulating material to electrically isolate and / or prevent a short circuit between the first and second electrically conductive portions. Filling the cavity may proceed by any of a variety of suitable methods, in some embodiments. According to some embodiments, an insulating material may be lithographically formed within the cavity. For instance, in some embodiments, a photoresist may be spincoated and patterned to fill the cavity with an insulating material. An example photoresist is SU-8, though other insulating materials and methods of filling the cavity therewith are possible, as this disclosure is not so limited. As a non-limiting example, referring again to FIG. IB, the cavity may be filled with insulating layer 140, which may then be allowed to overflow from the cavity over a portion of the first electrically conductive layer 120. When viewed from a top-down perspective as shown in FIG. ID, overflowing of the insulating layer from the cavity may increase the thickness 148 of the device layer 140 separating the first electrically conductive layer 120 and the elongated portion 132. In some embodiments, increasing the thickness 148 between the first electrically conductive layer 120 and the elongated portion 132 may provide a higher level of tolerance when electrically connecting the article 100 to a circuit board, thereby requiring less precision when connecting the article 100 to the circuit board.

[0056] In some embodiments, the method may further comprise removing the substrate layer from the device layer. According to some embodiments, removing the substrate layer may include etching the substrate layer via a substrate etchback process. Alternatively, in some embodiments, the substrate layer may be removed from the device layer via epitaxial liftoff of the substrate layer. As a non-limiting example, in some embodiments, a wafer (e.g., a silicon wafer) may be temporarily attached to the top of the first and second electrically conductive portions, opposite the substrate layer. Attachment of the wafer may proceed by using a temporary adhesive, double sided tape, wax, and / or epoxy, in some embodiments. In some embodiments, the substrate layer is then exposed to a selective etchant, for instance, hydrochloric acid (HC1) when the substrate layer comprises InP, to etch the substrate layer from the device layer. The wafer, in some embodiments, may be removed from the article following etching of the substrate layer. According to some embodiments, forming an article for photovoltaic power generation where the substrate layer is absent may advantageously decrease the weight of the article compared to articles where the substrate layer is present. In some such embodiments, a lightweight article may be useful in applications where decreasing weight is desirable, for example, unmanned aerial vehicles powered by such articles or systems including such articles.

[0057] As mentioned above, the second conductive portion may extend into and / or through the through hole of the device layer, and thus may be exposed from the side of the device layer from which the substrate layer was removed. Accordingly, in some embodiments, the method may further include patterning a second electrically conductive layer on the article. In some embodiments, the second electrically conductive layer is patterned on the side of the device layer from which a substrate layer was removed. Patterning of the second electrically conductive layer may occur by lithographically patterning the layer, e.g., photolithographically patterning the layer, in some embodiments. Accordingly, in some embodiments, the second electrically conductive layer may be in electrical communication with the second electrically conductive portion in the through hole and that is exposed from the side of the device layer from which the substrate layer was removed. In some such embodiments, the second electrically conductive portion and the second electrically conductive layer are in direct contact. In some embodiments, following connection between the second electrically conductive portion and the second electrically conductive layer, the second electrically conductive portion is an elongated portion of the second electrically conductive layer extending into and / or through the through hole of the device layer.

[0058] The method, according to some embodiments, may further include electrically connecting the first electrically conductive portion (e.g., the first electrically conductive layer) and the second electrically conductive portion (e.g., the elongated portion of the second electrically conductive layer) to a circuit board. In some such embodiments, electrical communication to each of the first and second electrically conductive layers occurs from the same surface of the article, e.g., a back surface of the article, opposite a front surface (e.g., a top surface) of the article configured to be exposed to a radiation source for applications such as photovoltaic power generation.

[0059] FIGS. 2A-2I show schematic diagrams depicting a non-limiting example of a method of forming an article, as described herein. FIG. 2A shows a device layer 110 provided on a substrate 105. A through hole may be etched through the device layer 110 as depicted in FIG. 2B, whereafter an insulating layer 140 may be deposited over a surface defining the through hole and / or a portion of the device layer positioned around the through hole via photolithography, as shown in FIG. 2C. FIG. 2D shows that a seed layer 142 may then be formed over an exposed portion of the device layer 110, the insulating layer 140, and / or an exposed surface of the substrate layer 105, for instance, by electron beam physical vapor deposition. A mold 145 may then be photolithographically patterned over a portion of the insulating layer such that the mold surrounds an opening of the through hole, as illustrated in FIG. 2E. Electrodeposition onto the seed layer 142 may then be performed to form a first electrically conductive portion 120 (e.g., a first electrically conductive layer) and a second electrically conductive portion 132 (e.g., an elongated portion) as depicted in FIG. 2F. FIG. 2F further shows that the mold 145 is fabricated such that there is clearance between the thickness (e.g., a height) of the mold 145 and the thickness (e.g., a height) of the first electrically conductive portion 120 and the elongated portion 132. The mold 145 may then be dissolved by exposure to a solvent such as acetone to produce a cavity, whereafter any of the seed layer 145 defining a surface of the cavity may be etched away and then the cavity may be filled with an insulating material to form an insulating layer 140, as shown in FIG. 2G. The substrate layer 105 may be etched away as shown in FIG. 2H, e.g., via substrate etchback procedures, to expose a surface (e.g., a second surface, a top surface) of the device layer 110 and a portion of the elongated portion 132. FIG. 21 further illustrates that a second electrically conductive layer 130 is then photolithographically patterned, where the second electrically conductive layer 130 is connected to the elongated portion 132. It should be understood that the example shown in FIGS. 2A-2I is non-limiting and other methods for forming the articles described herein are possible. Additionally, or alternatively, not all of the illustrated steps necessarily need to be performed to form the articles described herein.

[0060] U.S. Provisional Patent Application Serial No. 63 / 561,581, filed March 5, 2024, entitled “Systems and Methods for Back Contacted Photovoltaic Cells,” by Chan, et al., is incorporated herein by reference in its entirety for all purposes.

[0061] While several embodiments of the present invention have been described and illustrated herein, those of ordinary skill in the art will readily envision a variety of other means and / or structures for performing the functions and / or obtaining the results and / or one or more of the advantages described herein, and each of such variations and / or modifications is deemed to be within the scope of the present invention. More generally, those skilled in the art will readily appreciate that all parameters, dimensions, materials, and configurations described herein are meant to be exemplary and that the actual parameters, dimensions, materials, and / or configurations will depend upon the specific application or applications for which the teachings of the present invention is / are used. Those skilled in the art will recognize, or be able to ascertain using no more than routine experimentation, many equivalents to the specific embodiments of the invention described herein. It is, therefore, to be understood that the foregoing embodiments are presented by way of example only and that, within the scope of the appended claims and equivalents thereto, the invention may be practiced otherwise than as specifically described and claimed. The present invention is directed to each individual feature, system, article, material, and / or method described herein. In addition, any combination of two or more such features, systems, articles, materials, and / or methods, if such features, systems, articles, materials, and / or methods are not mutually inconsistent, is included within the scope of the present invention.

[0062] The indefinite articles “a” and “an,” as used herein in the specification and in the claims, unless clearly indicated to the contrary, should be understood to mean “at least one.”

[0063] The phrase “and / or,” as used herein in the specification and in the claims, should be understood to mean “either or both” of the elements so conjoined, i.e., elements that are conjunctively present in some cases and disjunctively present in other cases. Other elements may optionally be present other than the elements specifically identified by the “and / or” clause, whether related or unrelated to those elements specifically identified unless clearly indicated to the contrary. Thus, as a non-limiting example, a reference to “A and / or B,” when used in conjunction with open-ended language such as “comprising” can refer, in one embodiment, to A without B (optionally including elements other than B); in another embodiment, to B without A (optionally including elements other than A); in yet another embodiment, to both A and B (optionally including other elements); etc.

[0064] As used herein in the specification and in the claims, “or” should be understood to have the same meaning as “and / or” as defined above. For example, when separating items in a list, “or” or “and / or” shall be interpreted as being inclusive, i.e., the inclusion of at least one, but also including more than one, of a number or list of elements, and, optionally, additional unlisted items. Only terms clearly indicated to the contrary, such as “only one of’ or “exactly one of,” or, when used in the claims, “consisting of,” will refer to the inclusion of exactly one element of a number or list of elements. In general, the term “or” as used herein shall only be interpreted as indicating exclusive alternatives (i.e. “one or the other but not both”) when preceded by terms of exclusivity, such as “either,” “one of,” “only one of,” or “exactly one of.” “Consisting essentially of,” when used in the claims, shall have its ordinary meaning as used in the field of patent law. As used herein in the specification and in the claims, the phrase “at least one,” in reference to a list of one or more elements, should be understood to mean at least one element selected from any one or more of the elements in the list of elements, but not necessarily including at least one of each and every element specifically listed within the list of elements and not excluding any combinations of elements in the list of elements. This definition also allows that elements may optionally be present other than the elements specifically identified within the list of elements to which the phrase “at least one” refers, whether related or unrelated to those elements specifically identified. Thus, as a non-limiting example, “at least one of A and B” (or, equivalently, “at least one of A or B,” or, equivalently “at least one of A and / or B”) can refer, in one embodiment, to at least one, optionally including more than one, A, with no B present (and optionally including elements other than B); in another embodiment, to at least one, optionally including more than one, B, with no A present (and optionally including elements other than A); in yet another embodiment, to at least one, optionally including more than one, A, and at least one, optionally including more than one, B (and optionally including other elements); etc.

[0065] Some embodiments may be embodied as a method, of which various examples have been described. The acts performed as part of the methods may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include different (e.g., more or less) acts than those that are described, and / or that may involve performing some acts simultaneously, even though the acts are shown as being performed sequentially in the embodiments specifically described above.

[0066] Use of ordinal terms such as “first,” “second,” “third,” etc., in the claims to modify a claim element does not by itself connote any priority, precedence, or order of one claim element over another or the temporal order in which acts of a method are performed, but are used merely as labels to distinguish one claim element having a certain name from another element having a same name (but for use of the ordinal term) to distinguish the claim elements.

[0067] In the claims, as well as in the specification above, all transitional phrases such as “comprising,” “including,” “carrying,” “having,” “containing,” “involving,” “holding,” and the like are to be understood to be open-ended, i.e., to mean including but not limited - Zi to. Only the transitional phrases “consisting of’ and “consisting essentially of’ shall be closed or semi-closed transitional phrases, respectively, as set forth in the United States Patent Office Manual of Patent Examining Procedures, Section 2111.03.

Claims

CLAIMSWhat is claimed is:

1. An article, comprising: one or more device layers having a first surface and a second surface opposite the first surface, the one or more device layers each defining a through hole extending from the first surface to the second surface; a first electrically conductive layer positioned adjacent to a portion of the first surface; a second electrically conductive layer positioned adjacent to a portion of the second surface and comprising an elongated portion that extends into the through hole; and an insulating layer positioned between the first electrically conductive layer and the elongated portion, wherein the insulating layer surrounds an end portion of the elongated portion, and wherein the one or more device layers is flexible.

2. The article of claim 1, wherein the one or more device layers exhibits a flexibility such that, when the article is bent into a circular arc, the article can reach a radius of curvature of less than or equal to 10 cm without mechanical or electrical damage.

3. An article, comprising: one or more device layers grown on a substrate layer, the one or more device layers having a first surface and a second surface opposite the first surface, the one or more device layers each defining a through hole extending from the first surface to the second surface; a first electrically conductive layer positioned adjacent to a portion of the first surface; a second electrically conductive layer positioned adjacent to a portion of the second surface and comprising an elongated portion that extends into the through hole; andan insulating layer formed between the first electrically conductive layer and the elongated portion, wherein the insulating layer surrounds an end portion of the elongated portion, and wherein the substrate layer is absent.

4. An article as in any preceding claim, wherein the elongated portion extends through the through hole.

5. An article as in any preceding claim, wherein the article comprises two device layers defining a p-n junction therebetween.

6. An article as in claim 5, wherein the p-n junction extends from the first electrically conductive layer to the second electrically conductive layer.

7. As article as in any preceding claim, wherein the article comprises two device layers defining a p-i-n junction therebetween.

8. An article as in any preceding claim, wherein at least one device layer comprises InGaAs.

9. An article as in any preceding claim, wherein at least one device layer comprises GaAs.

10. An article as in any preceding claim, wherein at least one device layer comprises AlInGaAs.

11. An article as in any preceding claim, wherein at least one device layer comprises InAsP.

12. An article as in any preceding claim, wherein at least one device layer comprises In As.

13. An article as in any preceding claim, wherein at least one device layer comprises GaSb.

14. An article as in any preceding claim, wherein a window layer of the device layer comprises InP.

15. An article as in any preceding claim, wherein a window layer of the device layer comprises InGaP.

16. An article as in any preceding claim, wherein a window layer of the device layer comprises AllnP17. An article as in any preceding claim, wherein a window layer of the device layer comprises AlInGaP.

18. An article as in any preceding claim, wherein a window layer of the device layer comprises GaP.

19. An article as in any preceding claim, wherein a window layer of the device layer comprises GaN.

20. An article as in any preceding claim, wherein the device layers comprise two layers that are lattice-mismatched.

21. An article as in any preceding claim, wherein the device layers comprise two layers that are lattice matched.

22. An article as in any preceding claim, wherein a material of the device layer is epitaxially grown.

23. An article as in any preceding claim, wherein the second electrically conductive layer is absent from at least a portion of the second surface of the device layer.

24. An article as in any preceding claim, wherein the first and / or second conductive layers comprise Ni.

25. An article as in any preceding claim, wherein the first and / or second conductive layers comprise Cu.

26. An article as in any preceding claim, wherein the first and / or second conductive layers comprise Ag.

27. An article as in any preceding claim, wherein the first and / or second conductive layers comprise Au.

28. An article as in any preceding claim, wherein the article is configured for use in thermophotovoltaic power generation.

29. An article as in any preceding claim, wherein the article is configured for use in concentrator photovoltaic power generation.

30. An article as in any preceding claim, wherein the article is configured for use as a photovoltaic laser power converter.

31. A system, comprising: an article as in any one of the preceding claims; and a circuit board contacting and in electrical communication with the first electrically conductive layer and the elongated portion of the second electrically conductive layer of the article.

32. A system as in claim 31, further comprising a radiation source configured to direct radiation at the second surface of the device layer of the article.

33. A method of forming an article, comprising: forming a through hole through a device layer to expose a portion of a substrate layer adjacent the device layer;forming an insulating layer over a surface of the device layer; forming a mold over a portion of the insulating layer, the mold positioned around an opening through hole; forming a first electrically conductive portion over the device layer outside the mold and a second electrically conductive portion inside the mold and partially within the through hole; removing the mold to produce a cavity; and filling the cavity with an insulating material.

34. A method of forming an article, comprising: forming a through hole through a device layer to expose a portion of a substrate layer adjacent the device layer; forming an insulating layer over a surface defining the through hole and a first portion of the device layer positioned around the through hole; forming a seed layer over a second portion of the device layer, the insulating layer, and the exposed portion of the substrate layer; forming a mold over a portion of the insulating layer, the mold surrounding the through hole; forming a first electrically conductive portion over the seed layer outside the mold and a second electrically conductive portion over the seed layer inside the mold; removing the mold to produce a cavity; removing the seed layer from surfaces defining the cavity; and filling the cavity with an insulating material.

35. A method as in any of claims 33 or 34, further comprising epitaxially growing the device layer on the substrate layer.

36. A method as in any of claims 33-35, further comprising providing the device layer disposed on the substrate layer.

37. A method as in any of claims 33-36, wherein forming a through hole through the device layer comprises etching the device layer.

38. A method as in any of claims 33-37, wherein forming an insulating layer over a surface of the device layer comprises photolithographically patterning the insulating layer.

39. A method as in any of claims 33-38, wherein forming an insulating layer over a surface of the device layer comprises forming the insulating layer over the surface of the device layer using inkjet printing.

40. A method as in any of claims 33-39, wherein forming an insulating layer over a surface of the device layer comprises forming the insulating layer over the surface of the device layer using soft lithography.

41. A method as in any of claims 33-40, wherein forming an insulating layer over a surface of the device layer comprises forming the insulating layer over the surface of the device layer using nanoimprint lithography.

42. A method as in any of claims 33-41, further comprising forming a seed layer over a portion of the device layer, the insulating layer, and the exposed portion of the substrate layer.

43. A method as in claim 42, wherein forming the seed layer comprises performing electron beam physical vapor deposition to deposit the seed layer.

44. A method as in any one of claims 42 or 43, wherein forming the seed layer comprises performing atomic layer deposition to deposit the seed layer.

45. A method as in any one of claims 42-44, wherein forming the seed layer comprises performing thermal evaporation to deposit the seed layer.

46. A method as in any one of claims 42-45, wherein forming the seed layer comprises performing sputtering to deposit the seed layer.

47. A method as in any one of claims 42-46, wherein forming the seed layer comprises performing electroless plating to deposit the seed layer.

48. A method as in any one of claims 42-47, wherein forming the seed layer comprises performing atomic layer deposition to deposit the seed layer.

49. A method as in any one of claims 42-48, wherein forming a mold over a portion of the insulating layer comprises photolithographically patterning the mold.

50. A method as in any one of claims 42-49, wherein forming a mold over a portion of the insulating layer comprises using soft lithography.

51. A method as in any one of claims 42-50, wherein forming a mold over a portion of the insulating layer comprises using nanoimprint lithography.

52. A method as in any one of claims 42-51, wherein forming a first electrically conductive portion over the device layer outside the mold and a second electrically conductive portion inside the mold and partially within the through hole comprises electroplating the first and second electrically conductive portions onto the seed layer.

53. A method as in any one of claims 42-52, wherein removing the mold comprises dissolving the mold.

54. A method as in any one of claims 42-53, further comprising adhering a wafer to the first electrically conductive portion.

55. A method as in claim 54, further comprising removing the wafer from the first electrically conductive portion.

56. A method as in any one of claims 42-55, further comprising etching a substrate layer from the device layer.

57. A method as in any one of claims 42-56, wherein the first electrically conductive portion is a first electrically conductive layer on a first surface of the device layer, further comprising forming a second electrically conductive layer on a second surface of the device layer, the second surface opposite the first layer, wherein the second electrically conductive layer contacts the second electrically conductive portion.

58. A method as in any one of claims 42-57, wherein the article is configured for use in thermophotovoltaic power generation.

59. A method as in any one of claims 42-58, wherein the article is configured for use in concentrator photovoltaic power generation.

60. A method as in any one of claims 42-59, wherein the article is configured for use as a photovoltaic laser power converter.

61. A method as in any one of claims 42-60, wherein the article is configured for use in photovoltaic power generation.

62. An article as in any one of claims 1-30, wherein one or more dimensions of a cross section of the elongated portion of the second electrically conductive layer remains substantially the same throughout a thickness of the article.

63. An article as in any one of claims 1-30, wherein one or more dimensions of a cross section the elongated portion of the second electrically conductive layer is non-uniform throughout a thickness of the article64. An article as in any one of claims 3-30 or 62-63, wherein the one or more device layers is flexible.

65. The article of claim 64, wherein the one or more device layers exhibits a flexibility such that, when the article is bent into a circular arc, the article canreach a radius of curvature of less than or equal to 10 cm without mechanical or electrical damage.

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