Solid-state memory, medium module, substrate assembly, solid-state drive, and storage system

Abstract

Disclosed are a solid-state memory, a medium module, a substrate assembly, a solid-state drive, and a storage system, which relate to the technical field of storage. In the solid-state memory, a controller module is detachably connected to the medium module, and when a connecting part in the controller module and a connecting part in the medium module are in a connected state, a controller can manage a storage medium in the medium module. When either the controller module or the medium module is damaged or fails, it is possible to only replace the damaged or failed module, and it is not necessary to replace the non-failed or non-damaged module, so that it is not necessary to replace the entire solid-state memory, and the replacement frequency is reduced, thereby facilitating a reduction in the usage cost of solid-state memories and also facilitating a reduction in the maintenance cost of hard drives including the solid-state memories.

Description

Solid-state memory, media modules, substrate components, solid-state drives and storage systems

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on March 21, 2024, with application number 202410335179.X and invention name “Solid-state memory, media module, substrate assembly, solid-state hard disk and storage system”. The entire contents of the application are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of storage technology, and in particular to a solid-state memory, a medium module, a substrate assembly, a solid-state hard disk, and a storage system. Background Art

[0003] With the advancement of storage media technology, the storage capacity of hard disks is increasing. A single hard disk included in a storage system contains a solid-state memory for storing data. The solid-state memory includes a controller and storage medium particles, which are welded to the solid-state memory. When any component in the solid-state memory is damaged or fails, the entire solid-state memory is replaced, and the data stored in the damaged or failed solid-state memory is restored based on the data stored in other solid-state memories in the storage system. However, the components of the solid-state memory other than the storage medium particles only account for 2% to 20% of the cost of the hard disk, but contribute to 80% of the failures of the solid-state memory, resulting in a high replacement frequency of the solid-state memory in the storage system. Summary of the Invention

[0004] The present application provides a solid-state memory, a media module, a substrate assembly, a solid-state hard disk, and a storage system. The controller module and the media module are configured as a detachable structure. When one of the controller module or the media module is damaged or fails, only the damaged or failed module can be replaced, and the intact or undamaged modules do not need to be replaced.

[0005] This application adopts the following technical solution.

[0006] In a first aspect, the present application provides a solid-state memory. The solid-state memory includes a controller module and a first medium module. The controller module includes a controller and a first connection portion electrically connected to the controller (hereinafter referred to as an electrical connection); the first medium module includes a first storage medium and a second connection portion electrically connected to the first storage medium, wherein the first connection portion and the second connection portion are detachably connected. When the first connection portion and the second connection portion are connected, the controller can manage the first storage medium.

[0007] In the first aspect of the present application, a controller and a first storage medium included in the solid-state memory are connected by a detachable connection portion, and when the first connection portion in the controller module and the second connection portion in the first medium module are in a connected state, the controller is able to manage the first storage medium. Therefore, when one of the controller module or the medium module is damaged or fails, only the damaged or failed module can be replaced, and the intact or undamaged module does not need to be replaced. The solid-state memory does not need to be replaced in its entirety, and the replacement frequency is reduced, which is beneficial to reducing the cost of using the solid-state memory and also beneficial to reducing the maintenance cost of the hard disk containing the solid-state memory.

[0008] For example, when the storage medium in the solid-state storage or other components in the media module are damaged, only the media module in the solid-state storage needs to be replaced, without replacing the controller module.

[0009] As another example, when the controller in the solid-state storage or other components in the controller module are damaged, only the controller module in the solid-state storage needs to be replaced, and there is no need to replace other media modules.

[0010] Optionally, the first connection portion is a female contact and the second connection portion is a male contact. Alternatively, the first connection portion is a male contact and the second connection portion is a female contact.

[0011] Exemplarily, the positive contact is an electrical connector with a protruding structure, and the negative contact is an electrical connector with a recessed structure.

[0012] In a feasible scenario, the aforementioned positive contact includes a plurality of pins arranged side by side, the female contact includes a plurality of slots arranged side by side, and one of the plurality of pins is detachably connected to one of the plurality of slots.

[0013] In the present application, the connection parts located in different modules are respectively made into structures with detachable functions, so that different modules can be detachably connected through the connection parts with detachable functions, avoiding the problem of high replacement frequency and high usage cost of solid-state memory caused by devices other than the storage medium in the solid-state memory.

[0014] Optionally, the aforementioned process of the controller managing the first storage medium may be implemented in the following manner.

[0015] In a first optional manner, the controller obtains the identifier of each die in the first storage medium, and establishes a data index of the first storage medium according to the identifiers of all the die in the first storage medium. The data index includes the identifier of each die and the address corresponding to the identifier.

[0016] In a second optional manner, if the controller receives a write request, the controller selects a first die from the first storage medium and controls an electrical signal of the first die according to the first data in the write request, so that the first die stores the electrical signal corresponding to the first data.

[0017] In a third optional method, if the controller receives a read request, the controller selects a second chip from the first storage medium according to the target address and data index in the read request, and determines the second data corresponding to the target address according to the electrical signal of the second chip, and the controller sends the second data.

[0018] Optionally, the solid-state memory provided in the present application further includes: a substrate having a first hole structure provided thereon, the first hole structure penetrating the substrate along a thickness direction of the substrate, and a projection of the first dielectric module and the first hole structure along the thickness direction of the substrate overlapping.

[0019] Illustratively, the space of the first hole structure along the thickness direction of the substrate is used to fully or partially accommodate the storage medium in the first medium module.

[0020] Optionally, the substrate is further provided with: a second hole structure arranged side by side with the first hole structure along the width direction of the substrate, the second hole structure penetrates the substrate along the thickness direction of the substrate; the projections of the first dielectric module and the second hole structure along the thickness direction of the substrate overlap.

[0021] In this application, a hollow design (i.e., a hole structure) is provided on the substrate in the solid-state memory so that the dielectric module can reuse the space in the thickness direction of the substrate to reduce the volume space occupied by the solid-state memory and increase the storage capacity per unit volume, which is conducive to reducing the size of the hard disk or storage device using the solid-state memory.

[0022] Optionally, the substrate includes a first slit and a first partition, wherein the first partition divides the first slit into a first aperture and a second aperture, and the first aperture and the second aperture are arranged along the width of the substrate. Exemplarily, the first aperture and the second aperture can be used to secure the dielectric module, enabling a more stable connection of the dielectric module to the controller module, thereby improving the reliability of the solid-state memory.

[0023] Optionally, the substrate further includes a second slit and a second partition, and the second partition divides the second slit into a third pore and a fourth pore, and the third pore and the fourth pore are arranged along the width direction of the substrate. Moreover, the first slit and the second slit are arranged side by side along the length direction of the substrate, and the first dielectric module is located between the first slit and the second slit. When the dielectric module and the controller module are in a connected state, the dielectric module is placed between the first slit and the second slit, and the first partition and the second partition provide support for the dielectric module, and the plurality of pores provide a locking structure in the dielectric module for fixing the position, so that the dielectric module can be fixed on the substrate more stably, avoiding the disconnection between the connection part of the dielectric module and the connection part of the controller module caused by the dielectric module falling off, which is beneficial to improving the reliability of the solid-state memory.

[0024] Optionally, the first storage medium includes an electrical connection plate and M layers × N stacked grains. The M layers × N stacked grains are electrically connected to the electrical connection plate via bonding wires and are disposed on a first surface of the electrical connection plate in the thickness direction. In this application, the grains are stacked on a single side of the electrical connection plate. This allows for a more convenient and efficient way to protect the grains in the dielectric module during use or storage, thereby increasing the number of effective grains in the dielectric module and extending the service life of the dielectric module.

[0025] For example, the individual dies in a single layer of M×N stacks are arranged in a straight line, which helps reduce the number of metal wires required to connect the dies to the electrical connection board, thereby reducing the cost of the dielectric module.

[0026] As another example, the grains in the aforementioned first storage medium are flash memory particles, dynamic random access memory (DRAM) particles, non-volatile magnetic random access memory (MRAM) particles, resistive random access memory (RRAM) particles, ferroelectric random access memory (FeRAM) particles, high bandwidth memory (HBM) particles or phase change memory (PCM) particles, etc.

[0027] Optionally, the first connection portion is provided with X data channels, where X is a positive integer. The first storage medium includes M layers × N stacks of grains. One of the X data channels is electrically connected to one or more grains in the M layers × N stacks of grains. If the number of data channels (X) provided by the controller module is greater than or equal to the number of grains in the medium module, the controller can manage the data stored in the grains based on a one-to-one correspondence between data channels and grains, thereby avoiding waste of storage resources of the grains due to an insufficient number of data channels, which is conducive to improving resource utilization of the solid-state memory.

[0028] Optionally, the first storage medium includes an electrical connection plate and M layers × N stacked grains. The electrical connection plate includes a first surface along the thickness direction of the electrical connection plate and a second surface disposed opposite the first surface. The M layers × N stacked grains are electrically connected to the electrical connection plate via bonding wires, with some of the M layers × N stacked grains disposed on the first surface and others disposed on the second surface.

[0029] Optionally, the controller module further includes a third connection portion connected to the controller. The solid-state memory further includes: a second media module, including a second storage medium and a fourth connection portion electrically connected to the second storage medium, and the third connection portion and the fourth connection portion are detachably connected. When the third connection portion and the fourth connection portion are in a connected state, the controller is able to manage the second storage medium. In the present application, the solid-state memory may be provided with a plurality of media modules. In some cases, these plurality of media modules may have the same storage capacity or different storage capacities. In other cases, the stacking method of the grains in the storage media included in these plurality of media modules may be the same or different, so that media modules with different stacking methods can be connected to the controller module in a detachable manner, and a solid-state memory with a combination of multiple media modules can also be provided according to user needs.

[0030] Optionally, the solid-state memory provided by the present application further includes: a substrate. The first connecting portion is adjacent to the third connecting portion, and the first connecting portion is arranged on a first side along the width direction of the substrate, and the third connecting portion is arranged on a second side along the width direction of the substrate, and the first side and the second side are arranged opposite to each other. In the present application, adjacent connecting portions on the substrate are staggered so that the wires from the connecting portion to the pins of the controller can be arranged on both sides along the width direction of the substrate, avoiding the problem of failure of all dielectric modules in the solid-state memory due to damage to the wires on one side of the substrate, which is beneficial to improving the reliability of the solid-state memory.

[0031] In a second aspect, the present application provides a media module. The media module includes a storage medium and a second connector. The second connector is electrically connected to the storage medium and configured to provide a chip select channel and data transmission functions for the storage medium. The second connector is also configured to be removably connected to a controller module.

[0032] In the present application, the media module includes a storage medium and a second connection portion. The chip selection function and data transmission function provided by the second connection portion enable the controller to effectively manage different grains in the storage medium, which is beneficial to improving the utilization rate of storage resources in the media module. Moreover, since the second connection portion in the media module can also be used for detachable connection with the controller module, this enables the controller to manage the first storage medium when the first connection portion in the controller module and the second connection portion in the first media module are in a connected state. For example, in the event that the storage medium in the solid-state memory or other components in the media module are damaged, only the media module in the solid-state memory needs to be replaced, without replacing the controller module.

[0033] Optionally, the storage medium includes a plurality of dies, and each dies corresponds to a chip selection channel.

[0034] Exemplarily, if the medium module receives a write enable signal of a first chip select channel, it outputs an electrical signal of a first die according to the write enable signal, where the first die is a die corresponding to the first chip select channel among the plurality of die.

[0035] As another example, if the medium module receives a read enable signal of a second chip select channel, it outputs an electrical signal of a second die according to the read enable signal, and the second die is a die corresponding to the second chip select channel among the plurality of die.

[0036] Optionally, the storage medium includes an electrical connection board and M layers×N stacked dies, wherein the M layers×N stacked dies are electrically connected to the electrical connection board via bonding wires and are disposed on a first surface of the electrical connection board in a thickness direction.

[0037] Exemplarily, the grains in the storage medium are flash memory grains, DRAM grains, MRAM grains, RRAM grains, FeRAM grains, HBM grains or PCM grains, etc.

[0038] Optionally, the grains included in a single layer of grains in the M layers×N stack of grains are arranged in a straight line.

[0039] Optionally, the storage medium includes an electrical connection plate and M layers × N stacked grains. The electrical connection plate includes a first surface extending along the thickness of the electrical connection plate and a second surface disposed opposite the first surface. The M layers × N stacked grains are electrically connected to the electrical connection plate via bonding wires, with some of the M layers × N stacked grains disposed on the first surface and others disposed on the second surface.

[0040] Optionally, the second connecting portion is a male contact or a female contact.

[0041] Optionally, the second connecting portion includes a plurality of pins arranged side by side, and one of the plurality of pins is detachably connected to a slot in the controller module.

[0042] In a third aspect, the present application provides a substrate assembly. The substrate assembly includes a substrate, a first connection portion, and a third connection portion. The first connection portion is electrically connected to the substrate and disposed on a first side along the width of the substrate. The third connection portion is electrically connected to the substrate and disposed on a second side along the width of the substrate. When the first connection portion is connected to a media module, the substrate assembly is configured to issue a chip select signal to manage the storage medium in the media module.

[0043] Optionally, the first connection portion and the third connection portion are adjacent to each other, and the first side and the second side are arranged opposite to each other.

[0044] In the present application, adjacent connecting parts on the substrate are staggered so that the wires from the connecting parts to the pins of the controller can be arranged on both sides along the width direction of the substrate, avoiding the problem of failure of all dielectric modules in the solid-state memory due to damage to the wires on one side of the substrate, which is beneficial to improving the reliability of the solid-state memory.

[0045] Optionally, the substrate is provided with a first hole structure that extends through the substrate along its thickness. When the dielectric module is connected to the first connecting portion, the dielectric module and the first hole structure overlap along the thickness of the substrate. Exemplarily, the space provided by the first hole structure along the thickness of the substrate is used to fully or partially accommodate the storage medium in the dielectric module.

[0046] Optionally, the substrate is further provided with a second hole structure arranged side by side with the first hole structure along the width direction of the substrate, and the second hole structure penetrates the substrate along the thickness direction of the substrate;

[0047] When the dielectric module and the first connecting portion are in a connected state, projections of the dielectric module and the second hole structure along the thickness direction of the substrate overlap.

[0048] Optionally, the substrate includes a first slit and a first separator, wherein the first separator separates the first slit into a first pore and a second pore, and the first pore and the second pore are arranged along the width direction of the substrate.

[0049] Optionally, the substrate further includes a second slit and a second partition. The second partition divides the second slit into a third aperture and a fourth aperture, with the third aperture and the fourth aperture being arranged along the width of the substrate. The first slit and the second slit are arranged side by side along the length of the substrate. When the first connecting portion is connected to the dielectric module, the dielectric module is located between the first slit and the second slit.

[0050] Optionally, the first connecting portion is a male contact or a female contact.

[0051] Optionally, the first connecting portion includes a plurality of slots arranged side by side, and one of the plurality of slots is detachably connected to a pin in the dielectric module.

[0052] In a fourth aspect, the present application provides a solid-state drive. The solid-state drive comprises: one or more solid-state memories of the first aspect, and an input / output (IO) device. The IO device is electrically connected to the solid-state memory and is configured to transmit data signals.

[0053] In a fifth aspect, the present application provides a storage system comprising: a hard disk management device and the solid-state hard disk provided in the fourth aspect, wherein the hard disk management device is used to manage data stored in the solid-state hard disk.

[0054] In a sixth aspect, the present application provides a solid-state storage management method. This method is applied to the solid-state storage provided in the first aspect and includes: managing a controller module and a media module in the solid-state storage. When a media module fails, the damaged media module is replaced and the data in the new media module is rebuilt; when a controller module fails, the damaged controller module is replaced and the data index of the solid-state storage is rebuilt.

[0055] Regarding the beneficial effects of the technical solutions provided in aspects 3 to 6, reference may be made to the description of aspect 1 or any optional implementation of aspect 1, and no further description is given here. Based on the implementations provided in the above aspects, this application can also be further combined to provide more implementations. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] FIG1 is a schematic diagram of the structure of a data access system provided by this application;

[0057] FIG2 is a schematic structural diagram of a solid state drive provided by the present application;

[0058] FIG3 is a structural diagram of a solid-state memory provided by the present application;

[0059] FIG4 is a schematic structural diagram of the first connecting portion and the second connecting portion provided by the present application;

[0060] FIG5 is a first structural diagram of a first dielectric module provided by the present application;

[0061] FIG6A is a second structural diagram of the first dielectric module provided by the present application;

[0062] FIG6B is a third structural diagram of the first dielectric module provided by the present application;

[0063] FIG7 is a second structural diagram of a solid-state memory provided by the present application;

[0064] FIG8A is a structural schematic diagram 1 of a substrate assembly provided in the present application;

[0065] FIG8B is a second structural diagram of a substrate assembly provided in the present application;

[0066] FIG9 is a third structural diagram of a solid-state memory provided by the present application;

[0067] FIG10 is a schematic structural diagram of a storage system provided by the present application;

[0068] FIG11 is a flowchart diagram 1 of a solid-state memory management method provided by the present application;

[0069] FIG12 is a second flow chart of a solid-state memory management method provided in this application. DETAILED DESCRIPTION

[0070] The present application provides a solid-state memory, in which a controller module / module (component / module) and a media module are detachably connected. When the connecting part in the controller module and the connecting part in the media module are in a connected state, the controller can manage the storage medium in the media module.

[0071] In traditional solid-state storage devices (such as SSDs, TF cards, and SD cards), the control unit and the dielectric unit are fixed to the same motherboard and cannot be separated. However, the embodiments of the present application adopt a separate structure, with the control unit (control module) and the dielectric unit (media module) being detachably connected. The control unit focuses on control, while the dielectric unit focuses on providing storage space. It does not have any control chip and is composed only of dielectric particles (such as Nand flash grains) and electrical components (such as resistors, capacitors, and switches).

[0072] The control module accesses the media module through protocols such as ONFI and Toggle protocol, and the control module accesses the media module through chip select signals.

[0073] In this way, when one of the controller module or the media module is damaged or fails, only the damaged or failed module can be replaced, and the intact or undamaged module does not need to be replaced. The solid-state memory does not need to be replaced in its entirety, and the replacement frequency is reduced, which helps reduce the cost of using the solid-state memory and the maintenance cost of the hard disk containing the solid-state memory. The detachable separation structure can also bring many benefits. For example, when storage or transportation is required, the two can be separated, which is more flexible. In addition, if the controller module is upgraded, the new controller module can be used in conjunction with the old media module, thereby saving overall costs and avoiding the expenses of purchasing new media modules. Similarly, the old controller module can also be used in conjunction with the new media module. Furthermore, when the controller module is combined with media modules of different capacities, different reliability or different performance, different solid-state memories can be obtained, thereby achieving customization of solid-state memories to meet the needs of different customers.

[0074] The technical solutions involved in this application may be applied not only to current solid-state memories or solid-state hard drives, but also to future solid-state memories or solid-state hard drives, or storage systems including solid-state memories or solid-state hard drives. The terms used in the implementation methods of this application are only used to explain the specific embodiments of this application and are not intended to limit this application. The following is a brief introduction to some concepts that may be involved in this application.

[0075] Storage medium: A storage material for recording sound, images, digital or other signals. The storage material may include but is not limited to: cache particles, flash memory chips (flash memory particles) or others, such as flash memory chips may include: XL-LAND, single-level cell (SLC), double-level cell (MLC), trinary-level cell (TLC), quad-level cell (QLC), enterprise multi-level cell (eMLC) or others. In the embodiment of the present application, the storage medium refers to the use of grains (Die) of different specifications as an example for explanation, which will not be repeated later. The storage material can also be, for example: DRAM medium, MRAM medium, RRAM medium, FeRAM medium, HBM medium or PCM medium.

[0076] Solid-state memory: Unlike disks and optical disks, solid-state memory does not require a read / write head or the movement (rotation) of the storage medium to read and write data. Solid-state memory stores data by switching transistors within the memory chip. Because it lacks a read / write head and does not require movement, solid-state memory offers advantages such as low power consumption and strong shock resistance.

[0077] In some alternative cases, solid-state memory is also called a palm.

[0078] In order to make the description of the following embodiments clear and concise, the solid-state memory, hard disk, storage system, etc. provided by this application are described below with reference to the accompanying drawings.

[0079] Figure 1 is a schematic diagram of the structure of a data access system provided by this application. The data access system includes: a data access device 100 and a storage device 120. In the application scenario shown in Figure 1, users access data through applications. The computers running these applications can be referred to as "computing devices."

[0080] The data access device 100 can be a physical machine, a virtual machine, or a container. The physical machine can include, but is not limited to, one or both of a user terminal and a smart network card (smart NIC). For example, the data access device 100 includes a user terminal. The user terminal can refer to a client, such as a host, a desktop computer, a server, a laptop computer, a mobile device, and the like. For another example, the data access device 100 includes a smart network card (smart NIC). The smart network card, also known as an intelligent network adapter, not only performs the network transmission functions of a standard network card, but also provides a built-in programmable and configurable hardware acceleration engine to improve application performance and significantly reduce the CPU consumption of the host connected to the smart network card in communication, providing more CPU resources for the application. For example, in a highly virtualized environment, the CPU in the host needs to run tasks related to the open virtual switch (OVS). At the same time, the CPU in the host also needs to handle storage, online encryption and decryption of data packets or offline encryption and decryption, deep inspection of data packets, firewalls, complex routing, and other operations. These operations not only consume a large amount of CPU resources, but also due to the competition for CPU resources between different services, the performance of the service cannot be optimized. Smart NICs serve as a hub connecting various services and accelerate the above services on the Smart NICs.

[0081] In a possible example, the data access device 100 accesses the storage device 120 through a network to access data. For example, the network may include a switch 110 .

[0082] In another possible example, the data access device 100 may also communicate with the storage device 120 through a wired connection, such as a universal serial bus (USB) or a peripheral component interconnect express (PCIe) bus.

[0083] The storage device 120 shown in Figure 1 can be a centralized storage system. A centralized storage system is characterized by a unified entry point through which all data from external devices must pass. This entry point is the centralized storage system's engine 121. Engine 121 has management functions and implements many of the storage system's advanced features.

[0084] As shown in Figure 1 , engine 121 may include one or more controllers. Figure 1 illustrates an example in which engine 121 includes a single controller. In one possible example, if engine 121 includes multiple controllers, any two controllers may have a mirroring channel, enabling mutual backup of the two controllers, thereby preventing hardware failures from causing unavailability of the entire storage device 120. It should be understood that if engine 121 includes multiple controllers, engine 121 may also be referred to as the array controller of storage device 120.

[0085] The engine 121 further includes a front-end interface 1211 and a back-end interface 1214. The front-end interface 1211 is used to communicate with the data access device 100, thereby providing data access services for the data access device 100. The back-end interface 1214 is used to communicate with the hard disk to expand the capacity of the storage device 120. Through the back-end interface 1214, the engine 121 can connect to more hard disks, thereby forming a very large storage resource pool.

[0086] In terms of hardware, as shown in FIG1 , the controller includes at least a processor 1212 and a memory 1213. The processor 1212 is a central processing unit (CPU) that is used to process data access requests from outside the storage device 120 (servers or other storage systems), and is also used to process requests generated within the storage device 120. Exemplarily, when the processor 1212 receives write data requests sent by the data access device 100 through the front-end interface 1211, it temporarily stores the data in these write data requests in the memory 1213. When the total amount of data in the memory 1213 reaches a certain threshold, the processor 1212 sends the data stored in the memory 1213 to at least one of the mechanical hard disk 1221, the solid state drive (SSD) 1222, the solid state drive 1223, or the other hard disk 1224 through the back-end port for persistent storage.

[0087] Memory 1213 refers to an internal memory that directly exchanges data with the processor. It can read and write data at any time and at a high speed, and serves as a temporary data storage for the operating system or other running programs. Memory includes at least two types of memory. For example, memory can be either random access memory or read-only memory (ROM). For example, random access memory is DRAM or SCM. DRAM is a semiconductor memory that, like most random access memories (RAM), is a volatile memory device. However, DRAM and SCM are only exemplary in this embodiment. Memory can also include other random access memories, such as static random access memory (SRAM). As for read-only memory, for example, it can be programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), etc. In addition, memory 1213 can also be a dual in-line memory module or a dual in-line memory module (DIMM), that is, a module composed of dynamic random access memory (DRAM), or an SSD. In actual applications, the controller can be configured with multiple memories 1213, as well as memories of different types. This embodiment does not limit the number and type of memory 1213. In addition, memory 1213 can be configured to have a power-saving function. The power-saving function means that when the system loses power and then powers on again, the data stored in memory 1213 will not be lost. Memory with a power-saving function is called non-volatile memory. Memory 1213 stores software programs, and processor 1212 executes the software programs in memory 1213 to manage the hard disk. For example, the hard disk can be abstracted into a storage resource pool, and the storage resource pool is provided to the server in the form of a logical unit number (LUN). The LUN here is actually the hard disk seen on the server. Of course, some centralized storage systems are also file servers, providing shared file services for servers.

[0088] As shown in Figure 1, in this system, the engine 121 may not have a hard drive slot. The hard drive must be placed in the hard drive enclosure 122, and the back-end interface 1214 communicates with the hard drive enclosure 122. The back-end interface 1214 exists in the form of an adapter card in the engine 121. Two or more back-end interfaces 1214 can be used simultaneously on one engine 121 to connect to multiple hard drive enclosures. Alternatively, the adapter card can be integrated into the motherboard, in which case the adapter card can communicate with the processor 1212 via the PCIe bus.

[0089] It should be noted that FIG1 only shows one engine 121 . However, in actual applications, the storage system may include two or more engines 121 , and redundancy or load balancing may be performed between the multiple engines 121 .

[0090] The hard disk enclosure 122 includes a control unit 1225 and several hard disks. The control unit 1225 can have various forms. In one case, the hard disk enclosure 122 is an intelligent disk enclosure, as shown in Figure 1. The control unit 1225 includes a CPU and memory. The CPU is used to perform operations such as address translation and reading and writing data. The memory is used to temporarily store data to be written to the hard disk or read from the hard disk to be sent to the controller. In another case, the control unit 1225 is a programmable electronic component, such as a data processing unit (DPU). The DPU has the versatility and programmability of a CPU, but is more specialized and can efficiently operate on network data packets, storage requests, or analysis requests. The DPU is distinguished from the CPU by its high degree of parallelism (it needs to process a large number of requests). Optionally, the DPU can be replaced with a processing chip such as a graphics processing unit (GPU) or an embedded neural network processing unit (NPU). Typically, the number of control units 1225 can be one, two, or more. The functions of the control unit 1225 can be offloaded to the network interface card 1226. In other words, in this embodiment, the hard disk frame 122 does not have a control unit 1225 inside, but the network card 1226 is used to complete data reading and writing, address conversion and other computing functions. In this case, the network card 1226 is an intelligent network card. It can include a CPU and memory. The CPU is used to perform operations such as address conversion and reading and writing data. The memory is used to temporarily store data to be written to the hard disk, or data read from the hard disk to be sent to the controller. It can also be a programmable electronic component, such as a DPU. There is no ownership relationship between the network card 1226 and the hard disk in the hard disk frame 122. The network card 1226 can access any hard disk in the hard disk frame 122 (such as the mechanical hard disk 1221, solid state drive 1222, solid state drive 1223 and other hard disks 1224 shown in Figure 1), so it is more convenient to expand the hard disk when storage space is insufficient.

[0091] According to the type of communication protocol between the engine 121 and the hard disk frame 122, the hard disk frame 122 may be a serial attached small computer system interface (SAS) hard disk frame, or it may be an NVMe (Non-Volatile Memory express) hard disk frame or other types of hard disk frames. The SAS hard disk frame adopts the SAS3.0 protocol, and each frame supports 25 SAS hard disks. The engine 121 is connected to the hard disk frame 122 through an onboard SAS interface or a SAS interface module. The NVMe hard disk frame is more like a complete computer system, and the NVMe hard disk is inserted into the NVMe hard disk frame. The NVMe hard disk frame is then connected to the engine 121 through the RDMA port. In some cases, the engine 121 can also be called a hard disk management device.

[0092] For example, the storage device 120 may refer to a storage array, such as an all-flash storage array in which all storage media are flash memories.

[0093] In an optional implementation, the storage device 120 is a centralized storage system with integrated disk and controller. The storage device 120 does not have the aforementioned disk enclosure 122. The engine 121 is used to manage multiple hard disks connected via the disk slots. The function of the disk slots can be implemented by the backend interface 1214.

[0094] It is worth noting that the above examples are merely possible implementations of the data access system provided in this embodiment and should not be construed as limiting the present application. For example, in the storage device 120 shown in FIG1 , data is stored in the form of files on each hard disk. The files stored on each hard disk constitute a file storage system, which may be, for example, a distributed file system. For example, a Network File System (NFS) is both a distributed file system and a network protocol used to access and share files between devices on the same local area network. For example, a NAS system can be implemented with NFS protocol support. The Network File System is a low-cost network file sharing option that enables users and applications to access, store, and update files on remote computers, just as with direct-attached storage. The Network File System uses the Remote Procedure Call protocol to route requests between clients and servers. While participating devices must support the Network File System, they do not need to understand the detailed network information. It is worth noting that remote procedure calls can be insecure, so the Network File System should only be deployed on trusted networks behind firewalls. Although Windows supports this protocol, it is primarily used in Linux environments.

[0095] With respect to the above-mentioned solid-state drive 1222 or solid-state drive 1223, an embodiment of the present application provides an optional example, as shown in FIG2 , which is a schematic diagram of the structure of a solid-state drive provided by the present application. The solid-state drive 220 can be used to implement the functions of the above-mentioned solid-state drive 1222 or solid-state drive 1223, and will not be described in detail here.

[0096] As shown in Figure 2, the host 210 can access data stored in the solid state drive 220. The specific implementation of the host 210 can be referred to the description of the data access device 100 in Figure 1, which will not be repeated here.

[0097] The solid-state drive 220 includes a controller module 221 , one or more media modules 222 , and an IO device 223 .

[0098] The IO device 223 is electrically connected to the controller module 221 for transmitting data signals. For example, the data signal is a signal sent by the host 210 to the solid-state drive 220, or the data signal is a signal sent by the solid-state drive 220 to the host 210. For example, the IO device 223 can be implemented through, but not limited to, the following interfaces: a USB interface, a Type-C interface, a serial advanced technology attachment (SATA) interface, a SATA Express (SATA E for short), an mSATA interface, etc.

[0099] The controller module 221 and the medium module 222 are designed to be detachably connected. The specific implementation of the controller module 221 and the medium module 222 can be referred to the description of Figures 3 to 8B below, and will not be repeated here.

[0100] Controller module 221 is used to manage the storage media in media module 222. For example, controller module 221 can be connected to a power supply or charging management module, thereby providing a cache function for host 210. Controller module 221 can also manage the data stored in the storage media in controller module 221. Exemplarily, controller module 221 includes a control unit or controller for managing solid-state storage. For example, this controller can be used to implement disk I / O, disk management, NAND management, error correction, compression, encryption, and other functions.

[0101] The storage medium in the medium module 222 is used to store data. Exemplarily, the medium module 222 includes a plurality of dies, which are fixedly connected to the electrical connection board in the medium module 222 in a certain stacking manner.

[0102] In some optional implementations, the memory including the controller module 221 and the media module 222 may also be referred to as a solid-state memory, and the solid-state memory may include one or more media modules.

[0103] 3 , which is a structural diagram of a solid-state memory provided by the present application. The solid-state memory 300 includes a first dielectric module 311 , a substrate 320 , and a controller module 330 .

[0104] The controller module 330 includes a controller 3301 and a first connection portion 3302 electrically connected to the controller 3301 .

[0105] The first medium module 311 includes a first storage medium 3111 and a second connection portion 3112 electrically connected to the first storage medium 3111 . The first connection portion 3302 and the second connection portion 3112 are detachably connected.

[0106] The controller 3301 is a programmable electronic component, such as a central processing unit (CPU) or a data processing unit (DPU). A DPU has the versatility and programmability of a CPU, but is more specialized and can efficiently process network packets, storage requests, or analytics requests. A DPU is distinguished from a CPU by its greater degree of parallelism (the ability to process a large number of requests).

[0107] When the first connection portion 3302 and the second connection portion 3112 are in a connected state, the controller 3301 can manage the first storage medium 3111 .

[0108] Optionally, the management functions of the controller 3301 on the first storage medium 3111 may include but are not limited to: power supply, chip selection, data transmission (or data access), clock control, address management, garbage collection and other functions.

[0109] Power supply refers to the controller 3301 providing power to the first storage medium 3111 through the bonding wires.

[0110] Chip selection means that the controller 3301 selects a chip from the chips included in the first storage medium 3111 to operate, and the controller 3301 writes data to the selected chip or reads data from the selected chip, thereby realizing the data transmission function.

[0111] Address management means: the controller 3301 obtains the identification of each grain in the first storage medium 3111, and establishes a data index of the first storage medium 3111 based on the identification of all grains in the first storage medium 3111. The data index includes the identification of each grain in the first storage medium and the address corresponding to the identification.

[0112] Data access includes writing data and reading data. The following is an illustrative description of the processes of writing data and reading data.

[0113] For example, taking data writing as an example, the process by which the controller 3301 manages the first storage medium 3111 includes: upon receiving a write request, the controller 3301 chip-selects a first die from the first storage medium 3111 and controls the electrical signal of the first die based on the first data in the write request, causing the first die to store the electrical signal corresponding to the first data. The controller chip-selects the first die by sending a write enable signal to the chip select channel corresponding to the first die.

[0114] For example, taking data reading as an example, the process of the controller 3301 managing the first storage medium 3111 includes: if the controller 3301 receives a read request, the controller 3301 selects a second die from the first storage medium 3111 based on the target address in the read request and the aforementioned data index, determines the second data corresponding to the target address based on the electrical signal of the second die, and sends the second data. The controller selects the second die by sending a read enable signal to the chip select channel corresponding to the second die.

[0115] The controller 3301 can also control the on and off of the switches of the crystal grains through clock signals to reduce the power consumption of the unused crystal grains in the first storage medium 3111, thereby reducing the power consumption of the controller module 330 and the solid-state memory 300, which is conducive to reducing the cost of using the solid-state memory. Moreover, when the hard disk uses the solid-state memory provided by this embodiment as a device for storing data, since the power consumption and cost of the solid-state memory are reduced, it is conducive to increasing the user's stickiness to the hard disk using the above-mentioned solid-state memory, thereby improving the user's experience of using the solid-state memory and hard disk provided by this embodiment.

[0116] Garbage collection refers to erasing redundant data in a storage medium and releasing the storage space occupied by this redundant data when the remaining storage capacity in the storage medium is insufficient. Exemplarily, the controller 3301 receives a garbage collection request and sends a data erase enable signal to a target grain in the first storage medium 3111 according to the address in the garbage collection request. The data erase enable signal can be used to set the target grain at a fixed level so that the content indicated by the electrical signal of the target grain is a null value or a 0 value, etc., to achieve the garbage collection function. In conventional technology, the process of a host accessing a solid-state memory 300 includes: the host generates a data access request that complies with a storage protocol standard or a communication standard, and sends the data access request to the solid-state memory. The controller generates data from the electrical signal determined in the storage medium based on the signal conversion protocol of the solid-state memory.

[0117] Compared with the process of the host accessing the solid-state memory 300, in the solid-state memory 300, the process of the controller managing the storage medium includes: the data signal obtained by the controller from the storage medium is a single electrical signal, and the controller needs to judge the high and low levels of these electrical signals before generating digital signals and sending these digital signals.

[0118] That is to say, the process of the controller managing the storage medium is different from the process of the host accessing the solid-state memory in that: the data sent by the solid-state memory to the host complies with the storage protocol standard or communication standard, while the memory in the solid-state memory only obtains ordinary electrical signals from the storage medium, and the controller needs to identify the high and low levels of the electrical signals to obtain digital signals.

[0119] With respect to the first connection portion 3302 and the second connection portion 3112 described above, two optional implementations are provided below.

[0120] In a first alternative implementation, first connection portion 3302 is a male contact, and second connection portion 3112 is a female contact. In one embodiment, male contact 3302 is a gold finger. In one embodiment, male contact 3302 is connected to the die only by a wire, or by a wire and electrical components (e.g., resistors, capacitors, switches), but does not include devices with logic control functions (e.g., FPGAs, DSPs, ARM chips).

[0121] In a second optional implementation, the first connection portion 3302 is a female contact, and the second connection portion 3112 is a male contact.

[0122] In the embodiments of the present application, contacts are the core components of a connector that completes its electrical connection function. The connector includes a male contact and a female contact. When the male and female contacts form a contact pair, the electrical connection is achieved by mating the male and female contacts.

[0123] The positive contact is an electrical connector with a raised structure and is a rigid part. Exemplarily, the shape of the positive contact is cylindrical (such as a round pin), square cylindrical (such as a square pin), or flat (such as a blade). For example, the positive contact is made of brass or phosphor bronze. In some scenarios where higher stability is required, the positive contact can also be made of gold, silver, or other metals or conductive materials, which is not limited in this application.

[0124] The female contact is an electrical connector with a groove structure. The female contact, also known as a socket or slot, is a key component of the contact pair. Relying on an elastic structure, the female contact deforms elastically when mated with the pin, generating elastic force to form a close contact with the male contact, completing the connection. There are many different types of sockets, including cylindrical (e.g., split grooves, necking), tuning fork-shaped, cantilever beam-shaped (e.g., longitudinal slots), folded (e.g., longitudinal slots, figure-9 shapes), box-shaped (e.g., square sockets), hyperbolic wire spring sockets, and other slots or grooves.

[0125] As a feasible specific example, as shown in Figure 4, which is a schematic structural diagram of the first connection portion and the second connection portion provided by this application, the first connection portion 3302 includes a plurality of slots arranged side by side, and the second connection portion 3112 includes a plurality of pins arranged side by side, wherein one of the plurality of pins is detachably connected to one of the plurality of slots.

[0126] FIG4 is merely an optional example of the connector (first connection portion and second connection portion) provided in an embodiment of the present application and should not be construed as a limitation on the present application.

[0127] In some optional implementations, the first connection portion 3302 and the second connection portion 3112 may adopt any form of board-to-board connection.

[0128] Exemplarily, the connector formed by the first connection portion 3302 and the second connection portion 3112 is an M.2 connector.

[0129] As another example, the connector formed by the first connection portion 3302 and the second connection portion 3112 is an FPC connector.

[0130] The above examples are merely optional methods provided in this embodiment and should not be construed as limiting the present application. In other optional implementations, the first connection portion 3302 and the second connection portion 3112 can also be connected using a convenient board-to-board welding method. When the first dielectric module 311 and the controller module 330 need to be disassembled, the first connection portion 3302 and the second connection portion 3112 can be unsoldered, thereby changing the first connection portion 3302 and the second connection portion 3112 from a connected state to a disconnected state, placing the first dielectric module 311 and the controller module 330 in a disassembled state, and replacing the damaged module.

[0131] In the embodiment of the present application, the connection parts located in different modules are respectively made into structures with detachable functions, so that different modules can be detachably connected through the connection parts with detachable functions, thereby avoiding the problem of high replacement frequency and high usage cost of solid-state memory caused by devices other than the storage medium in the solid-state memory.

[0132] Regarding the first dielectric module 311 described above, a feasible example is provided below in conjunction with the accompanying drawings, as shown in Figure 5 , which is a first structural schematic diagram of the first dielectric module provided by this application. As shown in Figure 5 , the second connection portion 3112 in the first dielectric module 311 is an M.2 connector. For example, the M.2 connector is the contact end shown in Figure 5 , which includes not only a male contact but also a slot 1 for securing it.

[0133] It is worth noting that Figure 5 shows a slot 1 in the contact end, but the contact end may also include a larger number of slots for fixing, or the contact end does not have a slot for fixing, but the first connecting part 3302 in the controller module 330 provides a snap-on assembly for fixing, etc. This application is not limited to this.

[0134] 5 , the aforementioned first storage medium 3111 includes an electrical connection board 3111 a and M layers×N stacks of dies.

[0135] The electrical connection plate 3111a includes one end close to the second connection portion 3112 and the other end away from the second connection portion 3112.

[0136] (Fixed end). The end of the electrical connection plate 3111a closest to the second connection portion 3112 is connected to the second connection portion 3112 (e.g., a detachable connection or an integrated structure), and the other end of the electrical connection plate 3111a (the fixed end) farther from the second connection portion 3112 includes a slot 2 for fixation. In FIG5 , slot 2 is positioned slightly to the left of the center of the fixed end, but slot 2 may also be positioned in the middle of the fixed end or at other locations, and this application is not limited thereto.

[0137] For example, the electrical connection plate 3111a may refer to a pad on a printed circuit board (PCB), a fixed plate or plate capable of achieving electrical connection, or a component of other shapes with electrical connection function, which is not limited in this application.

[0138] In the example shown in FIG5 , the length of the second connection portion 3112 along the length direction of the first dielectric module 311 is approximately 4 mm, the distance between the die and the second connection portion 3112 is greater than 0.7 mm, and the distance between the die and the edge of the fixed end slot 2 near the second connection portion 3112 is greater than 0.7 mm. It is worth noting that the dimensions shown in FIG5 are merely examples provided in this embodiment and should not be construed as limiting the present application. Depending on the differences in the die and electrical connection board, as well as the precision required by the solid-state memory, the aforementioned dimensions may be adjusted, and this application does not impose any limitations thereon.

[0139] In the first storage medium 3111 provided in this embodiment, M layers × N stacked grains are electrically connected to the electrical connection board 3111a through bonding wires. Among them, the bonding wires are parts that connect the pins and the silicon wafer and transmit electrical signals. For example, the bonding wires can be divided into bonding gold wires and bonding silver wires according to the material. Bonding gold wire is an inner lead material with excellent electrical, thermal conductivity, mechanical properties and excellent chemical stability. It is mainly used as a key packaging material for semiconductors (bonding gold wires, frames, plastic packaging materials, solder balls, high-density packaging substrates, conductive adhesives, etc.). Bonding silver wires and bonding gold wires have similar performance, but are lower in price. The bonding wires proposed in the embodiments of the present application may also refer to materials of other materials that transmit electrical signals, and this application is not limited to this.

[0140] In this embodiment, the die and the electrical connection plate 3111a are electrically connected via bonding wires, which is also called wire bonding. The wire bonding method is briefly described below. Wire bonding is a method of connecting metal wires to pads (such as the electrical connection plate mentioned above), that is, a technology for connecting internal and external chips (such as the die mentioned above). Structurally, the metal wires act as a bridge between the chip pads (primary bonding) and the carrier pads (secondary bonding). The wire bonding that connects two independent pads varies greatly in terms of wire material, bonding conditions, bonding position (in addition to connecting the chip and substrate, it also connects two chips, or two substrates), etc.

[0141] Wire bonding can be performed using three methods: thermocompression, ultrasonic, and thermosonic. Thermocompression heats and compresses the pad and capillary (a tool that moves a metal wire like a capillary) to create a bond. Ultrasonic bonding uses ultrasonic waves applied to the capillary without heating. Thermosonic bonding combines both heating and ultrasonic waves.

[0142] It is worth noting that the die and the electrical connection plate 3111a may be electrically connected to each other by other methods other than wire bonding, such as flip chip bonding, etc., which is not limited in this application.

[0143] The following, in conjunction with Figures 6A and 6B , illustrates an exemplary stacking method of M layers × N stacks of die on the electrical connection plate 3111a provided herein. Figure 6A is a second structural schematic diagram of the first dielectric module provided herein. The electrical connection plate 3111a in the first storage medium 3111 includes a first surface extending along the thickness direction of the electrical connection plate 3111a and a second surface disposed opposite the first surface.

[0144] In a first possible scenario, M layers×N stacks of crystal grains are electrically connected to the electrical connection plate 3111 a through bonding wires and are disposed on a first surface in a thickness direction of the electrical connection plate 3111 a .

[0145] Exemplarily, the die included in the single-layer of M-layer × N-layer stacks of grains are arranged in a straight line. As shown in FIG6A , each die is arranged on the first surface of the electrical connection plate 3111a through a fixing portion, and the die included in the single-layer of grains are arranged in a straight line. Since the die included in the single-layer of grains are arranged in a straight line, the bonding wires connecting the die can be passed along the straight line, which is beneficial to reducing the amount of bonding wires used in the dielectric module, thereby reducing the cost of the dielectric module. In other words, the number of data channels (X) provided by the controller module is greater than or equal to the number of grains in the dielectric module, so that the controller can manage the data stored in the grains based on the one-to-one correspondence between the data channels and the grains, avoiding the waste of storage resources of the grains due to insufficient number of data channels, which is beneficial to improving the resource utilization of the solid-state memory.

[0146] In this embodiment, the grains are stacked on a single side of the electrical connection plate. During the use or storage of the dielectric module, a more convenient and efficient method can be used to protect the grains in the dielectric module, thereby increasing the number of effective grains in the dielectric module and improving the service life of the dielectric module.

[0147] In the second possible scenario, the M layers × N stacks of dies are electrically connected to the electrical connection plate 3111a via bonding wires, and some of the dies in the M layers × N stacks are disposed on the first surface, while others are disposed on the second surface. The stacking of these dies on the first and second surfaces can be arranged in a straight line, as shown in FIG6A , or in other ways, such as a Z-shaped arrangement or other arrangements, which are not limited in this application.

[0148] Compared with the first possible scenario, in the second possible scenario, multiple grains can be stacked in more areas of the electrical connection board, thereby increasing the number of grains that can be accommodated in a unit volume of storage medium. Since the storage capacity that can be provided by a single grain is fixed, when the number of grains that can be accommodated in a unit volume of storage medium increases, the storage capacity that can be provided by a unit volume of storage medium increases.

[0149] The two possible situations for the die on the electrical connection board are merely examples provided in this embodiment and should not be construed as limitations on this application. In some optional implementations, the die stacking method in the dielectric module may also be adopted in other ways, which is not limited by this application. For example, if the electrical connection board is an M.2 baseboard, based on the standard M.2 connection interface, a single side of the M.2 baseboard is the die placement area. Different stack numbers N and different layer numbers M can be placed according to requirements. The total number of dies (die) in a single dielectric module is M layers × N stacks.

[0150] As shown in FIG6B , FIG6B is a third structural schematic diagram of the first dielectric module provided in this application. The difference between FIG6B and FIG6A is that the stacked die in FIG6A are arranged in a 2×4 pattern, while the stacked die in FIG6B are arranged in a 2×2 pattern. It should be understood that due to the different arrangements of the stacked die in FIG6A and FIG6B , the dimensions of the dielectric module may also differ.

[0151] As an optional implementation, the first connection portion is provided with X data channels, where X is a positive integer, M refers to the number of layers of crystal grains in the dielectric module, and N refers to the number of stacks of crystal grains in the dielectric module.

[0152] In an optional example, one of the X data channels is electrically connected to one of the M layers×N stacks of dies.

[0153] In another optional example, one of the X data channels is electrically connected to multiple dies in the M layers×N stacks of dies.

[0154] The above two optional examples are only illustrative of the relationship between the die and the data channel provided in this embodiment and should not be understood as limiting the present application. Other connection relationships between the die and the data channel can also be used. For example, there are two data channels on a connector, and each data channel can have 4x4=16, 4x8=32, or 8x8=64 dies, all of which can be supported by the media module provided in this application. In other words, a single data channel can support the controller's access to or management of multiple dies, and this application does not limit this.

[0155] In some possible cases, the data channel is also called a signal channel, an installation channel, or other names, which are not limited in this application. In some optional embodiments, the number of connectors (L) in the controller module and the number of data channels (X) provided by the controller are in a multiple relationship (Q), where X = L × Q.

[0156] In some optional embodiments, when the number of data channels provided by the controller module 330 is insufficient, a multiplexer (MUX) can be used to expand the number of data channels, as shown in FIG7 , which is a second structural diagram of a solid-state memory provided by the present application. In FIG7 , the controller 3301 in the controller module 330 uses the MUX to expand one data channel into two data channels. The two expanded data channels are used to connect different media modules, such as the first media module 311 and the second media module 312.

[0157] In the solid-state memory 300 shown in FIG. 7 , a one-input, two-output MUX (MUX_1-2) in the controller module 330 expands one data channel provided by the controller 3301 into two data channels.

[0158] The M.2 connector shown in Figure 7 is the aforementioned second connection portion 3312. This M.2 connector connects the two expanded data channels to different media modules, such as the first media module 311 and the second media module 312 in Figure 7. In this embodiment, the connection between the pins of the controller 3301 and the pins of the M.2 connector can be point-to-point (P2P) without any signal branching in between.

[0159] In FIG. 7 , the M.2 connector in the controller module 330 is electrically connected to the storage medium in the medium module using wire bonding (WB).

[0160] Regarding the storage medium in the medium module, the arrangement and stacking of the dies in the storage medium can refer to the relevant contents described in FIG. 6A and FIG. 6B , and will not be described in detail here.

[0161] It is worth noting that FIG7 is only an example of a data channel expansion method provided in an embodiment of the present application and should not be understood as limiting the present application. In some optional implementations, data channel expansion can also be implemented using hardware devices other than MUXs, such as 38 decoders or other hardware devices with channel expansion capabilities.

[0162] In this embodiment, a MUX or other hardware devices are used to expand the number of data channels provided by the controller, which is beneficial to increasing the number of dies that can be managed by a single controller, thereby increasing the effective storage capacity of a single solid-state memory.

[0163] For the medium module provided in the embodiment of the present application, the storage medium in the medium module includes multiple grains, and each grain corresponds to a chip selection channel.

[0164] In the process of the controller managing the storage medium, two scenarios of writing data and reading data are used as examples below.

[0165] When the controller needs to write data, if the media module receives a write enable signal from the first chip select channel, the media module outputs an electrical signal of a first die according to the write enable signal. The first die is a die corresponding to the first chip select channel among the plurality of die included in the storage medium.

[0166] When the controller needs to read data, if the media module receives a read enable signal of the second chip select channel, the media module outputs an electrical signal of a second die corresponding to the second chip select channel according to the read enable signal.

[0167] In one case, the first die and the second die are different die.

[0168] In another case, the first die and the second die are the same die.

[0169] The above data writing and reading situations are only the processing methods provided by the medium module provided in this embodiment when receiving the enable signal. The medium module can only output electrical signals, and the controller in the solid-state memory recognizes the electrical signals output by the medium module and generates corresponding digital signals, such as 0 or 1.

[0170] As an optional implementation, the grains in the storage medium provided in the embodiments of the present application are all flash memory particles. The flash memory particles may also be referred to as flash memory chips, and the flash memory particles may include but are not limited to the following types: single-level cell (SLC), double-level cell (MLC), triple-level cell (TLC), quad-level cell (QLC), enterprise multi-level cell (eMLC), or others. Depending on the technological development of solid-state memory or the continuous advancement of flash memory particles, the grains described in the embodiments of the present application may also use other storage particles.

[0171] As another optional implementation method, the grains in the storage medium provided in the embodiment of the present application may also be other types of storage particles, which may include but are not limited to one or more of the following: DRAM particles, MRAM particles, RRAM particles, FeRAM particles, HBM particles or PCM particles.

[0172] The substrate 320 in the solid-state memory 300 is exemplarily described below with reference to the accompanying drawings.

[0173] As shown in FIG8A , FIG8A is a structural schematic diagram of a substrate assembly provided in the present application. The substrate assembly 800 includes a substrate 810 , a first connecting portion 821 , and a third connecting portion 823 .

[0174] Optionally, the substrate assembly in Figure 8A also includes a fifth connection portion 825 and a sixth connection portion 826, and the connection portions in the substrate assembly 800 are staggered and adjacent connection portions are arranged opposite to each other, such as the first connection portion 821 and the third connection portion 823 are adjacent, and the first connection portion 821 and the third connection portion 823 are arranged opposite to each other, and the fifth connection portion 825 and the third connection portion 823 are adjacent, and the fifth connection portion 825 and the third connection portion 823 are arranged opposite to each other, and the fifth connection portion 825 and the sixth connection portion 826 are adjacent, and the fifth connection portion 825 and the sixth connection portion 826 are arranged opposite to each other.

[0175] The relative positions of the first connection part 821 and the third connection part 823 are described in detail below in conjunction with Figure 8A: the first connection part 821 is adjacent to the third connection part 823, and the first connection part 821 is arranged on the first side along the width direction of the substrate 810, and the third connection part 823 is arranged on the second side along the width direction of the substrate 810, and the first side and the second side are arranged opposite to each other.

[0176] In conjunction with the aforementioned embodiment of the media module, the substrate assembly 800 can be used to issue a chip select signal to manage the storage medium in the media module when the first connection portion 821 is connected to the media module. The chip select signal may include, but is not limited to, a write enable signal, a read enable signal, a clock signal, or other signals.

[0177] Of course, the substrate assembly 800 needs to implement the management function of the storage medium, and the substrate assembly 800 may include other devices such as a controller. The other devices shown in the black figure in Figure 8A may include but are not limited to: memory, GPU or acceleration card, etc. Taking the other devices including memory as an example, when the substrate assembly 810 in the solid-state memory receives a write data request, the controller temporarily stores the write data request in the memory, and determines the flash memory particle to be written based on the data to be written in the write data request. The controller then calls the chip select channel corresponding to the flash memory particle in the storage medium, and changes the electrical signal state of the flash memory particle through the chip select channel to implement the function of writing the data to be written to the flash memory particle. Finally, the controller sends a response message indicating that the write data request has been executed.

[0178] It is worth noting that the above-mentioned connection parts are only examples provided in this embodiment and should not be understood as limiting the present application. In some optional embodiments, the substrate assembly may further include more or fewer connection parts, which is not limited in this application.

[0179] In an embodiment of the present application, adjacent connecting portions on the substrate are staggered so that the wires from the connecting portions to the pins of the controller can be arranged on both sides along the width direction of the substrate, thereby avoiding the problem of failure of all dielectric modules in the solid-state memory due to damage to the wires on one side of the substrate, which is beneficial to improving the reliability of the solid-state memory.

[0180] To improve the space utilization of solid-state storage, an optional implementation is provided based on FIG. 8A , as shown in FIG. 8B , which is a second structural schematic diagram of a substrate assembly provided in this application. In FIG. 8B , substrate 810 is provided with a first hole structure 831, which extends through substrate 810 along its thickness. When the dielectric module is connected to the sixth connecting portion, the dielectric module and the first hole structure 831 overlap along the thickness of substrate 810.

[0181] Optionally, the substrate 810 is further provided with a second hole structure 832, which penetrates the substrate 810 along the thickness direction of the substrate 810. When the dielectric module is connected to the sixth connecting portion, the dielectric module and the second hole structure 832 overlap in their projections along the thickness direction of the substrate 810.

[0182] The first hole structure 831 and the second hole structure 832 are arranged side by side along the width direction of the substrate 810 .

[0183] In some cases, the first hole structure 831 and the second hole structure 832 may be formed by dividing a hole structure by the third separator 813. For example, the third separator 813 may be a separate component independent of the substrate 810.

[0184] In other cases, the first hole structure 831 and the second hole structure 832 are formed by hollowing out the substrate 810. For example, the third separator 813 and the substrate 810 can be an integrated structure.

[0185] Optionally, the space of the hole structure along the thickness direction of the substrate can be used to fully or partially accommodate the storage medium in the medium module.

[0186] In one possible example, the dielectric module can be installed in a hole structure of the substrate 810, such as a portion of the die in the first dielectric module being located within the first hole structure. The first dielectric module is connected to the substrate assembly 800 via the sixth connection portion 826. Alternatively, the dielectric module can be connected by providing a fixing slot in the dielectric module and inserting a screw through the slot and securing it with a nut in the substrate 810, although this application is not limited thereto.

[0187] In some optional embodiments, the first dielectric module may also be connected to the hole structure using a snap-fit ​​assembly.

[0188] In an embodiment of the present application, a substrate in the solid-state memory is provided with a hollow design (i.e., a hole structure) so that the dielectric module can reuse the space in the thickness direction of the substrate to reduce the volume space occupied by the solid-state memory and increase the storage capacity per unit volume, which is conducive to reducing the size of the hard disk or storage device using the solid-state memory.

[0189] To improve the stability between the media module and the controller module in the solid-state memory and to ensure that the media module can be stably fixed to the substrate assembly, the present application also provides an optional implementation method: Continuing with FIG8A , the substrate 810 includes a first slit 801 and a first partition 811. The first partition 811 separates the first slit 801 into a first pore and a second pore. The first pore and the second pore are arranged along the width direction of the substrate 810.

[0190] It is worth noting that the first separator 811 can be detachably connected to the base plate 810, that is, the first separator 811 can be separated from the base plate 810. In another embodiment, the first separator 811 and the base plate 810 are an integrated structure.

[0191] In this embodiment, the first pore and the second pore can be used to fix the dielectric module, such as fixing the dielectric module on the substrate, so that the dielectric module can be more stably connected to the controller module, thereby improving the reliability of the solid-state memory.

[0192] In another optional implementation, the substrate 810 includes not only the first slit 801 and the first partition 811 described above, but also a second slit 802 and a second partition 812. The second partition 812 divides the second slit 802 into a third aperture and a fourth aperture. The third aperture and the fourth aperture are arranged along the width direction of the substrate 810.

[0193] Referring to FIG8A , first slit 801 and second slit 802 are arranged side by side along the length of substrate 810. When a dielectric module is connected to substrate assembly 810, such as the dielectric module shown in FIG5 , FIG6A , or FIG6B , the dielectric module is located between first slit 801 and second slit 802.

[0194] In this embodiment, the dielectric module is secured by the gaps between the two adjacent slits, further enhancing the stability of the dielectric module's connection to the controller module and improving the reliability of the solid-state memory. It is worth noting that the first slit 801 and the second slit 802 described above may be caused by the dielectric module not completely covering the hole structure. In this case, providing a snap assembly on the dielectric module to secure it to the gaps in the substrate assembly can further enhance the stability of the solid-state memory.

[0195] As can be seen from the substrate assembly shown in Figures 8A and 8B, the solid-state memory provided in this embodiment can be provided with multiple media modules. In some cases, these multiple media modules can have the same storage capacity or different storage capacities. In other cases, the stacking of the die in the storage media included in these multiple media modules can be the same or different, so that media modules with different stacking arrangements can be detachably connected to the controller module, allowing the solid-state memory to be configured with a variety of media module combinations according to user needs.

[0196] Depending on the form factor of the storage device, solid-state memory can be packaged in the form of a memory card, hard disk, or other type of storage device. For example, a memory card can be a PCIe card, an Operand Addressing Mode (OAM) card, or other card form factor. A hard disk can be a standard SSD (Solid State Drive) (SSD) (e.g., M.2, U.2, U.3, EDSFF, Palm, Half-Palm, etc.). A storage device can be a frame, a partial frame, or other form factors that do not conform to a standard disk form factor.

[0197] In conjunction with the solid-state memory device shown in FIG3 and the substrate assembly shown in FIG8A and FIG8B, the present application further provides a solid-state memory device, as shown in FIG9 , which is a third structural schematic diagram of a solid-state memory device provided by the present application. The solid-state memory device 300 further includes a second dielectric module 312. The second dielectric module 312 includes a second storage medium 3121 and a fourth connector 3122 electrically connected to the second storage medium 3121. The third connector 3303 is detachably connected to the fourth connector 3122. When the third connector 3303 is connected to the fourth connector 3122, the controller 3301 is capable of managing the second storage medium 3121.

[0198] Regarding the specific implementation of the second dielectric module, reference may be made to the description of the first dielectric module in the aforementioned embodiment. Regarding the detachable connection method between the third connecting part 3303 and the fourth connecting part 3122, reference may also be made to the description of the first connecting part and the second connecting part, which will not be repeated here.

[0199] It is worth noting that a solid-state storage device may include multiple media modules, and multiple solid-state storage devices may also be deployed in a single storage device or storage system, as shown in FIG10 , which is a schematic diagram of the structure of a storage system provided in this application. The storage system 900 includes a disk controller 910 and multiple solid-state storage devices, such as solid-state storage device 921 and solid-state storage device 922.

[0200] The disk controller 910 can be used to perform operations such as address translation and reading and writing data. For example, the disk controller 910 is a programmable electronic component, such as a data processing unit (DPU). The DPU has the versatility and programmability of a CPU, but is more specialized and can efficiently operate on network data packets, storage requests, or analysis requests. For more specific implementations of the disk controller 910, please refer to the description of the engine 121 in Figure 1 above, which will not be repeated here. In some cases, the disk controller 910 can also be called a hard disk management device.

[0201] Different modules in a solid-state memory are connected using a media module connector, which can be used to achieve detachable connections between different modules. The following briefly describes solid-state memory 921 as an example. Solid-state memory 921 includes: a controller module 9211, media module connectors 9212 to 9215, and media modules 1 to 4. Media module 1 is electrically connected to the data channel provided by controller module 9211 via media module connector 9212, media module 2 is electrically connected to the data channel provided by controller module 9211 via media module connector 9213, media module 3 is electrically connected to the data channel provided by controller module 9211 via media module connector 9214, and media module 4 is electrically connected to the data channel provided by controller module 9211 via media module connector 9215. For the specific implementation of the media module connector, please refer to the description of Figures 3 to 7 above. For the structure of each media module, please refer to the description of Figures 6A or 6B, and will not be repeated here.

[0202] The solid-state memory 922 includes a controller module 9221, a media module connector 9222 to a media module connector 9225, and media modules 5 to 8. The specific implementation of the solid-state memory 922 can be referred to the solid-state memory 921 and will not be described in detail here.

[0203] It is worth noting that Figure 10 is only an example of the storage system provided in this embodiment. The storage system can be a centralized storage system as shown in Figure 1. The solid-state memories can also be distributed in different geographical locations and uniformly managed by the disk controller. This application does not limit this.

[0204] Based on the hard disk, solid-state memory, media module, substrate assembly, and storage system provided in the above embodiments, the present application further provides a solid-state memory management method. Please refer to Figure 11, which is a flowchart of a solid-state memory management method provided in the present application. The solid-state memory can refer to any of the solid-state memories in the above embodiments. The solid-state memory management method provided in the present embodiment includes the following steps S1010 to S1063.

[0205] S1010 : The solid-state memory is initialized when powered on for the first time.

[0206] For example, the controller in the solid-state memory clears the data stored in the storage medium.

[0207] S1020: The controller sends a Die ID query command to each media module in the solid-state storage.

[0208] S1030: The controller receives the return information of each Die, such as the return information carrying the Die ID (Die ID).

[0209] S1040: The controller groups Die IDs according to data channels (channel, CH).

[0210] For example, the controller groups the dies in each media module according to multiple Die IDs, such as dividing the storage media (all dies) in all media modules into different storage areas.

[0211] S1050: The controller performs management based on the data channel (CH).

[0212] For example, the controller manages metadata, Raid, etc. in each media module based on the data channel (CH), such as deletion, addition, or update.

[0213] S1060: Determine whether the medium module is invalid.

[0214] For example, failure may refer to damage to the dielectric module (such as failure to power on or die falling).

[0215] If the medium module is not invalid, the solid-state memory operates normally; if the medium module is invalid, execute S1061.

[0216] S1061. Remove the failed medium module.

[0217] S1062: Replace the media module, such as connecting the new media module to the controller module.

[0218] S1063: The controller rebuilds the data in the new media module.

[0219] For example, the controller uses data in other surviving media modules to restore data in the new media module.

[0220] Regarding the management method of the controller module in the solid-state memory, another possible implementation is provided based on Figure 11, as shown in Figure 12, which is a second flow chart of a solid-state memory management method provided by the present application. The solid-state memory management method provided in the embodiment of the present application includes the following S1010 to S1073.

[0221] Regarding the specific implementation of S1010 to S1050, please refer to the description of Figure 11 above, which will not be repeated here. Referring to Figure 12, the management method provided in this embodiment also includes the following S1070 to S1073.

[0222] S1070: Determine whether the controller module is invalid.

[0223] If the controller module is not failed, the solid-state memory operates normally; if the controller module is failed, execute S1071.

[0224] S1071. Remove the medium module.

[0225] S1072. Replace the controller module, such as connecting the surviving media module to the new controller module.

[0226] S1073: The controller in the new controller module rebuilds the data index. The process of rebuilding the data index can refer to the process from S1010 to S1050 above.

[0227] In this embodiment, when one of the controller modules or the media modules is damaged or fails, only the damaged or failed module can be replaced, and the non-failed or non-damaged module does not need to be replaced. The solid-state memory does not need to be replaced as a whole, and the replacement frequency is reduced, which is beneficial to reducing the use cost of the solid-state memory and also beneficial to reducing the maintenance cost of the hard disk containing the solid-state memory.

[0228] For example, when the storage medium in the solid-state storage or other components in the media module are damaged, only the media module in the solid-state storage needs to be replaced, without replacing the controller module.

[0229] As another example, when the controller in the solid-state storage or other components in the controller module are damaged, only the controller module in the solid-state storage needs to be replaced, and there is no need to replace other media modules.

[0230] The method steps in this embodiment can be implemented by hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, which can be stored in RAM, flash memory, ROM, PROM, EPROM, EEPROM, registers, hard disk, mobile hard disk, CD-ROM or any other form of storage medium well known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be an integral part of the processor. The processor and storage medium can be located in an ASIC. In addition, the ASIC can be located in a computing device. Of course, the processor and storage medium can also exist as discrete components in a network device or a terminal device.

[0231] In the above embodiments, all or part of the embodiments can be implemented by software, hardware, firmware or any combination thereof. When implemented using software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, the process or function described in the embodiments of the present application is performed in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a user device or other programmable device. The computer program or instruction can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer program or instruction can be transmitted from one website, computer, server or data center to another website, computer, server or data center via wired or wireless means. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium, such as a floppy disk, a hard disk, or a tape; it can also be an optical medium, such as a digital video disc (DVD); it can also be a semiconductor medium, such as a solid state drive (SSD).

[0232] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present application, and such modifications or substitutions should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A solid-state memory, characterized in that: include: A controller module, comprising a controller chip and a first connection portion connected to the controller by electrical signals; A first medium module includes a first storage medium and a second connection portion electrically connected to the first storage medium, wherein the first connection portion and the second connection portion are detachably connected; When the first connection portion and the second connection portion are in a connected state, the controller can manage the first storage medium.

2. The solid-state memory according to claim 1, wherein: The first connection portion is a female contact, and the second connection portion is a male contact; or the first connection portion is a male contact, and the second connection portion is a female contact.

3. The solid-state memory according to claim 2, wherein: The male contact is an electrical connector with a protruding structure, and the female contact is an electrical connector with a groove structure.

4. The solid-state memory according to claim 2 or 3, wherein: The positive contact comprises a plurality of pins arranged side by side; The female contact comprises a plurality of slots arranged side by side, and one of the plurality of pins is detachably connected to one of the plurality of slots.

5. The solid-state memory according to any one of claims 1 to 4, characterized in that The controller manages the first storage medium, including: The controller obtains an identifier of each die in the first storage medium, and establishes a data index of the first storage medium according to the identifiers of all the die in the first storage medium, wherein the data index includes the identifier of each die and an address corresponding to the identifier; If the controller receives a write request, the controller selects a first die from the first storage medium and controls an electrical signal of the first die according to first data in the write request, so that the first die stores an electrical signal corresponding to the first data; If the controller receives a read request, the controller selects a second chip from the first storage medium according to the target address and the data index in the read request, determines the second data corresponding to the target address according to the electrical signal of the second chip, and sends the second data.

6. The solid-state memory according to any one of claims 1 to 5, characterized in that: Also includes: A substrate is provided with a first hole structure, wherein the first hole structure penetrates the substrate along a thickness direction of the substrate; Projections of the first dielectric module and the first hole structure along the thickness direction of the substrate overlap.

7. The solid-state memory according to claim 6, wherein: The substrate is further provided with: a second hole structure arranged side by side with the first hole structure along the width direction of the substrate, and the second hole structure penetrates the substrate along the thickness direction of the substrate; Projections of the first dielectric module and the second hole structure along the thickness direction of the substrate overlap.

8. The solid-state memory according to claim 6 or 7, wherein: The space of the first hole structure along the thickness direction of the substrate is used to fully or partially accommodate the storage medium in the first medium module.

9. The solid-state memory according to any one of claims 1 to 8, wherein: The first storage medium includes an electrical connection plate and M layers×N stacks of dies; The M layers×N stacked crystal grains are electrically connected to the electrical connection plate via bonding wires and are disposed on a first surface in a thickness direction of the electrical connection plate.

10. The solid-state memory according to claim 8, wherein: The crystal grains in a single layer of crystal grains in the M layers×N stack of crystal grains are arranged in a straight line.

11. The solid-state memory according to claim 8 or 9, characterized in that: The first connection portion is provided with X data channels, where X is a positive integer; The first storage medium includes M layers×N stacks of grains; One of the X data channels is electrically connected to one or more dies in the M layers×N stacks of dies.

12. The solid-state memory according to any one of claims 1 to 8, wherein: The first storage medium includes an electrical connection plate and M layers×N stacks of dies; The electrical connection plate includes a first surface along the thickness direction of the electrical connection plate and a second surface arranged opposite to the first surface; The M layers×N stacked grains are electrically connected to the electrical connection plate via bonding wires, and a portion of the M layers×N stacked grains are arranged on the first surface, and another portion of the grains are arranged on the second surface.

13. The solid-state memory according to any one of claims 1 to 12, wherein: The grains in the first storage medium are: Flash memory particles, DRAM particles, MRAM particles, RRAM particles, FeRAM particles, HBM particles or PCM particles.

14. The solid-state memory according to any one of claims 1 to 13, wherein: The controller module further includes a third connection portion connected to the controller; The solid-state memory further comprises: A second medium module includes a second storage medium and a fourth connection portion electrically connected to the second storage medium, wherein the third connection portion is detachably connected to the fourth connection portion; When the third connection portion and the fourth connection portion are in a connected state, the controller can manage the second storage medium.

15. The solid-state memory according to claim 14, wherein: The solid-state memory further comprises: substrate; The first connection portion is adjacent to the third connection portion, and the first connection portion is arranged on a first side along the width direction of the substrate, and the third connection portion is arranged on a second side along the width direction of the substrate, and the first side is arranged opposite to the second side.

16. A dielectric module, characterized in that: include: storage media; The second connection portion is electrically connected to the storage medium and is used to provide a chip selection channel and data transmission function for the storage medium. The second connection portion is also used to be detachably connected to the controller module.

17. The dielectric module according to claim 16, wherein: The storage medium includes a plurality of crystal grains, each crystal grain corresponding to a chip selection channel; If the medium module receives a write enable signal of a first chip select channel, the medium module outputs an electrical signal of a first die according to the write enable signal, where the first die is a die corresponding to the first chip select channel among the plurality of die; If the medium module receives a read enable signal of a second chip select channel, it outputs an electrical signal of a second die according to the read enable signal, where the second die is a die corresponding to the second chip select channel among the plurality of die.

18. The dielectric module according to claim 16 or 17, characterized in that: The storage medium includes an electrical connection board and M layers×N stacks of crystal grains; The M layers×N stacked crystal grains are electrically connected to the electrical connection plate via bonding wires and are disposed on a first surface in a thickness direction of the electrical connection plate.

19. The dielectric module according to claim 18, wherein: The crystal grains in a single layer of crystal grains in the M layers×N stack of crystal grains are arranged in a straight line.

20. The dielectric module according to claim 16 or 17, characterized in that: The storage medium includes an electrical connection board and M layers×N stacks of crystal grains; The electrical connection plate includes a first surface along the thickness direction of the electrical connection plate and a second surface arranged opposite to the first surface; The M layers×N stacked grains are electrically connected to the electrical connection plate via bonding wires, and a portion of the M layers×N stacked grains are arranged on the first surface, and another portion of the grains are arranged on the second surface.

21. The dielectric module according to any one of claims 16 to 20, characterized in that: The grains in the storage medium are: Flash memory particles, DRAM particles, MRAM particles, RRAM particles, FeRAM particles, HBM particles or PCM particles.

22. The dielectric module according to any one of claims 16 to 21, characterized in that: The second connecting portion is a male contact or a female contact.

23. The dielectric module according to any one of claims 16 to 22, characterized in that: The second connection portion includes a plurality of pins arranged side by side, and one of the plurality of pins is detachably connected to a slot in the controller module.

24. A substrate assembly, characterized in that: include: substrate; a first connecting portion electrically connected to the substrate and disposed on a first side along a width direction of the substrate, the first connecting portion being configured to be detachably connected to the dielectric module; a third connecting portion, electrically connected to the substrate, and disposed on a second side along the width direction of the substrate; If the first connection portion and the medium module are in a connected state, the substrate assembly is used to send a chip select signal to manage the storage medium in the medium module.

25. The substrate assembly according to claim 24, wherein: The third connection portion is adjacent to the first connection portion, and the first side is opposite to the second side.

26. The substrate assembly according to claim 25, wherein: The substrate is provided with a first hole structure, and the first hole structure penetrates the substrate along the thickness direction of the substrate; When the dielectric module and the first connecting portion are in a connected state, projections of the dielectric module and the first hole structure along the thickness direction of the substrate overlap.

27. The substrate assembly according to claim 26, wherein: The substrate is further provided with: a second hole structure arranged side by side with the first hole structure along the width direction of the substrate, and the second hole structure penetrates the substrate along the thickness direction of the substrate; When the dielectric module and the first connecting portion are in a connected state, projections of the dielectric module and the second hole structure along the thickness direction of the substrate overlap.

28. The substrate assembly according to claim 26 or 27, wherein: The space of the first hole structure along the thickness direction of the substrate is used to fully or partially accommodate the storage medium in the media module.

29. The substrate assembly according to any one of claims 24 to 28, wherein: The first connecting portion is a male contact or a female contact.

30. The substrate assembly according to any one of claims 24 to 29, wherein: The first connecting portion includes a plurality of slots arranged side by side, and one of the plurality of slots is detachably connected to a pin in the dielectric module.

31. A solid state drive, characterized in that: include: One or more solid-state memories according to any one of claims 1 to 15; An input / output (IO) device is electrically connected to the solid-state memory and is used to transmit data signals.

32. A storage system, characterized in that: include: A hard disk management device and a solid-state hard disk as described in claim 31, wherein the hard disk management device is used to manage data stored in the solid-state hard disk.

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