Electronic component module and manufacturing method therefor
By using a reinforcing plate with a higher thermal expansion coefficient to match the composite's expansion with the wiring board, stress in solder joints is reduced, enhancing reliability and durability while simplifying the assembly process.
Patent Information
- Application Number
- PCT/KR2025/003280
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-03-22
- Filing Date
- 2025-03-14
- Publication Date
- 2025-09-25
AI Technical Summary
The difference in thermal expansion coefficients between semiconductor packages and wiring boards leads to stress concentration and reliability issues in solder joints, causing defects such as cracks and delamination during thermal processes.
A reinforcing plate with a higher thermal expansion coefficient than the wiring board is used to match the thermal expansion coefficient of the composite formed by the semiconductor package and the reinforcing plate, bonded with an adhesive to synchronize thermal expansion, reducing stress and eliminating the need for complex underfill processes.
The solution significantly reduces stress in solder joints, improving reliability and durability by synchronizing thermal expansion, allowing for higher thermal shock resistance and simplifying the assembly process.
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Figure KR2025003280_25092025_PF_FP_ABST
Abstract
Description
Electronic component module and its manufacturing method
[0001] The present invention relates to an electronic component module and a method for manufacturing the same, and more particularly, to an electronic component module and a method for manufacturing the same, wherein the thermal expansion coefficient of a composite composed of a semiconductor package and a reinforcing plate in contact with a side surface of the semiconductor package is made equal to the thermal expansion coefficient of a wiring board on which the semiconductor package is assembled.
[0002] The electronics industry is currently pursuing lightweight, miniaturized, high-speed, multi-functional, and highly reliable products. To address this trend, new semiconductor packages are being developed and introduced. One well-known example is the BGA IC chip, which features a single-sided array of external connectors. Compared to conventional semiconductor packages, BGA IC chip packages offer several advantages: a smaller mounting area on the wiring board, a higher number of input / output pins, and superior electrical characteristics.
[0003] Fig. 1 is a drawing showing a method for reinforcing the reliability of a semiconductor package using a conventional underfill. (A) shows a cross-section before forming an underfill, and (B) shows a cross-section after forming an underfill. The semiconductor package may be a BGA IC chip.
[0004] Referring to (A) of Fig. 1, a semiconductor package (10) is a structure in which a space other than a wire for connecting an embedded semiconductor chip (not shown) and a ball land (11) formed on a lower surface is molded with a molding resin (14), and a solder ball (20) is formed by bonding to the ball land (11).
[0005] The above solder ball (20) is bonded to the solder pad (31) of the wiring board (30), and the semiconductor package (10) is mounted on the wiring board (30).
[0006] In this way, the semiconductor package (10) is physically and electrically coupled to the wiring board (30) by the solder ball (20).
[0007] Therefore, the reliability of each solder joint of the joint portion of the solder ball (20), i.e., the solder ball (20) and the ball land (11) of the semiconductor package (10), and the solder ball (20) and the solder pad (31) of the wiring board (30), is very important.
[0008] However, the semiconductor package (10) and the wiring board (30) that occupy a large volume of molding resin (14) have different thermal expansion coefficients. Accordingly, cracks or delamination occur due to stress concentration caused by heat during the reflow process, reliability test process, or operation of the semiconductor package (10), thereby lowering the reliability of the solder joint.
[0009] Figure 2 is a diagram showing the simulation results for the stress applied to the solder ball of a semiconductor package in a thermal shock test.
[0010] Referring to Fig. 2, the intensity of stress decreases as the color becomes darker black, and the intensity of stress increases as the color becomes lighter black. The solder balls (20) where stress is concentrated are marked with gray stars. In Fig. 2, the upper part of the solder ball (20) located at the outer part (A) of the package, that is, the part where it is connected to the ball land (11) of the semiconductor package (10), is colored light black, confirming that stress is concentrated there.
[0011] In this way, it can be seen that the difference in thermal expansion coefficients between the semiconductor package (10) and the wiring board (30) causes the accumulated stress to become stronger the farther away from the center in each direction, horizontally or vertically, and in particular, the stress is concentrated on the outer corner portion where it is accumulated simultaneously in both horizontal and vertical directions.
[0012] To improve this problem, the difference between the thermal expansion coefficient of the semiconductor package (10) and the thermal expansion coefficient of the wiring board (30) must be reduced. Considering that stress is concentrated between the solder ball (20) and the ball land (11) of the semiconductor package (10) among the joint portions of the solder ball (20), it can be seen that the thermal expansion coefficient of the semiconductor package (10) must be adjusted.
[0013] To reduce solder joint defects caused by stress due to thermal shock, a process of forming underfill has been introduced.
[0014] Referring to (B) of Fig. 1, an underfill (23) is formed in the space between the semiconductor package (10) and the wiring board (30), i.e., around the solder ball (20).
[0015] Underfill (23) is a solution that is liquid at room temperature and solidifies over a certain high temperature and time, and is formed around the solder ball (20). The underfill (23) is widely used because it has been proven effective in reducing the occurrence of defects due to stress, but in order to form the underfill (23), many processes such as washing, drying, preheating, solution injection, and drying must be added, and in addition, when the solution changes from liquid to solid during the process of forming the underfill (23), a defect occurs in which the solder joint falls off due to a change in volume.
[0016] Additionally, a fence or can may be added to support and secure the wiring board (30) or to reduce electromagnetic interference generated from the wiring board (30). Adding the fence or can requires a separate process after the underfill process, which complicates the process and takes a long time. If the underfill process is eliminated, the process of adding the fence or can can be included in the general SMT (surface mount) process.
[0017] It is necessary to develop a technology that eliminates the underfill process, which requires a complex assembly process and also causes defects, and reduces defects caused by stress due to temperature changes.
[0018] The technical problem to be solved by the present invention is to reduce defects in solder joints between a semiconductor package and a wiring board caused by stress due to a difference in the thermal expansion coefficient of the semiconductor package and the thermal expansion coefficient of the wiring board.
[0019] The electronic component module of the present invention for solving the above technical problem includes a wiring board having solder pads formed thereon, a semiconductor package having a plurality of solder balls arranged in a plane on a lower surface and bonded to the solder pads, and a reinforcing plate formed in the shape of a square ring so that an inner surface thereof contacts a side surface of the semiconductor package, and the semiconductor package and the reinforcing plate can be bonded with an adhesive.
[0020] The method for manufacturing an electronic component module of the present invention for solving the above technical problem may include a step of mounting a semiconductor package including a plurality of solder balls arranged in a plane on a lower surface on a wiring board, a step of installing a reinforcing plate formed in the shape of a square ring and having an inner surface in contact with a side surface of the semiconductor package, a step of injecting an adhesive between the semiconductor package and the reinforcing plate, and a step of allowing the adhesive to penetrate and harden.
[0021] In some embodiments of the present invention, the reinforcing plate may include a support member that allows the reinforcing plate to be spaced apart from the wiring board by a diameter of the solder ball.
[0022] In some embodiments of the present invention, the support member may be formed by bending or embossing the reinforcing plate.
[0023] In some embodiments of the present invention, the reinforcing plate may be characterized in that it has a coefficient of thermal expansion higher than a coefficient of thermal expansion of the wiring board such that a coefficient of thermal expansion of a composite composed of the reinforcing plate and the semiconductor package is equal to the coefficient of thermal expansion of the wiring board.
[0024] In some embodiments of the present invention, the volume ratio, Vf, of the reinforcing plate in the composite satisfies the following equation:
[0025] T PCB = T f V f +(1+P x )T x (1-V f )
[0026] Here, T PCB is the coefficient of thermal expansion of the PCB,
[0027] P x (Poisson's ratio of mixture in x direction) is P x = V f P f +V c P c And,
[0028] T x (x-direction thermal expansion coefficient) is It could be.
[0029] (Ef is the elastic modulus of the reinforcement, Ec is the elastic modulus of the chip, Pf is the Poisson's ratio of the reinforcement, Pc is the Poisson's ratio of the chip, Tf is the coefficient of thermal expansion of the reinforcement, Tc is the coefficient of thermal expansion of the chip)
[0030] In some embodiments of the present invention, the reinforcing plate may include a connecting portion connected to a fence or can installed on the wiring board.
[0031] In some embodiments of the present invention, the reinforcing plate may include an adhesive injection portion having a chamfered shape at an upper edge of a surface where the reinforcing plate and the semiconductor package come into contact.
[0032] In some embodiments of the present invention, the gap between the reinforcing plate and the semiconductor package may be less than 0.1 mm.
[0033] In some embodiments of the present invention, an underfill may be included between the semiconductor package and the wiring substrate.
[0034] In some embodiments of the present invention, the step of forming an underfill between the semiconductor package and the wiring board may be further included prior to the step of installing the reinforcing plate.
[0035] According to the electronic component module of the present invention and the method for assembling the same, the reliability of a product to which a semiconductor package is applied can be improved by reducing defects in solder joints caused by stress generated by a difference in thermal expansion coefficients between a semiconductor package and a wiring board.
[0036] In addition, the assembly of the reinforcing plate according to the present invention can omit the conventional underfill formation process for reducing defects in the solder joint and can be included in the existing SMT and Reflow processes, thereby improving the productivity of the product.
[0037] Figure 1 is a drawing showing a method for reinforcing a semiconductor package using a conventional underfill.
[0038] Figure 2 is a diagram showing the simulation results for the stress applied to a solder ball in a thermal shock test.
[0039] Figure 3 is a drawing showing an electronic component module according to the present invention.
[0040] Figure 4 is a drawing showing a reinforcing plate according to the first embodiment of the present invention.
[0041] Figure 5 is a drawing showing a reinforcing plate according to a second embodiment of the present invention.
[0042] Figure 6 is a drawing showing a reinforcing plate according to a third embodiment of the present invention.
[0043] Figure 7 is a plan view showing the size of a reinforcing plate according to the present invention.
[0044] Figure 8 is a drawing showing the effect of an electronic component module according to the present invention.
[0045] Figure 9 is a drawing showing an assembly process of a reinforcing plate according to the present invention.
[0046] The advantages and features of the present invention, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms. These embodiments are provided only to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined only by the scope of the claims. Like reference numerals designate like elements throughout the specification.
[0047] “And / or” includes each and every combination of one or more of the items mentioned.
[0048] The terminology used herein is for the purpose of describing embodiments only and is not intended to limit the present invention. In this specification, the singular also includes the plural unless specifically stated otherwise. As used herein, the terms "comprises" and / or "comprising" do not exclude the presence or addition of one or more other components, steps, operations, and / or elements mentioned.
[0049] Additionally, throughout the specification, when a part is said to be "connected" to another part, this includes not only cases where it is "directly connected," but also cases where it is "indirectly" or "electrically connected" with other members or components in between.
[0050] Additionally, throughout the specification, the description that each layer (film), region, pattern or structure is formed "on" or "under" the substrate, each layer (film), region, pad or pattern includes both being formed directly or through the interposition of another layer. The criteria for being on / over or under / under each layer are explained based on the drawings.
[0051] Additionally, expressions such as 'first, second', etc. are used only to distinguish between multiple components, and do not limit the order or other characteristics between the components.
[0052] In addition, the flowcharts illustrated in the drawings are merely exemplary sequences for obtaining the most desirable results in carrying out the present invention, and it is obvious that other steps may be added or some steps may be deleted.
[0053] Unless otherwise defined, all terms (including technical and scientific terms) used herein may be used in their common sense to those of ordinary skill in the art to which the present invention pertains. Furthermore, terms defined in commonly used dictionaries are not to be interpreted ideally or excessively unless explicitly and specifically defined otherwise.
[0054] Hereinafter, an electronic component module according to the present invention will be described with reference to the drawings.
[0055] Figure 3 is a drawing showing an electronic component module according to the present invention, (A) is a cross-sectional view, and (B) is a plan view.
[0056] Referring to FIG. 3, an electronic component module according to the present invention includes a wiring board (30) having solder pads (31) formed thereon, a semiconductor package (10) having a plurality of solder balls (20) arranged in a plane on a lower surface and bonded to the solder pads (31), and a reinforcing plate (60) formed in the shape of a square ring so that an inner surface thereof contacts a side surface of the semiconductor package (10), and the semiconductor package (10) and the reinforcing plate (60) can be bonded with an adhesive. At this time, the semiconductor package (10) can be a BGA IC chip.
[0057] In general, the coefficient of thermal expansion of a semiconductor package (10) filled with a rigid molding resin (14) is smaller than the coefficient of thermal expansion of a wiring board (30) formed of an epoxy material, which is an insulator. Therefore, the reinforcing plate (60) of the present invention is formed of a material having a coefficient of thermal expansion that is larger than that of the semiconductor package (10) and larger than that of the wiring board (30), so that the coefficient of thermal expansion of a composite formed of the semiconductor package (10) and the reinforcing plate (60) is made to match the coefficient of thermal expansion of the wiring board (30), thereby reducing stress caused by the difference in thermal expansion.
[0058] For example, the thermal expansion coefficient of the semiconductor package (10) may be about 3.5 ㎛ / m, and the thermal expansion coefficient of the wiring board (30) may be about 15 ㎛ / m. At this time, the reinforcing plate (60) may be formed of a material such as SUS304, a metal having a thermal expansion coefficient of 17.3 ㎛ / m. When formed in this manner, the thermal expansion coefficient of the semiconductor package (10) becomes the same as that of the wiring board (30), so that the thermal expansion of the semiconductor package (10) and the wiring board (30) may be synchronized.
[0059] As the material of the above reinforcing plate (60), metal and SUS304 material are used as examples, but it is not limited to SUS304 material, and any metal or plastic having a thermal expansion coefficient greater than that of the wiring board (30) can be used.
[0060] In addition, the reinforcing plate (60) may include an adhesive injection portion (63) in a chamfered shape at the upper edge of the surface where the reinforcing plate (60) and the semiconductor package (10) come into contact.
[0061] Since the above-mentioned reinforcing plate (60) must surround the side of the semiconductor package (10) and be bonded with a high degree of bonding, an adhesive (50) must be injected between the reinforcing plate (60) and the semiconductor package (10) to form an adhesive layer. At this time, the adhesive (50) must be supplied in an appropriate amount that sufficiently fills the gap between the semiconductor package (10) and the reinforcing plate (60) and is not excessively applied to the upper surface of the semiconductor package (10) or the upper surface of the wiring board (30). This is because if the adhesive (50) is excessively applied to the upper surface of the semiconductor package (10) or the upper surface of the wiring board (30), it may affect the respective thermal expansion coefficients.
[0062] Therefore, by using a device such as an injection needle, a fixed amount can be supplied to the adhesive injection portion (63) formed on the reinforcing plate (60).
[0063] The supplied adhesive (50) can fill the gap formed on the surface where the reinforcing plate (60) and the semiconductor package (10) come into contact through a capillary phenomenon.
[0064] At this time, the gap between the reinforcing plate (60) and the semiconductor package (10) may be smaller than 0.1 mm.
[0065] In order to achieve the gist of the invention of matching the thermal expansion coefficient of the composite formed by the semiconductor package (10) and the reinforcing plate (60) with the thermal expansion coefficient of the wiring board (30), it is important to exclude other possible elements from the composite and increase the degree of bonding between the semiconductor package (10) and the reinforcing plate (60), so that if the gap between the reinforcing plate (60) and the semiconductor package (10) is minimized, the thermal expansion coefficient can be calculated linearly, making it easy to apply to an actual design.
[0066] If the effect according to the change of the above gap is simulated, the following changes can be confirmed. If the effect when the above gap is O is taken as 1, the effect of about 0.6 can be confirmed when the gap is 0.05 mm, and the effect of about 0.5 can be confirmed when the gap is 0.1 mm. Therefore, the gap can be formed as small as possible less than 0.1 mm, and can be preferably formed to 0.05 mm considering the processing error and productivity of the above reinforcement plate (60).
[0067] The above reinforcing plate (60) may include a support member (61) that allows the reinforcing plate (60) to be spaced apart from the wiring board (30) by the diameter of the solder ball (20).
[0068] In order for the composite formed by the semiconductor package (10) and the reinforcing plate (60) to function as a single thermal expansion composite in a direction parallel to the wiring board (30), it is preferable that the side surface of the reinforcing plate (60) and the side surface of the semiconductor package (10) be in contact with the same area, so that the height of the reinforcing plate (60) and the lower end of the semiconductor package (10) can be matched. Accordingly, the reinforcing plate (60) needs to be spaced apart from the wiring board (30) by the same distance as the distance that the semiconductor package (10) is spaced apart from the wiring board (30). The support member (61) can allow the reinforcing plate (60) and the semiconductor package (10) to be spaced apart by the diameter of the solder ball.
[0069] FIG. 4 is a drawing showing a reinforcing plate according to the first embodiment of the present invention, (A) is a perspective view, and (B) is a cross-sectional view.
[0070] Referring to Fig. 4, the support portion (61) of the reinforcing plate (60) may be formed into a pier shape by bending the reinforcing plate (60). For example, the reinforcing plate (60) may be formed by processing a metal material. In this case, the support portion (61) may be formed by bending the metal material during the bending process.
[0071] FIG. 5 is a drawing showing a reinforcing plate according to a second embodiment of the present invention, (A) is a perspective view, and (B) is a cross-sectional view.
[0072] Referring to Fig. 5, the support portion (61) of the reinforcing plate (60) may be characterized by being formed in the shape of a protrusion by embossing the reinforcing plate (60). For example, the reinforcing plate (60) may be formed by processing a metal material. In this case, the support portion (61) may be formed to protrude as a protrusion during the embossing process.
[0073] FIG. 6 is a drawing showing a reinforcing plate according to a third embodiment of the present invention, (A) showing before assembling the wiring board, and (B) showing after assembling.
[0074] Referring to FIG. 6, the reinforcing plate (60) may include a connecting portion (65) connected to the fence or can so as to be formed integrally with the fence or can installed on the wiring board (30).
[0075] A fence or can, etc., may be further assembled onto the above wiring board (30) for electromagnetic interference countermeasures, mechanical support, or connection to other mechanical structures. In this case, if the reinforcing plate (60) is formed integrally with the fence or can, the number of processes can be reduced.
[0076] Figure 7 is a plan view showing the size of a reinforcing plate according to the present invention.
[0077] The reinforcing plate (60) according to the present invention may be characterized in that it has a higher thermal expansion coefficient than the thermal expansion coefficient of the wiring board (30) so that the thermal expansion coefficient of the composite composed of the reinforcing plate (60) and the semiconductor package (10) is equal to the thermal expansion coefficient of the wiring board (30).
[0078] At this time, the volume ratio, Vf, of the reinforcing plate (60) in the above complex can satisfy the equation below.
[0079] T PCB = T f V f +(1+P x )T x (1-V f )
[0080] Here, T PCB is the coefficient of thermal expansion of the PCB,
[0081] P x (Poisson's ratio of mixture in x direction) is P x = V f P f +V c P c And,
[0082] T x (x-direction thermal expansion coefficient) is am.
[0083] Also, Ef is the elastic modulus of the reinforcement, Ec is the elastic modulus of the chip, Pf is the Poisson's ratio of the reinforcement, Pc is the Poisson's ratio of the chip, Tf is the coefficient of thermal expansion of the reinforcement, and Tc is the coefficient of thermal expansion of the chip.
[0084] The process of determining the size of the reinforcing plate (60) according to the present invention will be described with reference to FIG. 7.
[0085] The volume ratio, Vf, of the reinforcing plate (60) in the total volume of the above complex can be obtained using the rule of mixtures.
[0086] The rule of mixtures is a weighted average theory used to predict various properties, including the coefficient of thermal expansion, of composite materials. In composite materials (mixtures) composed of two or more materials, the continuous, underlying material is defined as the matrix, and the reinforcing material is defined as the fiber. Using the properties of the matrix and fiber as variables, a formula is provided to derive the properties of the mixture.
[0087] First, in area 1 of Fig. 7, assuming the fiber as a reinforcing plate (60) and the matrix as a semiconductor package (10), the linear rule of mixture is applied to P of the mixture in the x direction. x (x-direction mixture Poisson's ratio) and T x Find the (x-direction thermal expansion coefficient).
[0088] The width of the reinforcing plate (60) is W f , the width of the semiconductor package (10) is W c When you say,
[0089] V f (Volume ratio of reinforcement plate) is Equation 1:
[0090] And,
[0091] V c (Chip volume ratio) is Equation 2:
[0092] V c = 1-V f am.
[0093] At this time, since the height of the reinforcement and the chip are the same, the height can be excluded from the volume ratio calculation formula.
[0094] E f (elastic modulus of reinforcement plate), E c (chip elastic modulus), P f (Poisson's ratio of reinforced plate), P c (Chip Poisson's ratio) is given,
[0095] P x (Poisson's ratio of x-direction mixture) is Equation 3:
[0096] P x = V f P f +V c P c It can be obtained as follows.
[0097] T f (Coefficient of thermal expansion of the reinforcing plate), T c (Chip thermal expansion coefficient) is given,
[0098] T x (x-direction thermal expansion coefficient) is Equation 4:
[0099] am.
[0100] Next, by applying the Inverse Rule of Mixture in area 2 of Figure 7, T of the mixture in the y direction y( The coefficient of thermal expansion in the y direction can be obtained. At this time, a reinforcing plate (60) can be used as a fiber, and a material obtained by applying the linear rule of mixture as a matrix, i.e., a material reflecting the thermal expansion in the x direction, can be applied. By calculating in this way, the coefficient of thermal expansion of the composite can be obtained, which reflects both the coefficients of thermal expansion in the x direction and the coefficients of thermal expansion in the y direction.
[0101] P obtained from the above equation 3 x (Poisson's ratio of mixture in x direction) and T obtained from Equation 4 x (x-direction thermal expansion coefficient) is substituted into the Poisson's ratio and thermal expansion coefficient of the matrix, T y (Y-direction thermal expansion coefficient) is calculated as follows.
[0102] T y (Y-direction thermal expansion coefficient) is Equation 5:
[0103] T y = T f V f +(1+P x )T x V c
[0104] T PCB (Thermal expansion coefficient of the wiring board) and the above T y Since the gist of the present invention is to make the (y-direction thermal expansion coefficient) the same,
[0105] T PCB = T y = T f V f +(1+P x )T x V c am.
[0106] In the above equation, V f (Volume ratio of reinforcement plate) can be obtained.
[0107] V f (The volume ratio of the reinforcing plate) is obtained by using Equation 1 to obtain the width of the reinforcing plate, W f can be obtained
[0108] For example E f (Reinforcement plate elastic modulus) is 193 GPa, E c (Chip elastic modulus) is 112 GPa, P f (Poisson's ratio of reinforced plate) is 0.29, P c (Chip Poisson's ratio) is 0.29
[0109] T f (Coefficient of thermal expansion of the reinforcing plate) is 17.3 ppm, T c(Chip thermal expansion coefficient) is 3.69 ppm, width (W) of semiconductor package (10) c ) is 3.8mm,
[0110] Width (W) of the reinforcing plate (60) f ) can be obtained as 1.14 mm.
[0111] Figure 8 is a drawing showing the effect of a reinforcing mechanism structure according to the present invention. It can be confirmed that when applying the reinforcing mechanism structure according to the present invention, the stress occurring particularly in the outer edge portion where the difference in thermal expansion coefficient accumulates is reduced.
[0112] Referring to FIG. 8, the results of a simulation of thermal stress applied to a solder ball (20) depending on the presence or absence of a reinforcing mechanism structure according to the present invention can be confirmed.
[0113] The vertical axis represents the classification by type (unilateral reaction force and shear stress) and temperature (-40 ℃, 85 ℃), and the horizontal axis represents the classification when there is no mechanical reinforcement and when there is.
[0114] The stress applied to the solder ball (20) located at the outer portion at -40 ℃ is 255.19 MPa when there is no reinforcing mechanism structure and is 130.39 MPa when there is a reinforcing mechanism structure, so it can be confirmed that the stress is reduced by about 51% when there is a reinforcing mechanism structure.
[0115] The stress applied to the solder ball (20) located at the outer portion at 85 ℃ is 242.33 MPa when there is no reinforcing mechanism structure and is 116.69 MPa when there is a reinforcing mechanism structure, so it can be confirmed that the stress is reduced by about 48% when there is a reinforcing mechanism structure.
[0116] The above simulation data is the result of a general stress test, and the results of a shear stress test also show a similar reduction in stress generation of 52% and 49% when measured at -40°C and 85°C, respectively.
[0117] Furthermore, it can be confirmed that this reduced stress improves the life of the solder joint during an actual thermal shock test.
[0118] In a sample with a reinforced mechanism structure formed, the thermal shock life of repeated thermal shocks in the range of -40 ℃ to 85 ℃ was confirmed to be more than 2,000 times.
[0119] It can be confirmed that the thermal shock life of a sample without a reinforcing mechanism structure is approximately 500 to 700 times when subjected to repeated thermal shocks in the range of -40°C to 85°C.
[0120] When compared to the thermal shock life of 1,500 to 2,000 times when an underfill is formed on a sample without a reinforcing mechanism structure and subjected to repeated thermal shocks in the range of -40°C to 85°C, the reinforcing mechanism structure according to the present invention shows an improvement effect that goes beyond the thermal shock resistance that can be secured by forming a conventional underfill.
[0121] Additionally, the reinforcing mechanism structure according to the present invention may include an underfill between the semiconductor package (10) and the wiring board (30). In other words, it may include both a mechanism reinforcing structure and underfill formation. In a sample to which both of the above measures were applied, it was confirmed that the thermal shock lifespan, which was subjected to repeated thermal shocks in the range of -40°C to 85°C, was secured at least 4,000 times.
[0122] Therefore, in products where reliability and durability are of the utmost importance, both the mechanical reinforcement structure and underfill formation can be applied, even at the cost of additional processes.
[0123] Figure 9 is a drawing showing an assembly process of a reinforcing plate according to the present invention.
[0124] Referring to FIG. 9, a method for manufacturing an electronic component module according to the present invention may include a step of mounting a semiconductor package (10) including a plurality of solder balls (20) arranged in a plane on a lower surface on a wiring board (30), a step of installing a reinforcing plate (60) formed in the shape of a square ring so that an inner surface thereof contacts a side surface of the semiconductor package (10), a step of injecting an adhesive (50) between the semiconductor package (10) and the reinforcing plate (60), and a step of allowing the adhesive (50) to penetrate and harden.
[0125] Referring to (A) of Fig. 9, the semiconductor package (10) can be mounted on the wiring board (30). The semiconductor package (10) on which solder balls (20) are formed can be mounted on the wiring board (30) through an SMT process.
[0126] Referring to (B) of FIG. 9, a reinforcing plate (60) that surrounds and contacts the side surface of the semiconductor package (10) can be assembled on the wiring board (30). At this time, the semiconductor package (10) can be assembled as a multi-mount process after being mounted on the wiring board (30) in the SMT process. Therefore, this step can also be performed during the SMT process without adding a separate process.
[0127] Referring to (C) of Fig. 9, an adhesive (50) can be injected between the semiconductor package (10) and the reinforcing plate (60).
[0128] The adhesive (50) should be supplied in an appropriate amount to fill the gap between the semiconductor package (10) and the reinforcing plate (60) and not to be applied to the upper surface of the semiconductor package (10) or the upper surface of the wiring board (30). Therefore, the adhesive (50) can be supplied in a fixed amount to the adhesive injection port (63) formed on the reinforcing plate (60) using a device such as an injection needle. The supplied adhesive (50) can fill the gap formed on the surface where the reinforcing plate (60) and the semiconductor package (10) come into contact through a capillary phenomenon to form an adhesive layer.
[0129] Referring to (D) of FIG. 9, a step of penetration and curing of the adhesive (50) may be included. The adhesive (50) may be cured during a reflow process performed after the SMT process. Therefore, this curing process may also be performed during a reflow process included in the assembly process of an existing wiring board (30) without adding a separate process.
[0130] Additionally, the method for manufacturing an electronic component module according to the present invention may further include a step of forming an underfill between the semiconductor package (10) and the wiring board (30) prior to the step of installing the reinforcing plate (60). That is, both the mechanical reinforcing structure and the underfill formation may be applied.
[0131] However, in order to add an underfill process, the process of forming the underfill must be performed after performing both the SMT process and the Reflow process for assembling the semiconductor package (10), so the process of forming the reinforcing plate (60) according to the present invention must be performed separately after the underfill forming process is completed.
[0132] Therefore, for products where reliability and durability are of the utmost importance, both the mechanical reinforcement structure and underfill formation can be applied, even if it means adding additional processes.
[0133] Although the present invention has been described as above, those skilled in the art will recognize that the present invention can be implemented in other forms while maintaining the technical spirit and essential features of the present invention.
[0134] The scope of the present invention will be defined by the patent claims, but it should be interpreted that not only the configuration directly derived from the description of the patent claims, but also all changes or modified forms derived from equivalent configurations are included in the scope of the present invention.
Claims
1. Wiring board with solder pads formed; A semiconductor package in which a plurality of solder balls arranged on a lower surface are bonded to the solder pads; It includes a reinforcing plate formed in the shape of a square ring and having an inner surface in contact with the side surface of the semiconductor package, An electronic component module in which the semiconductor package and the reinforcement plate are bonded with an adhesive.
2. In paragraph 1, An electronic component module, wherein the reinforcing plate includes a support member that allows the reinforcing plate to be spaced apart from the wiring board by the diameter of the solder ball.
3. In paragraph 2, An electronic component module wherein the support member is formed by bending or embossing the reinforcing plate.
4. In paragraph 1, An electronic component module, characterized in that the reinforcing plate has a thermal expansion coefficient higher than the thermal expansion coefficient of the wiring board so that the thermal expansion coefficient of the composite composed of the reinforcing plate and the semiconductor package is equal to the thermal expansion coefficient of the wiring board.
5. In paragraph 4, In the above complex, the volume ratio of the reinforcing plate, Vf, satisfies the equation below: T PCB = T f V f +(1+P x )T x (1-V f ) Here, T PCB is the coefficient of thermal expansion of the PCB, P x (Poisson's ratio of mixture in x direction) is P x = V f P f +V c P c And, T x (x-direction thermal expansion coefficient) is Person, electronic component module. (Ef is the elastic modulus of the reinforcement, Ec is the elastic modulus of the chip, Pf is the Poisson's ratio of the reinforcement, Pc is the Poisson's ratio of the chip, Tf is the coefficient of thermal expansion of the reinforcement, Tc is the coefficient of thermal expansion of the chip) 6. In paragraph 1, An electronic component module, wherein the reinforcing plate includes a connecting portion connected to a fence or can installed on the wiring board.
7. In paragraph 1, An electronic component module, wherein the reinforcing plate includes an adhesive injection portion having a chamfered shape at the upper edge of the surface where the reinforcing plate and the semiconductor package come into contact.
8. In paragraph 1, An electronic component module, wherein the gap between the reinforcing plate and the semiconductor package is less than 0.1 mm.
9. In paragraph 1, An electronic component module comprising an underfill between the semiconductor package and the wiring board.
10. A step of mounting a semiconductor package including a plurality of solder balls arranged in a plane on a lower surface on a wiring board; A step of installing a reinforcing plate formed in the shape of a square ring and having an inner surface in contact with a side surface of the semiconductor package; A step of injecting an adhesive between the semiconductor package and the reinforcement plate; and A method for manufacturing an electronic component module, comprising a step of penetrating and curing the adhesive.
11. In paragraph 10, A method for manufacturing an electronic component module, further comprising a step of forming an underfill between the semiconductor package and the wiring board prior to the step of installing the reinforcing plate.
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