Back-contact solar cell structure and manufacturing process therefor

Abstract

A back-contact solar cell structure and a manufacturing process therefor. The back-contact solar cell structure comprises a silicon wafer; a textured surface and a polished surface are alternately provided on the back surface of the silicon wafer; a P-type doped region is formed on the textured surface; a tunnel oxide layer and intrinsic polycrystalline silicon are deposited on the P-type doped region and the whole polished surface; an N-type doped region is locally or completely at the position of the intrinsic polycrystalline silicon corresponding to the polished surface; a semiconductor layer is formed on the intrinsic polycrystalline silicon and the N-type doped region; and a P electrode and an N electrode are formed in the semiconductor layer. The intrinsic polycrystalline silicon is deposited on the back surface for simultaneous passivation of the P-type region and the N-type region, achieving the advantages of being simple and having low costs.

Description

Back contact solar cell structure and manufacturing process thereof Technical Field

[0001] The present invention relates to the technical field of photovoltaic cells, and in particular discloses a back-contact solar cell structure and a manufacturing process thereof. Background Art

[0002] Existing back-contact solar cells require two or more photolithography and etching processes to form P-type and N-type, so the manufacturing cost is higher than other technologies (such as PERC or TopCon). In addition, TopCon and other manufacturing process flows are subject to many limitations when applied to existing production lines. The TBC (TopCon back contact) structure has higher efficiency, but requires photolithography, masking and etching processes to form N-type and P-type polysilicon layers and tunneling silicon oxide (SiO2). In addition, in order to control the current leakage problem at the P-type and N-type contact parts, laser processing is also required.

[0003] In the US2023 / 0307573A1 patent application, a tunnel oxide film and N-type polysilicon are applied to the N-type emitter based on a P-type silicon wafer, while the P-type BSF is formed by a sintering process of an aluminum electrode. This technology is only applicable to P-type silicon wafers. If Al2O3 is used, there will be limitations when passivating the front and back surfaces. In addition, the P electrode is made of aluminum, while the N electrode is still made of silver, so there is a shortcoming in material cost control.

[0004] In view of the above-mentioned defects of existing back-contact solar cells, there is an urgent need to propose a solution for low-cost, high-efficiency back-contact solar cells, aiming to maximize the use of process equipment and process flow of existing TopCon production lines and reduce manufacturing costs.

[0005] Summary of the Invention

[0006] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a back-contact solar cell structure and a manufacturing process thereof.

[0007] On the one hand, the present invention discloses a back-contact solar cell structure, which adopts the following technical solutions:

[0008] A back-contact solar cell structure and a manufacturing process thereof, comprising: a silicon wafer, wherein a textured surface and a polished surface are alternately provided on the back of the silicon wafer, a P-type doped region is formed on the textured surface, a tunneling oxide layer and intrinsic polysilicon are deposited on the P-type doped region and the entire polished surface, an N-type doped region is locally or completely formed on the intrinsic polysilicon at a position corresponding to the polished surface, a semiconductor layer is formed on the intrinsic polysilicon and the N-type doped region, and a P electrode and an N electrode are formed on the semiconductor layer.

[0009] Preferably, the N-electrode is in direct contact with the semiconductor layer on the N-type doping region, and the P-electrode is in direct contact with the semiconductor layer on the P-type doping region or / and is in contact with the P-type doping region.

[0010] Preferably, the N electrode and / or the P electrode are formed of aluminum paste, and the content of silicon in the aluminum paste is 0-20 wt %.

[0011] Preferably, the thickness of the tunnel oxide layer is 1-2 nm, the thickness of the intrinsic polysilicon is 50-300 nm, and the thickness of the semiconductor layer is 60-100 nm.

[0012] Preferably, the material of the semiconductor layer is a combination of one or more layers of TiO2, WO3, MoO3, TeO2, NiO or TiN, and the semiconductor layer contains dopants, the dopant content is 0 to 5 wt%, and the dopants include one or more of aluminum (Al), boron (B), vanadium (V), niobium (Nb), nitrogen (N), and oxygen (O).

[0013] Preferably, an Al2O3 layer and an anti-reflection coating are sequentially formed on the front side of the silicon wafer.

[0014] Preferably, the thickness of the Al2O3 layer is 6 to 10 nm, and the anti-reflection coating is SiN x or SiN x / SiO x The thickness of the anti-reflection coating is SiN x 15~90nm or SiN x / SiO x 15~60nm / 30~100nm.

[0015] On the other hand, the present invention discloses a manufacturing process for a back-contact solar cell structure, which adopts the following technical solution:

[0016] A process for manufacturing a back-contact solar cell structure comprises the following steps:

[0017] S1. Forming a P-type doped region: texturing the back of the silicon wafer to form a textured surface, and then performing boron doping diffusion on the textured surface to form a P-type doped region;

[0018] S2. Locally forming a polished surface: Performing local laser and wet etching on the P-type doped area to form a polished surface, leaving the back side of the silicon wafer partially exposed;

[0019] S3, forming a tunnel oxide layer and intrinsic polysilicon: depositing a tunnel oxide layer and intrinsic polysilicon on the entire surface of the P-type doped region and the polished surface;

[0020] S4, forming an N-type doped region: printing a phosphorus-containing slurry locally or entirely on the polished surface corresponding to the intrinsic polysilicon to form an N-type doped region; and heat-treating the printed slurry after drying to diffuse the phosphorus in the slurry into the intrinsic polysilicon to form phosphorus-doped polysilicon;

[0021] S5. Forming a semiconductor layer: removing the oxide film and slurry residue on the surface, and then depositing a semiconductor layer locally or on the entire surface of the intrinsic polysilicon and the N-type doped region;

[0022] S6. Printing slurry and sintering to form electrodes: Printing slurry on the semiconductor layer and sintering to form a P electrode and an N electrode, wherein the N electrode is in direct contact with the semiconductor layer on the N-type doping region, and the P electrode is in contact with the semiconductor layer on the P-type doping region or / and in contact with the P-type doping region.

[0023] Preferably, in said S1, the boron doping concentration of the P-type doping region is 1E19 / cm3;

[0024] Preferably, in S2, local laser is performed on the P-type doped region to remove BSG and boron doping, the laser pulse time ranges from picoseconds to continuous wave, and the laser energy density is 0.5 J / cm 2 ~10J / cm 2 range; then wet etching is performed using an alkaline solution at a temperature above 45°C to remove laser loss and boron doping in the laser-treated area; a polished surface is formed through local laser and wet etching, exposing part of the silicon wafer, and the surface morphology of the exposed part is flat.

[0025] Preferably, in S3, the tunnel oxide layer is formed by an LPCVD process, a wet process or a thermal diffusion process, and the intrinsic polysilicon is formed by an LPCVD, APCVD, PVD or PECVD process.

[0026] Preferably, in S4, the phosphorus content in the phosphorus slurry is 1E19 / cm 3 ~1E21 / cm 3 After drying, the printing paste is placed in a diffusion furnace for heat treatment. The diffusion temperature is between 840 and 920°C, and the gas used is nitrogen or oxygen-containing nitrogen.

[0027] Preferably, in S5, after annealing, the surface oxide film and slurry residues are removed by wet etching, and then Al2O3 and an anti-reflective coating are deposited on the front side of the silicon wafer by an ALD process; a semiconductor layer is deposited on the back side by a PVD, PECVD, APCVD, LPCVD or ALD process, and hydrogen and NH3 are used for hydrogenation treatment during deposition.

[0028] Preferably, in S6, the slurry is aluminum slurry, the silicon content in the aluminum slurry is 0-20wt%, and the sintering temperature is between 860-920°C.

[0029] Preferably, in S6, a local laser is used to form a contact hole connecting the P-type doped region on the deposited tunneling oxide layer and the intrinsic polysilicon, and then the slurry is printed and sintered to form a P electrode, and the P electrode is in contact with the P-type doped region.

[0030] Compared with the prior art, the present invention has at least the following beneficial effects:

[0031] 1. Simultaneous passivation of polysilicon in P-type and N-type doped regions: The present invention specifically utilizes the back-side deposited intrinsic polysilicon for simultaneous passivation of the P-type region and the N-type region. The tunnel oxide layer and the intrinsic polysilicon form a whole in the P-type doped region and the N-type doped region. The intrinsic polysilicon exists on the P-type doped region, and the intrinsic polysilicon in the N-type doped region is selectively doped with phosphorus to form phosphorus-doped polysilicon, thereby skipping the traditional AlO x The process can form passivation on both P-type and N-type without additional patterning on the P-type area, thus having the advantages of simple and low-cost process;

[0032] 2. By first forming a P-type doped region on the textured surface, and then forming an N-type doped region on the etched polished surface, and covering the entire surface with a tunneling oxide layer and intrinsic polysilicon, the N-type doped region and the P-type doped region are well vertically isolated, thereby having a longer leakage current path. This means that by increasing the length of the leakage current path, the current leakage caused by the contact between the P-type and N-type doped regions can be better eliminated, thereby improving the pseudo-capacitance fill factor (pFF);

[0033] 3. Use low-cost metal electrodes: Based on the traditional electrode sintering process, a semiconductor layer is formed on the polysilicon. Since the semiconductor layer can prevent Al from diffusing into the polysilicon and has good contact resistance with Al, low-cost aluminum electrodes can be used to replace traditional silver electrodes. At the same time, both the P-type and N-type electrodes are replaced with aluminum materials.

[0034] 4. Reducing the thickness of polysilicon: By depositing a semiconductor layer on polysilicon, the N electrode contacts the semiconductor layer instead of the polysilicon layer. Compared with the traditional metal electrode directly contacting the polysilicon, the present invention can reduce the thickness of the polysilicon while ensuring that metal diffusion is avoided;

[0035] 5. Simplify the manufacturing process: Simplify the complex manufacturing process of traditional TBC structure back-contact solar cells, reduce manufacturing costs, and maximize the use of process equipment and process sequences of the TopCon production line so that existing TopCon production lines can be converted to back-contact solar cell production lines in the future. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] FIG1 is a schematic diagram of the overall structure of a back-contact solar cell structure according to Example 1;

[0037] FIG2 is a schematic diagram of steps S1-S2 of the manufacturing process of the back-contact solar cell structure of Example 1;

[0038] FIG3 is a schematic diagram of step S3 of the manufacturing process of the back-contact solar cell structure of Example 1;

[0039] FIG4 is a schematic diagram of step S4 of the manufacturing process of the back-contact solar cell structure of Example 1;

[0040] FIG5 is a schematic diagram of step S5 of the manufacturing process of the back-contact solar cell structure of Example 1;

[0041] FIG6 is a schematic diagram of step S6 of the manufacturing process of the back-contact solar cell structure of Example 1;

[0042] FIG7 is a flow chart of the manufacturing process steps of the back-contact solar cell structure of Example 1, (a) is the process flow chart of the present invention, and (b) is the conventional TopCon process flow chart;

[0043] FIG8 is a comparison chart of open circuit voltages of different materials in the back contact solar cell structure of Example 1;

[0044] FIG9 is a schematic diagram of step S6 of the manufacturing process of the back-contact solar cell structure of Example 4;

[0045] FIG10 is a performance comparison chart of Example 1 and Example 4.

[0046] Description of Figure Numbers:

[0047] 1. Anti-reflective coating; 2. Al2O3; 3. P-type boron-doped region; 4. Tunneling oxide layer; 5. N-type doped region; 6. Intrinsic polysilicon; 7. Semiconductor layer; 8. Metal electrode; 9. Phosphorus slurry. DETAILED DESCRIPTION

[0048] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0049] Example 1

[0050] In this embodiment, referring to FIG1 , a back-contact solar cell structure includes: a silicon wafer, a texturing surface and a polishing surface are alternately provided on the back of the silicon wafer, a P-type doping region 3 is formed on the texturing surface, a tunneling oxide layer 4 and an intrinsic polysilicon 6 are deposited on the entire surface of the P-type doping region 3 and the polishing surface, an N-type doping region 5 is locally formed on the intrinsic polysilicon 6 at a position corresponding to the polishing surface, a semiconductor layer 7 is formed on the intrinsic polysilicon 6 and the N-type doping region 5, and a metal electrode 8, i.e., a P electrode and an N electrode, is formed on the semiconductor layer.

[0051] In this embodiment, referring to Figures 2-6, the manufacturing process of the back contact solar cell structure includes the following steps:

[0052] S1. Forming P-type doped region: Texturing the back of silicon wafer, and then using a traditional diffusion furnace to diffuse boron doping on the back of the silicon wafer after texturing, the boron doping concentration is 1E19 / cm 3 , forming a P-type doping region, the surface morphology of the P-type doping region is velvet;

[0053] S2. Localized polishing: The BSG and boron doping on the back of the silicon wafer are removed by laser. A green laser (wavelength 532nm) with a pulse duration of 10nsec and a laser energy density of 1.5J / cm 2 Then, wet etching is performed using an alkaline solution at a temperature above 45°C to remove laser loss in the laser-treated area and boron doping on the front side. Localized laser and wet etching form a polished surface, leaving the back side of the silicon wafer partially exposed. The surface of the exposed area is flat, unlike the velvet surface of the P-type doped area, as shown in Figure 2.

[0054] S3. Forming a tunnel oxide layer and intrinsic polysilicon: A tunnel oxide layer and intrinsic polysilicon are formed simultaneously by an LPCVD process, covering the velvet area and the flat area as a whole. The thickness of the tunnel oxide layer is about 1.2nm, and the thickness of the intrinsic polysilicon is 50nm. In addition to the LPCVD process to form intrinsic polysilicon, other deposition processes such as APCVD, PVD, and PECVD can also be used. The tunnel oxide layer can also be formed by a wet process or other thermal diffusion process, as shown in Figure 3.

[0055] S4. Forming N-type doped regions: Printing a phosphorus-containing paste on intrinsic polysilicon to form N-type doped regions. The phosphorus content in the phosphorus paste is approximately 1E20 / cm 3 The width of the printed area is smaller than the width of the laser-etched area (i.e., the width of the polished surface), so that intrinsic polysilicon is left between the N-type doped area and the P-type doped area as a barrier to avoid contact with the P-type doped area. After drying, the printed paste is placed in a diffusion furnace for heat treatment at a diffusion temperature of 920°C. Nitrogen or oxygen-containing nitrogen is used as the gas, so that the phosphorus in the paste diffuses into the intrinsic polysilicon to form phosphorus-doped polysilicon, as shown in Figure 4.

[0056] S5. Forming the semiconductor layer: After annealing, the surface oxide film and slurry residue are removed by wet etching, and then Al2O3 and anti-reflective coating are deposited on the front of the silicon wafer by ALD process. The deposition thickness of the Al2O3 layer is 8nm, and the anti-reflective coating is SiN x The thickness of the anti-reflective coating is 90nm; a semiconductor layer is formed on the back side by deposition. The material of the semiconductor layer is TiO2. The deposition thickness of the semiconductor layer is 60nm. The deposition process is LPCVD, which can also be PVD, PECVD, APCVD, or ALD. During the deposition, hydrogen and NH3 are used for hydrogenation treatment, as shown in Figure 5;

[0057] S6. Printing and sintering slurry to form electrodes: A slurry is printed on the semiconductor layer and sintered to form a P electrode and an N electrode. The N electrode directly contacts the semiconductor layer above the N-type doped region, and the P electrode contacts the semiconductor layer above the P-type doped region. The slurry is aluminum slurry with a silicon content of 0 wt%. The sintering temperature is 920°C (see Figure 6).

[0058] The present invention forms a P-type doped region on the textured surface. The textured surface can effectively reduce the reflectivity under light irradiation and improve its double-sidedness. Due to its large surface area, the textured surface is more likely to establish a larger contact area with the electrode. This is different from the existing P-type polysilicon (about 1E20 / cm2) formed by direct contact passivation on polysilicon. 3 ), the boron doping concentration of the P-type doping region of the present invention is lower (about 1E19 / cm 3 ), which helps to reduce leakage current.

[0059] On the texturing side, a recessed flat surface is formed by laser wet etching, and then a tunnel oxide layer and intrinsic polysilicon are deposited to form a localized N-type doping area. This special structure can achieve better vertical isolation between the P-type doping area and the N-type doping area. The tunnel oxide layer and intrinsic polysilicon improve the leakage current path between the P-type doping area and the N-type doping area, thereby better controlling the leakage circuit.

[0060] Figure 7 shows the process flow of the technology proposed in this invention. The advantage of this invention is that the process equipment and process flow are similar to those of the existing TopCon production line, so it is very easy to upgrade to a production line for back-contact solar cells in the future without adding additional processes. And because the existing production line can be directly utilized, there is no need to expand the equipment area of ​​the production line. In addition, since aluminum can be used as the electrode material for both P-type and N-type doped regions, the cost reduction of electrode materials is very significant compared to PERC (aluminum only on the back) or TopCon (silver on both the front and back).

[0061] FIG8 shows the passivation characteristics of intrinsic polysilicon on a silicon wafer proposed in the present invention. The P-type region of the present invention is formed by utilizing boron diffusion in the silicon wafer through the existing process, while the N-type region uses a tunnel oxide layer and intrinsic polysilicon passivation contact. In particular, the passivation of the P-type region can be achieved by using intrinsic polysilicon to skip the AlO x As shown in the figure, intrinsic polysilicon exhibits excellent passivation characteristics similar to Al2O3 and is even better than SiN x This indicates that the grain boundaries present in polysilicon can easily contain a large amount of hydrogen to effectively passivate defects at the interface between the intrinsic polysilicon and the wafer.

[0062] Example 2

[0063] The difference from Example 1 is that in S5 , a semiconductor layer 7 is formed on the back surface by deposition, and the material of the semiconductor layer 7 is WO 3 .

[0064] Example 3

[0065] The difference from Example 1 is that in S5, semiconductor layer 7 is formed on the back surface by deposition. Semiconductor layer 7 is a double layer, including, from the silicon wafer outward, a first semiconductor layer and a second semiconductor layer. In S5, the first semiconductor layer is first deposited on the back surface. The material of the first semiconductor layer is TiO2, and the deposition thickness of the first semiconductor layer is 50nm. Then, the second semiconductor layer is deposited on the first semiconductor layer. The material of the second semiconductor layer is WO3, and the deposition thickness of the second semiconductor layer is 40nm.

[0066] Example 4

[0067] The difference from Example 1 is that, as shown in FIG9 , in S6 , before the metallization process, local laser treatment is used to form a contact hole connecting the P-type doped region on the deposited tunneling oxide layer and the intrinsic polysilicon. The laser wavelength is 355 nm, the pulse duration is 10 psec, and the energy density range is 0.3 to 1.0 J / cm2. The energy density can be adjusted according to the surface structure and its reflectivity. In other embodiments, it can also be formed by other lasers, such as a green laser with a nanosecond pulse duration. After the contact hole is formed by the local laser, aluminum paste is printed and sintered to form a P electrode, which contacts the P-type doped region 3.

[0068] Different from the metal electrode 8 in Example 1 that contacts the semiconductor layer 7, the metal electrode 8 in Example 4 directly contacts the P-type doped region 3. During the sintering process, the aluminum metal electrode reacts with silicon to form aluminum-doped silicon (P-type doping) in the contact area, as shown in Figure 10. This improves the contact characteristics and reduces the contact resistance while preventing the control line resistance from being too high.

[0069] The technical solution provided by the present invention is introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A back contact solar cell structure, characterized in that: include: A silicon wafer, wherein a textured surface and a polished surface are alternately provided on the back side of the silicon wafer, a P-type doped region is formed on the textured surface, a tunneling oxide layer and intrinsic polysilicon are deposited on the P-type doped region and the entire polished surface, an N-type doped region is locally or completely formed on the intrinsic polysilicon at a position corresponding to the polished surface, a semiconductor layer is formed on the intrinsic polysilicon and the N-type doped region, and a P electrode and an N electrode are formed on the semiconductor layer.

2. The back-contact solar cell structure according to claim 1, characterized in that: The N-electrode is in direct contact with the semiconductor layer on the N-type doping region, and the P-electrode is in direct contact with the semiconductor layer on the P-type doping region or / and is in contact with the P-type doping region.

3. The back-contact solar cell structure according to claim 1, characterized in that: The N electrode and / or the P electrode are formed of aluminum paste, and the content of silicon in the aluminum paste is 0-20 wt %.

4. The back-contact solar cell structure according to claim 1, characterized in that: The thickness of the tunnel oxide layer is 1-2 nm, the thickness of the intrinsic polysilicon is 50-300 nm, and the thickness of the semiconductor layer is 60-100 nm.

5. The back-contact solar cell structure according to claim 1, characterized in that: The material of the semiconductor layer is a combination of one or more layers of TiO2, WO3, MoO3, TeO2, NiO or TiN, and the semiconductor layer contains dopants, the dopant content of which is 0 to 5 wt%, and the dopants include one or more of aluminum (Al), boron (B), vanadium (V), niobium (Nb), nitrogen (N), and oxygen (O).

6. The back-contact solar cell structure according to claim 1, characterized in that: An Al2O3 layer and an anti-reflection coating are sequentially formed on the front side of the silicon wafer.

7. The back-contact solar cell structure according to claim 6, characterized in that: The thickness of the Al2O3 layer is 6 to 10 nm, and the anti-reflection coating is SiN x or SiN x / SiO x The thickness of the anti-reflection coating is SiN x 15~90nm or SiN x / SiO x 15~60nm / 30~100nm.

8. A process for manufacturing a back-contact solar cell structure according to any one of claims 1 to 7, characterized in that: The following steps are involved: S1. Forming a P-type doped region: texturing the back of the silicon wafer to form a textured surface, and then performing boron doping diffusion on the textured surface to form a P-type doped region; S2. Locally forming a polished surface: Performing local laser and wet etching on the P-type doped area to form a polished surface, leaving the back side of the silicon wafer partially exposed; S3, forming a tunnel oxide layer and intrinsic polysilicon: depositing a tunnel oxide layer and intrinsic polysilicon on the entire surface of the P-type doped region and the polished surface; S4, forming an N-type doped region: printing a phosphorus-containing slurry locally or entirely on the corresponding polished surface positions on the intrinsic polycrystalline silicon to form an N-type doped region; The printed paste is heat-treated after drying to diffuse the phosphorus in the paste into the intrinsic polysilicon to form phosphorus-doped polysilicon; S5. Forming a semiconductor layer: removing the oxide film and slurry residue on the surface, and then depositing a semiconductor layer locally or on the entire surface of the intrinsic polysilicon and the N-type doped region; S6. Printing slurry and sintering to form electrodes: Printing slurry on the semiconductor layer and sintering to form a P electrode and an N electrode, wherein the N electrode is in direct contact with the semiconductor layer on the N-type doping region, and the P electrode is in contact with the semiconductor layer on the P-type doping region or / and in contact with the P-type doping region.

9. The manufacturing process of a back-contact solar cell structure according to claim 8, characterized in that: In S1, the boron doping concentration of the P-type doping region is 1E19 / cm 3 ; In S2, local laser is performed on the P-type doped area to remove BSG and boron doping. The laser pulse time ranges from picoseconds to continuous wave, and the laser energy density is 0.5 J / cm 2 ~10J / cm 2 Then, wet etching is performed using an alkaline solution at a temperature above 45°C to remove the laser loss and boron doping in the laser-treated area. After local laser and wet etching, a polished surface is formed, exposing part of the silicon wafer, and the surface morphology of the exposed part is flat. In S3, the tunnel oxide layer is formed by an LPCVD process, a wet process, or a thermal diffusion process, and the intrinsic polysilicon is formed by an LPCVD, APCVD, PVD, or PECVD process; In S4, the phosphorus content in the phosphorus slurry is 1E19 / cm 3 ~1E21 / cm 3 After drying, the printing paste is placed in a diffusion furnace for heat treatment. The diffusion temperature is between 840 and 920°C, and the gas used is nitrogen or oxygen-containing nitrogen. In S5, after annealing, the oxide film and slurry residue on the surface are removed by wet etching, and then Al2O3 and an anti-reflective coating are deposited on the front side of the silicon wafer by an ALD process; The semiconductor layer is formed by PVD, PECVD, APCVD, LPCVD or ALD process on the back side. During the deposition, hydrogen, NH3 Performing hydrotreatment; In the step S6, the slurry is aluminum slurry, the silicon content in the aluminum slurry is 0-20 wt%, and the sintering temperature is between 860-920°C.

10. The manufacturing process of a back-contact solar cell structure according to claim 9, characterized in that: In S6, a local laser is used to form a contact hole connecting the P-type doped region on the deposited tunnel oxide layer and the intrinsic polysilicon, and then a slurry is printed and sintered to form a P electrode, and the P electrode is in contact with the P-type doped region.

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