Preparation for microcrystalline silicon film material, preparation for solar cell, solar cell, and use

Abstract

Provided are preparation for a microcrystalline silicon film material, preparation for a solar cell, a solar cell, and a use. By means of the preparation method for a microcrystalline silicon film material, a microcrystalline silicon film material having an expected structure can be prepared at low costs, and a low-cost and high-efficiency preparation method for a solar cell can be obtained by means of the preparation for a microcrystalline silicon film material. In addition, the solar cell provided by embodiments of the present application can be used for providing a solar cell module having high photoelectric conversion efficiency.

Description

Preparation of microcrystalline silicon film materials and solar cells, solar cells and their applications

[0001] Priority information

[0002] This application claims priority and benefits of patent application No. 202410384611.4 filed with the State Intellectual Property Office of China on March 29, 2024, and the entire text of which is incorporated herein by reference. Technical Field

[0003] The present application relates to the field of solar cells and their preparation technology, and specifically to the preparation of microcrystalline silicon film materials and solar cells, as well as solar cells and their applications. Background Art

[0004] Heterojunction solar cells are widely popular due to their high conversion efficiency, low light-induced degradation, and good temperature characteristics. Heterojunction solar cells generally consist of a silicon substrate and a first doped amorphous silicon layer and a second doped amorphous silicon layer disposed on opposite sides of the silicon substrate. In related technologies, to improve charge mobility and reduce parasitic absorption effects in solar cells, the industry has attempted to adjust the process by replacing the first and / or second doped amorphous silicon layers with microcrystalline silicon layers with a certain degree of crystallinity.

[0005] However, in the related art, microcrystalline silicon film materials are not only difficult to prepare, costly, and require strict process requirements, but also have a long preparation cycle, making them difficult to promote and apply on a large scale. Therefore, there is an urgent need to provide a new method for preparing microcrystalline silicon film materials to provide a low-cost solar cell.

[0006] Summary of the Invention

[0007] In view of this, embodiments of the present application provide methods for preparing microcrystalline silicon films and solar cells, as well as solar cells and their applications. The methods for preparing microcrystalline silicon films can produce microcrystalline silicon films with a desired structure at a relatively low cost, and utilizing the aforementioned microcrystalline silicon film preparation method can provide a low-cost, high-efficiency method for preparing solar cells. Furthermore, the solar cells provided in embodiments of the present application can be used to provide a solar cell module with a relatively high photoelectric conversion efficiency.

[0008] A first aspect of the present application provides a method for preparing a microcrystalline silicon film, comprising:

[0009] Silicon crystal nanoparticles and a first raw material containing a silicon source are spread on the surface of the carrier to form a microcrystalline silicon film material on the surface of the carrier.

[0010] During the deposition of the first raw material, the above-mentioned silicon crystal nanoparticles act as crystal seeds to induce the growth of a silicon source on its surface. Compared with the seed layer used in the related art, the silicon source can only contact the surface of the seed layer away from the carrier during deposition. In the deposition process of the preparation method provided in the embodiment of the present application, the entire surface of the silicon crystal nanoparticles (crystal seeds) can be in contact with the silicon source. Therefore, the contact area between the silicon source and the crystal seed is significantly improved, which can improve the deposition efficiency of silicon atoms and reduce the difficulty of deposition. In addition, because silicon can be deposited on the entire surface of the silicon crystal nanoparticles, if only amorphous silicon is deposited at this time, a mixture of the two can also obtain a microcrystalline silicon film material with a target crystallization rate, thereby avoiding the direct deposition and growth of microcrystalline silicon. The preparation of the microcrystalline silicon film material no longer requires strict requirements such as high reducing gas flow, high power and high pressure, so the preparation difficulty and production cost of the microcrystalline silicon film material can be greatly reduced.

[0011] In some embodiments of the present application, distributing silicon crystal nanoparticles and a first raw material containing a silicon source onto the surface of the carrier includes:

[0012] The carrier is placed in a reaction chamber of a deposition device, the silicon crystal nanoparticles are sprayed onto the surface of the carrier, and the first raw material is introduced into the reaction chamber at the same time.

[0013] In some embodiments of the present application, distributing silicon crystal nanoparticles on the surface of the carrier includes:

[0014] The slurry containing the silicon crystal nanoparticles is sprayed onto the surface of the carrier; the content of the silicon crystal nanoparticles in the slurry is 10g / L-100g / L; the single-side spraying volume of the slurry is 2mL / cm 2 -5mL / cm 2 .

[0015] In some embodiments of the present application, the slurry includes a first solvent and the silicon crystal nanoparticles dispersed in the first solvent, and the first solvent includes one or more of dimethylformamide, dimethyl sulfoxide, and n-butanol.

[0016] In some embodiments of the present application, the silicon crystal nanoparticles are prepared by the following method: dispersing silicate in a second solvent to obtain a silicate solution, adjusting the pH value of the silicate solution to 2-4, performing a first heating, then adjusting the pH value of the silicate solution to 6-8, performing a second heating, dialyzing, and drying to obtain a gel, and calcining the gel to obtain silicon nanoparticles; wherein the second solvent is selected from water and / or alcohols; the temperature of the first heating is 60°C-90°C, and the heating time is 1h-3h; the temperature of the second heating is 60°C-90°C, and the heating time is 1h-2.5h; the calcination temperature is 600°C-900°C.

[0017] In some embodiments of the present application, the silicate solution further includes a salt containing a doping element, wherein the doping element includes at least one of phosphorus, arsenic and antimony, or the doping element includes at least one of boron, aluminum and gallium.

[0018] In some embodiments of the present application, distributing silicon crystal nanoparticles and a first raw material containing a silicon source onto the surface of the carrier includes:

[0019] The carrier is placed in a reaction chamber of a deposition device, the silicon crystal nanoparticles are sprayed onto the surface of the carrier, and the first raw material is introduced into the reaction chamber at the same time. The power of the deposition device is 200W-3000W, the pressure in the reaction chamber is 1mbar-3mbar, the temperature in the reaction chamber is 120℃-210℃, and the deposition time is 30s-200s; the first raw material includes the silicon source and reducing gas, the flow rate of the silicon source is 10sccm-500sccm, and the flow rate of the reducing gas is 200sccm-8000sccm.

[0020] In some embodiments of the present application, the first raw material further includes a doping element source to obtain an N-type microcrystalline silicon film material or a P-type microcrystalline silicon film material.

[0021] A second aspect of the embodiments of the present application provides a method for preparing a solar cell, comprising:

[0022] Providing a substrate, wherein the substrate has a first surface and a second surface disposed opposite to each other along a thickness direction thereof; the substrate comprises a silicon substrate layer;

[0023] Spreading silicon crystal nanoparticles and a second raw material onto the first surface to form a first film layer on the first surface, wherein the second raw material includes a silicon source, a reducing gas, and a first doping element source; and / or spreading silicon crystal nanoparticles and a third raw material onto the second surface to form a second film layer on the second surface, wherein the third raw material includes a silicon source, a reducing gas, and a second doping element source, to obtain a solar cell;

[0024] Among them, one of the first doping element source and the second doping element source is selected from at least one of a phosphorus element source, an arsenic element source and an antimony element source, and the other is selected from at least one of a boron element source, an aluminum element source and a gallium element source.

[0025] When the second raw material and / or the third raw material are deposited, the above-mentioned silicon crystal nanoparticles act as seeds to induce the growth of a silicon source on their surface. Compared with the seed layer with a crystallization rate of 10%-15% used in the related art, the silicon source can only contact the surface of the seed layer (seed) away from the substrate during deposition; and in the deposition process of the embodiment of the present application, the entire surface of the silicon crystal nanoparticles can contact the silicon source, so the contact area between the silicon source and the seed is significantly improved, which can improve the deposition efficiency of silicon atoms and reduce the difficulty of deposition. In addition, because silicon can be deposited on the entire surface of the silicon crystal nanoparticles, if only amorphous silicon is deposited at this time, a mixture of the two can also obtain a first film layer and / or a second film layer with a target crystallization rate, thereby avoiding the direct deposition and growth of microcrystalline silicon. In addition, in its preparation process, strict requirements such as high reducing gas flow, high power and high pressure are no longer required. Therefore, the preparation difficulty and production cost of solar cells with microcrystalline silicon layers can be greatly reduced, which is beneficial to the promotion and application of solar cells with double-sided microcrystalline structures. In addition, the solar cell produced by the above preparation method does not have a seed layer in the related art between the first film layer and the silicon base layer, and / or does not have a seed layer in the related art between the second film layer and the silicon base layer.

[0026] In some embodiments of the present application, the silicon crystalline nanoparticles dispersed on the first surface contain a first doping element, and / or the silicon crystalline nanoparticles dispersed on the second surface contain a second doping element.

[0027] In some embodiments of the present application, the particle size of the silicon crystal nanoparticles is ≤30 nm.

[0028] In some embodiments of the present application, distributing silicon crystal nanoparticles and the second raw material to the first surface includes: placing the substrate in a reaction chamber of a deposition device, and introducing the silicon source, a first doping element source, and a reducing gas into the reaction chamber while distributing the silicon crystal nanoparticles on the first surface, wherein the first doping element source is selected from at least one of a phosphorus source, an arsenic source, and an antimony source; the power of the deposition device is 200W-3000W, the pressure in the reaction chamber is 1mbar-3mbar, the temperature in the reaction chamber is 130°C-210°C, and the deposition time is 30s-150s; the flow rate of the silicon source is 50sccm-1000sccm, the flow rate of the first doping element source is 1sccm-80sccm, and the flow rate of the reducing gas is 500sccm-4000sccm;

[0029] and / or,

[0030] The process of spreading silicon crystal nanoparticles and a third raw material on the second surface includes: placing the substrate in a reaction chamber of a deposition device, and introducing the silicon source, a second doping element source, and a reducing gas into the reaction chamber while dispersing the silicon crystal nanoparticles on the second surface, wherein the second doping element source is selected from at least one of a boron source, an aluminum source, and a gallium source; the power of the deposition device is 500W-3000W, the deposition pressure is 1mbar-3mbar, the deposition temperature is 120℃-200℃, and the deposition time is 30s-200s; the flow rate of the silicon source is 50sccm-500sccm, the flow rate of the second doping element source is 1sccm-100sccm, and the flow rate of the reducing gas is 200sccm-8000sccm.

[0031] According to a third aspect of the embodiments of the present application, there is provided a solar cell comprising a substrate, an N-type silicon layer, and a P-type silicon layer; wherein the substrate comprises a silicon substrate layer, or comprises a silicon substrate layer and a passivation layer respectively disposed on opposite sides of the silicon substrate layer; the N-type silicon layer and the P-type silicon layer are disposed on opposite sides of the substrate in a thickness direction and are both in direct contact with the silicon substrate layer, or the N-type silicon layer and the P-type silicon layer are respectively connected to the silicon substrate layer via the passivation layer;

[0032] The N-type silicon layer is an N-type microcrystalline silicon layer, and the crystallization rate of the N-type microcrystalline silicon layer within a thickness range of at least 2 nm close to the substrate is greater than 15%; and / or, the P-type silicon layer is a P-type microcrystalline silicon layer, and the crystallization rate of the P-type microcrystalline silicon layer within a thickness range of at least 2 nm close to the substrate is greater than 15%.

[0033] The above-mentioned solar cell can achieve high photoelectric conversion efficiency, has low production cost and good market prospects.

[0034] In some embodiments of the present application, the crystallization rate of the N-type microcrystalline silicon layer is 40%-65%, and / or the crystallization rate of the P-type microcrystalline silicon layer is 40%-65%.

[0035] In some embodiments of the present application, the thickness of the N-type microcrystalline silicon layer is 10 nm-30 nm; the thickness of the P-type microcrystalline silicon layer is 15 nm-40 nm.

[0036] In some embodiments of the present application, the material of the passivation layer includes at least one of intrinsic amorphous silicon, amorphous silicon oxide and silicon carbide.

[0037] In some embodiments of the present application, the first transparent conductive oxide layer and the first electrode are stacked in sequence on the surface of the N-type silicon layer facing away from the substrate, and the second transparent conductive oxide layer and the second electrode are stacked in sequence on the surface of the P-type silicon layer facing away from the substrate.

[0038] The fourth aspect of the embodiment of the present application provides a solar cell assembly, comprising a plurality of solar cells produced by the method for producing solar cells provided in the second aspect of the embodiment of the present application, or comprising a plurality of solar cells provided in the third aspect of the embodiment of the present application, wherein the plurality of solar cells are electrically connected.

[0039] Due to the use of the aforementioned solar cell, the solar cell assembly has high photoelectric conversion efficiency and excellent safety, which is conducive to the application of solar cells, especially the application of solar cells with a double-sided microcrystalline structure. Furthermore, when the aforementioned solar cell is produced using the preparation method provided in the embodiments of the present application, the production cost of the aforementioned solar cell assembly is also relatively low.

[0040] A fifth aspect of an embodiment of the present application provides a photovoltaic system, including electrically connected photovoltaic components and an energy storage system, wherein the photovoltaic components include the solar cell components provided in the fourth aspect of the embodiment of the present application.

[0041] The photovoltaic system provided in the embodiments of the present application has excellent comprehensive performance, high photoelectric conversion efficiency, and good market competitiveness. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] The above and / or additional aspects and advantages of the present disclosure will become apparent and readily understood from the description of the embodiments with reference to the following drawings, in which:

[0043] FIG1 is a substrate with silicon crystal nanoparticles dispersed on its surface involved in a method for preparing a solar cell provided in one embodiment of the present application;

[0044] FIG2 is a solar cell produced by the method for producing a solar cell provided in one embodiment of the present application;

[0045] FIG3 is a substrate with silicon crystal nanoparticles dispersed on its surface involved in a method for preparing a solar cell provided in another embodiment of the present application;

[0046] FIG4 is a solar cell produced by a method for producing a solar cell according to another embodiment of the present application. DETAILED DESCRIPTION

[0047] Currently, heterojunction solar cells typically consist of a silicon substrate layer and amorphous silicon layers disposed on opposite sides of the silicon substrate to achieve optimal passivation. The two amorphous silicon layers are each provided with an N-type silicon layer and a P-type silicon layer on opposite sides of the silicon substrate, forming a heterojunction structure. Typically, the N-type and P-type silicon layers are amorphous silicon layers. However, the amorphous structure results in low electron mobility and numerous defects, resulting in severe parasitic absorption effects in the visible light band, limiting the solar cell's photoelectric conversion efficiency. To address the aforementioned technical issues, the industry has replaced at least one of the N-type amorphous silicon layer and the P-type amorphous silicon layer with a microcrystalline silicon layer. However, in the related art, to obtain the microcrystalline silicon layer, a silicon seed layer with a crystallization rate of 10%-15% must first be formed on the substrate before the microcrystalline silicon layer is deposited. During the deposition process, the silicon source can only contact the surface of the silicon seed layer, and the microcrystalline silicon must grow in a high-concentration hydrogen environment, resulting in reduced microcrystalline silicon growth efficiency and high production costs. In addition, the simultaneous deposition of the dopant element source reduces the regularity of the silicon atomic arrangement, necessitating a controlled reduction in the concentration of the dopant element source during deposition. This further limits the growth rate of the N-type and P-type silicon layers, further hindering the production and large-scale application of solar cells, especially those with a double-sided microcrystalline structure. Furthermore, the seed layer in the related art remains in the final solar cell. Furthermore, the use of a seed layer to induce crystallization results in thicker N-type and P-type silicon layers. In summary, the essence of the above technical problems is the lack of a low-cost, high-efficiency method for preparing microcrystalline silicon film materials.

[0048] In order to solve the above technical problems, the present invention provides a method for preparing a microcrystalline silicon film material, comprising:

[0049] Silicon crystal nanoparticles and a first raw material containing a silicon source are spread on the surface of the carrier to form a microcrystalline silicon film material on the surface of the carrier.

[0050] In the embodiment of the present application, microcrystals include fine crystals with a size less than or equal to micrometers. Microcrystalline silicon film material refers to a film material containing microcrystalline silicon.

[0051] During the deposition of the first raw material, the above-mentioned silicon crystal nanoparticles can be used as crystal seeds to induce the growth of a silicon source on its surface. Compared with the seed layer used in the related art, the silicon source can only contact the surface of the seed layer away from the carrier during deposition. In the deposition process of the preparation method provided in the embodiment of the present application, the entire surface of the silicon crystal nanoparticles (crystal seeds) can be in contact with the silicon source. Therefore, the contact area between the silicon source and the crystal seed is significantly improved, which can improve the deposition efficiency of silicon atoms and reduce the difficulty of deposition. In addition, because silicon can be deposited on the entire surface of the silicon crystal nanoparticles, if only amorphous silicon is deposited at this time, a mixture of the two can also obtain a microcrystalline silicon film material with a target crystallization rate, thereby avoiding direct deposition and growth of microcrystalline silicon, and then the preparation of microcrystalline silicon film material no longer requires strict requirements such as high reducing gas flow, high power and high pressure, so the preparation difficulty and production cost of microcrystalline silicon film material can be greatly reduced. It is understandable that if a person skilled in the art wants to choose to directly grow microcrystalline silicon on the surface of a carrier dispersed with silicon crystal nanoparticles, it is also feasible.

[0052] The above preparation method is simple to operate, has strong process reliability, high production efficiency, and is suitable for large-scale industrial production. In some embodiments of the present application, when preparing microcrystalline silicon film materials of the same specifications (same size, same crystallization rate, same material), the mass production efficiency can be improved by an average of more than 0.5% compared with the related technology. In the embodiments of the present application, the above preparation method is highly flexible, and those skilled in the art can adjust the amount of silicon crystal nanoparticles according to actual production needs, so as to flexibly control the crystallization rate of the final microcrystalline silicon film material. In the embodiments of the present application, the above preparation method of microcrystalline silicon film material is suitable for preparing microcrystalline silicon film materials with doped elements, for example, N-type microcrystalline silicon film materials, P-type microcrystalline silicon film materials, and is also suitable for producing intrinsic microcrystalline silicon film materials.

[0053] In addition, by using silicon nanoparticles to induce the deposition of silicon atoms, the shape, size and surface micro-nanostructure of the grains in the final microcrystalline silicon film can be controlled by regulating the lattice arrangement and orientation of the seed crystal, thereby improving the interface contact performance of the microcrystalline film.

[0054] In order to enable the silicon crystalline nanoparticles to better induce the deposition of silicon atoms on their surface and improve the uniformity of the produced microcrystalline silicon film, in some embodiments of the present application, the above-mentioned dispersing of the silicon crystalline nanoparticles and the first raw material containing a silicon source on the surface of the carrier includes:

[0055] The carrier is placed in a reaction chamber of a deposition device, silicon crystal nanoparticles are sprayed onto the surface of the carrier, and the first raw material is introduced into the reaction chamber at the same time.

[0056] In the embodiment of the present application, the above-mentioned deposition equipment can be an equipment used for deposition processes well known to technicians in the field, including but not limited to very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD), radio frequency plasma enhanced chemical vapor deposition (RF-PEVCD), direct current plasma enhanced chemical vapor deposition (DC-PECVD), hot wire chemical vapor deposition (HWCVD), low pressure chemical vapor deposition (LPCVD), electron cyclotron resonance chemical vapor deposition (ECRCVD), expanded thermal plasma deposition (ETP), etc.

[0057] In order to evenly spray the silicon crystal nanoparticles on the surface of the carrier, in some embodiments of the present application, the spreading of the silicon crystal nanoparticles on the surface of the carrier includes: spraying a slurry containing the silicon crystal nanoparticles on the surface of the carrier.

[0058] Considering the stability of the slurry and the rapid volatilization of the first solvent in the slurry after spraying, so that dry silicon nanoparticles are distributed on the surface of the carrier, in some embodiments of the present application, the first solvent is selected from a highly polar solvent, including but not limited to at least one of dimethylformamide, dimethyl sulfoxide, and n-butanol. Specifically, the silicon nanoparticle powder is added to the first solvent and stirred and dispersed to obtain a slurry containing silicon nanoparticles.

[0059] In some embodiments of the present application, the content of the silicon crystalline nanoparticles in the slurry is 10g / L-100g / L. In this way, the slurry has good stability, is not prone to agglomeration of the silicon crystalline nanoparticles, and is more conducive to the uniform dispersion of the final silicon crystalline nanoparticles on the carrier surface. Specifically, the content of the silicon crystalline nanoparticles in the slurry can be, but is not limited to, 10g / L, 12g / L, 15g / L, 20g / L, 25g / L, 30g / L, 35g / L, 40g / L, 45g / L, 50g / L, 55g / L, 60g / L, 65g / L, 70g / L, 75g / L, 80g / L, 85g / L, 90g / L, 95g / L, or 100g / L.

[0060] In some embodiments of the present application, the single-side spraying amount of the slurry on the carrier is 2 mL / cm 2 -5mL / cm 2 In other words, the slurry is sprayed onto the surface of the carrier, and the amount of the slurry sprayed satisfies the requirement that the amount of slurry sprayed on one side of the carrier is 2 mL / cm 2 -5mL / cm 2 In this way, it is easy to spray the target amount of silicon crystal nanoparticles on the surface of the carrier, and it is also beneficial to the rapid volatilization of the first solvent in the slurry, thereby improving production efficiency. Specifically, the single-side spraying amount of the slurry on the carrier can be, but is not limited to, 2.0 mL / cm 2, 2.2mL / cm 2 , 2.5mL / cm 2 , 2.8mL / cm 2 , 3.0mL / cm 2 , 3.2mL / cm 2 , 3.5mL / cm 2 、3.8mL / cm 2 , 4.0mL / cm 2 , 4.2mL / cm 2 , 4.5mL / cm 2 , 4.8mL / cm 2 , 5.0mL / cm 2 .

[0061] In some specific embodiments of the present application, the content of silicon crystal nanoparticles in the slurry is 10g / L-100g / L, and the single-side spraying amount of the slurry on the carrier surface is 2mL / cm 2 -5mL / cm 2 In this way, it is easy to obtain a microcrystalline silicon film material with a relatively high crystallization rate, for example, a microcrystalline silicon film material with a crystallization rate of 40%-65%.

[0062] In some embodiments of the present application, distributing silicon crystal nanoparticles and a first raw material containing a silicon source onto the surface of a carrier includes:

[0063] The carrier is placed in the reaction chamber of the deposition equipment, the silicon crystal nanoparticles are sprayed onto the surface of the carrier, and the first raw material is introduced into the reaction chamber at the same time. The power of the deposition equipment is 200W-3000W, the pressure in the reaction chamber is 1mbar-3mbar, and the temperature in the reaction chamber is 120℃-210℃. In this way, the occurrence of film explosion can be effectively avoided, and it is easy to obtain a microcrystalline silicon film material with a target crystallization rate. In the field of microcrystalline silicon preparation, the above process conditions are relatively mild, easy to implement and have low energy consumption. Specifically, the power of the deposition equipment can be, but is not limited to, 200W, 500W, 800W, 1000W, 1200W, 1500W, 1800W, 2000W, 2200W, 2500W, 2800W, and 3000W. The pressure in the reaction chamber can be, but is not limited to, 1.0 mbar, 1.2 mbar, 1.5 mbar, 1.8 mbar, 2.0 mbar, 2.2 mbar, 2.5 mbar, 2.8 mbar, or 3.0 mbar. The temperature in the reaction chamber can be, but is not limited to, 120°C, 130°C, 140°C, 150°C, 160°C, 170°C, 180°C, 190°C, 200°C, or 210°C. In particular, when the microcrystalline silicon film is directly prepared on a solar cell substrate, the above temperature will not damage the performance of the solar cell substrate, thereby facilitating the performance of the final solar cell. Furthermore, the deposition time for depositing the first raw material on the carrier surface is 30s-200s. Specifically, the deposition time can be, but is not limited to, 30s, 50s, 70s, 60s, 80s, 100s, 120s, 150s, 180s, or 200s. In some specific embodiments, a carrier is placed in a reaction chamber of a deposition device, a slurry containing silicon crystal nanoparticles is sprayed onto the surface of the carrier, and the first raw material is introduced into the reaction chamber at the same time; wherein the content of the silicon crystal nanoparticles in the slurry is 10 g / L-100 g / L, and the single-side spraying volume of the slurry on the carrier is 2 mL / cm 2 -5mL / cm 2 The deposition equipment has a power of 200W-3000W, a pressure of 1mbar-3mbar, a temperature of 120°C-210°C, and a deposition time of 30s-200s. This method can produce a microcrystalline silicon film with a crystallization rate of 40%-65%.

[0064] It is understandable that when depositing silicon atoms, in addition to a silicon source, it is generally necessary to simultaneously introduce a reducing gas into the device (that is, the first raw material also includes a reducing gas). The reducing gas generally includes hydrogen. The flow rates of the silicon source and the reducing gas will also affect the growth rate of the microcrystalline silicon film material. In some embodiments of the present application, the flow rate of the silicon source is 10sccm-500sccm, and the flow rate of the reducing gas (for example, hydrogen) is 200sccm-8000sccm. The above-mentioned hydrogen flow rate is easy to implement, which is beneficial to the preparation of microcrystalline silicon film materials. Specifically, the above-mentioned silicon source includes but is not limited to one or more of silane, silicon tetrachloride, trichlorosilane, and dichlorosilane. The flow rate of the silicon source can be, but is not limited to, 10sccm, 50sccm, 100sccm, 200sccm, 300sccm, 400sccm, and 500sccm. The flow rate of hydrogen gas may be, but is not limited to, 200 sccm, 300 sccm, 400 sccm, 500 sccm, 800 sccm, 1000 sccm, 2000 sccm, 3000 sccm, 4000 sccm, 5000 sccm, 6000 sccm, 7000 sccm, or 8000 sccm.

[0065] In some embodiments of the present application, distributing silicon crystal nanoparticles and a first raw material containing a silicon source onto the surface of a carrier includes:

[0066] The carrier is placed in the reaction chamber of the deposition equipment, the first raw material is introduced into the reaction chamber, and a slurry containing silicon crystal nanoparticles is sprayed on the surface of the carrier. The content of the silicon crystal nanoparticles in the slurry is 10g / L-100g / L, and the slurry spraying volume on a single side of the carrier is 2mL / cm 2 -5mL / cm 2 The deposition equipment has a power of 200W-3000W, a pressure of 1mbar-3mbar in the reaction chamber, a temperature of 120°C-210°C, and a deposition time of 30s-200s. The first raw material includes a silicon source and a reducing gas, with the silicon source flowing at a rate of 10sccm-500sccm and the reducing gas flowing at a rate of 200sccm-8000sccm. This method easily produces a microcrystalline silicon film with a crystallization rate of 40%-65% and a thickness of 10nm-40nm.

[0067] It is understood that in order to obtain a doped microcrystalline silicon film, in some embodiments of the present application, the first raw material further includes a doping element source to obtain an N-type microcrystalline silicon film or a P-type microcrystalline silicon film. A person skilled in the art can select a specific doping element source based on actual production needs. For example, when preparing an N-type microcrystalline silicon film, the doping element source includes at least one of a phosphorus source, an arsenic source, and an antimony source. For example, phosphorus sources include but are not limited to phosphine, arsenic sources include but are not limited to arsine, and antimony sources include but are not limited to antimonane. In some specific embodiments, when preparing an N-type microcrystalline silicon film, the doping element source is selected from a phosphorus source. When preparing a P-type microcrystalline silicon film, the doping element source includes at least one of a boron source, an aluminum source, and a gallium source. For example, boron sources include but are not limited to borane, aluminum sources include but are not limited to trimethylaluminum, and gallium sources include but are not limited to trimethylgallium. In some specific embodiments, when preparing a P-type microcrystalline silicon film, the doping element source is selected from a boron source.

[0068] In some embodiments of the present application, silicon crystal nanoparticles are prepared by the following method:

[0069] Disperse silicate in a second solvent to obtain a silicate solution, and adjust the pH value of the silicate solution to 2-4, perform a first heating, then adjust the pH value of the silicate solution to 6-8, perform a second heating, dialyze, and dry to obtain a gel, and calcine the gel to obtain silicon crystal nanoparticles. Specifically, the above-mentioned second solvent includes but is not limited to water, and water can cause the silicate to hydrolyze in the subsequent process, thereby smoothly preparing silicon crystal nanoparticles. Specifically, the above-mentioned silicate includes but is not limited to sodium silicate. Specifically, hydrochloric acid or the like can be used to adjust the pH value of the silicate solution to 2-4, and alkaline reagents such as ammonia water can be used to adjust the pH value of the hydrochloric acid solution to 6-8. Among them, dialysis is to remove the impurities introduced in the preparation process, including impurities brought into the system by the pH regulator, for example, NH4 + 、Na + In the embodiments of the present application, the silicate includes, but is not limited to, one or more of sodium silicate, potassium silicate, calcium silicate, magnesium silicate, aluminum silicate, and iron silicate. The second solvent is selected from a good solvent for the silicate, specifically water and / or alcohols, preferably water. Alcohols include, but are not limited to, ethanol, methanol, isopropanol, and the like.

[0070] To speed up the reaction, in some specific embodiments, the first heating temperature is 60° C.-90° C. The first heating time is 1 h-3 h.

[0071] Similarly, in some specific embodiments, the second heating temperature is 60° C.-90° C. The second heating duration is 1 hour-3 hours. The first heating temperature and the second heating temperature can be the same or different.

[0072] In some specific embodiments, the calcination temperature is 600°C-900°C.

[0073] It should be noted that when preparing N-type or P-type microcrystalline silicon film materials, the silicon crystal nanoparticles can be silicon crystal nanoparticles of the corresponding doping type or intrinsic silicon crystal nanoparticles. Specifically, when preparing N-type microcrystalline silicon film materials, the silicon crystal nanoparticles can be intrinsic microcrystalline silicon nanoparticles or N-type silicon crystal nanoparticles; preferably, N-type silicon crystal nanoparticles. When preparing P-type microcrystalline silicon film materials, the silicon crystal nanoparticles can be intrinsic microcrystalline nanoparticles or P-type silicon crystal nanoparticles; preferably, P-type silicon crystal nanoparticles.

[0074] Furthermore, to obtain silicon crystalline nanoparticles containing a doping element, the preparation process of the silicon crystalline nanoparticles further includes adding a salt containing the doping element to the second solvent. The doping element includes at least one of phosphorus, arsenic, and antimony, or at least one of boron, aluminum, and gallium. Specifically, for example, the phosphorus-containing salt may be sodium phosphate; for example, the boron-containing salt may be sodium borate.

[0075] In some specific embodiments, the mass ratio of the salt containing the doping element to the silicate is ≤1:9.

[0076] Referring to FIG. 1 and FIG. 2 , the present invention also provides a method for preparing a solar cell, including:

[0077] S01, providing a substrate 10, wherein the substrate 10 has a first surface 101 and a second surface 102 disposed opposite to each other along a thickness direction thereof; the substrate 10 includes a silicon base layer 11;

[0078] S02, spreading silicon crystal nanoparticles 1 and a second raw material on the first surface 101 to form a first film layer 20 on the first surface 101; wherein the second raw material includes a silicon source, a reducing gas and a first doping element source; and / or, spreading silicon crystal nanoparticles 1 and a third raw material on the second surface 102 to form a second film layer 30 on the second surface 102; wherein the third raw material includes a silicon source, a reducing gas and a second doping element source to obtain a solar cell; in some embodiments of the present application, the first film layer 20 includes amorphous silicon and silicon crystal nanoparticles dispersed in the amorphous silicon (not shown in Figure 2), and the second film layer 30 includes amorphous silicon and silicon crystal nanoparticles dispersed in the amorphous silicon (not shown in Figure 2). It should be noted that the number, distribution density, and relative position of the silicon crystal nanoparticles in Figure 1 are all exemplary drawings and do not limit the technical solutions of the embodiments of the present application. The substrate, the first film layer, and the second film layer in Figure 2 are also exemplary drawings and do not limit the actual structure of each layer in the solar cell obtained by the embodiments of the present application.

[0079] One of the first and second doping element sources is selected from at least one of a phosphorus source, an arsenic source, and an antimony source, and the other is selected from at least one of a boron source, an aluminum source, and a gallium source. In this case, one of the resulting first and second film layers is an N-type microcrystalline silicon layer, and the other is a P-type microcrystalline silicon layer. In some specific embodiments, one of the first and second doping element sources is selected from a phosphorus source, and the other is selected from a boron source.

[0080] Specifically, silicon crystal nanoparticles and a second raw material may be scattered on the first surface, and the first film layer obtained in this case is a microcrystalline silicon film layer; and an amorphous silicon layer may be directly deposited on the second surface to obtain a solar cell with a single-sided microcrystalline structure. Alternatively, silicon crystal nanoparticles and a third raw material may be scattered on the second surface, and the second film layer obtained in this case is a microcrystalline silicon film layer, and an amorphous silicon layer may be directly deposited on the first surface to obtain a solar cell with a single-sided microcrystalline structure. Preferably, in some embodiments, silicon crystal nanoparticles and a second raw material may be scattered on the first surface, and the first film layer formed is a microcrystalline silicon film layer; and silicon crystal nanoparticles and a third raw material may be scattered on the second surface, and the second film layer formed is also a microcrystalline silicon film layer, and in this case, a solar cell with a double-sided microcrystalline structure is obtained. When depositing amorphous silicon on the substrate, amorphous silicon may be deposited using a process well known to those skilled in the art.

[0081] The following is an example of spraying silicon crystal nanoparticles on the first surface: the substrate is placed on a carrier so that the first surface is facing upward, that is, the first surface is set away from the carrier, and silicon crystal nanoparticles and the second raw material are scattered on the first surface to form a first film layer on the first surface.

[0082] In the embodiment of the present application, the first film layer can be prepared first, and then the substrate with the first film layer can be turned over and placed on a carrier, and then the second film layer can be prepared. Of course, the second film layer can also be prepared first, and then the substrate with the second film layer can be turned over and placed on a carrier, and then the first film layer can be prepared. In the embodiment of the present application, the above-mentioned carrier can be a plate type or a tube type.

[0083] When the second raw material and / or the third raw material are deposited, the above-mentioned silicon crystal nanoparticles can be used as seeds to induce the silicon source to grow on its surface. Compared with the seed layer used in the related art, the silicon source can only contact the surface of the seed layer (seed) away from the substrate during deposition; and in the deposition process of the embodiment of the present application, the entire surface of the silicon crystal nanoparticles (seed) can be in contact with the silicon source, so the contact area between the silicon source and the seed is significantly improved, which can improve the deposition efficiency of silicon atoms and reduce the difficulty of deposition. In addition, because the entire surface of the silicon crystal nanoparticles can deposit silicon, if only amorphous silicon is deposited at this time, the two can be mixed to obtain a first film layer and / or a second film layer with a target crystallization rate, thereby avoiding the direct deposition and growth of microcrystalline silicon, and then in its preparation process, no longer needing high reducing gas flow, high power and high pressure and other stringent requirements, therefore, can greatly reduce the preparation difficulty and production cost of solar cells with microcrystalline silicon layers, which is beneficial to the promotion and application of solar cells with double-sided microcrystalline structures. In addition, the solar cell produced by the above preparation method does not have a seed layer in the related art between the first film layer and the silicon base layer, and / or does not have a seed layer in the related art between the second film layer and the silicon base layer.

[0084] Furthermore, the first and second film layers are still grown in situ on the substrate surface, maintaining good contact with the substrate and facilitating the performance of the resulting solar cell. To allow the silicon nanoparticles to better induce the deposition of silicon atoms on their surface and enhance the uniformity of the resulting first and second film layers, in some embodiments of the present application, the substrate is placed in a reaction chamber of a deposition apparatus, silicon nanoparticles are sprayed onto the first surface, and a second raw material is simultaneously introduced into the reaction chamber; and silicon nanoparticles are sprayed onto the second surface while a third raw material is simultaneously introduced into the reaction chamber.

[0085] In some embodiments of the present application, the preparation methods provided in the examples of the present application are used simultaneously to prepare the first and second film layers, which can save 20% of non-silicon costs compared to related technologies. Non-silicon costs include utilities, process gas costs, low-temperature silver paste costs, target material costs, etc. The technical solutions provided in the examples of the present application can effectively reduce process gas costs and the utilities saved by the shorter process time.

[0086] In the embodiment of the present application, the above-mentioned silicon base layer can be an intrinsic silicon base layer, an N-type silicon base layer, or a P-type silicon base layer. Generally, in order for the final solar cell to have a better passivation effect, a passivation layer is generally provided on the opposite side surfaces of the silicon base layer. Please refer to Figures 3-4. A first passivation layer 12 is also provided between the silicon base layer 11 and the first film layer 20, and a second passivation layer 13 is provided between the silicon base layer 11 and the second film layer 30. The materials of the first passivation layer and the second passivation layer are independently selected from at least one of intrinsic amorphous silicon, amorphous silicon oxide and silicon carbide. That is, the substrate includes a silicon base layer, a first passivation layer and a second passivation layer respectively provided on the opposite side surfaces of the silicon base layer. At this time, the first film layer is in direct contact with the first passivation layer, and / or the second film layer is in direct contact with the second passivation layer. In the embodiment of the present application, the above-mentioned first passivation layer and second passivation layer can be made on the opposite sides of the silicon base layer along its thickness direction. The preparation process of the first passivation layer and the second passivation layer can be a process well known to those skilled in the art, and the present application does not impose any restrictions on this. Similarly, the number, distribution density, and relative position of the silicon crystal nanoparticles in Figure 3 are all exemplary drawings and do not constitute a limitation on the technical solution of the embodiment of the present application. The base, first passivation layer, first film layer, second passivation layer, and second film layer in Figure 4 are also exemplary drawings and do not constitute a limitation on the actual structure of the solar cell produced in the embodiment of the present application.

[0087] It is understandable that if those skilled in the art wish to grow microcrystalline silicon directly on the surface of a carrier dispersed with silicon nanoparticles, this is feasible. However, in related art, if the seed layer is removed and the microcrystalline silicon layer is grown directly on the surface of a substrate (e.g., a passivation layer), the difference in polarity can cause the microcrystalline silicon layer to explode. However, by replacing the seed layer with silicon nanoparticles, even if microcrystalline silicon is grown directly on the surface of the passivation layer, explosion will not occur.

[0088] In some embodiments of the present application, the silicon crystal nanoparticles dispersed on the first surface contain a first doping element, and / or the silicon crystal nanoparticles dispersed on the second surface contain a second doping element. In this way, it is more conducive to preparing a microcrystalline silicon layer with corresponding doping elements. That is, the silicon crystal nanoparticles are N-type silicon crystal nanoparticles or P-type silicon crystal nanoparticles with the same doping properties as the microcrystalline silicon layer to be prepared. Specifically, when the preparation method provided in the embodiment of the present application is used to prepare the first film layer, preferably, the silicon crystal nanoparticles contain the first doping element; when the preparation method provided in the embodiment of the present application is used to prepare the second film layer, preferably, the silicon crystal nanoparticles contain the second doping element.

[0089] In some embodiments of the present application, the particle size of the silicon crystal nanoparticles is ≤30nm. In this way, the silicon crystal nanoparticles have a large surface area and can fully contact the second raw material and the third raw material, thereby facilitating the growth of the first film layer and the second film layer. In addition, the thickness of the N-type silicon layer and the P-type silicon layer in the solar cell needs to be controlled within an appropriate range. The use of silicon crystal nanoparticles with the above-mentioned particle size can obtain the first film layer and the second film layer of the target thickness, that is, it is conducive to obtaining an N-type silicon layer and a P-type silicon layer with a target thickness. Specifically, the particle size of the silicon crystal nanoparticles can be, but is not limited to, 1nm, 2nm, 5nm, 8nm, 10nm, 12nm, 15nm, 18nm, 20nm, 22nm, 25nm, 28nm, 30nm.

[0090] In some embodiments of the present application, in step S02, the spreading of silicon crystal nanoparticles and a second raw material onto the first surface includes: placing a substrate in a reaction chamber of a deposition apparatus, spraying silicon crystal nanoparticles onto the first surface of the substrate, and simultaneously introducing the second raw material into the reaction chamber, wherein the first doping element source is selected from at least one of a phosphorus source, an arsenic source, and an antimony source; the power of the deposition apparatus is 200W-3000W, the pressure within the reaction chamber is 1mbar-3mbar, and the temperature within the reaction chamber is 130°C-210°C. In this way, the occurrence of film explosion can be effectively avoided, and a microcrystalline silicon film material with a target crystallization rate can be easily produced. At the same time, the above process conditions are relatively mild, easy to implement, and have low energy consumption. It can be understood that the first film layer obtained at this time is an N-type microcrystalline silicon layer. Specifically, the power of the deposition equipment can be, but is not limited to, 200 W, 500 W, 800 W, 1000 W, 1200 W, 1500 W, 1800 W, 2000 W, 2200 W, 2500 W, 2800 W, or 3000 W. The pressure within the reaction chamber can be, but is not limited to, 1.0 mbar, 1.2 mbar, 1.5 mbar, 1.8 mbar, 2.0 mbar, 2.2 mbar, 2.5 mbar, 2.8 mbar, or 3.0 mbar. The temperature within the reaction chamber can be, but is not limited to, 130° C., 140° C., 150° C., 160° C., 170° C., 180° C., 190° C., 200° C., or 210° C. These temperatures are relatively mild and will not damage the structure of the substrate, thereby ensuring good performance of the resulting solar cell.

[0091] In the embodiments of the present application, the specific process and process parameters for distributing the silicon crystalline nanoparticles onto the first surface of the substrate can be found in the relevant content of the preparation method of the microcrystalline silicon film material described above and will not be repeated here. In some specific embodiments of the present application, in step S02, the substrate is first placed in the reaction chamber of the deposition equipment, the second raw material is introduced, and after the pressure in the reaction chamber stabilizes, a slurry containing silicon crystalline nanoparticles is sprayed on the first surface.

[0092] In some specific embodiments, in step S02, the flow rate of the silicon source is 50 sccm-1000 sccm, the flow rate of the first doping element source is 1 sccm-80 sccm, and the flow rate of the reducing gas is 500 sccm-4000 sccm. The reducing gas includes, but is not limited to, hydrogen. The silicon source includes, but is not limited to, silane. Specifically, the flow rate of the silicon source may be, but is not limited to, 50 sccm, 100 sccm, 200 sccm, 300 sccm, 400 sccm, 500 sccm, 600 sccm, 700 sccm, 800 sccm, 900 sccm, or 1000 sccm. Specifically, the flow rate of the hydrogen may be, but is not limited to, 2000 sccm, 3000 sccm, or 4000 sccm. Specifically, the flow rate of hydrogen gas may be, but is not limited to, 500 sccm, 800 sccm, 1000 sccm, 1200 sccm, 1500 sccm, 2000 sccm, 2200 sccm, 2500 sccm, 2800 sccm, 3000 sccm, 3200 sccm, 3500 sccm, 3800 sccm, or 4000 sccm. The flow rate of the first doping element source may be, but is not limited to, 1 sccm, 5 sccm, 10 sccm, 20 sccm, 30 sccm, 40 sccm, 50 sccm, 60 sccm, 70 sccm, or 80 sccm.

[0093] In some specific embodiments, in step S02, when forming the first film layer, the deposition time is 60s-150s. Specifically, the deposition time can be, but is not limited to, 60s, 70s, 80s, 90s, 100s, 110s, 120s, 130s, 140s, or 150s.

[0094] In some specific embodiments, in step S02, when forming the above-mentioned first film layer, the power of the deposition equipment is 200W-3000W, the pressure in the reaction chamber is 1mbar-3mbar, the temperature in the reaction chamber is 130℃-210℃, the flow rate of the silicon source is 50sccm-1000sccm, the flow rate of the first doping element source is 1sccm-80sccm, the flow rate of the reducing gas is 500sccm-4000sccm, and the deposition time is 60s-150s. At this time, it is easy to obtain an N-type microcrystalline silicon layer with a crystallization rate of 40%-65%. Furthermore, an N-type microcrystalline silicon layer with a thickness of 10nm-30nm can be obtained. Moreover, by using the above parameters to prepare the first film layer, compared with the production of the first film layer with the same parameters using related technologies, the maximum peak amount of reducing gas can be reduced by more than 80%, and the deposition time can be reduced by more than 50%.

[0095] In some embodiments of the present application, in step S02, before spreading silicon crystal nanoparticles and the second raw material to the first surface, the first surface is also cleaned. Specifically, plasma cleaning can be used, and radio frequency plasma cleaning can be further used, or the same deposition equipment as that used for the subsequent preparation of the first film layer can be used for cleaning. Cleaning includes: placing the substrate in the reaction chamber of the deposition equipment and passing hydrogen, wherein the power of the equipment is 100W-2000W, the pressure in the reaction chamber is 0.5mbar-3mbar, the temperature in the reaction chamber is 130℃-210℃, the flow rate of hydrogen is 1000sccm-5000sccm, and the cleaning time is 10s-40s. When the deposition equipment used for the above cleaning is the same as the deposition equipment used for the subsequent preparation of the first film layer, after the cleaning is completed, the raw materials can be directly switched and the process parameters can be changed to prepare the first film layer.

[0096] In some embodiments of the present application, in step S02, spreading silicon crystal nanoparticles and a third raw material onto the second surface includes: placing the substrate in a reaction chamber of a deposition device, spraying silicon crystal nanoparticles onto the second surface, and simultaneously introducing the third raw material into the reaction chamber, wherein the second doping element source is selected from at least one of a boron source, an aluminum source, and a gallium source; the power of the deposition device is 500W-3000W, the deposition pressure is 1mbar-3mbar, and the deposition temperature is 120°C-200°C. Similarly, the occurrence of film explosion can be effectively avoided, and a microcrystalline silicon film material with a target crystallization rate can be easily produced. At the same time, the above process conditions are relatively mild, easy to implement, and have low energy consumption. It can be understood that the second film layer obtained at this time is a P-type microcrystalline silicon layer. Specifically, the power of the deposition equipment can be, but is not limited to, 500W, 800W, 1000W, 1200W, 1500W, 1800W, 2000W, 2200W, 2500W, 2800W, or 3000W. The pressure within the reaction chamber can be, but is not limited to, 1.0 mbar, 1.2 mbar, 1.5 mbar, 1.8 mbar, 2.0 mbar, 2.2 mbar, 2.5 mbar, 2.8 mbar, or 3.0 mbar. The temperature within the reaction chamber can be, but is not limited to, 120°C, 140°C, 150°C, 160°C, 170°C, 180°C, 190°C, or 200°C. Similarly, these temperatures are relatively mild and will not damage the structure of the substrate, thereby ensuring good performance of the resulting solar cell.

[0097] Similarly, in the embodiments of the present application, the specific process and process parameters for spraying silicon crystal nanoparticles on the second surface of the substrate can be found in the relevant content of the preparation method of microcrystalline silicon film material mentioned above, and will not be repeated here. In some embodiments of the present application, in step S02, the substrate is first placed in the reaction chamber of the deposition equipment, and the third raw material is introduced. After the air pressure in the reaction chamber stabilizes, the slurry containing silicon crystal nanoparticles is sprayed on the second surface.

[0098] In some specific embodiments, in step S02, the deposition time is 30s-200s. In some specific embodiments, the flow rate of the silicon source is 50sccm-500sccm, the flow rate of the second doping element source is 1sccm-100sccm, and the flow rate of the reducing gas is 200sccm-8000sccm. Similarly, the silicon source includes but is not limited to silane. The reducing gas includes but is not limited to hydrogen. The boron source includes but is not limited to borane. The flow rate of the second doping element source can be, but is not limited to, 1sccm, 5sccm, 10sccm, 20sccm, 30sccm, 40sccm, 50sccm, 60sccm, 70sccm, 80sccm, 90sccm, or 100sccm.

[0099] In some specific embodiments, in step S02, when forming the second film layer, the deposition equipment power is 500W-3000W, the deposition pressure is 1mbar-3mbar, the deposition temperature is 120°C-200°C, and the deposition time is 30s-200s; the silicon source flow rate is 50sccm-500sccm, the second dopant element source flow rate is 1sccm-100sccm, and the reducing gas flow rate is 200sccm-8000sccm. Similarly, when preparing the second film layer using the above parameters, compared to producing the second film layer with the same parameters using related technologies, the maximum peak amount of reducing gas can be reduced by more than 80%, and the deposition time can be reduced by more than 50%.

[0100] In some embodiments of the present application, in step S02, before distributing the silicon crystal nanoparticles and the third raw material onto the second surface, the second surface of the substrate may be cleaned. A deposition device may be used to clean the second surface. The specific cleaning process is described above for the cleaning of the first surface and is not further described here.

[0101] Furthermore, in order to widen the band gap of the first film layer and broaden its absorption spectrum to generate more carriers, in some embodiments of the present application, when forming the above-mentioned first film layer, after the deposition time of the second raw material (the introduction time of the second raw material) reaches 30s-90s, one or more of an oxygen source, a carbon source or a nitrogen source is introduced into the reaction chamber, and the flow rate of each of the above-mentioned element sources is 10sccm-200sccm, and the total deposition time of the first film layer is 60s-150s. In this way, the obtained first film layer is divided into a stacked first sublayer and a second sublayer, and the first sublayer is arranged close to the base layer; wherein the first sublayer is an N-type microcrystalline silicon layer doped with the first doping element, and the second sublayer is an N-type microcrystalline silicon layer co-doped with the first doping element and oxygen element; at this time, the crystallization rate of the first film layer and the second film layer finally obtained is still 40%-65%.

[0102] Similarly, in order to improve the above-mentioned performance of the second film layer, in some embodiments of the present application, when forming the above-mentioned second film layer, after the deposition time of the third raw material (the introduction time of the third raw material) reaches 10s-50s, one or more of a carbon source or a nitrogen source is introduced into the reaction chamber, and the flow rate of each of the above-mentioned element sources is 100sccm-1500sccm, and the total deposition time of the second film layer is 90s-200s. In this way, the obtained second film layer is divided into a stacked third sublayer and a fourth sublayer, and the third sublayer is arranged close to the base layer; wherein the third sublayer is a P-type microcrystalline silicon layer doped with the second doping element, and the fourth sublayer is a P-type microcrystalline silicon layer co-doped with the second doping element and oxygen.

[0103] The present application also provides a solar cell, comprising a substrate, an N-type silicon layer, and a P-type silicon layer; wherein the substrate comprises a silicon substrate layer, or comprises a silicon substrate layer and a passivation layer disposed on opposite sides of the silicon substrate layer; the N-type silicon layer and the P-type silicon layer are disposed on opposite sides of the substrate in a thickness direction, and both are in direct contact with the silicon substrate layer, or the N-type silicon layer and the P-type silicon layer are respectively connected to the silicon substrate layer via the passivation layer;

[0104] The N-type silicon layer is an N-type microcrystalline silicon layer, and the crystallinity of the N-type microcrystalline silicon layer within a thickness range of at least 2 nm near the substrate is greater than 15%; and / or the P-type silicon layer is a P-type microcrystalline silicon layer, and the crystallinity of the P-type microcrystalline silicon layer within a thickness range of at least 2 nm near the substrate is greater than 15%. For example, the crystallinity of the N-type microcrystalline silicon layer within a thickness range of at least 2 nm near the substrate is greater than 15%, 17%, 18%, 19%, or 20%. For example, the crystallinity of the P-type microcrystalline silicon layer within a thickness range of at least 2 nm near the substrate is greater than 15%, 17%, 18%, 19%, or 20%. For another example, the crystallinity of the N-type microcrystalline silicon layer within a thickness range of 0.5 nm, 1.0 nm, 1.5 nm, 2.0 nm, etc., in a direction from the substrate to the N-type microcrystalline silicon layer is greater than 15%. The P-type microcrystalline silicon layer is similar and will not be further described here. It should be noted that when one of the N-type silicon layer or the P-type silicon layer meets the above conditions, both should be regarded as protected solar cells in the embodiments of the present application.

[0105] It is understandable that in order to reduce the impact of interface defects in the silicon substrate layer and improve the photovoltaic conversion efficiency and stability of the battery, in some cases, the surfaces of the opposite sides of the substrate also include a passivation layer. Specifically, the substrate includes a first passivation layer, a silicon substrate layer, and a second passivation layer stacked together. The N-type silicon layer and the silicon substrate layer are connected by the first passivation layer, and the P-type silicon layer and the silicon substrate layer are connected by the second passivation layer. That is, the solar cell includes an N-type silicon layer, a first passivation layer, a silicon substrate layer, a second passivation layer, and a P-type silicon layer stacked in sequence. In some embodiments of the present application, the material of the first passivation layer and the second passivation layer each independently includes at least one of intrinsic amorphous silicon, amorphous silicon oxide, and silicon carbide. In some specific embodiments, the material of the first passivation layer and the second passivation layer is intrinsic amorphous silicon. In some embodiments of the present application, the thickness of the first passivation layer and the second passivation layer is independently 5nm-20nm. This helps to improve the transmission speed of carriers.

[0106] In some embodiments of the present application, the N-type silicon layer is an N-type microcrystalline silicon layer, and the crystallinity of the N-type microcrystalline silicon layer within a thickness range of at least 2 nm near the substrate is greater than 15%; and the P-type silicon layer is a P-type microcrystalline silicon layer, and the crystallinity of the P-type microcrystalline silicon layer within a thickness range of at least 2 nm near the substrate is greater than 15%. In this case, the N-type silicon layer and / or the P-type silicon layer can be prepared by the preparation method provided in the embodiments of the present application.

[0107] In the embodiments of the present application, the solar cell may include but is not limited to the following different forms: (1) the N-type silicon layer is the above-mentioned N-type microcrystalline silicon layer, and the P-type silicon layer is an amorphous P-type silicon layer; (2) the P-type silicon layer is the above-mentioned P-type microcrystalline silicon layer, and the N-type silicon layer is an amorphous N-type silicon layer; (3) the N-type silicon layer is the above-mentioned N-type microcrystalline silicon layer, and the P-type silicon layer is the above-mentioned P-type microcrystalline silicon layer; in this case, the crystallization rates of the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer may be the same or different.

[0108] In the embodiments of the present application, the above-mentioned crystallization rate can reflect the ratio of microcrystalline to amorphous states in the film layer. The higher the crystallization rate, the more complete the microcrystallization of the film layer and the more microcrystalline components; the lower the crystallization rate, the higher the amorphous components. The crystallization rate can be measured by a Raman spectrometer. A laser light source with a wavelength of 485nm or 515nm is used to perform Raman testing on the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer. The obtained Raman spectrum is subjected to Gaussian three-peak fitting to obtain the crystallization rate Xc of the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer. Specifically, when testing the crystallization rate of the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer, it is necessary to randomly select three points on the surface of the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer for testing, and calculate the arithmetic average value thereof as the crystallization rate of the corresponding microcrystalline silicon layer.

[0109] For both the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer, the crystallization rate Xc is calculated using the following formula:

[0110] Among them, I c is the peak intensity of the characteristic peak of crystalline silicon, I g is the peak intensity of the characteristic peak of crystalline silicon grain boundary, I a is the peak intensity of the characteristic peak of amorphous silicon, I 516.4 is the peak position of crystalline silicon, I 507.4 is the peak position of the crystalline silicon grain boundary, I 485.3 is the spectral peak position of amorphous silicon. In the embodiment of the present application, the solar cell can be thinned by ion thinning technology or etching treatment to expose the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer within 2nm or 2nm thickness close to the substrate, and test their crystallization rate. Similarly, when testing the crystallization rate of the above-mentioned N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer within 2nm or 2nm thickness close to the substrate, it is necessary to select 3 points at random on the exposed surface of the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer for testing, and calculate the arithmetic average value thereof as the crystallization rate of the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer within 2nm or 2nm thickness close to the substrate.

[0111] It is understood that at least one of the above-mentioned N-type silicon layer and P-type silicon layer is a microcrystalline silicon layer. The microcrystalline silicon layer contains a certain number of silicon crystal particles, which can achieve high electron mobility and fewer defect structures, especially fewer defect complex structures (for example, lattice vacancies, interstitials, substitutions, dislocations, and unbonded dangling bonds on the surface). This can effectively suppress the parasitic absorption effect of solar cells in the visible light region and improve the photoelectric conversion efficiency of solar cells. In some specific embodiments, the N-type microcrystalline silicon layer includes amorphous silicon and silicon crystal nanoparticles uniformly dispersed in the amorphous silicon; in this case, the silicon crystal nanoparticles can be N-type microcrystalline silicon nanoparticles, intrinsic microcrystalline silicon nanoparticles, or both. The P-type microcrystalline silicon layer includes amorphous silicon and silicon crystal nanoparticles uniformly dispersed in the amorphous silicon; similarly, in this case, the silicon crystal nanoparticles can be P-type microcrystalline silicon nanoparticles, intrinsic microcrystalline silicon nanoparticles, or both.

[0112] In some embodiments of the present application, the crystallization rate of the N-type microcrystalline silicon layer is 40%-65%, and / or the crystallization rate of the P-type microcrystalline silicon layer is 40%-65%. In some specific embodiments, the crystallization rate of the N-type microcrystalline silicon layer is 40%-65%, and the crystallization rate of the P-type microcrystalline silicon layer is 40%-65%. Specifically, the crystallization rates of the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer can be, but are not limited to, 40%, 42%, 45%, 48%, 50%, 52%, 55%, 58%, 60%, 62%, and 65%. Controlling the crystallization rate within the range of 40%-65% can control the amount of disordered structure in the microcrystalline silicon layer within an appropriate range, further reducing the parasitic absorption effect and further improving the photoelectric conversion efficiency of the solar cell. In addition, it is also beneficial to control the gap size between the silicon crystal particles in the microcrystalline silicon layer within a smaller range, reducing the risk of current bypassing the edges of the silicon crystal particles and aggravating charge recombination, while ensuring good performance of the solar cell and reducing the risk of film explosion. In addition, for a double-sided amorphous structure solar cell with the same other parameters, the absolute efficiency of the solar cell provided by the embodiment of the present application can be improved by 4% by controlling the crystallization rate of the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer within the above range. At this time, a high-resolution transmission electron microscope (HRTEM) can be used for auxiliary testing. Due to the presence of the seed layer, the diffraction stripes and diffraction spots of the microcrystalline silicon layer of the related technology at different depths are obviously different, that is, the brightness of the diffraction spots or diffraction rings at the seed layer close to the silicon base layer is significantly weaker than that of the side of the microcrystalline silicon layer away from the silicon base layer. In the solar cell of the embodiment of the present application, due to the absence of the seed layer, the above phenomenon does not exist when the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer with a crystallization rate of 40%-65% are tested by HRTEM.

[0113] In some specific embodiments, the crystallization rate of the N-type microcrystalline silicon layer at all depths, from the substrate toward the N-type microcrystalline silicon layer, is 40%-65%. In some specific embodiments, the crystallization rate of the P-type microcrystalline silicon layer at all depths, from the substrate toward the P-type microcrystalline silicon layer, is 40%-65%. This improves the uniformity of the N-type microcrystalline silicon layer and the P-type microcrystalline silicon layer, which is more conducive to the performance of the battery.

[0114] In the embodiment of the present application, the above-mentioned silicon base layer can be an intrinsic silicon base, an N-type silicon base layer, or a P-type silicon base layer. In the embodiment of the present application, there is no limitation on any parameters such as the size of the silicon base layer. In some embodiments, the silicon base layer can be a single crystal silicon wafer. For example, the thickness of the silicon base layer can be in the range of 100μm-150μm, and its resistivity can be in the range of 0.3Ω·cm-2.1Ω·cm, or in the range of 1Ω·cm-7Ω·cm. In the embodiment of the present application, there is no limitation on the length / width of the silicon base layer, and it can be selected from the silicon base wafer commonly used by those skilled in the art.

[0115] As described above, due to the technical solutions of the embodiments of the present application, the microcrystalline silicon layers (N-type microcrystalline silicon layer, P-type microcrystalline silicon layer) of the embodiments of the present application can achieve a crystallization rate comparable to that of the microcrystalline silicon layers of the related art while being thinner than those of the related art. In some embodiments of the present application, the thickness of the N-type microcrystalline silicon layer is 10nm-30nm. In some embodiments of the present application, the thickness of the P-type microcrystalline silicon layer is 15nm-40nm. In this way, the total thickness of the solar cell can be controlled within an appropriate range while ensuring a high photoelectric conversion efficiency of the final solar cell. Specifically, the thickness of the N-type microcrystalline silicon layer can be, but is not limited to, 10nm, 12nm, 15nm, 18nm, 20nm, 22nm, 25nm, 28nm, 30nm. Specifically, the thickness of the P-type microcrystalline silicon layer is 15nm, 18nm, 20nm, 22nm, 25nm, 28nm, 30nm, 32nm, 35nm, 38nm, 40nm.

[0116] In an embodiment of the present application, HRTEM can be used to observe a slice of a solar cell to measure the thickness of the N-type silicon layer or the P-type silicon layer, or an ellipsometer can be used to detect the thickness of the N-type silicon layer or the P-type silicon layer. Specifically, the elliptically polarized light is incident from the surface of the N-type silicon layer or the P-type silicon layer, with an incident angle of 0° or 70°, and is fitted according to the EMA (effective medium model) or the Cauthy model (Cauthy model). The matching degree between the fitting result and the actual result reaches 98%, and the specific fitting parameters are not limited. Five positions are arbitrarily selected for each sample for testing, and the arithmetic mean of the test results is calculated and recorded as the thickness of the corresponding N-type silicon layer or the P-type silicon layer. Specifically, before using an ellipsometer to detect the thickness of the N-type silicon layer and the P-type silicon layer, pretreatment is also included, such as laser etching to remove other layers such as the transparent conductive oxide (TCO) layer to expose the surface of the N-type silicon layer and the P-type silicon layer.

[0117] In some embodiments of the present application, the solar cell also includes a first transparent conductive oxide layer and a first electrode that are sequentially stacked on the surface of the N-type silicon layer facing away from the substrate; and a second transparent conductive oxide layer and a second electrode that are sequentially stacked on the surface of the P-type silicon layer facing away from the substrate. In some embodiments of the present application, both the first electrode and the second electrode are metal electrodes. The materials of the first electrode and the second electrode may include, but are not limited to, at least one of gold, silver, and copper; the materials of the first electrode and the second electrode may be the same or different. In some specific embodiments, the materials of both the first electrode and the second electrode are silver. In the embodiments of the present application, those skilled in the art can prepare the first electrode and the second electrode using well-known processes, such as screen printing, and the present application does not limit this.

[0118] In some embodiments of the present application, the materials of the first transparent conductive layer and the second transparent conductive layer may include, but are not limited to, at least one of ITO (indium tin oxide), AZO (zinc aluminum oxide), and IZO (indium zinc oxide); the materials of the first transparent conductive layer and the second transparent conductive layer may be the same or different. In some specific embodiments of the present application, the materials of both the first transparent conductive layer and the second transparent conductive layer may be ITO (indium tin oxide). Specifically, those of ordinary skill in the art can set the thicknesses of the first transparent conductive layer and the second transparent conductive layer according to actual production needs. In the embodiments of the present application, those skilled in the art can choose well-known processes in the industry to prepare the first transparent conductive layer and the second transparent conductive layer, such as sputtering process, and the present application does not limit this.

[0119] In some embodiments of the present application, the N-type microcrystalline silicon layer includes a first sub-layer and a second sub-layer that are stacked. The first sub-layer is a microcrystalline silicon layer doped with a first doping element, and the second sub-layer is a microcrystalline silicon layer co-doped with the first doping element and oxygen element; the first sub-layer is disposed closer to the substrate. In this way, the bandgap width of the N-type microcrystalline silicon layer can be increased, and its absorption spectrum range can be broadened. When irradiated with light, more carriers can be generated. In some specific embodiments, the doping concentration of the first sub-layer is less than that of the second sub-layer. That is, the content of the first doping element in the first sub-layer is a, and the sum of the doping concentrations of the first doping element and oxygen element in the second sub-layer is b, then a < b, where a and b are in the same unit.

[0120] Similarly, in some embodiments of the present application, the P-type microcrystalline silicon layer includes a third sub-layer and a fourth sub-layer that are stacked. The third sub-layer is a microcrystalline silicon layer doped with a second doping element, and the fourth sub-layer is a microcrystalline silicon layer co-doped with the second doping element and oxygen element; the third sub-layer is disposed closer to the substrate. Similarly, the doping concentration of the third sub-layer is less than that of the fourth sub-layer.

[0121] In the embodiment of the present application, the doping concentrations of the first doping element, the second doping element, and the oxygen element are not limited, and those skilled in the art can make selections based on actual needs.

[0122] The embodiments of the present application also provide a solar cell assembly, comprising a plurality of solar cells provided in the embodiments of the present application, or a plurality of solar cells produced by the method for producing the solar cell provided in the embodiments of the present application, wherein the plurality of solar cells are electrically connected to each other. Due to the use of the above-mentioned solar cells, the solar cell assembly has high photoelectric conversion efficiency and good safety in use, which is conducive to improving the application of solar cell assemblies, especially the application of solar cell assemblies with double-sided microcrystalline structures. Furthermore, when the above-mentioned solar cells are produced by the preparation method provided in the embodiments of the present application, the production cost of the above-mentioned solar cell assembly is also relatively low.

[0123] The present invention also provides a photovoltaic system comprising an electrically connected photovoltaic module and an energy storage system, wherein the photovoltaic module comprises a solar cell module provided in the present invention. The photovoltaic system provided in the present invention has excellent overall performance, high photoelectric conversion efficiency, and strong market competitiveness.

[0124] The technical solution of this application is further illustrated below through multiple embodiments.

[0125] Example 1

[0126] (1) An N-type single crystal silicon wafer with a size of 166 mm × 166 mm is used as the silicon substrate layer, and the resistivity of the silicon substrate layer is 1.2 Ω·cm.

[0127] (2) Texturing of silicon substrate: A textured surface structure of an inverted pyramid is etched on the surface of the silicon wafer using acid and alkali corrosion, and the sharp pyramids are rounded using wet chemical methods.

[0128] (3) Silicon substrate cleaning: The RCA method is used to remove residual organic matter, dust particles, metal impurities and oxide layers on the surface to obtain a velvet sheet. Specifically, the cleaning is carried out in sequence using liquid I, liquid II, and HF cleaning solution, and each cleaning step is followed by a large amount of deionized water rinse.

[0129] (4) Preparation of the first passivation layer and the second passivation layer: The above-mentioned velvet sheet is sent into the PECVD equipment, and the following operations are performed on the opposite sides of the velvet sheet in the thickness direction: first, the RF power is 750W, the deposition pressure is in the range of 0.7mbar, the deposition temperature is 180℃, the silane flow rate is 200sccm, and the coating time is 30s; then the RF power is 600W, the deposition pressure is in the range of 1mbar, the deposition temperature is 180℃, the silane flow rate is 250sccm, the hydrogen flow rate is 2500sccm, and the coating time is 25s, and then 8nm of intrinsic amorphous silicon layer is deposited on the opposite sides of the thickness direction to form the first passivation layer and the second passivation layer, thereby obtaining the substrate.

[0130] (5) Preparation of silicon nanoparticles: Sodium silicate (Na2SiO3) and sodium phosphate (Na3PO3) were dissolved in distilled water at a mass ratio of 97:3 to form a 5 mM solution. Then, the pH value of the solution was adjusted to 3 using 1 mmol / L hydrochloric acid and heated at 75°C with stirring for 2 hours. Ammonia water was added to adjust the pH value of the acidified sodium silicate solution to 7, and the solution was heated and mixed at 75°C for 1.5 hours. NH4 in the silica sol was removed using a dialysis bag. + 、Na + The impurity ions are removed and dried to obtain a dry gel, which is further calcined in a furnace to obtain N-type silicon nanoparticle powder. Dimethylformamide is selected to dissolve the mixture and stirred to obtain a slurry. The concentration of the N-type silicon nanoparticles in the slurry is 20g / L.

[0131] Sodium silicate (Na2SiO3) and sodium borate (Na2B4O7) were dissolved in distilled water at a mass ratio of 95:5 to form a 5mM solution. Subsequently, the pH value of the solution was adjusted to 3 with 1mmol / L hydrochloric acid and heated at 75°C with stirring for 2 hours. Ammonia water was added to adjust the pH value of the acidified sodium silicate solution to 7 and the solution was heated and mixed at 75°C for 1.5 hours. NH4 in the silica sol was removed using a dialysis bag. + 、Na + The impurity ions are removed and dried to obtain a dry gel, which is further calcined in a furnace to obtain a P-type silicon nanoparticle powder. Dimethylformamide is selected and stirred and dispersed to obtain a slurry containing silicon crystal nanoparticles. The concentration of the P-type silicon crystal nanoparticles in the slurry is 20g / L.

[0132] (6) Preparation of the first film layer and the second film layer: The substrate prepared above was placed in the reaction chamber of the PECVD equipment, and the first surface and the second surface were cleaned by the following steps: hydrogen was introduced into the reaction chamber, the RF power was 390 W, the deposition pressure was 1.5 mbar, the deposition temperature was 170 ° C, the hydrogen flow rate was 2000 sccm, and the deposition time was 15 s;

[0133] After cleaning, the second raw material (specifically silane and phosphine) and hydrogen are introduced to perform the gas distribution and pressure stabilization step. The above slurry is sprayed on the first surface at a spray volume of 5 mL / cm 2 , while turning on the RF. The RF power can be reduced to 600W, the deposition pressure is 1.1mbar, the deposition temperature is 170°C, the silane flow rate is 150sccm, the phosphine flow rate is 3sccm, the hydrogen flow rate is 660sccm, and the deposition time is 44s, resulting in a first film layer (i.e., an N-type silicon layer) with a thickness of 15nm.

[0134] Turn the container over so that the second surface faces upward, introduce the third raw material (specifically silane and borane) and hydrogen, perform the gas distribution and pressure stabilization step, and spray the above slurry on the first surface at a spray volume of 5 mL / cm 2 , while turning on the RF. The RF power was 500W, the deposition pressure was in the range of 1.0mbar, the deposition temperature was 180°C, the silane flow rate was 200sccm, the borane flow rate was 4sccm, the hydrogen flow rate was 300sccm, and the deposition time was 35s, resulting in a second film layer (i.e., a P-type silicon layer) with a thickness of 22nm.

[0135] (7) Deposition of the first and second transparent conductive layers: PVD equipment was used to grow the TCO layer. The first transparent conductive layer used an ITO target with an In2O3 / SnO2 mass ratio of 97:3, and the second transparent conductive layer used an ITO target with an In2O3 / SnO2 mass ratio of 90:10. For the growth of the first and second transparent conductive layers, the chamber temperature was set to 100°C, the sputtering pressure was controlled at 0.5 Pa, the sputtering power range was 4 kW, and high-purity argon and oxygen were introduced, with oxygen accounting for 3%. The pre-sputtering time was 30 seconds, and the carrier speed was adjusted to achieve a thickness distribution of 90 nm.

[0136] (8) Thermal annealing: The sample prepared in step (7) was placed in an air environment for annealing, with the temperature controlled at 180°C and the time controlled at 60 min.

[0137] (9) Preparation of the first electrode and the second electrode: Photovoltaic paste (specifically, low-temperature silver paste) is printed on the surfaces of the first transparent conductive layer and the second transparent conductive layer respectively by screen printing, and then dried and sintered to form the first electrode and the second electrode.

[0138] (10) Light injection: Using laser irradiation that is ten times stronger than sunlight, weak hydrogen atoms are caused to jump or diffuse, reactivating the doping atoms, and increasing the conductivity of the first and second film layers to obtain solar cells.

[0139] Example 2

[0140] The difference from Example 1 is:

[0141] (6) Preparation of the first film layer and the second film layer: The substrate prepared above was placed in the reaction chamber of the PECVD equipment, and the first surface and the second surface were cleaned by the following steps: hydrogen was introduced into the reaction chamber, the RF power was 390 W, the deposition pressure was 1.5 mbar, the deposition temperature was 170 ° C, the hydrogen flow rate was 2000 sccm, and the deposition time was 15 s;

[0142] After cleaning, the second raw material (specifically silane and phosphine) and hydrogen are introduced to perform the gas distribution and pressure stabilization step. The above slurry is sprayed on the first surface at a spray volume of 2.5 mL / cm 2 , while turning on the RF. RF power was 1500W, deposition pressure was 2.0mbar, deposition temperature was 170°C, silane flow rate was 120sccm, phosphine flow rate was 3sccm, hydrogen flow rate was 3500sccm, and deposition time was 96s, resulting in a first film layer (i.e., an N-type silicon layer) with a thickness of 19nm.

[0143] Flip the second surface upward, introduce the third raw material (specifically silane and borane) and hydrogen, perform the gas distribution and pressure stabilization step, and spray the above slurry on the first surface at a spray volume of 2.5 mL / cm 2 The RF power was 1800W, the deposition pressure was 2.5mbar, the deposition temperature was 180°C, the silane flow rate was 160sccm, the borane flow rate was 3sccm, the hydrogen flow rate was 6000sccm, and the deposition time was 90s, resulting in a second film layer (i.e., a P-type silicon layer) with a thickness of 25nm.

[0144] (7) Deposition of the first and second transparent conductive layers: PVD equipment was used to grow the TCO layer. The first transparent conductive layer used an ITO target with an In2O3 / SnO2 mass ratio of 97:3, and the second transparent conductive layer used an ITO target with an In2O3 / SnO2 mass ratio of 90:10. For the growth of the first and second transparent conductive layers, the chamber temperature was set to 100°C, the sputtering pressure was controlled at 0.5 Pa, the sputtering power range was 4 kW, and high-purity argon and oxygen were introduced, with oxygen accounting for 3%. The pre-sputtering time was 30 seconds, and the carrier speed was adjusted to achieve a thickness distribution of 90 nm.

[0145] (8) Thermal annealing: The sample prepared in step (7) was placed in an air environment for annealing, with the temperature controlled at 180°C and the time controlled at 60 min.

[0146] (9) Preparation of the first electrode and the second electrode: Photovoltaic paste (specifically, low-temperature silver paste) is printed on the surfaces of the first transparent conductive layer and the second transparent conductive layer respectively by screen printing, and then dried and sintered to form the first electrode and the second electrode.

[0147] (10) Light injection: Using laser irradiation that is ten times stronger than sunlight, weak hydrogen atoms are caused to jump or diffuse, reactivating the doping atoms, and increasing the conductivity of the first and second film layers to obtain solar cells.

[0148] In order to highlight the beneficial effects of the embodiments of the present application, the following comparative examples are provided.

[0149] Comparative Example 1

[0150] (1) An N-type single crystal silicon wafer with a size of 166 mm × 166 mm is used as the silicon substrate layer, and the resistivity of the silicon substrate layer is 1.2 Ω·cm.

[0151] (2) Texturing of silicon substrate: A textured surface structure of an inverted pyramid is etched on the surface of the silicon wafer using acid and alkali corrosion, and the sharp pyramids are rounded using wet chemical methods.

[0152] (3) Silicon substrate cleaning: The RCA method is used to remove residual organic matter, dust particles, metal impurities and oxide layers on the surface to obtain a velvet sheet. Specifically, the cleaning is carried out in sequence using liquid I, liquid II, and HF cleaning solution, and each cleaning step is followed by a large amount of deionized water rinse.

[0153] (4) Preparation of the first passivation layer and the second passivation layer: The above-mentioned velvet sheet is sent into the PECVD equipment, and the following operations are performed on the opposite sides of the velvet sheet in the thickness direction: first, the RF power is 750W, the deposition pressure is in the range of 0.7mbar, the deposition temperature is 180℃, the silane flow rate is 200sccm, and the coating time is 30s; then the RF power is 600W, the deposition pressure is in the range of 1mbar, the deposition temperature is 180℃, the silane flow rate is 250sccm, the hydrogen flow rate is 2500sccm, and the coating time is 25s, and then 8nm of intrinsic amorphous silicon layer is deposited on the opposite sides of the thickness direction to form the first passivation layer and the second passivation layer, thereby obtaining the substrate.

[0154] (5) Preparation of N-type silicon layer and P-type silicon layer: The substrate prepared above was placed in the reaction chamber of the PECVD equipment, and the first surface and the second surface were cleaned by the following steps: hydrogen was introduced into the reaction chamber, the RF power was 390 W, the deposition pressure was 1.5 mbar, the deposition temperature was 170 ° C, the hydrogen flow rate was 2000 sccm, and the deposition time was 15 s;

[0155] After cleaning, silane, phosphine and hydrogen are introduced to perform the gas distribution and pressure stabilization step, and then the radio frequency is turned on. First, the seed layer is deposited with an RF power of 1500W, a deposition pressure of 2.5mbar, a deposition temperature of 170°C, a silane flow rate of 50sccm, a phosphine flow rate of 1sccm, a hydrogen flow rate of 12000sccm, and a coating time of 25s to obtain a first seed layer with a crystallization rate of 8% and a thickness of 1.5nm. Then the main layer is deposited with an RF power of 2000W, a deposition pressure of 3.2mbar, a deposition temperature of 170°C, a silane flow rate of 130sccm, a phosphine flow rate of 3sccm, a hydrogen flow rate of 12000sccm, and a coating time of 270s to obtain a first deposited main layer. An N-type silicon layer with a thickness of 18nm is obtained, and the N-type silicon layer includes the above-mentioned first seed layer and the first deposited main layer arranged in a stacked manner.

[0156] Flip the film so that the second surface faces upward, introduce silane, borane and hydrogen, perform the gas distribution and pressure stabilization step, and then turn on the radio frequency. First, deposit the seed layer with an RF power of 3000W, a deposition pressure of 2.5mbar, a deposition temperature of 180°C, a silane flow rate of 40sccm, a borane flow rate of 5sccm, a hydrogen flow rate of 25000sccm, and a coating time of 25s, to obtain a second seed layer with a crystallization rate of 13% and a thickness of 1.2nm. Then deposit the main layer with an RF power of 4000W, a deposition pressure of 4.0mbar, a deposition temperature of 170°C, a silane flow rate of 150sccm, a borane flow rate of 1sccm, a hydrogen flow rate of 42000sccm, and a coating time of 360s. A P-type microcrystalline silicon layer with a thickness of 28nm is obtained, and the P-type silicon layer includes the above-mentioned second seed layer and the second deposited main layer arranged in a stacked manner.

[0157] (6) Deposition of the first and second transparent conductive layers: PVD equipment was used to grow the TCO layer. The first transparent conductive layer used an ITO target with an In2O3 / SnO2 mass ratio of 97:3, and the second transparent conductive layer used an ITO target with an In2O3 / SnO2 mass ratio of 90:10. For the growth of the first and second transparent conductive layers, the chamber temperature was set to 100°C, the sputtering pressure was controlled at 0.5 Pa, the sputtering power range was 4 kW, and high-purity argon and oxygen were introduced, with oxygen accounting for 3%. The pre-sputtering time was 30 seconds, and the carrier speed was adjusted to achieve a thickness distribution of 90 nm.

[0158] (7) Thermal annealing: The sample prepared in step (6) was placed in an air environment for annealing, with the temperature controlled at 180°C and the time controlled at 60 min.

[0159] (8) Preparation of the first electrode and the second electrode: Photovoltaic paste (specifically low-temperature silver paste) is printed on the surface of the first transparent conductive layer and the second transparent conductive layer respectively by screen printing, and then dried and sintered to form the first electrode and the second electrode.

[0160] (9) Light injection: Using laser irradiation that is ten times stronger than sunlight to make weak hydrogen atoms jump or diffuse, reactivate the doping atoms, increase the conductivity of the N-type silicon layer and the P-type silicon layer, and obtain solar cells.

[0161] Crystallization rate test

[0162] After the N-type and P-type silicon layers of each Example and Comparative Example were prepared, the crystallinity of each layer was measured using Raman spectroscopy. Using a 485nm excitation light source, the crystallinity Xc of the N-type and P-type silicon layers was determined by performing a Gaussian three-peak fit on the obtained Raman spectra. Each sample was tested three times and the arithmetic average was calculated. The results are summarized in Table 1.

[0163] The crystallization rate Xc is calculated by the following formula:

[0164] Among them, I c is the peak intensity of the characteristic peak of crystalline silicon, I g is the peak intensity of the characteristic peak of crystalline silicon grain boundary, I a is the peak intensity of the characteristic peak of amorphous silicon, I 516.4 is the peak position of crystalline silicon, I 507.4 is the peak position of the crystalline silicon grain boundary, I 485.3 is the spectral peak position of amorphous silicon.

[0165] In addition, the solar cell of each embodiment was subjected to ion thinning treatment to expose the surface of the N-type silicon layer of the solar cell of the embodiment near the first passivation layer at a thickness of 2 nm, and to expose the surface of the P-type silicon layer near the second passivation layer at a thickness of 2 nm. The crystallization rate of the N-type silicon layer within 2 nm of the thickness near the first passivation layer and the crystallization rate of the P-type silicon layer within 2 nm of the thickness near the second passivation layer were tested respectively. The testing method was the same as the crystallization rate test of the N-type silicon layer and the P-type silicon layer above. The results are summarized in Table 1.

[0166] The solar cells of each embodiment and comparative example 1 were subjected to ion thinning treatment to expose the surface of the N-type silicon layer of the embodiment solar cell near the first passivation layer at a thickness of 1.5 nm, and to expose the surface of the P-type silicon layer near the second passivation layer at a thickness of 1.5 nm. The crystallization rates of the N-type silicon layer within 1.5 nm of the thickness of the first passivation layer and the crystallization rates of the P-type silicon layer within 1.5 nm of the thickness of the second passivation layer were tested, respectively. The results are summarized in Table 1.

[0167] Table 1

[0168] Performance Testing

[0169] The open circuit voltage, short circuit current, fill factor, and photoelectric conversion efficiency of the solar cells prepared in the above embodiments and comparative examples were tested using an IV tester. For details, please refer to T_ZZB 1389-2019.

[0170] Table 2

[0171] The process time and energy consumption for preparing the N-type silicon layer and the P-type silicon layer in the preparation methods of Example 1 and Comparative Example 1 are summarized in Table 3.

[0172] Table 3

[0173] Combining the data in Tables 1-3, it can be seen that the solar cells provided in the embodiments of the present application can achieve high photoelectric conversion efficiency and low production costs. Specifically, a comparison of the parameters between Example 1 and Comparative Example 1 shows that when the N-type silicon layer and the P-type silicon layer achieve comparable crystallization rates, the thickness of the N-type silicon layer and the P-type silicon layer in Example 1 are significantly smaller than those in Comparative Example 1, and the performance of the solar cell is comparable.

[0174] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification and features of different embodiments or examples, unless they are mutually inconsistent.

[0175] Although the embodiments of the present disclosure have been shown and described above, it is understood that the above embodiments are illustrative and are not to be construed as limitations on the present disclosure. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present disclosure.

Claims

1. A method for preparing a microcrystalline silicon film, characterized in that: include: Silicon crystal nanoparticles and a first raw material containing a silicon source are spread on the surface of the carrier to form a microcrystalline silicon film material on the surface of the carrier.

2. The method for preparing a microcrystalline silicon film according to claim 1, wherein: The method of spreading silicon crystal nanoparticles and a first raw material containing a silicon source on the surface of the carrier comprises: The carrier is placed in a reaction chamber of a deposition device, the silicon crystal nanoparticles are sprayed onto the surface of the carrier, and the first raw material is introduced into the reaction chamber at the same time.

3. The preparation method according to claim 1 or 2, characterized in that The distributing of silicon crystal nanoparticles onto the surface of the carrier comprises: The slurry containing the silicon crystal nanoparticles is sprayed onto the surface of the carrier; the content of the silicon crystal nanoparticles in the slurry is 10g / L-100g / L; the single-side spraying volume of the slurry is 2mL / cm 2 -5mL / cm 2 .

4. The preparation method according to claim 3, characterized in that The slurry includes a first solvent and the silicon crystal nanoparticles dispersed in the first solvent, wherein the first solvent includes one or more of dimethylformamide, dimethyl sulfoxide, and n-butanol.

5. The preparation method according to any one of claims 1 to 4, characterized in that The method of spreading silicon crystal nanoparticles and a first raw material containing a silicon source on the surface of the carrier comprises: The carrier is placed in a reaction chamber of a deposition device, the silicon crystal nanoparticles are sprayed onto the surface of the carrier, and the first raw material is introduced into the reaction chamber at the same time. The power of the deposition device is 200W-3000W, the pressure in the reaction chamber is 1mbar-3mbar, the temperature in the reaction chamber is 120℃-210℃, and the deposition time is 30s-200s; the first raw material includes the silicon source and reducing gas, the flow rate of the silicon source is 10sccm-500sccm, and the flow rate of the reducing gas is 200sccm-8000sccm.

6. The preparation method according to any one of claims 1 to 5, characterized in that The first raw material also includes a doping element source to obtain an N-type microcrystalline silicon film material or a P-type microcrystalline silicon film material.

7. The preparation method according to any one of claims 1 to 6, characterized in that The silicon crystal nanoparticles are prepared by the following method: dispersing silicate in a second solvent to obtain a silicate solution, adjusting the pH value of the silicate solution to 2-4, performing a first heating, then adjusting the pH value of the silicate solution to 6-8, performing a second heating, dialyzing, and drying to obtain a gel, and calcining the gel to obtain silicon nanoparticles; Wherein, the second solvent is selected from water and / or alcohols; The first heating temperature is 60°C-90°C, and the heating time is 1h-3h; The second heating temperature is 60°C-90°C, and the heating time is 1h-2.5h; The calcination temperature is 600°C-900°C.

8. The preparation method according to claim 7, characterized in that The silicate solution further includes salt containing a doping element, wherein the doping element includes at least one of phosphorus, arsenic and antimony, or the doping element includes at least one of boron, aluminum and gallium.

9. A method for preparing a solar cell, characterized in that: include: Providing a substrate, wherein the substrate has a first surface and a second surface disposed opposite to each other along a thickness direction thereof; the substrate comprises a silicon substrate layer; Spreading silicon crystal nanoparticles and a second raw material onto the first surface to form a first film layer on the first surface, wherein the second raw material includes a silicon source, a reducing gas, and a first doping element source; and / or spreading silicon crystal nanoparticles and a third raw material onto the second surface to form a second film layer on the second surface, wherein the third raw material includes a silicon source, a reducing gas, and a second doping element source, to obtain a solar cell; Among them, one of the first doping element source and the second doping element source is selected from at least one of a phosphorus element source, an arsenic element source and an antimony element source, and the other is selected from at least one of a boron element source, an aluminum element source and a gallium element source.

10. The method for preparing a solar cell according to claim 9, wherein: The silicon crystalline nanoparticles dispersed on the first surface contain a first doping element, and / or the silicon crystalline nanoparticles dispersed on the second surface contain a second doping element.

11. The method for preparing a solar cell according to claim 9 or 10, characterized in that: The particle size of the silicon crystal nanoparticles is ≤30 nm.

12. The method for preparing a solar cell according to any one of claims 9 to 11, characterized in that: The step of spreading silicon crystal nanoparticles and a second raw material onto the first surface comprises: placing the substrate in a reaction chamber of a deposition device, spraying the silicon crystal nanoparticles onto the first surface, and simultaneously introducing the second raw material into the reaction chamber, wherein the first doping element source is selected from at least one of a phosphorus source, an arsenic source, and an antimony source; the power of the deposition device is 200W-3000W, the pressure in the reaction chamber is 1mbar-3mbar, the temperature in the reaction chamber is 130°C-210°C, and the deposition time is 30s-150s; the flow rate of the silicon source is 50sccm-1000sccm, the flow rate of the first doping element source is 1sccm-80sccm, and the flow rate of the reducing gas is 500sccm-4000sccm; and / or, The method of spreading silicon crystal nanoparticles and a third raw material onto the second surface includes: placing the substrate in a reaction chamber of a deposition device, spraying the silicon crystal nanoparticles onto the second surface, and simultaneously introducing the third raw material into the reaction chamber, wherein the second doping element source is selected from at least one of a boron element source, an aluminum element source, and a gallium element source; the power of the deposition device is 500W-3000W, the deposition pressure is 1mbar-3mbar, the deposition temperature is 120℃-200℃, and the deposition time is 30s-200s; the flow rate of the silicon source is 50sccm-500sccm, the flow rate of the second doping element source is 1sccm-100sccm, and the flow rate of the reducing gas is 200sccm-8000sccm.

13. A solar cell, characterized in that: The invention comprises a substrate, an N-type silicon layer, and a P-type silicon layer; wherein the substrate comprises a silicon substrate layer, or comprises a silicon substrate layer and passivation layers respectively arranged on opposite sides of the silicon substrate layer; the N-type silicon layer and the P-type silicon layer are respectively arranged on opposite sides of the substrate in the thickness direction and are both in direct contact with the silicon substrate layer, or the N-type silicon layer and the P-type silicon layer are respectively connected to the silicon substrate layer via the passivation layers; The N-type silicon layer is an N-type microcrystalline silicon layer, and the crystallization rate of the N-type microcrystalline silicon layer within a thickness range of at least 2 nm close to the substrate is greater than 15%; and / or, the P-type silicon layer is a P-type microcrystalline silicon layer, and the crystallization rate of the P-type microcrystalline silicon layer within a thickness range of at least 2 nm close to the substrate is greater than 15%.

14. The solar cell according to claim 13, wherein: The crystallization rate of the N-type microcrystalline silicon layer is 40%-65%, and / or the crystallization rate of the P-type microcrystalline silicon layer is 40%-65%.

15. The solar cell according to claim 13 or 14, characterized in that: The thickness of the N-type microcrystalline silicon layer is 10 nm to 30 nm; the thickness of the P-type microcrystalline silicon layer is 15 nm to 40 nm.

16. The solar cell according to any one of claims 13 to 15, characterized in that: The material of the passivation layer includes at least one of intrinsic amorphous silicon, amorphous silicon oxide and silicon carbide.

17. The solar cell according to any one of claims 13 to 16, characterized in that: It also includes a first transparent conductive oxide layer and a first electrode stacked in sequence on a surface of the N-type silicon layer facing away from the substrate, and A second transparent conductive oxide layer and a second electrode are sequentially stacked on a surface of the P-type silicon layer facing away from the substrate.

18. A solar cell module, characterized in that: The invention comprises a plurality of solar cells manufactured by the method for manufacturing a solar cell according to any one of claims 9 to 12, or comprises a plurality of solar cells according to any one of claims 13 to 17, wherein the plurality of solar cells are electrically connected.

19. A photovoltaic system, characterized in that: A photovoltaic assembly and an energy storage system are electrically connected, wherein the photovoltaic assembly comprises the solar cell assembly according to claim 18.

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