Apparatus and method

Abstract

A readout circuit comprising: an amplifier, configured to output an analogue voltage pulse (AMPOUT), having a leading edge and a trailing edge, in response to receiving an input signal from a sensor; and a feedback circuit (I_FB_Const, C_FB, I_FB_MOD), configured to provide a feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein the feedback signal is configured to compensate for the trailing edge of the analogue voltage pulse.

Description

[0001] APPARATUS AND METHOD

[0002] Field

[0003] The present invention relates to readout circuits, for example for time sensitive applications such as particle or photon detection, Time-of-Flight and imaging through turbid media, distributed acoustic sensing and network timing applications.

[0004] Background to the invention

[0005] Readout circuits for time sensitive applications typically comprise an amplifier and a comparator, followed by more complex digital readout electronics. The amplifier produces an analogue voltage pulse that is proportional to the total charge collected by a solid state sensor such as a sensing diode upon an event (e.g. particle or photon detection). The comparator translates the analogue pulse into a digital pulse, as long as the voltage amplitude of the analogue pulse is over a pre-set threshold voltage. The digital signal is then time-stamped (i.e. a time tag is attached to it), thus defining the Time-of-Arrival. However, the instant in time when the analogue pulse crosses the threshold voltage typically varies as a function of its voltage amplitude (e.g. an analogue pulse with larger amplitude crosses the threshold voltage at an earlier time). This adds a significant uncertainty to the Time-of-Arrival measurement, which is known as time-walk. The uncertainty is essentially limited by the response time of the readout electronics, which depends mostly on the rate at which the amplifier can react to a voltage change at its input.

[0006] Currently, most approaches to improve the time resolution of monolithic sensors focus on one of two optimisation schemes. Some developments improve the rising edge of the amplifier either by using very fast transistors (SiGe HBT)

[0050] or modifying the substrate to add an internal gain layer (Monolith)

[0051] to achieve a larger input charge. Other groups work on improving the sampling of the analogue signal with very fine time binning [52 - 55], Both approaches come at a price and depend on the process and foundry support. Faster amplifiers require more power while sophisticated sampling schemes need both power and space due to the increased circuit complexity, reducing the active area. Also, the performance of the individual channels is sensitive to the dispersion of the transistor properties, making their calibration significantly more complex.

[0007] In traditional readout circuits, the time-walk can be corrected offline using the so-called Time- over-Threshold or ToT, which is the time difference between the time-stamps that correspond to the leading and trailing edges of the digital pulse (i.e. when the analogue pulse crosses the threshold voltage in its rising and falling transitions). As the Time-over-Threshold is related to the input charge and as such to the time-walk, when using ToT corrections, the leading edge time-stamp and therefore sensor time accuracy are improved. More recently, various studies focussed on monolithic HV-CMOS sensors have shown that on-sensor time-walk correcting methods, which are much preferred and implemented by readout circuits, improve the timewalk substantially. These methods concentrate on the leading edge of the digital pulse and tend to require large readout circuits. See [1] for further details.

[0008] As particle physics experiments strive for ever higher particle rates, sensors have to keep step with the demands. To resolve ambiguities and pile-up so called 4D tracking [48, 49], which demands spatial information with precise time information is required. In the case of a Large Hadron Collider (LHC) experiment like ATLAS for example assigning hits to the right bunch crossing would not be enough as multiple bunches can collide at the different points along the beam axes and not just at the nominal interaction point. Time information with a finer binning than the bunch crossing can help to resolve from which interaction a particle came from which reduces the rate of mis-reconstructed tracks and computational power to resolve the combinatorics of the event.

[0009] Hence, there is a need to improve readout circuits, for example for time sensitive applications such as particle or photon detection, Time-of-Flight and imaging through turbid media, distributed acoustic sensing and network timing applications.

[0010] Summary of the Invention

[0011] It is one aim of the present invention, amongst others, to provide a readout circuit and a method thereof which at least partially obviates or mitigates at least some of the disadvantages of the prior art, whether identified herein or elsewhere.

[0012] A first aspect provides a readout circuit comprising: an amplifier, configured to output an analogue voltage pulse, having a leading edge and a trailing edge, in response to receiving an input signal from a sensor; and a feedback circuit, configured to provide a feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein the feedback signal is configured to compensate for the trailing edge of the analogue voltage pulse.

[0013] In other words, the feedback signal is a function of the analogue voltage pulse output from the amplifier, whereby the feedback signal is configured to compensate for the trailing edge of the analogue voltage pulse A second aspect provides HV-CMOS pixel sensor comprising the readout circuit according to the first aspect.

[0014] A third aspect provides a method of correcting a Time-of-Arrival of an event, for example detection of a particle or a photon, the method comprising: outputting, by an amplifier, an analogue voltage pulse, having a leading edge and a trailing edge, in response to receiving an input signal, from a sensor, caused by the event; and correcting the Time-of-Arrival of the event by providing, to the amplifier, a feedback signal based on the analogue voltage pulse output from the amplifier, comprising compensating for the trailing edge of the analogue voltage pulse using the feedback signal.

[0015] Detailed Description of the Invention

[0016] According to the present invention there is provided a readout circuit, as set forth in the appended claims. Also provided is method. Other features of the invention will be apparent from the dependent claims, and the description that follows.

[0017] Readout circuit

[0018] The present invention is in the field of fast timing detectors for applications that require nanosecond range accuracy, such as medicine and physics experiments. The inventors have engineered a new method, for measuring the so-called Time-of-Arrival, which highly suppresses the uncertainty typically associated with this parameter and therefore improves the time accuracy. The inventors have designed dedicated readout electronics that implement this method, fabricated them in a High Voltage-CMOS (HV-CMOS) process together with the sensing diode and evaluated the fabricated monolithic device (named UKRI-MPWO). The measured results suggest that our invention reduces the time uncertainty by a factor of 10 when compared to the state-of-the-art.

[0019] A first aspect provides a readout circuit comprising: an amplifier, configured to output an analogue voltage pulse, having a leading edge and a trailing edge, in response to receiving an input signal (e.g. caused by an event) from a sensor; and a feedback circuit, configured to provide a feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein the feedback signal is configured to compensate for the trailing edge of the analogue voltage pulse.

[0020] In this way, the readout circuit is returned relatively more quickly to its normal working point (i.e. no event) since the trailing edge is much less affected by time-walk, compared with compensating for the leading edge. In this way, the readout circuit provides improved time information (precision and / or accuracy).

[0021] In more detail, the compensating feedback (i.e. the feedback signal) takes a novel and alternative approach. The digital pulse at a comparator output, for example, is used to trigger an additional feedback current in the amplifier to quickly return this circuit to its normal working point (i.e. no event), as done in switched-reset readout schemes [4] in which a digital pulse is typically used to trigger an additional feedback current. The novelty in the compensating feedback includes the additional feedback current being proportional to the amplifier voltage amplitude and / or being used to compensate the falling (also known as trailing) edge of the amplifier rather than the rising edge (see Figure 7). As the trailing edge is much less affected by time-walk, the feedback signal provides a much better time information than the leading edge.

[0022] When compared to other approaches, the compensating feedback has the advantage of being fully analogue and requiring little extra power or faster circuitry. Only a small number of additional transistors with a small footprint are required for this scheme. Currently, most developments for time sensitive applications either use faster analogue amplifiers which require more power or special processes to be implemented or sample the leading edge multiple times to extrapolate a better timing information at the expenses of being computationally expensive. Since in the compensating feedback approach the feedback current is proportional to the input, this intrinsically reduces the impact of electronic noise. Additionally, as the peak of the analogue pulse is stabilised in this circuit, an amplitude measurement would be easier to achieve with this scheme.

[0023] The functional schematic of a compensating feedback readout circuit according to an exemplary embodiment is shown in Figure 4. It is a standard front-end for HV-CMOS pixel sensors besides the additional feedback current source on the bottom of the schematic. It is enabled by the comparator output and as such has no influence on the leading edge threshold crossing. The current of the additional feedback is proportional to the amplitude of the amplifier output after a high-pass filter. The compensating feedback and the amplifier work against each other until they fully compensate each other, at which point the amplifier returns to its initial working point. In the dynamic range of the compensating feedback this return only weakly depends on the input charge as shown in Figure 7.

[0024] The circuit has been simulated to optimise its performance and characterise it. Figure 8 shows the timing performance of the circuit for different number of input electrons. Since the trailing edge is after the leading edge, both edges have been offset subtracted to show the variation of the timing over the input range. As the number of input electrons increases, the amplitude of the amplifier output does the same, causing a faster rise time and an earlier threshold crossing until the amplifier reaches saturation. In other words, Figure 8 shows At extracted from postlayout transient simulation as a function of input charge for both edges.

[0025] For the trailing edge three regions of performance are visible. In the first region, the pulse is too short to achieve full compensation which would require an additional time-walk correction to improve the timing. However, even in this region, the trailing edge has much less difference in time than the leading edge. If the pulse is long enough to be fully compensated, the difference in time is less than 1 ns (in the range between 5 ke and 8 ke in Figure 8). For large input charges (> 10 ke), the amplifier is in saturation and can no longer be fully compensated as the output is no longer proportional to the input. As the leading edge is less time-walk affected in this region, the leading edge is the better time information in this region.

[0026] To decide which edge to use, a simple check on the ToT can be implemented on future prototypes according to Equation 2:

[0027] ToA = tTE- offsetTEToT < ToTcross-overToA = tTE- offsetLEToT > ToTcross-over

[0028] Results of first measurements of the circuit are shown in Figure 15. Due to limitations in the injection circuit which creates the input charge for the amplifier, not the full range can be covered. Also, the working point of the compensating feedback current had to be changed to reduce oscillations. While the performance is not as good as in the simulation in Figure 8, the general behaviour is as expected with the turning point of the feedback compensation visible.

[0029] In one example, the feedback circuit is configured to provide the feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein the feedback signal is proportional, for example directly proportional, to an amplitude of the analogue voltage pulse. In this way, the feedback signal is proportional to the amplifier voltage amplitude rather than, for example, independent thereof. In this way, compensation of the trailing edge by the feedback signal is improved.

[0030] In one example, the feedback circuit is configured to provide the feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein the feedback signal is configured to compensate for the trailing edge of the analogue voltage pulse by time walk compensating the trailing edge of the analogue voltage pulse. In this way, compensation of the trailing edge by the feedback signal is improved. In one example, the feedback circuit is configured to provide the feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein feedback signal is configured to not compensate for the leading edge of the analogue voltage pulse. As the trailing edge is much less affected by time-walk, the feedback signal provides a much better time information than the leading edge.

[0031] In one example, the feedback circuit is configured to provide the feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein feedback signal is configured to only compensate for the trailing edge of the analogue voltage pulse. As the trailing edge is much less affected by time-walk, the feedback signal provides a much better time information than the leading edge.

[0032] In one example, the readout circuit comprises: a comparator, configured to output a digital voltage pulse dependent on the analogue voltage pulse output from the amplifier; and wherein the feedback circuit is configured to provide the feedback signal to the amplifier, according to the digital voltage pulse output from the comparator.

[0033] In this way, the digital voltage pulse at the comparator output may be used to trigger the additional feedback current (i.e. the feedback signal) in the amplifier to quickly return this circuit to its normal working point (i.e. no event), as done in switched-reset readout schemes [4] in which a digital pulse is typically used to trigger an additional feedback current.

[0034] In one example, the comparator is configured to selectively output the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier. In this way, the comparator selectively outputs the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier, for example based on an amplitude of the analogue voltage pulse, thereby discriminating noise, for example.

[0035] In one example, the comparator is configured to selectively output the digital voltage pulse dependent on a pre-set threshold of the analogue voltage pulse output from the amplifier. In this way, the comparator selectively outputs the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier, for example based on an amplitude of the analogue voltage pulse relative to the pre-set threshold, thereby discriminating noise, for example.

[0036] In one example, the readout circuit comprises: a high-pass filter, configured to attenuate a frequency of the analogue voltage pulse. In this way, lower frequencies may be attenuated.

[0037] In one example, the feedback signal comprises and / or is a feedback current.

[0038] In one example, the readout circuit comprises the sensor, for example a sensor diode.

[0039] Pixel sensor

[0040] A second aspect provides HV-CMOS pixel sensor, more generally a pixel sensor, comprising the readout circuit according to the first aspect.

[0041] The pixel sensor according to the second aspect may include any feature described with respect to the first aspect.

[0042] Method

[0043] The third aspect provides a method of correcting a Time-of-Arrival of an event, for example detection of a particle or a photon, the method comprising: outputting, by an amplifier, an analogue voltage pulse, having a leading edge and a trailing edge, in response to receiving an input signal, from a sensor, caused by the event; and correcting the Time-of-Arrival of the event by providing, to the amplifier, a feedback signal based on the analogue voltage pulse output from the amplifier, comprising compensating for the trailing edge of the analogue voltage pulse using the feedback signal.

[0044] The method according to the third aspect may include any step described with respect to the first aspect and / or the second aspect.

[0045] In one example, the feedback signal is proportional to an amplitude of the analogue voltage pulse.

[0046] In one example, compensating for the trailing edge of the analogue voltage pulse using the feedback signal comprises time walk compensating for the trailing edge of the analogue voltage pulse using the feedback signal.

[0047] In one example, correcting the Time-of-Arrival of the event by providing, to the amplifier, the feedback signal based on the analogue voltage pulse output from the amplifier, does not comprise compensating for the leading edge of the analogue voltage pulse, for example using the feedback signal. In one example, the method comprises: outputting, by a comparator, a digital voltage pulse dependent on the analogue voltage pulse output from the amplifier; and wherein correcting the Time-of-Arrival of the event by providing, to the amplifier, the feedback signal based on the analogue voltage pulse output from the amplifier comprises correcting the Time-of-Arrival of the event by providing, to the amplifier, the feedback signal according to the digital voltage pulse output from the comparator.

[0048] In one example, outputting, by a comparator, the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier comprises selectively outputting, by the comparator, the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier.

[0049] In one example, selectively outputting, by the comparator, the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier comprises selectively outputting, by the comparator, the digital voltage pulse dependent on a pre-set threshold of the analogue voltage pulse output from the amplifier.

[0050] In one example, the method comprises: attenuating, by a high pass filter, a frequency of the analogue voltage pulse.

[0051] In one example, the feedback signal comprises and / or is a feedback current.

[0052] In one example, the sensor comprises and / or is sensor diode.

[0053] A fourth aspect provides a method of estimating and / or calculating a Time-of-Arrival of an event, for example detection of a particle or a photon, the method comprising correcting the Time-of-Arrival of the event according to the third aspect.

[0054] Throughout this specification, the term “comprising” or “comprises” means including the component(s) specified but not to the exclusion of the presence of other components. The term “consisting essentially of’ or “consists essentially of’ means including the components specified but excluding other components except for materials present as impurities, unavoidable materials present as a result of processes used to provide the components, and components added for a purpose other than achieving the technical effect of the invention, such as colourants, and the like.

[0055] The term “consisting of’ or “consists of’ means including the components specified but excluding other components. Whenever appropriate, depending upon the context, the use of the term “comprises” or “comprising” may also be taken to include the meaning “consists essentially of’ or “consisting essentially of’, and also may be taken to include the meaning “consists of’ or “consisting of’.

[0056] The optional features set out herein may be used either individually or in combination with each other where appropriate and particularly in the combinations as set out in the accompanying claims. The optional features for each aspect or exemplary embodiment of the invention, as set out herein are also applicable to all other aspects or exemplary embodiments of the invention, where appropriate. In otherwords, the skilled person reading this specification should consider the optional features for each aspect or exemplary embodiment of the invention as interchangeable and combinable between different aspects and exemplary embodiments.

[0057] Brief description of the drawings

[0058] For a better understanding of the invention, and to show how exemplary embodiments of the same may be brought into effect, reference will be made, by way of example only, to the accompanying diagrammatic Figures, in which:

[0059] Figure 1 : Schematic sketch of the continuous-reset pixel of RD50-MPW2

[0056] , External signals are labelled red, internal bias voltages are blue.

[0060] Figure 2: Schematic sketch of the switched-reset pixel of RD50-MPW2.

[0061] Figure 3: Analogue simulations of the amplifier and comparator response of the-switched reset pixel of RD50-MPW2 for an input range of 3 ke to 25 ke.

[0062] Figure 4: Schematic sketch of the compensating feedback pixel of UKRI-MPWO, according to an exemplary embodiment.

[0063] Figure 5: Transistor level schematic of the compensating feedback pixel of UKRI-MPWO, according to an exemplary embodiment. The bias transistor is marked in red. The NMOS devices coloured in blue control the feedback current as function of the threshold TH and the high-pass filter output HPOUT. The PMOS current mirror pair is highlighted in magenta. The pass transistor (orange) and pull-up (green) are controlled by the external switch condition S and its logical complement SB. Figure 6a: Example of a transient simulation of compensating feedback as response to injected charge, according to an exemplary embodiment. The spikes in the feedback current (green) on the comparator edges are simulation artefacts.

[0064] Figure 6b: Plot of voltage against time for the injection and comparator;

[0065] Figure 7: Transient amplifier response to different amounts of input charge, according to an exemplary embodiment.

[0066] Figure 8: At as function of input charge for both edges, according to an exemplary embodiment.

[0067] Figures 9a and 9b: At and ToT for different thresholds, according to an exemplary embodiment.

[0068] Figures 10a and 10b: At and ToT for different values of VNFB MOD, according to an exemplary embodiment.

[0069] Figures 11a and 11 b: At and ToT for different THeff, according to an exemplary embodiment.

[0070] Figures 12a and 12b: At and ToT fortwo pixels, according to an exemplary embodiment.

[0071] Figure 13: Schematics of an NMOS and a PMOS source follower, according to an exemplary embodiment.

[0072] Figure 14: Toy simulation of the response of an NMOS and a PMOS source follower to the same input, according to an exemplary embodiment.

[0073] Figure 15: Suggested transistor level schematic of an improved compensating feedback pixel, according to an exemplary embodiment.

[0074] Detailed Description of the Drawings

[0075] In this work a proof-of-principle circuit for the analogue compensation of time-walk at the cost of little extra power consumption and low additional circuitry is developed, simulated and measured.

[0076] ANALOGUE FRONT-END OF RD50-MPW2 The analogue pixels implemented in UKRI-MPWO follow the designs of RD50-MPW2

[0056] , The base topology of the analogue front-end is sketched in Figure 1. A reverse biased diode is AC coupled to the input of an amplifier (the CSA). Since the input transistor is a PMOS type, the CSAis referred to as PMOS amplifier. A constant current feedback between the output and the input restores the amplifier to its nominal working point after it has amplified a signal from the sensor diode. As this feedback current is constant, the trailing edge of the signal has a constant slope. This mode of feedback is called continuous-reset. A source follower, which also acts as a low-pass, drives the signal through a high-pass filter. The high-pass filter output is fed into the comparator which compares the signal with a threshold voltage. If the input is higher than the threshold voltage, a comparator output signal is generated. This topology is commonly used in HV-CMOS sensors

[0040] ,

[0077] Besides the continuous feedback pixel, another design is implemented in RD50-MPW2

[0056] , The so called switched-reset feedback contains an additional current source which is triggered by the comparator, as depicted in Figure 2. As shown in Figure 2, charge is collected by a reverse biased diode and then AC-coupled into a charge sensitive amplifier. The amplifier output is fed into a comparator, which discriminates the signal, by a high-pass filter (HP). The HP reduces the impact of low frequency noise and allows the setting of the baseline (BL), the DC working point of the comparator independently of the amplifier. Besides a constant feedback current source (l_FB_Const) an additional feedback source (l_FB_SWITCHED) is added to the circuit. This switched feedback source is triggered by the comparator output to quickly restore the amplifier to its nominal working point after a hit has been registered, reducing the analogue dead time. The idea behind this circuit is to quickly return the amplifier to its initial state after the comparator has triggered cutting the Time-over-Threshold (ToT) short and thus reducing the analogue dead time of the pixel. Figure 3 shows simulations showing the amplifier output AMPOUT and comparator output COMPOUT for an input range of 3k electrons to 25k electrons. The Leading Edge (LE) and Trailing Edge (TE) of the amplifier pulse are annotated. Due to its intrinsic delays, the comparator switching occurs later than the threshold crossing of the input waveforms. The comparator for RD50-MPW2 was optimised for the LE which causes a larger delay for the TE.

[0078] WORKING PRINCIPLE OF THE COMPENSATING FEEDBACK

[0079] Looking at the amplifier response in Figure 3 one can notice that the trailing edges (TEs) of the signal are much closer to each other than the leading edges (LEs) compared to the input charge. The observation that the trailing edge of the amplifier signal could potentially be a better estimate for the Time of Arrival (ToA) of a particle than the leading edge suggests that the feedback can be designed such that it compensates for the time-walk in the trailing edge. The design of the compensating feedback pixel is based on this concept. To achieve a compensation, the circuit from Figure 2 is modified. As the amplitude of the amplifier output is in first order linear with the input charge, a feedback proportional to the amplitude should compensate the difference. To not influence the detection efficiency, the feedback should still be gated by the comparator output, like the switched-reset. The resulting circuit is schematically sketched in Figure 4. Compared to the switched-reset pixel, the additional switched feedback current source is replaced by a current source which is controlled by the amplifier output. This new current source is also dependent on the threshold voltage to take into account that at higher thresholds the comparator is triggered later so more current is required to compensate. In other words, the additional feedback current source of Figure 2 is replaced by a new current source which is controlled by the high-pass output and threshold. It is still gated by the comparator output. Since the feedback current is now a function of pulse height at a given time, smaller signals receive a weaker current while larger signals receive a stronger feedback. This ensures a more uniform response of the TE by compensating the difference in amplitude.

[0080] The readout circuit shown in Figure 4 comprises: an amplifier, configured to output an analogue voltage pulse, having a leading edge and a trailing edge, in response to receiving an input signal from a sensor; and a feedback circuit, configured to provide a feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein the feedback signal is configured to compensate for the trailing edge of the analogue voltage pulse.

[0081] In this example, the feedback circuit is configured to provide the feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein the feedback signal is proportional to an amplitude of the analogue voltage pulse. More generally, the feedback signal may be termed a function of the pulse height at a given time.

[0082] In this example, the feedback circuit is configured to provide the feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein the feedback signal is configured to compensate for the trailing edge of the analogue voltage pulse by time walk compensating the trailing edge of the analogue voltage pulse.

[0083] In this example, the feedback circuit is configured to provide the feedback signal to the amplifier, based on the analogue voltage pulse output from the amplifier, wherein feedback signal is configured to not compensate for the leading edge of the analogue voltage pulse.

[0084] In this example, the readout circuit comprises: a comparator, configured to output a digital voltage pulse dependent on the analogue voltage pulse output from the amplifier; and wherein the feedback circuit is configured to provide the feedback signal to the amplifier, according to the digital voltage pulse output from the comparator.

[0085] In this example, the comparator is configured to selectively output the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier.

[0086] In this example, the comparator is configured to selectively output the digital voltage pulse dependent on a pre-set threshold of the analogue voltage pulse output from the amplifier.

[0087] In this example, the readout circuit comprises: a high-pass filter, configured to attenuate a frequency of the analogue voltage pulse.

[0088] In this example, the feedback signal comprises and / or is a feedback current.

[0089] In this example, the readout circuit comprises the sensor, for example a sensor diode.

[0090] In one example, the readout circuit comprises a bias transistor for an amplitude of the feedback signal (i.e. the feedback strength), wherein the bias transistor is split into a first branch (also known as arm) for a high-pass filter and a second branch for a pre-set threshold, thereby allowing individual adjustment of both branches.

[0091] In one example, the readout circuit

[0092] The position of the gating logic is also improved in this version. In the first designs, the bias voltage for the feedback strength was gated which was considered disadvantageous. Gating the bias voltage puts a load on the bias line which it is not designed for and might create a feedback into other pixels. Moving the gating logic between the current mirror pair still puts a load on the branch controlled by the high-pass and necessitates a pull-up. Gating the output of the current mirror is most likely the better solution as it loads only the current mirror output transistor and removes the need for a pull-up or pull-down.

[0093] CIRCUIT DESIGN AND SIMULATION

[0094] Introduction

[0095] The compensating feedback pixel was designed from the switched-reset pixel and replacing the transistors of the switched current source with the new feedback. The implemented design according to an exemplary embodiment is shown in Figure 5. The circuit is biased by a bias voltage (VNFB MOD) which controls the absolute strength of the feedback current marked in red. The NMOS transistor regulated by the high-pass filter output HPOUT generates the compensating feedback as function of the amplifier output while an identical transistor is connected to the threshold TH in parallel. Both are highlighted in blue. The top part is a PMOS current mirror (magenta) with gating logic set by the external switch condition S, the comparator output COMPOUT, and its logical complement SB. If the comparator is off, then the connection between the PMOS current mirror pair is closed by the transistor marked in orange and the gate of the output transistor is pulled up to the supply voltage, closing it. As the comparator triggers, the pull-up (green) is released and the connection between the current mirror pair opened allowing the same current to flow through both branches of the circuit. Figure 6a shows a transient simulation of the response of the analogue front-end to charge injected into the amplifier. The feedback current follows the amplifier until the comparator turns off. Figure 6b shows a similar graph which illustrates how the delays at each edge are measured. The reference times (dashed vertical lines) for the injection and comparator edges are defined by the 50% point between the higher and lower levels (dashed horizontal lines) of the respective signal. The amplifier response to different amounts of input charge is simulated in Figure 7 showing the compensation working over a large input range. The simulation also hints at the two cases in which the compensation cannot work properly. The first case is a very small pulse which has a ToT too short for the compensation to take effect. The second case are very large charge depositions which cause the amplifier to saturate. As the amplifier response in this region is no longer proportional to the input, the feedback is not either. This case however is not detrimental to the overall performance as the leading edge has then a much better time response so a good time measurement is still performed.

[0096] Expected Charge Range and Figure of Merit

[0097] To determine reasonable input range for the simulations, the depletion depth of the sensor has to be considered. UKRI-MPWO is produced on wafers with a nominal resistivity of 1.9 kQcm with a total thickness of 280 pm like some wafers of RD50-MPW2. The depletion of RD50- MPW2 was investigated using e-TCT

[0057] , The initial resistivity was found to be 2.2 kQcm compared to the nominal 1.9 kQcm. For the unirradiated sample a depletion depth of 140 pm was found while a sample irradiated to 2 x 1015neq / cm2had its depletion reduced to 50 pm. With a conservative estimate of 80 e / pm for a Minimum Ionizing Particle (MIP) the expected mean charge range would be (4-11) ke. As these are only the mean charge depositions, smaller and larger number have to be considered as well. UKRI-MPWO is expected to reach full depletion which would yield charges of 20 ke and above. e-TCT studies of UKRI-MPWO

[0058] show full depletion for unirradiated samples and 50 pm for a sample irradiated to 1 x16neq / cm2validating these assumptions. For the optimisation of the circuit and the Digital-to-Analog Converter (DAC) settings used for the circuit biasing, a figure of merit must be defined. The aim of this circuit is to minimise the dependence of the delay of the trailing edge with respect to the initial charge deposition. Thus the figure of merit At, the offset corrected delay, for each comparator edge is defined by Equation 1 :

[0098] At = dx(Q) — min(dx') where dxis the delay of the respective edge (x = TE / LE) to the input signal Q. The smaller At over the range of input signal, the smaller the difference in time at which the pulses are registered yielding a better time resolution. For the initial simulations a low effective threshold THEff= TH - BL of 30 mV is chosen, which is roughly 5 times the simulated input referred noise. The presented results are produced using the parasitic extraction of the layout which investigates the layout for parasitic capacitors and resistors formed by the components of the circuit.

[0099] Equation 1 may also be expressed as: where dLEis the delay of the leading edge to the input signal Q and dTEis the delay of the trailing edge to the input signal Q. Figure 6b shows how dLEand dTEare measured. min(dLE / TE) is the smallest delay of a given data set for each edge and as shown above is subtracted to remove offsets in time.

[0100] Simulation Results

[0101] The transistor dimensions and bias currents of circuit are optimised to achieve the smallest AtTE within the linear region of the amplifier. The results are plotted in Figure 8 which shows the At for both edges as function of input charge. For the leading edge the expected time-walk behaviour is shown with a large delay for small charges, which decreases for larger inputs. The trailing splits in three regions as expected from Figure 7. For small charges, the ToT is too short to allow the feedback to turn on properly so the pulse is incompletely compensated. For medium charge depositions (4-10) ke the trailing edge is compensated with a relative timewalk of less than 2 ns. The amplifier and with it the compensation start saturating around 10 ke causing the trailing edge to show a time-walk effect. It should be noted that the slope of the delay for both edges around the cross-over point, the point where the leading edge becomes a better estimate of ToA, is small. As consequence the cross-over point does not need to be known very precisely. Even in the region of incomplete compensation, the trailing edge is a better measure for the ToA. Since the ToT is the difference between the delay of the trailing edge to the leading edge, without offset corrections, it can be used as discriminant. Hence the ToA can be defined as Equation 2:

[0102] ToA = tTE- offsetTEToT < T oTcross-over

[0103] ToA = tTE- offsetLEToT > T oTcross-overwhere txare the time-stamps of the corresponding edge. For the simulation result in Figure 8 the maximum difference on the ToA according to this method would be around 4 ns. In Figure 9 the same simulation is performed for varying thresholds with At and the ToT plotted. For zlt both edges show increased time-walk at small charges for higher thresholds while the trailing edge remains a better estimator in this region in all cases. The range of full compensation and the cross-over point both shift to higher charges albeit with a weak dependence. The ToT also exhibits a weak dependence on the threshold for charges greater than 6 ke. In this range, the change of threshold is equivalent to an offset of the ToT. Comparing the cross-over point for the lowest threshold at around 10 ke to the largest threshold at around 12 ke the difference in ToT is less than 2 ns. As result variations of the effective threshold due do dispersions in the analogue performance of the comparator should have a small impact on the timing performance.

[0104] The optimised DAC settings used in the simulations and the nominal settings of the switched- reset pixel are listed in Table 1 . At nominal the DC operating point the switched-reset pixel has a power consumption of 25 pW

[0056] while the compensating feedback pixel requires only 20.3 pW at its operating point. The layout of the compensating feedback part of circuit with 66 pm2roughly 25% larger than the switched-reset with about 52.5 pm2.

[0105] Table 1 : DAC settings for the compensating feedback pixel used in simulation and nominal settings for the switched-feedback pixel. MEASUREMENTS

[0106] Measurements of one pixel fabricated in UKRI-MPWO were recorded to demonstrate the proof- of-principle and check the dependence on the main parameters of the circuit. For each configuration 100 measurements of the delay between the injection signal to leading edge and to the trailing edge were recorded on an oscilloscope. Occasionally, some triggers were written to file twice or the oscilloscope was triggered by noise on the injection line which both were removed for the analysis. The uncertainty on each point is the standard deviation of the remaining measurements.

[0107] Feedback Bias Dependence

[0108] Initial tests showed that higher DAC values for the compensated feedback (VNFB MOD) and the source follower (VNSF) with respect to the simulations were required to prevent the circuit from oscillating. The most likely cause being parasitic components being underestimated by the parasitic layout extraction used in the simulation. Higher thresholds were also necessary to operate without noise signals. The DAC settings used in simulation and in measurement are listed in Table 2.

[0109]

[0110] Table 2: DAC settings for the compensating feedback pixel used in simulation and settings used in the measurements.

[0111] The range of VNFB MOD is scanned in Figures 10a and 10b. Figure 10a plots At as a function of input charge and bias setting for the compensating feedback VNFB MOD. Figure 10b plots At as a function of input charge and effective threshold THeff = Threshold Baseline. The data for the higher DAC settings replicate the simulation in Figure 8 very well proving the circuit works as intended. The leading edge shows the expected time-walk behaviour, the trailing edge is compensated and varies less than 5 ns over the measurement range. Only the setting of 25 shows a At up to 10 ns indicating it an incomplete compensation. A significant difference in ToT between all DAC values besides the highest two demonstrates the influence of the bias setting. As no significant variance in performance of the compensation in At is observed, a large operating region is indicated. VNFB MOD = 40 is chosen for the following measurements.

[0112] Although UKRI-MPW0 has inherited an analogue multiplexer from RD50-MPW2

[0056] to measure the bias voltages generated in the bias block, an additional channel for VNFB MOD could not be implemented due to time constraints. As result the bias voltage generated on chip cannot be tested against simulation. The measured ToT is also significantly shorter than simulated likely due to the increased feedback and threshold but also due to the shaping of the signal drivers and parasitics of the measurement setup.

[0113] Threshold Dependence

[0114] The influence of the threshold is investigated in Figure 11. While the leading edge displays an increased time-walk for small input charges at higher thresholds, the compensation for the trailing edge shows no dependence on the threshold at all. This results in disagreement with Figure 9. It is likely that the higher DAC for VNFB MOD decreases the threshold dependence. The cross-over point appears constant with a negligible dependence on its ToT.

[0115] Should a higher THeff be required to operate the sensor at lower noise rate, i.e. due to the degradation from irradiation effects, the circuit would still be able to operate.

[0116] Pixel-to-Pixel Variations

[0117] The previously investigated pixel in row 0 is compared with a pixel in the same column in Figure 12 at the same settings. While the new pixel in row 18 shows the same behaviour for the rising edge, the trailing edge indicates that like in Figure 10 a higher VNFB MOD would be required for this pixel to reach full compensation.

[0118] DISCUSSION

[0119] A novel circuit to improve the time resolution of the analogue front-end of a silicon pixel sensor has been designed, simulated and measured. Proof-of-concept of its performance is demonstrated and in agreement with simulation. Using the presented method, the maximum time-walk of the pixel can be significantly reduced from more than 15 ns to about 4 ns while weakening the dependence on the input spectrum. This concept is most suited to collider experiments where the assignment of a hit to the correct collision is paramount. However, even in other experiments and applications outside of particle physics this method could be used to improve time resolution where amplifier and comparator are highly integrated.

[0120] SUGGESTIONS FOR CIRCUIT IMPROVEMENT

[0121] Even without detailed studies, some changes can already be suggested. A re-optimisation of the whole amplifier with the compensating feedback will most likely be able to yield better results. A different choice of input device than a PMOS could improve the performance

[0060] , Including the Source Follower (SF) in the feedback loop like in the MUPIX and ATLASPIX families

[0033] which are very similar in design might stabilise the whole circuit. A different choice of MOS-FET for the SF, as drawn in Figure 13 could also the performance. Since an SF is asymmetric - the NMOS SF can source current faster than it can sink it - a PMOS SF might be more suited to the optimisation around the trailing edge.

[0122] A toy simulation of the response of NMOS and PMOS SF is depicted in Figure 14. While the NMOS is faster than the PMOS on the rising edge, it is slower on the falling edge, hence a PMOS SF might be preferred. The compensating feedback circuit itself also leaves room for improvement. An improved schematic of a readout circuit according to an exemplary embodiment is shown in Figure 15. The readout circuit is generally as described with respect to Figure 5 mutatis mutandis, description of which is not repeated for brevity. The bias transistor for the feedback strength is split into one arm for the high-pass filter and one for the threshold to allow individual adjustment of both branches. The position of the gating logic is also improved in this version. In the first designs, the bias voltage for the feedback strength was gated which was considered disadvantageous. Gating the bias voltage puts a load on the bias line which it is not designed for and might create a feedback into other pixels. Moving the gating logic between the current mirror pair still puts a load on the branch controlled by the high-pass and necessitates a pull- up. Gating the output of the current mirror is most likely the better solution as it loads only the current mirror output transistor and removes the need for a pull-up or pull-down.

[0123] In general, a more detailed analysis with respect to oscillations on layout extraction level should be performed to reduce the observed ringing in the circuit.

[0124] Although a preferred embodiment has been shown and described, it will be appreciated by those skilled in the art that various changes and modifications might be made without departing from the scope of the invention, as defined in the appended claims and as described above.

[0125] ACRONYMS

[0126] ASIC Application-Specific Integrated Circuit

[0127] BLI+RTA Beam Line Implantation and Rapid Thermal Annealing

[0128] CR Clean-up Ring

[0129] CTR Current Terminating Ring

[0130] DAC Digital-to-Analog Converter

[0131] DNWELL Deep n-Well

[0132] DUT Device Under Test e-TCT edge TCT

[0133] HV High Voltage

[0134] HV-CMOS High-Voltage Complementary Metal-Oxide-Semiconductor

[0135] JSI Jozef Stefan Institute

[0136] LHC Large Hadron Collider

[0137] MIP Minimum Ionizing Particle

[0138] MOS-FET Metal-Oxide-Semiconductor Field-Effect T ransistor

[0139] MPW Multi-ProjectWafer PCB Printed Circuit Board

[0140] PIII+LA Plasma Ion Immersion Implantation and Laser Annealing

[0141] SMU Source Measure Unit

[0142] STI Shallow Trench Isolation

[0143] TCAD Technology Computer Aided Design

[0144] TCR Thermal Coefficient of Resistance

[0145] TCT Transient Current Technique

[0146] ToA Time of Arrival

[0147] ToT Time-over-Threshold

[0148] REFERENCES

[0149] [1] E. Vilella, “Time resolution and radiation tolerance of depleted CMOS sensors”, PoS (VERTEX018) 031.

[0150] [4] C. Zhang, G. Casse, N. Massari, E. Vilella and J. Vossebeld, “Development of RD50- MPW2: a high-speed monolithic HV-CMOS prototype chip within the CERN-RD50 collaboration”, PoS (TWEPP019) 045.

[0151]

[0040] A. Schbning et al. “MuPix and ATLASPix - Architectures and Results”. In: 2020. arXiv: 2002.07253 [physics. ins-det],

[0152]

[0048] Hartmut F. W. Sadrozinski, Abraham Seiden, and Nicolo Cartiglia. 4-Dimensional Tracking with Ultra-Fast Silicon Detectors. 2017. arXiv: 1704.08666 [physics. ins-det],

[0153]

[0049] N. Cartiglia, R. Arcidiacono, M. Costa, M. Ferrero, G. Gioachin, M. Mandurrino, L. Menzio, F. Siviero, V. Sola, and M. Tornago. “4D tracking: present status and perspectives”. In: Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 1040 (Oct. 2022), p. 167228. DOI: 10.1016 / j.nima.2022.167228. URL: http: / / dx.doi.Org / 10.1016 / j.nima.2022.167228.

[0154]

[0050] M. Milanesio et al. Time Resolution of a SiGe BiCMOS Monolithic Silicon Pixel Detector without Internal Gain Layer with a Femtosecond Laser. 2024. arXiv: 2401 . 01229 [physics. ins- det],

[0155]

[0051] M. Milanesio et al. “Gain measurements of the first proof-of-concept PicoAD prototype with a 55Fe X-ray radioactive source”. In: Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 1046 (2023), p. 167807. DOI: https / / doi.org / 10.1016 / j.nima.2022.167807. URL: https: / / www.sciencedirect.com / science / article / pii / S0168900222010993.

[0156]

[0052] R. Blanco et al. “HVCMOS Monolithic Sensors for the High Luminosity Upgrade of ATLAS Experiment”. In: Journal of Instrumentation 12.04 (2017), p. C04001. DOI: 10.1088 / 1748- 0221 / 12 / 04 / C04001 . URL: https: / / dx.doi.org / 10.1088 / 1748-0221 / 12 / 04 / C04001 .

[0053] Yavuz Degerli, Fabrice Guilloux, Tomasz Hemperek, Jean-Pierre Meyer, and Philippe Schwemling. MiniCACTUS: A 65 ps Time Resolution Depleted Monolithic CMOS Sensor. 2023. arXiv: 2309.08439 [physics. ins-det],

[0157]

[0054] Justus Braach, Eric Buschmann, Dominik Dannheim, Katharina Dort, Thanushan

[0158] Kugathasan, Magdalena Munker, Walter Snoeys, Peter Svihra, and Mateus Vicente. “Testbeam performance results of the FASTPIX sub-nanosecond CMOS pixel sensor demonstrator”. In: Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 1056 (2023), p. 168641. DOI: https: / / doi.Org / 10.1016 / j.nima.2023.168641. URL: https: / / www. sciencedirect.com / science / article / pii / S0168900223006319.

[0159]

[0055] Sandro Cadeddu, Gian Matteo Cossu, Luca Frontini, Adriano Lai, Valentino Liberali, Lorenzo Piccolo, and Alberto Stabile. “Recent developments in the IGNITE project on frontend design in CMOS 28-nm technology”. In: Journal of Instrumentation 19.01 (2024), p. C01040. DOI: 10.1088 / 1748- 0221 / 19 / 01 / C01040. URL: https: / / dx.doi.org / 10.1088 / 1748- 0221 / 19 / 01 / C01040.

[0160]

[0056] Chenfan Zhang. “Development of Depleted Monolithic Active Pixel Sensors for High

[0161] Energy Physics Experiments”. PhD thesis. Department of Physics, University of Liverpool, 2021. DOI: http: / / doi.org / 10.17638 / 03149533. URL: https: / / livrepository.liverpool.ac.uk / 3149533 / .

[0162]

[0057] I. Mandi'c et al. “Study of neutron irradiation effects in Depleted CMOS detector structures”. In: Journal of Instrumentation 17.03 (Mar. 2022), P03030. DOI: 10.1088 / 1748- 0221 / 17 / 03 / p03030. URL: http: / / dx.doi.Org / 10.1088 / 1748-0221 / 17 / 03 / P03030.

[0163]

[0058] B. Wade, M. Franks, J. Hammerich, N. Karim, S. Powell, E. Vilella, and C. Zhang. “Edge- TCT evaluation of high voltage CMOS test structures with unprecedented breakdown voltage for high radiation tolerance”. In: Journal of Instrumentation17.12 (2022), p. C12017. DOI: 10.1088 / 1748-0221 / 17 / 12 / C12017. URL: https: / / dx.doi.Org / 10.1088 / 1748-0221 / 17 / 12 / C12017.

[0164]

[0059] Ruben Kolb. “Disentangling the Diffusive Part of the Drift Dominated Signal Generation in a High-Ohmic Run2021v2 HV-MAPS Prototype”. MA thesis. University of Heidelberg, 2023.

[0165]

[0060] Heiko Augustin et al. “TelePix - A fast region of interest trigger and timing layer for the EUDET Telescopes”. In: Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 1048 (2023), p. 167947. DOI: 10.1016 / j.nima.2022.167947. URL: https: / / doi.org / 10.1016%2Fj.nima.2022.167947.

[0166] NOTES

[0167] At least some of the example embodiments described herein may be constructed, partially or wholly, using dedicated special-purpose hardware. Terms such as ‘component’, ‘module’ or ‘unit’ used herein may include, but are not limited to, a hardware device, such as circuitry in the form of discrete or integrated components, a Field Programmable Gate Array (FPGA) or Application Specific Integrated Circuit (ASIC), which performs certain tasks or provides the associated functionality. In some embodiments, the described elements may be configured to reside on a tangible, persistent, addressable storage medium and may be configured to execute on one or more processors. These functional elements may in some embodiments include, by way of example, components, such as software components, object-oriented software components, class components and task components, processes, functions, attributes, procedures, subroutines, segments of program code, drivers, firmware, microcode, circuitry, data, databases, data structures, tables, arrays, and variables. Although the example embodiments have been described with reference to the components, modules and units discussed herein, such functional elements may be combined into fewer elements or separated into additional elements. Various combinations of optional features have been described herein, and it will be appreciated that described features may be combined in any suitable combination. In particular, the features of any one example embodiment may be combined with features of any other embodiment, as appropriate, except where such combinations are mutually exclusive. Throughout this specification, the term “comprising” or “comprises” means including the components) specified but not to the exclusion of the presence of others.

[0168] Attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.

[0169] All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and / or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and / or steps are mutually exclusive.

[0170] Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.

[0171] The invention is not restricted to the details of the foregoing embodiment(s). The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.

Claims

CLAIMS1 . A readout circuit comprising: an amplifier, configured to output an analogue voltage pulse, having a leading edge and a trailing edge, in response to receiving an input signal from a sensor; and a feedback circuit, configured to provide a feedback signal to the amplifier, wherein the feedback signal is a function of the analogue voltage pulse output from the amplifier, whereby the feedback signal is configured to compensate for the trailing edge of the analogue voltage pulse.

2. The readout circuit according to claim 1 , wherein the feedback signal is proportional to an amplitude of the analogue voltage pulse.

3. The readout circuit according to any previous claim, wherein the feedback signal is configured to compensate for the trailing edge of the analogue voltage pulse by time walk compensating the trailing edge of the analogue voltage pulse.

4. The readout circuit according to any previous claim, wherein the feedback signal is configured to not compensate for the leading edge of the analogue voltage pulse.

5. The readout circuit according to any previous claim, comprising: a comparator, configured to output a digital voltage pulse dependent on the analogue voltage pulse output from the amplifier; and wherein the feedback circuit is configured to provide the feedback signal to the amplifier, according to the digital voltage pulse output from the comparator.

6. The readout circuit according to claim 5, wherein the comparator is configured to selectively output the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier.

7. The readout circuit according to claim 6, wherein the comparator is configured to selectively output the digital voltage pulse dependent on a pre-set threshold of the analogue voltage pulse output from the amplifier.

8. The readout circuit according to any previous claim, comprising: a high-pass filter, configured to attenuate a frequency of the analogue voltage pulse.

9. The readout circuit according to any previous claim, wherein the feedback signal comprises and / or is a feedback current.

10. The readout circuit according to any previous claim, comprising the sensor, for example a sensor diode.11 . A HV-CMOS pixel sensor comprising the readout circuit according to any previous claim.

12. A method of correcting a Time-of-Arrival of an event, for example detection of a particle or a photon, the method comprising: outputting, by an amplifier, an analogue voltage pulse, having a leading edge and a trailing edge, in response to receiving an input signal, from a sensor, caused by the event; and correcting the Time-of-Arrival of the event by providing, to the amplifier, a feedback signal which is a function of the analogue voltage pulse output from the amplifier, thereby compensating for the trailing edge of the analogue voltage pulse using the feedback signal.

13. The method according to claim 12, wherein the feedback signal is proportional to an amplitude of the analogue voltage pulse.

14. The method according to any of claims 12 to 13, wherein compensating for the trailing edge of the analogue voltage pulse using the feedback signal comprises time walk compensating for the trailing edge of the analogue voltage pulse using the feedback signal.

15. The method according to any of claims 12 to 14, wherein correcting the Time-of-Arrival of the event by providing, to the amplifier, the feedback signal based on the analogue voltage pulse output from the amplifier, does not comprise compensating for the leading edge of the analogue voltage pulse, for example using the feedback signal.

16. The method according to any of claims 12 to 15, comprising: outputting, by a comparator, a digital voltage pulse dependent on the analogue voltage pulse output from the amplifier; and wherein correcting the Time-of-Arrival of the event by providing, to the amplifier, the feedback signal based on the analogue voltage pulse output from the amplifier comprises correcting the Time-of-Arrival of the event by providing, to the amplifier, the feedback signal according to the digital voltage pulse output from the comparator.

17. The method according to claim 16, wherein outputting, by a comparator, the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier comprises selectively outputting, by the comparator, the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier.

18. The method according to claim 17, wherein selectively outputting, by the comparator, the digital voltage pulse dependent on the analogue voltage pulse output from the amplifier comprises selectively outputting, by the comparator, the digital voltage pulse dependent on a pre-set threshold of the analogue voltage pulse output from the amplifier.

19. The method according to any of claims 12 to 18, comprising: attenuating, by a high pass filter, a frequency of the analogue voltage pulse.

20. The method according to any of claims 12 to 19, wherein the feedback signal comprises and / or is a feedback current.

21. The method according to any of claims 12 to 20, wherein the sensor comprises and / or is sensor diode.

22. A method of estimating and / or calculating a Time-of-Arrival of an event, for example detection of a particle or a photon, the method comprising correcting the Time-of-Arrival of the event according to any of claims 12 to 21 .

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