Wiring board, package, and optical module
The wiring board design with recesses and spaced conductors addresses miniaturization challenges by reducing contact with wall surfaces, enhancing strength and preventing short circuits, thus ensuring effective miniaturization and airtightness.
Patent Information
- Application Number
- PCT/JP2025/012218
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-03-28
- Filing Date
- 2025-03-26
- Publication Date
- 2025-10-02
AI Technical Summary
Wiring boards face challenges in miniaturization while maintaining strength and preventing short circuits due to contact with wall surfaces and debris accumulation, which affects airtightness and electrical connectivity.
The wiring board design incorporates recesses and spacing in conductor portions to minimize contact with wall surfaces, reducing the risk of short circuits and debris accumulation, while allowing for miniaturization without compromising structural integrity.
The design enables miniaturization of wiring boards with enhanced strength and reduced short circuit risks, maintaining airtightness and improving electrical connectivity.
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Figure JP2025012218_02102025_PF_FP_ABST
Abstract
Description
Wiring board, package and optical module
[0001] The present disclosure relates to a wiring board, a package, and an optical module.
[0002] 2. Description of the Related Art A wiring board is known in which a step is formed on the inner side of a wall portion, and a conductor is positioned on this step (see, for example, Patent Document 1).
[0003] Patent No. 5981660
[0004] The wiring board of the present disclosure includes an insulator having a first wall surface, a first top surface connected to the first wall surface, and a second wall surface connected to the first top surface and located below the first wall surface, a first conductor, a second conductor located alongside the first conductor, and a first conductor portion located on the first top surface. The first wall surface has a first recess connected to the first top surface, and the first conductor portion extends from the first recess toward the second wall surface and has a first portion where the distance between the first conductor and the second conductor increases as the distance approaches a first inner wall surface of the first recess.
[0005] The package of the present disclosure includes a wiring substrate and a wall body that connects and / or joins with the wiring substrate.
[0006] The optical module of the present disclosure includes a package, an optical element mounted in the package, and a lid joined to the package.
[0007] 1 is a perspective view of a wiring board according to an embodiment of the present disclosure; FIG. 2 is an enlarged perspective view of a main part A shown in FIG. 1; FIG. 3 is an enlarged perspective view of the main part A with the first conductor part, the second conductor part, the third conductor part, and the metal layer omitted; FIG. 4 is an enlarged perspective view of the main part A with the first insulating layer and the frame omitted; FIG. 5 is an enlarged plan view of the vicinity of the main part A with the first insulating layer and the frame omitted; FIG. 6 is a rear perspective view of a wiring board according to an embodiment of the present disclosure; FIG. 7 is an enlarged perspective view of the main part B shown in FIG. 1; FIG. 8 is an enlarged plan view of the vicinity of the main part B; and FIG. 9 is a perspective view of a package and an optical module according to an embodiment of the present disclosure.
[0008] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. However, for the sake of convenience, the figures referred to below are simplified views of the main components necessary for explaining the embodiments. Therefore, embodiments of the present disclosure may include optional components not shown in the figures referred to. Furthermore, the dimensions of the components in the figures do not faithfully represent the actual dimensions, dimensional ratios, etc. of the components. For convenience, directions are defined using the Cartesian coordinate system XYZ. The positive side of the X direction is the right side, the positive side of the Y direction is the front side, and the positive side of the Z direction is the top side. In this disclosure, "planar view" refers to a view from the top side of the first upper surface 120 (the positive side of the Z direction) and includes planar perspective view.
[0009] In the following description, expressions such as "constant," "orthogonal," "vertical," or "parallel" may be used. These expressions do not necessarily mean "constant," "orthogonal," "vertical," or "parallel" in their strict sense. In other words, these expressions allow for deviations due to, for example, manufacturing precision, installation precision, etc. Numerical ranges expressed using "to" include the numerical values before and after the range as the lower and upper limits, respectively.
[0010] While the devices mounted on wiring boards are becoming larger and the number of components is increasing, there is also a demand for miniaturization of the wiring boards themselves. Furthermore, since wiring boards, and in particular the walls of the wiring boards, are also required to protect the devices mounted thereon, it is also required that the strength does not decrease significantly when miniaturized.
[0011] The wiring board, package, and optical module of the present disclosure have a configuration that allows miniaturization while maintaining strength. The wiring board, package, and optical module of the present disclosure will be described in detail below.
[0012] [Wiring Board] As shown in Figure 1 and other figures, the wiring board 100 of the present disclosure includes an insulator 1 and a first conductor portion 21. The insulator 1 has a first wall surface 111, a first upper surface 120, and a second wall surface 121. The first upper surface 120 is connected to the first wall surface 111. The second wall surface 121 is connected to the first upper surface 120 and is located below the first wall surface 111. The first wall surface 111 has a first recess 112 that is connected to the first upper surface 120. The first conductor portion 21 is located on the first upper surface 120 and extends from the first recess 112 toward the second wall surface 121.
[0013] In the wiring board 100 of the present disclosure, the first wall surface 111 has a first recess 112 connecting to the first top surface 120, and the first conductor 21 extends from the first recess 112 toward the second wall surface 121. This structure enables the wiring board 100 of the present disclosure to be miniaturized while maintaining its strength. Specifically, the presence of the first recess 112 makes it difficult for a contact probe for checking the electrical connection of the first conductor 21, an arm for mounting an electronic component on the first conductor 21, and the like to come into contact with the first wall surface 111. This reduces the possibility that the contact probe, arm, or the like will come into contact with the first wall surface 111, causing distortion of the first wall surface 111, or chipping of the first wall surface 111 and generating debris, compared to a case where the first recess 112 is not present. This reduces the possibility that debris will adhere to the first conductor 21 and cause a short circuit in the first conductor 21. Furthermore, by reducing the possibility of first wall surface 111 being distorted or chipped, it becomes easier to maintain airtightness within a module that includes wiring substrate 100 as a component. Also, the presence of first recess 112 allows first upper surface 120 to be partially narrowed without impairing practicality, thereby enabling the miniaturization of wiring substrate 100. Furthermore, in wiring substrate 100 of the present disclosure, the portion of the wall portion having first wall surface 111 other than first recess 112 does not need to be thin, and therefore strength does not decrease significantly compared to when the wall portion having first wall surface 111 is uniformly thin.
[0014] In the wiring board 100 shown in Figure 1, etc., the first conductor portion 21 is in contact with the first inner wall surface 113, but this is not necessarily required, and the first conductor portion 21 may be spaced from the first inner wall surface 113.
[0015] The insulator 1 may have a second upper surface 130 that is connected to the second wall surface 121 and is located below the first upper surface 120. With this configuration, a second conductor 22, electronic components, etc. can be mounted on the second upper surface 130, as described below.
[0016] The insulator 1 may have a third wall surface 131 that is connected to the second upper surface 130 and is located below the second wall surface 121 .
[0017] The insulator 1 may have a bottom surface 140 that is connected to the third wall surface 131 and is located below the second top surface 130 .
[0018] The insulator 1 may have a top surface 110 that is connected to the first wall surface 111 and is located above the first top surface 120 .
[0019] The first recess 112 may be connected to the top surface 110 or may not be connected to the top surface 110. The phrase "the first recess 112 is not connected to the top surface 110" can be rephrased as "the first recess 112 is spaced from the top surface 110." More specifically, in plan view, part or all of the first recess 112 may be covered by a part of the insulator 1 or by an insulating material different from the insulator 1. In this case, the possibility of a decrease in the strength of the wiring substrate 100 and the possibility of dust entering the first recess 112 and adhering to the first conductor 21, causing a short circuit, can be reduced. On the other hand, if the first recess 112 is connected to the top surface 110, contact probes, arms, etc. are less likely to come into contact with the first wall surface 111. Here, the phrase "the first recess 112 is connected to the top surface 110" can be rephrased as "the insulator 1 is cut from the top surface 110 to the first wall surface 111."
[0020] The height h111 of the first wall surface 111 may be greater than the height h121 of the second wall surface 121. With this configuration, even if the bonding material for bonding the seal ring or the lid body 62 flows from the surface connected to the upper side of the first wall surface 111 onto the first wall surface 111, the possibility of the bonding material coming into contact with the first conductor 21 and causing a short circuit can be reduced. Note that the height h111 of the first wall surface 111 is the dimension of the first wall surface 111 in the Z direction. The height h121 of the second wall surface 121 is the dimension of the second wall surface 121 in the Z direction.
[0021] 1 , the insulator 1 may have a first insulating layer 11 having a first wall surface 111. The first insulating layer 11 may have a top surface 110. The insulator 1 may have a second insulating layer 12 having a first top surface 120 and a second wall surface 121. The insulator 1 may have a third insulating layer 13 having a second top surface 130 and a third wall surface 131. The insulator 1 may have a fourth insulating layer 14 having a bottom surface 140.
[0022] The material of the insulator 1 may be, for example, ceramic. The insulator 1 may be mainly composed of ceramic. The term "main component" refers to a component that accounts for 60% by mass or more. Examples of ceramic include aluminum oxide sintered body (alumina ceramic), aluminum nitride sintered body, silicon carbide sintered body, mullite sintered body, and glass ceramic. When the insulator 1 is mainly composed of ceramic, the heat dissipation and rigidity of the wiring board 100 are improved. The insulator 1 may also contain a resin. Examples of resins include epoxy resin, polyimide, and liquid crystal polymer. The insulator 1 may contain multiple types of resin materials, and may also contain components other than resin, such as inorganic materials such as silica or rubber materials.
[0023] 5 and other drawings, the first conductor portion 21 may have a first conductor 211 and a second conductor 212 positioned alongside the first conductor 211. The second conductor 212 may or may not be aligned parallel to the first conductor 211.
[0024] 5 , the first conductor portion 21 may have a first portion 21a in which the distance between the first conductor 211 and the second conductor 212 increases as the distance approaches the first inner wall surface 113 of the first recess 112. With this configuration, even if the distance between the first conductor 211 and the second conductor 212 is narrowed to reduce the size of the wiring board 100, the possibility of a short circuit between the first conductor 211 and the second conductor 212 is reduced. Specifically, since the first conductor portion 21 has the first portion 21a, the possibility of the plating on the first conductor portion 21 extending along the first inner wall surface 113 and causing a short circuit between the first conductor 211 and the second conductor 212 is reduced. Furthermore, since the first conductor portion 21 has the first portion 21a, the possibility of processing waste, dirt, etc. generated from the first inner wall surface 113, etc., and bonding material, solder, etc. flowing down from the top surface 110 causing a short circuit between the first conductor 211 and the second conductor 212 can be reduced.
[0025] 5, the first conductor 21 may be spaced apart from the second wall surface 121. This configuration can reduce the possibility that plating on the first conductor 21 or conductive bonding material between the first conductor 21 and an electronic component or bonding wire extends along the edge between the first upper surface 120 and the second wall surface 121, causing a short circuit between the first conductor 211, the second conductor 212, and other conductors, as compared to when the first conductor 21 is in contact with the second wall surface 121. The gap between the first conductor 21 and the second wall surface 121 is, for example, 10 to 100 μm.
[0026] 5 , the first conductor portion 21 may have a second portion 21b, in which the spacing between the first conductor 211 and the second conductor 212 is constant, closer to the second wall surface 121 than the first portion 21a. Since the spacing between the first conductor 211 and the second conductor 212 is relatively narrow on the second wall surface 121 side of the first portion 21a, the spacing between the first conductor 211 and the second conductor 212 is constant on the second wall surface 121 side than the first portion 21a. This reduces the area required for arranging the first conductor portion 21, making it easier to miniaturize the wiring board 100. Furthermore, electronic components and bonding wires can be more stably bonded to the first conductor portion 21 than when the second portion 21b is not provided.
[0027] 5, the first insulating layer 11 is omitted, but a first wall surface 111 of the first insulating layer 11 and a first inner wall surface 113 constituting a part of the first wall surface 111 are indicated by a two-dot chain line. As shown in Fig. 5, the first conductor portion 21 may have a third portion 21c at a position overlapping with the first insulating layer 11 in a plan view, in which the distance between the first conductor 211 and the second conductor 212 increases with increasing distance from the first inner wall surface 113.
[0028] The wiring board 100 may include a first via conductor 71 connected to the first conductor 211 and a second via conductor 72 connected to the second conductor 212, at a position overlapping the first insulating layer 11 in a plan view. This configuration allows for a multilayer wiring structure, improving the degree of freedom in wiring design and enabling the wiring board 100 to be made smaller.
[0029] The first via conductor 71 may be connected to an end of the first conductor 211 that is farther from the first inner wall surface 113, and the second via conductor 72 may be connected to an end of the second conductor 212 that is farther from the first inner wall surface 113. With this configuration, when the first conductor portion 21 has the third portion 21c, the first via conductor 71 and the second via conductor 72 can be spaced apart. Therefore, even if the first via conductor 71 and the second via conductor 72 are signal conductors, the possibility of crosstalk between the signals transmitted between them and causing noise can be reduced. With the above configuration, the first via conductor 71 and the second via conductor 72 can be spaced apart, which makes it easier to form the first via conductor 71 and the second via conductor 72 during the manufacturing of the wiring substrate 100 and reduces the possibility of damage to the green sheet.
[0030] The first via conductor 71 and the second via conductor 72 may face downward (toward the negative side in the Z direction). With this configuration, the first conductor 211 and the second conductor 212 can be electrically connected to conductors such as lead terminals 42 and lead pins located on the rear surface 15 of the wiring substrate 100 via the first via conductor 71 and the second via conductor 72, respectively.
[0031] The first conductor 211 and the second conductor 212 may be signal conductors. In this case, the first conductor 211 and the second conductor 212 may be differential signal lines that transmit signals of opposite phases, or may be signal lines that transmit different signals. Note that the first conductor 211 and the second conductor 212 may be ground conductors, power supply conductors, or conductors for different purposes.
[0032] 5 , the first conductor portion 21 may have a third conductor 213 and a fourth conductor 214. The third conductor 213 and the fourth conductor 214 may overlap with the first recess 112 in a side view facing the first inner wall surface 113.
[0033] The third conductor 213 and the fourth conductor 214 may be ground conductors. In this case, the first conductor 211 and the second conductor 212 may be signal conductors, and the fourth conductor 214, the first conductor 211, the second conductor 212, and the third conductor 213 may be arranged in this order, thereby forming the first conductor portion 21 into a differential line structure (GSSG structure). The GSSG structure is a wiring structure composed of multiple conductors arranged in the following order: ground conductor-signal conductor-signal conductor-ground conductor. The first conductor portion 21 may also have another ground conductor between the first conductor 211 and the second conductor 212, forming a GSGSG structure. The GSGSG structure is a wiring structure composed of multiple conductors arranged in the following order: ground conductor-signal conductor-ground conductor-signal conductor-ground conductor. The third conductor 213 and the fourth conductor 214 may be signal conductors, power conductors, or conductors for different purposes.
[0034] 5 , the first conductor 211 may have a first end 211a located on the opposite side from the second wall surface 121. The fourth conductor 214 may surround at least a portion of the periphery of the first end 211a with a gap in a plan view. In this case, the fourth conductor 214 and the first end 211a may have a partially coaxial structure in a plan view. The fourth conductor 214 has an arc portion that surrounds at least a portion of the periphery of the first end 211a with a gap in a plan view and a straight portion that connects to the arc portion, and a first connecting portion 214a that connects these may have a narrower width.
[0035] The second conductor 212 may have a second end 212a located on the opposite side from the second wall surface 121. The third conductor 213 may surround at least a portion of the periphery of the second end 212a with a gap in a plan view. In this case, the third conductor 213 and the second end 212a may have a partially coaxial structure in a plan view. The third conductor 213 has an arc portion that surrounds at least a portion of the periphery of the second end 212a with a gap in a plan view and a straight portion that connects to the arc portion, and a second connecting portion 213a that connects these may have a narrower width.
[0036] The fourth conductor 214 and the third conductor 213 may be connected to each other and surround the first end 211 a and the second end 212 a with a gap therebetween in plan view. The coaxial structure formed by the fourth conductor 214 and the first end 211 a and the coaxial structure formed by the third conductor 213 and the second end 212 a may overlap with the first insulating layer 11 in plan view.
[0037] The third conductor 213 and the fourth conductor 214 may each have a via conductor. With this configuration, if the third conductor 213 and the fourth conductor 214 are ground conductors, the ground potential is strengthened.
[0038] As shown in FIGS. 1 to 4 , the insulator 1 may have a first coating portion 31 located on the first upper surface 120 and in contact with the first inner wall surface 113 of the first recess 112. A portion of the first coating portion 31 may be located on a portion of the first conductor portion 21. Specifically, a portion of the first coating portion 31 may be located on a portion of the first conductor 211 and a portion of the second conductor 212. This configuration reduces the possibility that plating on the first conductor portion 21 will extend along the first inner wall surface 113 and cause a short circuit between adjacent conductors. Furthermore, since a portion of the first coating portion 31 is located on a portion of the first conductor portion 21, the possibility of the first conductor portion 21 peeling off from the insulator 1 is reduced.
[0039] A portion of the first coating portion 31 that contacts the first inner wall surface 113 may be located between the first insulating layer 11 and the second insulating layer 12. In other words, the first coating portion 31 may overlap the first inner wall surface 113 in a plan view. This configuration further reduces the possibility that the plating on the first conductor portion 21 will extend along the first inner wall surface 113 and cause a short circuit between adjacent conductors.
[0040] As shown in FIG. 2 and other figures, the second wall surface 121 may have a second recess 122 connecting to the second top surface 130. With this configuration, even when the wiring substrate 100 is miniaturized, a decrease in strength of the wiring substrate 100 is reduced, and the second conductor 22 can be formed near the second recess 122 on the second top surface 130, or an electronic component can be mounted thereon. The electronic component that can be mounted is not particularly limited, and may be, for example, a driving IC, a capacitor, or the like. The first conductor 21 may extend from the first recess 112 toward the second recess 122.
[0041] 3, the width w122 of the second recess 122 may be smaller than the width w112 of the first recess 112. With this configuration, even if the second recess 122 is connected to the first upper surface 120, the area of the first upper surface 120 does not become too small, and it is possible to form a conductor on the first upper surface 120 and increase the number of electrodes. Note that the width w122 of the second recess 122 is the dimension of the second recess 122 in the Y direction. The width w112 of the first recess 112 is the dimension of the first recess 112 in the Y direction.
[0042] The first recess 112 may be positioned opposite the second wall surface 121 in a plan view. Furthermore, at least a portion of the second recess 122 may be opposite at least a portion of the first recess 112. With this configuration, when an electronic component located near the second recess 122 is electrically connected to the first conductor 21 located near the first recess 112, the electrical connection distance can be shortened. This reduces signal and / or voltage loss.
[0043] The entire second recess 122 may face the first recess 112. In other words, both ends of the second recess 122 may be located inside both ends of the first recess 112 in the width direction (Y direction) of the first recess 112 and the second recess 122. With this configuration, when electrically connecting an electronic component located near the second recess 122 and the first conductor 21 located near the first recess 112, the connection distance can be made shorter. This can further reduce signal and / or voltage loss.
[0044] The wiring board 100 may include a second conductor 22 and / or an electronic component located on the second upper surface 130. When the wiring board 100 includes the second conductor 22 and an electronic component, the second conductor 22 and the electronic component may be electrically connected to each other. By locating the second conductor 22 and / or the electronic component on the second upper surface 130, the possibility of deterioration due to the heat generated by an element that is prone to heat generation is reduced even when the element is mounted on the bottom surface 140. Examples of elements that are prone to heat generation include a laser element, an LED element, a driving IC, etc.
[0045] The second conductor portion 22 may be a signal conductor. This configuration allows signals to be transmitted to electronic components electrically connected to the second conductor portion 22. The second conductor portion 22 may be a ground conductor. This configuration increases the ground area, thereby strengthening the ground potential.
[0046] At least a part of the second conductor 22 and / or at least a part of the electronic component may be located in the second recess 122 in a plan view. This configuration can reduce the possibility that a contact probe for checking the electrical connection of the second conductor 22 and / or the electronic component, an arm for mounting the electronic component on the second conductor 22, or the like, will come into contact with the second wall surface 121.
[0047] The second recess 122 may be connected to the first upper surface 120. This configuration can further reduce the possibility that the contact probe, arm, etc. mentioned above will come into contact with the second wall surface 121. Note that the second recess 122 does not have to be connected to the first upper surface 120.
[0048] The second conductor portion 22 may extend from the second recess 122 toward the third wall surface 131. The second conductor portion 22 may have a plurality of conductors. In this case, the spacing between the plurality of conductors in the second conductor portion 22 may increase as the spacing approaches the second inner wall surface 123 of the second recess 122. With this configuration, even if the spacing between the plurality of conductors in the second conductor portion 22 is narrowed to reduce the size of the wiring board 100, the possibility of adjacent conductors shorting out is reduced.
[0049] 5, the second conductor 22 may be spaced apart from the third wall surface 131. This configuration can reduce the possibility that plating on the second conductor 22 or the conductive bonding material between the second conductor 22 and an electronic component or bonding wire extends along the edge between the second upper surface 130 and the third wall surface 131, causing a short circuit between adjacent conductors in the second conductor 22, compared to when the second conductor 22 is in contact with the third wall surface 131. The distance between the second conductor 22 and the third wall surface 131 is, for example, 10 to 100 μm.
[0050] 1 to 4 , the insulator 1 may have a second coating portion 32 that is located on the second upper surface 130 and in contact with the second inner wall surface 123 of the second recess 122. A portion of the second coating portion 32 may be located on a portion of the second conductor portion 22. This configuration reduces the possibility that the plating on the second conductor portion 22 will extend along the second inner wall surface 123, causing a short circuit between adjacent conductors. Furthermore, by having a portion of the second coating portion 32 located on a portion of the second conductor portion 22, the possibility that the second conductor portion 22 will peel off from the insulator 1 is reduced.
[0051] A portion of the second coating portion 32 that contacts the second inner wall surface 123 may be located between the second insulating layer 12 and the third insulating layer 13. In other words, the second coating portion 32 may overlap the second inner wall surface 123 in a plan view. This configuration further reduces the possibility that the plating on the second conductor portion 22 will extend along the second inner wall surface 123 and cause a short circuit between adjacent conductors. When the material of the insulator 1 is ceramic and the insulator 1 is formed by laminating green sheets, it is possible to reduce fading of the conductive ink that forms the second conductor portion 22, which may occur during the lamination of the green sheets.
[0052] As shown in FIG. 1 and other figures, the wiring substrate 100 may include a third conductor portion 23 that is a conductor portion other than the first conductor portion 21 and the second conductor portion 22 .
[0053] 1 and other figures, the wiring substrate 100 may include a metal layer 24 located on the bottom surface 140. The metal layer 24 may be a metal foil or a metallized layer formed by plating.
[0054] As shown in Fig. 6 and other figures, the wiring board 100 may have lead terminals 42 on the rear surface 15. The wiring board 100 may have a PGA (pin grid allay) formed of a plurality of lead pins on the rear surface 15. An external board such as a PCB (printed circuit board) may be connected to the rear surface 15 of the wiring board 100. The PCB may be an FPC (flexible printed circuit board).
[0055] The materials of the first conductor portion 21, the second conductor portion 22, the third conductor portion 23, the first via conductor 71, the second via conductor 72, the metal layer 24, the lead pin, the lead terminal 42, and other conductors are, for example, metals. Examples of metals include tungsten, molybdenum, manganese, copper, silver, palladium, gold, platinum, nickel, cobalt, and alloys thereof. The metals contained in each member may be the same or different from each other.
[0056] As shown in FIG. 1 and other figures, the wiring substrate 100 may include a frame 41 on the top surface 110. The frame 41 may be spaced apart from the first wall surface 111 in a plan view. When the first recess 112 is connected to the top surface 110, the frame 41 may be spaced apart from the first recess 112 in a plan view. This configuration reduces the possibility of cracks occurring in the first recess 112 when the lid 62 is welded or crimped to the frame 41. This configuration also reduces the possibility of the bonding material flowing into the first recess 112 and the first conductor 21 when the frame 41 is bonded to the top surface 110 with a bonding material or the like.
[0057] The frame 41 may be, for example, a seal ring. The frame 41 may be, for example, a member in which a frame-shaped metal plate containing an Fe—Ni alloy, an Fe—Ni—Co alloy, or the like is joined to a frame formed of a conductive paste containing a high-melting point metal such as tungsten or molybdenum with a brazing material or the like.
[0058] As shown in Fig. 8 and other figures, the second wall surface 121 may have a first notch 124 at an end of the second wall surface 121 in the width direction (Y direction). The first notch 124 may have an arc shape of ¼ or less in plan view. In other words, the end of the second wall surface 121 may have an arc shape with a central angle of 90° or less in plan view. This configuration reduces the possibility of stress concentration at the end of the second wall surface 121 and reduces the possibility of damage to the insulator 1.
[0059] As shown in FIG. 8 and other figures, the third wall surface 131 may have a second notch 134 at an end of the third wall surface 131 in the width direction (Y direction). This configuration makes it easier for an electronic component such as an optical element 61 to abut against the third wall surface 131 that connects to the second notch 134 or a surface connected to the side of the third wall surface 131. This reduces misalignment of the electronic component when mounted. Furthermore, since unnecessary gaps between the electronic component and the third wall surface 131 or a surface connected to the side of the third wall surface 131 can be reduced, more electronic components can be mounted in a limited space on the wiring substrate 100. The second notch 134 may be semicircular or rectangular in plan view.
[0060] When the inner wall surfaces of the first notch 124 and the second notch 134 are both curved surfaces, the curvature of the inner wall surface of the first notch 124 may be smaller than the curvature of the inner wall surface of the second notch 134 .
[0061] The metal layer 24 may be located on at least a portion of the bottom of the second notch 134. In the embodiment shown in FIG. 8 and other figures, the bottom of the second notch 134 is the bottom surface 140 of the insulator 1. The insulator 1 may be exposed at the bottom of the second notch 134. In other words, the entire bottom of the second notch 134 does not have to be covered with the metal layer 24. The area of the insulator 1 exposed at the bottom of the second notch 134 may be larger than the area of the metal layer 24 covering the bottom of the second notch 134. The second notch 134 can collect the adhesive material that flows out when an electronic component such as an optical element 61 is mounted on the metal layer 24 via the adhesive material. Furthermore, the exposed area of the insulator 1 at the bottom of the second notch 134 makes it less likely that the adhesive material will flow out to that area. This reduces the possibility that excess bonding material will creep up along the inner wall surface of the second notch 134 onto the second upper surface 130.
[0062] 1 and other figures, the wiring substrate 100 may have a through hole 16 on either side surface connected to the bottom surface 140. The through hole 16 can be used, for example, to exchange light between an electronic component such as an optical element 61 housed in the package 50 (described later) and the outside of the package 50.
[0063] [Package] As shown in FIG. 9 , a package 50 according to the present disclosure includes a wiring substrate 100 and a wall body 51 .
[0064] The wall 51 is connected and / or bonded to the wiring substrate 100. The wall 51 may be made of the same material as the insulator 1, or may be made of a different material. The material of the wall 51 is, for example, ceramic, metal, resin, etc. If the material of the wall 51 is the same as the material of the insulator 1, the wall 51 and the insulator 1 may be integrated. The aforementioned through hole 6 may be located in the wall 51, not in the wiring substrate 100.
[0065] [Optical Module] As shown in FIG. 9 , an optical module 60 according to the present disclosure includes a package 50 , an optical element 61 mounted in the package 50 , and a lid 62 joined to the package 50 .
[0066] The optical element 61 is, for example, a light-receiving element that can convert light into an electrical signal, or a light-emitting element that can convert an electrical signal into light. The optical element 61 is, for example, an optical semiconductor element. The light-receiving element can also be referred to as an optical sensor, a photodetector, or the like. Examples of the light-receiving element include a photodiode (PD) and a complementary metal-oxide-semiconductor (CMOS). Examples of the light-emitting element include a light-emitting diode (LED), a laser diode (LD), and a surface-emitting element. The optical module 60 may have multiple optical elements 61, or may have different types of optical elements 61, such as a light-emitting element and a light-receiving element. The optical element 61 may be electrically connected to the first conductor 21, the second conductor 22, and the like provided on the wiring board 100 via wires.
[0067] The cover 62 may be a metal plate or a wiring board that requires electrical connection, such as a PCB (printed circuit board).
[0068] The optical module 60 may be used for optical communication or LiDAR (light detection and ranging). Specifically, the optical module 60 may be used for LiDAR for in-vehicle components.
[0069]
[0013] The following further exemplifies embodiments of the wiring board, package, and optical module according to the present disclosure. (1) One embodiment of the wiring board according to the present disclosure includes: an insulator having a first wall surface, a first top surface connected to the first wall surface, and a second wall surface connected to the first top surface and located below the first wall surface; a first conductor having a first conductor and a second conductor located alongside the first conductor and located above the first top surface, wherein the first wall surface has a first recess connected to the first top surface, and the first conductor portion extends from the first recess toward the second wall surface and has a first portion where the distance between the first conductor and the second conductor increases as the distance approaches a first inner wall surface of the first recess.
[0070] (2) One embodiment of the wiring board according to the present disclosure is the wiring board of (1) above, wherein the insulator further has a second upper surface connected to the second wall surface and located below the first upper surface, and the second wall surface has a second recess connected to the second upper surface.
[0071] (3) One embodiment of a wiring board according to the present disclosure comprises: an insulator having a first wall surface, a first top surface connected to the first wall surface, a second wall surface connected to the first top surface and located below the first wall surface, and a second top surface connected to the second wall surface and located below the first top surface; a first conductor portion located on the first top surface; and a second conductor portion and / or an electronic component located on the second top surface, wherein the first wall surface has a first recess connected to the first top surface, the first conductor portion extending from the first recess toward the second wall surface, the second wall surface has a second recess connected to the second top surface, and at least a portion of the second conductor portion and / or at least a portion of the electronic component is located in the second recess in a planar view.
[0072] (4) One embodiment of the wiring board according to the present disclosure is the wiring board of any one of (1) to (3) above, wherein the insulator has a first coating portion located on the first upper surface and in contact with a first inner wall surface of the first recess, and a portion of the first coating portion is located on a portion of the first conductor portion.
[0073] (5) One embodiment of the wiring board according to the present disclosure is the wiring board of (2) above, further comprising a second conductor portion located on the second upper surface, the insulator further having a third wall surface connected to the second upper surface and located below the second wall surface, and the second conductor portion extending from the second recess toward the third wall surface.
[0074] (6) One embodiment of the wiring board according to the present disclosure is the wiring board of (4) above, wherein the insulator has a first insulating layer having the first wall surface and a second insulating layer having the first upper surface and the second wall surface, and a portion of the first coating portion is located between the first insulating layer and the second insulating layer.
[0075] (7) One embodiment of the wiring board according to the present disclosure is the wiring board according to any one of (2), (3), and (5) above, in which the width of the second recess is smaller than the width of the first recess.
[0076] (8) One embodiment of the wiring board according to the present disclosure is the wiring board of any one of (2), (3), (5), and (7) above, wherein at least a portion of the second recess faces at least a portion of the first recess.
[0077] (9) One embodiment of the wiring board according to the present disclosure is the wiring board according to any one of (1) to (8) above, wherein the first conductor portion is spaced from the second wall surface.
[0078] (10) One embodiment of the wiring board according to the present disclosure is the wiring board according to any one of (1) to (9) above, wherein the height of the first wall surface is greater than the height of the second wall surface.
[0079] (11) One embodiment of the wiring board according to the present disclosure is the wiring board of (1) or (2) above, wherein the first conductor portion has a second portion, in which the distance between the first conductor and the second conductor is constant, closer to the second wall surface than the first portion.
[0080] (12) One embodiment of the wiring board according to the present disclosure is the wiring board of any of (1), (2) and (11) above, wherein the insulator has a first insulating layer having the first wall surface and a second insulating layer having the first upper surface and the second wall surface, and the first conductor portion has a third portion at a position overlapping the first insulating layer in a planar view, in which the distance between the first conductor and the second conductor increases as the distance from the first inner wall surface increases.
[0081] (13) One embodiment of the wiring board according to the present disclosure is the wiring board of any of (1), (2), (11) and (12) above, wherein the insulator has a first insulating layer having the first wall surface and a second insulating layer having the first upper surface and the second wall surface, and further includes a first via conductor connected to the first conductor and a second via conductor connected to the second conductor at a position overlapping the first insulating layer in a planar view.
[0082] (14) One embodiment of the wiring board according to the present disclosure is the wiring board according to any one of (1), (2), and (11) to (13) above, wherein the first conductor and the second conductor are signal conductors.
[0083] (15) One embodiment of the wiring board according to the present disclosure is the wiring board of any one of (1), (2), and (11) to (14) above, wherein the first conductor portion further has a third conductor and a fourth conductor.
[0084] (16) One embodiment of the wiring board according to the present disclosure is the wiring board of (15) above, wherein the third conductor and the fourth conductor are grounding conductors, the first conductor has a first end located opposite the second wall surface, the second conductor has a second end located opposite the second wall surface, the fourth conductor surrounds at least a portion of the periphery of the first end with a gap in a planar view, and the third conductor surrounds at least a portion of the periphery of the second end with a gap in a planar view.
[0085] (17) One embodiment of the wiring board according to the present disclosure is the wiring board of any one of (1) to (16) above, wherein the insulator has a top surface connected to the first wall surface and located above the first top surface, and further includes a frame body located above the top surface and spaced apart from the first wall surface in a plan view.
[0086] (18) One embodiment of the wiring board according to the present disclosure is the wiring board according to (7) above, wherein the second recessed portion entirely faces the first recessed portion.
[0087] (19) One embodiment of a package according to the present disclosure includes: a wiring board according to any one of (1) to (18); and a wall body connected and / or bonded to the wiring board.
[0088] (20) An embodiment of an optical module according to the present disclosure includes the package of (19), an optical element mounted in the package, and a lid joined to the package.
[0089] In addition, the details shown in the above embodiments can be modified as appropriate without departing from the spirit of the present disclosure. The scope of the present invention includes the scope of the invention described in the claims and its equivalents. Various combinations of the embodiments are not limited to the examples of the above embodiments. Furthermore, combinations of the embodiments with each other are also possible.
[0090] REFERENCE SIGNS LIST 100 Wiring board 1 Insulator 11 First insulating layer 12 Second insulating layer 13 Third insulating layer 14 Fourth insulating layer 110 Top surface 111 First wall surface h111 Height of first wall surface 112 First recess w112 Width of first recess 113 First inner wall surface 120 First upper surface 121 Second wall surface h121 Height of second wall surface 122 Second recess w122 Width of second recess 123 Second inner wall surface 124 First notch 130 Second upper surface 131 Third wall surface 134 Second notch 140 Bottom surface 15 Back surface 16 Through hole 21 First conductor portion 21a First portion 21b Second portion 21c Third portion 211 First conductor 211a First end 212 Second conductor 212a Second end 213 Third conductor 213a Second connection portion 214 Fourth conductor 214a First connection portion 23 Third conductor portion 24 Metal layer 31 First coated portion 32 Second coated portion 71 First via conductor 72 Second via conductor 41 Frame body 42 Lead terminal 50 Package 51 Wall body 60 Optical module 61 Optical element 62 Lid body
Claims
1. A wiring board comprising: an insulator having a first wall surface, a first top surface connected to the first wall surface, and a second wall surface connected to the first top surface and located below the first wall surface; a first conductor having a first conductor and a second conductor located alongside the first conductor and a first conductor portion located on the first top surface, wherein the first wall surface has a first recess connecting to the first top surface, and the first conductor portion extends from the first recess toward the second wall surface and has a first portion where the distance between the first conductor and the second conductor increases as the distance approaches a first inner wall surface of the first recess.
2. The wiring board according to claim 1, wherein the insulator further has a second upper surface connected to the second wall surface and positioned below the first upper surface, and the second wall surface has a second recess connected to the second upper surface.
3. A wiring board comprising: an insulator having a first wall surface, a first top surface connected to the first wall surface, a second wall surface connected to the first top surface and located below the first wall surface, and a second top surface connected to the second wall surface and located below the first top surface; a first conductor portion located on the first top surface; and a second conductor portion and / or electronic component located on the second top surface, wherein the first wall surface has a first recess portion connected to the first top surface, the first conductor portion extending from the first recess portion toward the second wall surface, the second wall surface has a second recess portion connected to the second top surface, and at least a portion of the second conductor portion and / or at least a portion of the electronic component is located in the second recess portion in a plan view.
4. The wiring board according to any one of claims 1 to 3, wherein the insulator has a first coating portion located on the first upper surface and in contact with a first inner wall surface of the first recess, and a portion of the first coating portion is located on a portion of the first conductor portion.
5. The wiring board according to claim 2, further comprising a second conductor portion located on the second upper surface, the insulator further having a third wall surface connected to the second upper surface and located below the second wall surface, and the second conductor portion extending from the second recess toward the third wall surface.
6. The wiring board according to claim 4, wherein the insulator comprises a first insulating layer having the first wall surface and a second insulating layer having the first upper surface and the second wall surface, and a portion of the first coating portion is located between the first insulating layer and the second insulating layer.
7. The wiring board according to any one of claims 2, 3 and 5, wherein the width of the second recess is smaller than the width of the first recess.
8. The wiring board according to any one of claims 2, 3, 5 and 7, wherein at least a portion of the second recess faces at least a portion of the first recess.
9. The wiring board according to any one of claims 1 to 8, wherein the first conductor portion is spaced from the second wall surface.
10. The wiring board according to any one of claims 1 to 9, wherein the height of the first wall surface is greater than the height of the second wall surface.
11. A wiring board as described in claim 1 or 2, wherein the first conductor portion has a second portion where the distance between the first conductor and the second conductor is constant, and is closer to the second wall surface than the first portion.
12. A wiring board as described in any one of claims 1, 2 and 11, wherein the insulator has a first insulating layer having the first wall surface and a second insulating layer having the first upper surface and the second wall surface, and the first conductor portion has a third portion at a position overlapping the first insulating layer in a planar view, in which the distance between the first conductor and the second conductor increases as the distance from the first inner wall surface increases.
13. A wiring board as described in any one of claims 1, 2, 11 and 12, wherein the insulator has a first insulating layer having the first wall surface and a second insulating layer having the first upper surface and the second wall surface, and further comprises a first via conductor connected to the first conductor and a second via conductor connected to the second conductor at a position overlapping the first insulating layer in a planar view.
14. The wiring board according to any one of claims 1, 2 and 11 to 13, wherein the first conductor and the second conductor are signal conductors.
15. The wiring board according to any one of claims 1, 2 and 11 to 14, wherein the first conductor portion further includes a third conductor and a fourth conductor.
16. The wiring board described in claim 15, wherein the third conductor and the fourth conductor are grounding conductors, the first conductor has a first end located opposite the second wall surface, the second conductor has a second end located opposite the second wall surface, the fourth conductor surrounds at least a portion of the periphery of the first end with a gap in a plan view, and the third conductor surrounds at least a portion of the periphery of the second end with a gap in a plan view.
17. A wiring board as claimed in any one of claims 1 to 16, wherein the insulator has a top surface connected to the first wall surface and located above the first top surface, and further comprises a frame body located on the top surface with a gap between it and the first wall surface in a plan view.
18. The wiring board according to claim 7, wherein the second recess is entirely opposite the first recess.
19. A package comprising: a wiring board according to any one of claims 1 to 18; and a wall body connected and / or bonded to the wiring board.
20. An optical module comprising: the package according to claim 19; an optical element mounted in said package; and a lid joined to said package.
Citation Information
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